LCOV - code coverage report
Current view: top level - src - register-configuration.h (source / functions) Hit Total Coverage
Test: app.info Lines: 7 9 77.8 %
Date: 2017-04-26 Functions: 0 0 -

          Line data    Source code
       1             : // Copyright 2014 the V8 project authors. All rights reserved.
       2             : // Use of this source code is governed by a BSD-style license that can be
       3             : // found in the LICENSE file.
       4             : 
       5             : #ifndef V8_COMPILER_REGISTER_CONFIGURATION_H_
       6             : #define V8_COMPILER_REGISTER_CONFIGURATION_H_
       7             : 
       8             : #include "src/base/macros.h"
       9             : #include "src/globals.h"
      10             : #include "src/machine-type.h"
      11             : 
      12             : namespace v8 {
      13             : namespace internal {
      14             : 
      15             : // An architecture independent representation of the sets of registers available
      16             : // for instruction creation.
      17             : class V8_EXPORT_PRIVATE RegisterConfiguration {
      18             :  public:
      19             :   enum AliasingKind {
      20             :     // Registers alias a single register of every other size (e.g. Intel).
      21             :     OVERLAP,
      22             :     // Registers alias two registers of the next smaller size (e.g. ARM).
      23             :     COMBINE
      24             :   };
      25             : 
      26             :   // Architecture independent maxes.
      27             :   static const int kMaxGeneralRegisters = 32;
      28             :   static const int kMaxFPRegisters = 32;
      29             : 
      30             :   // Default RegisterConfigurations for the target architecture.
      31             :   // TODO(X87): This distinction in RegisterConfigurations is temporary
      32             :   // until x87 TF supports all of the registers that Crankshaft does.
      33             :   static const RegisterConfiguration* Crankshaft();
      34             :   static const RegisterConfiguration* Turbofan();
      35             : 
      36             :   RegisterConfiguration(int num_general_registers, int num_double_registers,
      37             :                         int num_allocatable_general_registers,
      38             :                         int num_allocatable_double_registers,
      39             :                         const int* allocatable_general_codes,
      40             :                         const int* allocatable_double_codes,
      41             :                         AliasingKind fp_aliasing_kind,
      42             :                         char const* const* general_names,
      43             :                         char const* const* float_names,
      44             :                         char const* const* double_names,
      45             :                         char const* const* simd128_names);
      46             : 
      47             :   int num_general_registers() const { return num_general_registers_; }
      48             :   int num_float_registers() const { return num_float_registers_; }
      49             :   int num_double_registers() const { return num_double_registers_; }
      50             :   int num_simd128_registers() const { return num_simd128_registers_; }
      51             :   int num_allocatable_general_registers() const {
      52             :     return num_allocatable_general_registers_;
      53             :   }
      54             :   int num_allocatable_float_registers() const {
      55             :     return num_allocatable_float_registers_;
      56             :   }
      57             :   int num_allocatable_double_registers() const {
      58             :     return num_allocatable_double_registers_;
      59             :   }
      60             :   int num_allocatable_simd128_registers() const {
      61             :     return num_allocatable_simd128_registers_;
      62             :   }
      63             :   AliasingKind fp_aliasing_kind() const { return fp_aliasing_kind_; }
      64             :   int32_t allocatable_general_codes_mask() const {
      65             :     return allocatable_general_codes_mask_;
      66             :   }
      67             :   int32_t allocatable_double_codes_mask() const {
      68             :     return allocatable_double_codes_mask_;
      69             :   }
      70             :   int32_t allocatable_float_codes_mask() const {
      71             :     return allocatable_float_codes_mask_;
      72             :   }
      73             :   int GetAllocatableGeneralCode(int index) const {
      74    40832387 :     return allocatable_general_codes_[index];
      75             :   }
      76             :   bool IsAllocatableGeneralCode(int index) const {
      77    34736511 :     return ((1 << index) & allocatable_general_codes_mask_) != 0;
      78             :   }
      79             :   int GetAllocatableFloatCode(int index) const {
      80     1277625 :     return allocatable_float_codes_[index];
      81             :   }
      82             :   bool IsAllocatableFloatCode(int index) const {
      83             :     return ((1 << index) & allocatable_float_codes_mask_) != 0;
      84             :   }
      85             :   int GetAllocatableDoubleCode(int index) const {
      86    53597504 :     return allocatable_double_codes_[index];
      87             :   }
      88             :   bool IsAllocatableDoubleCode(int index) const {
      89    26962038 :     return ((1 << index) & allocatable_double_codes_mask_) != 0;
      90             :   }
      91             :   int GetAllocatableSimd128Code(int index) const {
      92             :     return allocatable_simd128_codes_[index];
      93             :   }
      94             :   bool IsAllocatableSimd128Code(int index) const {
      95             :     return ((1 << index) & allocatable_simd128_codes_mask_) != 0;
      96             :   }
      97             :   const char* GetGeneralRegisterName(int code) const {
      98    10794693 :     return general_register_names_[code];
      99             :   }
     100             :   const char* GetFloatRegisterName(int code) const {
     101           0 :     return float_register_names_[code];
     102             :   }
     103             :   const char* GetDoubleRegisterName(int code) const {
     104      383384 :     return double_register_names_[code];
     105             :   }
     106             :   const char* GetSimd128RegisterName(int code) const {
     107           0 :     return simd128_register_names_[code];
     108             :   }
     109             :   const int* allocatable_general_codes() const {
     110             :     return allocatable_general_codes_;
     111             :   }
     112             :   const int* allocatable_float_codes() const {
     113             :     return allocatable_float_codes_;
     114             :   }
     115             :   const int* allocatable_double_codes() const {
     116             :     return allocatable_double_codes_;
     117             :   }
     118             :   const int* allocatable_simd128_codes() const {
     119             :     return allocatable_simd128_codes_;
     120             :   }
     121             : 
     122             :   // Aliasing calculations for floating point registers, when fp_aliasing_kind()
     123             :   // is COMBINE. Currently only implemented for kFloat32, kFloat64, or kSimd128
     124             :   // reps. Returns the number of aliases, and if > 0, alias_base_index is set to
     125             :   // the index of the first alias.
     126             :   int GetAliases(MachineRepresentation rep, int index,
     127             :                  MachineRepresentation other_rep, int* alias_base_index) const;
     128             :   // Returns a value indicating whether two registers alias each other, when
     129             :   // fp_aliasing_kind() is COMBINE. Currently implemented for kFloat32,
     130             :   // kFloat64, or kSimd128 reps.
     131             :   bool AreAliases(MachineRepresentation rep, int index,
     132             :                   MachineRepresentation other_rep, int other_index) const;
     133             : 
     134             :  private:
     135             :   const int num_general_registers_;
     136             :   int num_float_registers_;
     137             :   const int num_double_registers_;
     138             :   int num_simd128_registers_;
     139             :   int num_allocatable_general_registers_;
     140             :   int num_allocatable_float_registers_;
     141             :   int num_allocatable_double_registers_;
     142             :   int num_allocatable_simd128_registers_;
     143             :   int32_t allocatable_general_codes_mask_;
     144             :   int32_t allocatable_float_codes_mask_;
     145             :   int32_t allocatable_double_codes_mask_;
     146             :   int32_t allocatable_simd128_codes_mask_;
     147             :   const int* allocatable_general_codes_;
     148             :   int allocatable_float_codes_[kMaxFPRegisters];
     149             :   const int* allocatable_double_codes_;
     150             :   int allocatable_simd128_codes_[kMaxFPRegisters];
     151             :   AliasingKind fp_aliasing_kind_;
     152             :   char const* const* general_register_names_;
     153             :   char const* const* float_register_names_;
     154             :   char const* const* double_register_names_;
     155             :   char const* const* simd128_register_names_;
     156             : };
     157             : 
     158             : }  // namespace internal
     159             : }  // namespace v8
     160             : 
     161             : #endif  // V8_COMPILER_REGISTER_CONFIGURATION_H_

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