Line data Source code
1 : // Copyright 2014 the V8 project authors. All rights reserved.
2 : // Use of this source code is governed by a BSD-style license that can be
3 : // found in the LICENSE file.
4 :
5 : #ifndef V8_COMPILER_REGISTER_CONFIGURATION_H_
6 : #define V8_COMPILER_REGISTER_CONFIGURATION_H_
7 :
8 : #include "src/base/macros.h"
9 : #include "src/globals.h"
10 : #include "src/machine-type.h"
11 : #include "src/reglist.h"
12 :
13 : namespace v8 {
14 : namespace internal {
15 :
16 : // An architecture independent representation of the sets of registers available
17 : // for instruction creation.
18 : class V8_EXPORT_PRIVATE RegisterConfiguration {
19 : public:
20 : enum AliasingKind {
21 : // Registers alias a single register of every other size (e.g. Intel).
22 : OVERLAP,
23 : // Registers alias two registers of the next smaller size (e.g. ARM).
24 : COMBINE
25 : };
26 :
27 : // Architecture independent maxes.
28 : static const int kMaxGeneralRegisters = 32;
29 : static const int kMaxFPRegisters = 32;
30 :
31 : // Default RegisterConfigurations for the target architecture.
32 : static const RegisterConfiguration* Default();
33 :
34 : static const RegisterConfiguration* RestrictGeneralRegisters(
35 : RegList registers);
36 :
37 : RegisterConfiguration(int num_general_registers, int num_double_registers,
38 : int num_allocatable_general_registers,
39 : int num_allocatable_double_registers,
40 : const int* allocatable_general_codes,
41 : const int* allocatable_double_codes,
42 : AliasingKind fp_aliasing_kind,
43 : char const* const* general_names,
44 : char const* const* float_names,
45 : char const* const* double_names,
46 : char const* const* simd128_names);
47 :
48 : int num_general_registers() const { return num_general_registers_; }
49 : int num_float_registers() const { return num_float_registers_; }
50 : int num_double_registers() const { return num_double_registers_; }
51 : int num_simd128_registers() const { return num_simd128_registers_; }
52 : int num_allocatable_general_registers() const {
53 : return num_allocatable_general_registers_;
54 : }
55 : int num_allocatable_float_registers() const {
56 : return num_allocatable_float_registers_;
57 : }
58 : int num_allocatable_double_registers() const {
59 : return num_allocatable_double_registers_;
60 : }
61 : int num_allocatable_simd128_registers() const {
62 : return num_allocatable_simd128_registers_;
63 : }
64 : AliasingKind fp_aliasing_kind() const { return fp_aliasing_kind_; }
65 : int32_t allocatable_general_codes_mask() const {
66 : return allocatable_general_codes_mask_;
67 : }
68 : int32_t allocatable_double_codes_mask() const {
69 : return allocatable_double_codes_mask_;
70 : }
71 : int32_t allocatable_float_codes_mask() const {
72 : return allocatable_float_codes_mask_;
73 : }
74 : int GetAllocatableGeneralCode(int index) const {
75 : DCHECK(index >= 0 && index < num_allocatable_general_registers());
76 55394098 : return allocatable_general_codes_[index];
77 : }
78 : bool IsAllocatableGeneralCode(int index) const {
79 1074 : return ((1 << index) & allocatable_general_codes_mask_) != 0;
80 : }
81 : int GetAllocatableFloatCode(int index) const {
82 : DCHECK(index >= 0 && index < num_allocatable_float_registers());
83 695275 : return allocatable_float_codes_[index];
84 : }
85 : bool IsAllocatableFloatCode(int index) const {
86 : return ((1 << index) & allocatable_float_codes_mask_) != 0;
87 : }
88 : int GetAllocatableDoubleCode(int index) const {
89 : DCHECK(index >= 0 && index < num_allocatable_double_registers());
90 70065293 : return allocatable_double_codes_[index];
91 : }
92 : bool IsAllocatableDoubleCode(int index) const {
93 : return ((1 << index) & allocatable_double_codes_mask_) != 0;
94 : }
95 : int GetAllocatableSimd128Code(int index) const {
96 : DCHECK(index >= 0 && index < num_allocatable_simd128_registers());
97 118475 : return allocatable_simd128_codes_[index];
98 : }
99 : bool IsAllocatableSimd128Code(int index) const {
100 : return ((1 << index) & allocatable_simd128_codes_mask_) != 0;
101 : }
102 : const char* GetGeneralRegisterName(int code) const {
103 574 : return general_register_names_[code];
104 : }
105 : const char* GetFloatRegisterName(int code) const {
106 0 : return float_register_names_[code];
107 : }
108 : const char* GetDoubleRegisterName(int code) const {
109 0 : return double_register_names_[code];
110 : }
111 : const char* GetSimd128RegisterName(int code) const {
112 0 : return simd128_register_names_[code];
113 : }
114 : const int* allocatable_general_codes() const {
115 : return allocatable_general_codes_;
116 : }
117 : const int* allocatable_float_codes() const {
118 : return allocatable_float_codes_;
119 : }
120 : const int* allocatable_double_codes() const {
121 : return allocatable_double_codes_;
122 : }
123 : const int* allocatable_simd128_codes() const {
124 : return allocatable_simd128_codes_;
125 : }
126 :
127 : // Aliasing calculations for floating point registers, when fp_aliasing_kind()
128 : // is COMBINE. Currently only implemented for kFloat32, kFloat64, or kSimd128
129 : // reps. Returns the number of aliases, and if > 0, alias_base_index is set to
130 : // the index of the first alias.
131 : int GetAliases(MachineRepresentation rep, int index,
132 : MachineRepresentation other_rep, int* alias_base_index) const;
133 : // Returns a value indicating whether two registers alias each other, when
134 : // fp_aliasing_kind() is COMBINE. Currently implemented for kFloat32,
135 : // kFloat64, or kSimd128 reps.
136 : bool AreAliases(MachineRepresentation rep, int index,
137 : MachineRepresentation other_rep, int other_index) const;
138 :
139 138 : virtual ~RegisterConfiguration() {}
140 :
141 : private:
142 : const int num_general_registers_;
143 : int num_float_registers_;
144 : const int num_double_registers_;
145 : int num_simd128_registers_;
146 : int num_allocatable_general_registers_;
147 : int num_allocatable_float_registers_;
148 : int num_allocatable_double_registers_;
149 : int num_allocatable_simd128_registers_;
150 : int32_t allocatable_general_codes_mask_;
151 : int32_t allocatable_float_codes_mask_;
152 : int32_t allocatable_double_codes_mask_;
153 : int32_t allocatable_simd128_codes_mask_;
154 : const int* allocatable_general_codes_;
155 : int allocatable_float_codes_[kMaxFPRegisters];
156 : const int* allocatable_double_codes_;
157 : int allocatable_simd128_codes_[kMaxFPRegisters];
158 : AliasingKind fp_aliasing_kind_;
159 : char const* const* general_register_names_;
160 : char const* const* float_register_names_;
161 : char const* const* double_register_names_;
162 : char const* const* simd128_register_names_;
163 : };
164 :
165 : } // namespace internal
166 : } // namespace v8
167 :
168 : #endif // V8_COMPILER_REGISTER_CONFIGURATION_H_
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