LCOV - code coverage report

Current view: top level - util/bits - fd_float.h (source / functions) Hit Total Coverage Test: cov.lcov Lines: 8 80 10.0 % Date: 2026-10-22 18:10:43 Functions: 12 702 1.7 %

Function Name	Hit count
fd_accdb_svm.c:fd_dblbits	0
fd_accdb_svm.c:fd_dblbits_bexp	0
fd_accdb_svm.c:fd_dblbits_bias	0
fd_accdb_svm.c:fd_dblbits_is_denorm	0
fd_accdb_svm.c:fd_dblbits_is_inf	0
fd_accdb_svm.c:fd_dblbits_is_nan	0
fd_accdb_svm.c:fd_dblbits_is_normal	0
fd_accdb_svm.c:fd_dblbits_is_zero	0
fd_accdb_svm.c:fd_dblbits_mant	0
fd_accdb_svm.c:fd_dblbits_pack	0
fd_accdb_svm.c:fd_dblbits_sign	0
fd_accdb_svm.c:fd_dblbits_unbias	0
fd_accdb_svm.c:fd_double	0
fd_accdb_svm.c:fd_float	0
fd_accdb_svm.c:fd_fltbits	0
fd_accdb_svm.c:fd_fltbits_bexp	0
fd_accdb_svm.c:fd_fltbits_bias	0
fd_accdb_svm.c:fd_fltbits_is_denorm	0
fd_accdb_svm.c:fd_fltbits_is_inf	0
fd_accdb_svm.c:fd_fltbits_is_nan	0
fd_accdb_svm.c:fd_fltbits_is_normal	0
fd_accdb_svm.c:fd_fltbits_is_zero	0
fd_accdb_svm.c:fd_fltbits_mant	0
fd_accdb_svm.c:fd_fltbits_pack	0
fd_accdb_svm.c:fd_fltbits_sign	0
fd_accdb_svm.c:fd_fltbits_unbias	0
fd_bank.c:fd_dblbits	0
fd_bank.c:fd_dblbits_bexp	0
fd_bank.c:fd_dblbits_bias	0
fd_bank.c:fd_dblbits_is_denorm	0
fd_bank.c:fd_dblbits_is_inf	0
fd_bank.c:fd_dblbits_is_nan	0
fd_bank.c:fd_dblbits_is_normal	0
fd_bank.c:fd_dblbits_is_zero	0
fd_bank.c:fd_dblbits_mant	0
fd_bank.c:fd_dblbits_pack	0
fd_bank.c:fd_dblbits_sign	0
fd_bank.c:fd_dblbits_unbias	0
fd_bank.c:fd_double	0
fd_bank.c:fd_float	0
fd_bank.c:fd_fltbits	0
fd_bank.c:fd_fltbits_bexp	0
fd_bank.c:fd_fltbits_bias	0
fd_bank.c:fd_fltbits_is_denorm	0
fd_bank.c:fd_fltbits_is_inf	0
fd_bank.c:fd_fltbits_is_nan	0
fd_bank.c:fd_fltbits_is_normal	0
fd_bank.c:fd_fltbits_is_zero	0
fd_bank.c:fd_fltbits_mant	0
fd_bank.c:fd_fltbits_pack	0
fd_bank.c:fd_fltbits_sign	0
fd_bank.c:fd_fltbits_unbias	0
fd_bundle_harness.c:fd_dblbits	0
fd_bundle_harness.c:fd_dblbits_bexp	0
fd_bundle_harness.c:fd_dblbits_bias	0
fd_bundle_harness.c:fd_dblbits_is_denorm	0
fd_bundle_harness.c:fd_dblbits_is_inf	0
fd_bundle_harness.c:fd_dblbits_is_nan	0
fd_bundle_harness.c:fd_dblbits_is_normal	0
fd_bundle_harness.c:fd_dblbits_is_zero	0
fd_bundle_harness.c:fd_dblbits_mant	0
fd_bundle_harness.c:fd_dblbits_pack	0
fd_bundle_harness.c:fd_dblbits_sign	0
fd_bundle_harness.c:fd_dblbits_unbias	0
fd_bundle_harness.c:fd_double	0
fd_bundle_harness.c:fd_float	0
fd_bundle_harness.c:fd_fltbits	0
fd_bundle_harness.c:fd_fltbits_bexp	0
fd_bundle_harness.c:fd_fltbits_bias	0
fd_bundle_harness.c:fd_fltbits_is_denorm	0
fd_bundle_harness.c:fd_fltbits_is_inf	0
fd_bundle_harness.c:fd_fltbits_is_nan	0
fd_bundle_harness.c:fd_fltbits_is_normal	0
fd_bundle_harness.c:fd_fltbits_is_zero	0
fd_bundle_harness.c:fd_fltbits_mant	0
fd_bundle_harness.c:fd_fltbits_pack	0
fd_bundle_harness.c:fd_fltbits_sign	0
fd_bundle_harness.c:fd_fltbits_unbias	0
fd_event_runtime.c:fd_dblbits	0
fd_event_runtime.c:fd_dblbits_bexp	0
fd_event_runtime.c:fd_dblbits_bias	0
fd_event_runtime.c:fd_dblbits_is_denorm	0
fd_event_runtime.c:fd_dblbits_is_inf	0
fd_event_runtime.c:fd_dblbits_is_nan	0
fd_event_runtime.c:fd_dblbits_is_normal	0
fd_event_runtime.c:fd_dblbits_is_zero	0
fd_event_runtime.c:fd_dblbits_mant	0
fd_event_runtime.c:fd_dblbits_pack	0
fd_event_runtime.c:fd_dblbits_sign	0
fd_event_runtime.c:fd_dblbits_unbias	0
fd_event_runtime.c:fd_double	0
fd_event_runtime.c:fd_float	0
fd_event_runtime.c:fd_fltbits	0
fd_event_runtime.c:fd_fltbits_bexp	0
fd_event_runtime.c:fd_fltbits_bias	0
fd_event_runtime.c:fd_fltbits_is_denorm	0
fd_event_runtime.c:fd_fltbits_is_inf	0
fd_event_runtime.c:fd_fltbits_is_nan	0
fd_event_runtime.c:fd_fltbits_is_normal	0
fd_event_runtime.c:fd_fltbits_is_zero	0
fd_event_runtime.c:fd_fltbits_mant	0
fd_event_runtime.c:fd_fltbits_pack	0
fd_event_runtime.c:fd_fltbits_sign	0
fd_event_runtime.c:fd_fltbits_unbias	0
fd_execrp_tile.c:fd_dblbits	0
fd_execrp_tile.c:fd_dblbits_bexp	0
fd_execrp_tile.c:fd_dblbits_bias	0
fd_execrp_tile.c:fd_dblbits_is_denorm	0
fd_execrp_tile.c:fd_dblbits_is_inf	0
fd_execrp_tile.c:fd_dblbits_is_nan	0
fd_execrp_tile.c:fd_dblbits_is_normal	0
fd_execrp_tile.c:fd_dblbits_is_zero	0
fd_execrp_tile.c:fd_dblbits_mant	0
fd_execrp_tile.c:fd_dblbits_pack	0
fd_execrp_tile.c:fd_dblbits_sign	0
fd_execrp_tile.c:fd_dblbits_unbias	0
fd_execrp_tile.c:fd_double	0
fd_execrp_tile.c:fd_float	0
fd_execrp_tile.c:fd_fltbits	0
fd_execrp_tile.c:fd_fltbits_bexp	0
fd_execrp_tile.c:fd_fltbits_bias	0
fd_execrp_tile.c:fd_fltbits_is_denorm	0
fd_execrp_tile.c:fd_fltbits_is_inf	0
fd_execrp_tile.c:fd_fltbits_is_nan	0
fd_execrp_tile.c:fd_fltbits_is_normal	0
fd_execrp_tile.c:fd_fltbits_is_zero	0
fd_execrp_tile.c:fd_fltbits_mant	0
fd_execrp_tile.c:fd_fltbits_pack	0
fd_execrp_tile.c:fd_fltbits_sign	0
fd_execrp_tile.c:fd_fltbits_unbias	0
fd_genesis_create.c:fd_dblbits	0
fd_genesis_create.c:fd_dblbits_bexp	0
fd_genesis_create.c:fd_dblbits_bias	0
fd_genesis_create.c:fd_dblbits_is_denorm	0
fd_genesis_create.c:fd_dblbits_is_inf	0
fd_genesis_create.c:fd_dblbits_is_nan	0
fd_genesis_create.c:fd_dblbits_is_normal	0
fd_genesis_create.c:fd_dblbits_is_zero	0
fd_genesis_create.c:fd_dblbits_mant	0
fd_genesis_create.c:fd_dblbits_pack	0
fd_genesis_create.c:fd_dblbits_sign	0
fd_genesis_create.c:fd_dblbits_unbias	0
fd_genesis_create.c:fd_double	0
fd_genesis_create.c:fd_float	0
fd_genesis_create.c:fd_fltbits	0
fd_genesis_create.c:fd_fltbits_bexp	0
fd_genesis_create.c:fd_fltbits_bias	0
fd_genesis_create.c:fd_fltbits_is_denorm	0
fd_genesis_create.c:fd_fltbits_is_inf	0
fd_genesis_create.c:fd_fltbits_is_nan	0
fd_genesis_create.c:fd_fltbits_is_normal	0
fd_genesis_create.c:fd_fltbits_is_zero	0
fd_genesis_create.c:fd_fltbits_mant	0
fd_genesis_create.c:fd_fltbits_pack	0
fd_genesis_create.c:fd_fltbits_sign	0
fd_genesis_create.c:fd_fltbits_unbias	0
fd_gui_printf.c:fd_dblbits	0
fd_gui_printf.c:fd_dblbits_bexp	0
fd_gui_printf.c:fd_dblbits_bias	0
fd_gui_printf.c:fd_dblbits_is_denorm	0
fd_gui_printf.c:fd_dblbits_is_inf	0
fd_gui_printf.c:fd_dblbits_is_nan	0
fd_gui_printf.c:fd_dblbits_is_normal	0
fd_gui_printf.c:fd_dblbits_is_zero	0
fd_gui_printf.c:fd_dblbits_mant	0
fd_gui_printf.c:fd_dblbits_pack	0
fd_gui_printf.c:fd_dblbits_sign	0
fd_gui_printf.c:fd_dblbits_unbias	0
fd_gui_printf.c:fd_double	0
fd_gui_printf.c:fd_float	0
fd_gui_printf.c:fd_fltbits	0
fd_gui_printf.c:fd_fltbits_bexp	0
fd_gui_printf.c:fd_fltbits_bias	0
fd_gui_printf.c:fd_fltbits_is_denorm	0
fd_gui_printf.c:fd_fltbits_is_inf	0
fd_gui_printf.c:fd_fltbits_is_nan	0
fd_gui_printf.c:fd_fltbits_is_normal	0
fd_gui_printf.c:fd_fltbits_is_zero	0
fd_gui_printf.c:fd_fltbits_mant	0
fd_gui_printf.c:fd_fltbits_pack	0
fd_gui_printf.c:fd_fltbits_sign	0
fd_gui_printf.c:fd_fltbits_unbias	0
fd_replay_tile.c:fd_dblbits	0
fd_replay_tile.c:fd_dblbits_bexp	0
fd_replay_tile.c:fd_dblbits_bias	0
fd_replay_tile.c:fd_dblbits_is_denorm	0
fd_replay_tile.c:fd_dblbits_is_inf	0
fd_replay_tile.c:fd_dblbits_is_nan	0
fd_replay_tile.c:fd_dblbits_is_normal	0
fd_replay_tile.c:fd_dblbits_is_zero	0
fd_replay_tile.c:fd_dblbits_mant	0
fd_replay_tile.c:fd_dblbits_pack	0
fd_replay_tile.c:fd_dblbits_sign	0
fd_replay_tile.c:fd_dblbits_unbias	0
fd_replay_tile.c:fd_double	0
fd_replay_tile.c:fd_float	0
fd_replay_tile.c:fd_fltbits	0
fd_replay_tile.c:fd_fltbits_bexp	0
fd_replay_tile.c:fd_fltbits_bias	0
fd_replay_tile.c:fd_fltbits_is_denorm	0
fd_replay_tile.c:fd_fltbits_is_inf	0
fd_replay_tile.c:fd_fltbits_is_nan	0
fd_replay_tile.c:fd_fltbits_is_normal	0
fd_replay_tile.c:fd_fltbits_is_zero	0
fd_replay_tile.c:fd_fltbits_mant	0
fd_replay_tile.c:fd_fltbits_pack	0
fd_replay_tile.c:fd_fltbits_sign	0
fd_replay_tile.c:fd_fltbits_unbias	0
fd_rewards.c:fd_dblbits_bias	0
fd_rewards.c:fd_dblbits_is_denorm	0
fd_rewards.c:fd_dblbits_is_inf	0
fd_rewards.c:fd_dblbits_is_nan	0
fd_rewards.c:fd_dblbits_is_normal	0
fd_rewards.c:fd_dblbits_is_zero	0
fd_rewards.c:fd_dblbits_pack	0
fd_rewards.c:fd_dblbits_unbias	0
fd_rewards.c:fd_double	0
fd_rewards.c:fd_float	0
fd_rewards.c:fd_fltbits	0
fd_rewards.c:fd_fltbits_bexp	0
fd_rewards.c:fd_fltbits_bias	0
fd_rewards.c:fd_fltbits_is_denorm	0
fd_rewards.c:fd_fltbits_is_inf	0
fd_rewards.c:fd_fltbits_is_nan	0
fd_rewards.c:fd_fltbits_is_normal	0
fd_rewards.c:fd_fltbits_is_zero	0
fd_rewards.c:fd_fltbits_mant	0
fd_rewards.c:fd_fltbits_pack	0
fd_rewards.c:fd_fltbits_sign	0
fd_rewards.c:fd_fltbits_unbias	0
fd_runtime.c:fd_dblbits	0
fd_runtime.c:fd_dblbits_bexp	0
fd_runtime.c:fd_dblbits_bias	0
fd_runtime.c:fd_dblbits_is_denorm	0
fd_runtime.c:fd_dblbits_is_inf	0
fd_runtime.c:fd_dblbits_is_nan	0
fd_runtime.c:fd_dblbits_is_normal	0
fd_runtime.c:fd_dblbits_is_zero	0
fd_runtime.c:fd_dblbits_mant	0
fd_runtime.c:fd_dblbits_pack	0
fd_runtime.c:fd_dblbits_sign	0
fd_runtime.c:fd_dblbits_unbias	0
fd_runtime.c:fd_double	0
fd_runtime.c:fd_float	0
fd_runtime.c:fd_fltbits	0
fd_runtime.c:fd_fltbits_bexp	0
fd_runtime.c:fd_fltbits_bias	0
fd_runtime.c:fd_fltbits_is_denorm	0
fd_runtime.c:fd_fltbits_is_inf	0
fd_runtime.c:fd_fltbits_is_nan	0
fd_runtime.c:fd_fltbits_is_normal	0
fd_runtime.c:fd_fltbits_is_zero	0
fd_runtime.c:fd_fltbits_mant	0
fd_runtime.c:fd_fltbits_pack	0
fd_runtime.c:fd_fltbits_sign	0
fd_runtime.c:fd_fltbits_unbias	0
fd_snapin_tile.c:fd_dblbits	0
fd_snapin_tile.c:fd_dblbits_bexp	0
fd_snapin_tile.c:fd_dblbits_bias	0
fd_snapin_tile.c:fd_dblbits_is_denorm	0
fd_snapin_tile.c:fd_dblbits_is_inf	0
fd_snapin_tile.c:fd_dblbits_is_nan	0
fd_snapin_tile.c:fd_dblbits_is_normal	0
fd_snapin_tile.c:fd_dblbits_is_zero	0
fd_snapin_tile.c:fd_dblbits_mant	0
fd_snapin_tile.c:fd_dblbits_pack	0
fd_snapin_tile.c:fd_dblbits_sign	0
fd_snapin_tile.c:fd_dblbits_unbias	0
fd_snapin_tile.c:fd_double	0
fd_snapin_tile.c:fd_float	0
fd_snapin_tile.c:fd_fltbits	0
fd_snapin_tile.c:fd_fltbits_bexp	0
fd_snapin_tile.c:fd_fltbits_bias	0
fd_snapin_tile.c:fd_fltbits_is_denorm	0
fd_snapin_tile.c:fd_fltbits_is_inf	0
fd_snapin_tile.c:fd_fltbits_is_nan	0
fd_snapin_tile.c:fd_fltbits_is_normal	0
fd_snapin_tile.c:fd_fltbits_is_zero	0
fd_snapin_tile.c:fd_fltbits_mant	0
fd_snapin_tile.c:fd_fltbits_pack	0
fd_snapin_tile.c:fd_fltbits_sign	0
fd_snapin_tile.c:fd_fltbits_unbias	0
fd_stake_delegations.c:fd_dblbits	0
fd_stake_delegations.c:fd_dblbits_bexp	0
fd_stake_delegations.c:fd_dblbits_bias	0
fd_stake_delegations.c:fd_dblbits_is_denorm	0
fd_stake_delegations.c:fd_dblbits_is_inf	0
fd_stake_delegations.c:fd_dblbits_is_nan	0
fd_stake_delegations.c:fd_dblbits_is_normal	0
fd_stake_delegations.c:fd_dblbits_is_zero	0
fd_stake_delegations.c:fd_dblbits_mant	0
fd_stake_delegations.c:fd_dblbits_pack	0
fd_stake_delegations.c:fd_dblbits_sign	0
fd_stake_delegations.c:fd_dblbits_unbias	0
fd_stake_delegations.c:fd_double	0
fd_stake_delegations.c:fd_float	0
fd_stake_delegations.c:fd_fltbits	0
fd_stake_delegations.c:fd_fltbits_bexp	0
fd_stake_delegations.c:fd_fltbits_bias	0
fd_stake_delegations.c:fd_fltbits_is_denorm	0
fd_stake_delegations.c:fd_fltbits_is_inf	0
fd_stake_delegations.c:fd_fltbits_is_nan	0
fd_stake_delegations.c:fd_fltbits_is_normal	0
fd_stake_delegations.c:fd_fltbits_is_zero	0
fd_stake_delegations.c:fd_fltbits_mant	0
fd_stake_delegations.c:fd_fltbits_pack	0
fd_stake_delegations.c:fd_fltbits_sign	0
fd_stake_delegations.c:fd_fltbits_unbias	0
fd_stakes.c:fd_dblbits_bias	0
fd_stakes.c:fd_dblbits_is_denorm	0
fd_stakes.c:fd_dblbits_is_inf	0
fd_stakes.c:fd_dblbits_is_nan	0
fd_stakes.c:fd_dblbits_is_normal	0
fd_stakes.c:fd_dblbits_is_zero	0
fd_stakes.c:fd_dblbits_pack	0
fd_stakes.c:fd_dblbits_unbias	0
fd_stakes.c:fd_double	0
fd_stakes.c:fd_float	0
fd_stakes.c:fd_fltbits	0
fd_stakes.c:fd_fltbits_bexp	0
fd_stakes.c:fd_fltbits_bias	0
fd_stakes.c:fd_fltbits_is_denorm	0
fd_stakes.c:fd_fltbits_is_inf	0
fd_stakes.c:fd_fltbits_is_nan	0
fd_stakes.c:fd_fltbits_is_normal	0
fd_stakes.c:fd_fltbits_is_zero	0
fd_stakes.c:fd_fltbits_mant	0
fd_stakes.c:fd_fltbits_pack	0
fd_stakes.c:fd_fltbits_sign	0
fd_stakes.c:fd_fltbits_unbias	0
fd_sysvar_epoch_rewards.c:fd_dblbits	0
fd_sysvar_epoch_rewards.c:fd_dblbits_bexp	0
fd_sysvar_epoch_rewards.c:fd_dblbits_bias	0
fd_sysvar_epoch_rewards.c:fd_dblbits_is_denorm	0
fd_sysvar_epoch_rewards.c:fd_dblbits_is_inf	0
fd_sysvar_epoch_rewards.c:fd_dblbits_is_nan	0
fd_sysvar_epoch_rewards.c:fd_dblbits_is_normal	0
fd_sysvar_epoch_rewards.c:fd_dblbits_is_zero	0
fd_sysvar_epoch_rewards.c:fd_dblbits_mant	0
fd_sysvar_epoch_rewards.c:fd_dblbits_pack	0
fd_sysvar_epoch_rewards.c:fd_dblbits_sign	0
fd_sysvar_epoch_rewards.c:fd_dblbits_unbias	0
fd_sysvar_epoch_rewards.c:fd_double	0
fd_sysvar_epoch_rewards.c:fd_float	0
fd_sysvar_epoch_rewards.c:fd_fltbits	0
fd_sysvar_epoch_rewards.c:fd_fltbits_bexp	0
fd_sysvar_epoch_rewards.c:fd_fltbits_bias	0
fd_sysvar_epoch_rewards.c:fd_fltbits_is_denorm	0
fd_sysvar_epoch_rewards.c:fd_fltbits_is_inf	0
fd_sysvar_epoch_rewards.c:fd_fltbits_is_nan	0
fd_sysvar_epoch_rewards.c:fd_fltbits_is_normal	0
fd_sysvar_epoch_rewards.c:fd_fltbits_is_zero	0
fd_sysvar_epoch_rewards.c:fd_fltbits_mant	0
fd_sysvar_epoch_rewards.c:fd_fltbits_pack	0
fd_sysvar_epoch_rewards.c:fd_fltbits_sign	0
fd_sysvar_epoch_rewards.c:fd_fltbits_unbias	0
fd_sysvar_rent1.c:fd_dblbits_bias	0
fd_sysvar_rent1.c:fd_dblbits_is_denorm	0
fd_sysvar_rent1.c:fd_dblbits_is_inf	0
fd_sysvar_rent1.c:fd_dblbits_is_nan	0
fd_sysvar_rent1.c:fd_dblbits_is_normal	0
fd_sysvar_rent1.c:fd_dblbits_is_zero	0
fd_sysvar_rent1.c:fd_dblbits_pack	0
fd_sysvar_rent1.c:fd_dblbits_unbias	0
fd_sysvar_rent1.c:fd_double	0
fd_sysvar_rent1.c:fd_float	0
fd_sysvar_rent1.c:fd_fltbits	0
fd_sysvar_rent1.c:fd_fltbits_bexp	0
fd_sysvar_rent1.c:fd_fltbits_bias	0
fd_sysvar_rent1.c:fd_fltbits_is_denorm	0
fd_sysvar_rent1.c:fd_fltbits_is_inf	0
fd_sysvar_rent1.c:fd_fltbits_is_nan	0
fd_sysvar_rent1.c:fd_fltbits_is_normal	0
fd_sysvar_rent1.c:fd_fltbits_is_zero	0
fd_sysvar_rent1.c:fd_fltbits_mant	0
fd_sysvar_rent1.c:fd_fltbits_pack	0
fd_sysvar_rent1.c:fd_fltbits_sign	0
fd_sysvar_rent1.c:fd_fltbits_unbias	0
test_bundle_exec.c:fd_dblbits	0
test_bundle_exec.c:fd_dblbits_bexp	0
test_bundle_exec.c:fd_dblbits_bias	0
test_bundle_exec.c:fd_dblbits_is_denorm	0
test_bundle_exec.c:fd_dblbits_is_inf	0
test_bundle_exec.c:fd_dblbits_is_nan	0
test_bundle_exec.c:fd_dblbits_is_normal	0
test_bundle_exec.c:fd_dblbits_is_zero	0
test_bundle_exec.c:fd_dblbits_mant	0
test_bundle_exec.c:fd_dblbits_pack	0
test_bundle_exec.c:fd_dblbits_sign	0
test_bundle_exec.c:fd_dblbits_unbias	0
test_bundle_exec.c:fd_double	0
test_bundle_exec.c:fd_float	0
test_bundle_exec.c:fd_fltbits	0
test_bundle_exec.c:fd_fltbits_bexp	0
test_bundle_exec.c:fd_fltbits_bias	0
test_bundle_exec.c:fd_fltbits_is_denorm	0
test_bundle_exec.c:fd_fltbits_is_inf	0
test_bundle_exec.c:fd_fltbits_is_nan	0
test_bundle_exec.c:fd_fltbits_is_normal	0
test_bundle_exec.c:fd_fltbits_is_zero	0
test_bundle_exec.c:fd_fltbits_mant	0
test_bundle_exec.c:fd_fltbits_pack	0
test_bundle_exec.c:fd_fltbits_sign	0
test_bundle_exec.c:fd_fltbits_unbias	0
test_cast.c:fd_dblbits	0
test_cast.c:fd_dblbits_bexp	0
test_cast.c:fd_dblbits_bias	0
test_cast.c:fd_dblbits_is_denorm	0
test_cast.c:fd_dblbits_is_inf	0
test_cast.c:fd_dblbits_is_nan	0
test_cast.c:fd_dblbits_is_normal	0
test_cast.c:fd_dblbits_is_zero	0
test_cast.c:fd_dblbits_mant	0
test_cast.c:fd_dblbits_pack	0
test_cast.c:fd_dblbits_sign	0
test_cast.c:fd_dblbits_unbias	0
test_cast.c:fd_double	0
test_cast.c:fd_float	0
test_cast.c:fd_fltbits	0
test_cast.c:fd_fltbits_bexp	0
test_cast.c:fd_fltbits_bias	0
test_cast.c:fd_fltbits_is_denorm	0
test_cast.c:fd_fltbits_is_inf	0
test_cast.c:fd_fltbits_is_nan	0
test_cast.c:fd_fltbits_is_normal	0
test_cast.c:fd_fltbits_is_zero	0
test_cast.c:fd_fltbits_mant	0
test_cast.c:fd_fltbits_pack	0
test_cast.c:fd_fltbits_sign	0
test_cast.c:fd_fltbits_unbias	0
test_execrp_tile.c:fd_dblbits	0
test_execrp_tile.c:fd_dblbits_bexp	0
test_execrp_tile.c:fd_dblbits_bias	0
test_execrp_tile.c:fd_dblbits_is_denorm	0
test_execrp_tile.c:fd_dblbits_is_inf	0
test_execrp_tile.c:fd_dblbits_is_nan	0
test_execrp_tile.c:fd_dblbits_is_normal	0
test_execrp_tile.c:fd_dblbits_is_zero	0
test_execrp_tile.c:fd_dblbits_mant	0
test_execrp_tile.c:fd_dblbits_pack	0
test_execrp_tile.c:fd_dblbits_sign	0
test_execrp_tile.c:fd_dblbits_unbias	0
test_execrp_tile.c:fd_double	0
test_execrp_tile.c:fd_float	0
test_execrp_tile.c:fd_fltbits	0
test_execrp_tile.c:fd_fltbits_bexp	0
test_execrp_tile.c:fd_fltbits_bias	0
test_execrp_tile.c:fd_fltbits_is_denorm	0
test_execrp_tile.c:fd_fltbits_is_inf	0
test_execrp_tile.c:fd_fltbits_is_nan	0
test_execrp_tile.c:fd_fltbits_is_normal	0
test_execrp_tile.c:fd_fltbits_is_zero	0
test_execrp_tile.c:fd_fltbits_mant	0
test_execrp_tile.c:fd_fltbits_pack	0
test_execrp_tile.c:fd_fltbits_sign	0
test_execrp_tile.c:fd_fltbits_unbias	0
test_float.c:fd_dblbits	0
test_float.c:fd_dblbits_bexp	0
test_float.c:fd_dblbits_bias	0
test_float.c:fd_dblbits_is_denorm	0
test_float.c:fd_dblbits_is_inf	0
test_float.c:fd_dblbits_is_nan	0
test_float.c:fd_dblbits_is_normal	0
test_float.c:fd_dblbits_is_zero	0
test_float.c:fd_dblbits_mant	0
test_float.c:fd_dblbits_pack	0
test_float.c:fd_dblbits_sign	0
test_float.c:fd_dblbits_unbias	0
test_float.c:fd_double	0
test_float.c:fd_float	0
test_float.c:fd_fltbits	0
test_float.c:fd_fltbits_bexp	0
test_float.c:fd_fltbits_bias	0
test_float.c:fd_fltbits_is_denorm	0
test_float.c:fd_fltbits_is_inf	0
test_float.c:fd_fltbits_is_nan	0
test_float.c:fd_fltbits_is_normal	0
test_float.c:fd_fltbits_is_zero	0
test_float.c:fd_fltbits_mant	0
test_float.c:fd_fltbits_pack	0
test_float.c:fd_fltbits_sign	0
test_float.c:fd_fltbits_unbias	0
test_gui_printf.c:fd_dblbits	0
test_gui_printf.c:fd_dblbits_bexp	0
test_gui_printf.c:fd_dblbits_bias	0
test_gui_printf.c:fd_dblbits_is_denorm	0
test_gui_printf.c:fd_dblbits_is_inf	0
test_gui_printf.c:fd_dblbits_is_nan	0
test_gui_printf.c:fd_dblbits_is_normal	0
test_gui_printf.c:fd_dblbits_is_zero	0
test_gui_printf.c:fd_dblbits_mant	0
test_gui_printf.c:fd_dblbits_pack	0
test_gui_printf.c:fd_dblbits_sign	0
test_gui_printf.c:fd_dblbits_unbias	0
test_gui_printf.c:fd_double	0
test_gui_printf.c:fd_float	0
test_gui_printf.c:fd_fltbits	0
test_gui_printf.c:fd_fltbits_bexp	0
test_gui_printf.c:fd_fltbits_bias	0
test_gui_printf.c:fd_fltbits_is_denorm	0
test_gui_printf.c:fd_fltbits_is_inf	0
test_gui_printf.c:fd_fltbits_is_nan	0
test_gui_printf.c:fd_fltbits_is_normal	0
test_gui_printf.c:fd_fltbits_is_zero	0
test_gui_printf.c:fd_fltbits_mant	0
test_gui_printf.c:fd_fltbits_pack	0
test_gui_printf.c:fd_fltbits_sign	0
test_gui_printf.c:fd_fltbits_unbias	0
test_inflation_rate.c:fd_dblbits	0
test_inflation_rate.c:fd_dblbits_bexp	0
test_inflation_rate.c:fd_dblbits_bias	0
test_inflation_rate.c:fd_dblbits_is_denorm	0
test_inflation_rate.c:fd_dblbits_is_inf	0
test_inflation_rate.c:fd_dblbits_is_nan	0
test_inflation_rate.c:fd_dblbits_is_normal	0
test_inflation_rate.c:fd_dblbits_is_zero	0
test_inflation_rate.c:fd_dblbits_mant	0
test_inflation_rate.c:fd_dblbits_pack	0
test_inflation_rate.c:fd_dblbits_sign	0
test_inflation_rate.c:fd_dblbits_unbias	0
test_inflation_rate.c:fd_double	0
test_inflation_rate.c:fd_float	0
test_inflation_rate.c:fd_fltbits	0
test_inflation_rate.c:fd_fltbits_bexp	0
test_inflation_rate.c:fd_fltbits_bias	0
test_inflation_rate.c:fd_fltbits_is_denorm	0
test_inflation_rate.c:fd_fltbits_is_inf	0
test_inflation_rate.c:fd_fltbits_is_nan	0
test_inflation_rate.c:fd_fltbits_is_normal	0
test_inflation_rate.c:fd_fltbits_is_zero	0
test_inflation_rate.c:fd_fltbits_mant	0
test_inflation_rate.c:fd_fltbits_pack	0
test_inflation_rate.c:fd_fltbits_sign	0
test_inflation_rate.c:fd_fltbits_unbias	0
test_replay_tile.c:fd_dblbits	0
test_replay_tile.c:fd_dblbits_bexp	0
test_replay_tile.c:fd_dblbits_bias	0
test_replay_tile.c:fd_dblbits_is_denorm	0
test_replay_tile.c:fd_dblbits_is_inf	0
test_replay_tile.c:fd_dblbits_is_nan	0
test_replay_tile.c:fd_dblbits_is_normal	0
test_replay_tile.c:fd_dblbits_is_zero	0
test_replay_tile.c:fd_dblbits_mant	0
test_replay_tile.c:fd_dblbits_pack	0
test_replay_tile.c:fd_dblbits_sign	0
test_replay_tile.c:fd_dblbits_unbias	0
test_replay_tile.c:fd_double	0
test_replay_tile.c:fd_float	0
test_replay_tile.c:fd_fltbits	0
test_replay_tile.c:fd_fltbits_bexp	0
test_replay_tile.c:fd_fltbits_bias	0
test_replay_tile.c:fd_fltbits_is_denorm	0
test_replay_tile.c:fd_fltbits_is_inf	0
test_replay_tile.c:fd_fltbits_is_nan	0
test_replay_tile.c:fd_fltbits_is_normal	0
test_replay_tile.c:fd_fltbits_is_zero	0
test_replay_tile.c:fd_fltbits_mant	0
test_replay_tile.c:fd_fltbits_pack	0
test_replay_tile.c:fd_fltbits_sign	0
test_replay_tile.c:fd_fltbits_unbias	0
test_rust_float.c:fd_dblbits	0
test_rust_float.c:fd_dblbits_bexp	0
test_rust_float.c:fd_dblbits_bias	0
test_rust_float.c:fd_dblbits_is_denorm	0
test_rust_float.c:fd_dblbits_is_inf	0
test_rust_float.c:fd_dblbits_is_nan	0
test_rust_float.c:fd_dblbits_is_normal	0
test_rust_float.c:fd_dblbits_is_zero	0
test_rust_float.c:fd_dblbits_mant	0
test_rust_float.c:fd_dblbits_pack	0
test_rust_float.c:fd_dblbits_sign	0
test_rust_float.c:fd_dblbits_unbias	0
test_rust_float.c:fd_double	0
test_rust_float.c:fd_float	0
test_rust_float.c:fd_fltbits	0
test_rust_float.c:fd_fltbits_bexp	0
test_rust_float.c:fd_fltbits_bias	0
test_rust_float.c:fd_fltbits_is_denorm	0
test_rust_float.c:fd_fltbits_is_inf	0
test_rust_float.c:fd_fltbits_is_nan	0
test_rust_float.c:fd_fltbits_is_normal	0
test_rust_float.c:fd_fltbits_is_zero	0
test_rust_float.c:fd_fltbits_mant	0
test_rust_float.c:fd_fltbits_pack	0
test_rust_float.c:fd_fltbits_sign	0
test_rust_float.c:fd_fltbits_unbias	0
test_snapin_accdb.c:fd_dblbits	0
test_snapin_accdb.c:fd_dblbits_bexp	0
test_snapin_accdb.c:fd_dblbits_bias	0
test_snapin_accdb.c:fd_dblbits_is_denorm	0
test_snapin_accdb.c:fd_dblbits_is_inf	0
test_snapin_accdb.c:fd_dblbits_is_nan	0
test_snapin_accdb.c:fd_dblbits_is_normal	0
test_snapin_accdb.c:fd_dblbits_is_zero	0
test_snapin_accdb.c:fd_dblbits_mant	0
test_snapin_accdb.c:fd_dblbits_pack	0
test_snapin_accdb.c:fd_dblbits_sign	0
test_snapin_accdb.c:fd_dblbits_unbias	0
test_snapin_accdb.c:fd_double	0
test_snapin_accdb.c:fd_float	0
test_snapin_accdb.c:fd_fltbits	0
test_snapin_accdb.c:fd_fltbits_bexp	0
test_snapin_accdb.c:fd_fltbits_bias	0
test_snapin_accdb.c:fd_fltbits_is_denorm	0
test_snapin_accdb.c:fd_fltbits_is_inf	0
test_snapin_accdb.c:fd_fltbits_is_nan	0
test_snapin_accdb.c:fd_fltbits_is_normal	0
test_snapin_accdb.c:fd_fltbits_is_zero	0
test_snapin_accdb.c:fd_fltbits_mant	0
test_snapin_accdb.c:fd_fltbits_pack	0
test_snapin_accdb.c:fd_fltbits_sign	0
test_snapin_accdb.c:fd_fltbits_unbias	0
test_snapin_tile.c:fd_dblbits	0
test_snapin_tile.c:fd_dblbits_bexp	0
test_snapin_tile.c:fd_dblbits_bias	0
test_snapin_tile.c:fd_dblbits_is_denorm	0
test_snapin_tile.c:fd_dblbits_is_inf	0
test_snapin_tile.c:fd_dblbits_is_nan	0
test_snapin_tile.c:fd_dblbits_is_normal	0
test_snapin_tile.c:fd_dblbits_is_zero	0
test_snapin_tile.c:fd_dblbits_mant	0
test_snapin_tile.c:fd_dblbits_pack	0
test_snapin_tile.c:fd_dblbits_sign	0
test_snapin_tile.c:fd_dblbits_unbias	0
test_snapin_tile.c:fd_double	0
test_snapin_tile.c:fd_float	0
test_snapin_tile.c:fd_fltbits	0
test_snapin_tile.c:fd_fltbits_bexp	0
test_snapin_tile.c:fd_fltbits_bias	0
test_snapin_tile.c:fd_fltbits_is_denorm	0
test_snapin_tile.c:fd_fltbits_is_inf	0
test_snapin_tile.c:fd_fltbits_is_nan	0
test_snapin_tile.c:fd_fltbits_is_normal	0
test_snapin_tile.c:fd_fltbits_is_zero	0
test_snapin_tile.c:fd_fltbits_mant	0
test_snapin_tile.c:fd_fltbits_pack	0
test_snapin_tile.c:fd_fltbits_sign	0
test_snapin_tile.c:fd_fltbits_unbias	0
test_stake_delegations.c:fd_dblbits	0
test_stake_delegations.c:fd_dblbits_bexp	0
test_stake_delegations.c:fd_dblbits_bias	0
test_stake_delegations.c:fd_dblbits_is_denorm	0
test_stake_delegations.c:fd_dblbits_is_inf	0
test_stake_delegations.c:fd_dblbits_is_nan	0
test_stake_delegations.c:fd_dblbits_is_normal	0
test_stake_delegations.c:fd_dblbits_is_zero	0
test_stake_delegations.c:fd_dblbits_mant	0
test_stake_delegations.c:fd_dblbits_pack	0
test_stake_delegations.c:fd_dblbits_sign	0
test_stake_delegations.c:fd_dblbits_unbias	0
test_stake_delegations.c:fd_double	0
test_stake_delegations.c:fd_float	0
test_stake_delegations.c:fd_fltbits	0
test_stake_delegations.c:fd_fltbits_bexp	0
test_stake_delegations.c:fd_fltbits_bias	0
test_stake_delegations.c:fd_fltbits_is_denorm	0
test_stake_delegations.c:fd_fltbits_is_inf	0
test_stake_delegations.c:fd_fltbits_is_nan	0
test_stake_delegations.c:fd_fltbits_is_normal	0
test_stake_delegations.c:fd_fltbits_is_zero	0
test_stake_delegations.c:fd_fltbits_mant	0
test_stake_delegations.c:fd_fltbits_pack	0
test_stake_delegations.c:fd_fltbits_sign	0
test_stake_delegations.c:fd_fltbits_unbias	0
test_warmup_cooldown_allowance.c:fd_dblbits	0
test_warmup_cooldown_allowance.c:fd_dblbits_bexp	0
test_warmup_cooldown_allowance.c:fd_dblbits_bias	0
test_warmup_cooldown_allowance.c:fd_dblbits_is_denorm	0
test_warmup_cooldown_allowance.c:fd_dblbits_is_inf	0
test_warmup_cooldown_allowance.c:fd_dblbits_is_nan	0
test_warmup_cooldown_allowance.c:fd_dblbits_is_normal	0
test_warmup_cooldown_allowance.c:fd_dblbits_is_zero	0
test_warmup_cooldown_allowance.c:fd_dblbits_mant	0
test_warmup_cooldown_allowance.c:fd_dblbits_pack	0
test_warmup_cooldown_allowance.c:fd_dblbits_sign	0
test_warmup_cooldown_allowance.c:fd_dblbits_unbias	0
test_warmup_cooldown_allowance.c:fd_double	0
test_warmup_cooldown_allowance.c:fd_float	0
test_warmup_cooldown_allowance.c:fd_fltbits	0
test_warmup_cooldown_allowance.c:fd_fltbits_bexp	0
test_warmup_cooldown_allowance.c:fd_fltbits_bias	0
test_warmup_cooldown_allowance.c:fd_fltbits_is_denorm	0
test_warmup_cooldown_allowance.c:fd_fltbits_is_inf	0
test_warmup_cooldown_allowance.c:fd_fltbits_is_nan	0
test_warmup_cooldown_allowance.c:fd_fltbits_is_normal	0
test_warmup_cooldown_allowance.c:fd_fltbits_is_zero	0
test_warmup_cooldown_allowance.c:fd_fltbits_mant	0
test_warmup_cooldown_allowance.c:fd_fltbits_pack	0
test_warmup_cooldown_allowance.c:fd_fltbits_sign	0
test_warmup_cooldown_allowance.c:fd_fltbits_unbias	0
fd_rewards.c:fd_dblbits	1
fd_rewards.c:fd_dblbits_mant	1
fd_rewards.c:fd_dblbits_sign	1
fd_rewards.c:fd_dblbits_bexp	2
fd_stakes.c:fd_dblbits_mant	7261
fd_stakes.c:fd_dblbits	7269
fd_stakes.c:fd_dblbits_sign	7270
fd_sysvar_rent1.c:fd_dblbits_mant	7748
fd_sysvar_rent1.c:fd_dblbits_sign	7755
fd_stakes.c:fd_dblbits_bexp	14530
fd_sysvar_rent1.c:fd_dblbits_bexp	15508
fd_sysvar_rent1.c:fd_dblbits	23681

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