LCOV - code coverage report

Current view: top level - util/simd - fd_sse_vd.h (source / functions) Hit Total Coverage Test: cov.lcov Lines: 0 80 0.0 % Date: 2026-03-19 18:19:27 Functions: 0 120 0.0 %

Function Name	Hit count
fd_aes_gcm_x86.c:vd_extract	0
fd_aes_gcm_x86.c:vd_extract_variable	0
fd_aes_gcm_x86.c:vd_insert	0
fd_aes_gcm_x86.c:vd_insert_variable	0
fd_aes_gcm_x86.c:vd_max_all	0
fd_aes_gcm_x86.c:vd_min_all	0
fd_aes_gcm_x86.c:vd_sum_all	0
fd_aes_gcm_x86.c:vd_to_vf	0
fd_aes_gcm_x86.c:vd_to_vi_fast	0
fd_aes_gcm_x86.c:vd_to_vl	0
fd_aes_gcm_x86.c:vd_to_vu_fast	0
fd_aes_gcm_x86.c:vd_to_vv	0
fd_blake3_sse41.c:vd_extract	0
fd_blake3_sse41.c:vd_extract_variable	0
fd_blake3_sse41.c:vd_insert	0
fd_blake3_sse41.c:vd_insert_variable	0
fd_blake3_sse41.c:vd_max_all	0
fd_blake3_sse41.c:vd_min_all	0
fd_blake3_sse41.c:vd_sum_all	0
fd_blake3_sse41.c:vd_to_vf	0
fd_blake3_sse41.c:vd_to_vi_fast	0
fd_blake3_sse41.c:vd_to_vl	0
fd_blake3_sse41.c:vd_to_vu_fast	0
fd_blake3_sse41.c:vd_to_vv	0
fd_chacha_sse.c:vd_extract	0
fd_chacha_sse.c:vd_extract_variable	0
fd_chacha_sse.c:vd_insert	0
fd_chacha_sse.c:vd_insert_variable	0
fd_chacha_sse.c:vd_max_all	0
fd_chacha_sse.c:vd_min_all	0
fd_chacha_sse.c:vd_sum_all	0
fd_chacha_sse.c:vd_to_vf	0
fd_chacha_sse.c:vd_to_vi_fast	0
fd_chacha_sse.c:vd_to_vl	0
fd_chacha_sse.c:vd_to_vu_fast	0
fd_chacha_sse.c:vd_to_vv	0
fd_dbl_buf.c:vd_extract	0
fd_dbl_buf.c:vd_extract_variable	0
fd_dbl_buf.c:vd_insert	0
fd_dbl_buf.c:vd_insert_variable	0
fd_dbl_buf.c:vd_max_all	0
fd_dbl_buf.c:vd_min_all	0
fd_dbl_buf.c:vd_sum_all	0
fd_dbl_buf.c:vd_to_vf	0
fd_dbl_buf.c:vd_to_vi_fast	0
fd_dbl_buf.c:vd_to_vl	0
fd_dbl_buf.c:vd_to_vu_fast	0
fd_dbl_buf.c:vd_to_vv	0
fd_reedsol_pi.c:vd_extract	0
fd_reedsol_pi.c:vd_extract_variable	0
fd_reedsol_pi.c:vd_insert	0
fd_reedsol_pi.c:vd_insert_variable	0
fd_reedsol_pi.c:vd_max_all	0
fd_reedsol_pi.c:vd_min_all	0
fd_reedsol_pi.c:vd_sum_all	0
fd_reedsol_pi.c:vd_to_vf	0
fd_reedsol_pi.c:vd_to_vi_fast	0
fd_reedsol_pi.c:vd_to_vl	0
fd_reedsol_pi.c:vd_to_vu_fast	0
fd_reedsol_pi.c:vd_to_vv	0
fd_sha256.c:vd_extract	0
fd_sha256.c:vd_extract_variable	0
fd_sha256.c:vd_insert	0
fd_sha256.c:vd_insert_variable	0
fd_sha256.c:vd_max_all	0
fd_sha256.c:vd_min_all	0
fd_sha256.c:vd_sum_all	0
fd_sha256.c:vd_to_vf	0
fd_sha256.c:vd_to_vi_fast	0
fd_sha256.c:vd_to_vl	0
fd_sha256.c:vd_to_vu_fast	0
fd_sha256.c:vd_to_vv	0
test_sse_16x8.c:vd_extract	0
test_sse_16x8.c:vd_extract_variable	0
test_sse_16x8.c:vd_insert	0
test_sse_16x8.c:vd_insert_variable	0
test_sse_16x8.c:vd_max_all	0
test_sse_16x8.c:vd_min_all	0
test_sse_16x8.c:vd_sum_all	0
test_sse_16x8.c:vd_to_vf	0
test_sse_16x8.c:vd_to_vi_fast	0
test_sse_16x8.c:vd_to_vl	0
test_sse_16x8.c:vd_to_vu_fast	0
test_sse_16x8.c:vd_to_vv	0
test_sse_2x64.c:vd_extract	0
test_sse_2x64.c:vd_extract_variable	0
test_sse_2x64.c:vd_insert	0
test_sse_2x64.c:vd_insert_variable	0
test_sse_2x64.c:vd_max_all	0
test_sse_2x64.c:vd_min_all	0
test_sse_2x64.c:vd_sum_all	0
test_sse_2x64.c:vd_to_vf	0
test_sse_2x64.c:vd_to_vi_fast	0
test_sse_2x64.c:vd_to_vl	0
test_sse_2x64.c:vd_to_vu_fast	0
test_sse_2x64.c:vd_to_vv	0
test_sse_4x32.c:vd_extract	0
test_sse_4x32.c:vd_extract_variable	0
test_sse_4x32.c:vd_insert	0
test_sse_4x32.c:vd_insert_variable	0
test_sse_4x32.c:vd_max_all	0
test_sse_4x32.c:vd_min_all	0
test_sse_4x32.c:vd_sum_all	0
test_sse_4x32.c:vd_to_vf	0
test_sse_4x32.c:vd_to_vi_fast	0
test_sse_4x32.c:vd_to_vl	0
test_sse_4x32.c:vd_to_vu_fast	0
test_sse_4x32.c:vd_to_vv	0
test_sse_common.c:vd_extract	0
test_sse_common.c:vd_extract_variable	0
test_sse_common.c:vd_insert	0
test_sse_common.c:vd_insert_variable	0
test_sse_common.c:vd_max_all	0
test_sse_common.c:vd_min_all	0
test_sse_common.c:vd_sum_all	0
test_sse_common.c:vd_to_vf	0
test_sse_common.c:vd_to_vi_fast	0
test_sse_common.c:vd_to_vl	0
test_sse_common.c:vd_to_vu_fast	0
test_sse_common.c:vd_to_vv	0

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