/src/mbedtls/library/aesni.c

Source (jump to first uncovered line)
/*
 *  AES-NI support functions
 *
 *  Copyright The Mbed TLS Contributors
 *  SPDX-License-Identifier: Apache-2.0
 *
 *  Licensed under the Apache License, Version 2.0 (the "License"); you may
 *  not use this file except in compliance with the License.
 *  You may obtain a copy of the License at
 *
 *  http://www.apache.org/licenses/LICENSE-2.0
 *
 *  Unless required by applicable law or agreed to in writing, software
 *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
 *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 *  See the License for the specific language governing permissions and
 *  limitations under the License.
 */

/*
 * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
 * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
 */

#include "common.h"

#if defined(MBEDTLS_AESNI_C)

#if defined(__has_feature)
#if __has_feature(memory_sanitizer)
#warning \
    "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
#endif
#endif

#include "aesni.h"

#include <string.h>

#if defined(MBEDTLS_HAVE_X86_64)

/*
 * AES-NI support detection routine
 */
int mbedtls_aesni_has_support(unsigned int what)
{
    static int done = 0;
    static unsigned int c = 0;

    if (!done) {
        asm ("movl  $1, %%eax   \n\t"
             "cpuid             \n\t"
             : "=c" (c)
             :
             : "eax", "ebx", "edx");
        done = 1;
    }

    return (c & what) != 0;
}

/*
 * Binutils needs to be at least 2.19 to support AES-NI instructions.
 * Unfortunately, a lot of users have a lower version now (2014-04).
 * Emit bytecode directly in order to support "old" version of gas.
 *
 * Opcodes from the Intel architecture reference manual, vol. 3.
 * We always use registers, so we don't need prefixes for memory operands.
 * Operand macros are in gas order (src, dst) as opposed to Intel order
 * (dst, src) in order to blend better into the surrounding assembly code.
 */
#define AESDEC      ".byte 0x66,0x0F,0x38,0xDE,"
#define AESDECLAST  ".byte 0x66,0x0F,0x38,0xDF,"
#define AESENC      ".byte 0x66,0x0F,0x38,0xDC,"
#define AESENCLAST  ".byte 0x66,0x0F,0x38,0xDD,"
#define AESIMC      ".byte 0x66,0x0F,0x38,0xDB,"
#define AESKEYGENA  ".byte 0x66,0x0F,0x3A,0xDF,"
#define PCLMULQDQ   ".byte 0x66,0x0F,0x3A,0x44,"

#define xmm0_xmm0   "0xC0"
#define xmm0_xmm1   "0xC8"
#define xmm0_xmm2   "0xD0"
#define xmm0_xmm3   "0xD8"
#define xmm0_xmm4   "0xE0"
#define xmm1_xmm0   "0xC1"
#define xmm1_xmm2   "0xD1"

/*
 * AES-NI AES-ECB block en(de)cryption
 */
int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
                            int mode,
                            const unsigned char input[16],
                            unsigned char output[16])
{
    asm ("movdqu    (%3), %%xmm0    \n\t" // load input
         "movdqu    (%1), %%xmm1    \n\t" // load round key 0
         "pxor      %%xmm1, %%xmm0  \n\t" // round 0
         "add       $16, %1         \n\t" // point to next round key
         "subl      $1, %0          \n\t" // normal rounds = nr - 1
         "test      %2, %2          \n\t" // mode?
         "jz        2f              \n\t" // 0 = decrypt

         "1:                        \n\t" // encryption loop
         "movdqu    (%1), %%xmm1    \n\t" // load round key
         AESENC     xmm1_xmm0      "\n\t" // do round
                                   "add       $16, %1         \n\t" // point to next round key
                                   "subl      $1, %0          \n\t" // loop
                                   "jnz       1b              \n\t"
                                   "movdqu    (%1), %%xmm1    \n\t" // load round key
         AESENCLAST xmm1_xmm0      "\n\t" // last round
                                   "jmp       3f              \n\t"

                                   "2:                        \n\t" // decryption loop
                                   "movdqu    (%1), %%xmm1    \n\t"
         AESDEC     xmm1_xmm0      "\n\t" // do round
                                   "add       $16, %1         \n\t"
                                   "subl      $1, %0          \n\t"
                                   "jnz       2b              \n\t"
                                   "movdqu    (%1), %%xmm1    \n\t" // load round key
         AESDECLAST xmm1_xmm0      "\n\t" // last round

                                   "3:                        \n\t"
                                   "movdqu    %%xmm0, (%4)    \n\t" // export output
         :
         : "r" (ctx->nr), "r" (ctx->buf + ctx->rk_offset), "r" (mode), "r" (input), "r" (output)
         : "memory", "cc", "xmm0", "xmm1");


    return 0;
}

/*
 * GCM multiplication: c = a times b in GF(2^128)
 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
 */
void mbedtls_aesni_gcm_mult(unsigned char c[16],
                            const unsigned char a[16],
                            const unsigned char b[16])
{
    unsigned char aa[16], bb[16], cc[16];
    size_t i;

    /* The inputs are in big-endian order, so byte-reverse them */
    for (i = 0; i < 16; i++) {
        aa[i] = a[15 - i];
        bb[i] = b[15 - i];
    }

    asm ("movdqu (%0), %%xmm0               \n\t" // a1:a0
         "movdqu (%1), %%xmm1               \n\t" // b1:b0

         /*
          * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
          * using [CLMUL-WP] algorithm 1 (p. 13).
          */
         "movdqa %%xmm1, %%xmm2             \n\t" // copy of b1:b0
         "movdqa %%xmm1, %%xmm3             \n\t" // same
         "movdqa %%xmm1, %%xmm4             \n\t" // same
         PCLMULQDQ xmm0_xmm1 ",0x00         \n\t" // a0*b0 = c1:c0
         PCLMULQDQ xmm0_xmm2 ",0x11         \n\t" // a1*b1 = d1:d0
         PCLMULQDQ xmm0_xmm3 ",0x10         \n\t" // a0*b1 = e1:e0
         PCLMULQDQ xmm0_xmm4 ",0x01         \n\t" // a1*b0 = f1:f0
                             "pxor %%xmm3, %%xmm4               \n\t" // e1+f1:e0+f0
                             "movdqa %%xmm4, %%xmm3             \n\t" // same
                             "psrldq $8, %%xmm4                 \n\t" // 0:e1+f1
                             "pslldq $8, %%xmm3                 \n\t" // e0+f0:0
                             "pxor %%xmm4, %%xmm2               \n\t" // d1:d0+e1+f1
                             "pxor %%xmm3, %%xmm1               \n\t" // c1+e0+f1:c0

         /*
          * Now shift the result one bit to the left,
          * taking advantage of [CLMUL-WP] eq 27 (p. 20)
          */
                             "movdqa %%xmm1, %%xmm3             \n\t" // r1:r0
                             "movdqa %%xmm2, %%xmm4             \n\t" // r3:r2
                             "psllq $1, %%xmm1                  \n\t" // r1<<1:r0<<1
                             "psllq $1, %%xmm2                  \n\t" // r3<<1:r2<<1
                             "psrlq $63, %%xmm3                 \n\t" // r1>>63:r0>>63
                             "psrlq $63, %%xmm4                 \n\t" // r3>>63:r2>>63
                             "movdqa %%xmm3, %%xmm5             \n\t" // r1>>63:r0>>63
                             "pslldq $8, %%xmm3                 \n\t" // r0>>63:0
                             "pslldq $8, %%xmm4                 \n\t" // r2>>63:0
                             "psrldq $8, %%xmm5                 \n\t" // 0:r1>>63
                             "por %%xmm3, %%xmm1                \n\t" // r1<<1|r0>>63:r0<<1
                             "por %%xmm4, %%xmm2                \n\t" // r3<<1|r2>>62:r2<<1
                             "por %%xmm5, %%xmm2                \n\t" // r3<<1|r2>>62:r2<<1|r1>>63

         /*
          * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
          * using [CLMUL-WP] algorithm 5 (p. 20).
          * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
          */
         /* Step 2 (1) */
                             "movdqa %%xmm1, %%xmm3             \n\t" // x1:x0
                             "movdqa %%xmm1, %%xmm4             \n\t" // same
                             "movdqa %%xmm1, %%xmm5             \n\t" // same
                             "psllq $63, %%xmm3                 \n\t" // x1<<63:x0<<63 = stuff:a
                             "psllq $62, %%xmm4                 \n\t" // x1<<62:x0<<62 = stuff:b
                             "psllq $57, %%xmm5                 \n\t" // x1<<57:x0<<57 = stuff:c

         /* Step 2 (2) */
                             "pxor %%xmm4, %%xmm3               \n\t" // stuff:a+b
                             "pxor %%xmm5, %%xmm3               \n\t" // stuff:a+b+c
                             "pslldq $8, %%xmm3                 \n\t" // a+b+c:0
                             "pxor %%xmm3, %%xmm1               \n\t" // x1+a+b+c:x0 = d:x0

         /* Steps 3 and 4 */
                             "movdqa %%xmm1,%%xmm0              \n\t" // d:x0
                             "movdqa %%xmm1,%%xmm4              \n\t" // same
                             "movdqa %%xmm1,%%xmm5              \n\t" // same
                             "psrlq $1, %%xmm0                  \n\t" // e1:x0>>1 = e1:e0'
                             "psrlq $2, %%xmm4                  \n\t" // f1:x0>>2 = f1:f0'
                             "psrlq $7, %%xmm5                  \n\t" // g1:x0>>7 = g1:g0'
                             "pxor %%xmm4, %%xmm0               \n\t" // e1+f1:e0'+f0'
                             "pxor %%xmm5, %%xmm0               \n\t" // e1+f1+g1:e0'+f0'+g0'
         // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
         // bits carried from d. Now get those\t bits back in.
                             "movdqa %%xmm1,%%xmm3              \n\t" // d:x0
                             "movdqa %%xmm1,%%xmm4              \n\t" // same
                             "movdqa %%xmm1,%%xmm5              \n\t" // same
                             "psllq $63, %%xmm3                 \n\t" // d<<63:stuff
                             "psllq $62, %%xmm4                 \n\t" // d<<62:stuff
                             "psllq $57, %%xmm5                 \n\t" // d<<57:stuff
                             "pxor %%xmm4, %%xmm3               \n\t" // d<<63+d<<62:stuff
                             "pxor %%xmm5, %%xmm3               \n\t" // missing bits of d:stuff
                             "psrldq $8, %%xmm3                 \n\t" // 0:missing bits of d
                             "pxor %%xmm3, %%xmm0               \n\t" // e1+f1+g1:e0+f0+g0
                             "pxor %%xmm1, %%xmm0               \n\t" // h1:h0
                             "pxor %%xmm2, %%xmm0               \n\t" // x3+h1:x2+h0

                             "movdqu %%xmm0, (%2)               \n\t" // done
         :
         : "r" (aa), "r" (bb), "r" (cc)
         : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5");

    /* Now byte-reverse the outputs */
    for (i = 0; i < 16; i++) {
        c[i] = cc[15 - i];
    }

    return;
}

/*
 * Compute decryption round keys from encryption round keys
 */
void mbedtls_aesni_inverse_key(unsigned char *invkey,
                               const unsigned char *fwdkey, int nr)
{
    unsigned char *ik = invkey;
    const unsigned char *fk = fwdkey + 16 * nr;

    memcpy(ik, fk, 16);

    for (fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16) {
        asm ("movdqu (%0), %%xmm0       \n\t"
             AESIMC  xmm0_xmm0         "\n\t"
                                       "movdqu %%xmm0, (%1)       \n\t"
             :
             : "r" (fk), "r" (ik)
             : "memory", "xmm0");
    }

    memcpy(ik, fk, 16);
}

/*
 * Key expansion, 128-bit case
 */
static void aesni_setkey_enc_128(unsigned char *rk,
                                 const unsigned char *key)
{
    asm ("movdqu (%1), %%xmm0               \n\t" // copy the original key
         "movdqu %%xmm0, (%0)               \n\t" // as round key 0
         "jmp 2f                            \n\t" // skip auxiliary routine

         /*
          * Finish generating the next round key.
          *
          * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
          * with X = rot( sub( r3 ) ) ^ RCON.
          *
          * On exit, xmm0 is r7:r6:r5:r4
          * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
          * and those are written to the round key buffer.
          */
         "1:                                \n\t"
         "pshufd $0xff, %%xmm1, %%xmm1      \n\t" // X:X:X:X
         "pxor %%xmm0, %%xmm1               \n\t" // X+r3:X+r2:X+r1:r4
         "pslldq $4, %%xmm0                 \n\t" // r2:r1:r0:0
         "pxor %%xmm0, %%xmm1               \n\t" // X+r3+r2:X+r2+r1:r5:r4
         "pslldq $4, %%xmm0                 \n\t" // etc
         "pxor %%xmm0, %%xmm1               \n\t"
         "pslldq $4, %%xmm0                 \n\t"
         "pxor %%xmm1, %%xmm0               \n\t" // update xmm0 for next time!
         "add $16, %0                       \n\t" // point to next round key
         "movdqu %%xmm0, (%0)               \n\t" // write it
         "ret                               \n\t"

         /* Main "loop" */
         "2:                                \n\t"
         AESKEYGENA xmm0_xmm1 ",0x01        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x02        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x04        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x08        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x10        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x20        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x40        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x80        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x1B        \n\tcall 1b \n\t"
         AESKEYGENA xmm0_xmm1 ",0x36        \n\tcall 1b \n\t"
         :
         : "r" (rk), "r" (key)
         : "memory", "cc", "0");
}

/*
 * Key expansion, 192-bit case
 */
static void aesni_setkey_enc_192(unsigned char *rk,
                                 const unsigned char *key)
{
    asm ("movdqu (%1), %%xmm0   \n\t" // copy original round key
         "movdqu %%xmm0, (%0)   \n\t"
         "add $16, %0           \n\t"
         "movq 16(%1), %%xmm1   \n\t"
         "movq %%xmm1, (%0)     \n\t"
         "add $8, %0            \n\t"
         "jmp 2f                \n\t" // skip auxiliary routine

         /*
          * Finish generating the next 6 quarter-keys.
          *
          * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
          * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
          *
          * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
          * and those are written to the round key buffer.
          */
         "1:                            \n\t"
         "pshufd $0x55, %%xmm2, %%xmm2  \n\t" // X:X:X:X
         "pxor %%xmm0, %%xmm2           \n\t" // X+r3:X+r2:X+r1:r4
         "pslldq $4, %%xmm0             \n\t" // etc
         "pxor %%xmm0, %%xmm2           \n\t"
         "pslldq $4, %%xmm0             \n\t"
         "pxor %%xmm0, %%xmm2           \n\t"
         "pslldq $4, %%xmm0             \n\t"
         "pxor %%xmm2, %%xmm0           \n\t" // update xmm0 = r9:r8:r7:r6
         "movdqu %%xmm0, (%0)           \n\t"
         "add $16, %0                   \n\t"
         "pshufd $0xff, %%xmm0, %%xmm2  \n\t" // r9:r9:r9:r9
         "pxor %%xmm1, %%xmm2           \n\t" // stuff:stuff:r9+r5:r10
         "pslldq $4, %%xmm1             \n\t" // r2:r1:r0:0
         "pxor %%xmm2, %%xmm1           \n\t" // xmm1 = stuff:stuff:r11:r10
         "movq %%xmm1, (%0)             \n\t"
         "add $8, %0                    \n\t"
         "ret                           \n\t"

         "2:                            \n\t"
         AESKEYGENA xmm1_xmm2 ",0x01    \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x02    \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x04    \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x08    \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x10    \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x20    \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x40    \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x80    \n\tcall 1b \n\t"

         :
         : "r" (rk), "r" (key)
         : "memory", "cc", "0");
}

/*
 * Key expansion, 256-bit case
 */
static void aesni_setkey_enc_256(unsigned char *rk,
                                 const unsigned char *key)
{
    asm ("movdqu (%1), %%xmm0           \n\t"
         "movdqu %%xmm0, (%0)           \n\t"
         "add $16, %0                   \n\t"
         "movdqu 16(%1), %%xmm1         \n\t"
         "movdqu %%xmm1, (%0)           \n\t"
         "jmp 2f                        \n\t" // skip auxiliary routine

         /*
          * Finish generating the next two round keys.
          *
          * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
          * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
          *
          * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
          * and those have been written to the output buffer.
          */
         "1:                                \n\t"
         "pshufd $0xff, %%xmm2, %%xmm2      \n\t"
         "pxor %%xmm0, %%xmm2               \n\t"
         "pslldq $4, %%xmm0                 \n\t"
         "pxor %%xmm0, %%xmm2               \n\t"
         "pslldq $4, %%xmm0                 \n\t"
         "pxor %%xmm0, %%xmm2               \n\t"
         "pslldq $4, %%xmm0                 \n\t"
         "pxor %%xmm2, %%xmm0               \n\t"
         "add $16, %0                       \n\t"
         "movdqu %%xmm0, (%0)               \n\t"

         /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
          * and proceed to generate next round key from there */
         AESKEYGENA xmm0_xmm2 ",0x00        \n\t"
                              "pshufd $0xaa, %%xmm2, %%xmm2      \n\t"
                              "pxor %%xmm1, %%xmm2               \n\t"
                              "pslldq $4, %%xmm1                 \n\t"
                              "pxor %%xmm1, %%xmm2               \n\t"
                              "pslldq $4, %%xmm1                 \n\t"
                              "pxor %%xmm1, %%xmm2               \n\t"
                              "pslldq $4, %%xmm1                 \n\t"
                              "pxor %%xmm2, %%xmm1               \n\t"
                              "add $16, %0                       \n\t"
                              "movdqu %%xmm1, (%0)               \n\t"
                              "ret                               \n\t"

         /*
          * Main "loop" - Generating one more key than necessary,
          * see definition of mbedtls_aes_context.buf
          */
                              "2:                                \n\t"
         AESKEYGENA xmm1_xmm2 ",0x01        \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x02        \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x04        \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x08        \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x10        \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x20        \n\tcall 1b \n\t"
         AESKEYGENA xmm1_xmm2 ",0x40        \n\tcall 1b \n\t"
         :
         : "r" (rk), "r" (key)
         : "memory", "cc", "0");
}

/*
 * Key expansion, wrapper
 */
int mbedtls_aesni_setkey_enc(unsigned char *rk,
                             const unsigned char *key,
                             size_t bits)
{
    switch (bits) {
        case 128: aesni_setkey_enc_128(rk, key); break;
        case 192: aesni_setkey_enc_192(rk, key); break;
        case 256: aesni_setkey_enc_256(rk, key); break;
        default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
    }

    return 0;
}

#endif /* MBEDTLS_HAVE_X86_64 */

#endif /* MBEDTLS_AESNI_C */

Coverage Report

Created: 2024-08-17 06:45

Line	Count	Source (jump to first uncovered line)
1		/*
2		* AES-NI support functions
3		*
4		* Copyright The Mbed TLS Contributors
5		* SPDX-License-Identifier: Apache-2.0
6		*
7		* Licensed under the Apache License, Version 2.0 (the "License"); you may
8		* not use this file except in compliance with the License.
9		* You may obtain a copy of the License at
10		*
11		* http://www.apache.org/licenses/LICENSE-2.0
12		*
13		* Unless required by applicable law or agreed to in writing, software
14		* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
15		* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16		* See the License for the specific language governing permissions and
17		* limitations under the License.
18		*/
19
20		/*
21		* [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
22		* [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
23		*/
24
25		#include "common.h"
26
27		#if defined(MBEDTLS_AESNI_C)
28
29		#if defined(__has_feature)
30		#if __has_feature(memory_sanitizer)
31		#warning \
32		"MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
33		#endif
34		#endif
35
36		#include "aesni.h"
37
38		#include <string.h>
39
40		#if defined(MBEDTLS_HAVE_X86_64)
41
42		/*
43		* AES-NI support detection routine
44		*/
45		int mbedtls_aesni_has_support(unsigned int what)
46	42.2k	{
47	42.2k	static int done = 0;
48	42.2k	static unsigned int c = 0;
49
50	42.2k	if (!done) {
51	6	asm ("movl $1, %%eax \n\t"
52	6	"cpuid \n\t"
53	6	: "=c" (c)
54	6	:
55	6	: "eax", "ebx", "edx");
56	6	done = 1;
57	6	}
58
59	42.2k	return (c & what) != 0;
60	42.2k	}
61
62		/*
63		* Binutils needs to be at least 2.19 to support AES-NI instructions.
64		* Unfortunately, a lot of users have a lower version now (2014-04).
65		* Emit bytecode directly in order to support "old" version of gas.
66		*
67		* Opcodes from the Intel architecture reference manual, vol. 3.
68		* We always use registers, so we don't need prefixes for memory operands.
69		* Operand macros are in gas order (src, dst) as opposed to Intel order
70		* (dst, src) in order to blend better into the surrounding assembly code.
71		*/
72		#define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
73		#define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
74		#define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
75		#define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
76		#define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
77		#define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
78		#define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
79
80		#define xmm0_xmm0 "0xC0"
81		#define xmm0_xmm1 "0xC8"
82		#define xmm0_xmm2 "0xD0"
83		#define xmm0_xmm3 "0xD8"
84		#define xmm0_xmm4 "0xE0"
85		#define xmm1_xmm0 "0xC1"
86		#define xmm1_xmm2 "0xD1"
87
88		/*
89		* AES-NI AES-ECB block en(de)cryption
90		*/
91		int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
92		int mode,
93		const unsigned char input[16],
94		unsigned char output[16])
95	36.0k	{
96	36.0k	asm ("movdqu (%3), %%xmm0 \n\t" // load input
97	36.0k	"movdqu (%1), %%xmm1 \n\t" // load round key 0
98	36.0k	"pxor %%xmm1, %%xmm0 \n\t" // round 0
99	36.0k	"add $16, %1 \n\t" // point to next round key
100	36.0k	"subl $1, %0 \n\t" // normal rounds = nr - 1
101	36.0k	"test %2, %2 \n\t" // mode?
102	36.0k	"jz 2f \n\t" // 0 = decrypt
103
104	36.0k	"1: \n\t" // encryption loop
105	36.0k	"movdqu (%1), %%xmm1 \n\t" // load round key
106	36.0k	AESENC xmm1_xmm0 "\n\t" // do round
107	36.0k	"add $16, %1 \n\t" // point to next round key
108	36.0k	"subl $1, %0 \n\t" // loop
109	36.0k	"jnz 1b \n\t"
110	36.0k	"movdqu (%1), %%xmm1 \n\t" // load round key
111	36.0k	AESENCLAST xmm1_xmm0 "\n\t" // last round
112	36.0k	"jmp 3f \n\t"
113
114	36.0k	"2: \n\t" // decryption loop
115	36.0k	"movdqu (%1), %%xmm1 \n\t"
116	36.0k	AESDEC xmm1_xmm0 "\n\t" // do round
117	36.0k	"add $16, %1 \n\t"
118	36.0k	"subl $1, %0 \n\t"
119	36.0k	"jnz 2b \n\t"
120	36.0k	"movdqu (%1), %%xmm1 \n\t" // load round key
121	36.0k	AESDECLAST xmm1_xmm0 "\n\t" // last round
122
123	36.0k	"3: \n\t"
124	36.0k	"movdqu %%xmm0, (%4) \n\t" // export output
125	36.0k	:
126	36.0k	: "r" (ctx->nr), "r" (ctx->buf + ctx->rk_offset), "r" (mode), "r" (input), "r" (output)
127	36.0k	: "memory", "cc", "xmm0", "xmm1");
128
129
130	36.0k	return 0;
131	36.0k	}
132
133		/*
134		* GCM multiplication: c = a times b in GF(2^128)
135		* Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
136		*/
137		void mbedtls_aesni_gcm_mult(unsigned char c[16],
138		const unsigned char a[16],
139		const unsigned char b[16])
140	0	{
141	0	unsigned char aa[16], bb[16], cc[16];
142	0	size_t i;
143
144		/* The inputs are in big-endian order, so byte-reverse them */
145	0	for (i = 0; i < 16; i++) {
146	0	aa[i] = a[15 - i];
147	0	bb[i] = b[15 - i];
148	0	}
149
150	0	asm ("movdqu (%0), %%xmm0 \n\t" // a1:a0
151	0	"movdqu (%1), %%xmm1 \n\t" // b1:b0
152
153		/*
154		* Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
155		* using [CLMUL-WP] algorithm 1 (p. 13).
156		*/
157	0	"movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
158	0	"movdqa %%xmm1, %%xmm3 \n\t" // same
159	0	"movdqa %%xmm1, %%xmm4 \n\t" // same
160	0	PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
161	0	PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
162	0	PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
163	0	PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
164	0	"pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
165	0	"movdqa %%xmm4, %%xmm3 \n\t" // same
166	0	"psrldq $8, %%xmm4 \n\t" // 0:e1+f1
167	0	"pslldq $8, %%xmm3 \n\t" // e0+f0:0
168	0	"pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
169	0	"pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
170
171		/*
172		* Now shift the result one bit to the left,
173		* taking advantage of [CLMUL-WP] eq 27 (p. 20)
174		*/
175	0	"movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
176	0	"movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
177	0	"psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
178	0	"psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
179	0	"psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
180	0	"psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
181	0	"movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
182	0	"pslldq $8, %%xmm3 \n\t" // r0>>63:0
183	0	"pslldq $8, %%xmm4 \n\t" // r2>>63:0
184	0	"psrldq $8, %%xmm5 \n\t" // 0:r1>>63
185	0	"por %%xmm3, %%xmm1 \n\t" // r1<<1\|r0>>63:r0<<1
186	0	"por %%xmm4, %%xmm2 \n\t" // r3<<1\|r2>>62:r2<<1
187	0	"por %%xmm5, %%xmm2 \n\t" // r3<<1\|r2>>62:r2<<1\|r1>>63
188
189		/*
190		* Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
191		* using [CLMUL-WP] algorithm 5 (p. 20).
192		* Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
193		*/
194		/* Step 2 (1) */
195	0	"movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
196	0	"movdqa %%xmm1, %%xmm4 \n\t" // same
197	0	"movdqa %%xmm1, %%xmm5 \n\t" // same
198	0	"psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
199	0	"psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
200	0	"psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
201
202		/* Step 2 (2) */
203	0	"pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
204	0	"pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
205	0	"pslldq $8, %%xmm3 \n\t" // a+b+c:0
206	0	"pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
207
208		/* Steps 3 and 4 */
209	0	"movdqa %%xmm1,%%xmm0 \n\t" // d:x0
210	0	"movdqa %%xmm1,%%xmm4 \n\t" // same
211	0	"movdqa %%xmm1,%%xmm5 \n\t" // same
212	0	"psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
213	0	"psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
214	0	"psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
215	0	"pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
216	0	"pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
217		// e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
218		// bits carried from d. Now get those\t bits back in.
219	0	"movdqa %%xmm1,%%xmm3 \n\t" // d:x0
220	0	"movdqa %%xmm1,%%xmm4 \n\t" // same
221	0	"movdqa %%xmm1,%%xmm5 \n\t" // same
222	0	"psllq $63, %%xmm3 \n\t" // d<<63:stuff
223	0	"psllq $62, %%xmm4 \n\t" // d<<62:stuff
224	0	"psllq $57, %%xmm5 \n\t" // d<<57:stuff
225	0	"pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
226	0	"pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
227	0	"psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
228	0	"pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
229	0	"pxor %%xmm1, %%xmm0 \n\t" // h1:h0
230	0	"pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
231
232	0	"movdqu %%xmm0, (%2) \n\t" // done
233	0	:
234	0	: "r" (aa), "r" (bb), "r" (cc)
235	0	: "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5");
236
237		/* Now byte-reverse the outputs */
238	0	for (i = 0; i < 16; i++) {
239	0	c[i] = cc[15 - i];
240	0	}
241
242	0	return;
243	0	}
244
245		/*
246		* Compute decryption round keys from encryption round keys
247		*/
248		void mbedtls_aesni_inverse_key(unsigned char *invkey,
249		const unsigned char *fwdkey, int nr)
250	0	{
251	0	unsigned char *ik = invkey;
252	0	const unsigned char fk = fwdkey + 16 nr;
253
254	0	memcpy(ik, fk, 16);
255
256	0	for (fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16) {
257	0	asm ("movdqu (%0), %%xmm0 \n\t"
258	0	AESIMC xmm0_xmm0 "\n\t"
259	0	"movdqu %%xmm0, (%1) \n\t"
260	0	:
261	0	: "r" (fk), "r" (ik)
262	0	: "memory", "xmm0");
263	0	}
264
265	0	memcpy(ik, fk, 16);
266	0	}
267
268		/*
269		* Key expansion, 128-bit case
270		*/
271		static void aesni_setkey_enc_128(unsigned char *rk,
272		const unsigned char *key)
273	0	{
274	0	asm ("movdqu (%1), %%xmm0 \n\t" // copy the original key
275	0	"movdqu %%xmm0, (%0) \n\t" // as round key 0
276	0	"jmp 2f \n\t" // skip auxiliary routine
277
278		/*
279		* Finish generating the next round key.
280		*
281		* On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
282		* with X = rot( sub( r3 ) ) ^ RCON.
283		*
284		* On exit, xmm0 is r7:r6:r5:r4
285		* with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
286		* and those are written to the round key buffer.
287		*/
288	0	"1: \n\t"
289	0	"pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
290	0	"pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
291	0	"pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
292	0	"pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
293	0	"pslldq $4, %%xmm0 \n\t" // etc
294	0	"pxor %%xmm0, %%xmm1 \n\t"
295	0	"pslldq $4, %%xmm0 \n\t"
296	0	"pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
297	0	"add $16, %0 \n\t" // point to next round key
298	0	"movdqu %%xmm0, (%0) \n\t" // write it
299	0	"ret \n\t"
300
301		/* Main "loop" */
302	0	"2: \n\t"
303	0	AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
304	0	AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
305	0	AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
306	0	AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
307	0	AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
308	0	AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
309	0	AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
310	0	AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
311	0	AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
312	0	AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
313	0	:
314	0	: "r" (rk), "r" (key)
315	0	: "memory", "cc", "0");
316	0	}
317
318		/*
319		* Key expansion, 192-bit case
320		*/
321		static void aesni_setkey_enc_192(unsigned char *rk,
322		const unsigned char *key)
323	0	{
324	0	asm ("movdqu (%1), %%xmm0 \n\t" // copy original round key
325	0	"movdqu %%xmm0, (%0) \n\t"
326	0	"add $16, %0 \n\t"
327	0	"movq 16(%1), %%xmm1 \n\t"
328	0	"movq %%xmm1, (%0) \n\t"
329	0	"add $8, %0 \n\t"
330	0	"jmp 2f \n\t" // skip auxiliary routine
331
332		/*
333		* Finish generating the next 6 quarter-keys.
334		*
335		* On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
336		* and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
337		*
338		* On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
339		* and those are written to the round key buffer.
340		*/
341	0	"1: \n\t"
342	0	"pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
343	0	"pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
344	0	"pslldq $4, %%xmm0 \n\t" // etc
345	0	"pxor %%xmm0, %%xmm2 \n\t"
346	0	"pslldq $4, %%xmm0 \n\t"
347	0	"pxor %%xmm0, %%xmm2 \n\t"
348	0	"pslldq $4, %%xmm0 \n\t"
349	0	"pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
350	0	"movdqu %%xmm0, (%0) \n\t"
351	0	"add $16, %0 \n\t"
352	0	"pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
353	0	"pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
354	0	"pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
355	0	"pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
356	0	"movq %%xmm1, (%0) \n\t"
357	0	"add $8, %0 \n\t"
358	0	"ret \n\t"
359
360	0	"2: \n\t"
361	0	AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
362	0	AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
363	0	AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
364	0	AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
365	0	AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
366	0	AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
367	0	AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
368	0	AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
369
370	0	:
371	0	: "r" (rk), "r" (key)
372	0	: "memory", "cc", "0");
373	0	}
374
375		/*
376		* Key expansion, 256-bit case
377		*/
378		static void aesni_setkey_enc_256(unsigned char *rk,
379		const unsigned char *key)
380	6.21k	{
381	6.21k	asm ("movdqu (%1), %%xmm0 \n\t"
382	6.21k	"movdqu %%xmm0, (%0) \n\t"
383	6.21k	"add $16, %0 \n\t"
384	6.21k	"movdqu 16(%1), %%xmm1 \n\t"
385	6.21k	"movdqu %%xmm1, (%0) \n\t"
386	6.21k	"jmp 2f \n\t" // skip auxiliary routine
387
388		/*
389		* Finish generating the next two round keys.
390		*
391		* On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
392		* xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
393		*
394		* On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
395		* and those have been written to the output buffer.
396		*/
397	6.21k	"1: \n\t"
398	6.21k	"pshufd $0xff, %%xmm2, %%xmm2 \n\t"
399	6.21k	"pxor %%xmm0, %%xmm2 \n\t"
400	6.21k	"pslldq $4, %%xmm0 \n\t"
401	6.21k	"pxor %%xmm0, %%xmm2 \n\t"
402	6.21k	"pslldq $4, %%xmm0 \n\t"
403	6.21k	"pxor %%xmm0, %%xmm2 \n\t"
404	6.21k	"pslldq $4, %%xmm0 \n\t"
405	6.21k	"pxor %%xmm2, %%xmm0 \n\t"
406	6.21k	"add $16, %0 \n\t"
407	6.21k	"movdqu %%xmm0, (%0) \n\t"
408
409		/* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
410		* and proceed to generate next round key from there */
411	6.21k	AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
412	6.21k	"pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
413	6.21k	"pxor %%xmm1, %%xmm2 \n\t"
414	6.21k	"pslldq $4, %%xmm1 \n\t"
415	6.21k	"pxor %%xmm1, %%xmm2 \n\t"
416	6.21k	"pslldq $4, %%xmm1 \n\t"
417	6.21k	"pxor %%xmm1, %%xmm2 \n\t"
418	6.21k	"pslldq $4, %%xmm1 \n\t"
419	6.21k	"pxor %%xmm2, %%xmm1 \n\t"
420	6.21k	"add $16, %0 \n\t"
421	6.21k	"movdqu %%xmm1, (%0) \n\t"
422	6.21k	"ret \n\t"
423
424		/*
425		* Main "loop" - Generating one more key than necessary,
426		* see definition of mbedtls_aes_context.buf
427		*/
428	6.21k	"2: \n\t"
429	6.21k	AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
430	6.21k	AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
431	6.21k	AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
432	6.21k	AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
433	6.21k	AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
434	6.21k	AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
435	6.21k	AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
436	6.21k	:
437	6.21k	: "r" (rk), "r" (key)
438	6.21k	: "memory", "cc", "0");
439	6.21k	}
440
441		/*
442		* Key expansion, wrapper
443		*/
444		int mbedtls_aesni_setkey_enc(unsigned char *rk,
445		const unsigned char *key,
446		size_t bits)
447	6.21k	{
448	6.21k	switch (bits) {
449	0	case 128: aesni_setkey_enc_128(rk, key); break;
450	0	case 192: aesni_setkey_enc_192(rk, key); break;
451	6.21k	case 256: aesni_setkey_enc_256(rk, key); break;
452	0	default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
453	6.21k	}
454
455	6.21k	return 0;
456	6.21k	}
457
458		#endif /* MBEDTLS_HAVE_X86_64 */
459
460		#endif /* MBEDTLS_AESNI_C */