pic24_comparator.h

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00001 /* Standard copyright does not go in this file because
00002 * of the use of Microchip provided macros, see comments below.
00003 */
00004 // Documentation for this file. If the \file tag isn't present,
00005 // this file won't be documented.
00011 #ifndef _PIC24_COMPARATOR_H_
00012 #define _PIC24_COMPARATOR_H_
00013 
00014 /*
00015  *  Changes:
00016  *  12/1/08  Fixed CMP1_POS_IP_VIN_POS definition 
00017  */
00018 
00019 
00020 /*
00021 The following macros are the AND/OR macros found in the
00022 the MPLAB C30/src/peripheral_24F/comparator.h file and placed
00023 in this header for use solely and exclusively on Microchip
00024 PICmicro Microcontroller products as
00025 specified in the MPLAB C30/src/peripheral_24F/comparator.h header.
00026 
00027 Changed the mixed case macros to all uppercase
00028 
00029 */
00030 
00031 /*Registers Defaults*/
00032 #define COMP_CVRCON_VAL                                 0x0000
00033 #define COMP_CMCON_VAL                                  0x0000
00034 
00035 #define CMP_IDLE_STOP                   0x8000 /* When device enters Idle mode, module does notgenerate interrupts.Module is still enabled. */
00036 #define CMP_IDLE_CON                    0x0000 /* continue operation in idle mode */
00037 #define CMP_IDLE_MASK                   (~CMP_IDLE_STOP)
00038 
00039 #define CMP2_CHANGE_STATE               0x2000 /* Comparator output changed states */
00040 #define CMP2_NO_CHANGE                          0x0000 /* Comparator output did not change states */
00041 #define CMP2_STATE_MASK                 (~CMP2_CHANGE_STATE )
00042 
00043 #define CMP1_CHANGE_STATE               0x1000 /* Comparator output changed states */
00044 #define CMP1_NO_CHANGE                  0x0000 /* Comparator output did not change states */
00045 #define CMP1_ENBL_DSBL_MASK             (~CMP1_CHANGE_STATE )
00046 
00047 #define CMP2_ENABLE                     0x0800 /* Comparator is enabled */
00048 #define CMP2_DISABLE                    0x0000 /* Comparator is disabled */
00049 #define CMP2_ENBL_DSBL_MASK             (~CMP2_ENABLE)
00050 
00051 #define CMP1_ENABLE                     0x0400 /* Comparator is enabled */
00052 #define CMP1_DISABLE                    0x0000 /* Comparator is disabled */
00053 #define CMP1_STATE_MASK                 (~CMP1_ENABLE)
00054 
00055 #define CMP2_OUTPUT_ENABLE              0x0200 /* Comparator output driven on the output pad */
00056 #define CMP2_OUTPUT_DISABLE             0x0000 /* Comparator output is not driven on the output pad */
00057 #define CMP2_OUTPUT_MASK                (~CMP2_OUTPUT_ENABLE)
00058 
00059 #define CMP1_OUTPUT_ENABLE              0x0100 /* Comparator output driven on the output pad */
00060 #define CMP1_OUTPUT_DISABLE             0x0000 /* Comparator output is not driven on the output pad */
00061 #define CMP1_OUTPUT_MASK                (~CMP1_OUTPUT_ENABLE)
00062 
00063 #define CMP2_INV_OUTPUT                 0x0020 /* C2 output inverted */
00064 #define CMP2_NORMAL_OUTPUT              0x0000 /* C2 output not inverted */
00065 #define CMP2_INV_OUTPUT_MASK            (~CMP2_INV_OUTPUT)
00066 
00067 #define CMP1_INV_OUTPUT                 0x0010 /* C1 output inverted */
00068 #define CMP1_NORMAL_OUTPUT              0x0000 /* C1 output not inverted */
00069 #define CMP1_INV_OUTPUT_MASK            (~CMP1_INV_OUTPUT)
00070 
00071 #define CMP2_NEG_IP_VIN_POS                     0x0008 /* Input is connected to Vin+ */
00072 #define CMP2_NEG_IP_VIN_NEG                     0x0000 /* Input is connected to Vin- */
00073 #define CMP2_NEG_IP_MASK                        (~CMP2_NEG_IP_VIN_POS)
00074 
00075 #define CMP2_POS_IP_VIN_POS                     0x0004 /* Input is connected to Vin+ */
00076 #define CMP2_POS_IP_CV_REF                      0x0000 /* Input is connected to Vin- */
00077 #define CMP2_POS_IP_MASK                        (~CMP2_POS_IP_VIN_POS)
00078 
00079 #define CMP1_NEG_IP_VIN_POS                     0x0002 /* Input is connected to Vin+ */
00080 #define CMP1_NEG_IP_VIN_NEG                     0x0000 /* Input is connected to Vin- */
00081 #define CMP1_NEG_IP_MASK                        (~CMP1_NEG_IP_VIN_POS)
00082 
00083 #define CMP1_POS_IP_VIN_POS                     0x0001 /* Input is connected to Vin+ */
00084 #define CMP1_POS_IP_CV_REF                      0x0000 /* Input is connected to Vin- */
00085 #define CMP1_POS_IP_MASK                        (~CMP1_POS_IP_VIN_POS)
00086 
00087 #define CMP_VREF_ENABLE                         0x0080 /* CVREF circuit powered on */
00088 #define CMP_VREF_DISABLE                        0x0000 /* CVREF circuit powered down */
00089 #define CMP1_VREF_MASK                          (~CMP_VREF_ENABLE)
00090 
00091 #define CMP_VREF_OUTPUT_ENABLE                  0x0040 /* CVREF voltage level is output on CVREF pin */
00092 #define CMP_VREF_OUTPUT_DISABLE                 0x0000 /* CVREF voltage level is disconnected from CVREF pin */
00093 #define CMP_VREF_OUTPUT_MASK                    (~CMP_VREF_OUTPUT_ENABLE)
00094 
00095 #define CMP_VREF_SELECT_24_STEPS                0x0020 /* 0 to 0.67 CVRSRC, with CVRSRC/24 step size */
00096 #define CMP_VREF_SELECT_32_STEPS                0x0000 /* 0.25 CVRSRC to 0.75 CVRSRC, with CVRSRC/32 step size */
00097 #define CMP_VREF_STEP_SELECT_MASK               (~CMP_VREF_SELECT_24_STEPS) /* 0 to 0.67 CVRSRC, with CVRSRC/24 step size */
00098 
00099 #define CMP_VRSRC_VREF_VREF                     0x0010 /* Comparator reference source CVRSRC = VREF+ – VREF- */
00100 #define CMP_VRSRC_AVDD_AVSS                     0x0000 /* Comparator reference source CVRSRC = AVDD – AVSS */
00101 #define CMP_VRSRC_MASK                          (~CMP_VRSRC_VREF_VREF)
00102 
00103 
00104 #define CMP_0P0_CVRR_1      0x0020
00105 #define CMP_0P04_CVRR_1     0x0021
00106 #define CMP_0P08_CVRR_1     0x0022
00107 #define CMP_0P12_CVRR_1     0x0023
00108 #define CMP_0P16_CVRR_1     0x0024
00109 #define CMP_0P20_CVRR_1     0x0025
00110 #define CMP_0P25_CVRR_1     0x0026
00111 #define CMP_0P29_CVRR_1     0x0027
00112 #define CMP_0P33_CVRR_1     0x0028
00113 #define CMP_0P37_CVRR_1     0x0029
00114 #define CMP_0P41_CVRR_1     0x002A
00115 #define CMP_0P45_CVRR_1     0x002B
00116 #define CMP_0P50_CVRR_1     0x002C
00117 #define CMP_0P54_CVRR_1     0x002D
00118 #define CMP_0P58_CVRR_1     0x002E
00119 #define CMP_0P62_CVRR_1     0x002F
00120 
00121 #define CMP_0P25_CVRR_0     0x0000
00122 #define CMP_0P28_CVRR_0     0x0001
00123 #define CMP_0P31_CVRR_0     0x0002
00124 #define CMP_0P34_CVRR_0     0x0003
00125 #define CMP_0P37_CVRR_0     0x0004
00126 #define CMP_0P40_CVRR_0     0x0005
00127 #define CMP_0P43_CVRR_0     0x0006
00128 #define CMP_0P46_CVRR_0     0x0007
00129 #define CMP_0P50_CVRR_0     0x0008
00130 #define CMP_0P53_CVRR_0     0x0009
00131 #define CMP_0P56_CVRR_0     0x000A
00132 #define CMP_0P59_CVRR_0     0x000B
00133 #define CMP_0P62_CVRR_0     0x000C
00134 #define CMP_0P65_CVRR_0     0x000D
00135 #define CMP_0P68_CVRR_0     0x000E
00136 #define CMP_0P71_CVRR_0     0x000F
00137 
00138 
00139 #endif

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