plat.c

00001 /*
00002 # This file is Copyright 2007, 2009 Dean Hall.
00003 #
00004 # This file is part of the Python-on-a-Chip program.
00005 # Python-on-a-Chip is free software: you can redistribute it and/or modify
00006 # it under the terms of the GNU LESSER GENERAL PUBLIC LICENSE Version 2.1.
00007 # 
00008 # Python-on-a-Chip is distributed in the hope that it will be useful,
00009 # but WITHOUT ANY WARRANTY; without even the implied warranty of
00010 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
00011 # A copy of the GNU LESSER GENERAL PUBLIC LICENSE Version 2.1
00012 # is seen in the file COPYING up one directory from this.
00013 */
00014 
00015 
00016 #undef __FILE_ID__
00017 #define __FILE_ID__ 0x70
00018 
00019 
00023 #include "pm.h"
00024 
00025 #include "AT91SAM7S64.h"
00026 #include "lib_AT91SAM7S64.h"
00027 #include "Board.h"
00028 
00029 
00030 #define RTTC_INTERRUPT_LEVEL 0
00031 
00033 #define PIV_200_MS 600000
00034 
00036 #define UART_BAUD 19200
00037 
00038 
00039 static AT91S_USART * pusart0 = AT91C_BASE_US0;
00040 
00041 
00042 static void
00043 at91sam7_pit_handler(void)
00044 {
00045     PmReturn_t retval;
00046 
00047     retval = pm_vmPeriodic(200);
00048     PM_REPORT_IF_ERROR(retval);
00049 }
00050 
00051 
00052 PmReturn_t
00053 plat_init(void)
00054 {
00055     /* Enable PIO's clock for PIOA and USART0 */
00056     AT91F_PMC_EnablePeriphClock(AT91C_BASE_PMC, (1 << AT91C_ID_PIOA)
00057                                                 | (1 << AT91C_ID_US0));
00058 
00059     /* Configure PIOA for LEDs and clear them */
00060     AT91F_PIO_CfgOutput(AT91C_BASE_PIOA, LED_MASK);
00061     AT91F_PIO_SetOutput(AT91C_BASE_PIOA, LED_MASK);
00062 
00063     /* Configure PIT interrupt */
00064     AT91F_AIC_ConfigureIt(AT91C_BASE_AIC,
00065                           AT91C_ID_SYS,
00066                           RTTC_INTERRUPT_LEVEL,
00067                           AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE,
00068                           (void*)at91sam7_pit_handler);
00069 
00070     /* Enable PIT interrupt */
00071     AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITEN
00072                                  | AT91C_PITC_PITIEN
00073                                  | PIV_200_MS;
00074     AT91F_AIC_EnableIt(AT91C_BASE_AIC, AT91C_ID_SYS);
00075 
00076     /* Enable RxD0, TxDO pins */
00077     *AT91C_PIOA_PDR = AT91C_PA5_RXD0 | AT91C_PA6_TXD0;
00078 
00079     /* Reset Rx, Tx and Rx Tx disables */
00080     pusart0->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX
00081                     | AT91C_US_RXDIS | AT91C_US_TXDIS;
00082 
00083     /* Normal Mode, Clock = MCK, 8N1 */
00084     pusart0->US_MR = AT91C_US_USMODE_NORMAL | AT91C_US_CLKS_CLOCK
00085                     | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE
00086                     | AT91C_US_NBSTOP_1_BIT;
00087 
00088     /* Baud Rate Divisor */
00089     pusart0->US_BRGR = (MCK / (16 * UART_BAUD));
00090 
00091     /* Rx, Tx enable */
00092     pusart0->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
00093 
00094     return PM_RET_OK;
00095 }
00096 
00097 
00098 /* TODO: disable the peripherals and interrupts */
00099 PmReturn_t 
00100 plat_deinit(void)
00101 {
00102     return PM_RET_OK;
00103 }
00104 
00105 
00106 /*
00107  * Gets a byte from the address in the designated memory space
00108  * Post-increments *paddr.
00109  */
00110 uint8_t
00111 plat_memGetByte(PmMemSpace_t memspace, uint8_t const **paddr)
00112 {
00113     uint8_t b = 0;
00114 
00115     switch (memspace)
00116     {
00117         case MEMSPACE_RAM:
00118         case MEMSPACE_PROG:
00119             b = **paddr;
00120             *paddr += 1;
00121             return b;
00122 
00123         case MEMSPACE_EEPROM:
00124         case MEMSPACE_SEEPROM:
00125         case MEMSPACE_OTHER0:
00126         case MEMSPACE_OTHER1:
00127         case MEMSPACE_OTHER2:
00128         case MEMSPACE_OTHER3:
00129         default:
00130             return 0;
00131     }
00132 }
00133 
00134 
00135 PmReturn_t
00136 plat_getByte(uint8_t *b)
00137 {
00138     int c;
00139     PmReturn_t retval = PM_RET_OK;
00140 
00141     while ((pusart0->US_CSR & AT91C_US_RXRDY) == 0);
00142     c = (pusart0->US_RHR);
00143     *b = c & 0xFF;
00144 
00145     if (c > 0xFF)
00146     {
00147         PM_RAISE(retval, PM_RET_EX_IO);
00148     }
00149 
00150     return retval;
00151 }
00152 
00153 
00154 PmReturn_t
00155 plat_putByte(uint8_t b)
00156 {
00157     while (!(pusart0->US_CSR & AT91C_US_TXRDY));
00158     pusart0->US_THR = b;
00159 
00160     return PM_RET_OK;
00161 }
00162 
00163 
00164 PmReturn_t
00165 plat_getMsTicks(uint32_t *r_ticks)
00166 {
00167     /* TODO: make access atomic */
00168     *r_ticks = pm_timerMsTicks;
00169 
00170     return PM_RET_OK;
00171 }
00172 
00173 
00174 void
00175 plat_reportError(PmReturn_t result)
00176 {
00177     plat_putByte('E');
00178     plat_putByte('r');
00179     plat_putByte('r');
00180     plat_putByte('\n');
00181 }

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