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NSWC-PHD MATAC OTA Request for Prototype Proposals: Router Chassis Design & Production

Solicitation ID: DIG-27-02-001

Agency: The Navy/NSWC-PHD

Type: Special Notice
Deadline: 2026-10-08T12:00:00 ET
Eligibility: Maybe (OTA/Consortium)
Funding: N/A
Doc Type: CSO
Clearance: No
Program Manager: N/A
Last Updated: 2026-09-18 16:02
Analyzed File: API_Description.txt

Eligibility Reasoning

Title: NSWC-PHD MATAC OTA Request for Prototype Proposals... Please go to matac.org for additional details

Note: This is an AI-generated summary...

Summary

[Analyzed from API Fallback] The Naval Surface Warfare Center, Port Hueneme Division (NSWC-PHD) is seeking proposals to design and produce a custom prototype chassis. This chassis must house a new, larger commercial network router, allowing it to be physically secured and integrated into the existing Tomahawk Equipment Cabinet (TEC) on naval ships. The solution must also facilitate connection to existing power supplies. This effort aims to upgrade network technology without a complete overhaul of the current equipment racks. Successful completion of the prototype may lead to a follow-on production contract for up to 60 units.

Overall Technical Areas

Mechanical Chassis DesignCustom Enclosure FabricationHardware Prototype DevelopmentMechanical EngineeringComputer-Aided Design (CAD)Equipment Rack IntegrationElectrical Power IntegrationShipboard Hardware StandardsShock and Vibration MitigationThermal Management DesignEMI/EMC ShieldingSystem Integration

Probable LBNL Areas

CSAEESAETAPSA

Focus Areas

Example Priorities:
  • build a custom chassis prototype to house a new network router so it can fit perfectly into our existing Tomahawk Equipment Cabinet (TEC)
  • a customized hardware chassis that can physically secure the new router
  • connect it to existing power supplies without disrupting the rest of the equipment
Specific Technical Skills:
Mechanical EngineeringCAD/CAM DesignSystems IntegrationHardware PrototypingSheet Metal FabricationRack-mount Enclosure DesignElectrical IntegrationMilitary Hardware SpecificationsProduction Design
Potential PIs for this Area:
NameScoreOrganization
Peter Tennessen0.73PSA | Engineering | Mechanical Engineering · Mechanical Engineering
Angelos Ioannou0.73CSA | AMCR | Computer Science · Hardware Prototyping
Luisa Gonzalez0.73CSA | AMCR | Computer Science · Hardware Prototyping
Daniel Gerber0.72ETA | Building Tech. & Urban Sys. | Bldg Technologies Dept · Electrical Integration
Cynthia Regnier0.72ETA | Building Tech. & Urban Sys. | Whole Building Sys Dept · Systems Integration
Grant Cutler0.72PSA | Engineering | Mechanical Engineering · Mechanical Engineering
Prakash Rao0.71ETA | Building Tech. & Urban Sys. | Bldg & Industrial App Dpt · CAD/CAM Design
Gregory Lemieux0.70EESA | CESD | Earth System Sciences · Military Hardware Specifications
Robert Hart0.70ETA | Building Tech. & Urban Sys. | Bldg Technologies Dept · Sheet Metal Fabrication
Alex Newkirk0.70ETA | Building Tech. & Urban Sys. | Bldg & Industrial App Dpt · Production Design

Potential LBNL PIs (Overall)

Note on PI Matching: These suggestions are generated through an AI-driven semantic analysis of LBNL staff profiles.

NameScoreOrganization
Peter Tennessen0.78PSA | Engineering | Mechanical Engineering · Mechanical Engineering
Grant Cutler0.76PSA | Engineering | Mechanical Engineering · Mechanical Chassis Design
Bruce Nordman0.76ETA | Building Tech. & Urban Sys. | Bldg Technologies Dept · Equipment Rack Integration
Eric Masanet0.76ETA | Energy Analysis | Systems & Energy Tech Analysis · Mechanical Engineering
Douglas Black0.75ETA | ESDR | Energy Storage & Dist Dpt · Electrical Power Integration
Arnaud Allézy0.75PSA | Engineering | Mechanical Engineering · Shock and Vibration Mitigation
Sukhpreet Kaur0.74PSA | Engineering | Electronic Engineering · Hardware Prototype Development
Ravi Prasher0.74ETA | ESDR | Energy Storage & Dist Dpt · Thermal Management Design
Dongwoo Paeng0.74ETA | ESDR | Energy Storage & Dist Dpt · EMI/EMC Shielding
Han Lee0.74PSA | Engineering | Electronic Engineering · System Integration

Fundamental Research Exemption (FRE)

Not Mentioned