/src/avm/avm_dsp/simd/v256_intrinsics_v128.h
Line | Count | Source |
1 | | /* |
2 | | * Copyright (c) 2021, Alliance for Open Media. All rights reserved |
3 | | * |
4 | | * This source code is subject to the terms of the BSD 3-Clause Clear License |
5 | | * and the Alliance for Open Media Patent License 1.0. If the BSD 3-Clause Clear |
6 | | * License was not distributed with this source code in the LICENSE file, you |
7 | | * can obtain it at aomedia.org/license/software-license/bsd-3-c-c/. If the |
8 | | * Alliance for Open Media Patent License 1.0 was not distributed with this |
9 | | * source code in the PATENTS file, you can obtain it at |
10 | | * aomedia.org/license/patent-license/. |
11 | | */ |
12 | | |
13 | | #ifndef AVM_AVM_DSP_SIMD_V256_INTRINSICS_V128_H_ |
14 | | #define AVM_AVM_DSP_SIMD_V256_INTRINSICS_V128_H_ |
15 | | |
16 | | #if HAVE_NEON |
17 | | #include "avm_dsp/simd/v128_intrinsics_arm.h" |
18 | | #elif HAVE_SSE2 |
19 | | #include "avm_dsp/simd/v128_intrinsics_x86.h" |
20 | | #else |
21 | | #include "avm_dsp/simd/v128_intrinsics.h" |
22 | | #endif |
23 | | |
24 | | #if HAVE_NEON |
25 | | typedef int64x2x2_t v256; |
26 | | #else |
27 | | typedef struct { |
28 | | v128 val[2]; |
29 | | } v256; |
30 | | #endif |
31 | | |
32 | 0 | SIMD_INLINE uint32_t v256_low_u32(v256 a) { return v128_low_u32(a.val[0]); }Unexecuted instantiation: cdef_block_sse2.c:v256_low_u32 Unexecuted instantiation: cdef_block_ssse3.c:v256_low_u32 Unexecuted instantiation: cdef_block_sse4.c:v256_low_u32 |
33 | | |
34 | 0 | SIMD_INLINE v64 v256_low_v64(v256 a) { return v128_low_v64(a.val[0]); }Unexecuted instantiation: cdef_block_sse2.c:v256_low_v64 Unexecuted instantiation: cdef_block_ssse3.c:v256_low_v64 Unexecuted instantiation: cdef_block_sse4.c:v256_low_v64 |
35 | | |
36 | 0 | SIMD_INLINE uint64_t v256_low_u64(v256 a) { return v64_u64(v256_low_v64(a)); }Unexecuted instantiation: cdef_block_sse2.c:v256_low_u64 Unexecuted instantiation: cdef_block_ssse3.c:v256_low_u64 Unexecuted instantiation: cdef_block_sse4.c:v256_low_u64 |
37 | | |
38 | 0 | SIMD_INLINE v128 v256_low_v128(v256 a) { return a.val[0]; }Unexecuted instantiation: cdef_block_sse2.c:v256_low_v128 Unexecuted instantiation: cdef_block_ssse3.c:v256_low_v128 Unexecuted instantiation: cdef_block_sse4.c:v256_low_v128 |
39 | | |
40 | 0 | SIMD_INLINE v128 v256_high_v128(v256 a) { return a.val[1]; }Unexecuted instantiation: cdef_block_sse2.c:v256_high_v128 Unexecuted instantiation: cdef_block_ssse3.c:v256_high_v128 Unexecuted instantiation: cdef_block_sse4.c:v256_high_v128 |
41 | | |
42 | 0 | SIMD_INLINE v256 v256_from_v128(v128 hi, v128 lo) { |
43 | 0 | v256 t; |
44 | 0 | t.val[1] = hi; |
45 | 0 | t.val[0] = lo; |
46 | 0 | return t; |
47 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_from_v128 Unexecuted instantiation: cdef_block_ssse3.c:v256_from_v128 Unexecuted instantiation: cdef_block_sse4.c:v256_from_v128 |
48 | | |
49 | 0 | SIMD_INLINE v256 v256_from_64(uint64_t a, uint64_t b, uint64_t c, uint64_t d) { |
50 | 0 | return v256_from_v128(v128_from_64(a, b), v128_from_64(c, d)); |
51 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_from_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_from_64 Unexecuted instantiation: cdef_block_sse4.c:v256_from_64 |
52 | | |
53 | 0 | SIMD_INLINE v256 v256_from_v64(v64 a, v64 b, v64 c, v64 d) { |
54 | 0 | return v256_from_v128(v128_from_v64(a, b), v128_from_v64(c, d)); |
55 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_from_v64 Unexecuted instantiation: cdef_block_ssse3.c:v256_from_v64 Unexecuted instantiation: cdef_block_sse4.c:v256_from_v64 |
56 | | |
57 | 0 | SIMD_INLINE v256 v256_load_unaligned(const void *p) { |
58 | 0 | return v256_from_v128(v128_load_unaligned((uint8_t *)p + 16), |
59 | 0 | v128_load_unaligned(p)); |
60 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_load_unaligned Unexecuted instantiation: cdef_block_ssse3.c:v256_load_unaligned Unexecuted instantiation: cdef_block_sse4.c:v256_load_unaligned |
61 | | |
62 | 0 | SIMD_INLINE v256 v256_load_aligned(const void *p) { |
63 | 0 | return v256_from_v128(v128_load_aligned((uint8_t *)p + 16), |
64 | 0 | v128_load_aligned(p)); |
65 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_load_aligned Unexecuted instantiation: cdef_block_ssse3.c:v256_load_aligned Unexecuted instantiation: cdef_block_sse4.c:v256_load_aligned |
66 | | |
67 | 0 | SIMD_INLINE void v256_store_unaligned(void *p, v256 a) { |
68 | 0 | v128_store_unaligned(p, a.val[0]); |
69 | 0 | v128_store_unaligned((uint8_t *)p + 16, a.val[1]); |
70 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_store_unaligned Unexecuted instantiation: cdef_block_ssse3.c:v256_store_unaligned Unexecuted instantiation: cdef_block_sse4.c:v256_store_unaligned |
71 | | |
72 | 0 | SIMD_INLINE void v256_store_aligned(void *p, v256 a) { |
73 | 0 | v128_store_aligned(p, a.val[0]); |
74 | 0 | v128_store_aligned((uint8_t *)p + 16, a.val[1]); |
75 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_store_aligned Unexecuted instantiation: cdef_block_ssse3.c:v256_store_aligned Unexecuted instantiation: cdef_block_sse4.c:v256_store_aligned |
76 | | |
77 | 0 | SIMD_INLINE v256 v256_zero(void) { |
78 | 0 | return v256_from_v128(v128_zero(), v128_zero()); |
79 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_zero Unexecuted instantiation: cdef_block_ssse3.c:v256_zero Unexecuted instantiation: cdef_block_sse4.c:v256_zero |
80 | | |
81 | 0 | SIMD_INLINE v256 v256_dup_8(uint8_t x) { |
82 | 0 | v128 t = v128_dup_8(x); |
83 | 0 | return v256_from_v128(t, t); |
84 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_dup_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_dup_8 Unexecuted instantiation: cdef_block_sse4.c:v256_dup_8 |
85 | | |
86 | 0 | SIMD_INLINE v256 v256_dup_16(uint16_t x) { |
87 | 0 | v128 t = v128_dup_16(x); |
88 | 0 | return v256_from_v128(t, t); |
89 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_dup_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_dup_16 Unexecuted instantiation: cdef_block_sse4.c:v256_dup_16 |
90 | | |
91 | 0 | SIMD_INLINE v256 v256_dup_32(uint32_t x) { |
92 | 0 | v128 t = v128_dup_32(x); |
93 | 0 | return v256_from_v128(t, t); |
94 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_dup_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_dup_32 Unexecuted instantiation: cdef_block_sse4.c:v256_dup_32 |
95 | | |
96 | 0 | SIMD_INLINE v256 v256_dup_64(uint64_t x) { |
97 | 0 | v128 t = v128_dup_64(x); |
98 | 0 | return v256_from_v128(t, t); |
99 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_dup_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_dup_64 Unexecuted instantiation: cdef_block_sse4.c:v256_dup_64 |
100 | | |
101 | 0 | SIMD_INLINE int64_t v256_dotp_su8(v256 a, v256 b) { |
102 | 0 | return v128_dotp_su8(a.val[1], b.val[1]) + v128_dotp_su8(a.val[0], b.val[0]); |
103 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_dotp_su8 Unexecuted instantiation: cdef_block_ssse3.c:v256_dotp_su8 Unexecuted instantiation: cdef_block_sse4.c:v256_dotp_su8 |
104 | | |
105 | 0 | SIMD_INLINE int64_t v256_dotp_s16(v256 a, v256 b) { |
106 | 0 | return v128_dotp_s16(a.val[1], b.val[1]) + v128_dotp_s16(a.val[0], b.val[0]); |
107 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_dotp_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_dotp_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_dotp_s16 |
108 | | |
109 | 0 | SIMD_INLINE int64_t v256_dotp_s32(v256 a, v256 b) { |
110 | 0 | return v128_dotp_s32(a.val[1], b.val[1]) + v128_dotp_s32(a.val[0], b.val[0]); |
111 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_dotp_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_dotp_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_dotp_s32 |
112 | | |
113 | 0 | SIMD_INLINE uint64_t v256_hadd_u8(v256 a) { |
114 | 0 | return v128_hadd_u8(a.val[1]) + v128_hadd_u8(a.val[0]); |
115 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_hadd_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_hadd_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_hadd_u8 |
116 | | |
117 | | typedef struct { |
118 | | sad128_internal val[2]; |
119 | | } sad256_internal; |
120 | | |
121 | 0 | SIMD_INLINE sad256_internal v256_sad_u8_init(void) { |
122 | 0 | sad256_internal t; |
123 | 0 | t.val[1] = v128_sad_u8_init(); |
124 | 0 | t.val[0] = v128_sad_u8_init(); |
125 | 0 | return t; |
126 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sad_u8_init Unexecuted instantiation: cdef_block_ssse3.c:v256_sad_u8_init Unexecuted instantiation: cdef_block_sse4.c:v256_sad_u8_init |
127 | | |
128 | | /* Implementation dependent return value. Result must be finalised with |
129 | | v256_sad_u8_sum(). |
130 | | The result for more than 16 v256_sad_u8() calls is undefined. */ |
131 | 0 | SIMD_INLINE sad256_internal v256_sad_u8(sad256_internal s, v256 a, v256 b) { |
132 | 0 | sad256_internal t; |
133 | 0 | t.val[1] = v128_sad_u8(s.val[1], a.val[1], b.val[1]); |
134 | 0 | t.val[0] = v128_sad_u8(s.val[0], a.val[0], b.val[0]); |
135 | 0 | return t; |
136 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sad_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_sad_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_sad_u8 |
137 | | |
138 | 0 | SIMD_INLINE uint32_t v256_sad_u8_sum(sad256_internal s) { |
139 | 0 | return v128_sad_u8_sum(s.val[1]) + v128_sad_u8_sum(s.val[0]); |
140 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sad_u8_sum Unexecuted instantiation: cdef_block_ssse3.c:v256_sad_u8_sum Unexecuted instantiation: cdef_block_sse4.c:v256_sad_u8_sum |
141 | | |
142 | | typedef struct { |
143 | | ssd128_internal val[2]; |
144 | | } ssd256_internal; |
145 | | |
146 | 0 | SIMD_INLINE ssd256_internal v256_ssd_u8_init(void) { |
147 | 0 | ssd256_internal t; |
148 | 0 | t.val[1] = v128_ssd_u8_init(); |
149 | 0 | t.val[0] = v128_ssd_u8_init(); |
150 | 0 | return t; |
151 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssd_u8_init Unexecuted instantiation: cdef_block_ssse3.c:v256_ssd_u8_init Unexecuted instantiation: cdef_block_sse4.c:v256_ssd_u8_init |
152 | | |
153 | | /* Implementation dependent return value. Result must be finalised with |
154 | | * v256_ssd_u8_sum(). */ |
155 | 0 | SIMD_INLINE ssd256_internal v256_ssd_u8(ssd256_internal s, v256 a, v256 b) { |
156 | 0 | ssd256_internal t; |
157 | 0 | t.val[1] = v128_ssd_u8(s.val[1], a.val[1], b.val[1]); |
158 | 0 | t.val[0] = v128_ssd_u8(s.val[0], a.val[0], b.val[0]); |
159 | 0 | return t; |
160 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssd_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_ssd_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_ssd_u8 |
161 | | |
162 | 0 | SIMD_INLINE uint32_t v256_ssd_u8_sum(ssd256_internal s) { |
163 | 0 | return v128_ssd_u8_sum(s.val[1]) + v128_ssd_u8_sum(s.val[0]); |
164 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssd_u8_sum Unexecuted instantiation: cdef_block_ssse3.c:v256_ssd_u8_sum Unexecuted instantiation: cdef_block_sse4.c:v256_ssd_u8_sum |
165 | | |
166 | 0 | SIMD_INLINE v256 v256_or(v256 a, v256 b) { |
167 | 0 | return v256_from_v128(v128_or(a.val[1], b.val[1]), |
168 | 0 | v128_or(a.val[0], b.val[0])); |
169 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_or Unexecuted instantiation: cdef_block_ssse3.c:v256_or Unexecuted instantiation: cdef_block_sse4.c:v256_or |
170 | | |
171 | 0 | SIMD_INLINE v256 v256_xor(v256 a, v256 b) { |
172 | 0 | return v256_from_v128(v128_xor(a.val[1], b.val[1]), |
173 | 0 | v128_xor(a.val[0], b.val[0])); |
174 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_xor Unexecuted instantiation: cdef_block_ssse3.c:v256_xor Unexecuted instantiation: cdef_block_sse4.c:v256_xor |
175 | | |
176 | 0 | SIMD_INLINE v256 v256_and(v256 a, v256 b) { |
177 | 0 | return v256_from_v128(v128_and(a.val[1], b.val[1]), |
178 | 0 | v128_and(a.val[0], b.val[0])); |
179 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_and Unexecuted instantiation: cdef_block_ssse3.c:v256_and Unexecuted instantiation: cdef_block_sse4.c:v256_and |
180 | | |
181 | 0 | SIMD_INLINE v256 v256_andn(v256 a, v256 b) { |
182 | 0 | return v256_from_v128(v128_andn(a.val[1], b.val[1]), |
183 | 0 | v128_andn(a.val[0], b.val[0])); |
184 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_andn Unexecuted instantiation: cdef_block_ssse3.c:v256_andn Unexecuted instantiation: cdef_block_sse4.c:v256_andn |
185 | | |
186 | 0 | SIMD_INLINE v256 v256_add_8(v256 a, v256 b) { |
187 | 0 | return v256_from_v128(v128_add_8(a.val[1], b.val[1]), |
188 | 0 | v128_add_8(a.val[0], b.val[0])); |
189 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_add_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_add_8 Unexecuted instantiation: cdef_block_sse4.c:v256_add_8 |
190 | | |
191 | 0 | SIMD_INLINE v256 v256_add_16(v256 a, v256 b) { |
192 | 0 | return v256_from_v128(v128_add_16(a.val[1], b.val[1]), |
193 | 0 | v128_add_16(a.val[0], b.val[0])); |
194 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_add_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_add_16 Unexecuted instantiation: cdef_block_sse4.c:v256_add_16 |
195 | | |
196 | 0 | SIMD_INLINE v256 v256_sadd_s8(v256 a, v256 b) { |
197 | 0 | return v256_from_v128(v128_sadd_s8(a.val[1], b.val[1]), |
198 | 0 | v128_sadd_s8(a.val[0], b.val[0])); |
199 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sadd_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_sadd_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_sadd_s8 |
200 | | |
201 | 0 | SIMD_INLINE v256 v256_sadd_u8(v256 a, v256 b) { |
202 | 0 | return v256_from_v128(v128_sadd_u8(a.val[1], b.val[1]), |
203 | 0 | v128_sadd_u8(a.val[0], b.val[0])); |
204 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sadd_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_sadd_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_sadd_u8 |
205 | | |
206 | 0 | SIMD_INLINE v256 v256_sadd_s16(v256 a, v256 b) { |
207 | 0 | return v256_from_v128(v128_sadd_s16(a.val[1], b.val[1]), |
208 | 0 | v128_sadd_s16(a.val[0], b.val[0])); |
209 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sadd_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_sadd_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_sadd_s16 |
210 | | |
211 | 0 | SIMD_INLINE v256 v256_add_32(v256 a, v256 b) { |
212 | 0 | return v256_from_v128(v128_add_32(a.val[1], b.val[1]), |
213 | 0 | v128_add_32(a.val[0], b.val[0])); |
214 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_add_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_add_32 Unexecuted instantiation: cdef_block_sse4.c:v256_add_32 |
215 | | |
216 | 0 | SIMD_INLINE v256 v256_add_64(v256 a, v256 b) { |
217 | 0 | return v256_from_v128(v128_add_64(a.val[1], b.val[1]), |
218 | 0 | v128_add_64(a.val[0], b.val[0])); |
219 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_add_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_add_64 Unexecuted instantiation: cdef_block_sse4.c:v256_add_64 |
220 | | |
221 | 0 | SIMD_INLINE v256 v256_padd_u8(v256 a) { |
222 | 0 | return v256_from_v128(v128_padd_u8(a.val[1]), v128_padd_u8(a.val[0])); |
223 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_padd_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_padd_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_padd_u8 |
224 | | |
225 | 0 | SIMD_INLINE v256 v256_padd_s16(v256 a) { |
226 | 0 | return v256_from_v128(v128_padd_s16(a.val[1]), v128_padd_s16(a.val[0])); |
227 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_padd_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_padd_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_padd_s16 |
228 | | |
229 | 0 | SIMD_INLINE v256 v256_sub_8(v256 a, v256 b) { |
230 | 0 | return v256_from_v128(v128_sub_8(a.val[1], b.val[1]), |
231 | 0 | v128_sub_8(a.val[0], b.val[0])); |
232 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sub_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_sub_8 Unexecuted instantiation: cdef_block_sse4.c:v256_sub_8 |
233 | | |
234 | 0 | SIMD_INLINE v256 v256_ssub_u8(v256 a, v256 b) { |
235 | 0 | return v256_from_v128(v128_ssub_u8(a.val[1], b.val[1]), |
236 | 0 | v128_ssub_u8(a.val[0], b.val[0])); |
237 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssub_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_ssub_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_ssub_u8 |
238 | | |
239 | 0 | SIMD_INLINE v256 v256_ssub_s8(v256 a, v256 b) { |
240 | 0 | return v256_from_v128(v128_ssub_s8(a.val[1], b.val[1]), |
241 | 0 | v128_ssub_s8(a.val[0], b.val[0])); |
242 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssub_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_ssub_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_ssub_s8 |
243 | | |
244 | 0 | SIMD_INLINE v256 v256_sub_16(v256 a, v256 b) { |
245 | 0 | return v256_from_v128(v128_sub_16(a.val[1], b.val[1]), |
246 | 0 | v128_sub_16(a.val[0], b.val[0])); |
247 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sub_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_sub_16 Unexecuted instantiation: cdef_block_sse4.c:v256_sub_16 |
248 | | |
249 | 0 | SIMD_INLINE v256 v256_ssub_s16(v256 a, v256 b) { |
250 | 0 | return v256_from_v128(v128_ssub_s16(a.val[1], b.val[1]), |
251 | 0 | v128_ssub_s16(a.val[0], b.val[0])); |
252 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssub_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_ssub_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_ssub_s16 |
253 | | |
254 | 0 | SIMD_INLINE v256 v256_ssub_u16(v256 a, v256 b) { |
255 | 0 | return v256_from_v128(v128_ssub_u16(a.val[1], b.val[1]), |
256 | 0 | v128_ssub_u16(a.val[0], b.val[0])); |
257 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssub_u16 Unexecuted instantiation: cdef_block_ssse3.c:v256_ssub_u16 Unexecuted instantiation: cdef_block_sse4.c:v256_ssub_u16 |
258 | | |
259 | 0 | SIMD_INLINE v256 v256_sub_32(v256 a, v256 b) { |
260 | 0 | return v256_from_v128(v128_sub_32(a.val[1], b.val[1]), |
261 | 0 | v128_sub_32(a.val[0], b.val[0])); |
262 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sub_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_sub_32 Unexecuted instantiation: cdef_block_sse4.c:v256_sub_32 |
263 | | |
264 | 0 | SIMD_INLINE v256 v256_sub_64(v256 a, v256 b) { |
265 | 0 | return v256_from_v128(v128_sub_64(a.val[1], b.val[1]), |
266 | 0 | v128_sub_64(a.val[0], b.val[0])); |
267 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sub_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_sub_64 Unexecuted instantiation: cdef_block_sse4.c:v256_sub_64 |
268 | | |
269 | 0 | SIMD_INLINE v256 v256_abs_s16(v256 a) { |
270 | 0 | return v256_from_v128(v128_abs_s16(a.val[1]), v128_abs_s16(a.val[0])); |
271 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_abs_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_abs_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_abs_s16 |
272 | | |
273 | 0 | SIMD_INLINE v256 v256_abs_s8(v256 a) { |
274 | 0 | return v256_from_v128(v128_abs_s8(a.val[1]), v128_abs_s8(a.val[0])); |
275 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_abs_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_abs_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_abs_s8 |
276 | | |
277 | 0 | SIMD_INLINE v256 v256_mul_s16(v128 a, v128 b) { |
278 | 0 | v128 lo_bits = v128_mullo_s16(a, b); |
279 | 0 | v128 hi_bits = v128_mulhi_s16(a, b); |
280 | 0 | return v256_from_v128(v128_ziphi_16(hi_bits, lo_bits), |
281 | 0 | v128_ziplo_16(hi_bits, lo_bits)); |
282 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_mul_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_mul_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_mul_s16 |
283 | | |
284 | 0 | SIMD_INLINE v256 v256_mullo_s16(v256 a, v256 b) { |
285 | 0 | return v256_from_v128(v128_mullo_s16(a.val[1], b.val[1]), |
286 | 0 | v128_mullo_s16(a.val[0], b.val[0])); |
287 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_mullo_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_mullo_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_mullo_s16 |
288 | | |
289 | 0 | SIMD_INLINE v256 v256_mulhi_s16(v256 a, v256 b) { |
290 | 0 | return v256_from_v128(v128_mulhi_s16(a.val[1], b.val[1]), |
291 | 0 | v128_mulhi_s16(a.val[0], b.val[0])); |
292 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_mulhi_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_mulhi_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_mulhi_s16 |
293 | | |
294 | 0 | SIMD_INLINE v256 v256_mullo_s32(v256 a, v256 b) { |
295 | 0 | return v256_from_v128(v128_mullo_s32(a.val[1], b.val[1]), |
296 | 0 | v128_mullo_s32(a.val[0], b.val[0])); |
297 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_mullo_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_mullo_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_mullo_s32 |
298 | | |
299 | 0 | SIMD_INLINE v256 v256_madd_s16(v256 a, v256 b) { |
300 | 0 | return v256_from_v128(v128_madd_s16(a.val[1], b.val[1]), |
301 | 0 | v128_madd_s16(a.val[0], b.val[0])); |
302 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_madd_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_madd_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_madd_s16 |
303 | | |
304 | 0 | SIMD_INLINE v256 v256_madd_us8(v256 a, v256 b) { |
305 | 0 | return v256_from_v128(v128_madd_us8(a.val[1], b.val[1]), |
306 | 0 | v128_madd_us8(a.val[0], b.val[0])); |
307 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_madd_us8 Unexecuted instantiation: cdef_block_ssse3.c:v256_madd_us8 Unexecuted instantiation: cdef_block_sse4.c:v256_madd_us8 |
308 | | |
309 | 0 | SIMD_INLINE v256 v256_avg_u8(v256 a, v256 b) { |
310 | 0 | return v256_from_v128(v128_avg_u8(a.val[1], b.val[1]), |
311 | 0 | v128_avg_u8(a.val[0], b.val[0])); |
312 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_avg_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_avg_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_avg_u8 |
313 | | |
314 | 0 | SIMD_INLINE v256 v256_rdavg_u8(v256 a, v256 b) { |
315 | 0 | return v256_from_v128(v128_rdavg_u8(a.val[1], b.val[1]), |
316 | 0 | v128_rdavg_u8(a.val[0], b.val[0])); |
317 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_rdavg_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_rdavg_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_rdavg_u8 |
318 | | |
319 | 0 | SIMD_INLINE v256 v256_rdavg_u16(v256 a, v256 b) { |
320 | 0 | return v256_from_v128(v128_rdavg_u16(a.val[1], b.val[1]), |
321 | 0 | v128_rdavg_u16(a.val[0], b.val[0])); |
322 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_rdavg_u16 Unexecuted instantiation: cdef_block_ssse3.c:v256_rdavg_u16 Unexecuted instantiation: cdef_block_sse4.c:v256_rdavg_u16 |
323 | | |
324 | 0 | SIMD_INLINE v256 v256_avg_u16(v256 a, v256 b) { |
325 | 0 | return v256_from_v128(v128_avg_u16(a.val[1], b.val[1]), |
326 | 0 | v128_avg_u16(a.val[0], b.val[0])); |
327 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_avg_u16 Unexecuted instantiation: cdef_block_ssse3.c:v256_avg_u16 Unexecuted instantiation: cdef_block_sse4.c:v256_avg_u16 |
328 | | |
329 | 0 | SIMD_INLINE v256 v256_min_u8(v256 a, v256 b) { |
330 | 0 | return v256_from_v128(v128_min_u8(a.val[1], b.val[1]), |
331 | 0 | v128_min_u8(a.val[0], b.val[0])); |
332 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_min_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_min_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_min_u8 |
333 | | |
334 | 0 | SIMD_INLINE v256 v256_max_u8(v256 a, v256 b) { |
335 | 0 | return v256_from_v128(v128_max_u8(a.val[1], b.val[1]), |
336 | 0 | v128_max_u8(a.val[0], b.val[0])); |
337 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_max_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_max_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_max_u8 |
338 | | |
339 | 0 | SIMD_INLINE v256 v256_min_s8(v256 a, v256 b) { |
340 | 0 | return v256_from_v128(v128_min_s8(a.val[1], b.val[1]), |
341 | 0 | v128_min_s8(a.val[0], b.val[0])); |
342 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_min_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_min_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_min_s8 |
343 | | |
344 | 0 | SIMD_INLINE uint32_t v256_movemask_8(v256 a) { |
345 | 0 | return (v128_movemask_8(v256_high_v128(a)) << 16) | |
346 | 0 | v128_movemask_8(v256_low_v128(a)); |
347 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_movemask_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_movemask_8 Unexecuted instantiation: cdef_block_sse4.c:v256_movemask_8 |
348 | | |
349 | 0 | SIMD_INLINE v256 v256_blend_8(v256 a, v256 b, v256 c) { |
350 | 0 | return v256_from_v128(v128_blend_8(a.val[1], b.val[1], c.val[1]), |
351 | 0 | v128_blend_8(a.val[0], b.val[0], c.val[0])); |
352 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_blend_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_blend_8 Unexecuted instantiation: cdef_block_sse4.c:v256_blend_8 |
353 | | |
354 | 0 | SIMD_INLINE v256 v256_max_s8(v256 a, v256 b) { |
355 | 0 | return v256_from_v128(v128_max_s8(a.val[1], b.val[1]), |
356 | 0 | v128_max_s8(a.val[0], b.val[0])); |
357 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_max_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_max_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_max_s8 |
358 | | |
359 | 0 | SIMD_INLINE v256 v256_min_s16(v256 a, v256 b) { |
360 | 0 | return v256_from_v128(v128_min_s16(a.val[1], b.val[1]), |
361 | 0 | v128_min_s16(a.val[0], b.val[0])); |
362 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_min_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_min_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_min_s16 |
363 | | |
364 | 0 | SIMD_INLINE v256 v256_max_s16(v256 a, v256 b) { |
365 | 0 | return v256_from_v128(v128_max_s16(a.val[1], b.val[1]), |
366 | 0 | v128_max_s16(a.val[0], b.val[0])); |
367 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_max_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_max_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_max_s16 |
368 | | |
369 | 0 | SIMD_INLINE v256 v256_min_s32(v256 a, v256 b) { |
370 | 0 | return v256_from_v128(v128_min_s32(a.val[1], b.val[1]), |
371 | 0 | v128_min_s32(a.val[0], b.val[0])); |
372 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_min_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_min_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_min_s32 |
373 | | |
374 | 0 | SIMD_INLINE v256 v256_max_s32(v256 a, v256 b) { |
375 | 0 | return v256_from_v128(v128_max_s32(a.val[1], b.val[1]), |
376 | 0 | v128_max_s32(a.val[0], b.val[0])); |
377 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_max_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_max_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_max_s32 |
378 | | |
379 | 0 | SIMD_INLINE v256 v256_ziplo_8(v256 a, v256 b) { |
380 | 0 | return v256_from_v128(v128_ziphi_8(a.val[0], b.val[0]), |
381 | 0 | v128_ziplo_8(a.val[0], b.val[0])); |
382 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziplo_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziplo_8 Unexecuted instantiation: cdef_block_sse4.c:v256_ziplo_8 |
383 | | |
384 | 0 | SIMD_INLINE v256 v256_ziphi_8(v256 a, v256 b) { |
385 | 0 | return v256_from_v128(v128_ziphi_8(a.val[1], b.val[1]), |
386 | 0 | v128_ziplo_8(a.val[1], b.val[1])); |
387 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziphi_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziphi_8 Unexecuted instantiation: cdef_block_sse4.c:v256_ziphi_8 |
388 | | |
389 | 0 | SIMD_INLINE v256 v256_ziplo_16(v256 a, v256 b) { |
390 | 0 | return v256_from_v128(v128_ziphi_16(a.val[0], b.val[0]), |
391 | 0 | v128_ziplo_16(a.val[0], b.val[0])); |
392 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziplo_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziplo_16 Unexecuted instantiation: cdef_block_sse4.c:v256_ziplo_16 |
393 | | |
394 | 0 | SIMD_INLINE v256 v256_ziphi_16(v256 a, v256 b) { |
395 | 0 | return v256_from_v128(v128_ziphi_16(a.val[1], b.val[1]), |
396 | 0 | v128_ziplo_16(a.val[1], b.val[1])); |
397 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziphi_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziphi_16 Unexecuted instantiation: cdef_block_sse4.c:v256_ziphi_16 |
398 | | |
399 | 0 | SIMD_INLINE v256 v256_ziplo_32(v256 a, v256 b) { |
400 | 0 | return v256_from_v128(v128_ziphi_32(a.val[0], b.val[0]), |
401 | 0 | v128_ziplo_32(a.val[0], b.val[0])); |
402 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziplo_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziplo_32 Unexecuted instantiation: cdef_block_sse4.c:v256_ziplo_32 |
403 | | |
404 | 0 | SIMD_INLINE v256 v256_ziphi_32(v256 a, v256 b) { |
405 | 0 | return v256_from_v128(v128_ziphi_32(a.val[1], b.val[1]), |
406 | 0 | v128_ziplo_32(a.val[1], b.val[1])); |
407 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziphi_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziphi_32 Unexecuted instantiation: cdef_block_sse4.c:v256_ziphi_32 |
408 | | |
409 | 0 | SIMD_INLINE v256 v256_ziplo_64(v256 a, v256 b) { |
410 | 0 | return v256_from_v128(v128_ziphi_64(a.val[0], b.val[0]), |
411 | 0 | v128_ziplo_64(a.val[0], b.val[0])); |
412 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziplo_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziplo_64 Unexecuted instantiation: cdef_block_sse4.c:v256_ziplo_64 |
413 | | |
414 | 0 | SIMD_INLINE v256 v256_ziphi_64(v256 a, v256 b) { |
415 | 0 | return v256_from_v128(v128_ziphi_64(a.val[1], b.val[1]), |
416 | 0 | v128_ziplo_64(a.val[1], b.val[1])); |
417 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziphi_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziphi_64 Unexecuted instantiation: cdef_block_sse4.c:v256_ziphi_64 |
418 | | |
419 | 0 | SIMD_INLINE v256 v256_ziplo_128(v256 a, v256 b) { |
420 | 0 | return v256_from_v128(a.val[0], b.val[0]); |
421 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziplo_128 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziplo_128 Unexecuted instantiation: cdef_block_sse4.c:v256_ziplo_128 |
422 | | |
423 | 0 | SIMD_INLINE v256 v256_ziphi_128(v256 a, v256 b) { |
424 | 0 | return v256_from_v128(a.val[1], b.val[1]); |
425 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ziphi_128 Unexecuted instantiation: cdef_block_ssse3.c:v256_ziphi_128 Unexecuted instantiation: cdef_block_sse4.c:v256_ziphi_128 |
426 | | |
427 | 0 | SIMD_INLINE v256 v256_zip_8(v128 a, v128 b) { |
428 | 0 | return v256_from_v128(v128_ziphi_8(a, b), v128_ziplo_8(a, b)); |
429 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_zip_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_zip_8 Unexecuted instantiation: cdef_block_sse4.c:v256_zip_8 |
430 | | |
431 | 0 | SIMD_INLINE v256 v256_zip_16(v128 a, v128 b) { |
432 | 0 | return v256_from_v128(v128_ziphi_16(a, b), v128_ziplo_16(a, b)); |
433 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_zip_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_zip_16 Unexecuted instantiation: cdef_block_sse4.c:v256_zip_16 |
434 | | |
435 | 0 | SIMD_INLINE v256 v256_zip_32(v128 a, v128 b) { |
436 | 0 | return v256_from_v128(v128_ziphi_32(a, b), v128_ziplo_32(a, b)); |
437 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_zip_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_zip_32 Unexecuted instantiation: cdef_block_sse4.c:v256_zip_32 |
438 | | |
439 | 0 | SIMD_INLINE v256 v256_unziplo_8(v256 a, v256 b) { |
440 | 0 | return v256_from_v128(v128_unziplo_8(a.val[1], a.val[0]), |
441 | 0 | v128_unziplo_8(b.val[1], b.val[0])); |
442 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziplo_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziplo_8 Unexecuted instantiation: cdef_block_sse4.c:v256_unziplo_8 |
443 | | |
444 | 0 | SIMD_INLINE v256 v256_unziphi_8(v256 a, v256 b) { |
445 | 0 | return v256_from_v128(v128_unziphi_8(a.val[1], a.val[0]), |
446 | 0 | v128_unziphi_8(b.val[1], b.val[0])); |
447 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziphi_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziphi_8 Unexecuted instantiation: cdef_block_sse4.c:v256_unziphi_8 |
448 | | |
449 | 0 | SIMD_INLINE v256 v256_unziplo_16(v256 a, v256 b) { |
450 | 0 | return v256_from_v128(v128_unziplo_16(a.val[1], a.val[0]), |
451 | 0 | v128_unziplo_16(b.val[1], b.val[0])); |
452 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziplo_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziplo_16 Unexecuted instantiation: cdef_block_sse4.c:v256_unziplo_16 |
453 | | |
454 | 0 | SIMD_INLINE v256 v256_unziphi_16(v256 a, v256 b) { |
455 | 0 | return v256_from_v128(v128_unziphi_16(a.val[1], a.val[0]), |
456 | 0 | v128_unziphi_16(b.val[1], b.val[0])); |
457 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziphi_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziphi_16 Unexecuted instantiation: cdef_block_sse4.c:v256_unziphi_16 |
458 | | |
459 | 0 | SIMD_INLINE v256 v256_unziplo_32(v256 a, v256 b) { |
460 | 0 | return v256_from_v128(v128_unziplo_32(a.val[1], a.val[0]), |
461 | 0 | v128_unziplo_32(b.val[1], b.val[0])); |
462 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziplo_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziplo_32 Unexecuted instantiation: cdef_block_sse4.c:v256_unziplo_32 |
463 | | |
464 | 0 | SIMD_INLINE v256 v256_unziphi_32(v256 a, v256 b) { |
465 | 0 | return v256_from_v128(v128_unziphi_32(a.val[1], a.val[0]), |
466 | 0 | v128_unziphi_32(b.val[1], b.val[0])); |
467 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziphi_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziphi_32 Unexecuted instantiation: cdef_block_sse4.c:v256_unziphi_32 |
468 | | |
469 | 0 | SIMD_INLINE v256 v256_unziplo_64(v256 a, v256 b) { |
470 | 0 | #if HAVE_SSE2 |
471 | 0 | return v256_from_v128( |
472 | 0 | _mm_castpd_si128(_mm_shuffle_pd(_mm_castsi128_pd(a.val[0]), |
473 | 0 | _mm_castsi128_pd(a.val[1]), 0)), |
474 | 0 | _mm_castpd_si128(_mm_shuffle_pd(_mm_castsi128_pd(b.val[0]), |
475 | 0 | _mm_castsi128_pd(b.val[1]), 0))); |
476 | 0 | #else |
477 | 0 | return v256_from_v64(v128_low_v64(a.val[1]), v128_low_v64(a.val[0]), |
478 | 0 | v128_low_v64(b.val[1]), v128_low_v64(b.val[0])); |
479 | 0 | #endif |
480 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziplo_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziplo_64 Unexecuted instantiation: cdef_block_sse4.c:v256_unziplo_64 |
481 | | |
482 | 0 | SIMD_INLINE v256 v256_unziphi_64(v256 a, v256 b) { |
483 | 0 | #if HAVE_SSE2 |
484 | 0 | return v256_from_v128( |
485 | 0 | _mm_castpd_si128(_mm_shuffle_pd(_mm_castsi128_pd(a.val[0]), |
486 | 0 | _mm_castsi128_pd(a.val[1]), 3)), |
487 | 0 | _mm_castpd_si128(_mm_shuffle_pd(_mm_castsi128_pd(b.val[0]), |
488 | 0 | _mm_castsi128_pd(b.val[1]), 3))); |
489 | 0 | #else |
490 | 0 | return v256_from_v64(v128_high_v64(a.val[1]), v128_high_v64(a.val[0]), |
491 | 0 | v128_high_v64(b.val[1]), v128_high_v64(b.val[0])); |
492 | 0 | #endif |
493 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unziphi_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_unziphi_64 Unexecuted instantiation: cdef_block_sse4.c:v256_unziphi_64 |
494 | | |
495 | 0 | SIMD_INLINE v256 v256_unpack_u8_s16(v128 a) { |
496 | 0 | return v256_from_v128(v128_unpackhi_u8_s16(a), v128_unpacklo_u8_s16(a)); |
497 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpack_u8_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpack_u8_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_unpack_u8_s16 |
498 | | |
499 | 0 | SIMD_INLINE v256 v256_unpacklo_u8_s16(v256 a) { |
500 | 0 | return v256_from_v128(v128_unpackhi_u8_s16(a.val[0]), |
501 | 0 | v128_unpacklo_u8_s16(a.val[0])); |
502 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpacklo_u8_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpacklo_u8_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_unpacklo_u8_s16 |
503 | | |
504 | 0 | SIMD_INLINE v256 v256_unpackhi_u8_s16(v256 a) { |
505 | 0 | return v256_from_v128(v128_unpackhi_u8_s16(a.val[1]), |
506 | 0 | v128_unpacklo_u8_s16(a.val[1])); |
507 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpackhi_u8_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpackhi_u8_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_unpackhi_u8_s16 |
508 | | |
509 | 0 | SIMD_INLINE v256 v256_unpack_s8_s16(v128 a) { |
510 | 0 | return v256_from_v128(v128_unpackhi_s8_s16(a), v128_unpacklo_s8_s16(a)); |
511 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpack_s8_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpack_s8_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_unpack_s8_s16 |
512 | | |
513 | 0 | SIMD_INLINE v256 v256_unpacklo_s8_s16(v256 a) { |
514 | 0 | return v256_from_v128(v128_unpackhi_s8_s16(a.val[0]), |
515 | 0 | v128_unpacklo_s8_s16(a.val[0])); |
516 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpacklo_s8_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpacklo_s8_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_unpacklo_s8_s16 |
517 | | |
518 | 0 | SIMD_INLINE v256 v256_unpackhi_s8_s16(v256 a) { |
519 | 0 | return v256_from_v128(v128_unpackhi_s8_s16(a.val[1]), |
520 | 0 | v128_unpacklo_s8_s16(a.val[1])); |
521 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpackhi_s8_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpackhi_s8_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_unpackhi_s8_s16 |
522 | | |
523 | 0 | SIMD_INLINE v256 v256_unpack_u16_s32(v128 a) { |
524 | 0 | return v256_from_v128(v128_unpackhi_u16_s32(a), v128_unpacklo_u16_s32(a)); |
525 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpack_u16_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpack_u16_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_unpack_u16_s32 |
526 | | |
527 | 0 | SIMD_INLINE v256 v256_unpack_s16_s32(v128 a) { |
528 | 0 | return v256_from_v128(v128_unpackhi_s16_s32(a), v128_unpacklo_s16_s32(a)); |
529 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpack_s16_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpack_s16_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_unpack_s16_s32 |
530 | | |
531 | 0 | SIMD_INLINE v256 v256_unpacklo_u16_s32(v256 a) { |
532 | 0 | return v256_from_v128(v128_unpackhi_u16_s32(a.val[0]), |
533 | 0 | v128_unpacklo_u16_s32(a.val[0])); |
534 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpacklo_u16_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpacklo_u16_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_unpacklo_u16_s32 |
535 | | |
536 | 0 | SIMD_INLINE v256 v256_unpacklo_s16_s32(v256 a) { |
537 | 0 | return v256_from_v128(v128_unpackhi_s16_s32(a.val[0]), |
538 | 0 | v128_unpacklo_s16_s32(a.val[0])); |
539 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpacklo_s16_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpacklo_s16_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_unpacklo_s16_s32 |
540 | | |
541 | 0 | SIMD_INLINE v256 v256_unpackhi_u16_s32(v256 a) { |
542 | 0 | return v256_from_v128(v128_unpackhi_u16_s32(a.val[1]), |
543 | 0 | v128_unpacklo_u16_s32(a.val[1])); |
544 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpackhi_u16_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpackhi_u16_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_unpackhi_u16_s32 |
545 | | |
546 | 0 | SIMD_INLINE v256 v256_unpackhi_s16_s32(v256 a) { |
547 | 0 | return v256_from_v128(v128_unpackhi_s16_s32(a.val[1]), |
548 | 0 | v128_unpacklo_s16_s32(a.val[1])); |
549 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_unpackhi_s16_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_unpackhi_s16_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_unpackhi_s16_s32 |
550 | | |
551 | 0 | SIMD_INLINE v256 v256_cmpgt_s8(v256 a, v256 b) { |
552 | 0 | return v256_from_v128(v128_cmpgt_s8(a.val[1], b.val[1]), |
553 | 0 | v128_cmpgt_s8(a.val[0], b.val[0])); |
554 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmpgt_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmpgt_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_cmpgt_s8 |
555 | | |
556 | 0 | SIMD_INLINE v256 v256_cmplt_s8(v256 a, v256 b) { |
557 | 0 | return v256_from_v128(v128_cmplt_s8(a.val[1], b.val[1]), |
558 | 0 | v128_cmplt_s8(a.val[0], b.val[0])); |
559 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmplt_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmplt_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_cmplt_s8 |
560 | | |
561 | 0 | SIMD_INLINE v256 v256_cmpeq_8(v256 a, v256 b) { |
562 | 0 | return v256_from_v128(v128_cmpeq_8(a.val[1], b.val[1]), |
563 | 0 | v128_cmpeq_8(a.val[0], b.val[0])); |
564 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmpeq_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmpeq_8 Unexecuted instantiation: cdef_block_sse4.c:v256_cmpeq_8 |
565 | | |
566 | 0 | SIMD_INLINE v256 v256_cmpgt_s16(v256 a, v256 b) { |
567 | 0 | return v256_from_v128(v128_cmpgt_s16(a.val[1], b.val[1]), |
568 | 0 | v128_cmpgt_s16(a.val[0], b.val[0])); |
569 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmpgt_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmpgt_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_cmpgt_s16 |
570 | | |
571 | 0 | SIMD_INLINE v256 v256_cmplt_s16(v256 a, v256 b) { |
572 | 0 | return v256_from_v128(v128_cmplt_s16(a.val[1], b.val[1]), |
573 | 0 | v128_cmplt_s16(a.val[0], b.val[0])); |
574 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmplt_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmplt_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_cmplt_s16 |
575 | | |
576 | 0 | SIMD_INLINE v256 v256_cmpeq_16(v256 a, v256 b) { |
577 | 0 | return v256_from_v128(v128_cmpeq_16(a.val[1], b.val[1]), |
578 | 0 | v128_cmpeq_16(a.val[0], b.val[0])); |
579 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmpeq_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmpeq_16 Unexecuted instantiation: cdef_block_sse4.c:v256_cmpeq_16 |
580 | | |
581 | 0 | SIMD_INLINE v256 v256_cmpgt_s32(v256 a, v256 b) { |
582 | 0 | return v256_from_v128(v128_cmpgt_s32(a.val[1], b.val[1]), |
583 | 0 | v128_cmpgt_s32(a.val[0], b.val[0])); |
584 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmpgt_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmpgt_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_cmpgt_s32 |
585 | | |
586 | 0 | SIMD_INLINE v256 v256_cmplt_s32(v256 a, v256 b) { |
587 | 0 | return v256_from_v128(v128_cmplt_s32(a.val[1], b.val[1]), |
588 | 0 | v128_cmplt_s32(a.val[0], b.val[0])); |
589 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmplt_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmplt_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_cmplt_s32 |
590 | | |
591 | 0 | SIMD_INLINE v256 v256_cmpeq_32(v256 a, v256 b) { |
592 | 0 | return v256_from_v128(v128_cmpeq_32(a.val[1], b.val[1]), |
593 | 0 | v128_cmpeq_32(a.val[0], b.val[0])); |
594 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_cmpeq_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_cmpeq_32 Unexecuted instantiation: cdef_block_sse4.c:v256_cmpeq_32 |
595 | | |
596 | 0 | SIMD_INLINE v256 v256_shuffle_8(v256 x, v256 pattern) { |
597 | 0 | #if HAVE_NEON |
598 | 0 | #if defined(__aarch64__) |
599 | 0 | uint8x16x2_t p = { { vreinterpretq_u8_s64(x.val[0]), |
600 | 0 | vreinterpretq_u8_s64(x.val[1]) } }; |
601 | 0 | return v256_from_v128( |
602 | 0 | vreinterpretq_s64_u8(vqtbl2q_u8(p, vreinterpretq_u8_s64(pattern.val[1]))), |
603 | 0 | vreinterpretq_s64_u8( |
604 | 0 | vqtbl2q_u8(p, vreinterpretq_u8_s64(pattern.val[0])))); |
605 | 0 | #else |
606 | 0 | uint8x8x4_t p = { { vget_low_u8(vreinterpretq_u8_s64(x.val[0])), |
607 | 0 | vget_high_u8(vreinterpretq_u8_s64(x.val[0])), |
608 | 0 | vget_low_u8(vreinterpretq_u8_s64(x.val[1])), |
609 | 0 | vget_high_u8(vreinterpretq_u8_s64(x.val[1])) } }; |
610 | 0 | return v256_from_64( |
611 | 0 | (uint64_t)vreinterpret_s64_u8( |
612 | 0 | vtbl4_u8(p, vreinterpret_u8_s64(vget_high_s64(pattern.val[1])))), |
613 | 0 | (uint64_t)vreinterpret_s64_u8( |
614 | 0 | vtbl4_u8(p, vreinterpret_u8_s64(vget_low_s64(pattern.val[1])))), |
615 | 0 | (uint64_t)vreinterpret_s64_u8( |
616 | 0 | vtbl4_u8(p, vreinterpret_u8_s64(vget_high_s64(pattern.val[0])))), |
617 | 0 | (uint64_t)vreinterpret_s64_u8( |
618 | 0 | vtbl4_u8(p, vreinterpret_u8_s64(vget_low_s64(pattern.val[0]))))); |
619 | 0 | #endif |
620 | 0 | #else |
621 | 0 | v128 c16 = v128_dup_8(16); |
622 | 0 | v128 maskhi = v128_cmplt_s8(pattern.val[1], c16); |
623 | 0 | v128 masklo = v128_cmplt_s8(pattern.val[0], c16); |
624 | 0 | return v256_from_v128( |
625 | 0 | v128_blend_8(v128_shuffle_8(x.val[1], v128_sub_8(pattern.val[1], c16)), |
626 | 0 | v128_shuffle_8(x.val[0], pattern.val[1]), maskhi), |
627 | 0 | v128_blend_8(v128_shuffle_8(x.val[1], v128_sub_8(pattern.val[0], c16)), |
628 | 0 | v128_shuffle_8(x.val[0], pattern.val[0]), masklo)); |
629 | 0 | #endif |
630 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shuffle_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_shuffle_8 Unexecuted instantiation: cdef_block_sse4.c:v256_shuffle_8 |
631 | | |
632 | 0 | SIMD_INLINE v256 v256_wideshuffle_8(v256 x, v256 y, v256 pattern) { |
633 | 0 | #if HAVE_NEON |
634 | 0 | #if defined(__aarch64__) |
635 | 0 | uint8x16x4_t p = { { |
636 | 0 | vreinterpretq_u8_s64(y.val[0]), |
637 | 0 | vreinterpretq_u8_s64(y.val[1]), |
638 | 0 | vreinterpretq_u8_s64(x.val[0]), |
639 | 0 | vreinterpretq_u8_s64(x.val[1]), |
640 | 0 | } }; |
641 | 0 | return v256_from_v128( |
642 | 0 | vreinterpretq_s64_u8(vqtbl4q_u8(p, vreinterpretq_u8_s64(pattern.val[1]))), |
643 | 0 | vreinterpretq_s64_u8( |
644 | 0 | vqtbl4q_u8(p, vreinterpretq_u8_s64(pattern.val[0])))); |
645 | 0 | #else |
646 | 0 | v256 c32 = v256_dup_8(32); |
647 | 0 | v256 p32 = v256_sub_8(pattern, c32); |
648 | 0 | uint8x8x4_t p = { { vget_low_u8(vreinterpretq_u8_s64(x.val[0])), |
649 | 0 | vget_high_u8(vreinterpretq_u8_s64(x.val[0])), |
650 | 0 | vget_low_u8(vreinterpretq_u8_s64(x.val[1])), |
651 | 0 | vget_high_u8(vreinterpretq_u8_s64(x.val[1])) } }; |
652 | 0 | uint8x8x4_t q = { { vget_low_u8(vreinterpretq_u8_s64(y.val[0])), |
653 | 0 | vget_high_u8(vreinterpretq_u8_s64(y.val[0])), |
654 | 0 | vget_low_u8(vreinterpretq_u8_s64(y.val[1])), |
655 | 0 | vget_high_u8(vreinterpretq_u8_s64(y.val[1])) } }; |
656 | 0 | v256 r1 = |
657 | 0 | v256_from_64((uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
658 | 0 | p, vreinterpret_u8_s64(vget_high_s64(p32.val[1])))), |
659 | 0 | (uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
660 | 0 | p, vreinterpret_u8_s64(vget_low_s64(p32.val[1])))), |
661 | 0 | (uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
662 | 0 | p, vreinterpret_u8_s64(vget_high_s64(p32.val[0])))), |
663 | 0 | (uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
664 | 0 | p, vreinterpret_u8_s64(vget_low_s64(p32.val[0]))))); |
665 | 0 | v256 r2 = |
666 | 0 | v256_from_64((uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
667 | 0 | q, vreinterpret_u8_s64(vget_high_s64(pattern.val[1])))), |
668 | 0 | (uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
669 | 0 | q, vreinterpret_u8_s64(vget_low_s64(pattern.val[1])))), |
670 | 0 | (uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
671 | 0 | q, vreinterpret_u8_s64(vget_high_s64(pattern.val[0])))), |
672 | 0 | (uint64_t)vreinterpret_s64_u8(vtbl4_u8( |
673 | 0 | q, vreinterpret_u8_s64(vget_low_s64(pattern.val[0]))))); |
674 | 0 | return v256_blend_8(r1, r2, v256_cmplt_s8(pattern, c32)); |
675 | 0 | #endif |
676 | 0 | #else |
677 | 0 | v128 c16 = v128_dup_8(16); |
678 | 0 | v128 c32 = v128_dup_8(32); |
679 | 0 | v128 c48 = v128_dup_8(48); |
680 | 0 | v128 maskhi16 = v128_cmpgt_s8(c16, pattern.val[1]); |
681 | 0 | v128 masklo16 = v128_cmpgt_s8(c16, pattern.val[0]); |
682 | 0 | v128 maskhi48 = v128_cmpgt_s8(c48, pattern.val[1]); |
683 | 0 | v128 masklo48 = v128_cmpgt_s8(c48, pattern.val[0]); |
684 | 0 | v256 r1 = v256_from_v128( |
685 | 0 | v128_blend_8(v128_shuffle_8(x.val[1], v128_sub_8(pattern.val[1], c48)), |
686 | 0 | v128_shuffle_8(x.val[0], v128_sub_8(pattern.val[1], c32)), |
687 | 0 | maskhi48), |
688 | 0 | v128_blend_8(v128_shuffle_8(x.val[1], v128_sub_8(pattern.val[0], c48)), |
689 | 0 | v128_shuffle_8(x.val[0], v128_sub_8(pattern.val[0], c32)), |
690 | 0 | masklo48)); |
691 | 0 | v256 r2 = v256_from_v128( |
692 | 0 | v128_blend_8(v128_shuffle_8(y.val[1], v128_sub_8(pattern.val[1], c16)), |
693 | 0 | v128_shuffle_8(y.val[0], pattern.val[1]), maskhi16), |
694 | 0 | v128_blend_8(v128_shuffle_8(y.val[1], v128_sub_8(pattern.val[0], c16)), |
695 | 0 | v128_shuffle_8(y.val[0], pattern.val[0]), masklo16)); |
696 | 0 | return v256_blend_8(r1, r2, v256_cmpgt_s8(v256_from_v128(c32, c32), pattern)); |
697 | 0 | #endif |
698 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_wideshuffle_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_wideshuffle_8 Unexecuted instantiation: cdef_block_sse4.c:v256_wideshuffle_8 |
699 | | |
700 | 0 | SIMD_INLINE v256 v256_pshuffle_8(v256 a, v256 pattern) { |
701 | 0 | return v256_from_v128( |
702 | 0 | v128_shuffle_8(v256_high_v128(a), v256_high_v128(pattern)), |
703 | 0 | v128_shuffle_8(v256_low_v128(a), v256_low_v128(pattern))); |
704 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_pshuffle_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_pshuffle_8 Unexecuted instantiation: cdef_block_sse4.c:v256_pshuffle_8 |
705 | | |
706 | 0 | SIMD_INLINE v256 v256_shl_8(v256 a, const unsigned int c) { |
707 | 0 | return v256_from_v128(v128_shl_8(a.val[1], c), v128_shl_8(a.val[0], c)); |
708 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shl_8 Unexecuted instantiation: cdef_block_ssse3.c:v256_shl_8 Unexecuted instantiation: cdef_block_sse4.c:v256_shl_8 |
709 | | |
710 | 0 | SIMD_INLINE v256 v256_shr_u8(v256 a, const unsigned int c) { |
711 | 0 | return v256_from_v128(v128_shr_u8(a.val[1], c), v128_shr_u8(a.val[0], c)); |
712 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_u8 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_u8 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_u8 |
713 | | |
714 | 0 | SIMD_INLINE v256 v256_shr_s8(v256 a, const unsigned int c) { |
715 | 0 | return v256_from_v128(v128_shr_s8(a.val[1], c), v128_shr_s8(a.val[0], c)); |
716 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_s8 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_s8 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_s8 |
717 | | |
718 | 0 | SIMD_INLINE v256 v256_shl_16(v256 a, const unsigned int c) { |
719 | 0 | return v256_from_v128(v128_shl_16(a.val[1], c), v128_shl_16(a.val[0], c)); |
720 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shl_16 Unexecuted instantiation: cdef_block_ssse3.c:v256_shl_16 Unexecuted instantiation: cdef_block_sse4.c:v256_shl_16 |
721 | | |
722 | 0 | SIMD_INLINE v256 v256_shr_u16(v256 a, const unsigned int c) { |
723 | 0 | return v256_from_v128(v128_shr_u16(a.val[1], c), v128_shr_u16(a.val[0], c)); |
724 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_u16 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_u16 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_u16 |
725 | | |
726 | 0 | SIMD_INLINE v256 v256_shr_s16(v256 a, const unsigned int c) { |
727 | 0 | return v256_from_v128(v128_shr_s16(a.val[1], c), v128_shr_s16(a.val[0], c)); |
728 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_s16 |
729 | | |
730 | 0 | SIMD_INLINE v256 v256_shl_32(v256 a, const unsigned int c) { |
731 | 0 | return v256_from_v128(v128_shl_32(a.val[1], c), v128_shl_32(a.val[0], c)); |
732 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shl_32 Unexecuted instantiation: cdef_block_ssse3.c:v256_shl_32 Unexecuted instantiation: cdef_block_sse4.c:v256_shl_32 |
733 | | |
734 | 0 | SIMD_INLINE v256 v256_shr_u32(v256 a, const unsigned int c) { |
735 | 0 | return v256_from_v128(v128_shr_u32(a.val[1], c), v128_shr_u32(a.val[0], c)); |
736 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_u32 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_u32 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_u32 |
737 | | |
738 | 0 | SIMD_INLINE v256 v256_shr_s32(v256 a, const unsigned int c) { |
739 | 0 | return v256_from_v128(v128_shr_s32(a.val[1], c), v128_shr_s32(a.val[0], c)); |
740 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_s32 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_s32 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_s32 |
741 | | |
742 | 0 | SIMD_INLINE v256 v256_shl_64(v256 a, const unsigned int c) { |
743 | 0 | return v256_from_v128(v128_shl_64(a.val[1], c), v128_shl_64(a.val[0], c)); |
744 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shl_64 Unexecuted instantiation: cdef_block_ssse3.c:v256_shl_64 Unexecuted instantiation: cdef_block_sse4.c:v256_shl_64 |
745 | | |
746 | 0 | SIMD_INLINE v256 v256_shr_u64(v256 a, const unsigned int c) { |
747 | 0 | return v256_from_v128(v128_shr_u64(a.val[1], c), v128_shr_u64(a.val[0], c)); |
748 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_u64 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_u64 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_u64 |
749 | | |
750 | 0 | SIMD_INLINE v256 v256_shr_s64(v256 a, const unsigned int c) { |
751 | 0 | return v256_from_v128(v128_shr_s64(a.val[1], c), v128_shr_s64(a.val[0], c)); |
752 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_shr_s64 Unexecuted instantiation: cdef_block_ssse3.c:v256_shr_s64 Unexecuted instantiation: cdef_block_sse4.c:v256_shr_s64 |
753 | | |
754 | | /* These intrinsics require immediate values, so we must use #defines |
755 | | to enforce that. */ |
756 | | #define v256_shl_n_byte(a, n) \ |
757 | | ((n) < 16 ? v256_from_v128(v128_or(v128_shl_n_byte(a.val[1], n), \ |
758 | | v128_shr_n_byte(a.val[0], 16 - (n))), \ |
759 | | v128_shl_n_byte(a.val[0], (n))) \ |
760 | | : v256_from_v128( \ |
761 | | (n) > 16 ? v128_shl_n_byte(a.val[0], (n) - 16) : a.val[0], \ |
762 | | v128_zero())) |
763 | | |
764 | | #define v256_shr_n_byte(a, n) \ |
765 | | (n == 0 \ |
766 | | ? a \ |
767 | | : ((n) < 16 \ |
768 | | ? v256_from_v128(v128_shr_n_byte(a.val[1], n), \ |
769 | | v128_or(v128_shr_n_byte(a.val[0], n), \ |
770 | | v128_shl_n_byte(a.val[1], 16 - (n)))) \ |
771 | | : v256_from_v128(v128_zero(), \ |
772 | | (n) > 16 ? v128_shr_n_byte(a.val[1], (n) - 16) \ |
773 | | : a.val[1]))) |
774 | | |
775 | | #define v256_align(a, b, c) \ |
776 | | ((c) ? v256_or(v256_shr_n_byte(b, c), v256_shl_n_byte(a, 32 - (c))) : b) |
777 | | |
778 | | #define v256_shl_n_8(a, n) \ |
779 | | v256_from_v128(v128_shl_n_8(a.val[1], n), v128_shl_n_8(a.val[0], n)) |
780 | | #define v256_shl_n_16(a, n) \ |
781 | | v256_from_v128(v128_shl_n_16(a.val[1], n), v128_shl_n_16(a.val[0], n)) |
782 | | #define v256_shl_n_32(a, n) \ |
783 | | v256_from_v128(v128_shl_n_32(a.val[1], n), v128_shl_n_32(a.val[0], n)) |
784 | | #define v256_shl_n_64(a, n) \ |
785 | | v256_from_v128(v128_shl_n_64(a.val[1], n), v128_shl_n_64(a.val[0], n)) |
786 | | #define v256_shr_n_u8(a, n) \ |
787 | | v256_from_v128(v128_shr_n_u8(a.val[1], n), v128_shr_n_u8(a.val[0], n)) |
788 | | #define v256_shr_n_u16(a, n) \ |
789 | | v256_from_v128(v128_shr_n_u16(a.val[1], n), v128_shr_n_u16(a.val[0], n)) |
790 | | #define v256_shr_n_u32(a, n) \ |
791 | | v256_from_v128(v128_shr_n_u32(a.val[1], n), v128_shr_n_u32(a.val[0], n)) |
792 | | #define v256_shr_n_u64(a, n) \ |
793 | | v256_from_v128(v128_shr_n_u64(a.val[1], n), v128_shr_n_u64(a.val[0], n)) |
794 | | #define v256_shr_n_s8(a, n) \ |
795 | | v256_from_v128(v128_shr_n_s8(a.val[1], n), v128_shr_n_s8(a.val[0], n)) |
796 | | #define v256_shr_n_s16(a, n) \ |
797 | 0 | v256_from_v128(v128_shr_n_s16(a.val[1], n), v128_shr_n_s16(a.val[0], n)) |
798 | | #define v256_shr_n_s32(a, n) \ |
799 | | v256_from_v128(v128_shr_n_s32(a.val[1], n), v128_shr_n_s32(a.val[0], n)) |
800 | | #define v256_shr_n_s64(a, n) \ |
801 | | v256_from_v128(v128_shr_n_s64(a.val[1], n), v128_shr_n_s64(a.val[0], n)) |
802 | | |
803 | | #define v256_shr_n_word(a, n) v256_shr_n_byte(a, 2 * (n)) |
804 | | #define v256_shl_n_word(a, n) v256_shl_n_byte(a, 2 * (n)) |
805 | | |
806 | | typedef struct { |
807 | | sad128_internal_u16 val[2]; |
808 | | } sad256_internal_u16; |
809 | | |
810 | 0 | SIMD_INLINE sad256_internal_u16 v256_sad_u16_init(void) { |
811 | 0 | sad256_internal_u16 t; |
812 | 0 | t.val[1] = v128_sad_u16_init(); |
813 | 0 | t.val[0] = v128_sad_u16_init(); |
814 | 0 | return t; |
815 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sad_u16_init Unexecuted instantiation: cdef_block_ssse3.c:v256_sad_u16_init Unexecuted instantiation: cdef_block_sse4.c:v256_sad_u16_init |
816 | | |
817 | | /* Implementation dependent return value. Result must be finalised with |
818 | | v256_sad_u16_sum(). |
819 | | The result for more than 16 v256_sad_u16() calls is undefined. */ |
820 | | SIMD_INLINE sad256_internal_u16 v256_sad_u16(sad256_internal_u16 s, v256 a, |
821 | 0 | v256 b) { |
822 | 0 | sad256_internal_u16 t; |
823 | 0 | t.val[1] = v128_sad_u16(s.val[1], a.val[1], b.val[1]); |
824 | 0 | t.val[0] = v128_sad_u16(s.val[0], a.val[0], b.val[0]); |
825 | 0 | return t; |
826 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sad_u16 Unexecuted instantiation: cdef_block_ssse3.c:v256_sad_u16 Unexecuted instantiation: cdef_block_sse4.c:v256_sad_u16 |
827 | | |
828 | 0 | SIMD_INLINE uint32_t v256_sad_u16_sum(sad256_internal_u16 s) { |
829 | 0 | return v128_sad_u16_sum(s.val[1]) + v128_sad_u16_sum(s.val[0]); |
830 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_sad_u16_sum Unexecuted instantiation: cdef_block_ssse3.c:v256_sad_u16_sum Unexecuted instantiation: cdef_block_sse4.c:v256_sad_u16_sum |
831 | | |
832 | | typedef struct { |
833 | | ssd128_internal_s16 val[2]; |
834 | | } ssd256_internal_s16; |
835 | | |
836 | 0 | SIMD_INLINE ssd256_internal_s16 v256_ssd_s16_init(void) { |
837 | 0 | ssd256_internal_s16 t; |
838 | 0 | t.val[1] = v128_ssd_s16_init(); |
839 | 0 | t.val[0] = v128_ssd_s16_init(); |
840 | 0 | return t; |
841 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssd_s16_init Unexecuted instantiation: cdef_block_ssse3.c:v256_ssd_s16_init Unexecuted instantiation: cdef_block_sse4.c:v256_ssd_s16_init |
842 | | |
843 | | /* Implementation dependent return value. Result must be finalised with |
844 | | * v256_ssd_s16_sum(). */ |
845 | | SIMD_INLINE ssd256_internal_s16 v256_ssd_s16(ssd256_internal_s16 s, v256 a, |
846 | 0 | v256 b) { |
847 | 0 | ssd256_internal_s16 t; |
848 | 0 | t.val[1] = v128_ssd_s16(s.val[1], a.val[1], b.val[1]); |
849 | 0 | t.val[0] = v128_ssd_s16(s.val[0], a.val[0], b.val[0]); |
850 | 0 | return t; |
851 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssd_s16 Unexecuted instantiation: cdef_block_ssse3.c:v256_ssd_s16 Unexecuted instantiation: cdef_block_sse4.c:v256_ssd_s16 |
852 | | |
853 | 0 | SIMD_INLINE uint64_t v256_ssd_s16_sum(ssd256_internal_s16 s) { |
854 | 0 | return v128_ssd_s16_sum(s.val[1]) + v128_ssd_s16_sum(s.val[0]); |
855 | 0 | } Unexecuted instantiation: cdef_block_sse2.c:v256_ssd_s16_sum Unexecuted instantiation: cdef_block_ssse3.c:v256_ssd_s16_sum Unexecuted instantiation: cdef_block_sse4.c:v256_ssd_s16_sum |
856 | | |
857 | | #endif // AVM_AVM_DSP_SIMD_V256_INTRINSICS_V128_H_ |