/src/avm/avm_dsp/x86/blend_mask_sse4.h
Line | Count | Source |
1 | | /* |
2 | | * Copyright (c) 2021, Alliance for Open Media. All rights reserved |
3 | | * |
4 | | * This source code is subject to the terms of the BSD 3-Clause Clear License |
5 | | * and the Alliance for Open Media Patent License 1.0. If the BSD 3-Clause Clear |
6 | | * License was not distributed with this source code in the LICENSE file, you |
7 | | * can obtain it at aomedia.org/license/software-license/bsd-3-c-c/. If the |
8 | | * Alliance for Open Media Patent License 1.0 was not distributed with this |
9 | | * source code in the PATENTS file, you can obtain it at |
10 | | * aomedia.org/license/patent-license/. |
11 | | */ |
12 | | |
13 | | #ifndef AVM_AVM_DSP_X86_BLEND_MASK_SSE4_H_ |
14 | | #define AVM_AVM_DSP_X86_BLEND_MASK_SSE4_H_ |
15 | | #include <smmintrin.h> // SSE4.1 |
16 | | |
17 | | #include <assert.h> |
18 | | |
19 | | #include "avm/avm_integer.h" |
20 | | #include "avm_ports/mem.h" |
21 | | #include "avm_dsp/avm_dsp_common.h" |
22 | | #include "avm_dsp/blend.h" |
23 | | |
24 | | #include "avm_dsp/x86/synonyms.h" |
25 | | |
26 | | #include "config/avm_dsp_rtcd.h" |
27 | | |
28 | | static INLINE void blend_a64_d16_mask_w4_sse41( |
29 | | uint8_t *dst, const CONV_BUF_TYPE *src0, const CONV_BUF_TYPE *src1, |
30 | | const __m128i *m, const __m128i *v_round_offset, const __m128i *v_maxval, |
31 | 0 | int shift) { |
32 | 0 | const __m128i max_minus_m = _mm_sub_epi16(*v_maxval, *m); |
33 | 0 | const __m128i s0 = xx_loadl_64(src0); |
34 | 0 | const __m128i s1 = xx_loadl_64(src1); |
35 | 0 | const __m128i s0_s1 = _mm_unpacklo_epi16(s0, s1); |
36 | 0 | const __m128i m_max_minus_m = _mm_unpacklo_epi16(*m, max_minus_m); |
37 | 0 | const __m128i res_a = _mm_madd_epi16(s0_s1, m_max_minus_m); |
38 | 0 | const __m128i res_c = _mm_sub_epi32(res_a, *v_round_offset); |
39 | 0 | const __m128i res_d = _mm_srai_epi32(res_c, shift); |
40 | 0 | const __m128i res_e = _mm_packs_epi32(res_d, res_d); |
41 | 0 | const __m128i res = _mm_packus_epi16(res_e, res_e); |
42 | 0 |
|
43 | 0 | xx_storel_32(dst, res); |
44 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:blend_a64_d16_mask_w4_sse41 Unexecuted instantiation: blend_a64_mask_avx2.c:blend_a64_d16_mask_w4_sse41 |
45 | | |
46 | | static INLINE void blend_a64_d16_mask_w8_sse41( |
47 | | uint8_t *dst, const CONV_BUF_TYPE *src0, const CONV_BUF_TYPE *src1, |
48 | | const __m128i *m, const __m128i *v_round_offset, const __m128i *v_maxval, |
49 | 0 | int shift) { |
50 | 0 | const __m128i max_minus_m = _mm_sub_epi16(*v_maxval, *m); |
51 | 0 | const __m128i s0 = xx_loadu_128(src0); |
52 | 0 | const __m128i s1 = xx_loadu_128(src1); |
53 | 0 | __m128i res_lo = _mm_madd_epi16(_mm_unpacklo_epi16(s0, s1), |
54 | 0 | _mm_unpacklo_epi16(*m, max_minus_m)); |
55 | 0 | __m128i res_hi = _mm_madd_epi16(_mm_unpackhi_epi16(s0, s1), |
56 | 0 | _mm_unpackhi_epi16(*m, max_minus_m)); |
57 | 0 | res_lo = _mm_srai_epi32(_mm_sub_epi32(res_lo, *v_round_offset), shift); |
58 | 0 | res_hi = _mm_srai_epi32(_mm_sub_epi32(res_hi, *v_round_offset), shift); |
59 | 0 | const __m128i res_e = _mm_packs_epi32(res_lo, res_hi); |
60 | 0 | const __m128i res = _mm_packus_epi16(res_e, res_e); |
61 | 0 |
|
62 | 0 | _mm_storel_epi64((__m128i *)(dst), res); |
63 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:blend_a64_d16_mask_w8_sse41 Unexecuted instantiation: blend_a64_mask_avx2.c:blend_a64_d16_mask_w8_sse41 |
64 | | |
65 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw0_subh0_w4_sse4_1( |
66 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
67 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
68 | | const uint8_t *mask, uint32_t mask_stride, int h, |
69 | 0 | const __m128i *round_offset, int shift) { |
70 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
71 | 0 | for (int i = 0; i < h; ++i) { |
72 | 0 | const __m128i m0 = xx_loadl_32(mask); |
73 | 0 | const __m128i m = _mm_cvtepu8_epi16(m0); |
74 | 0 |
|
75 | 0 | blend_a64_d16_mask_w4_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
76 | 0 | shift); |
77 | 0 | mask += mask_stride; |
78 | 0 | dst += dst_stride; |
79 | 0 | src0 += src0_stride; |
80 | 0 | src1 += src1_stride; |
81 | 0 | } |
82 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw0_subh0_w4_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw0_subh0_w4_sse4_1 |
83 | | |
84 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw0_subh0_w8_sse4_1( |
85 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
86 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
87 | | const uint8_t *mask, uint32_t mask_stride, int h, |
88 | 0 | const __m128i *round_offset, int shift) { |
89 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
90 | 0 | for (int i = 0; i < h; ++i) { |
91 | 0 | const __m128i m0 = xx_loadl_64(mask); |
92 | 0 | const __m128i m = _mm_cvtepu8_epi16(m0); |
93 | 0 | blend_a64_d16_mask_w8_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
94 | 0 | shift); |
95 | 0 | mask += mask_stride; |
96 | 0 | dst += dst_stride; |
97 | 0 | src0 += src0_stride; |
98 | 0 | src1 += src1_stride; |
99 | 0 | } |
100 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw0_subh0_w8_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw0_subh0_w8_sse4_1 |
101 | | |
102 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw1_subh1_w4_sse4_1( |
103 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
104 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
105 | | const uint8_t *mask, uint32_t mask_stride, int h, |
106 | 0 | const __m128i *round_offset, int shift) { |
107 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
108 | 0 | const __m128i one_b = _mm_set1_epi8(1); |
109 | 0 | const __m128i two_w = _mm_set1_epi16(2); |
110 | 0 | for (int i = 0; i < h; ++i) { |
111 | 0 | const __m128i m_i0 = xx_loadl_64(mask); |
112 | 0 | const __m128i m_i1 = xx_loadl_64(mask + mask_stride); |
113 | 0 | const __m128i m_ac = _mm_adds_epu8(m_i0, m_i1); |
114 | 0 | const __m128i m_acbd = _mm_maddubs_epi16(m_ac, one_b); |
115 | 0 | const __m128i m_acbd_2 = _mm_add_epi16(m_acbd, two_w); |
116 | 0 | const __m128i m = _mm_srli_epi16(m_acbd_2, 2); |
117 | 0 |
|
118 | 0 | blend_a64_d16_mask_w4_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
119 | 0 | shift); |
120 | 0 | mask += mask_stride << 1; |
121 | 0 | dst += dst_stride; |
122 | 0 | src0 += src0_stride; |
123 | 0 | src1 += src1_stride; |
124 | 0 | } |
125 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw1_subh1_w4_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw1_subh1_w4_sse4_1 |
126 | | |
127 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw1_subh1_w8_sse4_1( |
128 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
129 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
130 | | const uint8_t *mask, uint32_t mask_stride, int h, |
131 | 0 | const __m128i *round_offset, int shift) { |
132 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
133 | 0 | const __m128i one_b = _mm_set1_epi8(1); |
134 | 0 | const __m128i two_w = _mm_set1_epi16(2); |
135 | 0 | for (int i = 0; i < h; ++i) { |
136 | 0 | const __m128i m_i0 = xx_loadu_128(mask); |
137 | 0 | const __m128i m_i1 = xx_loadu_128(mask + mask_stride); |
138 | 0 | const __m128i m_ac = _mm_adds_epu8(m_i0, m_i1); |
139 | 0 | const __m128i m_acbd = _mm_maddubs_epi16(m_ac, one_b); |
140 | 0 | const __m128i m_acbd_2 = _mm_add_epi16(m_acbd, two_w); |
141 | 0 | const __m128i m = _mm_srli_epi16(m_acbd_2, 2); |
142 | 0 |
|
143 | 0 | blend_a64_d16_mask_w8_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
144 | 0 | shift); |
145 | 0 | mask += mask_stride << 1; |
146 | 0 | dst += dst_stride; |
147 | 0 | src0 += src0_stride; |
148 | 0 | src1 += src1_stride; |
149 | 0 | } |
150 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw1_subh1_w8_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw1_subh1_w8_sse4_1 |
151 | | |
152 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw1_subh0_w4_sse4_1( |
153 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
154 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
155 | | const uint8_t *mask, uint32_t mask_stride, int h, |
156 | 0 | const __m128i *round_offset, int shift) { |
157 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
158 | 0 | const __m128i one_b = _mm_set1_epi8(1); |
159 | 0 | const __m128i zeros = _mm_setzero_si128(); |
160 | 0 | for (int i = 0; i < h; ++i) { |
161 | 0 | const __m128i m_i0 = xx_loadl_64(mask); |
162 | 0 | const __m128i m_ac = _mm_maddubs_epi16(m_i0, one_b); |
163 | 0 | const __m128i m = _mm_avg_epu16(m_ac, zeros); |
164 | 0 |
|
165 | 0 | blend_a64_d16_mask_w4_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
166 | 0 | shift); |
167 | 0 | mask += mask_stride; |
168 | 0 | dst += dst_stride; |
169 | 0 | src0 += src0_stride; |
170 | 0 | src1 += src1_stride; |
171 | 0 | } |
172 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw1_subh0_w4_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw1_subh0_w4_sse4_1 |
173 | | |
174 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw1_subh0_w8_sse4_1( |
175 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
176 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
177 | | const uint8_t *mask, uint32_t mask_stride, int h, |
178 | 0 | const __m128i *round_offset, int shift) { |
179 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
180 | 0 | const __m128i one_b = _mm_set1_epi8(1); |
181 | 0 | const __m128i zeros = _mm_setzero_si128(); |
182 | 0 | for (int i = 0; i < h; ++i) { |
183 | 0 | const __m128i m_i0 = xx_loadu_128(mask); |
184 | 0 | const __m128i m_ac = _mm_maddubs_epi16(m_i0, one_b); |
185 | 0 | const __m128i m = _mm_avg_epu16(m_ac, zeros); |
186 | 0 |
|
187 | 0 | blend_a64_d16_mask_w8_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
188 | 0 | shift); |
189 | 0 | mask += mask_stride; |
190 | 0 | dst += dst_stride; |
191 | 0 | src0 += src0_stride; |
192 | 0 | src1 += src1_stride; |
193 | 0 | } |
194 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw1_subh0_w8_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw1_subh0_w8_sse4_1 |
195 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw0_subh1_w4_sse4_1( |
196 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
197 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
198 | | const uint8_t *mask, uint32_t mask_stride, int h, |
199 | 0 | const __m128i *round_offset, int shift) { |
200 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
201 | 0 | const __m128i zeros = _mm_setzero_si128(); |
202 | 0 | for (int i = 0; i < h; ++i) { |
203 | 0 | const __m128i m_i0 = xx_loadl_64(mask); |
204 | 0 | const __m128i m_i1 = xx_loadl_64(mask + mask_stride); |
205 | 0 | const __m128i m_ac = _mm_adds_epu8(m_i0, m_i1); |
206 | 0 | const __m128i m = _mm_cvtepu8_epi16(_mm_avg_epu8(m_ac, zeros)); |
207 | 0 |
|
208 | 0 | blend_a64_d16_mask_w4_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
209 | 0 | shift); |
210 | 0 | mask += mask_stride << 1; |
211 | 0 | dst += dst_stride; |
212 | 0 | src0 += src0_stride; |
213 | 0 | src1 += src1_stride; |
214 | 0 | } |
215 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw0_subh1_w4_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw0_subh1_w4_sse4_1 |
216 | | |
217 | | static INLINE void avm_lowbd_blend_a64_d16_mask_subw0_subh1_w8_sse4_1( |
218 | | uint8_t *dst, uint32_t dst_stride, const CONV_BUF_TYPE *src0, |
219 | | uint32_t src0_stride, const CONV_BUF_TYPE *src1, uint32_t src1_stride, |
220 | | const uint8_t *mask, uint32_t mask_stride, int h, |
221 | 0 | const __m128i *round_offset, int shift) { |
222 | 0 | const __m128i v_maxval = _mm_set1_epi16(AVM_BLEND_A64_MAX_ALPHA); |
223 | 0 | const __m128i zeros = _mm_setzero_si128(); |
224 | 0 | for (int i = 0; i < h; ++i) { |
225 | 0 | const __m128i m_i0 = xx_loadl_64(mask); |
226 | 0 | const __m128i m_i1 = xx_loadl_64(mask + mask_stride); |
227 | 0 | const __m128i m_ac = _mm_adds_epu8(m_i0, m_i1); |
228 | 0 | const __m128i m = _mm_cvtepu8_epi16(_mm_avg_epu8(m_ac, zeros)); |
229 | 0 |
|
230 | 0 | blend_a64_d16_mask_w8_sse41(dst, src0, src1, &m, round_offset, &v_maxval, |
231 | 0 | shift); |
232 | 0 | mask += mask_stride << 1; |
233 | 0 | dst += dst_stride; |
234 | 0 | src0 += src0_stride; |
235 | 0 | src1 += src1_stride; |
236 | 0 | } |
237 | 0 | } Unexecuted instantiation: blend_a64_mask_sse4.c:avm_lowbd_blend_a64_d16_mask_subw0_subh1_w8_sse4_1 Unexecuted instantiation: blend_a64_mask_avx2.c:avm_lowbd_blend_a64_d16_mask_subw0_subh1_w8_sse4_1 |
238 | | #endif // AVM_AVM_DSP_X86_BLEND_MASK_SSE4_H_ |