Coverage Report

Created: 2023-08-28 06:23

/src/binutils-gdb/opcodes/h8300-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* Disassemble h8300 instructions.
2
   Copyright (C) 1993-2023 Free Software Foundation, Inc.
3
4
   This file is part of the GNU opcodes library.
5
6
   This library is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3, or (at your option)
9
   any later version.
10
11
   It is distributed in the hope that it will be useful, but WITHOUT
12
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14
   License for more details.
15
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19
   MA 02110-1301, USA.  */
20
21
#define DEFINE_TABLE
22
23
#include "sysdep.h"
24
0
#define h8_opcodes h8ops
25
#include "opcode/h8300.h"
26
#include "disassemble.h"
27
#include "opintl.h"
28
#include "libiberty.h"
29
30
struct h8_instruction
31
{
32
  unsigned int length;
33
  const struct h8_opcode *opcode;
34
};
35
36
struct h8_instruction *h8_instructions;
37
38
/* Run through the opcodes and sort them into order to make them easy
39
   to disassemble.  */
40
41
static void
42
bfd_h8_disassemble_init (void)
43
0
{
44
0
  unsigned int i;
45
0
  unsigned int nopcodes;
46
0
  const struct h8_opcode *p;
47
0
  struct h8_instruction *pi;
48
49
0
  nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
50
51
0
  h8_instructions = xmalloc (nopcodes * sizeof (struct h8_instruction));
52
53
0
  for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
54
0
    {
55
      /* Just make sure there are an even number of nibbles in it, and
56
   that the count is the same as the length.  */
57
0
      for (i = 0; p->data.nib[i] != (op_type) E; i++)
58
0
  ;
59
0
      OPCODES_ASSERT (!(i & 1));
60
61
0
      pi->length = i / 2;
62
0
      pi->opcode = p;
63
0
    }
64
65
  /* Add entry for the NULL vector terminator.  */
66
0
  pi->length = 0;
67
0
  pi->opcode = p;
68
0
}
69
70
static void
71
extract_immediate (FILE *stream,
72
       op_type looking_for,
73
       int thisnib,
74
       unsigned char *data,
75
       int *cst,
76
       int *len,
77
       const struct h8_opcode *q)
78
0
{
79
0
  switch (looking_for & SIZE)
80
0
    {
81
0
    case L_2:
82
0
      *len = 2;
83
0
      *cst = thisnib & 3;
84
85
      /* DISP2 special treatment.  */
86
0
      if ((looking_for & MODE) == DISP)
87
0
  {
88
0
    if (OP_KIND (q->how) == O_MOVAB
89
0
        || OP_KIND (q->how) == O_MOVAW
90
0
        || OP_KIND (q->how) == O_MOVAL)
91
0
      {
92
        /* Handling for mova insn.  */
93
0
        switch (q->args.nib[0] & MODE)
94
0
    {
95
0
    case INDEXB:
96
0
    default:
97
0
      break;
98
0
    case INDEXW:
99
0
      *cst *= 2;
100
0
      break;
101
0
    case INDEXL:
102
0
      *cst *= 4;
103
0
      break;
104
0
    }
105
0
      }
106
0
    else
107
0
      {
108
        /* Handling for non-mova insn.  */
109
0
        switch (OP_SIZE (q->how))
110
0
    {
111
0
    default: break;
112
0
    case SW:
113
0
      *cst *= 2;
114
0
      break;
115
0
    case SL:
116
0
      *cst *= 4;
117
0
      break;
118
0
    }
119
0
      }
120
0
  }
121
0
      break;
122
0
    case L_8:
123
0
      *len = 8;
124
0
      *cst = data[0];
125
0
      break;
126
0
    case L_16:
127
0
    case L_16U:
128
0
      *len = 16;
129
0
      *cst = (data[0] << 8) + data [1];
130
#if 0
131
      if ((looking_for & SIZE) == L_16)
132
  *cst = (short) *cst;  /* Sign extend.  */
133
#endif
134
0
      break;
135
0
    case L_32:
136
0
      *len = 32;
137
0
      *cst = (((unsigned) data[0] << 24) + (data[1] << 16)
138
0
        + (data[2] << 8) + data[3]);
139
0
      break;
140
0
    default:
141
0
      *len = 0;
142
0
      *cst = 0;
143
0
      fprintf (stream, "DISP bad size\n");
144
0
      break;
145
0
    }
146
0
}
147
148
static const char *regnames[] =
149
{
150
  "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
151
  "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
152
};
153
static const char *wregnames[] =
154
{
155
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
156
  "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
157
};
158
static const char *lregnames[] =
159
{
160
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
161
  "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
162
};
163
static const char *cregnames[] =
164
{
165
  "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
166
};
167
168
static void
169
print_one_arg (disassemble_info *info,
170
         bfd_vma addr,
171
         op_type x,
172
         int cst,
173
         int cstlen,
174
         int rdisp_n,
175
         int rn,
176
         const char **pregnames,
177
         int len)
178
0
{
179
0
  void * stream = info->stream;
180
0
  fprintf_ftype outfn = info->fprintf_func;
181
182
0
  if ((x & SIZE) == L_3 || (x & SIZE) == L_3NZ)
183
0
    outfn (stream, "#0x%x", (unsigned) cst);
184
0
  else if ((x & MODE) == IMM)
185
0
    outfn (stream, "#0x%x", (unsigned) cst);
186
0
  else if ((x & MODE) == DBIT || (x & MODE) == KBIT)
187
0
    outfn (stream, "#%d", (unsigned) cst);
188
0
  else if ((x & MODE) == CONST_2)
189
0
    outfn (stream, "#2");
190
0
  else if ((x & MODE) == CONST_4)
191
0
    outfn (stream, "#4");
192
0
  else if ((x & MODE) == CONST_8)
193
0
    outfn (stream, "#8");
194
0
  else if ((x & MODE) == CONST_16)
195
0
    outfn (stream, "#16");
196
0
  else if ((x & MODE) == REG)
197
0
    {
198
0
      switch (x & SIZE)
199
0
  {
200
0
  case L_8:
201
0
    outfn (stream, "%s", regnames[rn]);
202
0
    break;
203
0
  case L_16:
204
0
  case L_16U:
205
0
    outfn (stream, "%s", wregnames[rn]);
206
0
    break;
207
0
  case L_P:
208
0
  case L_32:
209
0
    outfn (stream, "%s", lregnames[rn]);
210
0
    break;
211
0
  }
212
0
    }
213
0
  else if ((x & MODE) == LOWREG)
214
0
    {
215
0
      switch (x & SIZE)
216
0
  {
217
0
  case L_8:
218
    /* Always take low half of reg.  */
219
0
    outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
220
0
    break;
221
0
  case L_16:
222
0
  case L_16U:
223
    /* Always take low half of reg.  */
224
0
    outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
225
0
    break;
226
0
  case L_P:
227
0
  case L_32:
228
0
    outfn (stream, "%s.l", lregnames[rn]);
229
0
    break;
230
0
  }
231
0
    }
232
0
  else if ((x & MODE) == POSTINC)
233
0
    outfn (stream, "@%s+", pregnames[rn]);
234
235
0
  else if ((x & MODE) == POSTDEC)
236
0
    outfn (stream, "@%s-", pregnames[rn]);
237
238
0
  else if ((x & MODE) == PREINC)
239
0
    outfn (stream, "@+%s", pregnames[rn]);
240
241
0
  else if ((x & MODE) == PREDEC)
242
0
    outfn (stream, "@-%s", pregnames[rn]);
243
244
0
  else if ((x & MODE) == IND)
245
0
    outfn (stream, "@%s", pregnames[rn]);
246
247
0
  else if ((x & MODE) == ABS || (x & ABSJMP))
248
0
    outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
249
250
0
  else if ((x & MODE) == MEMIND)
251
0
    outfn (stream, "@@%d (0x%x)", cst, cst);
252
253
0
  else if ((x & MODE) == VECIND)
254
0
    {
255
      /* FIXME Multiplier should be 2 or 4, depending on processor mode,
256
   by which is meant "normal" vs. "middle", "advanced", "maximum".  */
257
258
0
      int offset = (cst + 0x80) * 4;
259
0
      outfn (stream, "@@%d (0x%x)", offset, offset);
260
0
    }
261
0
  else if ((x & MODE) == PCREL)
262
0
    {
263
0
      if ((x & SIZE) == L_16 ||
264
0
    (x & SIZE) == L_16U)
265
0
  {
266
0
    outfn (stream, ".%s%d (0x%lx)",
267
0
       (short) cst > 0 ? "+" : "",
268
0
       (short) cst,
269
0
       (long)(addr + (short) cst + len));
270
0
  }
271
0
      else
272
0
  {
273
0
    outfn (stream, ".%s%d (0x%lx)",
274
0
       (char) cst > 0 ? "+" : "",
275
0
       (char) cst,
276
0
       (long)(addr + (char) cst + len));
277
0
  }
278
0
    }
279
0
  else if ((x & MODE) == DISP)
280
0
    outfn (stream, "@(0x%x:%d,%s)", cst, cstlen, pregnames[rdisp_n]);
281
282
0
  else if ((x & MODE) == INDEXB)
283
    /* Always take low half of reg.  */
284
0
    outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
285
0
     regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
286
287
0
  else if ((x & MODE) == INDEXW)
288
    /* Always take low half of reg.  */
289
0
    outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
290
0
     wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
291
292
0
  else if ((x & MODE) == INDEXL)
293
0
    outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen, lregnames[rdisp_n]);
294
295
0
  else if (x & CTRL)
296
0
    outfn (stream, "%s", cregnames[rn]);
297
298
0
  else if ((x & MODE) == CCR)
299
0
    outfn (stream, "ccr");
300
301
0
  else if ((x & MODE) == EXR)
302
0
    outfn (stream, "exr");
303
304
0
  else if ((x & MODE) == MACREG)
305
0
    outfn (stream, "mac%c", cst ? 'l' : 'h');
306
307
0
  else
308
    /* xgettext:c-format */
309
0
    outfn (stream, _("Hmmmm 0x%x"), x);
310
0
}
311
312
static unsigned int
313
bfd_h8_disassemble (bfd_vma addr, disassemble_info *info, int mach)
314
0
{
315
  /* Find the first entry in the table for this opcode.  */
316
0
  int regno[3] = { 0, 0, 0 };
317
0
  int dispregno[3] = { 0, 0, 0 };
318
0
  int cst[3] = { 0, 0, 0 };
319
0
  int cstlen[3] = { 0, 0, 0 };
320
0
  static bool init = 0;
321
0
  const struct h8_instruction *qi;
322
0
  char const **pregnames = mach != 0 ? lregnames : wregnames;
323
0
  int status;
324
0
  unsigned int maxlen;
325
0
  unsigned char data[MAX_CODE_NIBBLES / 2];
326
0
  void *stream = info->stream;
327
0
  fprintf_ftype outfn = info->fprintf_func;
328
329
0
  if (!init)
330
0
    {
331
0
      bfd_h8_disassemble_init ();
332
0
      init = 1;
333
0
    }
334
335
0
  status = info->read_memory_func (addr, data, 2, info);
336
0
  if (status != 0)
337
0
    {
338
0
      info->memory_error_func (status, addr, info);
339
0
      return -1;
340
0
    }
341
342
0
  for (maxlen = 2; maxlen < sizeof (data); maxlen += 2)
343
0
    {
344
0
      status = info->read_memory_func (addr + maxlen, data + maxlen, 2, info);
345
0
      if (status != 0)
346
0
  break;
347
0
    }
348
349
  /* Find the exact opcode/arg combo.  */
350
0
  for (qi = h8_instructions; qi->opcode->name; qi++)
351
0
    {
352
0
      const struct h8_opcode *q;
353
0
      const op_type *nib;
354
0
      unsigned int len;
355
0
      op_type looking_for;
356
357
0
      if (qi->length > maxlen)
358
0
  continue;
359
360
0
      q = qi->opcode;
361
0
      nib = q->data.nib;
362
0
      len = 0;
363
0
      while ((looking_for = *nib) != (op_type) E)
364
0
  {
365
0
    int thisnib;
366
0
    int opnr;
367
368
0
    OPCODES_ASSERT (len / 2 < maxlen);
369
0
    thisnib = data[len / 2];
370
0
    thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
371
0
    opnr = ((looking_for & OP3) == OP3 ? 2
372
0
      : (looking_for & DST) == DST ? 1 : 0);
373
374
0
    if (looking_for < 16 && looking_for >= 0)
375
0
      {
376
0
        if (looking_for != thisnib)
377
0
    goto fail;
378
0
      }
379
0
    else
380
0
      {
381
0
        if ((int) looking_for & (int) B31)
382
0
    {
383
0
      if (!((thisnib & 0x8) != 0))
384
0
        goto fail;
385
386
0
      looking_for = (op_type) ((int) looking_for & ~(int) B31);
387
0
      thisnib &= 0x7;
388
0
    }
389
0
        else if ((int) looking_for & (int) B30)
390
0
    {
391
0
      if (!((thisnib & 0x8) == 0))
392
0
        goto fail;
393
394
0
      looking_for = (op_type) ((int) looking_for & ~(int) B30);
395
0
    }
396
397
0
        if ((int) looking_for & (int) B21)
398
0
    {
399
0
      if (!((thisnib & 0x4) != 0))
400
0
        goto fail;
401
402
0
      looking_for = (op_type) ((int) looking_for & ~(int) B21);
403
0
      thisnib &= 0xb;
404
0
    }
405
0
        else if ((int) looking_for & (int) B20)
406
0
    {
407
0
      if (!((thisnib & 0x4) == 0))
408
0
        goto fail;
409
410
0
      looking_for = (op_type) ((int) looking_for & ~(int) B20);
411
0
    }
412
0
        if ((int) looking_for & (int) B11)
413
0
    {
414
0
      if (!((thisnib & 0x2) != 0))
415
0
        goto fail;
416
417
0
      looking_for = (op_type) ((int) looking_for & ~(int) B11);
418
0
      thisnib &= 0xd;
419
0
    }
420
0
        else if ((int) looking_for & (int) B10)
421
0
    {
422
0
      if (!((thisnib & 0x2) == 0))
423
0
        goto fail;
424
425
0
      looking_for = (op_type) ((int) looking_for & ~(int) B10);
426
0
    }
427
428
0
        if ((int) looking_for & (int) B01)
429
0
    {
430
0
      if (!((thisnib & 0x1) != 0))
431
0
        goto fail;
432
433
0
      looking_for = (op_type) ((int) looking_for & ~(int) B01);
434
0
      thisnib &= 0xe;
435
0
    }
436
0
        else if ((int) looking_for & (int) B00)
437
0
    {
438
0
      if (!((thisnib & 0x1) == 0))
439
0
        goto fail;
440
441
0
      looking_for = (op_type) ((int) looking_for & ~(int) B00);
442
0
    }
443
444
0
        if (looking_for & IGNORE)
445
0
    {
446
      /* Hitachi has declared that IGNORE must be zero.  */
447
0
      if (thisnib != 0)
448
0
        goto fail;
449
0
    }
450
0
        else if ((looking_for & MODE) == DATA)
451
0
    {
452
0
      ;     /* Skip embedded data.  */
453
0
    }
454
0
        else if ((looking_for & MODE) == DBIT)
455
0
    {
456
      /* Exclude adds/subs by looking at bit 0 and 2, and
457
                     make sure the operand size, either w or l,
458
                     matches by looking at bit 1.  */
459
0
      if ((looking_for & 7) != (thisnib & 7))
460
0
        goto fail;
461
462
0
      cst[opnr] = (thisnib & 0x8) ? 2 : 1;
463
0
    }
464
0
        else if ((looking_for & MODE) == DISP
465
0
           || (looking_for & MODE) == ABS
466
0
           || (looking_for & MODE) == PCREL
467
0
           || (looking_for & MODE) == INDEXB
468
0
           || (looking_for & MODE) == INDEXW
469
0
           || (looking_for & MODE) == INDEXL)
470
0
    {
471
0
      int extra;
472
0
      switch (looking_for & SIZE)
473
0
        {
474
0
        case L_16:
475
0
        case L_16U:
476
0
          extra = 1;
477
0
          break;
478
0
        case L_32:
479
0
          extra = 3;
480
0
          break;
481
0
        default:
482
0
          extra = 0;
483
0
          break;
484
0
        }
485
0
      OPCODES_ASSERT (len / 2 + extra < maxlen);
486
0
      extract_immediate (stream, looking_for, thisnib,
487
0
             data + len / 2, cst + opnr,
488
0
             cstlen + opnr, q);
489
      /* Even address == bra, odd == bra/s.  */
490
0
      if (q->how == O (O_BRAS, SB))
491
0
        cst[opnr] -= 1;
492
0
    }
493
0
        else if ((looking_for & MODE) == REG
494
0
           || (looking_for & MODE) == LOWREG
495
0
           || (looking_for & MODE) == IND
496
0
           || (looking_for & MODE) == PREINC
497
0
           || (looking_for & MODE) == POSTINC
498
0
           || (looking_for & MODE) == PREDEC
499
0
           || (looking_for & MODE) == POSTDEC)
500
0
    {
501
0
      regno[opnr] = thisnib;
502
0
    }
503
0
        else if (looking_for & CTRL) /* Control Register.  */
504
0
    {
505
0
      thisnib &= 7;
506
0
      if (((looking_for & MODE) == CCR  && (thisnib != C_CCR))
507
0
          || ((looking_for & MODE) == EXR  && (thisnib != C_EXR))
508
0
          || ((looking_for & MODE) == MACH && (thisnib != C_MACH))
509
0
          || ((looking_for & MODE) == MACL && (thisnib != C_MACL))
510
0
          || ((looking_for & MODE) == VBR  && (thisnib != C_VBR))
511
0
          || ((looking_for & MODE) == SBR  && (thisnib != C_SBR)))
512
0
        goto fail;
513
0
      if (((looking_for & MODE) == CCR_EXR
514
0
           && (thisnib != C_CCR && thisnib != C_EXR))
515
0
          || ((looking_for & MODE) == VBR_SBR
516
0
        && (thisnib != C_VBR && thisnib != C_SBR))
517
0
          || ((looking_for & MODE) == MACREG
518
0
        && (thisnib != C_MACH && thisnib != C_MACL)))
519
0
        goto fail;
520
0
      if (((looking_for & MODE) == CC_EX_VB_SB
521
0
           && (thisnib != C_CCR && thisnib != C_EXR
522
0
         && thisnib != C_VBR && thisnib != C_SBR)))
523
0
        goto fail;
524
525
0
      regno[opnr] = thisnib;
526
0
    }
527
0
        else if ((looking_for & SIZE) == L_5)
528
0
    {
529
0
      cst[opnr] = data[len / 2] & 31;
530
0
      cstlen[opnr] = 5;
531
0
    }
532
0
        else if ((looking_for & SIZE) == L_4)
533
0
    {
534
0
      cst[opnr] = thisnib;
535
0
      cstlen[opnr] = 4;
536
0
    }
537
0
        else if ((looking_for & SIZE) == L_16
538
0
           || (looking_for & SIZE) == L_16U)
539
0
    {
540
0
      OPCODES_ASSERT (len / 2 + 1 < maxlen);
541
0
      cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
542
0
      cstlen[opnr] = 16;
543
0
    }
544
0
        else if ((looking_for & MODE) == MEMIND)
545
0
    {
546
0
      cst[opnr] = data[1];
547
0
    }
548
0
        else if ((looking_for & MODE) == VECIND)
549
0
    {
550
0
      cst[opnr] = data[1] & 0x7f;
551
0
    }
552
0
        else if ((looking_for & SIZE) == L_32)
553
0
    {
554
0
      unsigned int i = len / 2;
555
556
0
      OPCODES_ASSERT (i + 3 < maxlen);
557
0
      cst[opnr] = (((unsigned) data[i] << 24)
558
0
             | (data[i + 1] << 16)
559
0
             | (data[i + 2] << 8)
560
0
             | (data[i + 3]));
561
562
0
      cstlen[opnr] = 32;
563
0
    }
564
0
        else if ((looking_for & SIZE) == L_24)
565
0
    {
566
0
      unsigned int i = len / 2;
567
568
0
      OPCODES_ASSERT (i + 2 < maxlen);
569
0
      cst[opnr] =
570
0
        (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
571
0
      cstlen[opnr] = 24;
572
0
    }
573
0
        else if (looking_for & DISPREG)
574
0
    {
575
0
      dispregno[opnr] = thisnib & 7;
576
0
    }
577
0
        else if ((looking_for & MODE) == KBIT)
578
0
    {
579
0
      switch (thisnib)
580
0
        {
581
0
        case 9:
582
0
          cst[opnr] = 4;
583
0
          break;
584
0
        case 8:
585
0
          cst[opnr] = 2;
586
0
          break;
587
0
        case 0:
588
0
          cst[opnr] = 1;
589
0
          break;
590
0
        default:
591
0
          goto fail;
592
0
        }
593
0
    }
594
0
        else if ((looking_for & SIZE) == L_8)
595
0
    {
596
0
      cstlen[opnr] = 8;
597
0
      cst[opnr] = data[len / 2];
598
0
    }
599
0
        else if ((looking_for & SIZE) == L_3
600
0
           || (looking_for & SIZE) == L_3NZ)
601
0
    {
602
0
      cst[opnr] = thisnib & 0x7;
603
0
      if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
604
0
        goto fail;
605
0
    }
606
0
        else if ((looking_for & SIZE) == L_2)
607
0
    {
608
0
      cstlen[opnr] = 2;
609
0
      cst[opnr] = thisnib & 0x3;
610
0
    }
611
0
        else if ((looking_for & MODE) == MACREG)
612
0
    {
613
0
      cst[opnr] = (thisnib == 3);
614
0
    }
615
0
        else
616
    /* xgettext:c-format */
617
0
    outfn (stream, _("Don't understand 0x%x \n"), looking_for);
618
0
      }
619
620
0
    len++;
621
0
    nib++;
622
0
  }
623
624
0
      outfn (stream, "%s\t", q->name);
625
626
      /* Gross.  Disgusting.  */
627
0
      if (strcmp (q->name, "ldm.l") == 0)
628
0
  {
629
0
    int count, high;
630
631
0
    count = (data[1] / 16) & 0x3;
632
0
    high = regno[1];
633
634
0
    outfn (stream, "@sp+,er%d-er%d", high - count, high);
635
0
    return qi->length;
636
0
  }
637
638
0
      if (strcmp (q->name, "stm.l") == 0)
639
0
  {
640
0
    int count, low;
641
642
0
    count = (data[1] / 16) & 0x3;
643
0
    low = regno[0];
644
645
0
    outfn (stream, "er%d-er%d,@-sp", low, low + count);
646
0
    return qi->length;
647
0
  }
648
0
      if (strcmp (q->name, "rte/l") == 0
649
0
    || strcmp (q->name, "rts/l") == 0)
650
0
  {
651
0
    if (regno[0] == 0)
652
0
      outfn (stream, "er%d", regno[1]);
653
0
    else
654
0
      outfn (stream, "er%d-er%d", regno[1] - regno[0],
655
0
       regno[1]);
656
0
    return qi->length;
657
0
  }
658
0
      if (startswith (q->name, "mova"))
659
0
  {
660
0
    const op_type *args = q->args.nib;
661
662
0
    if (args[1] == (op_type) E)
663
0
      {
664
        /* Short form.  */
665
0
        print_one_arg (info, addr, args[0], cst[0],
666
0
           cstlen[0], dispregno[0], regno[0],
667
0
           pregnames, qi->length);
668
0
        outfn (stream, ",er%d", dispregno[0]);
669
0
      }
670
0
    else
671
0
      {
672
0
        outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
673
0
        print_one_arg (info, addr, args[1], cst[1],
674
0
           cstlen[1], dispregno[1], regno[1],
675
0
           pregnames, qi->length);
676
0
        outfn (stream, ".%c),",
677
0
         (args[0] & MODE) == INDEXB ? 'b' : 'w');
678
0
        print_one_arg (info, addr, args[2], cst[2],
679
0
           cstlen[2], dispregno[2], regno[2],
680
0
           pregnames, qi->length);
681
0
      }
682
0
    return qi->length;
683
0
  }
684
      /* Fill in the args.  */
685
0
      {
686
0
  const op_type *args = q->args.nib;
687
0
  int hadone = 0;
688
0
  int nargs;
689
690
  /* Special case handling for the adds and subs instructions
691
     since in H8 mode thay can only take the r0-r7 registers
692
     but in other (higher) modes they can take the er0-er7
693
     registers as well.  */
694
0
  if (strcmp (qi->opcode->name, "adds") == 0
695
0
      || strcmp (qi->opcode->name, "subs") == 0)
696
0
    {
697
0
      outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
698
0
      return qi->length;
699
0
    }
700
701
0
  for (nargs = 0;
702
0
       nargs < 3 && args[nargs] != (op_type) E;
703
0
       nargs++)
704
0
    {
705
0
      int x = args[nargs];
706
707
0
      if (hadone)
708
0
        outfn (stream, ",");
709
710
0
      print_one_arg (info, addr, x,
711
0
         cst[nargs], cstlen[nargs],
712
0
         dispregno[nargs], regno[nargs],
713
0
         pregnames, qi->length);
714
715
0
      hadone = 1;
716
0
    }
717
0
      }
718
0
      return qi->length;
719
720
0
    fail:
721
0
      ;
722
0
    }
723
724
  /* Fell off the end.  */
725
0
  outfn (stream, ".word\tH'%x,H'%x", data[0], data[1]);
726
0
  return 2;
727
0
}
728
729
int
730
print_insn_h8300 (bfd_vma addr, disassemble_info *info)
731
0
{
732
0
  return bfd_h8_disassemble (addr, info, 0);
733
0
}
734
735
int
736
print_insn_h8300h (bfd_vma addr, disassemble_info *info)
737
0
{
738
0
  return bfd_h8_disassemble (addr, info, 1);
739
0
}
740
741
int
742
print_insn_h8300s (bfd_vma addr, disassemble_info *info)
743
0
{
744
0
  return bfd_h8_disassemble (addr, info, 2);
745
0
}