Coverage Report

Created: 2023-08-28 06:23

/src/binutils-gdb/opcodes/spu-dis.c
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Source (jump to first uncovered line)
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/* Disassemble SPU instructions
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   Copyright (C) 2006-2023 Free Software Foundation, Inc.
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   This file is part of the GNU opcodes library.
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   This library is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3, or (at your option)
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   any later version.
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   It is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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   License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this file; see the file COPYING.  If not, write to the
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   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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   MA 02110-1301, USA.  */
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#include "sysdep.h"
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#include <stdio.h>
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#include "disassemble.h"
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#include "opcode/spu.h"
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/* This file provides a disassembler function which uses
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   the disassembler interface defined in dis-asm.h.   */
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extern const struct spu_opcode spu_opcodes[];
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extern const int spu_num_opcodes;
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static const struct spu_opcode *spu_disassemble_table[(1<<11)];
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static void
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init_spu_disassemble (void)
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0
{
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0
  int i;
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  /* If two instructions have the same opcode then we prefer the first
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   * one.  In most cases it is just an alternate mnemonic. */
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0
  for (i = 0; i < spu_num_opcodes; i++)
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0
    {
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0
      int o = spu_opcodes[i].opcode;
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0
      if (o >= (1 << 11))
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0
  abort ();
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0
      if (spu_disassemble_table[o] == 0)
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0
  spu_disassemble_table[o] = &spu_opcodes[i];
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0
    }
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0
}
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/* Determine the instruction from the 10 least significant bits. */
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static const struct spu_opcode *
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get_index_for_opcode (unsigned int insn)
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0
{
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0
  const struct spu_opcode *op_index;
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0
  unsigned int opcode = insn >> (32-11);
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  /* Init the table.  This assumes that element 0/opcode 0 (currently
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   * NOP) is always used */
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0
  if (spu_disassemble_table[0] == 0)
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0
    init_spu_disassemble ();
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0
  if ((op_index = spu_disassemble_table[opcode & 0x780]) != 0
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0
      && op_index->insn_type == RRR)
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0
    return op_index;
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0
  if ((op_index = spu_disassemble_table[opcode & 0x7f0]) != 0
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0
      && (op_index->insn_type == RI18 || op_index->insn_type == LBT))
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0
    return op_index;
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0
  if ((op_index = spu_disassemble_table[opcode & 0x7f8]) != 0
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0
      && op_index->insn_type == RI10)
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0
    return op_index;
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0
  if ((op_index = spu_disassemble_table[opcode & 0x7fc]) != 0
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0
      && (op_index->insn_type == RI16))
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0
    return op_index;
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0
  if ((op_index = spu_disassemble_table[opcode & 0x7fe]) != 0
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0
      && (op_index->insn_type == RI8))
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0
    return op_index;
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0
  if ((op_index = spu_disassemble_table[opcode & 0x7ff]) != 0)
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0
    return op_index;
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0
  return 0;
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0
}
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/* Print a Spu instruction.  */
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int
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print_insn_spu (bfd_vma memaddr, struct disassemble_info *info)
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0
{
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0
  bfd_byte buffer[4];
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0
  int value;
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0
  int hex_value;
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0
  int status;
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0
  unsigned int insn;
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0
  const struct spu_opcode *op_index;
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0
  enum spu_insns tag;
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0
  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
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0
  if (status != 0)
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0
    {
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0
      (*info->memory_error_func) (status, memaddr, info);
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0
      return -1;
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0
    }
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0
  insn = bfd_getb32 (buffer);
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0
  op_index = get_index_for_opcode (insn);
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0
  if (op_index == 0)
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0
    {
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0
      (*info->fprintf_func) (info->stream, ".long 0x%x", insn);
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0
    }
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0
  else
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0
    {
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0
      int i;
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0
      int paren = 0;
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0
      tag = (enum spu_insns)(op_index - spu_opcodes);
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0
      (*info->fprintf_func) (info->stream, "%s", op_index->mnemonic);
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0
      if (tag == M_BI || tag == M_BISL || tag == M_IRET || tag == M_BISLED
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0
    || tag == M_BIHNZ || tag == M_BIHZ || tag == M_BINZ || tag == M_BIZ
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0
          || tag == M_SYNC || tag == M_HBR)
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0
  {
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0
    int fb = (insn >> (32-18)) & 0x7f;
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0
    if (fb & 0x40)
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0
      (*info->fprintf_func) (info->stream, tag == M_SYNC ? "c" : "p");
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0
    if (fb & 0x20)
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0
      (*info->fprintf_func) (info->stream, "d");
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0
    if (fb & 0x10)
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0
      (*info->fprintf_func) (info->stream, "e");
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0
  }
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0
      if (op_index->arg[0] != 0)
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0
  (*info->fprintf_func) (info->stream, "\t");
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0
      hex_value = 0;
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0
      for (i = 1;  i <= op_index->arg[0]; i++)
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0
  {
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0
    int arg = op_index->arg[i];
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0
    if (arg != A_P && !paren && i > 1)
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0
      (*info->fprintf_func) (info->stream, ",");
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0
    switch (arg)
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0
      {
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0
      case A_T:
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0
        (*info->fprintf_func) (info->stream, "$%d",
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0
             DECODE_INSN_RT (insn));
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0
        break;
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0
      case A_A:
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0
        (*info->fprintf_func) (info->stream, "$%d",
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0
             DECODE_INSN_RA (insn));
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0
        break;
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0
      case A_B:
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0
        (*info->fprintf_func) (info->stream, "$%d",
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0
             DECODE_INSN_RB (insn));
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0
        break;
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0
      case A_C:
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0
        (*info->fprintf_func) (info->stream, "$%d",
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0
             DECODE_INSN_RC (insn));
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0
        break;
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0
      case A_S:
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0
        (*info->fprintf_func) (info->stream, "$sp%d",
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0
             DECODE_INSN_RA (insn));
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0
        break;
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0
      case A_H:
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0
        (*info->fprintf_func) (info->stream, "$ch%d",
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0
             DECODE_INSN_RA (insn));
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0
        break;
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0
      case A_P:
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0
        paren++;
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0
        (*info->fprintf_func) (info->stream, "(");
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0
        break;
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0
      case A_U7A:
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0
        (*info->fprintf_func) (info->stream, "%d",
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0
             173 - DECODE_INSN_U8 (insn));
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0
        break;
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0
      case A_U7B:
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0
        (*info->fprintf_func) (info->stream, "%d",
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0
             155 - DECODE_INSN_U8 (insn));
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0
        break;
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0
      case A_S3:
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0
      case A_S6:
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0
      case A_S7:
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0
      case A_S7N:
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0
      case A_U3:
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0
      case A_U5:
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0
      case A_U6:
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0
      case A_U7:
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0
        hex_value = DECODE_INSN_I7 (insn);
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0
        (*info->fprintf_func) (info->stream, "%d", hex_value);
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0
        break;
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0
      case A_S11:
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0
        (*info->print_address_func) (memaddr + DECODE_INSN_I9a (insn) * 4,
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0
             info);
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0
        break;
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0
      case A_S11I:
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0
        (*info->print_address_func) (memaddr + DECODE_INSN_I9b (insn) * 4,
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0
             info);
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0
        break;
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0
      case A_S10:
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0
      case A_S10B:
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0
        hex_value = DECODE_INSN_I10 (insn);
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0
        (*info->fprintf_func) (info->stream, "%d", hex_value);
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0
        break;
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0
      case A_S14:
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0
        hex_value = DECODE_INSN_I10 (insn) * 16;
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0
        (*info->fprintf_func) (info->stream, "%d", hex_value);
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0
        break;
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0
      case A_S16:
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0
        hex_value = DECODE_INSN_I16 (insn);
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0
        (*info->fprintf_func) (info->stream, "%d", hex_value);
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0
        break;
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0
      case A_X16:
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0
        hex_value = DECODE_INSN_U16 (insn);
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0
        (*info->fprintf_func) (info->stream, "%u", hex_value);
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0
        break;
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0
      case A_R18:
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0
        value = DECODE_INSN_I16 (insn) * 4;
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0
        if (value == 0)
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0
    (*info->fprintf_func) (info->stream, "%d", value);
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0
        else
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0
    {
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0
      hex_value = memaddr + value;
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0
      (*info->print_address_func) (hex_value & 0x3ffff, info);
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0
    }
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0
        break;
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0
      case A_S18:
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0
        value = DECODE_INSN_U16 (insn) * 4;
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0
        if (value == 0)
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0
    (*info->fprintf_func) (info->stream, "%d", value);
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0
        else
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0
    (*info->print_address_func) (value, info);
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0
        break;
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0
      case A_U18:
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0
        value = DECODE_INSN_U18 (insn);
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0
        if (value == 0 || !(*info->symbol_at_address_func)(0, info))
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0
    {
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0
      hex_value = value;
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0
      (*info->fprintf_func) (info->stream, "%u", value);
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0
    }
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0
        else
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0
    (*info->print_address_func) (value, info);
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0
        break;
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0
      case A_U14:
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0
        hex_value = DECODE_INSN_U14 (insn);
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0
        (*info->fprintf_func) (info->stream, "%u", hex_value);
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0
        break;
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0
      }
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0
    if (arg != A_P && paren)
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0
      {
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0
        (*info->fprintf_func) (info->stream, ")");
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0
        paren--;
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0
      }
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0
  }
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0
      if (hex_value > 16)
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0
  (*info->fprintf_func) (info->stream, "\t# %x", hex_value);
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0
    }
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0
  return 4;
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0
}