/src/binutils-gdb/opcodes/disassemble.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* Select disassembly routine for specified architecture. |
2 | | Copyright (C) 1994-2023 Free Software Foundation, Inc. |
3 | | |
4 | | This file is part of the GNU opcodes library. |
5 | | |
6 | | This library is free software; you can redistribute it and/or modify |
7 | | it under the terms of the GNU General Public License as published by |
8 | | the Free Software Foundation; either version 3 of the License, or |
9 | | (at your option) any later version. |
10 | | |
11 | | This program is distributed in the hope that it will be useful, |
12 | | but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 | | GNU General Public License for more details. |
15 | | |
16 | | You should have received a copy of the GNU General Public License |
17 | | along with this program; if not, write to the Free Software |
18 | | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | | MA 02110-1301, USA. */ |
20 | | |
21 | | #include "sysdep.h" |
22 | | #include "disassemble.h" |
23 | | #include "safe-ctype.h" |
24 | | #include "opintl.h" |
25 | | |
26 | | #ifdef ARCH_all |
27 | | #ifdef BFD64 |
28 | | #define ARCH_aarch64 |
29 | | #define ARCH_alpha |
30 | | #define ARCH_bpf |
31 | | #define ARCH_ia64 |
32 | | #define ARCH_loongarch |
33 | | #define ARCH_mips |
34 | | #define ARCH_mmix |
35 | | #define ARCH_nfp |
36 | | #define ARCH_riscv |
37 | | #define ARCH_score |
38 | | #define ARCH_tilegx |
39 | | #endif |
40 | | #define ARCH_arc |
41 | | #define ARCH_arm |
42 | | #define ARCH_avr |
43 | | #define ARCH_bfin |
44 | | #define ARCH_cr16 |
45 | | #define ARCH_cris |
46 | | #define ARCH_crx |
47 | | #define ARCH_csky |
48 | | #define ARCH_d10v |
49 | | #define ARCH_d30v |
50 | | #define ARCH_dlx |
51 | | #define ARCH_epiphany |
52 | | #define ARCH_fr30 |
53 | | #define ARCH_frv |
54 | | #define ARCH_ft32 |
55 | | #define ARCH_h8300 |
56 | | #define ARCH_hppa |
57 | | #define ARCH_i386 |
58 | | #define ARCH_ip2k |
59 | | #define ARCH_iq2000 |
60 | | #define ARCH_kvx |
61 | | #define ARCH_lm32 |
62 | | #define ARCH_m32c |
63 | | #define ARCH_m32r |
64 | | #define ARCH_m68hc11 |
65 | | #define ARCH_m68hc12 |
66 | | #define ARCH_m68k |
67 | | #define ARCH_mcore |
68 | | #define ARCH_mep |
69 | | #define ARCH_metag |
70 | | #define ARCH_microblaze |
71 | | #define ARCH_mn10200 |
72 | | #define ARCH_mn10300 |
73 | | #define ARCH_moxie |
74 | | #define ARCH_mt |
75 | | #define ARCH_msp430 |
76 | | #define ARCH_nds32 |
77 | | #define ARCH_nios2 |
78 | | #define ARCH_ns32k |
79 | | #define ARCH_or1k |
80 | | #define ARCH_pdp11 |
81 | | #define ARCH_pj |
82 | | #define ARCH_powerpc |
83 | | #define ARCH_pru |
84 | | #define ARCH_rs6000 |
85 | | #define ARCH_rl78 |
86 | | #define ARCH_rx |
87 | | #define ARCH_s12z |
88 | | #define ARCH_s390 |
89 | | #define ARCH_sh |
90 | | #define ARCH_sparc |
91 | | #define ARCH_spu |
92 | | #define ARCH_tic30 |
93 | | #define ARCH_tic4x |
94 | | #define ARCH_tic54x |
95 | | #define ARCH_tic6x |
96 | | #define ARCH_tilepro |
97 | | #define ARCH_v850 |
98 | | #define ARCH_vax |
99 | | #define ARCH_visium |
100 | | #define ARCH_wasm32 |
101 | | #define ARCH_xstormy16 |
102 | | #define ARCH_xgate |
103 | | #define ARCH_xtensa |
104 | | #define ARCH_z80 |
105 | | #define ARCH_z8k |
106 | | #endif |
107 | | |
108 | | #ifdef ARCH_m32c |
109 | | #include "m32c-desc.h" |
110 | | #endif |
111 | | |
112 | | disassembler_ftype |
113 | | disassembler (enum bfd_architecture a, |
114 | | bool big ATTRIBUTE_UNUSED, |
115 | | unsigned long mach ATTRIBUTE_UNUSED, |
116 | | bfd *abfd ATTRIBUTE_UNUSED) |
117 | 19.3k | { |
118 | 19.3k | disassembler_ftype disassemble; |
119 | | |
120 | 19.3k | switch (a) |
121 | 19.3k | { |
122 | | /* If you add a case to this table, also add it to the |
123 | | ARCH_all definition right above this function. */ |
124 | 0 | #ifdef ARCH_aarch64 |
125 | 4.55k | case bfd_arch_aarch64: |
126 | 4.55k | disassemble = print_insn_aarch64; |
127 | 4.55k | break; |
128 | 0 | #endif |
129 | 0 | #ifdef ARCH_alpha |
130 | 157 | case bfd_arch_alpha: |
131 | 157 | disassemble = print_insn_alpha; |
132 | 157 | break; |
133 | 0 | #endif |
134 | 0 | #ifdef ARCH_arc |
135 | 38 | case bfd_arch_arc: |
136 | 38 | disassemble = arc_get_disassembler (abfd); |
137 | 38 | break; |
138 | 0 | #endif |
139 | 0 | #ifdef ARCH_arm |
140 | 586 | case bfd_arch_arm: |
141 | 586 | if (big) |
142 | 517 | disassemble = print_insn_big_arm; |
143 | 69 | else |
144 | 69 | disassemble = print_insn_little_arm; |
145 | 586 | break; |
146 | 0 | #endif |
147 | 0 | #ifdef ARCH_avr |
148 | 6 | case bfd_arch_avr: |
149 | 6 | disassemble = print_insn_avr; |
150 | 6 | break; |
151 | 0 | #endif |
152 | 0 | #ifdef ARCH_bfin |
153 | 0 | case bfd_arch_bfin: |
154 | 0 | disassemble = print_insn_bfin; |
155 | 0 | break; |
156 | 0 | #endif |
157 | 0 | #ifdef ARCH_cr16 |
158 | 0 | case bfd_arch_cr16: |
159 | 0 | disassemble = print_insn_cr16; |
160 | 0 | break; |
161 | 0 | #endif |
162 | 0 | #ifdef ARCH_cris |
163 | 1 | case bfd_arch_cris: |
164 | 1 | disassemble = cris_get_disassembler (abfd); |
165 | 1 | break; |
166 | 0 | #endif |
167 | 0 | #ifdef ARCH_crx |
168 | 0 | case bfd_arch_crx: |
169 | 0 | disassemble = print_insn_crx; |
170 | 0 | break; |
171 | 0 | #endif |
172 | 0 | #ifdef ARCH_csky |
173 | 273 | case bfd_arch_csky: |
174 | 273 | disassemble = csky_get_disassembler (abfd); |
175 | 273 | break; |
176 | 0 | #endif |
177 | | |
178 | 0 | #ifdef ARCH_d10v |
179 | 62 | case bfd_arch_d10v: |
180 | 62 | disassemble = print_insn_d10v; |
181 | 62 | break; |
182 | 0 | #endif |
183 | 0 | #ifdef ARCH_d30v |
184 | 135 | case bfd_arch_d30v: |
185 | 135 | disassemble = print_insn_d30v; |
186 | 135 | break; |
187 | 0 | #endif |
188 | 0 | #ifdef ARCH_dlx |
189 | 0 | case bfd_arch_dlx: |
190 | | /* As far as I know we only handle big-endian DLX objects. */ |
191 | 0 | disassemble = print_insn_dlx; |
192 | 0 | break; |
193 | 0 | #endif |
194 | 0 | #ifdef ARCH_h8300 |
195 | 203 | case bfd_arch_h8300: |
196 | 203 | if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn) |
197 | 0 | disassemble = print_insn_h8300h; |
198 | 203 | else if (mach == bfd_mach_h8300s |
199 | 203 | || mach == bfd_mach_h8300sn |
200 | 203 | || mach == bfd_mach_h8300sx |
201 | 203 | || mach == bfd_mach_h8300sxn) |
202 | 0 | disassemble = print_insn_h8300s; |
203 | 203 | else |
204 | 203 | disassemble = print_insn_h8300; |
205 | 203 | break; |
206 | 0 | #endif |
207 | 0 | #ifdef ARCH_hppa |
208 | 238 | case bfd_arch_hppa: |
209 | 238 | disassemble = print_insn_hppa; |
210 | 238 | break; |
211 | 0 | #endif |
212 | 0 | #ifdef ARCH_i386 |
213 | 2.20k | case bfd_arch_i386: |
214 | 2.20k | case bfd_arch_iamcu: |
215 | 2.20k | disassemble = print_insn_i386; |
216 | 2.20k | break; |
217 | 0 | #endif |
218 | 0 | #ifdef ARCH_ia64 |
219 | 310 | case bfd_arch_ia64: |
220 | 310 | disassemble = print_insn_ia64; |
221 | 310 | break; |
222 | 0 | #endif |
223 | 0 | #ifdef ARCH_ip2k |
224 | 37 | case bfd_arch_ip2k: |
225 | 37 | disassemble = print_insn_ip2k; |
226 | 37 | break; |
227 | 0 | #endif |
228 | 0 | #ifdef ARCH_bpf |
229 | 28 | case bfd_arch_bpf: |
230 | 28 | disassemble = print_insn_bpf; |
231 | 28 | break; |
232 | 0 | #endif |
233 | 0 | #ifdef ARCH_epiphany |
234 | 0 | case bfd_arch_epiphany: |
235 | 0 | disassemble = print_insn_epiphany; |
236 | 0 | break; |
237 | 0 | #endif |
238 | 0 | #ifdef ARCH_fr30 |
239 | 95 | case bfd_arch_fr30: |
240 | 95 | disassemble = print_insn_fr30; |
241 | 95 | break; |
242 | 0 | #endif |
243 | 0 | #ifdef ARCH_kvx |
244 | 0 | case bfd_arch_kvx: |
245 | 0 | disassemble = print_insn_kvx; |
246 | 0 | break; |
247 | 0 | #endif |
248 | 0 | #ifdef ARCH_lm32 |
249 | 57 | case bfd_arch_lm32: |
250 | 57 | disassemble = print_insn_lm32; |
251 | 57 | break; |
252 | 0 | #endif |
253 | 0 | #ifdef ARCH_m32r |
254 | 102 | case bfd_arch_m32r: |
255 | 102 | disassemble = print_insn_m32r; |
256 | 102 | break; |
257 | 0 | #endif |
258 | 0 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \ |
259 | 0 | || defined(ARCH_9s12x) || defined(ARCH_m9s12xg) |
260 | 23 | case bfd_arch_m68hc11: |
261 | 23 | disassemble = print_insn_m68hc11; |
262 | 23 | break; |
263 | 111 | case bfd_arch_m68hc12: |
264 | 111 | disassemble = print_insn_m68hc12; |
265 | 111 | break; |
266 | 0 | case bfd_arch_m9s12x: |
267 | 0 | disassemble = print_insn_m9s12x; |
268 | 0 | break; |
269 | 0 | case bfd_arch_m9s12xg: |
270 | 0 | disassemble = print_insn_m9s12xg; |
271 | 0 | break; |
272 | 0 | #endif |
273 | 0 | #if defined(ARCH_s12z) |
274 | 0 | case bfd_arch_s12z: |
275 | 0 | disassemble = print_insn_s12z; |
276 | 0 | break; |
277 | 0 | #endif |
278 | 0 | #ifdef ARCH_m68k |
279 | 400 | case bfd_arch_m68k: |
280 | 400 | disassemble = print_insn_m68k; |
281 | 400 | break; |
282 | 0 | #endif |
283 | 0 | #ifdef ARCH_mt |
284 | 62 | case bfd_arch_mt: |
285 | 62 | disassemble = print_insn_mt; |
286 | 62 | break; |
287 | 0 | #endif |
288 | 0 | #ifdef ARCH_microblaze |
289 | 37 | case bfd_arch_microblaze: |
290 | 37 | disassemble = print_insn_microblaze; |
291 | 37 | break; |
292 | 0 | #endif |
293 | 0 | #ifdef ARCH_msp430 |
294 | 0 | case bfd_arch_msp430: |
295 | 0 | disassemble = print_insn_msp430; |
296 | 0 | break; |
297 | 0 | #endif |
298 | 0 | #ifdef ARCH_nds32 |
299 | 387 | case bfd_arch_nds32: |
300 | 387 | disassemble = print_insn_nds32; |
301 | 387 | break; |
302 | 0 | #endif |
303 | 0 | #ifdef ARCH_nfp |
304 | 234 | case bfd_arch_nfp: |
305 | 234 | disassemble = print_insn_nfp; |
306 | 234 | break; |
307 | 0 | #endif |
308 | 0 | #ifdef ARCH_ns32k |
309 | 448 | case bfd_arch_ns32k: |
310 | 448 | disassemble = print_insn_ns32k; |
311 | 448 | break; |
312 | 0 | #endif |
313 | 0 | #ifdef ARCH_mcore |
314 | 139 | case bfd_arch_mcore: |
315 | 139 | disassemble = print_insn_mcore; |
316 | 139 | break; |
317 | 0 | #endif |
318 | 0 | #ifdef ARCH_mep |
319 | 0 | case bfd_arch_mep: |
320 | 0 | disassemble = print_insn_mep; |
321 | 0 | break; |
322 | 0 | #endif |
323 | 0 | #ifdef ARCH_metag |
324 | 0 | case bfd_arch_metag: |
325 | 0 | disassemble = print_insn_metag; |
326 | 0 | break; |
327 | 0 | #endif |
328 | 0 | #ifdef ARCH_mips |
329 | 623 | case bfd_arch_mips: |
330 | 623 | if (big) |
331 | 243 | disassemble = print_insn_big_mips; |
332 | 380 | else |
333 | 380 | disassemble = print_insn_little_mips; |
334 | 623 | break; |
335 | 0 | #endif |
336 | 0 | #ifdef ARCH_mmix |
337 | 0 | case bfd_arch_mmix: |
338 | 0 | disassemble = print_insn_mmix; |
339 | 0 | break; |
340 | 0 | #endif |
341 | 0 | #ifdef ARCH_mn10200 |
342 | 1 | case bfd_arch_mn10200: |
343 | 1 | disassemble = print_insn_mn10200; |
344 | 1 | break; |
345 | 0 | #endif |
346 | 0 | #ifdef ARCH_mn10300 |
347 | 1 | case bfd_arch_mn10300: |
348 | 1 | disassemble = print_insn_mn10300; |
349 | 1 | break; |
350 | 0 | #endif |
351 | 0 | #ifdef ARCH_nios2 |
352 | 84 | case bfd_arch_nios2: |
353 | 84 | if (big) |
354 | 84 | disassemble = print_insn_big_nios2; |
355 | 0 | else |
356 | 0 | disassemble = print_insn_little_nios2; |
357 | 84 | break; |
358 | 0 | #endif |
359 | 0 | #ifdef ARCH_or1k |
360 | 50 | case bfd_arch_or1k: |
361 | 50 | disassemble = print_insn_or1k; |
362 | 50 | break; |
363 | 0 | #endif |
364 | 0 | #ifdef ARCH_pdp11 |
365 | 344 | case bfd_arch_pdp11: |
366 | 344 | disassemble = print_insn_pdp11; |
367 | 344 | break; |
368 | 0 | #endif |
369 | 0 | #ifdef ARCH_pj |
370 | 0 | case bfd_arch_pj: |
371 | 0 | disassemble = print_insn_pj; |
372 | 0 | break; |
373 | 0 | #endif |
374 | 0 | #ifdef ARCH_powerpc |
375 | 368 | case bfd_arch_powerpc: |
376 | 368 | #endif |
377 | 368 | #ifdef ARCH_rs6000 |
378 | 653 | case bfd_arch_rs6000: |
379 | 653 | #endif |
380 | 653 | #if defined ARCH_powerpc || defined ARCH_rs6000 |
381 | 653 | if (big) |
382 | 599 | disassemble = print_insn_big_powerpc; |
383 | 54 | else |
384 | 54 | disassemble = print_insn_little_powerpc; |
385 | 653 | break; |
386 | 0 | #endif |
387 | 0 | #ifdef ARCH_pru |
388 | 0 | case bfd_arch_pru: |
389 | 0 | disassemble = print_insn_pru; |
390 | 0 | break; |
391 | 0 | #endif |
392 | 0 | #ifdef ARCH_riscv |
393 | 212 | case bfd_arch_riscv: |
394 | 212 | disassemble = riscv_get_disassembler (abfd); |
395 | 212 | break; |
396 | 0 | #endif |
397 | 0 | #ifdef ARCH_rl78 |
398 | 1 | case bfd_arch_rl78: |
399 | 1 | disassemble = rl78_get_disassembler (abfd); |
400 | 1 | break; |
401 | 0 | #endif |
402 | 0 | #ifdef ARCH_rx |
403 | 2.13k | case bfd_arch_rx: |
404 | 2.13k | disassemble = print_insn_rx; |
405 | 2.13k | break; |
406 | 0 | #endif |
407 | 0 | #ifdef ARCH_s390 |
408 | 66 | case bfd_arch_s390: |
409 | 66 | disassemble = print_insn_s390; |
410 | 66 | break; |
411 | 0 | #endif |
412 | 0 | #ifdef ARCH_score |
413 | 198 | case bfd_arch_score: |
414 | 198 | if (big) |
415 | 197 | disassemble = print_insn_big_score; |
416 | 1 | else |
417 | 1 | disassemble = print_insn_little_score; |
418 | 198 | break; |
419 | 0 | #endif |
420 | 0 | #ifdef ARCH_sh |
421 | 527 | case bfd_arch_sh: |
422 | 527 | disassemble = print_insn_sh; |
423 | 527 | break; |
424 | 0 | #endif |
425 | 0 | #ifdef ARCH_sparc |
426 | 151 | case bfd_arch_sparc: |
427 | 151 | disassemble = print_insn_sparc; |
428 | 151 | break; |
429 | 0 | #endif |
430 | 0 | #ifdef ARCH_spu |
431 | 105 | case bfd_arch_spu: |
432 | 105 | disassemble = print_insn_spu; |
433 | 105 | break; |
434 | 0 | #endif |
435 | 0 | #ifdef ARCH_tic30 |
436 | 252 | case bfd_arch_tic30: |
437 | 252 | disassemble = print_insn_tic30; |
438 | 252 | break; |
439 | 0 | #endif |
440 | 0 | #ifdef ARCH_tic4x |
441 | 0 | case bfd_arch_tic4x: |
442 | 0 | disassemble = print_insn_tic4x; |
443 | 0 | break; |
444 | 0 | #endif |
445 | 0 | #ifdef ARCH_tic54x |
446 | 298 | case bfd_arch_tic54x: |
447 | 298 | disassemble = print_insn_tic54x; |
448 | 298 | break; |
449 | 0 | #endif |
450 | 0 | #ifdef ARCH_tic6x |
451 | 259 | case bfd_arch_tic6x: |
452 | 259 | disassemble = print_insn_tic6x; |
453 | 259 | break; |
454 | 0 | #endif |
455 | 0 | #ifdef ARCH_ft32 |
456 | 0 | case bfd_arch_ft32: |
457 | 0 | disassemble = print_insn_ft32; |
458 | 0 | break; |
459 | 0 | #endif |
460 | 0 | #ifdef ARCH_v850 |
461 | 1 | case bfd_arch_v850: |
462 | 1 | case bfd_arch_v850_rh850: |
463 | 1 | disassemble = print_insn_v850; |
464 | 1 | break; |
465 | 0 | #endif |
466 | 0 | #ifdef ARCH_wasm32 |
467 | 66 | case bfd_arch_wasm32: |
468 | 66 | disassemble = print_insn_wasm32; |
469 | 66 | break; |
470 | 0 | #endif |
471 | 0 | #ifdef ARCH_xgate |
472 | 35 | case bfd_arch_xgate: |
473 | 35 | disassemble = print_insn_xgate; |
474 | 35 | break; |
475 | 0 | #endif |
476 | 0 | #ifdef ARCH_xstormy16 |
477 | 0 | case bfd_arch_xstormy16: |
478 | 0 | disassemble = print_insn_xstormy16; |
479 | 0 | break; |
480 | 0 | #endif |
481 | 0 | #ifdef ARCH_xtensa |
482 | 910 | case bfd_arch_xtensa: |
483 | 910 | disassemble = print_insn_xtensa; |
484 | 910 | break; |
485 | 0 | #endif |
486 | 0 | #ifdef ARCH_z80 |
487 | 141 | case bfd_arch_z80: |
488 | 141 | disassemble = print_insn_z80; |
489 | 141 | break; |
490 | 0 | #endif |
491 | 0 | #ifdef ARCH_z8k |
492 | 214 | case bfd_arch_z8k: |
493 | 214 | if (mach == bfd_mach_z8001) |
494 | 204 | disassemble = print_insn_z8001; |
495 | 10 | else |
496 | 10 | disassemble = print_insn_z8002; |
497 | 214 | break; |
498 | 0 | #endif |
499 | 0 | #ifdef ARCH_vax |
500 | 265 | case bfd_arch_vax: |
501 | 265 | disassemble = print_insn_vax; |
502 | 265 | break; |
503 | 0 | #endif |
504 | 0 | #ifdef ARCH_visium |
505 | 116 | case bfd_arch_visium: |
506 | 116 | disassemble = print_insn_visium; |
507 | 116 | break; |
508 | 0 | #endif |
509 | 0 | #ifdef ARCH_frv |
510 | 0 | case bfd_arch_frv: |
511 | 0 | disassemble = print_insn_frv; |
512 | 0 | break; |
513 | 0 | #endif |
514 | 0 | #ifdef ARCH_moxie |
515 | 30 | case bfd_arch_moxie: |
516 | 30 | disassemble = print_insn_moxie; |
517 | 30 | break; |
518 | 0 | #endif |
519 | 0 | #ifdef ARCH_iq2000 |
520 | 0 | case bfd_arch_iq2000: |
521 | 0 | disassemble = print_insn_iq2000; |
522 | 0 | break; |
523 | 0 | #endif |
524 | 0 | #ifdef ARCH_m32c |
525 | 0 | case bfd_arch_m32c: |
526 | 0 | disassemble = print_insn_m32c; |
527 | 0 | break; |
528 | 0 | #endif |
529 | 0 | #ifdef ARCH_tilegx |
530 | 80 | case bfd_arch_tilegx: |
531 | 80 | disassemble = print_insn_tilegx; |
532 | 80 | break; |
533 | 0 | #endif |
534 | 0 | #ifdef ARCH_tilepro |
535 | 1 | case bfd_arch_tilepro: |
536 | 1 | disassemble = print_insn_tilepro; |
537 | 1 | break; |
538 | 0 | #endif |
539 | 0 | #ifdef ARCH_loongarch |
540 | 143 | case bfd_arch_loongarch: |
541 | 143 | disassemble = print_insn_loongarch; |
542 | 143 | break; |
543 | 0 | #endif |
544 | 458 | default: |
545 | 458 | return 0; |
546 | 19.3k | } |
547 | 18.8k | return disassemble; |
548 | 19.3k | } |
549 | | |
550 | | void |
551 | | disassembler_usage (FILE *stream ATTRIBUTE_UNUSED) |
552 | 0 | { |
553 | 0 | #ifdef ARCH_aarch64 |
554 | 0 | print_aarch64_disassembler_options (stream); |
555 | 0 | #endif |
556 | 0 | #ifdef ARCH_arc |
557 | 0 | print_arc_disassembler_options (stream); |
558 | 0 | #endif |
559 | 0 | #ifdef ARCH_arm |
560 | 0 | print_arm_disassembler_options (stream); |
561 | 0 | #endif |
562 | 0 | #ifdef ARCH_mips |
563 | 0 | print_mips_disassembler_options (stream); |
564 | 0 | #endif |
565 | 0 | #ifdef ARCH_nfp |
566 | 0 | print_nfp_disassembler_options (stream); |
567 | 0 | #endif |
568 | 0 | #ifdef ARCH_powerpc |
569 | 0 | print_ppc_disassembler_options (stream); |
570 | 0 | #endif |
571 | 0 | #ifdef ARCH_riscv |
572 | 0 | print_riscv_disassembler_options (stream); |
573 | 0 | #endif |
574 | 0 | #ifdef ARCH_i386 |
575 | 0 | print_i386_disassembler_options (stream); |
576 | 0 | #endif |
577 | 0 | #ifdef ARCH_kvx |
578 | 0 | print_kvx_disassembler_options (stream); |
579 | 0 | #endif |
580 | 0 | #ifdef ARCH_s390 |
581 | 0 | print_s390_disassembler_options (stream); |
582 | 0 | #endif |
583 | 0 | #ifdef ARCH_wasm32 |
584 | 0 | print_wasm32_disassembler_options (stream); |
585 | 0 | #endif |
586 | 0 | #ifdef ARCH_loongarch |
587 | 0 | print_loongarch_disassembler_options (stream); |
588 | 0 | #endif |
589 | 0 | #ifdef ARCH_bpf |
590 | 0 | print_bpf_disassembler_options (stream); |
591 | 0 | #endif |
592 | 0 | return; |
593 | 0 | } |
594 | | |
595 | | void |
596 | | disassemble_init_for_target (struct disassemble_info * info) |
597 | 18.8k | { |
598 | 18.8k | if (info == NULL) |
599 | 0 | return; |
600 | | |
601 | 18.8k | switch (info->arch) |
602 | 18.8k | { |
603 | 0 | #ifdef ARCH_aarch64 |
604 | 4.55k | case bfd_arch_aarch64: |
605 | 4.55k | info->symbol_is_valid = aarch64_symbol_is_valid; |
606 | 4.55k | info->disassembler_needs_relocs = true; |
607 | 4.55k | info->created_styled_output = true; |
608 | 4.55k | break; |
609 | 0 | #endif |
610 | 0 | #ifdef ARCH_arc |
611 | 38 | case bfd_arch_arc: |
612 | 38 | info->created_styled_output = true; |
613 | 38 | break; |
614 | 0 | #endif |
615 | 0 | #ifdef ARCH_arm |
616 | 586 | case bfd_arch_arm: |
617 | 586 | info->symbol_is_valid = arm_symbol_is_valid; |
618 | 586 | info->disassembler_needs_relocs = true; |
619 | 586 | info->created_styled_output = true; |
620 | 586 | break; |
621 | 0 | #endif |
622 | 0 | #ifdef ARCH_avr |
623 | 6 | case bfd_arch_avr: |
624 | 6 | info->created_styled_output = true; |
625 | 6 | break; |
626 | 0 | #endif |
627 | 0 | #ifdef ARCH_csky |
628 | 273 | case bfd_arch_csky: |
629 | 273 | info->symbol_is_valid = csky_symbol_is_valid; |
630 | 273 | info->disassembler_needs_relocs = true; |
631 | 273 | break; |
632 | 0 | #endif |
633 | 0 | #ifdef ARCH_i386 |
634 | 2.20k | case bfd_arch_i386: |
635 | 2.20k | case bfd_arch_iamcu: |
636 | 2.20k | info->created_styled_output = true; |
637 | 2.20k | break; |
638 | 0 | #endif |
639 | 0 | #ifdef ARCH_ia64 |
640 | 310 | case bfd_arch_ia64: |
641 | 310 | info->skip_zeroes = 16; |
642 | 310 | break; |
643 | 0 | #endif |
644 | 0 | #ifdef ARCH_loongarch |
645 | 143 | case bfd_arch_loongarch: |
646 | 143 | info->created_styled_output = true; |
647 | 143 | break; |
648 | 0 | #endif |
649 | 0 | #ifdef ARCH_tic4x |
650 | 0 | case bfd_arch_tic4x: |
651 | 0 | info->skip_zeroes = 32; |
652 | 0 | break; |
653 | 0 | #endif |
654 | 0 | #ifdef ARCH_m68k |
655 | 400 | case bfd_arch_m68k: |
656 | 400 | info->created_styled_output = true; |
657 | 400 | break; |
658 | 0 | #endif |
659 | 0 | #ifdef ARCH_mep |
660 | 0 | case bfd_arch_mep: |
661 | 0 | info->skip_zeroes = 256; |
662 | 0 | info->skip_zeroes_at_end = 0; |
663 | 0 | break; |
664 | 0 | #endif |
665 | 0 | #ifdef ARCH_metag |
666 | 0 | case bfd_arch_metag: |
667 | 0 | info->disassembler_needs_relocs = true; |
668 | 0 | break; |
669 | 0 | #endif |
670 | 0 | #ifdef ARCH_mips |
671 | 623 | case bfd_arch_mips: |
672 | 623 | info->created_styled_output = true; |
673 | 623 | break; |
674 | 0 | #endif |
675 | 0 | #ifdef ARCH_m32c |
676 | 0 | case bfd_arch_m32c: |
677 | | /* This processor in fact is little endian. The value set here |
678 | | reflects the way opcodes are written in the cgen description. */ |
679 | 0 | info->endian = BFD_ENDIAN_BIG; |
680 | 0 | if (!info->private_data) |
681 | 0 | { |
682 | 0 | info->private_data = cgen_bitset_create (ISA_MAX); |
683 | 0 | if (info->mach == bfd_mach_m16c) |
684 | 0 | cgen_bitset_set (info->private_data, ISA_M16C); |
685 | 0 | else |
686 | 0 | cgen_bitset_set (info->private_data, ISA_M32C); |
687 | 0 | } |
688 | 0 | break; |
689 | 0 | #endif |
690 | 0 | #ifdef ARCH_bpf |
691 | 28 | case bfd_arch_bpf: |
692 | 28 | info->created_styled_output = true; |
693 | 28 | break; |
694 | 0 | #endif |
695 | 0 | #ifdef ARCH_pru |
696 | 0 | case bfd_arch_pru: |
697 | 0 | info->disassembler_needs_relocs = true; |
698 | 0 | break; |
699 | 0 | #endif |
700 | 0 | #ifdef ARCH_powerpc |
701 | 368 | case bfd_arch_powerpc: |
702 | 368 | #endif |
703 | 368 | #ifdef ARCH_rs6000 |
704 | 653 | case bfd_arch_rs6000: |
705 | 653 | #endif |
706 | 653 | #if defined (ARCH_powerpc) || defined (ARCH_rs6000) |
707 | 653 | disassemble_init_powerpc (info); |
708 | 653 | info->created_styled_output = true; |
709 | 653 | break; |
710 | 0 | #endif |
711 | 0 | #ifdef ARCH_riscv |
712 | 212 | case bfd_arch_riscv: |
713 | 212 | info->symbol_is_valid = riscv_symbol_is_valid; |
714 | 212 | info->created_styled_output = true; |
715 | 212 | break; |
716 | 0 | #endif |
717 | 0 | #ifdef ARCH_wasm32 |
718 | 66 | case bfd_arch_wasm32: |
719 | 66 | disassemble_init_wasm32 (info); |
720 | 66 | break; |
721 | 0 | #endif |
722 | 0 | #ifdef ARCH_s390 |
723 | 66 | case bfd_arch_s390: |
724 | 66 | disassemble_init_s390 (info); |
725 | 66 | info->created_styled_output = true; |
726 | 66 | break; |
727 | 0 | #endif |
728 | 0 | #ifdef ARCH_nds32 |
729 | 387 | case bfd_arch_nds32: |
730 | 387 | disassemble_init_nds32 (info); |
731 | 387 | break; |
732 | 0 | #endif |
733 | 8.33k | default: |
734 | 8.33k | break; |
735 | 18.8k | } |
736 | 18.8k | } |
737 | | |
738 | | void |
739 | | disassemble_free_target (struct disassemble_info *info) |
740 | 18.8k | { |
741 | 18.8k | if (info == NULL) |
742 | 0 | return; |
743 | | |
744 | 18.8k | switch (info->arch) |
745 | 18.8k | { |
746 | 17.7k | default: |
747 | 17.7k | return; |
748 | | |
749 | 17.7k | #ifdef ARCH_m32c |
750 | 17.7k | case bfd_arch_m32c: |
751 | 0 | #endif |
752 | 0 | #if defined ARCH_m32c |
753 | 0 | if (info->private_data) |
754 | 0 | { |
755 | 0 | CGEN_BITSET *mask = info->private_data; |
756 | 0 | free (mask->bits); |
757 | 0 | } |
758 | 0 | break; |
759 | 0 | #endif |
760 | | |
761 | 0 | #ifdef ARCH_arc |
762 | 38 | case bfd_arch_arc: |
763 | 38 | break; |
764 | 0 | #endif |
765 | 0 | #ifdef ARCH_cris |
766 | 1 | case bfd_arch_cris: |
767 | 1 | break; |
768 | 0 | #endif |
769 | 0 | #ifdef ARCH_mmix |
770 | 0 | case bfd_arch_mmix: |
771 | 0 | break; |
772 | 0 | #endif |
773 | 0 | #ifdef ARCH_nfp |
774 | 234 | case bfd_arch_nfp: |
775 | 234 | break; |
776 | 0 | #endif |
777 | 0 | #ifdef ARCH_powerpc |
778 | 368 | case bfd_arch_powerpc: |
779 | 368 | break; |
780 | 0 | #endif |
781 | 0 | #ifdef ARCH_riscv |
782 | 212 | case bfd_arch_riscv: |
783 | 212 | disassemble_free_riscv (info); |
784 | 212 | break; |
785 | 0 | #endif |
786 | 0 | #ifdef ARCH_rs6000 |
787 | 285 | case bfd_arch_rs6000: |
788 | 285 | break; |
789 | 18.8k | #endif |
790 | 18.8k | } |
791 | | |
792 | 1.13k | free (info->private_data); |
793 | 1.13k | } |
794 | | |
795 | | /* Remove whitespace and consecutive commas from OPTIONS. */ |
796 | | |
797 | | char * |
798 | | remove_whitespace_and_extra_commas (char *options) |
799 | 0 | { |
800 | 0 | char *str; |
801 | 0 | size_t i, len; |
802 | |
|
803 | 0 | if (options == NULL) |
804 | 0 | return NULL; |
805 | | |
806 | | /* Strip off all trailing whitespace and commas. */ |
807 | 0 | for (len = strlen (options); len > 0; len--) |
808 | 0 | { |
809 | 0 | if (!ISSPACE (options[len - 1]) && options[len - 1] != ',') |
810 | 0 | break; |
811 | 0 | options[len - 1] = '\0'; |
812 | 0 | } |
813 | | |
814 | | /* Convert all remaining whitespace to commas. */ |
815 | 0 | for (i = 0; options[i] != '\0'; i++) |
816 | 0 | if (ISSPACE (options[i])) |
817 | 0 | options[i] = ','; |
818 | | |
819 | | /* Remove consecutive commas. */ |
820 | 0 | for (str = options; *str != '\0'; str++) |
821 | 0 | if (*str == ',' && (*(str + 1) == ',' || str == options)) |
822 | 0 | { |
823 | 0 | char *next = str + 1; |
824 | 0 | while (*next == ',') |
825 | 0 | next++; |
826 | 0 | len = strlen (next); |
827 | 0 | if (str != options) |
828 | 0 | str++; |
829 | 0 | memmove (str, next, len); |
830 | 0 | next[len - (size_t)(next - str)] = '\0'; |
831 | 0 | } |
832 | 0 | return (strlen (options) != 0) ? options : NULL; |
833 | 0 | } |
834 | | |
835 | | /* Like STRCMP, but treat ',' the same as '\0' so that we match |
836 | | strings like "foobar" against "foobar,xxyyzz,...". */ |
837 | | |
838 | | int |
839 | | disassembler_options_cmp (const char *s1, const char *s2) |
840 | 32.1k | { |
841 | 32.1k | unsigned char c1, c2; |
842 | | |
843 | 32.1k | do |
844 | 49.9k | { |
845 | 49.9k | c1 = (unsigned char) *s1++; |
846 | 49.9k | if (c1 == ',') |
847 | 0 | c1 = '\0'; |
848 | 49.9k | c2 = (unsigned char) *s2++; |
849 | 49.9k | if (c2 == ',') |
850 | 0 | c2 = '\0'; |
851 | 49.9k | if (c1 == '\0') |
852 | 653 | return c1 - c2; |
853 | 49.9k | } |
854 | 49.3k | while (c1 == c2); |
855 | | |
856 | 31.5k | return c1 - c2; |
857 | 32.1k | } |
858 | | |
859 | | void |
860 | | opcodes_assert (const char *file, int line) |
861 | 0 | { |
862 | 0 | opcodes_error_handler (_("assertion fail %s:%d"), file, line); |
863 | 0 | opcodes_error_handler (_("Please report this bug")); |
864 | 0 | abort (); |
865 | 0 | } |
866 | | |
867 | | /* Set the stream, and the styled and unstyled printf functions within |
868 | | INFO. */ |
869 | | |
870 | | void |
871 | | disassemble_set_printf (struct disassemble_info *info, void *stream, |
872 | | fprintf_ftype unstyled_printf, |
873 | | fprintf_styled_ftype styled_printf) |
874 | 184M | { |
875 | 184M | info->stream = stream; |
876 | 184M | info->fprintf_func = unstyled_printf; |
877 | 184M | info->fprintf_styled_func = styled_printf; |
878 | 184M | } |