/src/binutils-gdb/include/elf/aarch64.h
Line | Count | Source (jump to first uncovered line) |
1 | | /* AArch64 ELF support for BFD. |
2 | | |
3 | | Copyright (C) 2009-2023 Free Software Foundation, Inc. |
4 | | Contributed by ARM Ltd. |
5 | | |
6 | | This file is part of GNU Binutils. |
7 | | |
8 | | This program is free software; you can redistribute it and/or modify |
9 | | it under the terms of the GNU General Public License as published by |
10 | | the Free Software Foundation; either version 3 of the license, or |
11 | | (at your option) any later version. |
12 | | |
13 | | This program is distributed in the hope that it will be useful, |
14 | | but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
16 | | GNU General Public License for more details. |
17 | | |
18 | | You should have received a copy of the GNU General Public License |
19 | | along with this program; see the file COPYING3. If not, |
20 | | see <http://www.gnu.org/licenses/>. */ |
21 | | |
22 | | #ifndef _ELF_AARCH64_H |
23 | | #define _ELF_AARCH64_H |
24 | | |
25 | | #include "elf/reloc-macros.h" |
26 | | |
27 | | /* Processor specific program header types. */ |
28 | 3 | #define PT_AARCH64_ARCHEXT (PT_LOPROC + 0) |
29 | | |
30 | | /* MTE memory tag segment type. */ |
31 | 21 | #define PT_AARCH64_MEMTAG_MTE (PT_LOPROC + 0x2) |
32 | | |
33 | | /* Additional section types. */ |
34 | 24 | #define SHT_AARCH64_ATTRIBUTES 0x70000003 /* Section holds attributes. */ |
35 | | |
36 | | /* AArch64-specific values for sh_flags. */ |
37 | | #define SHF_ENTRYSECT 0x10000000 /* Section contains an |
38 | | entry point. */ |
39 | | #define SHF_COMDEF 0x80000000 /* Section may be multiply defined |
40 | | in the input to a link step. */ |
41 | | /* Processor specific dynamic array tags. */ |
42 | 212 | #define DT_AARCH64_BTI_PLT (DT_LOPROC + 1) |
43 | 134 | #define DT_AARCH64_PAC_PLT (DT_LOPROC + 3) |
44 | 0 | #define DT_AARCH64_VARIANT_PCS (DT_LOPROC + 5) |
45 | | |
46 | | /* AArch64-specific values for st_other. */ |
47 | 16.9k | #define STO_AARCH64_VARIANT_PCS 0x80 /* Symbol may follow different call |
48 | | convention from the base PCS. */ |
49 | | |
50 | | /* Relocation types. */ |
51 | | |
52 | 7.17M | START_RELOC_NUMBERS (elf_aarch64_reloc_type) |
53 | | |
54 | | /* Null relocations. */ |
55 | 7.17M | RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */ |
56 | 0 | |
57 | 0 | /* Basic data relocations. */ |
58 | 0 | |
59 | 0 | /* .word: (S+A) */ |
60 | 58.3k | RELOC_NUMBER (R_AARCH64_P32_ABS32, 1) |
61 | | |
62 | | /* .half: (S+A) */ |
63 | 56.4k | RELOC_NUMBER (R_AARCH64_P32_ABS16, 2) |
64 | | |
65 | | /* .word: (S+A-P) */ |
66 | 16.2k | RELOC_NUMBER (R_AARCH64_P32_PREL32, 3) |
67 | | |
68 | | /* .half: (S+A-P) */ |
69 | 52.5k | RELOC_NUMBER (R_AARCH64_P32_PREL16, 4) |
70 | | |
71 | | /* Group relocations to create a 16, 32, 48 or 64 bit |
72 | | unsigned data or abs address inline. */ |
73 | | |
74 | | /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ |
75 | 9.13k | RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5) |
76 | | |
77 | | /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ |
78 | 4.37k | RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6) |
79 | | |
80 | | /* MOV[ZK]: ((S+A) >> 16) & 0xffff */ |
81 | 9.38k | RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7) |
82 | | |
83 | | /* Group relocations to create high part of a 16, 32, 48 or 64 bit |
84 | | signed data or abs address inline. Will change instruction |
85 | | to MOVN or MOVZ depending on sign of calculated value. */ |
86 | | |
87 | | /* MOV[ZN]: ((S+A) >> 0) & 0xffff */ |
88 | 22.2k | RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8) |
89 | | |
90 | | /* Relocations to generate 19, 21 and 33 bit PC-relative load/store |
91 | | addresses: PG(x) is (x & ~0xfff). */ |
92 | | |
93 | | /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */ |
94 | 27.7k | RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9) |
95 | | |
96 | | /* ADR: (S+A-P) & 0x1fffff */ |
97 | 10.7k | RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10) |
98 | | |
99 | | /* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */ |
100 | 6.14k | RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11) |
101 | | |
102 | | /* ADD: (S+A) & 0xfff */ |
103 | 5.08k | RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12) |
104 | | |
105 | | /* LD/ST8: (S+A) & 0xfff */ |
106 | 1.33k | RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13) |
107 | | |
108 | | /* LD/ST16: (S+A) & 0xffe */ |
109 | 1.74k | RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14) |
110 | | |
111 | | /* LD/ST32: (S+A) & 0xffc */ |
112 | 2.28k | RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15) |
113 | | |
114 | | /* LD/ST64: (S+A) & 0xff8 */ |
115 | 8.58k | RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16) |
116 | | |
117 | | /* LD/ST128: (S+A) & 0xff0 */ |
118 | 8.78k | RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17) |
119 | | |
120 | | /* Relocations for control-flow instructions. */ |
121 | | |
122 | | /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */ |
123 | 3.18k | RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18) |
124 | | |
125 | | /* B.cond: ((S+A-P) >> 2) & 0x7ffff. */ |
126 | 1.80k | RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19) |
127 | | |
128 | | /* B: ((S+A-P) >> 2) & 0x3ffffff. */ |
129 | 5.56k | RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20) |
130 | | |
131 | | /* BL: ((S+A-P) >> 2) & 0x3ffffff. */ |
132 | 2.93k | RELOC_NUMBER (R_AARCH64_P32_CALL26, 21) |
133 | | |
134 | | /* Group relocations to create a 16 or 32 bit PC-relative offset inline. */ |
135 | 2.56k | RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22) |
136 | 1.48k | RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23) |
137 | 4.80k | RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24) |
138 | | |
139 | 2.82k | RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25) |
140 | 3.14k | RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26) |
141 | 1.19k | RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27) |
142 | 3.51k | RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28) |
143 | | |
144 | 1.15k | RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80) |
145 | 2.13k | RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81) |
146 | 2.93k | RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82) |
147 | 2.38k | RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83) |
148 | 1.67k | RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84) |
149 | 3.30k | RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85) |
150 | 790 | RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87) |
151 | 927 | RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88) |
152 | 1.06k | RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89) |
153 | 1.12k | RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90) |
154 | 1.64k | RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91) |
155 | 3.66k | RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92) |
156 | 1.57k | RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103) |
157 | 685 | RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104) |
158 | 1.22k | RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105) |
159 | 1.44k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106) |
160 | 1.30k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107) |
161 | 1.59k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108) |
162 | 1.36k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109) |
163 | 2.14k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110) |
164 | 3.70k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111) |
165 | 5.28k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 112) |
166 | 894 | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 113) |
167 | 1.26k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 114) |
168 | 1.05k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 115) |
169 | 3.69k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 116) |
170 | 2.20k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 117) |
171 | 855 | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 118) |
172 | 1.17k | RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 119) |
173 | | |
174 | 3.26k | RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122) |
175 | 1.23k | RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123) |
176 | 2.04k | RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124) |
177 | 1.40k | RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125) |
178 | 1.48k | RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126) |
179 | 6.27k | RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127) |
180 | | |
181 | | /* Dynamic relocations */ |
182 | | |
183 | | /* Copy symbol at runtime. */ |
184 | 683 | RELOC_NUMBER (R_AARCH64_P32_COPY, 180) |
185 | | |
186 | | /* Create GOT entry. */ |
187 | 2.22k | RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181) |
188 | | |
189 | | /* Create PLT entry. */ |
190 | 963 | RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182) |
191 | | |
192 | | /* Adjust by program base. */ |
193 | 1.13k | RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183) |
194 | 526 | RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184) |
195 | 1.03k | RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185) |
196 | 807 | RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186) |
197 | 3.16k | RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187) |
198 | 1.47k | RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188) |
199 | | |
200 | 20.1k | RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */ |
201 | 0 | |
202 | 0 | /* Basic data relocations. */ |
203 | 0 | |
204 | 0 | /* .xword: (S+A) */ |
205 | 369 | RELOC_NUMBER (R_AARCH64_ABS64, 257) |
206 | | |
207 | | /* .word: (S+A) */ |
208 | 352 | RELOC_NUMBER (R_AARCH64_ABS32, 258) |
209 | | |
210 | | /* .half: (S+A) */ |
211 | 636 | RELOC_NUMBER (R_AARCH64_ABS16, 259) |
212 | | |
213 | | /* .xword: (S+A-P) */ |
214 | 273 | RELOC_NUMBER (R_AARCH64_PREL64, 260) |
215 | | |
216 | | /* .word: (S+A-P) */ |
217 | 99 | RELOC_NUMBER (R_AARCH64_PREL32, 261) |
218 | | |
219 | | /* .half: (S+A-P) */ |
220 | 2.77k | RELOC_NUMBER (R_AARCH64_PREL16, 262) |
221 | | |
222 | | /* Group relocations to create a 16, 32, 48 or 64 bit |
223 | | unsigned data or abs address inline. */ |
224 | | |
225 | | /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ |
226 | 395 | RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0, 263) |
227 | | |
228 | | /* MOV[ZK]: ((S+A) >> 0) & 0xffff */ |
229 | 882 | RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264) |
230 | | |
231 | | /* MOV[ZK]: ((S+A) >> 16) & 0xffff */ |
232 | 256 | RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265) |
233 | | |
234 | | /* MOV[ZK]: ((S+A) >> 16) & 0xffff */ |
235 | 1.93k | RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266) |
236 | | |
237 | | /* MOV[ZK]: ((S+A) >> 32) & 0xffff */ |
238 | 277 | RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267) |
239 | | |
240 | | /* MOV[ZK]: ((S+A) >> 32) & 0xffff */ |
241 | 139 | RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268) |
242 | | |
243 | | /* MOV[ZK]: ((S+A) >> 48) & 0xffff */ |
244 | 111 | RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269) |
245 | | |
246 | | /* Group relocations to create high part of a 16, 32, 48 or 64 bit |
247 | | signed data or abs address inline. Will change instruction |
248 | | to MOVN or MOVZ depending on sign of calculated value. */ |
249 | | |
250 | | /* MOV[ZN]: ((S+A) >> 0) & 0xffff */ |
251 | 837 | RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270) |
252 | | |
253 | | /* MOV[ZN]: ((S+A) >> 16) & 0xffff */ |
254 | 381 | RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271) |
255 | | |
256 | | /* MOV[ZN]: ((S+A) >> 32) & 0xffff */ |
257 | 198 | RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272) |
258 | | |
259 | | /* Relocations to generate 19, 21 and 33 bit PC-relative load/store |
260 | | addresses: PG(x) is (x & ~0xfff). */ |
261 | | |
262 | | /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */ |
263 | 6.39k | RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273) |
264 | | |
265 | | /* ADR: (S+A-P) & 0x1fffff */ |
266 | 408 | RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274) |
267 | | |
268 | | /* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */ |
269 | 487 | RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275) |
270 | | |
271 | | /* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */ |
272 | 242 | RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276) |
273 | | |
274 | | /* ADD: (S+A) & 0xfff */ |
275 | 2.50k | RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277) |
276 | | |
277 | | /* LD/ST8: (S+A) & 0xfff */ |
278 | 2.44k | RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278) |
279 | | |
280 | | /* Relocations for control-flow instructions. */ |
281 | | |
282 | | /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */ |
283 | 149 | RELOC_NUMBER (R_AARCH64_TSTBR14, 279) |
284 | | |
285 | | /* B.cond: ((S+A-P) >> 2) & 0x7ffff. */ |
286 | 6.07k | RELOC_NUMBER (R_AARCH64_CONDBR19, 280) |
287 | | |
288 | | /* 281 unused */ |
289 | | |
290 | | /* B: ((S+A-P) >> 2) & 0x3ffffff. */ |
291 | 128 | RELOC_NUMBER (R_AARCH64_JUMP26, 282) |
292 | | |
293 | | /* BL: ((S+A-P) >> 2) & 0x3ffffff. */ |
294 | 184 | RELOC_NUMBER (R_AARCH64_CALL26, 283) |
295 | | |
296 | | /* LD/ST16: (S+A) & 0xffe */ |
297 | 198 | RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284) |
298 | | |
299 | | /* LD/ST32: (S+A) & 0xffc */ |
300 | 440 | RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285) |
301 | | |
302 | | /* LD/ST64: (S+A) & 0xff8 */ |
303 | 163 | RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286) |
304 | | |
305 | | /* Group relocations to create a 16, 32, 48, or 64 bit PC-relative |
306 | | offset inline. */ |
307 | | |
308 | 697 | RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0, 287) |
309 | 767 | RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0_NC, 288) |
310 | 142 | RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1, 289) |
311 | 146 | RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1_NC, 290) |
312 | 510 | RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2, 291) |
313 | 1.24k | RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2_NC, 292) |
314 | 391 | RELOC_NUMBER (R_AARCH64_MOVW_PREL_G3, 293) |
315 | | |
316 | | /* LD/ST128: (S+A) & 0xff0 */ |
317 | 80 | RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299) |
318 | | |
319 | | /* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative |
320 | | offset inline. */ |
321 | | |
322 | 150 | RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0, 300) |
323 | 135 | RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0_NC, 301) |
324 | 447 | RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1, 302) |
325 | 269 | RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1_NC, 303) |
326 | 422 | RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2, 304) |
327 | 217 | RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2_NC, 305) |
328 | 259 | RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G3, 306) |
329 | | |
330 | | /* GOT-relative data relocations. */ |
331 | | |
332 | 178 | RELOC_NUMBER (R_AARCH64_GOTREL64, 307) |
333 | 288 | RELOC_NUMBER (R_AARCH64_GOTREL32, 308) |
334 | | |
335 | | /* GOT-relative instruction relocations. */ |
336 | | |
337 | 377 | RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309) |
338 | 991 | RELOC_NUMBER (R_AARCH64_LD64_GOTOFF_LO15, 310) |
339 | 116 | RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311) |
340 | 387 | RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312) |
341 | 173 | RELOC_NUMBER (R_AARCH64_LD64_GOTPAGE_LO15, 313) |
342 | | |
343 | | /* General Dynamic TLS relocations. */ |
344 | | |
345 | 38.2k | RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PREL21, 512) |
346 | 266 | RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513) |
347 | 1.28k | RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514) |
348 | 804 | RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G1, 515) |
349 | 814 | RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G0_NC, 516) |
350 | | |
351 | | /* Local Dynamic TLS relocations. */ |
352 | | |
353 | 115 | RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PREL21, 517) |
354 | 1.97k | RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PAGE21, 518) |
355 | 245 | RELOC_NUMBER (R_AARCH64_TLSLD_ADD_LO12_NC, 519) |
356 | 264 | RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G1, 520) |
357 | 142 | RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G0_NC, 521) |
358 | 120 | RELOC_NUMBER (R_AARCH64_TLSLD_LD_PREL19, 522) |
359 | 116 | RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G2, 523) |
360 | 259 | RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1, 524) |
361 | 2.36k | RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 525) |
362 | 239 | RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0, 526) |
363 | 803 | RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 527) |
364 | 256 | RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_HI12, 528) |
365 | 169 | RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12, 529) |
366 | 36 | RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 530) |
367 | 240 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 531) |
368 | 173 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 532) |
369 | 112 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 533) |
370 | 34 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 534) |
371 | 129 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 535) |
372 | 83 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 536) |
373 | 579 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 537) |
374 | 124 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 538) |
375 | | |
376 | | /* Initial Exec TLS relocations. */ |
377 | | |
378 | 374 | RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539) |
379 | 195 | RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540) |
380 | 177 | RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541) |
381 | 37 | RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542) |
382 | 182 | RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543) |
383 | | |
384 | | /* Local Exec TLS relocations. */ |
385 | | |
386 | 250 | RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544) |
387 | 255 | RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545) |
388 | 247 | RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546) |
389 | 141 | RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547) |
390 | 89 | RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548) |
391 | 684 | RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549) |
392 | 416 | RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550) |
393 | 361 | RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551) |
394 | 695 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12, 552) |
395 | 141 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 553) |
396 | 408 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12, 554) |
397 | 77 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 555) |
398 | 35 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12, 556) |
399 | 169 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 557) |
400 | 89 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12, 558) |
401 | 252 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559) |
402 | | |
403 | | /* TLS descriptor relocations. */ |
404 | | |
405 | 393 | RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560) |
406 | 238 | RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561) |
407 | 110 | RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562) |
408 | 237 | RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12, 563) |
409 | 823 | RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12, 564) |
410 | 301 | RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565) |
411 | 198 | RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566) |
412 | 268 | RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567) |
413 | 1.22k | RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568) |
414 | 337 | RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569) |
415 | | |
416 | 293 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12, 570) |
417 | 187 | RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 571) |
418 | 113 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 572) |
419 | 65 | RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 573) |
420 | | |
421 | | /* Dynamic relocations */ |
422 | | |
423 | | /* Copy symbol at runtime. */ |
424 | 128k | RELOC_NUMBER (R_AARCH64_COPY, 1024) |
425 | | |
426 | | /* Create GOT entry. */ |
427 | 271 | RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025) |
428 | | |
429 | | /* Create PLT entry. */ |
430 | 1.22k | RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026) |
431 | | |
432 | | /* Adjust by program base. */ |
433 | 457 | RELOC_NUMBER (R_AARCH64_RELATIVE, 1027) |
434 | 3.21k | RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028) |
435 | 540 | RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029) |
436 | 83 | RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030) |
437 | | /* Aliasing relocs are guarded by RELOC_MACROS_GEN_FUNC |
438 | | so that readelf.c won't generate duplicated case |
439 | | statements. */ |
440 | | #ifndef RELOC_MACROS_GEN_FUNC |
441 | | RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028) |
442 | | RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029) |
443 | | RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030) |
444 | | #endif |
445 | 90 | RELOC_NUMBER (R_AARCH64_TLSDESC, 1031) |
446 | 98 | RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032) |
447 | | |
448 | 5.02M | END_RELOC_NUMBERS (R_AARCH64_end) |
449 | | |
450 | | #endif /* _ELF_AARCH64_H */ |