/src/binutils-gdb/opcodes/bpf-dis.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
2 | | /* Disassembler interface for targets using CGEN. -*- C -*- |
3 | | CGEN: Cpu tools GENerator |
4 | | |
5 | | THIS FILE IS MACHINE GENERATED WITH CGEN. |
6 | | - the resultant file is machine generated, cgen-dis.in isn't |
7 | | |
8 | | Copyright (C) 1996-2023 Free Software Foundation, Inc. |
9 | | |
10 | | This file is part of libopcodes. |
11 | | |
12 | | This library is free software; you can redistribute it and/or modify |
13 | | it under the terms of the GNU General Public License as published by |
14 | | the Free Software Foundation; either version 3, or (at your option) |
15 | | any later version. |
16 | | |
17 | | It is distributed in the hope that it will be useful, but WITHOUT |
18 | | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
19 | | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
20 | | License for more details. |
21 | | |
22 | | You should have received a copy of the GNU General Public License |
23 | | along with this program; if not, write to the Free Software Foundation, Inc., |
24 | | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
25 | | |
26 | | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
27 | | Keep that in mind. */ |
28 | | |
29 | | #include "sysdep.h" |
30 | | #include <stdio.h> |
31 | | #include "ansidecl.h" |
32 | | #include "disassemble.h" |
33 | | #include "bfd.h" |
34 | | #include "symcat.h" |
35 | | #include "libiberty.h" |
36 | | #include "bpf-desc.h" |
37 | | #include "bpf-opc.h" |
38 | | #include "opintl.h" |
39 | | |
40 | | /* Default text to print if an instruction isn't recognized. */ |
41 | 33.9k | #define UNKNOWN_INSN_MSG _("*unknown*") |
42 | | |
43 | | static void print_normal |
44 | | (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); |
45 | | static void print_address |
46 | | (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; |
47 | | static void print_keyword |
48 | | (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; |
49 | | static void print_insn_normal |
50 | | (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); |
51 | | static int print_insn |
52 | | (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); |
53 | | static int default_print_insn |
54 | | (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; |
55 | | static int read_insn |
56 | | (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, |
57 | | unsigned long *); |
58 | | |
59 | | /* -- disassembler routines inserted here. */ |
60 | | |
61 | | /* -- dis.c */ |
62 | | |
63 | | /* We need to customize the disassembler a bit: |
64 | | - Use 8 bytes per line by default. |
65 | | */ |
66 | | |
67 | 39.6k | #define CGEN_PRINT_INSN bpf_print_insn |
68 | | |
69 | | static int |
70 | | bpf_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) |
71 | 39.6k | { |
72 | 39.6k | bfd_byte buf[CGEN_MAX_INSN_SIZE]; |
73 | 39.6k | int buflen; |
74 | 39.6k | int status; |
75 | | |
76 | 39.6k | info->bytes_per_chunk = 1; |
77 | 39.6k | info->bytes_per_line = 8; |
78 | | |
79 | | /* Attempt to read the base part of the insn. */ |
80 | 39.6k | buflen = cd->base_insn_bitsize / 8; |
81 | 39.6k | status = (*info->read_memory_func) (pc, buf, buflen, info); |
82 | | |
83 | | /* Try again with the minimum part, if min < base. */ |
84 | 39.6k | if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) |
85 | 0 | { |
86 | 0 | buflen = cd->min_insn_bitsize / 8; |
87 | 0 | status = (*info->read_memory_func) (pc, buf, buflen, info); |
88 | 0 | } |
89 | | |
90 | 39.6k | if (status != 0) |
91 | 98 | { |
92 | 98 | (*info->memory_error_func) (status, pc, info); |
93 | 98 | return -1; |
94 | 98 | } |
95 | | |
96 | 39.5k | return print_insn (cd, pc, info, buf, buflen); |
97 | 39.6k | } |
98 | | |
99 | | /* Signed immediates should be printed in hexadecimal. */ |
100 | | |
101 | | static void |
102 | | print_immediate (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
103 | | void *dis_info, |
104 | | int64_t value, |
105 | | unsigned int attrs ATTRIBUTE_UNUSED, |
106 | | bfd_vma pc ATTRIBUTE_UNUSED, |
107 | | int length ATTRIBUTE_UNUSED) |
108 | 3.29k | { |
109 | 3.29k | disassemble_info *info = (disassemble_info *) dis_info; |
110 | | |
111 | 3.29k | if (value <= 9) |
112 | 1.32k | (*info->fprintf_func) (info->stream, "%" PRId64, value); |
113 | 1.96k | else |
114 | 1.96k | (*info->fprintf_func) (info->stream, "%#" PRIx64, value); |
115 | | |
116 | | /* This is to avoid -Wunused-function for print_normal. */ |
117 | 3.29k | if (0) |
118 | 0 | print_normal (cd, dis_info, value, attrs, pc, length); |
119 | 3.29k | } |
120 | | |
121 | | /* Endianness bit sizes should be printed in decimal. */ |
122 | | |
123 | | static void |
124 | | print_endsize (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
125 | | void *dis_info, |
126 | | unsigned long value, |
127 | | unsigned int attrs ATTRIBUTE_UNUSED, |
128 | | bfd_vma pc ATTRIBUTE_UNUSED, |
129 | | int length ATTRIBUTE_UNUSED) |
130 | 18 | { |
131 | 18 | disassemble_info *info = (disassemble_info *) dis_info; |
132 | 18 | (*info->fprintf_func) (info->stream, "%lu", value); |
133 | 18 | } |
134 | | |
135 | | |
136 | | /* -- */ |
137 | | |
138 | | void bpf_cgen_print_operand |
139 | | (CGEN_CPU_DESC, int, void *, CGEN_FIELDS *, void const *, bfd_vma, int); |
140 | | |
141 | | /* Main entry point for printing operands. |
142 | | XINFO is a `void *' and not a `disassemble_info *' to not put a requirement |
143 | | of dis-asm.h on cgen.h. |
144 | | |
145 | | This function is basically just a big switch statement. Earlier versions |
146 | | used tables to look up the function to use, but |
147 | | - if the table contains both assembler and disassembler functions then |
148 | | the disassembler contains much of the assembler and vice-versa, |
149 | | - there's a lot of inlining possibilities as things grow, |
150 | | - using a switch statement avoids the function call overhead. |
151 | | |
152 | | This function could be moved into `print_insn_normal', but keeping it |
153 | | separate makes clear the interface between `print_insn_normal' and each of |
154 | | the handlers. */ |
155 | | |
156 | | void |
157 | | bpf_cgen_print_operand (CGEN_CPU_DESC cd, |
158 | | int opindex, |
159 | | void * xinfo, |
160 | | CGEN_FIELDS *fields, |
161 | | void const *attrs ATTRIBUTE_UNUSED, |
162 | | bfd_vma pc, |
163 | | int length) |
164 | 16.4k | { |
165 | 16.4k | disassemble_info *info = (disassemble_info *) xinfo; |
166 | | |
167 | 16.4k | switch (opindex) |
168 | 16.4k | { |
169 | 2.59k | case BPF_OPERAND_DISP16 : |
170 | 2.59k | print_normal (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); |
171 | 2.59k | break; |
172 | 7 | case BPF_OPERAND_DISP32 : |
173 | 7 | print_normal (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); |
174 | 7 | break; |
175 | 0 | case BPF_OPERAND_DSTBE : |
176 | 0 | print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstbe, 0); |
177 | 0 | break; |
178 | 5.54k | case BPF_OPERAND_DSTLE : |
179 | 5.54k | print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstle, 0); |
180 | 5.54k | break; |
181 | 18 | case BPF_OPERAND_ENDSIZE : |
182 | 18 | print_endsize (cd, info, fields->f_imm32, 0, pc, length); |
183 | 18 | break; |
184 | 550 | case BPF_OPERAND_IMM32 : |
185 | 550 | print_immediate (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); |
186 | 550 | break; |
187 | 68 | case BPF_OPERAND_IMM64 : |
188 | 68 | print_immediate (cd, info, fields->f_imm64, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length); |
189 | 68 | break; |
190 | 2.67k | case BPF_OPERAND_OFFSET16 : |
191 | 2.67k | print_immediate (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); |
192 | 2.67k | break; |
193 | 0 | case BPF_OPERAND_SRCBE : |
194 | 0 | print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcbe, 0); |
195 | 0 | break; |
196 | 5.01k | case BPF_OPERAND_SRCLE : |
197 | 5.01k | print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcle, 0); |
198 | 5.01k | break; |
199 | | |
200 | 0 | default : |
201 | | /* xgettext:c-format */ |
202 | 0 | opcodes_error_handler |
203 | 0 | (_("internal error: unrecognized field %d while printing insn"), |
204 | 0 | opindex); |
205 | 0 | abort (); |
206 | 16.4k | } |
207 | 16.4k | } |
208 | | |
209 | | cgen_print_fn * const bpf_cgen_print_handlers[] = |
210 | | { |
211 | | print_insn_normal, |
212 | | }; |
213 | | |
214 | | |
215 | | void |
216 | | bpf_cgen_init_dis (CGEN_CPU_DESC cd) |
217 | 4 | { |
218 | 4 | bpf_cgen_init_opcode_table (cd); |
219 | 4 | bpf_cgen_init_ibld_table (cd); |
220 | 4 | cd->print_handlers = & bpf_cgen_print_handlers[0]; |
221 | 4 | cd->print_operand = bpf_cgen_print_operand; |
222 | 4 | } |
223 | | |
224 | | |
225 | | /* Default print handler. */ |
226 | | |
227 | | static void |
228 | | print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
229 | | void *dis_info, |
230 | | long value, |
231 | | unsigned int attrs, |
232 | | bfd_vma pc ATTRIBUTE_UNUSED, |
233 | | int length ATTRIBUTE_UNUSED) |
234 | 2.60k | { |
235 | 2.60k | disassemble_info *info = (disassemble_info *) dis_info; |
236 | | |
237 | | /* Print the operand as directed by the attributes. */ |
238 | 2.60k | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) |
239 | 0 | ; /* nothing to do */ |
240 | 2.60k | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) |
241 | 2.60k | (*info->fprintf_func) (info->stream, "%ld", value); |
242 | 0 | else |
243 | 0 | (*info->fprintf_func) (info->stream, "0x%lx", value); |
244 | 2.60k | } |
245 | | |
246 | | /* Default address handler. */ |
247 | | |
248 | | static void |
249 | | print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
250 | | void *dis_info, |
251 | | bfd_vma value, |
252 | | unsigned int attrs, |
253 | | bfd_vma pc ATTRIBUTE_UNUSED, |
254 | | int length ATTRIBUTE_UNUSED) |
255 | 0 | { |
256 | 0 | disassemble_info *info = (disassemble_info *) dis_info; |
257 | 0 |
|
258 | 0 | /* Print the operand as directed by the attributes. */ |
259 | 0 | if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) |
260 | 0 | ; /* Nothing to do. */ |
261 | 0 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) |
262 | 0 | (*info->print_address_func) (value, info); |
263 | 0 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) |
264 | 0 | (*info->print_address_func) (value, info); |
265 | 0 | else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) |
266 | 0 | (*info->fprintf_func) (info->stream, "%ld", (long) value); |
267 | 0 | else |
268 | 0 | (*info->fprintf_func) (info->stream, "0x%lx", (long) value); |
269 | 0 | } |
270 | | |
271 | | /* Keyword print handler. */ |
272 | | |
273 | | static void |
274 | | print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
275 | | void *dis_info, |
276 | | CGEN_KEYWORD *keyword_table, |
277 | | long value, |
278 | | unsigned int attrs ATTRIBUTE_UNUSED) |
279 | 10.5k | { |
280 | 10.5k | disassemble_info *info = (disassemble_info *) dis_info; |
281 | 10.5k | const CGEN_KEYWORD_ENTRY *ke; |
282 | | |
283 | 10.5k | ke = cgen_keyword_lookup_value (keyword_table, value); |
284 | 10.5k | if (ke != NULL) |
285 | 7.72k | (*info->fprintf_func) (info->stream, "%s", ke->name); |
286 | 2.84k | else |
287 | 2.84k | (*info->fprintf_func) (info->stream, "???"); |
288 | 10.5k | } |
289 | | |
290 | | /* Default insn printer. |
291 | | |
292 | | DIS_INFO is defined as `void *' so the disassembler needn't know anything |
293 | | about disassemble_info. */ |
294 | | |
295 | | static void |
296 | | print_insn_normal (CGEN_CPU_DESC cd, |
297 | | void *dis_info, |
298 | | const CGEN_INSN *insn, |
299 | | CGEN_FIELDS *fields, |
300 | | bfd_vma pc, |
301 | | int length) |
302 | 5.64k | { |
303 | 5.64k | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
304 | 5.64k | disassemble_info *info = (disassemble_info *) dis_info; |
305 | 5.64k | const CGEN_SYNTAX_CHAR_TYPE *syn; |
306 | | |
307 | 5.64k | CGEN_INIT_PRINT (cd); |
308 | | |
309 | 49.5k | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) |
310 | 43.9k | { |
311 | 43.9k | if (CGEN_SYNTAX_MNEMONIC_P (*syn)) |
312 | 5.64k | { |
313 | 5.64k | (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); |
314 | 5.64k | continue; |
315 | 5.64k | } |
316 | 38.2k | if (CGEN_SYNTAX_CHAR_P (*syn)) |
317 | 21.8k | { |
318 | 21.8k | (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); |
319 | 21.8k | continue; |
320 | 21.8k | } |
321 | | |
322 | | /* We have an operand. */ |
323 | 16.4k | bpf_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, |
324 | 16.4k | fields, CGEN_INSN_ATTRS (insn), pc, length); |
325 | 16.4k | } |
326 | 5.64k | } |
327 | | |
328 | | /* Subroutine of print_insn. Reads an insn into the given buffers and updates |
329 | | the extract info. |
330 | | Returns 0 if all is well, non-zero otherwise. */ |
331 | | |
332 | | static int |
333 | | read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
334 | | bfd_vma pc, |
335 | | disassemble_info *info, |
336 | | bfd_byte *buf, |
337 | | int buflen, |
338 | | CGEN_EXTRACT_INFO *ex_info, |
339 | | unsigned long *insn_value) |
340 | 0 | { |
341 | 0 | int status = (*info->read_memory_func) (pc, buf, buflen, info); |
342 | |
|
343 | 0 | if (status != 0) |
344 | 0 | { |
345 | 0 | (*info->memory_error_func) (status, pc, info); |
346 | 0 | return -1; |
347 | 0 | } |
348 | | |
349 | 0 | ex_info->dis_info = info; |
350 | 0 | ex_info->valid = (1 << buflen) - 1; |
351 | 0 | ex_info->insn_bytes = buf; |
352 | |
|
353 | 0 | *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); |
354 | 0 | return 0; |
355 | 0 | } |
356 | | |
357 | | /* Utility to print an insn. |
358 | | BUF is the base part of the insn, target byte order, BUFLEN bytes long. |
359 | | The result is the size of the insn in bytes or zero for an unknown insn |
360 | | or -1 if an error occurs fetching data (memory_error_func will have |
361 | | been called). */ |
362 | | |
363 | | static int |
364 | | print_insn (CGEN_CPU_DESC cd, |
365 | | bfd_vma pc, |
366 | | disassemble_info *info, |
367 | | bfd_byte *buf, |
368 | | unsigned int buflen) |
369 | 39.5k | { |
370 | 39.5k | CGEN_INSN_INT insn_value; |
371 | 39.5k | const CGEN_INSN_LIST *insn_list; |
372 | 39.5k | CGEN_EXTRACT_INFO ex_info; |
373 | 39.5k | int basesize; |
374 | | |
375 | | /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ |
376 | 39.5k | basesize = cd->base_insn_bitsize < buflen * 8 ? |
377 | 39.5k | cd->base_insn_bitsize : buflen * 8; |
378 | 39.5k | insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian); |
379 | | |
380 | | |
381 | | /* Fill in ex_info fields like read_insn would. Don't actually call |
382 | | read_insn, since the incoming buffer is already read (and possibly |
383 | | modified a la m32r). */ |
384 | 39.5k | ex_info.valid = (1 << buflen) - 1; |
385 | 39.5k | ex_info.dis_info = info; |
386 | 39.5k | ex_info.insn_bytes = buf; |
387 | | |
388 | | /* The instructions are stored in hash lists. |
389 | | Pick the first one and keep trying until we find the right one. */ |
390 | | |
391 | 39.5k | insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); |
392 | 9.87M | while (insn_list != NULL) |
393 | 9.84M | { |
394 | 9.84M | const CGEN_INSN *insn = insn_list->insn; |
395 | 9.84M | CGEN_FIELDS fields; |
396 | 9.84M | int length; |
397 | 9.84M | unsigned long insn_value_cropped; |
398 | | |
399 | 9.84M | #ifdef CGEN_VALIDATE_INSN_SUPPORTED |
400 | | /* Not needed as insn shouldn't be in hash lists if not supported. */ |
401 | | /* Supported by this cpu? */ |
402 | 9.84M | if (! bpf_cgen_insn_supported (cd, insn)) |
403 | 5.10M | { |
404 | 5.10M | insn_list = CGEN_DIS_NEXT_INSN (insn_list); |
405 | 5.10M | continue; |
406 | 5.10M | } |
407 | 4.73M | #endif |
408 | | |
409 | | /* Basic bit mask must be correct. */ |
410 | | /* ??? May wish to allow target to defer this check until the extract |
411 | | handler. */ |
412 | | |
413 | | /* Base size may exceed this instruction's size. Extract the |
414 | | relevant part from the buffer. */ |
415 | 4.73M | if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && |
416 | 4.73M | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) |
417 | 0 | insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), |
418 | 0 | info->endian == BFD_ENDIAN_BIG); |
419 | 4.73M | else |
420 | 4.73M | insn_value_cropped = insn_value; |
421 | | |
422 | 4.73M | if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) |
423 | 4.73M | == CGEN_INSN_BASE_VALUE (insn)) |
424 | 5.64k | { |
425 | | /* Printing is handled in two passes. The first pass parses the |
426 | | machine insn and extracts the fields. The second pass prints |
427 | | them. */ |
428 | | |
429 | | /* Make sure the entire insn is loaded into insn_value, if it |
430 | | can fit. */ |
431 | 5.64k | if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && |
432 | 5.64k | (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) |
433 | 0 | { |
434 | 0 | unsigned long full_insn_value; |
435 | 0 | int rc = read_insn (cd, pc, info, buf, |
436 | 0 | CGEN_INSN_BITSIZE (insn) / 8, |
437 | 0 | & ex_info, & full_insn_value); |
438 | 0 | if (rc != 0) |
439 | 0 | return rc; |
440 | 0 | length = CGEN_EXTRACT_FN (cd, insn) |
441 | 0 | (cd, insn, &ex_info, full_insn_value, &fields, pc); |
442 | 0 | } |
443 | 5.64k | else |
444 | 5.64k | length = CGEN_EXTRACT_FN (cd, insn) |
445 | 5.64k | (cd, insn, &ex_info, insn_value_cropped, &fields, pc); |
446 | | |
447 | | /* Length < 0 -> error. */ |
448 | 5.64k | if (length < 0) |
449 | 0 | return length; |
450 | 5.64k | if (length > 0) |
451 | 5.64k | { |
452 | 5.64k | CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); |
453 | | /* Length is in bits, result is in bytes. */ |
454 | 5.64k | return length / 8; |
455 | 5.64k | } |
456 | 5.64k | } |
457 | | |
458 | 4.72M | insn_list = CGEN_DIS_NEXT_INSN (insn_list); |
459 | 4.72M | } |
460 | | |
461 | 33.9k | return 0; |
462 | 39.5k | } |
463 | | |
464 | | /* Default value for CGEN_PRINT_INSN. |
465 | | The result is the size of the insn in bytes or zero for an unknown insn |
466 | | or -1 if an error occured fetching bytes. */ |
467 | | |
468 | | #ifndef CGEN_PRINT_INSN |
469 | | #define CGEN_PRINT_INSN default_print_insn |
470 | | #endif |
471 | | |
472 | | static int |
473 | | default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) |
474 | 0 | { |
475 | 0 | bfd_byte buf[CGEN_MAX_INSN_SIZE]; |
476 | 0 | int buflen; |
477 | 0 | int status; |
478 | 0 |
|
479 | 0 | /* Attempt to read the base part of the insn. */ |
480 | 0 | buflen = cd->base_insn_bitsize / 8; |
481 | 0 | status = (*info->read_memory_func) (pc, buf, buflen, info); |
482 | 0 |
|
483 | 0 | /* Try again with the minimum part, if min < base. */ |
484 | 0 | if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) |
485 | 0 | { |
486 | 0 | buflen = cd->min_insn_bitsize / 8; |
487 | 0 | status = (*info->read_memory_func) (pc, buf, buflen, info); |
488 | 0 | } |
489 | 0 |
|
490 | 0 | if (status != 0) |
491 | 0 | { |
492 | 0 | (*info->memory_error_func) (status, pc, info); |
493 | 0 | return -1; |
494 | 0 | } |
495 | 0 |
|
496 | 0 | return print_insn (cd, pc, info, buf, buflen); |
497 | 0 | } |
498 | | |
499 | | /* Main entry point. |
500 | | Print one instruction from PC on INFO->STREAM. |
501 | | Return the size of the instruction (in bytes). */ |
502 | | |
503 | | typedef struct cpu_desc_list |
504 | | { |
505 | | struct cpu_desc_list *next; |
506 | | CGEN_BITSET *isa; |
507 | | int mach; |
508 | | int endian; |
509 | | int insn_endian; |
510 | | CGEN_CPU_DESC cd; |
511 | | } cpu_desc_list; |
512 | | |
513 | | int |
514 | | print_insn_bpf (bfd_vma pc, disassemble_info *info) |
515 | 39.6k | { |
516 | 39.6k | static cpu_desc_list *cd_list = 0; |
517 | 39.6k | cpu_desc_list *cl = 0; |
518 | 39.6k | static CGEN_CPU_DESC cd = 0; |
519 | 39.6k | static CGEN_BITSET *prev_isa; |
520 | 39.6k | static int prev_mach; |
521 | 39.6k | static int prev_endian; |
522 | 39.6k | static int prev_insn_endian; |
523 | 39.6k | int length; |
524 | 39.6k | CGEN_BITSET *isa; |
525 | 39.6k | int mach; |
526 | 39.6k | int endian = (info->endian == BFD_ENDIAN_BIG |
527 | 39.6k | ? CGEN_ENDIAN_BIG |
528 | 39.6k | : CGEN_ENDIAN_LITTLE); |
529 | 39.6k | int insn_endian = (info->endian_code == BFD_ENDIAN_BIG |
530 | 39.6k | ? CGEN_ENDIAN_BIG |
531 | 39.6k | : CGEN_ENDIAN_LITTLE); |
532 | 39.6k | enum bfd_architecture arch; |
533 | | |
534 | | /* ??? gdb will set mach but leave the architecture as "unknown" */ |
535 | 39.6k | #ifndef CGEN_BFD_ARCH |
536 | 39.6k | #define CGEN_BFD_ARCH bfd_arch_bpf |
537 | 39.6k | #endif |
538 | 39.6k | arch = info->arch; |
539 | 39.6k | if (arch == bfd_arch_unknown) |
540 | 0 | arch = CGEN_BFD_ARCH; |
541 | | |
542 | | /* There's no standard way to compute the machine or isa number |
543 | | so we leave it to the target. */ |
544 | | #ifdef CGEN_COMPUTE_MACH |
545 | | mach = CGEN_COMPUTE_MACH (info); |
546 | | #else |
547 | 39.6k | mach = info->mach; |
548 | 39.6k | #endif |
549 | | |
550 | | #ifdef CGEN_COMPUTE_ISA |
551 | | { |
552 | | static CGEN_BITSET *permanent_isa; |
553 | | |
554 | | if (!permanent_isa) |
555 | | permanent_isa = cgen_bitset_create (MAX_ISAS); |
556 | | isa = permanent_isa; |
557 | | cgen_bitset_clear (isa); |
558 | | cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); |
559 | | } |
560 | | #else |
561 | 39.6k | isa = info->private_data; |
562 | 39.6k | #endif |
563 | | |
564 | | /* If we've switched cpu's, try to find a handle we've used before */ |
565 | 39.6k | if (cd |
566 | 39.6k | && (cgen_bitset_compare (isa, prev_isa) != 0 |
567 | 39.6k | || mach != prev_mach |
568 | 39.6k | || endian != prev_endian)) |
569 | 37.5k | { |
570 | 37.5k | cd = 0; |
571 | 111k | for (cl = cd_list; cl; cl = cl->next) |
572 | 111k | { |
573 | 111k | if (cgen_bitset_compare (cl->isa, isa) == 0 && |
574 | 111k | cl->mach == mach && |
575 | 111k | cl->endian == endian) |
576 | 37.5k | { |
577 | 37.5k | cd = cl->cd; |
578 | 37.5k | prev_isa = cd->isas; |
579 | 37.5k | break; |
580 | 37.5k | } |
581 | 111k | } |
582 | 37.5k | } |
583 | | |
584 | | /* If we haven't initialized yet, initialize the opcode table. */ |
585 | 39.6k | if (! cd) |
586 | 4 | { |
587 | 4 | const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); |
588 | 4 | const char *mach_name; |
589 | | |
590 | 4 | if (!arch_type) |
591 | 0 | abort (); |
592 | 4 | mach_name = arch_type->printable_name; |
593 | | |
594 | 4 | prev_isa = cgen_bitset_copy (isa); |
595 | 4 | prev_mach = mach; |
596 | 4 | prev_endian = endian; |
597 | 4 | prev_insn_endian = insn_endian; |
598 | 4 | cd = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, |
599 | 4 | CGEN_CPU_OPEN_BFDMACH, mach_name, |
600 | 4 | CGEN_CPU_OPEN_ENDIAN, prev_endian, |
601 | 4 | CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian, |
602 | 4 | CGEN_CPU_OPEN_END); |
603 | 4 | if (!cd) |
604 | 0 | abort (); |
605 | | |
606 | | /* Save this away for future reference. */ |
607 | 4 | cl = xmalloc (sizeof (struct cpu_desc_list)); |
608 | 4 | cl->cd = cd; |
609 | 4 | cl->isa = prev_isa; |
610 | 4 | cl->mach = mach; |
611 | 4 | cl->endian = endian; |
612 | 4 | cl->next = cd_list; |
613 | 4 | cd_list = cl; |
614 | | |
615 | 4 | bpf_cgen_init_dis (cd); |
616 | 4 | } |
617 | | |
618 | | /* We try to have as much common code as possible. |
619 | | But at this point some targets need to take over. */ |
620 | | /* ??? Some targets may need a hook elsewhere. Try to avoid this, |
621 | | but if not possible try to move this hook elsewhere rather than |
622 | | have two hooks. */ |
623 | 39.6k | length = CGEN_PRINT_INSN (cd, pc, info); |
624 | 39.6k | if (length > 0) |
625 | 5.64k | return length; |
626 | 34.0k | if (length < 0) |
627 | 98 | return -1; |
628 | | |
629 | 33.9k | (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); |
630 | 33.9k | return cd->default_insn_bitsize / 8; |
631 | 34.0k | } |