/src/binutils-gdb/opcodes/bpf-ibld.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
2 | | /* Instruction building/extraction support for bpf. -*- C -*- |
3 | | |
4 | | THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. |
5 | | - the resultant file is machine generated, cgen-ibld.in isn't |
6 | | |
7 | | Copyright (C) 1996-2023 Free Software Foundation, Inc. |
8 | | |
9 | | This file is part of libopcodes. |
10 | | |
11 | | This library is free software; you can redistribute it and/or modify |
12 | | it under the terms of the GNU General Public License as published by |
13 | | the Free Software Foundation; either version 3, or (at your option) |
14 | | any later version. |
15 | | |
16 | | It is distributed in the hope that it will be useful, but WITHOUT |
17 | | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
18 | | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
19 | | License for more details. |
20 | | |
21 | | You should have received a copy of the GNU General Public License |
22 | | along with this program; if not, write to the Free Software Foundation, Inc., |
23 | | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
24 | | |
25 | | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
26 | | Keep that in mind. */ |
27 | | |
28 | | #include "sysdep.h" |
29 | | #include <stdio.h> |
30 | | #include "ansidecl.h" |
31 | | #include "dis-asm.h" |
32 | | #include "bfd.h" |
33 | | #include "symcat.h" |
34 | | #include "bpf-desc.h" |
35 | | #include "bpf-opc.h" |
36 | | #include "cgen/basic-modes.h" |
37 | | #include "opintl.h" |
38 | | #include "safe-ctype.h" |
39 | | |
40 | | #undef min |
41 | 0 | #define min(a,b) ((a) < (b) ? (a) : (b)) |
42 | | #undef max |
43 | | #define max(a,b) ((a) > (b) ? (a) : (b)) |
44 | | |
45 | | /* Used by the ifield rtx function. */ |
46 | 204 | #define FLD(f) (fields->f) |
47 | | |
48 | | static const char * insert_normal |
49 | | (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, |
50 | | unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); |
51 | | static const char * insert_insn_normal |
52 | | (CGEN_CPU_DESC, const CGEN_INSN *, |
53 | | CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
54 | | static int extract_normal |
55 | | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, |
56 | | unsigned int, unsigned int, unsigned int, unsigned int, |
57 | | unsigned int, unsigned int, bfd_vma, long *); |
58 | | static int extract_insn_normal |
59 | | (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, |
60 | | CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
61 | | #if CGEN_INT_INSN_P |
62 | | static void put_insn_int_value |
63 | | (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); |
64 | | #endif |
65 | | #if ! CGEN_INT_INSN_P |
66 | | static CGEN_INLINE void insert_1 |
67 | | (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); |
68 | | static CGEN_INLINE int fill_cache |
69 | | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); |
70 | | static CGEN_INLINE long extract_1 |
71 | | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); |
72 | | #endif |
73 | | |
74 | | /* Operand insertion. */ |
75 | | |
76 | | #if ! CGEN_INT_INSN_P |
77 | | |
78 | | /* Subroutine of insert_normal. */ |
79 | | |
80 | | static CGEN_INLINE void |
81 | | insert_1 (CGEN_CPU_DESC cd, |
82 | | unsigned long value, |
83 | | int start, |
84 | | int length, |
85 | | int word_length, |
86 | | unsigned char *bufp) |
87 | 0 | { |
88 | 0 | unsigned long x, mask; |
89 | 0 | int shift; |
90 | |
|
91 | 0 | x = cgen_get_insn_value (cd, bufp, word_length, cd->endian); |
92 | | |
93 | | /* Written this way to avoid undefined behaviour. */ |
94 | 0 | mask = (1UL << (length - 1) << 1) - 1; |
95 | 0 | if (CGEN_INSN_LSB0_P) |
96 | 0 | shift = (start + 1) - length; |
97 | 0 | else |
98 | 0 | shift = (word_length - (start + length)); |
99 | 0 | x = (x & ~(mask << shift)) | ((value & mask) << shift); |
100 | |
|
101 | 0 | cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian); |
102 | 0 | } |
103 | | |
104 | | #endif /* ! CGEN_INT_INSN_P */ |
105 | | |
106 | | /* Default insertion routine. |
107 | | |
108 | | ATTRS is a mask of the boolean attributes. |
109 | | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
110 | | WORD_LENGTH is the length of the word in bits in which the value resides. |
111 | | START is the starting bit number in the word, architecture origin. |
112 | | LENGTH is the length of VALUE in bits. |
113 | | TOTAL_LENGTH is the total length of the insn in bits. |
114 | | |
115 | | The result is an error message or NULL if success. */ |
116 | | |
117 | | /* ??? This duplicates functionality with bfd's howto table and |
118 | | bfd_install_relocation. */ |
119 | | /* ??? This doesn't handle bfd_vma's. Create another function when |
120 | | necessary. */ |
121 | | |
122 | | static const char * |
123 | | insert_normal (CGEN_CPU_DESC cd, |
124 | | long value, |
125 | | unsigned int attrs, |
126 | | unsigned int word_offset, |
127 | | unsigned int start, |
128 | | unsigned int length, |
129 | | unsigned int word_length, |
130 | | unsigned int total_length, |
131 | | CGEN_INSN_BYTES_PTR buffer) |
132 | 0 | { |
133 | 0 | static char errbuf[100]; |
134 | 0 | unsigned long mask; |
135 | | |
136 | | /* If LENGTH is zero, this operand doesn't contribute to the value. */ |
137 | 0 | if (length == 0) |
138 | 0 | return NULL; |
139 | | |
140 | | /* Written this way to avoid undefined behaviour. */ |
141 | 0 | mask = (1UL << (length - 1) << 1) - 1; |
142 | |
|
143 | 0 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
144 | 0 | abort (); |
145 | | |
146 | | /* For architectures with insns smaller than the base-insn-bitsize, |
147 | | word_length may be too big. */ |
148 | 0 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
149 | 0 | { |
150 | 0 | if (word_offset == 0 |
151 | 0 | && word_length > total_length) |
152 | 0 | word_length = total_length; |
153 | 0 | } |
154 | | |
155 | | /* Ensure VALUE will fit. */ |
156 | 0 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) |
157 | 0 | { |
158 | 0 | long minval = - (1UL << (length - 1)); |
159 | 0 | unsigned long maxval = mask; |
160 | |
|
161 | 0 | if ((value > 0 && (unsigned long) value > maxval) |
162 | 0 | || value < minval) |
163 | 0 | { |
164 | | /* xgettext:c-format */ |
165 | 0 | sprintf (errbuf, |
166 | 0 | _("operand out of range (%ld not between %ld and %lu)"), |
167 | 0 | value, minval, maxval); |
168 | 0 | return errbuf; |
169 | 0 | } |
170 | 0 | } |
171 | 0 | else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) |
172 | 0 | { |
173 | 0 | unsigned long maxval = mask; |
174 | 0 | unsigned long val = (unsigned long) value; |
175 | | |
176 | | /* For hosts with a word size > 32 check to see if value has been sign |
177 | | extended beyond 32 bits. If so then ignore these higher sign bits |
178 | | as the user is attempting to store a 32-bit signed value into an |
179 | | unsigned 32-bit field which is allowed. */ |
180 | 0 | if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) |
181 | 0 | val &= 0xFFFFFFFF; |
182 | |
|
183 | 0 | if (val > maxval) |
184 | 0 | { |
185 | | /* xgettext:c-format */ |
186 | 0 | sprintf (errbuf, |
187 | 0 | _("operand out of range (0x%lx not between 0 and 0x%lx)"), |
188 | 0 | val, maxval); |
189 | 0 | return errbuf; |
190 | 0 | } |
191 | 0 | } |
192 | 0 | else |
193 | 0 | { |
194 | 0 | if (! cgen_signed_overflow_ok_p (cd)) |
195 | 0 | { |
196 | 0 | long minval = - (1UL << (length - 1)); |
197 | 0 | long maxval = (1UL << (length - 1)) - 1; |
198 | |
|
199 | 0 | if (value < minval || value > maxval) |
200 | 0 | { |
201 | 0 | sprintf |
202 | | /* xgettext:c-format */ |
203 | 0 | (errbuf, _("operand out of range (%ld not between %ld and %ld)"), |
204 | 0 | value, minval, maxval); |
205 | 0 | return errbuf; |
206 | 0 | } |
207 | 0 | } |
208 | 0 | } |
209 | | |
210 | | #if CGEN_INT_INSN_P |
211 | | |
212 | | { |
213 | | int shift_within_word, shift_to_word, shift; |
214 | | |
215 | | /* How to shift the value to BIT0 of the word. */ |
216 | | shift_to_word = total_length - (word_offset + word_length); |
217 | | |
218 | | /* How to shift the value to the field within the word. */ |
219 | | if (CGEN_INSN_LSB0_P) |
220 | | shift_within_word = start + 1 - length; |
221 | | else |
222 | | shift_within_word = word_length - start - length; |
223 | | |
224 | | /* The total SHIFT, then mask in the value. */ |
225 | | shift = shift_to_word + shift_within_word; |
226 | | *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); |
227 | | } |
228 | | |
229 | | #else /* ! CGEN_INT_INSN_P */ |
230 | | |
231 | 0 | { |
232 | 0 | unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; |
233 | |
|
234 | 0 | insert_1 (cd, value, start, length, word_length, bufp); |
235 | 0 | } |
236 | |
|
237 | 0 | #endif /* ! CGEN_INT_INSN_P */ |
238 | |
|
239 | 0 | return NULL; |
240 | 0 | } |
241 | | |
242 | | /* Default insn builder (insert handler). |
243 | | The instruction is recorded in CGEN_INT_INSN_P byte order (meaning |
244 | | that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is |
245 | | recorded in host byte order, otherwise BUFFER is an array of bytes |
246 | | and the value is recorded in target byte order). |
247 | | The result is an error message or NULL if success. */ |
248 | | |
249 | | static const char * |
250 | | insert_insn_normal (CGEN_CPU_DESC cd, |
251 | | const CGEN_INSN * insn, |
252 | | CGEN_FIELDS * fields, |
253 | | CGEN_INSN_BYTES_PTR buffer, |
254 | | bfd_vma pc) |
255 | 0 | { |
256 | 0 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
257 | 0 | unsigned long value; |
258 | 0 | const CGEN_SYNTAX_CHAR_TYPE * syn; |
259 | |
|
260 | 0 | CGEN_INIT_INSERT (cd); |
261 | 0 | value = CGEN_INSN_BASE_VALUE (insn); |
262 | | |
263 | | /* If we're recording insns as numbers (rather than a string of bytes), |
264 | | target byte order handling is deferred until later. */ |
265 | |
|
266 | | #if CGEN_INT_INSN_P |
267 | | |
268 | | put_insn_int_value (cd, buffer, cd->base_insn_bitsize, |
269 | | CGEN_FIELDS_BITSIZE (fields), value); |
270 | | |
271 | | #else |
272 | |
|
273 | 0 | cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, |
274 | 0 | (unsigned) CGEN_FIELDS_BITSIZE (fields)), |
275 | 0 | value, cd->insn_endian); |
276 | |
|
277 | 0 | #endif /* ! CGEN_INT_INSN_P */ |
278 | | |
279 | | /* ??? It would be better to scan the format's fields. |
280 | | Still need to be able to insert a value based on the operand though; |
281 | | e.g. storing a branch displacement that got resolved later. |
282 | | Needs more thought first. */ |
283 | |
|
284 | 0 | for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) |
285 | 0 | { |
286 | 0 | const char *errmsg; |
287 | |
|
288 | 0 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
289 | 0 | continue; |
290 | | |
291 | 0 | errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
292 | 0 | fields, buffer, pc); |
293 | 0 | if (errmsg) |
294 | 0 | return errmsg; |
295 | 0 | } |
296 | | |
297 | 0 | return NULL; |
298 | 0 | } |
299 | | |
300 | | #if CGEN_INT_INSN_P |
301 | | /* Cover function to store an insn value into an integral insn. Must go here |
302 | | because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ |
303 | | |
304 | | static void |
305 | | put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
306 | | CGEN_INSN_BYTES_PTR buf, |
307 | | int length, |
308 | | int insn_length, |
309 | | CGEN_INSN_INT value) |
310 | | { |
311 | | /* For architectures with insns smaller than the base-insn-bitsize, |
312 | | length may be too big. */ |
313 | | if (length > insn_length) |
314 | | *buf = value; |
315 | | else |
316 | | { |
317 | | int shift = insn_length - length; |
318 | | /* Written this way to avoid undefined behaviour. */ |
319 | | CGEN_INSN_INT mask = length == 0 ? 0 : (1UL << (length - 1) << 1) - 1; |
320 | | |
321 | | *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); |
322 | | } |
323 | | } |
324 | | #endif |
325 | | |
326 | | /* Operand extraction. */ |
327 | | |
328 | | #if ! CGEN_INT_INSN_P |
329 | | |
330 | | /* Subroutine of extract_normal. |
331 | | Ensure sufficient bytes are cached in EX_INFO. |
332 | | OFFSET is the offset in bytes from the start of the insn of the value. |
333 | | BYTES is the length of the needed value. |
334 | | Returns 1 for success, 0 for failure. */ |
335 | | |
336 | | static CGEN_INLINE int |
337 | | fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
338 | | CGEN_EXTRACT_INFO *ex_info, |
339 | | int offset, |
340 | | int bytes, |
341 | | bfd_vma pc) |
342 | 16.6k | { |
343 | | /* It's doubtful that the middle part has already been fetched so |
344 | | we don't optimize that case. kiss. */ |
345 | 16.6k | unsigned int mask; |
346 | 16.6k | disassemble_info *info = (disassemble_info *) ex_info->dis_info; |
347 | | |
348 | | /* First do a quick check. */ |
349 | 16.6k | mask = (1 << bytes) - 1; |
350 | 16.6k | if (((ex_info->valid >> offset) & mask) == mask) |
351 | 16.4k | return 1; |
352 | | |
353 | | /* Search for the first byte we need to read. */ |
354 | 142 | for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) |
355 | 142 | if (! (mask & ex_info->valid)) |
356 | 142 | break; |
357 | | |
358 | 142 | if (bytes) |
359 | 142 | { |
360 | 142 | int status; |
361 | | |
362 | 142 | pc += offset; |
363 | 142 | status = (*info->read_memory_func) |
364 | 142 | (pc, ex_info->insn_bytes + offset, bytes, info); |
365 | | |
366 | 142 | if (status != 0) |
367 | 4 | { |
368 | 4 | (*info->memory_error_func) (status, pc, info); |
369 | 4 | return 0; |
370 | 4 | } |
371 | | |
372 | 138 | ex_info->valid |= ((1 << bytes) - 1) << offset; |
373 | 138 | } |
374 | | |
375 | 138 | return 1; |
376 | 142 | } |
377 | | |
378 | | /* Subroutine of extract_normal. */ |
379 | | |
380 | | static CGEN_INLINE long |
381 | | extract_1 (CGEN_CPU_DESC cd, |
382 | | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
383 | | int start, |
384 | | int length, |
385 | | int word_length, |
386 | | unsigned char *bufp, |
387 | | bfd_vma pc ATTRIBUTE_UNUSED) |
388 | 16.6k | { |
389 | 16.6k | unsigned long x; |
390 | 16.6k | int shift; |
391 | | |
392 | 16.6k | x = cgen_get_insn_value (cd, bufp, word_length, cd->endian); |
393 | | |
394 | 16.6k | if (CGEN_INSN_LSB0_P) |
395 | 16.6k | shift = (start + 1) - length; |
396 | 0 | else |
397 | 0 | shift = (word_length - (start + length)); |
398 | 16.6k | return x >> shift; |
399 | 16.6k | } |
400 | | |
401 | | #endif /* ! CGEN_INT_INSN_P */ |
402 | | |
403 | | /* Default extraction routine. |
404 | | |
405 | | INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, |
406 | | or sometimes less for cases like the m32r where the base insn size is 32 |
407 | | but some insns are 16 bits. |
408 | | ATTRS is a mask of the boolean attributes. We only need `SIGNED', |
409 | | but for generality we take a bitmask of all of them. |
410 | | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
411 | | WORD_LENGTH is the length of the word in bits in which the value resides. |
412 | | START is the starting bit number in the word, architecture origin. |
413 | | LENGTH is the length of VALUE in bits. |
414 | | TOTAL_LENGTH is the total length of the insn in bits. |
415 | | |
416 | | Returns 1 for success, 0 for failure. */ |
417 | | |
418 | | /* ??? The return code isn't properly used. wip. */ |
419 | | |
420 | | /* ??? This doesn't handle bfd_vma's. Create another function when |
421 | | necessary. */ |
422 | | |
423 | | static int |
424 | | extract_normal (CGEN_CPU_DESC cd, |
425 | | #if ! CGEN_INT_INSN_P |
426 | | CGEN_EXTRACT_INFO *ex_info, |
427 | | #else |
428 | | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
429 | | #endif |
430 | | CGEN_INSN_INT insn_value, |
431 | | unsigned int attrs, |
432 | | unsigned int word_offset, |
433 | | unsigned int start, |
434 | | unsigned int length, |
435 | | unsigned int word_length, |
436 | | unsigned int total_length, |
437 | | #if ! CGEN_INT_INSN_P |
438 | | bfd_vma pc, |
439 | | #else |
440 | | bfd_vma pc ATTRIBUTE_UNUSED, |
441 | | #endif |
442 | | long *valuep) |
443 | 16.6k | { |
444 | 16.6k | long value, mask; |
445 | | |
446 | | /* If LENGTH is zero, this operand doesn't contribute to the value |
447 | | so give it a standard value of zero. */ |
448 | 16.6k | if (length == 0) |
449 | 0 | { |
450 | 0 | *valuep = 0; |
451 | 0 | return 1; |
452 | 0 | } |
453 | | |
454 | 16.6k | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
455 | 0 | abort (); |
456 | | |
457 | | /* For architectures with insns smaller than the insn-base-bitsize, |
458 | | word_length may be too big. */ |
459 | 16.6k | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
460 | 0 | { |
461 | 0 | if (word_offset + word_length > total_length) |
462 | 0 | word_length = total_length - word_offset; |
463 | 0 | } |
464 | | |
465 | | /* Does the value reside in INSN_VALUE, and at the right alignment? */ |
466 | | |
467 | 16.6k | if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) |
468 | 0 | { |
469 | 0 | if (CGEN_INSN_LSB0_P) |
470 | 0 | value = insn_value >> ((word_offset + start + 1) - length); |
471 | 0 | else |
472 | 0 | value = insn_value >> (total_length - ( word_offset + start + length)); |
473 | 0 | } |
474 | | |
475 | 16.6k | #if ! CGEN_INT_INSN_P |
476 | | |
477 | 16.6k | else |
478 | 16.6k | { |
479 | 16.6k | unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; |
480 | | |
481 | 16.6k | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
482 | 0 | abort (); |
483 | | |
484 | 16.6k | if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) |
485 | 4 | { |
486 | 4 | *valuep = 0; |
487 | 4 | return 0; |
488 | 4 | } |
489 | | |
490 | 16.6k | value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); |
491 | 16.6k | } |
492 | | |
493 | 16.6k | #endif /* ! CGEN_INT_INSN_P */ |
494 | | |
495 | | /* Written this way to avoid undefined behaviour. */ |
496 | 16.6k | mask = (1UL << (length - 1) << 1) - 1; |
497 | | |
498 | 16.6k | value &= mask; |
499 | | /* sign extend? */ |
500 | 16.6k | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) |
501 | 16.6k | && (value & (1UL << (length - 1)))) |
502 | 2.16k | value |= ~mask; |
503 | | |
504 | 16.6k | *valuep = value; |
505 | | |
506 | 16.6k | return 1; |
507 | 16.6k | } |
508 | | |
509 | | /* Default insn extractor. |
510 | | |
511 | | INSN_VALUE is the first base_insn_bitsize bits, translated to host order. |
512 | | The extracted fields are stored in FIELDS. |
513 | | EX_INFO is used to handle reading variable length insns. |
514 | | Return the length of the insn in bits, or 0 if no match, |
515 | | or -1 if an error occurs fetching data (memory_error_func will have |
516 | | been called). */ |
517 | | |
518 | | static int |
519 | | extract_insn_normal (CGEN_CPU_DESC cd, |
520 | | const CGEN_INSN *insn, |
521 | | CGEN_EXTRACT_INFO *ex_info, |
522 | | CGEN_INSN_INT insn_value, |
523 | | CGEN_FIELDS *fields, |
524 | | bfd_vma pc) |
525 | 5.64k | { |
526 | 5.64k | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
527 | 5.64k | const CGEN_SYNTAX_CHAR_TYPE *syn; |
528 | | |
529 | 5.64k | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); |
530 | | |
531 | 5.64k | CGEN_INIT_EXTRACT (cd); |
532 | | |
533 | 49.6k | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) |
534 | 43.9k | { |
535 | 43.9k | int length; |
536 | | |
537 | 43.9k | if (CGEN_SYNTAX_CHAR_P (*syn)) |
538 | 27.4k | continue; |
539 | | |
540 | 16.4k | length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
541 | 16.4k | ex_info, insn_value, fields, pc); |
542 | 16.4k | if (length <= 0) |
543 | 4 | return length; |
544 | 16.4k | } |
545 | | |
546 | | /* We recognized and successfully extracted this insn. */ |
547 | 5.64k | return CGEN_INSN_BITSIZE (insn); |
548 | 5.64k | } |
549 | | |
550 | | /* Machine generated code added here. */ |
551 | | |
552 | | const char * bpf_cgen_insert_operand |
553 | | (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
554 | | |
555 | | /* Main entry point for operand insertion. |
556 | | |
557 | | This function is basically just a big switch statement. Earlier versions |
558 | | used tables to look up the function to use, but |
559 | | - if the table contains both assembler and disassembler functions then |
560 | | the disassembler contains much of the assembler and vice-versa, |
561 | | - there's a lot of inlining possibilities as things grow, |
562 | | - using a switch statement avoids the function call overhead. |
563 | | |
564 | | This function could be moved into `parse_insn_normal', but keeping it |
565 | | separate makes clear the interface between `parse_insn_normal' and each of |
566 | | the handlers. It's also needed by GAS to insert operands that couldn't be |
567 | | resolved during parsing. */ |
568 | | |
569 | | const char * |
570 | | bpf_cgen_insert_operand (CGEN_CPU_DESC cd, |
571 | | int opindex, |
572 | | CGEN_FIELDS * fields, |
573 | | CGEN_INSN_BYTES_PTR buffer, |
574 | | bfd_vma pc ATTRIBUTE_UNUSED) |
575 | 0 | { |
576 | 0 | const char * errmsg = NULL; |
577 | 0 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
578 | |
|
579 | 0 | switch (opindex) |
580 | 0 | { |
581 | 0 | case BPF_OPERAND_DISP16 : |
582 | 0 | errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, buffer); |
583 | 0 | break; |
584 | 0 | case BPF_OPERAND_DISP32 : |
585 | 0 | errmsg = insert_normal (cd, fields->f_imm32, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, buffer); |
586 | 0 | break; |
587 | 0 | case BPF_OPERAND_DSTBE : |
588 | 0 | errmsg = insert_normal (cd, fields->f_dstbe, 0, 8, 7, 4, 8, total_length, buffer); |
589 | 0 | break; |
590 | 0 | case BPF_OPERAND_DSTLE : |
591 | 0 | errmsg = insert_normal (cd, fields->f_dstle, 0, 8, 3, 4, 8, total_length, buffer); |
592 | 0 | break; |
593 | 0 | case BPF_OPERAND_ENDSIZE : |
594 | 0 | errmsg = insert_normal (cd, fields->f_imm32, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, buffer); |
595 | 0 | break; |
596 | 0 | case BPF_OPERAND_IMM32 : |
597 | 0 | errmsg = insert_normal (cd, fields->f_imm32, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, buffer); |
598 | 0 | break; |
599 | 0 | case BPF_OPERAND_IMM64 : |
600 | 0 | { |
601 | 0 | { |
602 | 0 | FLD (f_imm64_b) = 0; |
603 | 0 | FLD (f_imm64_c) = ((UDI) (FLD (f_imm64)) >> (32)); |
604 | 0 | FLD (f_imm64_a) = ((FLD (f_imm64)) & (MAKEDI (0, 0xffffffff))); |
605 | 0 | } |
606 | 0 | errmsg = insert_normal (cd, fields->f_imm64_a, 0, 32, 31, 32, 32, total_length, buffer); |
607 | 0 | if (errmsg) |
608 | 0 | break; |
609 | 0 | errmsg = insert_normal (cd, fields->f_imm64_b, 0, 64, 31, 32, 32, total_length, buffer); |
610 | 0 | if (errmsg) |
611 | 0 | break; |
612 | 0 | errmsg = insert_normal (cd, fields->f_imm64_c, 0, 96, 31, 32, 32, total_length, buffer); |
613 | 0 | if (errmsg) |
614 | 0 | break; |
615 | 0 | } |
616 | 0 | break; |
617 | 0 | case BPF_OPERAND_OFFSET16 : |
618 | 0 | errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, buffer); |
619 | 0 | break; |
620 | 0 | case BPF_OPERAND_SRCBE : |
621 | 0 | errmsg = insert_normal (cd, fields->f_srcbe, 0, 8, 3, 4, 8, total_length, buffer); |
622 | 0 | break; |
623 | 0 | case BPF_OPERAND_SRCLE : |
624 | 0 | errmsg = insert_normal (cd, fields->f_srcle, 0, 8, 7, 4, 8, total_length, buffer); |
625 | 0 | break; |
626 | | |
627 | 0 | default : |
628 | | /* xgettext:c-format */ |
629 | 0 | opcodes_error_handler |
630 | 0 | (_("internal error: unrecognized field %d while building insn"), |
631 | 0 | opindex); |
632 | 0 | abort (); |
633 | 0 | } |
634 | | |
635 | 0 | return errmsg; |
636 | 0 | } |
637 | | |
638 | | int bpf_cgen_extract_operand |
639 | | (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
640 | | |
641 | | /* Main entry point for operand extraction. |
642 | | The result is <= 0 for error, >0 for success. |
643 | | ??? Actual values aren't well defined right now. |
644 | | |
645 | | This function is basically just a big switch statement. Earlier versions |
646 | | used tables to look up the function to use, but |
647 | | - if the table contains both assembler and disassembler functions then |
648 | | the disassembler contains much of the assembler and vice-versa, |
649 | | - there's a lot of inlining possibilities as things grow, |
650 | | - using a switch statement avoids the function call overhead. |
651 | | |
652 | | This function could be moved into `print_insn_normal', but keeping it |
653 | | separate makes clear the interface between `print_insn_normal' and each of |
654 | | the handlers. */ |
655 | | |
656 | | int |
657 | | bpf_cgen_extract_operand (CGEN_CPU_DESC cd, |
658 | | int opindex, |
659 | | CGEN_EXTRACT_INFO *ex_info, |
660 | | CGEN_INSN_INT insn_value, |
661 | | CGEN_FIELDS * fields, |
662 | | bfd_vma pc) |
663 | 16.4k | { |
664 | | /* Assume success (for those operands that are nops). */ |
665 | 16.4k | int length = 1; |
666 | 16.4k | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
667 | | |
668 | 16.4k | switch (opindex) |
669 | 16.4k | { |
670 | 2.59k | case BPF_OPERAND_DISP16 : |
671 | 2.59k | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, pc, & fields->f_offset16); |
672 | 2.59k | break; |
673 | 7 | case BPF_OPERAND_DISP32 : |
674 | 7 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, pc, & fields->f_imm32); |
675 | 7 | break; |
676 | 0 | case BPF_OPERAND_DSTBE : |
677 | 0 | length = extract_normal (cd, ex_info, insn_value, 0, 8, 7, 4, 8, total_length, pc, & fields->f_dstbe); |
678 | 0 | break; |
679 | 5.54k | case BPF_OPERAND_DSTLE : |
680 | 5.54k | length = extract_normal (cd, ex_info, insn_value, 0, 8, 3, 4, 8, total_length, pc, & fields->f_dstle); |
681 | 5.54k | break; |
682 | 18 | case BPF_OPERAND_ENDSIZE : |
683 | 18 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, pc, & fields->f_imm32); |
684 | 18 | break; |
685 | 550 | case BPF_OPERAND_IMM32 : |
686 | 550 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 31, 32, 32, total_length, pc, & fields->f_imm32); |
687 | 550 | break; |
688 | 72 | case BPF_OPERAND_IMM64 : |
689 | 72 | { |
690 | 72 | length = extract_normal (cd, ex_info, insn_value, 0, 32, 31, 32, 32, total_length, pc, & fields->f_imm64_a); |
691 | 72 | if (length <= 0) break; |
692 | 72 | length = extract_normal (cd, ex_info, insn_value, 0, 64, 31, 32, 32, total_length, pc, & fields->f_imm64_b); |
693 | 72 | if (length <= 0) break; |
694 | 70 | length = extract_normal (cd, ex_info, insn_value, 0, 96, 31, 32, 32, total_length, pc, & fields->f_imm64_c); |
695 | 70 | if (length <= 0) break; |
696 | 68 | { |
697 | 68 | FLD (f_imm64) = ((((((UDI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((UDI) (UINT) (FLD (f_imm64_a))))); |
698 | 68 | } |
699 | 68 | } |
700 | 0 | break; |
701 | 2.67k | case BPF_OPERAND_OFFSET16 : |
702 | 2.67k | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 16, 15, 16, 16, total_length, pc, & fields->f_offset16); |
703 | 2.67k | break; |
704 | 0 | case BPF_OPERAND_SRCBE : |
705 | 0 | length = extract_normal (cd, ex_info, insn_value, 0, 8, 3, 4, 8, total_length, pc, & fields->f_srcbe); |
706 | 0 | break; |
707 | 5.01k | case BPF_OPERAND_SRCLE : |
708 | 5.01k | length = extract_normal (cd, ex_info, insn_value, 0, 8, 7, 4, 8, total_length, pc, & fields->f_srcle); |
709 | 5.01k | break; |
710 | | |
711 | 0 | default : |
712 | | /* xgettext:c-format */ |
713 | 0 | opcodes_error_handler |
714 | 0 | (_("internal error: unrecognized field %d while decoding insn"), |
715 | 0 | opindex); |
716 | 0 | abort (); |
717 | 16.4k | } |
718 | | |
719 | 16.4k | return length; |
720 | 16.4k | } |
721 | | |
722 | | cgen_insert_fn * const bpf_cgen_insert_handlers[] = |
723 | | { |
724 | | insert_insn_normal, |
725 | | }; |
726 | | |
727 | | cgen_extract_fn * const bpf_cgen_extract_handlers[] = |
728 | | { |
729 | | extract_insn_normal, |
730 | | }; |
731 | | |
732 | | int bpf_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
733 | | bfd_vma bpf_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
734 | | |
735 | | /* Getting values from cgen_fields is handled by a collection of functions. |
736 | | They are distinguished by the type of the VALUE argument they return. |
737 | | TODO: floating point, inlining support, remove cases where result type |
738 | | not appropriate. */ |
739 | | |
740 | | int |
741 | | bpf_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
742 | | int opindex, |
743 | | const CGEN_FIELDS * fields) |
744 | 0 | { |
745 | 0 | int value; |
746 | |
|
747 | 0 | switch (opindex) |
748 | 0 | { |
749 | 0 | case BPF_OPERAND_DISP16 : |
750 | 0 | value = fields->f_offset16; |
751 | 0 | break; |
752 | 0 | case BPF_OPERAND_DISP32 : |
753 | 0 | value = fields->f_imm32; |
754 | 0 | break; |
755 | 0 | case BPF_OPERAND_DSTBE : |
756 | 0 | value = fields->f_dstbe; |
757 | 0 | break; |
758 | 0 | case BPF_OPERAND_DSTLE : |
759 | 0 | value = fields->f_dstle; |
760 | 0 | break; |
761 | 0 | case BPF_OPERAND_ENDSIZE : |
762 | 0 | value = fields->f_imm32; |
763 | 0 | break; |
764 | 0 | case BPF_OPERAND_IMM32 : |
765 | 0 | value = fields->f_imm32; |
766 | 0 | break; |
767 | 0 | case BPF_OPERAND_IMM64 : |
768 | 0 | value = fields->f_imm64; |
769 | 0 | break; |
770 | 0 | case BPF_OPERAND_OFFSET16 : |
771 | 0 | value = fields->f_offset16; |
772 | 0 | break; |
773 | 0 | case BPF_OPERAND_SRCBE : |
774 | 0 | value = fields->f_srcbe; |
775 | 0 | break; |
776 | 0 | case BPF_OPERAND_SRCLE : |
777 | 0 | value = fields->f_srcle; |
778 | 0 | break; |
779 | | |
780 | 0 | default : |
781 | | /* xgettext:c-format */ |
782 | 0 | opcodes_error_handler |
783 | 0 | (_("internal error: unrecognized field %d while getting int operand"), |
784 | 0 | opindex); |
785 | 0 | abort (); |
786 | 0 | } |
787 | | |
788 | 0 | return value; |
789 | 0 | } |
790 | | |
791 | | bfd_vma |
792 | | bpf_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
793 | | int opindex, |
794 | | const CGEN_FIELDS * fields) |
795 | 0 | { |
796 | 0 | bfd_vma value; |
797 | |
|
798 | 0 | switch (opindex) |
799 | 0 | { |
800 | 0 | case BPF_OPERAND_DISP16 : |
801 | 0 | value = fields->f_offset16; |
802 | 0 | break; |
803 | 0 | case BPF_OPERAND_DISP32 : |
804 | 0 | value = fields->f_imm32; |
805 | 0 | break; |
806 | 0 | case BPF_OPERAND_DSTBE : |
807 | 0 | value = fields->f_dstbe; |
808 | 0 | break; |
809 | 0 | case BPF_OPERAND_DSTLE : |
810 | 0 | value = fields->f_dstle; |
811 | 0 | break; |
812 | 0 | case BPF_OPERAND_ENDSIZE : |
813 | 0 | value = fields->f_imm32; |
814 | 0 | break; |
815 | 0 | case BPF_OPERAND_IMM32 : |
816 | 0 | value = fields->f_imm32; |
817 | 0 | break; |
818 | 0 | case BPF_OPERAND_IMM64 : |
819 | 0 | value = fields->f_imm64; |
820 | 0 | break; |
821 | 0 | case BPF_OPERAND_OFFSET16 : |
822 | 0 | value = fields->f_offset16; |
823 | 0 | break; |
824 | 0 | case BPF_OPERAND_SRCBE : |
825 | 0 | value = fields->f_srcbe; |
826 | 0 | break; |
827 | 0 | case BPF_OPERAND_SRCLE : |
828 | 0 | value = fields->f_srcle; |
829 | 0 | break; |
830 | | |
831 | 0 | default : |
832 | | /* xgettext:c-format */ |
833 | 0 | opcodes_error_handler |
834 | 0 | (_("internal error: unrecognized field %d while getting vma operand"), |
835 | 0 | opindex); |
836 | 0 | abort (); |
837 | 0 | } |
838 | | |
839 | 0 | return value; |
840 | 0 | } |
841 | | |
842 | | void bpf_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); |
843 | | void bpf_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); |
844 | | |
845 | | /* Stuffing values in cgen_fields is handled by a collection of functions. |
846 | | They are distinguished by the type of the VALUE argument they accept. |
847 | | TODO: floating point, inlining support, remove cases where argument type |
848 | | not appropriate. */ |
849 | | |
850 | | void |
851 | | bpf_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
852 | | int opindex, |
853 | | CGEN_FIELDS * fields, |
854 | | int value) |
855 | 0 | { |
856 | 0 | switch (opindex) |
857 | 0 | { |
858 | 0 | case BPF_OPERAND_DISP16 : |
859 | 0 | fields->f_offset16 = value; |
860 | 0 | break; |
861 | 0 | case BPF_OPERAND_DISP32 : |
862 | 0 | fields->f_imm32 = value; |
863 | 0 | break; |
864 | 0 | case BPF_OPERAND_DSTBE : |
865 | 0 | fields->f_dstbe = value; |
866 | 0 | break; |
867 | 0 | case BPF_OPERAND_DSTLE : |
868 | 0 | fields->f_dstle = value; |
869 | 0 | break; |
870 | 0 | case BPF_OPERAND_ENDSIZE : |
871 | 0 | fields->f_imm32 = value; |
872 | 0 | break; |
873 | 0 | case BPF_OPERAND_IMM32 : |
874 | 0 | fields->f_imm32 = value; |
875 | 0 | break; |
876 | 0 | case BPF_OPERAND_IMM64 : |
877 | 0 | fields->f_imm64 = value; |
878 | 0 | break; |
879 | 0 | case BPF_OPERAND_OFFSET16 : |
880 | 0 | fields->f_offset16 = value; |
881 | 0 | break; |
882 | 0 | case BPF_OPERAND_SRCBE : |
883 | 0 | fields->f_srcbe = value; |
884 | 0 | break; |
885 | 0 | case BPF_OPERAND_SRCLE : |
886 | 0 | fields->f_srcle = value; |
887 | 0 | break; |
888 | | |
889 | 0 | default : |
890 | | /* xgettext:c-format */ |
891 | 0 | opcodes_error_handler |
892 | 0 | (_("internal error: unrecognized field %d while setting int operand"), |
893 | 0 | opindex); |
894 | 0 | abort (); |
895 | 0 | } |
896 | 0 | } |
897 | | |
898 | | void |
899 | | bpf_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
900 | | int opindex, |
901 | | CGEN_FIELDS * fields, |
902 | | bfd_vma value) |
903 | 0 | { |
904 | 0 | switch (opindex) |
905 | 0 | { |
906 | 0 | case BPF_OPERAND_DISP16 : |
907 | 0 | fields->f_offset16 = value; |
908 | 0 | break; |
909 | 0 | case BPF_OPERAND_DISP32 : |
910 | 0 | fields->f_imm32 = value; |
911 | 0 | break; |
912 | 0 | case BPF_OPERAND_DSTBE : |
913 | 0 | fields->f_dstbe = value; |
914 | 0 | break; |
915 | 0 | case BPF_OPERAND_DSTLE : |
916 | 0 | fields->f_dstle = value; |
917 | 0 | break; |
918 | 0 | case BPF_OPERAND_ENDSIZE : |
919 | 0 | fields->f_imm32 = value; |
920 | 0 | break; |
921 | 0 | case BPF_OPERAND_IMM32 : |
922 | 0 | fields->f_imm32 = value; |
923 | 0 | break; |
924 | 0 | case BPF_OPERAND_IMM64 : |
925 | 0 | fields->f_imm64 = value; |
926 | 0 | break; |
927 | 0 | case BPF_OPERAND_OFFSET16 : |
928 | 0 | fields->f_offset16 = value; |
929 | 0 | break; |
930 | 0 | case BPF_OPERAND_SRCBE : |
931 | 0 | fields->f_srcbe = value; |
932 | 0 | break; |
933 | 0 | case BPF_OPERAND_SRCLE : |
934 | 0 | fields->f_srcle = value; |
935 | 0 | break; |
936 | | |
937 | 0 | default : |
938 | | /* xgettext:c-format */ |
939 | 0 | opcodes_error_handler |
940 | 0 | (_("internal error: unrecognized field %d while setting vma operand"), |
941 | 0 | opindex); |
942 | 0 | abort (); |
943 | 0 | } |
944 | 0 | } |
945 | | |
946 | | /* Function to call before using the instruction builder tables. */ |
947 | | |
948 | | void |
949 | | bpf_cgen_init_ibld_table (CGEN_CPU_DESC cd) |
950 | 4 | { |
951 | 4 | cd->insert_handlers = & bpf_cgen_insert_handlers[0]; |
952 | 4 | cd->extract_handlers = & bpf_cgen_extract_handlers[0]; |
953 | | |
954 | 4 | cd->insert_operand = bpf_cgen_insert_operand; |
955 | 4 | cd->extract_operand = bpf_cgen_extract_operand; |
956 | | |
957 | 4 | cd->get_int_operand = bpf_cgen_get_int_operand; |
958 | 4 | cd->set_int_operand = bpf_cgen_set_int_operand; |
959 | 4 | cd->get_vma_operand = bpf_cgen_get_vma_operand; |
960 | 4 | cd->set_vma_operand = bpf_cgen_set_vma_operand; |
961 | 4 | } |