/src/binutils-gdb/opcodes/bpf-opc.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
2 | | /* Instruction opcode table for bpf. |
3 | | |
4 | | THIS FILE IS MACHINE GENERATED WITH CGEN. |
5 | | |
6 | | Copyright (C) 1996-2023 Free Software Foundation, Inc. |
7 | | |
8 | | This file is part of the GNU Binutils and/or GDB, the GNU debugger. |
9 | | |
10 | | This file is free software; you can redistribute it and/or modify |
11 | | it under the terms of the GNU General Public License as published by |
12 | | the Free Software Foundation; either version 3, or (at your option) |
13 | | any later version. |
14 | | |
15 | | It is distributed in the hope that it will be useful, but WITHOUT |
16 | | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
17 | | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
18 | | License for more details. |
19 | | |
20 | | You should have received a copy of the GNU General Public License along |
21 | | with this program; if not, write to the Free Software Foundation, Inc., |
22 | | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
23 | | |
24 | | */ |
25 | | |
26 | | #include "sysdep.h" |
27 | | #include "ansidecl.h" |
28 | | #include "bfd.h" |
29 | | #include "symcat.h" |
30 | | #include "bpf-desc.h" |
31 | | #include "bpf-opc.h" |
32 | | #include "libiberty.h" |
33 | | |
34 | | /* -- opc.c */ |
35 | | |
36 | | /* -- asm.c */ |
37 | | /* The hash functions are recorded here to help keep assembler code out of |
38 | | the disassembler and vice versa. */ |
39 | | |
40 | | static int asm_hash_insn_p (const CGEN_INSN *); |
41 | | static unsigned int asm_hash_insn (const char *); |
42 | | static int dis_hash_insn_p (const CGEN_INSN *); |
43 | | static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); |
44 | | |
45 | | /* Instruction formats. */ |
46 | | |
47 | | #define F(f) & bpf_cgen_ifld_table[BPF_##f] |
48 | | static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = { |
49 | | 0, 0, 0x0, { { 0 } } |
50 | | }; |
51 | | |
52 | | static const CGEN_IFMT ifmt_addile ATTRIBUTE_UNUSED = { |
53 | | 64, 64, 0xfffff0ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
54 | | }; |
55 | | |
56 | | static const CGEN_IFMT ifmt_addrle ATTRIBUTE_UNUSED = { |
57 | | 64, 64, 0xffffffffffff00ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
58 | | }; |
59 | | |
60 | | static const CGEN_IFMT ifmt_negle ATTRIBUTE_UNUSED = { |
61 | | 64, 64, 0xfffffffffffff0ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
62 | | }; |
63 | | |
64 | | static const CGEN_IFMT ifmt_addibe ATTRIBUTE_UNUSED = { |
65 | | 64, 64, 0xffff0fff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
66 | | }; |
67 | | |
68 | | static const CGEN_IFMT ifmt_addrbe ATTRIBUTE_UNUSED = { |
69 | | 64, 64, 0xffffffffffff00ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
70 | | }; |
71 | | |
72 | | static const CGEN_IFMT ifmt_negbe ATTRIBUTE_UNUSED = { |
73 | | 64, 64, 0xffffffffffff0fff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
74 | | }; |
75 | | |
76 | | static const CGEN_IFMT ifmt_endlele ATTRIBUTE_UNUSED = { |
77 | | 64, 64, 0xfffff0ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
78 | | }; |
79 | | |
80 | | static const CGEN_IFMT ifmt_endlebe ATTRIBUTE_UNUSED = { |
81 | | 64, 64, 0xffff0fff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
82 | | }; |
83 | | |
84 | | static const CGEN_IFMT ifmt_lddwle ATTRIBUTE_UNUSED = { |
85 | | 64, 128, 0xfffff0ff, { { F (F_IMM64) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } } |
86 | | }; |
87 | | |
88 | | static const CGEN_IFMT ifmt_lddwbe ATTRIBUTE_UNUSED = { |
89 | | 64, 128, 0xffff0fff, { { F (F_IMM64) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } } |
90 | | }; |
91 | | |
92 | | static const CGEN_IFMT ifmt_ldabsw ATTRIBUTE_UNUSED = { |
93 | | 64, 64, 0xffffffff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_OP_CLASS) }, { 0 } } |
94 | | }; |
95 | | |
96 | | static const CGEN_IFMT ifmt_ldindwle ATTRIBUTE_UNUSED = { |
97 | | 64, 64, 0xffff0fff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } } |
98 | | }; |
99 | | |
100 | | static const CGEN_IFMT ifmt_ldindwbe ATTRIBUTE_UNUSED = { |
101 | | 64, 64, 0xfffff0ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } } |
102 | | }; |
103 | | |
104 | | static const CGEN_IFMT ifmt_ldxwle ATTRIBUTE_UNUSED = { |
105 | | 64, 64, 0xffffffff000000ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } } |
106 | | }; |
107 | | |
108 | | static const CGEN_IFMT ifmt_ldxwbe ATTRIBUTE_UNUSED = { |
109 | | 64, 64, 0xffffffff000000ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } } |
110 | | }; |
111 | | |
112 | | static const CGEN_IFMT ifmt_stble ATTRIBUTE_UNUSED = { |
113 | | 64, 64, 0xf0ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } } |
114 | | }; |
115 | | |
116 | | static const CGEN_IFMT ifmt_stbbe ATTRIBUTE_UNUSED = { |
117 | | 64, 64, 0xfff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } } |
118 | | }; |
119 | | |
120 | | static const CGEN_IFMT ifmt_jeqile ATTRIBUTE_UNUSED = { |
121 | | 64, 64, 0xf0ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
122 | | }; |
123 | | |
124 | | static const CGEN_IFMT ifmt_jeqrle ATTRIBUTE_UNUSED = { |
125 | | 64, 64, 0xffffffff000000ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
126 | | }; |
127 | | |
128 | | static const CGEN_IFMT ifmt_jeqibe ATTRIBUTE_UNUSED = { |
129 | | 64, 64, 0xfff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
130 | | }; |
131 | | |
132 | | static const CGEN_IFMT ifmt_jeqrbe ATTRIBUTE_UNUSED = { |
133 | | 64, 64, 0xffffffff000000ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
134 | | }; |
135 | | |
136 | | static const CGEN_IFMT ifmt_callle ATTRIBUTE_UNUSED = { |
137 | | 64, 64, 0xffff0fff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
138 | | }; |
139 | | |
140 | | static const CGEN_IFMT ifmt_callbe ATTRIBUTE_UNUSED = { |
141 | | 64, 64, 0xfffff0ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
142 | | }; |
143 | | |
144 | | static const CGEN_IFMT ifmt_ja ATTRIBUTE_UNUSED = { |
145 | | 64, 64, 0xffffffff0000ffff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
146 | | }; |
147 | | |
148 | | static const CGEN_IFMT ifmt_exit ATTRIBUTE_UNUSED = { |
149 | | 64, 64, 0xffffffffffffffff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } |
150 | | }; |
151 | | |
152 | | #undef F |
153 | | |
154 | | #define A(a) (1 << CGEN_INSN_##a) |
155 | | #define OPERAND(op) BPF_OPERAND_##op |
156 | | #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ |
157 | | #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) |
158 | | |
159 | | /* The instruction table. */ |
160 | | |
161 | | static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] = |
162 | | { |
163 | | /* Special null first entry. |
164 | | A `num' value of zero is thus invalid. |
165 | | Also, the special `invalid' insn resides here. */ |
166 | | { { 0, 0, 0, 0 }, {{0}}, 0, {0}}, |
167 | | /* add $dstle,$imm32 */ |
168 | | { |
169 | | { 0, 0, 0, 0 }, |
170 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
171 | | & ifmt_addile, { 0x7 } |
172 | | }, |
173 | | /* add $dstle,$srcle */ |
174 | | { |
175 | | { 0, 0, 0, 0 }, |
176 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
177 | | & ifmt_addrle, { 0xf } |
178 | | }, |
179 | | /* add32 $dstle,$imm32 */ |
180 | | { |
181 | | { 0, 0, 0, 0 }, |
182 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
183 | | & ifmt_addile, { 0x4 } |
184 | | }, |
185 | | /* add32 $dstle,$srcle */ |
186 | | { |
187 | | { 0, 0, 0, 0 }, |
188 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
189 | | & ifmt_addrle, { 0xc } |
190 | | }, |
191 | | /* sub $dstle,$imm32 */ |
192 | | { |
193 | | { 0, 0, 0, 0 }, |
194 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
195 | | & ifmt_addile, { 0x17 } |
196 | | }, |
197 | | /* sub $dstle,$srcle */ |
198 | | { |
199 | | { 0, 0, 0, 0 }, |
200 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
201 | | & ifmt_addrle, { 0x1f } |
202 | | }, |
203 | | /* sub32 $dstle,$imm32 */ |
204 | | { |
205 | | { 0, 0, 0, 0 }, |
206 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
207 | | & ifmt_addile, { 0x14 } |
208 | | }, |
209 | | /* sub32 $dstle,$srcle */ |
210 | | { |
211 | | { 0, 0, 0, 0 }, |
212 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
213 | | & ifmt_addrle, { 0x1c } |
214 | | }, |
215 | | /* mul $dstle,$imm32 */ |
216 | | { |
217 | | { 0, 0, 0, 0 }, |
218 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
219 | | & ifmt_addile, { 0x27 } |
220 | | }, |
221 | | /* mul $dstle,$srcle */ |
222 | | { |
223 | | { 0, 0, 0, 0 }, |
224 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
225 | | & ifmt_addrle, { 0x2f } |
226 | | }, |
227 | | /* mul32 $dstle,$imm32 */ |
228 | | { |
229 | | { 0, 0, 0, 0 }, |
230 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
231 | | & ifmt_addile, { 0x24 } |
232 | | }, |
233 | | /* mul32 $dstle,$srcle */ |
234 | | { |
235 | | { 0, 0, 0, 0 }, |
236 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
237 | | & ifmt_addrle, { 0x2c } |
238 | | }, |
239 | | /* div $dstle,$imm32 */ |
240 | | { |
241 | | { 0, 0, 0, 0 }, |
242 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
243 | | & ifmt_addile, { 0x37 } |
244 | | }, |
245 | | /* div $dstle,$srcle */ |
246 | | { |
247 | | { 0, 0, 0, 0 }, |
248 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
249 | | & ifmt_addrle, { 0x3f } |
250 | | }, |
251 | | /* div32 $dstle,$imm32 */ |
252 | | { |
253 | | { 0, 0, 0, 0 }, |
254 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
255 | | & ifmt_addile, { 0x34 } |
256 | | }, |
257 | | /* div32 $dstle,$srcle */ |
258 | | { |
259 | | { 0, 0, 0, 0 }, |
260 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
261 | | & ifmt_addrle, { 0x3c } |
262 | | }, |
263 | | /* or $dstle,$imm32 */ |
264 | | { |
265 | | { 0, 0, 0, 0 }, |
266 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
267 | | & ifmt_addile, { 0x47 } |
268 | | }, |
269 | | /* or $dstle,$srcle */ |
270 | | { |
271 | | { 0, 0, 0, 0 }, |
272 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
273 | | & ifmt_addrle, { 0x4f } |
274 | | }, |
275 | | /* or32 $dstle,$imm32 */ |
276 | | { |
277 | | { 0, 0, 0, 0 }, |
278 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
279 | | & ifmt_addile, { 0x44 } |
280 | | }, |
281 | | /* or32 $dstle,$srcle */ |
282 | | { |
283 | | { 0, 0, 0, 0 }, |
284 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
285 | | & ifmt_addrle, { 0x4c } |
286 | | }, |
287 | | /* and $dstle,$imm32 */ |
288 | | { |
289 | | { 0, 0, 0, 0 }, |
290 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
291 | | & ifmt_addile, { 0x57 } |
292 | | }, |
293 | | /* and $dstle,$srcle */ |
294 | | { |
295 | | { 0, 0, 0, 0 }, |
296 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
297 | | & ifmt_addrle, { 0x5f } |
298 | | }, |
299 | | /* and32 $dstle,$imm32 */ |
300 | | { |
301 | | { 0, 0, 0, 0 }, |
302 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
303 | | & ifmt_addile, { 0x54 } |
304 | | }, |
305 | | /* and32 $dstle,$srcle */ |
306 | | { |
307 | | { 0, 0, 0, 0 }, |
308 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
309 | | & ifmt_addrle, { 0x5c } |
310 | | }, |
311 | | /* lsh $dstle,$imm32 */ |
312 | | { |
313 | | { 0, 0, 0, 0 }, |
314 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
315 | | & ifmt_addile, { 0x67 } |
316 | | }, |
317 | | /* lsh $dstle,$srcle */ |
318 | | { |
319 | | { 0, 0, 0, 0 }, |
320 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
321 | | & ifmt_addrle, { 0x6f } |
322 | | }, |
323 | | /* lsh32 $dstle,$imm32 */ |
324 | | { |
325 | | { 0, 0, 0, 0 }, |
326 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
327 | | & ifmt_addile, { 0x64 } |
328 | | }, |
329 | | /* lsh32 $dstle,$srcle */ |
330 | | { |
331 | | { 0, 0, 0, 0 }, |
332 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
333 | | & ifmt_addrle, { 0x6c } |
334 | | }, |
335 | | /* rsh $dstle,$imm32 */ |
336 | | { |
337 | | { 0, 0, 0, 0 }, |
338 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
339 | | & ifmt_addile, { 0x77 } |
340 | | }, |
341 | | /* rsh $dstle,$srcle */ |
342 | | { |
343 | | { 0, 0, 0, 0 }, |
344 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
345 | | & ifmt_addrle, { 0x7f } |
346 | | }, |
347 | | /* rsh32 $dstle,$imm32 */ |
348 | | { |
349 | | { 0, 0, 0, 0 }, |
350 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
351 | | & ifmt_addile, { 0x74 } |
352 | | }, |
353 | | /* rsh32 $dstle,$srcle */ |
354 | | { |
355 | | { 0, 0, 0, 0 }, |
356 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
357 | | & ifmt_addrle, { 0x7c } |
358 | | }, |
359 | | /* mod $dstle,$imm32 */ |
360 | | { |
361 | | { 0, 0, 0, 0 }, |
362 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
363 | | & ifmt_addile, { 0x97 } |
364 | | }, |
365 | | /* mod $dstle,$srcle */ |
366 | | { |
367 | | { 0, 0, 0, 0 }, |
368 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
369 | | & ifmt_addrle, { 0x9f } |
370 | | }, |
371 | | /* mod32 $dstle,$imm32 */ |
372 | | { |
373 | | { 0, 0, 0, 0 }, |
374 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
375 | | & ifmt_addile, { 0x94 } |
376 | | }, |
377 | | /* mod32 $dstle,$srcle */ |
378 | | { |
379 | | { 0, 0, 0, 0 }, |
380 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
381 | | & ifmt_addrle, { 0x9c } |
382 | | }, |
383 | | /* xor $dstle,$imm32 */ |
384 | | { |
385 | | { 0, 0, 0, 0 }, |
386 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
387 | | & ifmt_addile, { 0xa7 } |
388 | | }, |
389 | | /* xor $dstle,$srcle */ |
390 | | { |
391 | | { 0, 0, 0, 0 }, |
392 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
393 | | & ifmt_addrle, { 0xaf } |
394 | | }, |
395 | | /* xor32 $dstle,$imm32 */ |
396 | | { |
397 | | { 0, 0, 0, 0 }, |
398 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
399 | | & ifmt_addile, { 0xa4 } |
400 | | }, |
401 | | /* xor32 $dstle,$srcle */ |
402 | | { |
403 | | { 0, 0, 0, 0 }, |
404 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
405 | | & ifmt_addrle, { 0xac } |
406 | | }, |
407 | | /* arsh $dstle,$imm32 */ |
408 | | { |
409 | | { 0, 0, 0, 0 }, |
410 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
411 | | & ifmt_addile, { 0xc7 } |
412 | | }, |
413 | | /* arsh $dstle,$srcle */ |
414 | | { |
415 | | { 0, 0, 0, 0 }, |
416 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
417 | | & ifmt_addrle, { 0xcf } |
418 | | }, |
419 | | /* arsh32 $dstle,$imm32 */ |
420 | | { |
421 | | { 0, 0, 0, 0 }, |
422 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
423 | | & ifmt_addile, { 0xc4 } |
424 | | }, |
425 | | /* arsh32 $dstle,$srcle */ |
426 | | { |
427 | | { 0, 0, 0, 0 }, |
428 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
429 | | & ifmt_addrle, { 0xcc } |
430 | | }, |
431 | | /* sdiv $dstle,$imm32 */ |
432 | | { |
433 | | { 0, 0, 0, 0 }, |
434 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
435 | | & ifmt_addile, { 0xe7 } |
436 | | }, |
437 | | /* sdiv $dstle,$srcle */ |
438 | | { |
439 | | { 0, 0, 0, 0 }, |
440 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
441 | | & ifmt_addrle, { 0xef } |
442 | | }, |
443 | | /* sdiv32 $dstle,$imm32 */ |
444 | | { |
445 | | { 0, 0, 0, 0 }, |
446 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
447 | | & ifmt_addile, { 0xe4 } |
448 | | }, |
449 | | /* sdiv32 $dstle,$srcle */ |
450 | | { |
451 | | { 0, 0, 0, 0 }, |
452 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
453 | | & ifmt_addrle, { 0xec } |
454 | | }, |
455 | | /* smod $dstle,$imm32 */ |
456 | | { |
457 | | { 0, 0, 0, 0 }, |
458 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
459 | | & ifmt_addile, { 0xf7 } |
460 | | }, |
461 | | /* smod $dstle,$srcle */ |
462 | | { |
463 | | { 0, 0, 0, 0 }, |
464 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
465 | | & ifmt_addrle, { 0xff } |
466 | | }, |
467 | | /* smod32 $dstle,$imm32 */ |
468 | | { |
469 | | { 0, 0, 0, 0 }, |
470 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
471 | | & ifmt_addile, { 0xf4 } |
472 | | }, |
473 | | /* smod32 $dstle,$srcle */ |
474 | | { |
475 | | { 0, 0, 0, 0 }, |
476 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
477 | | & ifmt_addrle, { 0xfc } |
478 | | }, |
479 | | /* neg $dstle */ |
480 | | { |
481 | | { 0, 0, 0, 0 }, |
482 | | { { MNEM, ' ', OP (DSTLE), 0 } }, |
483 | | & ifmt_negle, { 0x87 } |
484 | | }, |
485 | | /* neg32 $dstle */ |
486 | | { |
487 | | { 0, 0, 0, 0 }, |
488 | | { { MNEM, ' ', OP (DSTLE), 0 } }, |
489 | | & ifmt_negle, { 0x84 } |
490 | | }, |
491 | | /* mov $dstle,$imm32 */ |
492 | | { |
493 | | { 0, 0, 0, 0 }, |
494 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
495 | | & ifmt_addile, { 0xb7 } |
496 | | }, |
497 | | /* mov $dstle,$srcle */ |
498 | | { |
499 | | { 0, 0, 0, 0 }, |
500 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
501 | | & ifmt_addrle, { 0xbf } |
502 | | }, |
503 | | /* mov32 $dstle,$imm32 */ |
504 | | { |
505 | | { 0, 0, 0, 0 }, |
506 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } }, |
507 | | & ifmt_addile, { 0xb4 } |
508 | | }, |
509 | | /* mov32 $dstle,$srcle */ |
510 | | { |
511 | | { 0, 0, 0, 0 }, |
512 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } }, |
513 | | & ifmt_addrle, { 0xbc } |
514 | | }, |
515 | | /* add $dstbe,$imm32 */ |
516 | | { |
517 | | { 0, 0, 0, 0 }, |
518 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
519 | | & ifmt_addibe, { 0x7 } |
520 | | }, |
521 | | /* add $dstbe,$srcbe */ |
522 | | { |
523 | | { 0, 0, 0, 0 }, |
524 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
525 | | & ifmt_addrbe, { 0xf } |
526 | | }, |
527 | | /* add32 $dstbe,$imm32 */ |
528 | | { |
529 | | { 0, 0, 0, 0 }, |
530 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
531 | | & ifmt_addibe, { 0x4 } |
532 | | }, |
533 | | /* add32 $dstbe,$srcbe */ |
534 | | { |
535 | | { 0, 0, 0, 0 }, |
536 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
537 | | & ifmt_addrbe, { 0xc } |
538 | | }, |
539 | | /* sub $dstbe,$imm32 */ |
540 | | { |
541 | | { 0, 0, 0, 0 }, |
542 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
543 | | & ifmt_addibe, { 0x17 } |
544 | | }, |
545 | | /* sub $dstbe,$srcbe */ |
546 | | { |
547 | | { 0, 0, 0, 0 }, |
548 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
549 | | & ifmt_addrbe, { 0x1f } |
550 | | }, |
551 | | /* sub32 $dstbe,$imm32 */ |
552 | | { |
553 | | { 0, 0, 0, 0 }, |
554 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
555 | | & ifmt_addibe, { 0x14 } |
556 | | }, |
557 | | /* sub32 $dstbe,$srcbe */ |
558 | | { |
559 | | { 0, 0, 0, 0 }, |
560 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
561 | | & ifmt_addrbe, { 0x1c } |
562 | | }, |
563 | | /* mul $dstbe,$imm32 */ |
564 | | { |
565 | | { 0, 0, 0, 0 }, |
566 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
567 | | & ifmt_addibe, { 0x27 } |
568 | | }, |
569 | | /* mul $dstbe,$srcbe */ |
570 | | { |
571 | | { 0, 0, 0, 0 }, |
572 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
573 | | & ifmt_addrbe, { 0x2f } |
574 | | }, |
575 | | /* mul32 $dstbe,$imm32 */ |
576 | | { |
577 | | { 0, 0, 0, 0 }, |
578 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
579 | | & ifmt_addibe, { 0x24 } |
580 | | }, |
581 | | /* mul32 $dstbe,$srcbe */ |
582 | | { |
583 | | { 0, 0, 0, 0 }, |
584 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
585 | | & ifmt_addrbe, { 0x2c } |
586 | | }, |
587 | | /* div $dstbe,$imm32 */ |
588 | | { |
589 | | { 0, 0, 0, 0 }, |
590 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
591 | | & ifmt_addibe, { 0x37 } |
592 | | }, |
593 | | /* div $dstbe,$srcbe */ |
594 | | { |
595 | | { 0, 0, 0, 0 }, |
596 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
597 | | & ifmt_addrbe, { 0x3f } |
598 | | }, |
599 | | /* div32 $dstbe,$imm32 */ |
600 | | { |
601 | | { 0, 0, 0, 0 }, |
602 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
603 | | & ifmt_addibe, { 0x34 } |
604 | | }, |
605 | | /* div32 $dstbe,$srcbe */ |
606 | | { |
607 | | { 0, 0, 0, 0 }, |
608 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
609 | | & ifmt_addrbe, { 0x3c } |
610 | | }, |
611 | | /* or $dstbe,$imm32 */ |
612 | | { |
613 | | { 0, 0, 0, 0 }, |
614 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
615 | | & ifmt_addibe, { 0x47 } |
616 | | }, |
617 | | /* or $dstbe,$srcbe */ |
618 | | { |
619 | | { 0, 0, 0, 0 }, |
620 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
621 | | & ifmt_addrbe, { 0x4f } |
622 | | }, |
623 | | /* or32 $dstbe,$imm32 */ |
624 | | { |
625 | | { 0, 0, 0, 0 }, |
626 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
627 | | & ifmt_addibe, { 0x44 } |
628 | | }, |
629 | | /* or32 $dstbe,$srcbe */ |
630 | | { |
631 | | { 0, 0, 0, 0 }, |
632 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
633 | | & ifmt_addrbe, { 0x4c } |
634 | | }, |
635 | | /* and $dstbe,$imm32 */ |
636 | | { |
637 | | { 0, 0, 0, 0 }, |
638 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
639 | | & ifmt_addibe, { 0x57 } |
640 | | }, |
641 | | /* and $dstbe,$srcbe */ |
642 | | { |
643 | | { 0, 0, 0, 0 }, |
644 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
645 | | & ifmt_addrbe, { 0x5f } |
646 | | }, |
647 | | /* and32 $dstbe,$imm32 */ |
648 | | { |
649 | | { 0, 0, 0, 0 }, |
650 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
651 | | & ifmt_addibe, { 0x54 } |
652 | | }, |
653 | | /* and32 $dstbe,$srcbe */ |
654 | | { |
655 | | { 0, 0, 0, 0 }, |
656 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
657 | | & ifmt_addrbe, { 0x5c } |
658 | | }, |
659 | | /* lsh $dstbe,$imm32 */ |
660 | | { |
661 | | { 0, 0, 0, 0 }, |
662 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
663 | | & ifmt_addibe, { 0x67 } |
664 | | }, |
665 | | /* lsh $dstbe,$srcbe */ |
666 | | { |
667 | | { 0, 0, 0, 0 }, |
668 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
669 | | & ifmt_addrbe, { 0x6f } |
670 | | }, |
671 | | /* lsh32 $dstbe,$imm32 */ |
672 | | { |
673 | | { 0, 0, 0, 0 }, |
674 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
675 | | & ifmt_addibe, { 0x64 } |
676 | | }, |
677 | | /* lsh32 $dstbe,$srcbe */ |
678 | | { |
679 | | { 0, 0, 0, 0 }, |
680 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
681 | | & ifmt_addrbe, { 0x6c } |
682 | | }, |
683 | | /* rsh $dstbe,$imm32 */ |
684 | | { |
685 | | { 0, 0, 0, 0 }, |
686 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
687 | | & ifmt_addibe, { 0x77 } |
688 | | }, |
689 | | /* rsh $dstbe,$srcbe */ |
690 | | { |
691 | | { 0, 0, 0, 0 }, |
692 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
693 | | & ifmt_addrbe, { 0x7f } |
694 | | }, |
695 | | /* rsh32 $dstbe,$imm32 */ |
696 | | { |
697 | | { 0, 0, 0, 0 }, |
698 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
699 | | & ifmt_addibe, { 0x74 } |
700 | | }, |
701 | | /* rsh32 $dstbe,$srcbe */ |
702 | | { |
703 | | { 0, 0, 0, 0 }, |
704 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
705 | | & ifmt_addrbe, { 0x7c } |
706 | | }, |
707 | | /* mod $dstbe,$imm32 */ |
708 | | { |
709 | | { 0, 0, 0, 0 }, |
710 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
711 | | & ifmt_addibe, { 0x97 } |
712 | | }, |
713 | | /* mod $dstbe,$srcbe */ |
714 | | { |
715 | | { 0, 0, 0, 0 }, |
716 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
717 | | & ifmt_addrbe, { 0x9f } |
718 | | }, |
719 | | /* mod32 $dstbe,$imm32 */ |
720 | | { |
721 | | { 0, 0, 0, 0 }, |
722 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
723 | | & ifmt_addibe, { 0x94 } |
724 | | }, |
725 | | /* mod32 $dstbe,$srcbe */ |
726 | | { |
727 | | { 0, 0, 0, 0 }, |
728 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
729 | | & ifmt_addrbe, { 0x9c } |
730 | | }, |
731 | | /* xor $dstbe,$imm32 */ |
732 | | { |
733 | | { 0, 0, 0, 0 }, |
734 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
735 | | & ifmt_addibe, { 0xa7 } |
736 | | }, |
737 | | /* xor $dstbe,$srcbe */ |
738 | | { |
739 | | { 0, 0, 0, 0 }, |
740 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
741 | | & ifmt_addrbe, { 0xaf } |
742 | | }, |
743 | | /* xor32 $dstbe,$imm32 */ |
744 | | { |
745 | | { 0, 0, 0, 0 }, |
746 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
747 | | & ifmt_addibe, { 0xa4 } |
748 | | }, |
749 | | /* xor32 $dstbe,$srcbe */ |
750 | | { |
751 | | { 0, 0, 0, 0 }, |
752 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
753 | | & ifmt_addrbe, { 0xac } |
754 | | }, |
755 | | /* arsh $dstbe,$imm32 */ |
756 | | { |
757 | | { 0, 0, 0, 0 }, |
758 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
759 | | & ifmt_addibe, { 0xc7 } |
760 | | }, |
761 | | /* arsh $dstbe,$srcbe */ |
762 | | { |
763 | | { 0, 0, 0, 0 }, |
764 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
765 | | & ifmt_addrbe, { 0xcf } |
766 | | }, |
767 | | /* arsh32 $dstbe,$imm32 */ |
768 | | { |
769 | | { 0, 0, 0, 0 }, |
770 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
771 | | & ifmt_addibe, { 0xc4 } |
772 | | }, |
773 | | /* arsh32 $dstbe,$srcbe */ |
774 | | { |
775 | | { 0, 0, 0, 0 }, |
776 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
777 | | & ifmt_addrbe, { 0xcc } |
778 | | }, |
779 | | /* sdiv $dstbe,$imm32 */ |
780 | | { |
781 | | { 0, 0, 0, 0 }, |
782 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
783 | | & ifmt_addibe, { 0xe7 } |
784 | | }, |
785 | | /* sdiv $dstbe,$srcbe */ |
786 | | { |
787 | | { 0, 0, 0, 0 }, |
788 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
789 | | & ifmt_addrbe, { 0xef } |
790 | | }, |
791 | | /* sdiv32 $dstbe,$imm32 */ |
792 | | { |
793 | | { 0, 0, 0, 0 }, |
794 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
795 | | & ifmt_addibe, { 0xe4 } |
796 | | }, |
797 | | /* sdiv32 $dstbe,$srcbe */ |
798 | | { |
799 | | { 0, 0, 0, 0 }, |
800 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
801 | | & ifmt_addrbe, { 0xec } |
802 | | }, |
803 | | /* smod $dstbe,$imm32 */ |
804 | | { |
805 | | { 0, 0, 0, 0 }, |
806 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
807 | | & ifmt_addibe, { 0xf7 } |
808 | | }, |
809 | | /* smod $dstbe,$srcbe */ |
810 | | { |
811 | | { 0, 0, 0, 0 }, |
812 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
813 | | & ifmt_addrbe, { 0xff } |
814 | | }, |
815 | | /* smod32 $dstbe,$imm32 */ |
816 | | { |
817 | | { 0, 0, 0, 0 }, |
818 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
819 | | & ifmt_addibe, { 0xf4 } |
820 | | }, |
821 | | /* smod32 $dstbe,$srcbe */ |
822 | | { |
823 | | { 0, 0, 0, 0 }, |
824 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
825 | | & ifmt_addrbe, { 0xfc } |
826 | | }, |
827 | | /* neg $dstbe */ |
828 | | { |
829 | | { 0, 0, 0, 0 }, |
830 | | { { MNEM, ' ', OP (DSTBE), 0 } }, |
831 | | & ifmt_negbe, { 0x87 } |
832 | | }, |
833 | | /* neg32 $dstbe */ |
834 | | { |
835 | | { 0, 0, 0, 0 }, |
836 | | { { MNEM, ' ', OP (DSTBE), 0 } }, |
837 | | & ifmt_negbe, { 0x84 } |
838 | | }, |
839 | | /* mov $dstbe,$imm32 */ |
840 | | { |
841 | | { 0, 0, 0, 0 }, |
842 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
843 | | & ifmt_addibe, { 0xb7 } |
844 | | }, |
845 | | /* mov $dstbe,$srcbe */ |
846 | | { |
847 | | { 0, 0, 0, 0 }, |
848 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
849 | | & ifmt_addrbe, { 0xbf } |
850 | | }, |
851 | | /* mov32 $dstbe,$imm32 */ |
852 | | { |
853 | | { 0, 0, 0, 0 }, |
854 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } }, |
855 | | & ifmt_addibe, { 0xb4 } |
856 | | }, |
857 | | /* mov32 $dstbe,$srcbe */ |
858 | | { |
859 | | { 0, 0, 0, 0 }, |
860 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } }, |
861 | | & ifmt_addrbe, { 0xbc } |
862 | | }, |
863 | | /* endle $dstle,$endsize */ |
864 | | { |
865 | | { 0, 0, 0, 0 }, |
866 | | { { MNEM, ' ', OP (DSTLE), ',', OP (ENDSIZE), 0 } }, |
867 | | & ifmt_endlele, { 0xd4 } |
868 | | }, |
869 | | /* endbe $dstle,$endsize */ |
870 | | { |
871 | | { 0, 0, 0, 0 }, |
872 | | { { MNEM, ' ', OP (DSTLE), ',', OP (ENDSIZE), 0 } }, |
873 | | & ifmt_endlele, { 0xdc } |
874 | | }, |
875 | | /* endle $dstbe,$endsize */ |
876 | | { |
877 | | { 0, 0, 0, 0 }, |
878 | | { { MNEM, ' ', OP (DSTBE), ',', OP (ENDSIZE), 0 } }, |
879 | | & ifmt_endlebe, { 0xd4 } |
880 | | }, |
881 | | /* endbe $dstbe,$endsize */ |
882 | | { |
883 | | { 0, 0, 0, 0 }, |
884 | | { { MNEM, ' ', OP (DSTBE), ',', OP (ENDSIZE), 0 } }, |
885 | | & ifmt_endlebe, { 0xdc } |
886 | | }, |
887 | | /* lddw $dstle,$imm64 */ |
888 | | { |
889 | | { 0, 0, 0, 0 }, |
890 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM64), 0 } }, |
891 | | & ifmt_lddwle, { 0x18 } |
892 | | }, |
893 | | /* lddw $dstbe,$imm64 */ |
894 | | { |
895 | | { 0, 0, 0, 0 }, |
896 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM64), 0 } }, |
897 | | & ifmt_lddwbe, { 0x18 } |
898 | | }, |
899 | | /* ldabsw $imm32 */ |
900 | | { |
901 | | { 0, 0, 0, 0 }, |
902 | | { { MNEM, ' ', OP (IMM32), 0 } }, |
903 | | & ifmt_ldabsw, { 0x20 } |
904 | | }, |
905 | | /* ldabsh $imm32 */ |
906 | | { |
907 | | { 0, 0, 0, 0 }, |
908 | | { { MNEM, ' ', OP (IMM32), 0 } }, |
909 | | & ifmt_ldabsw, { 0x28 } |
910 | | }, |
911 | | /* ldabsb $imm32 */ |
912 | | { |
913 | | { 0, 0, 0, 0 }, |
914 | | { { MNEM, ' ', OP (IMM32), 0 } }, |
915 | | & ifmt_ldabsw, { 0x30 } |
916 | | }, |
917 | | /* ldabsdw $imm32 */ |
918 | | { |
919 | | { 0, 0, 0, 0 }, |
920 | | { { MNEM, ' ', OP (IMM32), 0 } }, |
921 | | & ifmt_ldabsw, { 0x38 } |
922 | | }, |
923 | | /* ldindw $srcle,$imm32 */ |
924 | | { |
925 | | { 0, 0, 0, 0 }, |
926 | | { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, |
927 | | & ifmt_ldindwle, { 0x40 } |
928 | | }, |
929 | | /* ldindh $srcle,$imm32 */ |
930 | | { |
931 | | { 0, 0, 0, 0 }, |
932 | | { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, |
933 | | & ifmt_ldindwle, { 0x48 } |
934 | | }, |
935 | | /* ldindb $srcle,$imm32 */ |
936 | | { |
937 | | { 0, 0, 0, 0 }, |
938 | | { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, |
939 | | & ifmt_ldindwle, { 0x50 } |
940 | | }, |
941 | | /* ldinddw $srcle,$imm32 */ |
942 | | { |
943 | | { 0, 0, 0, 0 }, |
944 | | { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } }, |
945 | | & ifmt_ldindwle, { 0x58 } |
946 | | }, |
947 | | /* ldindw $srcbe,$imm32 */ |
948 | | { |
949 | | { 0, 0, 0, 0 }, |
950 | | { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, |
951 | | & ifmt_ldindwbe, { 0x40 } |
952 | | }, |
953 | | /* ldindh $srcbe,$imm32 */ |
954 | | { |
955 | | { 0, 0, 0, 0 }, |
956 | | { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, |
957 | | & ifmt_ldindwbe, { 0x48 } |
958 | | }, |
959 | | /* ldindb $srcbe,$imm32 */ |
960 | | { |
961 | | { 0, 0, 0, 0 }, |
962 | | { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, |
963 | | & ifmt_ldindwbe, { 0x50 } |
964 | | }, |
965 | | /* ldinddw $srcbe,$imm32 */ |
966 | | { |
967 | | { 0, 0, 0, 0 }, |
968 | | { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } }, |
969 | | & ifmt_ldindwbe, { 0x58 } |
970 | | }, |
971 | | /* ldxw $dstle,[$srcle+$offset16] */ |
972 | | { |
973 | | { 0, 0, 0, 0 }, |
974 | | { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } }, |
975 | | & ifmt_ldxwle, { 0x61 } |
976 | | }, |
977 | | /* ldxh $dstle,[$srcle+$offset16] */ |
978 | | { |
979 | | { 0, 0, 0, 0 }, |
980 | | { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } }, |
981 | | & ifmt_ldxwle, { 0x69 } |
982 | | }, |
983 | | /* ldxb $dstle,[$srcle+$offset16] */ |
984 | | { |
985 | | { 0, 0, 0, 0 }, |
986 | | { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } }, |
987 | | & ifmt_ldxwle, { 0x71 } |
988 | | }, |
989 | | /* ldxdw $dstle,[$srcle+$offset16] */ |
990 | | { |
991 | | { 0, 0, 0, 0 }, |
992 | | { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } }, |
993 | | & ifmt_ldxwle, { 0x79 } |
994 | | }, |
995 | | /* stxw [$dstle+$offset16],$srcle */ |
996 | | { |
997 | | { 0, 0, 0, 0 }, |
998 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } }, |
999 | | & ifmt_ldxwle, { 0x63 } |
1000 | | }, |
1001 | | /* stxh [$dstle+$offset16],$srcle */ |
1002 | | { |
1003 | | { 0, 0, 0, 0 }, |
1004 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } }, |
1005 | | & ifmt_ldxwle, { 0x6b } |
1006 | | }, |
1007 | | /* stxb [$dstle+$offset16],$srcle */ |
1008 | | { |
1009 | | { 0, 0, 0, 0 }, |
1010 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } }, |
1011 | | & ifmt_ldxwle, { 0x73 } |
1012 | | }, |
1013 | | /* stxdw [$dstle+$offset16],$srcle */ |
1014 | | { |
1015 | | { 0, 0, 0, 0 }, |
1016 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } }, |
1017 | | & ifmt_ldxwle, { 0x7b } |
1018 | | }, |
1019 | | /* ldxw $dstbe,[$srcbe+$offset16] */ |
1020 | | { |
1021 | | { 0, 0, 0, 0 }, |
1022 | | { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } }, |
1023 | | & ifmt_ldxwbe, { 0x61 } |
1024 | | }, |
1025 | | /* ldxh $dstbe,[$srcbe+$offset16] */ |
1026 | | { |
1027 | | { 0, 0, 0, 0 }, |
1028 | | { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } }, |
1029 | | & ifmt_ldxwbe, { 0x69 } |
1030 | | }, |
1031 | | /* ldxb $dstbe,[$srcbe+$offset16] */ |
1032 | | { |
1033 | | { 0, 0, 0, 0 }, |
1034 | | { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } }, |
1035 | | & ifmt_ldxwbe, { 0x71 } |
1036 | | }, |
1037 | | /* ldxdw $dstbe,[$srcbe+$offset16] */ |
1038 | | { |
1039 | | { 0, 0, 0, 0 }, |
1040 | | { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } }, |
1041 | | & ifmt_ldxwbe, { 0x79 } |
1042 | | }, |
1043 | | /* stxw [$dstbe+$offset16],$srcbe */ |
1044 | | { |
1045 | | { 0, 0, 0, 0 }, |
1046 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } }, |
1047 | | & ifmt_ldxwbe, { 0x63 } |
1048 | | }, |
1049 | | /* stxh [$dstbe+$offset16],$srcbe */ |
1050 | | { |
1051 | | { 0, 0, 0, 0 }, |
1052 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } }, |
1053 | | & ifmt_ldxwbe, { 0x6b } |
1054 | | }, |
1055 | | /* stxb [$dstbe+$offset16],$srcbe */ |
1056 | | { |
1057 | | { 0, 0, 0, 0 }, |
1058 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } }, |
1059 | | & ifmt_ldxwbe, { 0x73 } |
1060 | | }, |
1061 | | /* stxdw [$dstbe+$offset16],$srcbe */ |
1062 | | { |
1063 | | { 0, 0, 0, 0 }, |
1064 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } }, |
1065 | | & ifmt_ldxwbe, { 0x7b } |
1066 | | }, |
1067 | | /* stb [$dstle+$offset16],$imm32 */ |
1068 | | { |
1069 | | { 0, 0, 0, 0 }, |
1070 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1071 | | & ifmt_stble, { 0x72 } |
1072 | | }, |
1073 | | /* sth [$dstle+$offset16],$imm32 */ |
1074 | | { |
1075 | | { 0, 0, 0, 0 }, |
1076 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1077 | | & ifmt_stble, { 0x6a } |
1078 | | }, |
1079 | | /* stw [$dstle+$offset16],$imm32 */ |
1080 | | { |
1081 | | { 0, 0, 0, 0 }, |
1082 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1083 | | & ifmt_stble, { 0x62 } |
1084 | | }, |
1085 | | /* stdw [$dstle+$offset16],$imm32 */ |
1086 | | { |
1087 | | { 0, 0, 0, 0 }, |
1088 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1089 | | & ifmt_stble, { 0x7a } |
1090 | | }, |
1091 | | /* stb [$dstbe+$offset16],$imm32 */ |
1092 | | { |
1093 | | { 0, 0, 0, 0 }, |
1094 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1095 | | & ifmt_stbbe, { 0x72 } |
1096 | | }, |
1097 | | /* sth [$dstbe+$offset16],$imm32 */ |
1098 | | { |
1099 | | { 0, 0, 0, 0 }, |
1100 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1101 | | & ifmt_stbbe, { 0x6a } |
1102 | | }, |
1103 | | /* stw [$dstbe+$offset16],$imm32 */ |
1104 | | { |
1105 | | { 0, 0, 0, 0 }, |
1106 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1107 | | & ifmt_stbbe, { 0x62 } |
1108 | | }, |
1109 | | /* stdw [$dstbe+$offset16],$imm32 */ |
1110 | | { |
1111 | | { 0, 0, 0, 0 }, |
1112 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } }, |
1113 | | & ifmt_stbbe, { 0x7a } |
1114 | | }, |
1115 | | /* jeq $dstle,$imm32,$disp16 */ |
1116 | | { |
1117 | | { 0, 0, 0, 0 }, |
1118 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1119 | | & ifmt_jeqile, { 0x15 } |
1120 | | }, |
1121 | | /* jeq $dstle,$srcle,$disp16 */ |
1122 | | { |
1123 | | { 0, 0, 0, 0 }, |
1124 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1125 | | & ifmt_jeqrle, { 0x1d } |
1126 | | }, |
1127 | | /* jeq32 $dstle,$imm32,$disp16 */ |
1128 | | { |
1129 | | { 0, 0, 0, 0 }, |
1130 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1131 | | & ifmt_jeqile, { 0x16 } |
1132 | | }, |
1133 | | /* jeq32 $dstle,$srcle,$disp16 */ |
1134 | | { |
1135 | | { 0, 0, 0, 0 }, |
1136 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1137 | | & ifmt_jeqrle, { 0x1e } |
1138 | | }, |
1139 | | /* jgt $dstle,$imm32,$disp16 */ |
1140 | | { |
1141 | | { 0, 0, 0, 0 }, |
1142 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1143 | | & ifmt_jeqile, { 0x25 } |
1144 | | }, |
1145 | | /* jgt $dstle,$srcle,$disp16 */ |
1146 | | { |
1147 | | { 0, 0, 0, 0 }, |
1148 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1149 | | & ifmt_jeqrle, { 0x2d } |
1150 | | }, |
1151 | | /* jgt32 $dstle,$imm32,$disp16 */ |
1152 | | { |
1153 | | { 0, 0, 0, 0 }, |
1154 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1155 | | & ifmt_jeqile, { 0x26 } |
1156 | | }, |
1157 | | /* jgt32 $dstle,$srcle,$disp16 */ |
1158 | | { |
1159 | | { 0, 0, 0, 0 }, |
1160 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1161 | | & ifmt_jeqrle, { 0x2e } |
1162 | | }, |
1163 | | /* jge $dstle,$imm32,$disp16 */ |
1164 | | { |
1165 | | { 0, 0, 0, 0 }, |
1166 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1167 | | & ifmt_jeqile, { 0x35 } |
1168 | | }, |
1169 | | /* jge $dstle,$srcle,$disp16 */ |
1170 | | { |
1171 | | { 0, 0, 0, 0 }, |
1172 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1173 | | & ifmt_jeqrle, { 0x3d } |
1174 | | }, |
1175 | | /* jge32 $dstle,$imm32,$disp16 */ |
1176 | | { |
1177 | | { 0, 0, 0, 0 }, |
1178 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1179 | | & ifmt_jeqile, { 0x36 } |
1180 | | }, |
1181 | | /* jge32 $dstle,$srcle,$disp16 */ |
1182 | | { |
1183 | | { 0, 0, 0, 0 }, |
1184 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1185 | | & ifmt_jeqrle, { 0x3e } |
1186 | | }, |
1187 | | /* jlt $dstle,$imm32,$disp16 */ |
1188 | | { |
1189 | | { 0, 0, 0, 0 }, |
1190 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1191 | | & ifmt_jeqile, { 0xa5 } |
1192 | | }, |
1193 | | /* jlt $dstle,$srcle,$disp16 */ |
1194 | | { |
1195 | | { 0, 0, 0, 0 }, |
1196 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1197 | | & ifmt_jeqrle, { 0xad } |
1198 | | }, |
1199 | | /* jlt32 $dstle,$imm32,$disp16 */ |
1200 | | { |
1201 | | { 0, 0, 0, 0 }, |
1202 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1203 | | & ifmt_jeqile, { 0xa6 } |
1204 | | }, |
1205 | | /* jlt32 $dstle,$srcle,$disp16 */ |
1206 | | { |
1207 | | { 0, 0, 0, 0 }, |
1208 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1209 | | & ifmt_jeqrle, { 0xae } |
1210 | | }, |
1211 | | /* jle $dstle,$imm32,$disp16 */ |
1212 | | { |
1213 | | { 0, 0, 0, 0 }, |
1214 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1215 | | & ifmt_jeqile, { 0xb5 } |
1216 | | }, |
1217 | | /* jle $dstle,$srcle,$disp16 */ |
1218 | | { |
1219 | | { 0, 0, 0, 0 }, |
1220 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1221 | | & ifmt_jeqrle, { 0xbd } |
1222 | | }, |
1223 | | /* jle32 $dstle,$imm32,$disp16 */ |
1224 | | { |
1225 | | { 0, 0, 0, 0 }, |
1226 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1227 | | & ifmt_jeqile, { 0xb6 } |
1228 | | }, |
1229 | | /* jle32 $dstle,$srcle,$disp16 */ |
1230 | | { |
1231 | | { 0, 0, 0, 0 }, |
1232 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1233 | | & ifmt_jeqrle, { 0xbe } |
1234 | | }, |
1235 | | /* jset $dstle,$imm32,$disp16 */ |
1236 | | { |
1237 | | { 0, 0, 0, 0 }, |
1238 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1239 | | & ifmt_jeqile, { 0x45 } |
1240 | | }, |
1241 | | /* jset $dstle,$srcle,$disp16 */ |
1242 | | { |
1243 | | { 0, 0, 0, 0 }, |
1244 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1245 | | & ifmt_jeqrle, { 0x4d } |
1246 | | }, |
1247 | | /* jset32 $dstle,$imm32,$disp16 */ |
1248 | | { |
1249 | | { 0, 0, 0, 0 }, |
1250 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1251 | | & ifmt_jeqile, { 0x46 } |
1252 | | }, |
1253 | | /* jset32 $dstle,$srcle,$disp16 */ |
1254 | | { |
1255 | | { 0, 0, 0, 0 }, |
1256 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1257 | | & ifmt_jeqrle, { 0x4e } |
1258 | | }, |
1259 | | /* jne $dstle,$imm32,$disp16 */ |
1260 | | { |
1261 | | { 0, 0, 0, 0 }, |
1262 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1263 | | & ifmt_jeqile, { 0x55 } |
1264 | | }, |
1265 | | /* jne $dstle,$srcle,$disp16 */ |
1266 | | { |
1267 | | { 0, 0, 0, 0 }, |
1268 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1269 | | & ifmt_jeqrle, { 0x5d } |
1270 | | }, |
1271 | | /* jne32 $dstle,$imm32,$disp16 */ |
1272 | | { |
1273 | | { 0, 0, 0, 0 }, |
1274 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1275 | | & ifmt_jeqile, { 0x56 } |
1276 | | }, |
1277 | | /* jne32 $dstle,$srcle,$disp16 */ |
1278 | | { |
1279 | | { 0, 0, 0, 0 }, |
1280 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1281 | | & ifmt_jeqrle, { 0x5e } |
1282 | | }, |
1283 | | /* jsgt $dstle,$imm32,$disp16 */ |
1284 | | { |
1285 | | { 0, 0, 0, 0 }, |
1286 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1287 | | & ifmt_jeqile, { 0x65 } |
1288 | | }, |
1289 | | /* jsgt $dstle,$srcle,$disp16 */ |
1290 | | { |
1291 | | { 0, 0, 0, 0 }, |
1292 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1293 | | & ifmt_jeqrle, { 0x6d } |
1294 | | }, |
1295 | | /* jsgt32 $dstle,$imm32,$disp16 */ |
1296 | | { |
1297 | | { 0, 0, 0, 0 }, |
1298 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1299 | | & ifmt_jeqile, { 0x66 } |
1300 | | }, |
1301 | | /* jsgt32 $dstle,$srcle,$disp16 */ |
1302 | | { |
1303 | | { 0, 0, 0, 0 }, |
1304 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1305 | | & ifmt_jeqrle, { 0x6e } |
1306 | | }, |
1307 | | /* jsge $dstle,$imm32,$disp16 */ |
1308 | | { |
1309 | | { 0, 0, 0, 0 }, |
1310 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1311 | | & ifmt_jeqile, { 0x75 } |
1312 | | }, |
1313 | | /* jsge $dstle,$srcle,$disp16 */ |
1314 | | { |
1315 | | { 0, 0, 0, 0 }, |
1316 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1317 | | & ifmt_jeqrle, { 0x7d } |
1318 | | }, |
1319 | | /* jsge32 $dstle,$imm32,$disp16 */ |
1320 | | { |
1321 | | { 0, 0, 0, 0 }, |
1322 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1323 | | & ifmt_jeqile, { 0x76 } |
1324 | | }, |
1325 | | /* jsge32 $dstle,$srcle,$disp16 */ |
1326 | | { |
1327 | | { 0, 0, 0, 0 }, |
1328 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1329 | | & ifmt_jeqrle, { 0x7e } |
1330 | | }, |
1331 | | /* jslt $dstle,$imm32,$disp16 */ |
1332 | | { |
1333 | | { 0, 0, 0, 0 }, |
1334 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1335 | | & ifmt_jeqile, { 0xc5 } |
1336 | | }, |
1337 | | /* jslt $dstle,$srcle,$disp16 */ |
1338 | | { |
1339 | | { 0, 0, 0, 0 }, |
1340 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1341 | | & ifmt_jeqrle, { 0xcd } |
1342 | | }, |
1343 | | /* jslt32 $dstle,$imm32,$disp16 */ |
1344 | | { |
1345 | | { 0, 0, 0, 0 }, |
1346 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1347 | | & ifmt_jeqile, { 0xc6 } |
1348 | | }, |
1349 | | /* jslt32 $dstle,$srcle,$disp16 */ |
1350 | | { |
1351 | | { 0, 0, 0, 0 }, |
1352 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1353 | | & ifmt_jeqrle, { 0xce } |
1354 | | }, |
1355 | | /* jsle $dstle,$imm32,$disp16 */ |
1356 | | { |
1357 | | { 0, 0, 0, 0 }, |
1358 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1359 | | & ifmt_jeqile, { 0xd5 } |
1360 | | }, |
1361 | | /* jsle $dstle,$srcle,$disp16 */ |
1362 | | { |
1363 | | { 0, 0, 0, 0 }, |
1364 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1365 | | & ifmt_jeqrle, { 0xdd } |
1366 | | }, |
1367 | | /* jsle32 $dstle,$imm32,$disp16 */ |
1368 | | { |
1369 | | { 0, 0, 0, 0 }, |
1370 | | { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1371 | | & ifmt_jeqile, { 0xd6 } |
1372 | | }, |
1373 | | /* jsle32 $dstle,$srcle,$disp16 */ |
1374 | | { |
1375 | | { 0, 0, 0, 0 }, |
1376 | | { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } }, |
1377 | | & ifmt_jeqrle, { 0xde } |
1378 | | }, |
1379 | | /* jeq $dstbe,$imm32,$disp16 */ |
1380 | | { |
1381 | | { 0, 0, 0, 0 }, |
1382 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1383 | | & ifmt_jeqibe, { 0x15 } |
1384 | | }, |
1385 | | /* jeq $dstbe,$srcbe,$disp16 */ |
1386 | | { |
1387 | | { 0, 0, 0, 0 }, |
1388 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1389 | | & ifmt_jeqrbe, { 0x1d } |
1390 | | }, |
1391 | | /* jeq32 $dstbe,$imm32,$disp16 */ |
1392 | | { |
1393 | | { 0, 0, 0, 0 }, |
1394 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1395 | | & ifmt_jeqibe, { 0x16 } |
1396 | | }, |
1397 | | /* jeq32 $dstbe,$srcbe,$disp16 */ |
1398 | | { |
1399 | | { 0, 0, 0, 0 }, |
1400 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1401 | | & ifmt_jeqrbe, { 0x1e } |
1402 | | }, |
1403 | | /* jgt $dstbe,$imm32,$disp16 */ |
1404 | | { |
1405 | | { 0, 0, 0, 0 }, |
1406 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1407 | | & ifmt_jeqibe, { 0x25 } |
1408 | | }, |
1409 | | /* jgt $dstbe,$srcbe,$disp16 */ |
1410 | | { |
1411 | | { 0, 0, 0, 0 }, |
1412 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1413 | | & ifmt_jeqrbe, { 0x2d } |
1414 | | }, |
1415 | | /* jgt32 $dstbe,$imm32,$disp16 */ |
1416 | | { |
1417 | | { 0, 0, 0, 0 }, |
1418 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1419 | | & ifmt_jeqibe, { 0x26 } |
1420 | | }, |
1421 | | /* jgt32 $dstbe,$srcbe,$disp16 */ |
1422 | | { |
1423 | | { 0, 0, 0, 0 }, |
1424 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1425 | | & ifmt_jeqrbe, { 0x2e } |
1426 | | }, |
1427 | | /* jge $dstbe,$imm32,$disp16 */ |
1428 | | { |
1429 | | { 0, 0, 0, 0 }, |
1430 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1431 | | & ifmt_jeqibe, { 0x35 } |
1432 | | }, |
1433 | | /* jge $dstbe,$srcbe,$disp16 */ |
1434 | | { |
1435 | | { 0, 0, 0, 0 }, |
1436 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1437 | | & ifmt_jeqrbe, { 0x3d } |
1438 | | }, |
1439 | | /* jge32 $dstbe,$imm32,$disp16 */ |
1440 | | { |
1441 | | { 0, 0, 0, 0 }, |
1442 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1443 | | & ifmt_jeqibe, { 0x36 } |
1444 | | }, |
1445 | | /* jge32 $dstbe,$srcbe,$disp16 */ |
1446 | | { |
1447 | | { 0, 0, 0, 0 }, |
1448 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1449 | | & ifmt_jeqrbe, { 0x3e } |
1450 | | }, |
1451 | | /* jlt $dstbe,$imm32,$disp16 */ |
1452 | | { |
1453 | | { 0, 0, 0, 0 }, |
1454 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1455 | | & ifmt_jeqibe, { 0xa5 } |
1456 | | }, |
1457 | | /* jlt $dstbe,$srcbe,$disp16 */ |
1458 | | { |
1459 | | { 0, 0, 0, 0 }, |
1460 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1461 | | & ifmt_jeqrbe, { 0xad } |
1462 | | }, |
1463 | | /* jlt32 $dstbe,$imm32,$disp16 */ |
1464 | | { |
1465 | | { 0, 0, 0, 0 }, |
1466 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1467 | | & ifmt_jeqibe, { 0xa6 } |
1468 | | }, |
1469 | | /* jlt32 $dstbe,$srcbe,$disp16 */ |
1470 | | { |
1471 | | { 0, 0, 0, 0 }, |
1472 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1473 | | & ifmt_jeqrbe, { 0xae } |
1474 | | }, |
1475 | | /* jle $dstbe,$imm32,$disp16 */ |
1476 | | { |
1477 | | { 0, 0, 0, 0 }, |
1478 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1479 | | & ifmt_jeqibe, { 0xb5 } |
1480 | | }, |
1481 | | /* jle $dstbe,$srcbe,$disp16 */ |
1482 | | { |
1483 | | { 0, 0, 0, 0 }, |
1484 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1485 | | & ifmt_jeqrbe, { 0xbd } |
1486 | | }, |
1487 | | /* jle32 $dstbe,$imm32,$disp16 */ |
1488 | | { |
1489 | | { 0, 0, 0, 0 }, |
1490 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1491 | | & ifmt_jeqibe, { 0xb6 } |
1492 | | }, |
1493 | | /* jle32 $dstbe,$srcbe,$disp16 */ |
1494 | | { |
1495 | | { 0, 0, 0, 0 }, |
1496 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1497 | | & ifmt_jeqrbe, { 0xbe } |
1498 | | }, |
1499 | | /* jset $dstbe,$imm32,$disp16 */ |
1500 | | { |
1501 | | { 0, 0, 0, 0 }, |
1502 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1503 | | & ifmt_jeqibe, { 0x45 } |
1504 | | }, |
1505 | | /* jset $dstbe,$srcbe,$disp16 */ |
1506 | | { |
1507 | | { 0, 0, 0, 0 }, |
1508 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1509 | | & ifmt_jeqrbe, { 0x4d } |
1510 | | }, |
1511 | | /* jset32 $dstbe,$imm32,$disp16 */ |
1512 | | { |
1513 | | { 0, 0, 0, 0 }, |
1514 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1515 | | & ifmt_jeqibe, { 0x46 } |
1516 | | }, |
1517 | | /* jset32 $dstbe,$srcbe,$disp16 */ |
1518 | | { |
1519 | | { 0, 0, 0, 0 }, |
1520 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1521 | | & ifmt_jeqrbe, { 0x4e } |
1522 | | }, |
1523 | | /* jne $dstbe,$imm32,$disp16 */ |
1524 | | { |
1525 | | { 0, 0, 0, 0 }, |
1526 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1527 | | & ifmt_jeqibe, { 0x55 } |
1528 | | }, |
1529 | | /* jne $dstbe,$srcbe,$disp16 */ |
1530 | | { |
1531 | | { 0, 0, 0, 0 }, |
1532 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1533 | | & ifmt_jeqrbe, { 0x5d } |
1534 | | }, |
1535 | | /* jne32 $dstbe,$imm32,$disp16 */ |
1536 | | { |
1537 | | { 0, 0, 0, 0 }, |
1538 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1539 | | & ifmt_jeqibe, { 0x56 } |
1540 | | }, |
1541 | | /* jne32 $dstbe,$srcbe,$disp16 */ |
1542 | | { |
1543 | | { 0, 0, 0, 0 }, |
1544 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1545 | | & ifmt_jeqrbe, { 0x5e } |
1546 | | }, |
1547 | | /* jsgt $dstbe,$imm32,$disp16 */ |
1548 | | { |
1549 | | { 0, 0, 0, 0 }, |
1550 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1551 | | & ifmt_jeqibe, { 0x65 } |
1552 | | }, |
1553 | | /* jsgt $dstbe,$srcbe,$disp16 */ |
1554 | | { |
1555 | | { 0, 0, 0, 0 }, |
1556 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1557 | | & ifmt_jeqrbe, { 0x6d } |
1558 | | }, |
1559 | | /* jsgt32 $dstbe,$imm32,$disp16 */ |
1560 | | { |
1561 | | { 0, 0, 0, 0 }, |
1562 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1563 | | & ifmt_jeqibe, { 0x66 } |
1564 | | }, |
1565 | | /* jsgt32 $dstbe,$srcbe,$disp16 */ |
1566 | | { |
1567 | | { 0, 0, 0, 0 }, |
1568 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1569 | | & ifmt_jeqrbe, { 0x6e } |
1570 | | }, |
1571 | | /* jsge $dstbe,$imm32,$disp16 */ |
1572 | | { |
1573 | | { 0, 0, 0, 0 }, |
1574 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1575 | | & ifmt_jeqibe, { 0x75 } |
1576 | | }, |
1577 | | /* jsge $dstbe,$srcbe,$disp16 */ |
1578 | | { |
1579 | | { 0, 0, 0, 0 }, |
1580 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1581 | | & ifmt_jeqrbe, { 0x7d } |
1582 | | }, |
1583 | | /* jsge32 $dstbe,$imm32,$disp16 */ |
1584 | | { |
1585 | | { 0, 0, 0, 0 }, |
1586 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1587 | | & ifmt_jeqibe, { 0x76 } |
1588 | | }, |
1589 | | /* jsge32 $dstbe,$srcbe,$disp16 */ |
1590 | | { |
1591 | | { 0, 0, 0, 0 }, |
1592 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1593 | | & ifmt_jeqrbe, { 0x7e } |
1594 | | }, |
1595 | | /* jslt $dstbe,$imm32,$disp16 */ |
1596 | | { |
1597 | | { 0, 0, 0, 0 }, |
1598 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1599 | | & ifmt_jeqibe, { 0xc5 } |
1600 | | }, |
1601 | | /* jslt $dstbe,$srcbe,$disp16 */ |
1602 | | { |
1603 | | { 0, 0, 0, 0 }, |
1604 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1605 | | & ifmt_jeqrbe, { 0xcd } |
1606 | | }, |
1607 | | /* jslt32 $dstbe,$imm32,$disp16 */ |
1608 | | { |
1609 | | { 0, 0, 0, 0 }, |
1610 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1611 | | & ifmt_jeqibe, { 0xc6 } |
1612 | | }, |
1613 | | /* jslt32 $dstbe,$srcbe,$disp16 */ |
1614 | | { |
1615 | | { 0, 0, 0, 0 }, |
1616 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1617 | | & ifmt_jeqrbe, { 0xce } |
1618 | | }, |
1619 | | /* jsle $dstbe,$imm32,$disp16 */ |
1620 | | { |
1621 | | { 0, 0, 0, 0 }, |
1622 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1623 | | & ifmt_jeqibe, { 0xd5 } |
1624 | | }, |
1625 | | /* jsle $dstbe,$srcbe,$disp16 */ |
1626 | | { |
1627 | | { 0, 0, 0, 0 }, |
1628 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1629 | | & ifmt_jeqrbe, { 0xdd } |
1630 | | }, |
1631 | | /* jsle32 $dstbe,$imm32,$disp16 */ |
1632 | | { |
1633 | | { 0, 0, 0, 0 }, |
1634 | | { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } }, |
1635 | | & ifmt_jeqibe, { 0xd6 } |
1636 | | }, |
1637 | | /* jsle32 $dstbe,$srcbe,$disp16 */ |
1638 | | { |
1639 | | { 0, 0, 0, 0 }, |
1640 | | { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } }, |
1641 | | & ifmt_jeqrbe, { 0xde } |
1642 | | }, |
1643 | | /* call $disp32 */ |
1644 | | { |
1645 | | { 0, 0, 0, 0 }, |
1646 | | { { MNEM, ' ', OP (DISP32), 0 } }, |
1647 | | & ifmt_callle, { 0x85 } |
1648 | | }, |
1649 | | /* call $disp32 */ |
1650 | | { |
1651 | | { 0, 0, 0, 0 }, |
1652 | | { { MNEM, ' ', OP (DISP32), 0 } }, |
1653 | | & ifmt_callbe, { 0x85 } |
1654 | | }, |
1655 | | /* call $dstle */ |
1656 | | { |
1657 | | { 0, 0, 0, 0 }, |
1658 | | { { MNEM, ' ', OP (DSTLE), 0 } }, |
1659 | | & ifmt_negle, { 0x8d } |
1660 | | }, |
1661 | | /* call $dstbe */ |
1662 | | { |
1663 | | { 0, 0, 0, 0 }, |
1664 | | { { MNEM, ' ', OP (DSTBE), 0 } }, |
1665 | | & ifmt_negbe, { 0x8d } |
1666 | | }, |
1667 | | /* ja $disp16 */ |
1668 | | { |
1669 | | { 0, 0, 0, 0 }, |
1670 | | { { MNEM, ' ', OP (DISP16), 0 } }, |
1671 | | & ifmt_ja, { 0x5 } |
1672 | | }, |
1673 | | /* exit */ |
1674 | | { |
1675 | | { 0, 0, 0, 0 }, |
1676 | | { { MNEM, 0 } }, |
1677 | | & ifmt_exit, { 0x95 } |
1678 | | }, |
1679 | | /* xadddw [$dstle+$offset16],$srcle */ |
1680 | | { |
1681 | | { 0, 0, 0, 0 }, |
1682 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } }, |
1683 | | & ifmt_ldxwle, { 0xdb } |
1684 | | }, |
1685 | | /* xaddw [$dstle+$offset16],$srcle */ |
1686 | | { |
1687 | | { 0, 0, 0, 0 }, |
1688 | | { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } }, |
1689 | | & ifmt_ldxwle, { 0xc3 } |
1690 | | }, |
1691 | | /* xadddw [$dstbe+$offset16],$srcbe */ |
1692 | | { |
1693 | | { 0, 0, 0, 0 }, |
1694 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } }, |
1695 | | & ifmt_ldxwbe, { 0xdb } |
1696 | | }, |
1697 | | /* xaddw [$dstbe+$offset16],$srcbe */ |
1698 | | { |
1699 | | { 0, 0, 0, 0 }, |
1700 | | { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } }, |
1701 | | & ifmt_ldxwbe, { 0xc3 } |
1702 | | }, |
1703 | | /* brkpt */ |
1704 | | { |
1705 | | { 0, 0, 0, 0 }, |
1706 | | { { MNEM, 0 } }, |
1707 | | & ifmt_exit, { 0x8c } |
1708 | | }, |
1709 | | }; |
1710 | | |
1711 | | #undef A |
1712 | | #undef OPERAND |
1713 | | #undef MNEM |
1714 | | #undef OP |
1715 | | |
1716 | | /* Formats for ALIAS macro-insns. */ |
1717 | | |
1718 | | #define F(f) & bpf_cgen_ifld_table[BPF_##f] |
1719 | | #undef F |
1720 | | |
1721 | | /* Each non-simple macro entry points to an array of expansion possibilities. */ |
1722 | | |
1723 | | #define A(a) (1 << CGEN_INSN_##a) |
1724 | | #define OPERAND(op) BPF_OPERAND_##op |
1725 | | #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ |
1726 | | #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) |
1727 | | |
1728 | | /* The macro instruction table. */ |
1729 | | |
1730 | | static const CGEN_IBASE bpf_cgen_macro_insn_table[] = |
1731 | | { |
1732 | | }; |
1733 | | |
1734 | | /* The macro instruction opcode table. */ |
1735 | | |
1736 | | static const CGEN_OPCODE bpf_cgen_macro_insn_opcode_table[] = |
1737 | | { |
1738 | | }; |
1739 | | |
1740 | | #undef A |
1741 | | #undef OPERAND |
1742 | | #undef MNEM |
1743 | | #undef OP |
1744 | | |
1745 | | #ifndef CGEN_ASM_HASH_P |
1746 | 0 | #define CGEN_ASM_HASH_P(insn) 1 |
1747 | | #endif |
1748 | | |
1749 | | #ifndef CGEN_DIS_HASH_P |
1750 | 1.02k | #define CGEN_DIS_HASH_P(insn) 1 |
1751 | | #endif |
1752 | | |
1753 | | /* Return non-zero if INSN is to be added to the hash table. |
1754 | | Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */ |
1755 | | |
1756 | | static int |
1757 | | asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED) |
1758 | 0 | { |
1759 | 0 | return CGEN_ASM_HASH_P (insn); |
1760 | 0 | } |
1761 | | |
1762 | | static int |
1763 | | dis_hash_insn_p (const CGEN_INSN *insn) |
1764 | 1.02k | { |
1765 | | /* If building the hash table and the NO-DIS attribute is present, |
1766 | | ignore. */ |
1767 | 1.02k | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS)) |
1768 | 0 | return 0; |
1769 | 1.02k | return CGEN_DIS_HASH_P (insn); |
1770 | 1.02k | } |
1771 | | |
1772 | | #ifndef CGEN_ASM_HASH |
1773 | 4 | #define CGEN_ASM_HASH_SIZE 127 |
1774 | | #ifdef CGEN_MNEMONIC_OPERANDS |
1775 | 0 | #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) |
1776 | | #else |
1777 | | #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/ |
1778 | | #endif |
1779 | | #endif |
1780 | | |
1781 | | /* It doesn't make much sense to provide a default here, |
1782 | | but while this is under development we do. |
1783 | | BUFFER is a pointer to the bytes of the insn, target order. |
1784 | | VALUE is the first base_insn_bitsize bits as an int in host order. */ |
1785 | | |
1786 | | #ifndef CGEN_DIS_HASH |
1787 | | #define CGEN_DIS_HASH_SIZE 256 |
1788 | | #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf)) |
1789 | | #endif |
1790 | | |
1791 | | /* The result is the hash value of the insn. |
1792 | | Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */ |
1793 | | |
1794 | | static unsigned int |
1795 | | asm_hash_insn (const char *mnem) |
1796 | 0 | { |
1797 | 0 | return CGEN_ASM_HASH (mnem); |
1798 | 0 | } |
1799 | | |
1800 | | /* BUF is a pointer to the bytes of the insn, target order. |
1801 | | VALUE is the first base_insn_bitsize bits as an int in host order. */ |
1802 | | |
1803 | | static unsigned int |
1804 | | dis_hash_insn (const char *buf ATTRIBUTE_UNUSED, |
1805 | | CGEN_INSN_INT value ATTRIBUTE_UNUSED) |
1806 | 40.6k | { |
1807 | 40.6k | return CGEN_DIS_HASH (buf, value); |
1808 | 40.6k | } |
1809 | | |
1810 | | /* Set the recorded length of the insn in the CGEN_FIELDS struct. */ |
1811 | | |
1812 | | static void |
1813 | | set_fields_bitsize (CGEN_FIELDS *fields, int size) |
1814 | 0 | { |
1815 | 0 | CGEN_FIELDS_BITSIZE (fields) = size; |
1816 | 0 | } |
1817 | | |
1818 | | /* Function to call before using the operand instance table. |
1819 | | This plugs the opcode entries and macro instructions into the cpu table. */ |
1820 | | |
1821 | | void |
1822 | | bpf_cgen_init_opcode_table (CGEN_CPU_DESC cd) |
1823 | 4 | { |
1824 | 4 | int i; |
1825 | 4 | int num_macros = (sizeof (bpf_cgen_macro_insn_table) / |
1826 | 4 | sizeof (bpf_cgen_macro_insn_table[0])); |
1827 | 4 | const CGEN_IBASE *ib = & bpf_cgen_macro_insn_table[0]; |
1828 | 4 | const CGEN_OPCODE *oc = & bpf_cgen_macro_insn_opcode_table[0]; |
1829 | 4 | CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN)); |
1830 | | |
1831 | | /* This test has been added to avoid a warning generated |
1832 | | if memset is called with a third argument of value zero. */ |
1833 | 4 | if (num_macros >= 1) |
1834 | 0 | memset (insns, 0, num_macros * sizeof (CGEN_INSN)); |
1835 | 4 | for (i = 0; i < num_macros; ++i) |
1836 | 0 | { |
1837 | 0 | insns[i].base = &ib[i]; |
1838 | 0 | insns[i].opcode = &oc[i]; |
1839 | 0 | bpf_cgen_build_insn_regex (& insns[i]); |
1840 | 0 | } |
1841 | 4 | cd->macro_insn_table.init_entries = insns; |
1842 | 4 | cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE); |
1843 | 4 | cd->macro_insn_table.num_init_entries = num_macros; |
1844 | | |
1845 | 4 | oc = & bpf_cgen_insn_opcode_table[0]; |
1846 | 4 | insns = (CGEN_INSN *) cd->insn_table.init_entries; |
1847 | 1.03k | for (i = 0; i < MAX_INSNS; ++i) |
1848 | 1.03k | { |
1849 | 1.03k | insns[i].opcode = &oc[i]; |
1850 | 1.03k | bpf_cgen_build_insn_regex (& insns[i]); |
1851 | 1.03k | } |
1852 | | |
1853 | 4 | cd->sizeof_fields = sizeof (CGEN_FIELDS); |
1854 | 4 | cd->set_fields_bitsize = set_fields_bitsize; |
1855 | | |
1856 | 4 | cd->asm_hash_p = asm_hash_insn_p; |
1857 | 4 | cd->asm_hash = asm_hash_insn; |
1858 | 4 | cd->asm_hash_size = CGEN_ASM_HASH_SIZE; |
1859 | | |
1860 | 4 | cd->dis_hash_p = dis_hash_insn_p; |
1861 | 4 | cd->dis_hash = dis_hash_insn; |
1862 | 4 | cd->dis_hash_size = CGEN_DIS_HASH_SIZE; |
1863 | 4 | } |