/src/binutils-gdb/opcodes/disassemble.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* Select disassembly routine for specified architecture. |
2 | | Copyright (C) 1994-2023 Free Software Foundation, Inc. |
3 | | |
4 | | This file is part of the GNU opcodes library. |
5 | | |
6 | | This library is free software; you can redistribute it and/or modify |
7 | | it under the terms of the GNU General Public License as published by |
8 | | the Free Software Foundation; either version 3 of the License, or |
9 | | (at your option) any later version. |
10 | | |
11 | | This program is distributed in the hope that it will be useful, |
12 | | but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 | | GNU General Public License for more details. |
15 | | |
16 | | You should have received a copy of the GNU General Public License |
17 | | along with this program; if not, write to the Free Software |
18 | | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | | MA 02110-1301, USA. */ |
20 | | |
21 | | #include "sysdep.h" |
22 | | #include "disassemble.h" |
23 | | #include "safe-ctype.h" |
24 | | #include "opintl.h" |
25 | | |
26 | | #ifdef ARCH_all |
27 | | #ifdef BFD64 |
28 | | #define ARCH_aarch64 |
29 | | #define ARCH_alpha |
30 | | #define ARCH_bpf |
31 | | #define ARCH_ia64 |
32 | | #define ARCH_loongarch |
33 | | #define ARCH_mips |
34 | | #define ARCH_mmix |
35 | | #define ARCH_nfp |
36 | | #define ARCH_riscv |
37 | | #define ARCH_score |
38 | | #define ARCH_tilegx |
39 | | #endif |
40 | | #define ARCH_arc |
41 | | #define ARCH_arm |
42 | | #define ARCH_avr |
43 | | #define ARCH_bfin |
44 | | #define ARCH_cr16 |
45 | | #define ARCH_cris |
46 | | #define ARCH_crx |
47 | | #define ARCH_csky |
48 | | #define ARCH_d10v |
49 | | #define ARCH_d30v |
50 | | #define ARCH_dlx |
51 | | #define ARCH_epiphany |
52 | | #define ARCH_fr30 |
53 | | #define ARCH_frv |
54 | | #define ARCH_ft32 |
55 | | #define ARCH_h8300 |
56 | | #define ARCH_hppa |
57 | | #define ARCH_i386 |
58 | | #define ARCH_ip2k |
59 | | #define ARCH_iq2000 |
60 | | #define ARCH_lm32 |
61 | | #define ARCH_m32c |
62 | | #define ARCH_m32r |
63 | | #define ARCH_m68hc11 |
64 | | #define ARCH_m68hc12 |
65 | | #define ARCH_m68k |
66 | | #define ARCH_mcore |
67 | | #define ARCH_mep |
68 | | #define ARCH_metag |
69 | | #define ARCH_microblaze |
70 | | #define ARCH_mn10200 |
71 | | #define ARCH_mn10300 |
72 | | #define ARCH_moxie |
73 | | #define ARCH_mt |
74 | | #define ARCH_msp430 |
75 | | #define ARCH_nds32 |
76 | | #define ARCH_nios2 |
77 | | #define ARCH_ns32k |
78 | | #define ARCH_or1k |
79 | | #define ARCH_pdp11 |
80 | | #define ARCH_pj |
81 | | #define ARCH_powerpc |
82 | | #define ARCH_pru |
83 | | #define ARCH_rs6000 |
84 | | #define ARCH_rl78 |
85 | | #define ARCH_rx |
86 | | #define ARCH_s12z |
87 | | #define ARCH_s390 |
88 | | #define ARCH_sh |
89 | | #define ARCH_sparc |
90 | | #define ARCH_spu |
91 | | #define ARCH_tic30 |
92 | | #define ARCH_tic4x |
93 | | #define ARCH_tic54x |
94 | | #define ARCH_tic6x |
95 | | #define ARCH_tilepro |
96 | | #define ARCH_v850 |
97 | | #define ARCH_vax |
98 | | #define ARCH_visium |
99 | | #define ARCH_wasm32 |
100 | | #define ARCH_xstormy16 |
101 | | #define ARCH_xgate |
102 | | #define ARCH_xtensa |
103 | | #define ARCH_z80 |
104 | | #define ARCH_z8k |
105 | | #endif |
106 | | |
107 | | #ifdef ARCH_m32c |
108 | | #include "m32c-desc.h" |
109 | | #endif |
110 | | |
111 | | #ifdef ARCH_bpf |
112 | | /* XXX this should be including bpf-desc.h instead of this hackery, |
113 | | but at the moment it is not possible to include several CGEN |
114 | | generated *-desc.h files simultaneously. To be fixed in |
115 | | CGEN... */ |
116 | | |
117 | | # ifdef ARCH_m32c |
118 | | enum epbf_isa_attr |
119 | | { |
120 | | ISA_EBPFLE, ISA_EBPFBE, ISA_XBPFLE, ISA_XBPFBE, ISA_EBPFMAX |
121 | | }; |
122 | | # else |
123 | | # include "bpf-desc.h" |
124 | | # define ISA_EBPFMAX ISA_MAX |
125 | | # endif |
126 | | #endif /* ARCH_bpf */ |
127 | | |
128 | | disassembler_ftype |
129 | | disassembler (enum bfd_architecture a, |
130 | | bool big ATTRIBUTE_UNUSED, |
131 | | unsigned long mach ATTRIBUTE_UNUSED, |
132 | | bfd *abfd ATTRIBUTE_UNUSED) |
133 | 81.4k | { |
134 | 81.4k | disassembler_ftype disassemble; |
135 | | |
136 | 81.4k | switch (a) |
137 | 81.4k | { |
138 | | /* If you add a case to this table, also add it to the |
139 | | ARCH_all definition right above this function. */ |
140 | 0 | #ifdef ARCH_aarch64 |
141 | 8.14k | case bfd_arch_aarch64: |
142 | 8.14k | disassemble = print_insn_aarch64; |
143 | 8.14k | break; |
144 | 0 | #endif |
145 | 0 | #ifdef ARCH_alpha |
146 | 180 | case bfd_arch_alpha: |
147 | 180 | disassemble = print_insn_alpha; |
148 | 180 | break; |
149 | 0 | #endif |
150 | 0 | #ifdef ARCH_arc |
151 | 2.99k | case bfd_arch_arc: |
152 | 2.99k | disassemble = arc_get_disassembler (abfd); |
153 | 2.99k | break; |
154 | 0 | #endif |
155 | 0 | #ifdef ARCH_arm |
156 | 18.5k | case bfd_arch_arm: |
157 | 18.5k | if (big) |
158 | 9.08k | disassemble = print_insn_big_arm; |
159 | 9.48k | else |
160 | 9.48k | disassemble = print_insn_little_arm; |
161 | 18.5k | break; |
162 | 0 | #endif |
163 | 0 | #ifdef ARCH_avr |
164 | 148 | case bfd_arch_avr: |
165 | 148 | disassemble = print_insn_avr; |
166 | 148 | break; |
167 | 0 | #endif |
168 | 0 | #ifdef ARCH_bfin |
169 | 1.20k | case bfd_arch_bfin: |
170 | 1.20k | disassemble = print_insn_bfin; |
171 | 1.20k | break; |
172 | 0 | #endif |
173 | 0 | #ifdef ARCH_cr16 |
174 | 163 | case bfd_arch_cr16: |
175 | 163 | disassemble = print_insn_cr16; |
176 | 163 | break; |
177 | 0 | #endif |
178 | 0 | #ifdef ARCH_cris |
179 | 288 | case bfd_arch_cris: |
180 | 288 | disassemble = cris_get_disassembler (abfd); |
181 | 288 | break; |
182 | 0 | #endif |
183 | 0 | #ifdef ARCH_crx |
184 | 190 | case bfd_arch_crx: |
185 | 190 | disassemble = print_insn_crx; |
186 | 190 | break; |
187 | 0 | #endif |
188 | 0 | #ifdef ARCH_csky |
189 | 1.03k | case bfd_arch_csky: |
190 | 1.03k | disassemble = csky_get_disassembler (abfd); |
191 | 1.03k | break; |
192 | 0 | #endif |
193 | | |
194 | 0 | #ifdef ARCH_d10v |
195 | 143 | case bfd_arch_d10v: |
196 | 143 | disassemble = print_insn_d10v; |
197 | 143 | break; |
198 | 0 | #endif |
199 | 0 | #ifdef ARCH_d30v |
200 | 237 | case bfd_arch_d30v: |
201 | 237 | disassemble = print_insn_d30v; |
202 | 237 | break; |
203 | 0 | #endif |
204 | 0 | #ifdef ARCH_dlx |
205 | 74 | case bfd_arch_dlx: |
206 | | /* As far as I know we only handle big-endian DLX objects. */ |
207 | 74 | disassemble = print_insn_dlx; |
208 | 74 | break; |
209 | 0 | #endif |
210 | 0 | #ifdef ARCH_h8300 |
211 | 356 | case bfd_arch_h8300: |
212 | 356 | if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn) |
213 | 22 | disassemble = print_insn_h8300h; |
214 | 334 | else if (mach == bfd_mach_h8300s |
215 | 334 | || mach == bfd_mach_h8300sn |
216 | 334 | || mach == bfd_mach_h8300sx |
217 | 334 | || mach == bfd_mach_h8300sxn) |
218 | 24 | disassemble = print_insn_h8300s; |
219 | 310 | else |
220 | 310 | disassemble = print_insn_h8300; |
221 | 356 | break; |
222 | 0 | #endif |
223 | 0 | #ifdef ARCH_hppa |
224 | 455 | case bfd_arch_hppa: |
225 | 455 | disassemble = print_insn_hppa; |
226 | 455 | break; |
227 | 0 | #endif |
228 | 0 | #ifdef ARCH_i386 |
229 | 12.4k | case bfd_arch_i386: |
230 | 12.5k | case bfd_arch_iamcu: |
231 | 12.5k | disassemble = print_insn_i386; |
232 | 12.5k | break; |
233 | 0 | #endif |
234 | 0 | #ifdef ARCH_ia64 |
235 | 303 | case bfd_arch_ia64: |
236 | 303 | disassemble = print_insn_ia64; |
237 | 303 | break; |
238 | 0 | #endif |
239 | 0 | #ifdef ARCH_ip2k |
240 | 98 | case bfd_arch_ip2k: |
241 | 98 | disassemble = print_insn_ip2k; |
242 | 98 | break; |
243 | 0 | #endif |
244 | 0 | #ifdef ARCH_bpf |
245 | 124 | case bfd_arch_bpf: |
246 | 124 | disassemble = print_insn_bpf; |
247 | 124 | break; |
248 | 0 | #endif |
249 | 0 | #ifdef ARCH_epiphany |
250 | 109 | case bfd_arch_epiphany: |
251 | 109 | disassemble = print_insn_epiphany; |
252 | 109 | break; |
253 | 0 | #endif |
254 | 0 | #ifdef ARCH_fr30 |
255 | 230 | case bfd_arch_fr30: |
256 | 230 | disassemble = print_insn_fr30; |
257 | 230 | break; |
258 | 0 | #endif |
259 | 0 | #ifdef ARCH_lm32 |
260 | 115 | case bfd_arch_lm32: |
261 | 115 | disassemble = print_insn_lm32; |
262 | 115 | break; |
263 | 0 | #endif |
264 | 0 | #ifdef ARCH_m32r |
265 | 203 | case bfd_arch_m32r: |
266 | 203 | disassemble = print_insn_m32r; |
267 | 203 | break; |
268 | 0 | #endif |
269 | 0 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \ |
270 | 0 | || defined(ARCH_9s12x) || defined(ARCH_m9s12xg) |
271 | 87 | case bfd_arch_m68hc11: |
272 | 87 | disassemble = print_insn_m68hc11; |
273 | 87 | break; |
274 | 119 | case bfd_arch_m68hc12: |
275 | 119 | disassemble = print_insn_m68hc12; |
276 | 119 | break; |
277 | 119 | case bfd_arch_m9s12x: |
278 | 119 | disassemble = print_insn_m9s12x; |
279 | 119 | break; |
280 | 65 | case bfd_arch_m9s12xg: |
281 | 65 | disassemble = print_insn_m9s12xg; |
282 | 65 | break; |
283 | 0 | #endif |
284 | 0 | #if defined(ARCH_s12z) |
285 | 396 | case bfd_arch_s12z: |
286 | 396 | disassemble = print_insn_s12z; |
287 | 396 | break; |
288 | 0 | #endif |
289 | 0 | #ifdef ARCH_m68k |
290 | 728 | case bfd_arch_m68k: |
291 | 728 | disassemble = print_insn_m68k; |
292 | 728 | break; |
293 | 0 | #endif |
294 | 0 | #ifdef ARCH_mt |
295 | 188 | case bfd_arch_mt: |
296 | 188 | disassemble = print_insn_mt; |
297 | 188 | break; |
298 | 0 | #endif |
299 | 0 | #ifdef ARCH_microblaze |
300 | 125 | case bfd_arch_microblaze: |
301 | 125 | disassemble = print_insn_microblaze; |
302 | 125 | break; |
303 | 0 | #endif |
304 | 0 | #ifdef ARCH_msp430 |
305 | 394 | case bfd_arch_msp430: |
306 | 394 | disassemble = print_insn_msp430; |
307 | 394 | break; |
308 | 0 | #endif |
309 | 0 | #ifdef ARCH_nds32 |
310 | 682 | case bfd_arch_nds32: |
311 | 682 | disassemble = print_insn_nds32; |
312 | 682 | break; |
313 | 0 | #endif |
314 | 0 | #ifdef ARCH_nfp |
315 | 572 | case bfd_arch_nfp: |
316 | 572 | disassemble = print_insn_nfp; |
317 | 572 | break; |
318 | 0 | #endif |
319 | 0 | #ifdef ARCH_ns32k |
320 | 641 | case bfd_arch_ns32k: |
321 | 641 | disassemble = print_insn_ns32k; |
322 | 641 | break; |
323 | 0 | #endif |
324 | 0 | #ifdef ARCH_mcore |
325 | 225 | case bfd_arch_mcore: |
326 | 225 | disassemble = print_insn_mcore; |
327 | 225 | break; |
328 | 0 | #endif |
329 | 0 | #ifdef ARCH_mep |
330 | 234 | case bfd_arch_mep: |
331 | 234 | disassemble = print_insn_mep; |
332 | 234 | break; |
333 | 0 | #endif |
334 | 0 | #ifdef ARCH_metag |
335 | 1.61k | case bfd_arch_metag: |
336 | 1.61k | disassemble = print_insn_metag; |
337 | 1.61k | break; |
338 | 0 | #endif |
339 | 0 | #ifdef ARCH_mips |
340 | 7.74k | case bfd_arch_mips: |
341 | 7.74k | if (big) |
342 | 3.39k | disassemble = print_insn_big_mips; |
343 | 4.35k | else |
344 | 4.35k | disassemble = print_insn_little_mips; |
345 | 7.74k | break; |
346 | 0 | #endif |
347 | 0 | #ifdef ARCH_mmix |
348 | 136 | case bfd_arch_mmix: |
349 | 136 | disassemble = print_insn_mmix; |
350 | 136 | break; |
351 | 0 | #endif |
352 | 0 | #ifdef ARCH_mn10200 |
353 | 129 | case bfd_arch_mn10200: |
354 | 129 | disassemble = print_insn_mn10200; |
355 | 129 | break; |
356 | 0 | #endif |
357 | 0 | #ifdef ARCH_mn10300 |
358 | 290 | case bfd_arch_mn10300: |
359 | 290 | disassemble = print_insn_mn10300; |
360 | 290 | break; |
361 | 0 | #endif |
362 | 0 | #ifdef ARCH_nios2 |
363 | 285 | case bfd_arch_nios2: |
364 | 285 | if (big) |
365 | 71 | disassemble = print_insn_big_nios2; |
366 | 214 | else |
367 | 214 | disassemble = print_insn_little_nios2; |
368 | 285 | break; |
369 | 0 | #endif |
370 | 0 | #ifdef ARCH_or1k |
371 | 124 | case bfd_arch_or1k: |
372 | 124 | disassemble = print_insn_or1k; |
373 | 124 | break; |
374 | 0 | #endif |
375 | 0 | #ifdef ARCH_pdp11 |
376 | 377 | case bfd_arch_pdp11: |
377 | 377 | disassemble = print_insn_pdp11; |
378 | 377 | break; |
379 | 0 | #endif |
380 | 0 | #ifdef ARCH_pj |
381 | 0 | case bfd_arch_pj: |
382 | 0 | disassemble = print_insn_pj; |
383 | 0 | break; |
384 | 0 | #endif |
385 | 0 | #ifdef ARCH_powerpc |
386 | 667 | case bfd_arch_powerpc: |
387 | 667 | #endif |
388 | 667 | #ifdef ARCH_rs6000 |
389 | 841 | case bfd_arch_rs6000: |
390 | 841 | #endif |
391 | 841 | #if defined ARCH_powerpc || defined ARCH_rs6000 |
392 | 841 | if (big) |
393 | 375 | disassemble = print_insn_big_powerpc; |
394 | 466 | else |
395 | 466 | disassemble = print_insn_little_powerpc; |
396 | 841 | break; |
397 | 0 | #endif |
398 | 0 | #ifdef ARCH_pru |
399 | 78 | case bfd_arch_pru: |
400 | 78 | disassemble = print_insn_pru; |
401 | 78 | break; |
402 | 0 | #endif |
403 | 0 | #ifdef ARCH_riscv |
404 | 704 | case bfd_arch_riscv: |
405 | 704 | disassemble = riscv_get_disassembler (abfd); |
406 | 704 | break; |
407 | 0 | #endif |
408 | 0 | #ifdef ARCH_rl78 |
409 | 1.80k | case bfd_arch_rl78: |
410 | 1.80k | disassemble = rl78_get_disassembler (abfd); |
411 | 1.80k | break; |
412 | 0 | #endif |
413 | 0 | #ifdef ARCH_rx |
414 | 5.75k | case bfd_arch_rx: |
415 | 5.75k | disassemble = print_insn_rx; |
416 | 5.75k | break; |
417 | 0 | #endif |
418 | 0 | #ifdef ARCH_s390 |
419 | 152 | case bfd_arch_s390: |
420 | 152 | disassemble = print_insn_s390; |
421 | 152 | break; |
422 | 0 | #endif |
423 | 0 | #ifdef ARCH_score |
424 | 424 | case bfd_arch_score: |
425 | 424 | if (big) |
426 | 121 | disassemble = print_insn_big_score; |
427 | 303 | else |
428 | 303 | disassemble = print_insn_little_score; |
429 | 424 | break; |
430 | 0 | #endif |
431 | 0 | #ifdef ARCH_sh |
432 | 781 | case bfd_arch_sh: |
433 | 781 | disassemble = print_insn_sh; |
434 | 781 | break; |
435 | 0 | #endif |
436 | 0 | #ifdef ARCH_sparc |
437 | 368 | case bfd_arch_sparc: |
438 | 368 | disassemble = print_insn_sparc; |
439 | 368 | break; |
440 | 0 | #endif |
441 | 0 | #ifdef ARCH_spu |
442 | 217 | case bfd_arch_spu: |
443 | 217 | disassemble = print_insn_spu; |
444 | 217 | break; |
445 | 0 | #endif |
446 | 0 | #ifdef ARCH_tic30 |
447 | 386 | case bfd_arch_tic30: |
448 | 386 | disassemble = print_insn_tic30; |
449 | 386 | break; |
450 | 0 | #endif |
451 | 0 | #ifdef ARCH_tic4x |
452 | 301 | case bfd_arch_tic4x: |
453 | 301 | disassemble = print_insn_tic4x; |
454 | 301 | break; |
455 | 0 | #endif |
456 | 0 | #ifdef ARCH_tic54x |
457 | 393 | case bfd_arch_tic54x: |
458 | 393 | disassemble = print_insn_tic54x; |
459 | 393 | break; |
460 | 0 | #endif |
461 | 0 | #ifdef ARCH_tic6x |
462 | 232 | case bfd_arch_tic6x: |
463 | 232 | disassemble = print_insn_tic6x; |
464 | 232 | break; |
465 | 0 | #endif |
466 | 0 | #ifdef ARCH_ft32 |
467 | 121 | case bfd_arch_ft32: |
468 | 121 | disassemble = print_insn_ft32; |
469 | 121 | break; |
470 | 0 | #endif |
471 | 0 | #ifdef ARCH_v850 |
472 | 268 | case bfd_arch_v850: |
473 | 280 | case bfd_arch_v850_rh850: |
474 | 280 | disassemble = print_insn_v850; |
475 | 280 | break; |
476 | 0 | #endif |
477 | 0 | #ifdef ARCH_wasm32 |
478 | 316 | case bfd_arch_wasm32: |
479 | 316 | disassemble = print_insn_wasm32; |
480 | 316 | break; |
481 | 0 | #endif |
482 | 0 | #ifdef ARCH_xgate |
483 | 134 | case bfd_arch_xgate: |
484 | 134 | disassemble = print_insn_xgate; |
485 | 134 | break; |
486 | 0 | #endif |
487 | 0 | #ifdef ARCH_xstormy16 |
488 | 95 | case bfd_arch_xstormy16: |
489 | 95 | disassemble = print_insn_xstormy16; |
490 | 95 | break; |
491 | 0 | #endif |
492 | 0 | #ifdef ARCH_xtensa |
493 | 1.94k | case bfd_arch_xtensa: |
494 | 1.94k | disassemble = print_insn_xtensa; |
495 | 1.94k | break; |
496 | 0 | #endif |
497 | 0 | #ifdef ARCH_z80 |
498 | 312 | case bfd_arch_z80: |
499 | 312 | disassemble = print_insn_z80; |
500 | 312 | break; |
501 | 0 | #endif |
502 | 0 | #ifdef ARCH_z8k |
503 | 284 | case bfd_arch_z8k: |
504 | 284 | if (mach == bfd_mach_z8001) |
505 | 150 | disassemble = print_insn_z8001; |
506 | 134 | else |
507 | 134 | disassemble = print_insn_z8002; |
508 | 284 | break; |
509 | 0 | #endif |
510 | 0 | #ifdef ARCH_vax |
511 | 316 | case bfd_arch_vax: |
512 | 316 | disassemble = print_insn_vax; |
513 | 316 | break; |
514 | 0 | #endif |
515 | 0 | #ifdef ARCH_visium |
516 | 323 | case bfd_arch_visium: |
517 | 323 | disassemble = print_insn_visium; |
518 | 323 | break; |
519 | 0 | #endif |
520 | 0 | #ifdef ARCH_frv |
521 | 193 | case bfd_arch_frv: |
522 | 193 | disassemble = print_insn_frv; |
523 | 193 | break; |
524 | 0 | #endif |
525 | 0 | #ifdef ARCH_moxie |
526 | 80 | case bfd_arch_moxie: |
527 | 80 | disassemble = print_insn_moxie; |
528 | 80 | break; |
529 | 0 | #endif |
530 | 0 | #ifdef ARCH_iq2000 |
531 | 102 | case bfd_arch_iq2000: |
532 | 102 | disassemble = print_insn_iq2000; |
533 | 102 | break; |
534 | 0 | #endif |
535 | 0 | #ifdef ARCH_m32c |
536 | 402 | case bfd_arch_m32c: |
537 | 402 | disassemble = print_insn_m32c; |
538 | 402 | break; |
539 | 0 | #endif |
540 | 0 | #ifdef ARCH_tilegx |
541 | 138 | case bfd_arch_tilegx: |
542 | 138 | disassemble = print_insn_tilegx; |
543 | 138 | break; |
544 | 0 | #endif |
545 | 0 | #ifdef ARCH_tilepro |
546 | 107 | case bfd_arch_tilepro: |
547 | 107 | disassemble = print_insn_tilepro; |
548 | 107 | break; |
549 | 0 | #endif |
550 | 0 | #ifdef ARCH_loongarch |
551 | 184 | case bfd_arch_loongarch: |
552 | 184 | disassemble = print_insn_loongarch; |
553 | 184 | break; |
554 | 0 | #endif |
555 | 440 | default: |
556 | 440 | return 0; |
557 | 81.4k | } |
558 | 81.0k | return disassemble; |
559 | 81.4k | } |
560 | | |
561 | | void |
562 | | disassembler_usage (FILE *stream ATTRIBUTE_UNUSED) |
563 | 0 | { |
564 | 0 | #ifdef ARCH_aarch64 |
565 | 0 | print_aarch64_disassembler_options (stream); |
566 | 0 | #endif |
567 | 0 | #ifdef ARCH_arc |
568 | 0 | print_arc_disassembler_options (stream); |
569 | 0 | #endif |
570 | 0 | #ifdef ARCH_arm |
571 | 0 | print_arm_disassembler_options (stream); |
572 | 0 | #endif |
573 | 0 | #ifdef ARCH_mips |
574 | 0 | print_mips_disassembler_options (stream); |
575 | 0 | #endif |
576 | 0 | #ifdef ARCH_nfp |
577 | 0 | print_nfp_disassembler_options (stream); |
578 | 0 | #endif |
579 | 0 | #ifdef ARCH_powerpc |
580 | 0 | print_ppc_disassembler_options (stream); |
581 | 0 | #endif |
582 | 0 | #ifdef ARCH_riscv |
583 | 0 | print_riscv_disassembler_options (stream); |
584 | 0 | #endif |
585 | 0 | #ifdef ARCH_i386 |
586 | 0 | print_i386_disassembler_options (stream); |
587 | 0 | #endif |
588 | 0 | #ifdef ARCH_s390 |
589 | 0 | print_s390_disassembler_options (stream); |
590 | 0 | #endif |
591 | 0 | #ifdef ARCH_wasm32 |
592 | 0 | print_wasm32_disassembler_options (stream); |
593 | 0 | #endif |
594 | 0 | #ifdef ARCH_loongarch |
595 | 0 | print_loongarch_disassembler_options (stream); |
596 | 0 | #endif |
597 | |
|
598 | 0 | return; |
599 | 0 | } |
600 | | |
601 | | void |
602 | | disassemble_init_for_target (struct disassemble_info * info) |
603 | 81.0k | { |
604 | 81.0k | if (info == NULL) |
605 | 0 | return; |
606 | | |
607 | 81.0k | switch (info->arch) |
608 | 81.0k | { |
609 | 0 | #ifdef ARCH_aarch64 |
610 | 8.14k | case bfd_arch_aarch64: |
611 | 8.14k | info->symbol_is_valid = aarch64_symbol_is_valid; |
612 | 8.14k | info->disassembler_needs_relocs = true; |
613 | 8.14k | info->created_styled_output = true; |
614 | 8.14k | break; |
615 | 0 | #endif |
616 | 0 | #ifdef ARCH_arc |
617 | 2.99k | case bfd_arch_arc: |
618 | 2.99k | info->created_styled_output = true; |
619 | 2.99k | break; |
620 | 0 | #endif |
621 | 0 | #ifdef ARCH_arm |
622 | 18.5k | case bfd_arch_arm: |
623 | 18.5k | info->symbol_is_valid = arm_symbol_is_valid; |
624 | 18.5k | info->disassembler_needs_relocs = true; |
625 | 18.5k | info->created_styled_output = true; |
626 | 18.5k | break; |
627 | 0 | #endif |
628 | 0 | #ifdef ARCH_avr |
629 | 148 | case bfd_arch_avr: |
630 | 148 | info->created_styled_output = true; |
631 | 148 | break; |
632 | 0 | #endif |
633 | 0 | #ifdef ARCH_csky |
634 | 1.03k | case bfd_arch_csky: |
635 | 1.03k | info->symbol_is_valid = csky_symbol_is_valid; |
636 | 1.03k | info->disassembler_needs_relocs = true; |
637 | 1.03k | break; |
638 | 0 | #endif |
639 | 0 | #ifdef ARCH_i386 |
640 | 12.4k | case bfd_arch_i386: |
641 | 12.5k | case bfd_arch_iamcu: |
642 | 12.5k | info->created_styled_output = true; |
643 | 12.5k | break; |
644 | 0 | #endif |
645 | 0 | #ifdef ARCH_ia64 |
646 | 303 | case bfd_arch_ia64: |
647 | 303 | info->skip_zeroes = 16; |
648 | 303 | break; |
649 | 0 | #endif |
650 | 0 | #ifdef ARCH_tic4x |
651 | 301 | case bfd_arch_tic4x: |
652 | 301 | info->skip_zeroes = 32; |
653 | 301 | break; |
654 | 0 | #endif |
655 | 0 | #ifdef ARCH_m68k |
656 | 728 | case bfd_arch_m68k: |
657 | 728 | info->created_styled_output = true; |
658 | 728 | break; |
659 | 0 | #endif |
660 | 0 | #ifdef ARCH_mep |
661 | 234 | case bfd_arch_mep: |
662 | 234 | info->skip_zeroes = 256; |
663 | 234 | info->skip_zeroes_at_end = 0; |
664 | 234 | break; |
665 | 0 | #endif |
666 | 0 | #ifdef ARCH_metag |
667 | 1.61k | case bfd_arch_metag: |
668 | 1.61k | info->disassembler_needs_relocs = true; |
669 | 1.61k | break; |
670 | 0 | #endif |
671 | 0 | #ifdef ARCH_mips |
672 | 7.74k | case bfd_arch_mips: |
673 | 7.74k | info->created_styled_output = true; |
674 | 7.74k | break; |
675 | 0 | #endif |
676 | 0 | #ifdef ARCH_m32c |
677 | 402 | case bfd_arch_m32c: |
678 | | /* This processor in fact is little endian. The value set here |
679 | | reflects the way opcodes are written in the cgen description. */ |
680 | 402 | info->endian = BFD_ENDIAN_BIG; |
681 | 402 | if (!info->private_data) |
682 | 402 | { |
683 | 402 | info->private_data = cgen_bitset_create (ISA_MAX); |
684 | 402 | if (info->mach == bfd_mach_m16c) |
685 | 122 | cgen_bitset_set (info->private_data, ISA_M16C); |
686 | 280 | else |
687 | 280 | cgen_bitset_set (info->private_data, ISA_M32C); |
688 | 402 | } |
689 | 402 | break; |
690 | 0 | #endif |
691 | 0 | #ifdef ARCH_bpf |
692 | 124 | case bfd_arch_bpf: |
693 | 124 | info->endian_code = BFD_ENDIAN_LITTLE; |
694 | 124 | if (!info->private_data) |
695 | 124 | { |
696 | 124 | info->private_data = cgen_bitset_create (ISA_MAX); |
697 | 124 | if (info->endian == BFD_ENDIAN_BIG) |
698 | 1 | { |
699 | 1 | cgen_bitset_set (info->private_data, ISA_EBPFBE); |
700 | 1 | if (info->mach == bfd_mach_xbpf) |
701 | 0 | cgen_bitset_set (info->private_data, ISA_XBPFBE); |
702 | 1 | } |
703 | 123 | else |
704 | 123 | { |
705 | 123 | cgen_bitset_set (info->private_data, ISA_EBPFLE); |
706 | 123 | if (info->mach == bfd_mach_xbpf) |
707 | 7 | cgen_bitset_set (info->private_data, ISA_XBPFLE); |
708 | 123 | } |
709 | 124 | } |
710 | 124 | break; |
711 | 0 | #endif |
712 | 0 | #ifdef ARCH_pru |
713 | 78 | case bfd_arch_pru: |
714 | 78 | info->disassembler_needs_relocs = true; |
715 | 78 | break; |
716 | 0 | #endif |
717 | 0 | #ifdef ARCH_powerpc |
718 | 667 | case bfd_arch_powerpc: |
719 | 667 | #endif |
720 | 667 | #ifdef ARCH_rs6000 |
721 | 841 | case bfd_arch_rs6000: |
722 | 841 | #endif |
723 | 841 | #if defined (ARCH_powerpc) || defined (ARCH_rs6000) |
724 | 841 | disassemble_init_powerpc (info); |
725 | 841 | info->created_styled_output = true; |
726 | 841 | break; |
727 | 0 | #endif |
728 | 0 | #ifdef ARCH_riscv |
729 | 704 | case bfd_arch_riscv: |
730 | 704 | info->symbol_is_valid = riscv_symbol_is_valid; |
731 | 704 | info->created_styled_output = true; |
732 | 704 | break; |
733 | 0 | #endif |
734 | 0 | #ifdef ARCH_wasm32 |
735 | 316 | case bfd_arch_wasm32: |
736 | 316 | disassemble_init_wasm32 (info); |
737 | 316 | break; |
738 | 0 | #endif |
739 | 0 | #ifdef ARCH_s390 |
740 | 152 | case bfd_arch_s390: |
741 | 152 | disassemble_init_s390 (info); |
742 | 152 | info->created_styled_output = true; |
743 | 152 | break; |
744 | 0 | #endif |
745 | 0 | #ifdef ARCH_nds32 |
746 | 682 | case bfd_arch_nds32: |
747 | 682 | disassemble_init_nds32 (info); |
748 | 682 | break; |
749 | 0 | #endif |
750 | 23.2k | default: |
751 | 23.2k | break; |
752 | 81.0k | } |
753 | 81.0k | } |
754 | | |
755 | | void |
756 | | disassemble_free_target (struct disassemble_info *info) |
757 | 81.0k | { |
758 | 81.0k | if (info == NULL) |
759 | 0 | return; |
760 | | |
761 | 81.0k | switch (info->arch) |
762 | 81.0k | { |
763 | 74.9k | default: |
764 | 74.9k | return; |
765 | | |
766 | 74.9k | #ifdef ARCH_bpf |
767 | 74.9k | case bfd_arch_bpf: |
768 | 124 | #endif |
769 | 124 | #ifdef ARCH_m32c |
770 | 526 | case bfd_arch_m32c: |
771 | 526 | #endif |
772 | 526 | #if defined ARCH_bpf || defined ARCH_m32c |
773 | 526 | if (info->private_data) |
774 | 526 | { |
775 | 526 | CGEN_BITSET *mask = info->private_data; |
776 | 526 | free (mask->bits); |
777 | 526 | } |
778 | 526 | break; |
779 | 0 | #endif |
780 | | |
781 | 0 | #ifdef ARCH_arc |
782 | 2.99k | case bfd_arch_arc: |
783 | 2.99k | break; |
784 | 0 | #endif |
785 | 0 | #ifdef ARCH_cris |
786 | 288 | case bfd_arch_cris: |
787 | 288 | break; |
788 | 0 | #endif |
789 | 0 | #ifdef ARCH_mmix |
790 | 136 | case bfd_arch_mmix: |
791 | 136 | break; |
792 | 0 | #endif |
793 | 0 | #ifdef ARCH_nfp |
794 | 572 | case bfd_arch_nfp: |
795 | 572 | break; |
796 | 0 | #endif |
797 | 0 | #ifdef ARCH_powerpc |
798 | 667 | case bfd_arch_powerpc: |
799 | 667 | break; |
800 | 0 | #endif |
801 | 0 | #ifdef ARCH_riscv |
802 | 704 | case bfd_arch_riscv: |
803 | 704 | disassemble_free_riscv (info); |
804 | 704 | break; |
805 | 0 | #endif |
806 | 0 | #ifdef ARCH_rs6000 |
807 | 174 | case bfd_arch_rs6000: |
808 | 174 | break; |
809 | 81.0k | #endif |
810 | 81.0k | } |
811 | | |
812 | 6.06k | free (info->private_data); |
813 | 6.06k | } |
814 | | |
815 | | /* Remove whitespace and consecutive commas from OPTIONS. */ |
816 | | |
817 | | char * |
818 | | remove_whitespace_and_extra_commas (char *options) |
819 | 0 | { |
820 | 0 | char *str; |
821 | 0 | size_t i, len; |
822 | |
|
823 | 0 | if (options == NULL) |
824 | 0 | return NULL; |
825 | | |
826 | | /* Strip off all trailing whitespace and commas. */ |
827 | 0 | for (len = strlen (options); len > 0; len--) |
828 | 0 | { |
829 | 0 | if (!ISSPACE (options[len - 1]) && options[len - 1] != ',') |
830 | 0 | break; |
831 | 0 | options[len - 1] = '\0'; |
832 | 0 | } |
833 | | |
834 | | /* Convert all remaining whitespace to commas. */ |
835 | 0 | for (i = 0; options[i] != '\0'; i++) |
836 | 0 | if (ISSPACE (options[i])) |
837 | 0 | options[i] = ','; |
838 | | |
839 | | /* Remove consecutive commas. */ |
840 | 0 | for (str = options; *str != '\0'; str++) |
841 | 0 | if (*str == ',' && (*(str + 1) == ',' || str == options)) |
842 | 0 | { |
843 | 0 | char *next = str + 1; |
844 | 0 | while (*next == ',') |
845 | 0 | next++; |
846 | 0 | len = strlen (next); |
847 | 0 | if (str != options) |
848 | 0 | str++; |
849 | 0 | memmove (str, next, len); |
850 | 0 | next[len - (size_t)(next - str)] = '\0'; |
851 | 0 | } |
852 | 0 | return (strlen (options) != 0) ? options : NULL; |
853 | 0 | } |
854 | | |
855 | | /* Like STRCMP, but treat ',' the same as '\0' so that we match |
856 | | strings like "foobar" against "foobar,xxyyzz,...". */ |
857 | | |
858 | | int |
859 | | disassembler_options_cmp (const char *s1, const char *s2) |
860 | 112k | { |
861 | 112k | unsigned char c1, c2; |
862 | | |
863 | 112k | do |
864 | 159k | { |
865 | 159k | c1 = (unsigned char) *s1++; |
866 | 159k | if (c1 == ',') |
867 | 20.0k | c1 = '\0'; |
868 | 159k | c2 = (unsigned char) *s2++; |
869 | 159k | if (c2 == ',') |
870 | 1.65k | c2 = '\0'; |
871 | 159k | if (c1 == '\0') |
872 | 24.6k | return c1 - c2; |
873 | 159k | } |
874 | 134k | while (c1 == c2); |
875 | | |
876 | 88.0k | return c1 - c2; |
877 | 112k | } |
878 | | |
879 | | void |
880 | | opcodes_assert (const char *file, int line) |
881 | 0 | { |
882 | 0 | opcodes_error_handler (_("assertion fail %s:%d"), file, line); |
883 | 0 | opcodes_error_handler (_("Please report this bug")); |
884 | 0 | abort (); |
885 | 0 | } |
886 | | |
887 | | /* Set the stream, and the styled and unstyled printf functions within |
888 | | INFO. */ |
889 | | |
890 | | void |
891 | | disassemble_set_printf (struct disassemble_info *info, void *stream, |
892 | | fprintf_ftype unstyled_printf, |
893 | | fprintf_styled_ftype styled_printf) |
894 | 104M | { |
895 | 104M | info->stream = stream; |
896 | 104M | info->fprintf_func = unstyled_printf; |
897 | 104M | info->fprintf_styled_func = styled_printf; |
898 | 104M | } |