Coverage Report

Created: 2023-08-28 06:31

/src/binutils-gdb/opcodes/avr-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* Disassemble AVR instructions.
2
   Copyright (C) 1999-2023 Free Software Foundation, Inc.
3
4
   Contributed by Denis Chertykov <denisc@overta.ru>
5
6
   This file is part of libopcodes.
7
8
   This library is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3, or (at your option)
11
   any later version.
12
13
   It is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
18
   You should have received a copy of the GNU General Public License
19
   along with this program; if not, write to the Free Software
20
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21
   MA 02110-1301, USA.  */
22
23
#include "sysdep.h"
24
#include <assert.h>
25
#include "disassemble.h"
26
#include "opintl.h"
27
#include "libiberty.h"
28
#include <stdint.h>
29
30
struct avr_opcodes_s
31
{
32
  char *name;
33
  char *constraints;
34
  char *opcode;
35
  int insn_size;    /* In words.  */
36
  int isa;
37
  unsigned int bin_opcode;
38
};
39
40
#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41
{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
43
const struct avr_opcodes_s avr_opcodes[] =
44
{
45
  #include "opcode/avr.h"
46
  {NULL, NULL, NULL, 0, 0, 0}
47
};
48
49
static const char * comment_start = "0x";
50
51
static int
52
avr_operand (unsigned int        insn,
53
       unsigned int        insn2,
54
       unsigned int        pc,
55
       int                 constraint,
56
             char *              opcode_str,
57
       char *              buf,
58
       char *              comment,
59
       enum disassembler_style *  style,
60
       int                 regs,
61
       int *               sym,
62
       bfd_vma *           sym_addr,
63
       disassemble_info *  info)
64
269k
{
65
269k
  int ok = 1;
66
269k
  *sym = 0;
67
68
269k
  switch (constraint)
69
269k
    {
70
      /* Any register operand.  */
71
93.4k
    case 'r':
72
93.4k
      if (regs)
73
30.9k
  insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register.  */
74
62.5k
      else
75
62.5k
  insn = (insn & 0x01f0) >> 4; /* Destination register.  */
76
77
93.4k
      sprintf (buf, "r%d", insn);
78
93.4k
      *style = dis_style_register;
79
93.4k
      break;
80
81
57.6k
    case 'd':
82
57.6k
      if (regs)
83
720
  sprintf (buf, "r%d", 16 + (insn & 0xf));
84
56.9k
      else
85
56.9k
  sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
86
57.6k
      *style = dis_style_register;
87
57.6k
      break;
88
89
863
    case 'w':
90
863
      sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
91
863
      *style = dis_style_register;
92
863
      break;
93
94
3.27k
    case 'a':
95
3.27k
      if (regs)
96
1.63k
  sprintf (buf, "r%d", 16 + (insn & 7));
97
1.63k
      else
98
1.63k
  sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
99
3.27k
      *style = dis_style_register;
100
3.27k
      break;
101
102
5.23k
    case 'v':
103
5.23k
      if (regs)
104
2.61k
  sprintf (buf, "r%d", (insn & 0xf) * 2);
105
2.61k
      else
106
2.61k
  sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
107
5.23k
      *style = dis_style_register;
108
5.23k
      break;
109
110
4.01k
    case 'e':
111
4.01k
      {
112
4.01k
  char *xyz;
113
114
4.01k
  switch (insn & 0x100f)
115
4.01k
    {
116
721
      case 0x0000: xyz = "Z";  break;
117
1.20k
      case 0x1001: xyz = "Z+"; break;
118
615
      case 0x1002: xyz = "-Z"; break;
119
124
      case 0x0008: xyz = "Y";  break;
120
114
      case 0x1009: xyz = "Y+"; break;
121
188
      case 0x100a: xyz = "-Y"; break;
122
94
      case 0x100c: xyz = "X";  break;
123
212
      case 0x100d: xyz = "X+"; break;
124
54
      case 0x100e: xyz = "-X"; break;
125
684
      default: xyz = "??"; ok = 0;
126
4.01k
    }
127
4.01k
  strcpy (buf, xyz);
128
129
4.01k
  if (AVR_UNDEF_P (insn))
130
302
    sprintf (comment, _("undefined"));
131
4.01k
      }
132
0
      *style = dis_style_register;
133
4.01k
      break;
134
135
671
    case 'z':
136
671
      *buf++ = 'Z';
137
138
      /* Check for post-increment. */
139
671
      char *s;
140
10.9k
      for (s = opcode_str; *s; ++s)
141
10.7k
        {
142
10.7k
          if (*s == '+')
143
418
            {
144
418
        if (insn & (1 << (15 - (s - opcode_str))))
145
74
    *buf++ = '+';
146
418
              break;
147
418
            }
148
10.7k
        }
149
150
671
      *buf = '\0';
151
671
      if (AVR_UNDEF_P (insn))
152
0
  sprintf (comment, _("undefined"));
153
671
      *style = dis_style_register;
154
671
      break;
155
156
14.7k
    case 'b':
157
14.7k
      {
158
14.7k
  unsigned int x;
159
160
14.7k
  x = (insn & 7);
161
14.7k
  x |= (insn >> 7) & (3 << 3);
162
14.7k
  x |= (insn >> 8) & (1 << 5);
163
164
14.7k
  if (insn & 0x8)
165
6.45k
    *buf++ = 'Y';
166
8.33k
  else
167
8.33k
    *buf++ = 'Z';
168
14.7k
  sprintf (buf, "+%d", x);
169
14.7k
  sprintf (comment, "0x%02x", x);
170
14.7k
  *style = dis_style_register;
171
14.7k
      }
172
14.7k
      break;
173
174
154
    case 'h':
175
154
      *sym = 1;
176
154
      *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
177
      /* See PR binutils/2454.  Ideally we would like to display the hex
178
   value of the address only once, but this would mean recoding
179
   objdump_print_address() which would affect many targets.  */
180
154
      sprintf (buf, "%#lx", (unsigned long) *sym_addr);
181
154
      strcpy (comment, comment_start);
182
154
      info->insn_info_valid = 1;
183
154
      info->insn_type = dis_jsr;
184
154
      info->target = *sym_addr;
185
154
      *style = dis_style_address;
186
154
      break;
187
188
11.8k
    case 'L':
189
11.8k
      {
190
11.8k
  int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
191
11.8k
  sprintf (buf, ".%+-8d", rel_addr);
192
11.8k
        *sym = 1;
193
11.8k
        *sym_addr = pc + 2 + rel_addr;
194
11.8k
  strcpy (comment, comment_start);
195
11.8k
        info->insn_info_valid = 1;
196
11.8k
        info->insn_type = dis_branch;
197
11.8k
        info->target = *sym_addr;
198
11.8k
  *style = dis_style_address_offset;
199
11.8k
      }
200
11.8k
      break;
201
202
4.69k
    case 'l':
203
4.69k
      {
204
4.69k
  int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
205
206
4.69k
  sprintf (buf, ".%+-8d", rel_addr);
207
4.69k
        *sym = 1;
208
4.69k
        *sym_addr = pc + 2 + rel_addr;
209
4.69k
  strcpy (comment, comment_start);
210
4.69k
        info->insn_info_valid = 1;
211
4.69k
        info->insn_type = dis_condbranch;
212
4.69k
        info->target = *sym_addr;
213
4.69k
  *style = dis_style_address_offset;
214
4.69k
      }
215
4.69k
      break;
216
217
655
    case 'i':
218
655
      {
219
655
        unsigned int val = insn2 | 0x800000;
220
655
        *sym = 1;
221
655
        *sym_addr = val;
222
655
        sprintf (buf, "0x%04X", insn2);
223
655
        strcpy (comment, comment_start);
224
655
  *style = dis_style_immediate;
225
655
      }
226
655
      break;
227
228
1.86k
    case 'j':
229
1.86k
      {
230
1.86k
        unsigned int val = ((insn & 0xf) | ((insn & 0x600) >> 5)
231
1.86k
                                         | ((insn & 0x100) >> 2));
232
1.86k
  if ((insn & 0x100) == 0)
233
655
    val |= 0x80;
234
1.86k
        *sym = 1;
235
1.86k
        *sym_addr = val | 0x800000;
236
1.86k
        sprintf (buf, "0x%02x", val);
237
1.86k
        strcpy (comment, comment_start);
238
1.86k
  *style = dis_style_immediate;
239
1.86k
      }
240
1.86k
      break;
241
242
54.3k
    case 'M':
243
54.3k
      sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
244
54.3k
      sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
245
54.3k
      *style = dis_style_immediate;
246
54.3k
      break;
247
248
0
    case 'n':
249
0
      sprintf (buf, "??");
250
      /* xgettext:c-format */
251
0
      opcodes_error_handler (_("internal disassembler error"));
252
0
      ok = 0;
253
0
      *style = dis_style_immediate;
254
0
      break;
255
256
863
    case 'K':
257
863
      {
258
863
  unsigned int x;
259
260
863
  x = (insn & 0xf) | ((insn >> 2) & 0x30);
261
863
  sprintf (buf, "0x%02x", x);
262
863
  sprintf (comment, "%d", x);
263
863
  *style = dis_style_immediate;
264
863
      }
265
863
      break;
266
267
6.59k
    case 's':
268
6.59k
      sprintf (buf, "%d", insn & 7);
269
6.59k
      *style = dis_style_immediate;
270
6.59k
      break;
271
272
0
    case 'S':
273
0
      sprintf (buf, "%d", (insn >> 4) & 7);
274
0
      *style = dis_style_immediate;
275
0
      break;
276
277
6.76k
    case 'P':
278
6.76k
      {
279
6.76k
  unsigned int x;
280
281
6.76k
  x = (insn & 0xf);
282
6.76k
  x |= (insn >> 5) & 0x30;
283
6.76k
  sprintf (buf, "0x%02x", x);
284
6.76k
  sprintf (comment, "%d", x);
285
6.76k
  *style = dis_style_address;
286
6.76k
      }
287
6.76k
      break;
288
289
1.79k
    case 'p':
290
1.79k
      {
291
1.79k
  unsigned int x;
292
293
1.79k
  x = (insn >> 3) & 0x1f;
294
1.79k
  sprintf (buf, "0x%02x", x);
295
1.79k
  sprintf (comment, "%d", x);
296
1.79k
  *style = dis_style_address;
297
1.79k
      }
298
1.79k
      break;
299
300
88
    case 'E':
301
88
      sprintf (buf, "%d", (insn >> 4) & 15);
302
88
      *style = dis_style_immediate;
303
88
      break;
304
305
0
    case '?':
306
0
      *buf = '\0';
307
0
      break;
308
309
0
    default:
310
0
      sprintf (buf, "??");
311
      /* xgettext:c-format */
312
0
      opcodes_error_handler (_("unknown constraint `%c'"), constraint);
313
0
      ok = 0;
314
269k
    }
315
316
269k
    return ok;
317
269k
}
318
319
/* Read the opcode from ADDR.  Return 0 in success and save opcode
320
   in *INSN, otherwise, return -1.  */
321
322
static int
323
avrdis_opcode (bfd_vma addr, disassemble_info *info, uint16_t *insn)
324
193k
{
325
193k
  bfd_byte buffer[2];
326
193k
  int status;
327
328
193k
  status = info->read_memory_func (addr, buffer, 2, info);
329
330
193k
  if (status == 0)
331
193k
    {
332
193k
      *insn = bfd_getl16 (buffer);
333
193k
      return 0;
334
193k
    }
335
336
70
  info->memory_error_func (status, addr, info);
337
70
  return -1;
338
193k
}
339
340
341
int
342
print_insn_avr (bfd_vma addr, disassemble_info *info)
343
193k
{
344
193k
  uint16_t insn, insn2;
345
193k
  const struct avr_opcodes_s *opcode;
346
193k
  static unsigned int *maskptr;
347
193k
  void *stream = info->stream;
348
193k
  fprintf_styled_ftype prin = info->fprintf_styled_func;
349
193k
  static unsigned int *avr_bin_masks;
350
193k
  static int initialized;
351
193k
  int cmd_len = 2;
352
193k
  int ok = 0;
353
193k
  char op1[20], op2[20], comment1[40], comment2[40];
354
193k
  enum disassembler_style style_op1, style_op2;
355
193k
  int sym_op1 = 0, sym_op2 = 0;
356
193k
  bfd_vma sym_addr1, sym_addr2;
357
358
  /* Clear instruction information field.  */
359
193k
  info->insn_info_valid = 0;
360
193k
  info->branch_delay_insns = 0;
361
193k
  info->data_size = 0;
362
193k
  info->insn_type = dis_noninsn;
363
193k
  info->target = 0;
364
193k
  info->target2 = 0;
365
366
193k
  if (!initialized)
367
1
    {
368
1
      unsigned int nopcodes;
369
370
      /* PR 4045: Try to avoid duplicating the 0x prefix that
371
   objdump_print_addr() will put on addresses when there
372
   is no symbol table available.  */
373
1
      if (info->symtab_size == 0)
374
1
  comment_start = " ";
375
376
1
      nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
377
378
1
      avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
379
380
1
      for (opcode = avr_opcodes, maskptr = avr_bin_masks;
381
126
     opcode->name;
382
125
     opcode++, maskptr++)
383
125
  {
384
125
    char * s;
385
125
    unsigned int bin = 0;
386
125
    unsigned int mask = 0;
387
388
2.12k
    for (s = opcode->opcode; *s; ++s)
389
2.00k
      {
390
2.00k
        bin <<= 1;
391
2.00k
        mask <<= 1;
392
2.00k
        bin |= (*s == '1');
393
2.00k
        mask |= (*s == '1' || *s == '0');
394
2.00k
      }
395
125
    assert (s - opcode->opcode == 16);
396
125
    assert (opcode->bin_opcode == bin);
397
125
    *maskptr = mask;
398
125
  }
399
400
1
      initialized = 1;
401
1
    }
402
403
193k
  if (avrdis_opcode (addr, info, &insn)  != 0)
404
64
    return -1;
405
406
192k
  for (opcode = avr_opcodes, maskptr = avr_bin_masks;
407
13.4M
       opcode->name;
408
13.2M
       opcode++, maskptr++)
409
13.4M
    {
410
13.4M
      if ((opcode->isa == AVR_ISA_TINY) && (info->mach != bfd_mach_avrtiny))
411
80.4k
        continue;
412
13.3M
      if ((insn & *maskptr) == opcode->bin_opcode)
413
166k
        break;
414
13.3M
    }
415
416
  /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
417
     `std b+0,r' as `st b,r' (next entry in the table).  */
418
419
192k
  if (AVR_DISP0_P (insn))
420
845
    opcode++;
421
422
192k
  op1[0] = 0;
423
192k
  op2[0] = 0;
424
192k
  comment1[0] = 0;
425
192k
  comment2[0] = 0;
426
192k
  style_op1 = dis_style_text;
427
192k
  style_op2 = dis_style_text;
428
429
192k
  if (opcode->name)
430
166k
    {
431
166k
      char *constraints = opcode->constraints;
432
166k
      char *opcode_str = opcode->opcode;
433
434
166k
      insn2 = 0;
435
166k
      ok = 1;
436
437
166k
      if (opcode->insn_size > 1)
438
815
  {
439
815
    if (avrdis_opcode (addr + 2, info, &insn2) != 0)
440
6
      return -1;
441
809
    cmd_len = 4;
442
809
  }
443
444
166k
      if (*constraints && *constraints != '?')
445
143k
  {
446
143k
    int regs = REGISTER_P (*constraints);
447
448
143k
    ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1,
449
143k
          comment1, &style_op1, 0, &sym_op1, &sym_addr1,
450
143k
          info);
451
452
143k
    if (ok && *(++constraints) == ',')
453
125k
      ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str,
454
125k
            op2, *comment1 ? comment2 : comment1,
455
125k
            &style_op2, regs, &sym_op2, &sym_addr2,
456
125k
            info);
457
143k
  }
458
166k
    }
459
460
192k
  if (!ok)
461
27.1k
    {
462
      /* Unknown opcode, or invalid combination of operands.  */
463
27.1k
      sprintf (op1, "0x%04x", insn);
464
27.1k
      op2[0] = 0;
465
27.1k
      sprintf (comment1, "????");
466
27.1k
      comment2[0] = 0;
467
27.1k
    }
468
469
192k
  (*prin) (stream, ok ? dis_style_mnemonic : dis_style_assembler_directive,
470
192k
     "%s", ok ? opcode->name : ".word");
471
  
472
192k
  if (*op1)
473
170k
    (*prin) (stream, style_op1, "\t%s", op1);
474
475
192k
  if (*op2)
476
125k
    {
477
125k
      (*prin) (stream, dis_style_text, ", ");
478
125k
      (*prin) (stream, style_op2, "%s", op2);
479
125k
    }
480
481
192k
  if (*comment1)
482
125k
    (*prin) (stream, dis_style_comment_start, "\t; %s", comment1);
483
484
192k
  if (sym_op1)
485
17.7k
    info->print_address_func (sym_addr1, info);
486
487
192k
  if (*comment2)
488
0
    (*prin) (stream, dis_style_comment_start, " %s", comment2);
489
490
192k
  if (sym_op2)
491
1.46k
    info->print_address_func (sym_addr2, info);
492
493
192k
  return cmd_len;
494
192k
}