Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/bfd/elf32-arm.c
Line
Count
Source (jump to first uncovered line)
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/* 32-bit ELF support for ARM
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   Copyright (C) 1998-2024 Free Software Foundation, Inc.
3
4
   This file is part of BFD, the Binary File Descriptor library.
5
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program; if not, write to the Free Software
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   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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   MA 02110-1301, USA.  */
20
21
#include "sysdep.h"
22
#include <limits.h>
23
24
#include "bfd.h"
25
#include "libiberty.h"
26
#include "libbfd.h"
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#include "elf-bfd.h"
28
#include "elf-nacl.h"
29
#include "elf-vxworks.h"
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#include "elf/arm.h"
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#include "elf32-arm.h"
32
#include "cpu-arm.h"
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/* Return the relocation section associated with NAME.  HTAB is the
35
   bfd's elf32_arm_link_hash_entry.  */
36
#define RELOC_SECTION(HTAB, NAME) \
37
0
  ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
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/* Return size of a relocation entry.  HTAB is the bfd's
40
   elf32_arm_link_hash_entry.  */
41
#define RELOC_SIZE(HTAB) \
42
0
  ((HTAB)->use_rel \
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0
   ? sizeof (Elf32_External_Rel) \
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0
   : sizeof (Elf32_External_Rela))
45
46
/* Return function to swap relocations in.  HTAB is the bfd's
47
   elf32_arm_link_hash_entry.  */
48
#define SWAP_RELOC_IN(HTAB) \
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0
  ((HTAB)->use_rel \
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0
   ? bfd_elf32_swap_reloc_in \
51
0
   : bfd_elf32_swap_reloca_in)
52
53
/* Return function to swap relocations out.  HTAB is the bfd's
54
   elf32_arm_link_hash_entry.  */
55
#define SWAP_RELOC_OUT(HTAB) \
56
0
  ((HTAB)->use_rel \
57
0
   ? bfd_elf32_swap_reloc_out \
58
0
   : bfd_elf32_swap_reloca_out)
59
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#define elf_info_to_howto   NULL
61
#define elf_info_to_howto_rel   elf32_arm_info_to_howto
62
63
0
#define ARM_ELF_ABI_VERSION   0
64
#define ARM_ELF_OS_ABI_VERSION    ELFOSABI_ARM
65
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/* The Adjusted Place, as defined by AAELF.  */
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0
#define Pa(X) ((X) & 0xfffffffc)
68
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static bool elf32_arm_write_section (bfd *output_bfd,
70
             struct bfd_link_info *link_info,
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             asection *sec,
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             bfd_byte *contents);
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74
/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75
   R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76
   in that slot.  */
77
78
static reloc_howto_type elf32_arm_howto_table_1[] =
79
{
80
  /* No relocation.  */
81
  HOWTO (R_ARM_NONE,    /* type */
82
   0,     /* rightshift */
83
   0,     /* size */
84
   0,     /* bitsize */
85
   false,     /* pc_relative */
86
   0,     /* bitpos */
87
   complain_overflow_dont,/* complain_on_overflow */
88
   bfd_elf_generic_reloc, /* special_function */
89
   "R_ARM_NONE",    /* name */
90
   false,     /* partial_inplace */
91
   0,     /* src_mask */
92
   0,     /* dst_mask */
93
   false),    /* pcrel_offset */
94
95
  HOWTO (R_ARM_PC24,    /* type */
96
   2,     /* rightshift */
97
   4,     /* size */
98
   24,      /* bitsize */
99
   true,      /* pc_relative */
100
   0,     /* bitpos */
101
   complain_overflow_signed,/* complain_on_overflow */
102
   bfd_elf_generic_reloc, /* special_function */
103
   "R_ARM_PC24",    /* name */
104
   false,     /* partial_inplace */
105
   0x00ffffff,    /* src_mask */
106
   0x00ffffff,    /* dst_mask */
107
   true),     /* pcrel_offset */
108
109
  /* 32 bit absolute */
110
  HOWTO (R_ARM_ABS32,   /* type */
111
   0,     /* rightshift */
112
   4,     /* size */
113
   32,      /* bitsize */
114
   false,     /* pc_relative */
115
   0,     /* bitpos */
116
   complain_overflow_bitfield,/* complain_on_overflow */
117
   bfd_elf_generic_reloc, /* special_function */
118
   "R_ARM_ABS32",   /* name */
119
   false,     /* partial_inplace */
120
   0xffffffff,    /* src_mask */
121
   0xffffffff,    /* dst_mask */
122
   false),    /* pcrel_offset */
123
124
  /* standard 32bit pc-relative reloc */
125
  HOWTO (R_ARM_REL32,   /* type */
126
   0,     /* rightshift */
127
   4,     /* size */
128
   32,      /* bitsize */
129
   true,      /* pc_relative */
130
   0,     /* bitpos */
131
   complain_overflow_bitfield,/* complain_on_overflow */
132
   bfd_elf_generic_reloc, /* special_function */
133
   "R_ARM_REL32",   /* name */
134
   false,     /* partial_inplace */
135
   0xffffffff,    /* src_mask */
136
   0xffffffff,    /* dst_mask */
137
   true),     /* pcrel_offset */
138
139
  /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140
  HOWTO (R_ARM_LDR_PC_G0, /* type */
141
   0,     /* rightshift */
142
   1,     /* size */
143
   32,      /* bitsize */
144
   true,      /* pc_relative */
145
   0,     /* bitpos */
146
   complain_overflow_dont,/* complain_on_overflow */
147
   bfd_elf_generic_reloc, /* special_function */
148
   "R_ARM_LDR_PC_G0",     /* name */
149
   false,     /* partial_inplace */
150
   0xffffffff,    /* src_mask */
151
   0xffffffff,    /* dst_mask */
152
   true),     /* pcrel_offset */
153
154
   /* 16 bit absolute */
155
  HOWTO (R_ARM_ABS16,   /* type */
156
   0,     /* rightshift */
157
   2,     /* size */
158
   16,      /* bitsize */
159
   false,     /* pc_relative */
160
   0,     /* bitpos */
161
   complain_overflow_bitfield,/* complain_on_overflow */
162
   bfd_elf_generic_reloc, /* special_function */
163
   "R_ARM_ABS16",   /* name */
164
   false,     /* partial_inplace */
165
   0x0000ffff,    /* src_mask */
166
   0x0000ffff,    /* dst_mask */
167
   false),    /* pcrel_offset */
168
169
  /* 12 bit absolute */
170
  HOWTO (R_ARM_ABS12,   /* type */
171
   0,     /* rightshift */
172
   4,     /* size */
173
   12,      /* bitsize */
174
   false,     /* pc_relative */
175
   0,     /* bitpos */
176
   complain_overflow_bitfield,/* complain_on_overflow */
177
   bfd_elf_generic_reloc, /* special_function */
178
   "R_ARM_ABS12",   /* name */
179
   false,     /* partial_inplace */
180
   0x00000fff,    /* src_mask */
181
   0x00000fff,    /* dst_mask */
182
   false),    /* pcrel_offset */
183
184
  HOWTO (R_ARM_THM_ABS5,  /* type */
185
   6,     /* rightshift */
186
   2,     /* size */
187
   5,     /* bitsize */
188
   false,     /* pc_relative */
189
   0,     /* bitpos */
190
   complain_overflow_bitfield,/* complain_on_overflow */
191
   bfd_elf_generic_reloc, /* special_function */
192
   "R_ARM_THM_ABS5",  /* name */
193
   false,     /* partial_inplace */
194
   0x000007e0,    /* src_mask */
195
   0x000007e0,    /* dst_mask */
196
   false),    /* pcrel_offset */
197
198
  /* 8 bit absolute */
199
  HOWTO (R_ARM_ABS8,    /* type */
200
   0,     /* rightshift */
201
   1,     /* size */
202
   8,     /* bitsize */
203
   false,     /* pc_relative */
204
   0,     /* bitpos */
205
   complain_overflow_bitfield,/* complain_on_overflow */
206
   bfd_elf_generic_reloc, /* special_function */
207
   "R_ARM_ABS8",    /* name */
208
   false,     /* partial_inplace */
209
   0x000000ff,    /* src_mask */
210
   0x000000ff,    /* dst_mask */
211
   false),    /* pcrel_offset */
212
213
  HOWTO (R_ARM_SBREL32,   /* type */
214
   0,     /* rightshift */
215
   4,     /* size */
216
   32,      /* bitsize */
217
   false,     /* pc_relative */
218
   0,     /* bitpos */
219
   complain_overflow_dont,/* complain_on_overflow */
220
   bfd_elf_generic_reloc, /* special_function */
221
   "R_ARM_SBREL32", /* name */
222
   false,     /* partial_inplace */
223
   0xffffffff,    /* src_mask */
224
   0xffffffff,    /* dst_mask */
225
   false),    /* pcrel_offset */
226
227
  HOWTO (R_ARM_THM_CALL,  /* type */
228
   1,     /* rightshift */
229
   4,     /* size */
230
   24,      /* bitsize */
231
   true,      /* pc_relative */
232
   0,     /* bitpos */
233
   complain_overflow_signed,/* complain_on_overflow */
234
   bfd_elf_generic_reloc, /* special_function */
235
   "R_ARM_THM_CALL",  /* name */
236
   false,     /* partial_inplace */
237
   0x07ff2fff,    /* src_mask */
238
   0x07ff2fff,    /* dst_mask */
239
   true),     /* pcrel_offset */
240
241
  HOWTO (R_ARM_THM_PC8,   /* type */
242
   1,     /* rightshift */
243
   2,     /* size */
244
   8,     /* bitsize */
245
   true,      /* pc_relative */
246
   0,     /* bitpos */
247
   complain_overflow_signed,/* complain_on_overflow */
248
   bfd_elf_generic_reloc, /* special_function */
249
   "R_ARM_THM_PC8", /* name */
250
   false,     /* partial_inplace */
251
   0x000000ff,    /* src_mask */
252
   0x000000ff,    /* dst_mask */
253
   true),     /* pcrel_offset */
254
255
  HOWTO (R_ARM_BREL_ADJ,  /* type */
256
   1,     /* rightshift */
257
   2,     /* size */
258
   32,      /* bitsize */
259
   false,     /* pc_relative */
260
   0,     /* bitpos */
261
   complain_overflow_signed,/* complain_on_overflow */
262
   bfd_elf_generic_reloc, /* special_function */
263
   "R_ARM_BREL_ADJ",  /* name */
264
   false,     /* partial_inplace */
265
   0xffffffff,    /* src_mask */
266
   0xffffffff,    /* dst_mask */
267
   false),    /* pcrel_offset */
268
269
  HOWTO (R_ARM_TLS_DESC,  /* type */
270
   0,     /* rightshift */
271
   4,     /* size */
272
   32,      /* bitsize */
273
   false,     /* pc_relative */
274
   0,     /* bitpos */
275
   complain_overflow_bitfield,/* complain_on_overflow */
276
   bfd_elf_generic_reloc, /* special_function */
277
   "R_ARM_TLS_DESC",  /* name */
278
   false,     /* partial_inplace */
279
   0xffffffff,    /* src_mask */
280
   0xffffffff,    /* dst_mask */
281
   false),    /* pcrel_offset */
282
283
  HOWTO (R_ARM_THM_SWI8,  /* type */
284
   0,     /* rightshift */
285
   0,     /* size */
286
   0,     /* bitsize */
287
   false,     /* pc_relative */
288
   0,     /* bitpos */
289
   complain_overflow_signed,/* complain_on_overflow */
290
   bfd_elf_generic_reloc, /* special_function */
291
   "R_ARM_SWI8",    /* name */
292
   false,     /* partial_inplace */
293
   0x00000000,    /* src_mask */
294
   0x00000000,    /* dst_mask */
295
   false),    /* pcrel_offset */
296
297
  /* BLX instruction for the ARM.  */
298
  HOWTO (R_ARM_XPC25,   /* type */
299
   2,     /* rightshift */
300
   4,     /* size */
301
   24,      /* bitsize */
302
   true,      /* pc_relative */
303
   0,     /* bitpos */
304
   complain_overflow_signed,/* complain_on_overflow */
305
   bfd_elf_generic_reloc, /* special_function */
306
   "R_ARM_XPC25",   /* name */
307
   false,     /* partial_inplace */
308
   0x00ffffff,    /* src_mask */
309
   0x00ffffff,    /* dst_mask */
310
   true),     /* pcrel_offset */
311
312
  /* BLX instruction for the Thumb.  */
313
  HOWTO (R_ARM_THM_XPC22, /* type */
314
   2,     /* rightshift */
315
   4,     /* size */
316
   24,      /* bitsize */
317
   true,      /* pc_relative */
318
   0,     /* bitpos */
319
   complain_overflow_signed,/* complain_on_overflow */
320
   bfd_elf_generic_reloc, /* special_function */
321
   "R_ARM_THM_XPC22", /* name */
322
   false,     /* partial_inplace */
323
   0x07ff2fff,    /* src_mask */
324
   0x07ff2fff,    /* dst_mask */
325
   true),     /* pcrel_offset */
326
327
  /* Dynamic TLS relocations.  */
328
329
  HOWTO (R_ARM_TLS_DTPMOD32,  /* type */
330
   0,     /* rightshift */
331
   4,     /* size */
332
   32,      /* bitsize */
333
   false,     /* pc_relative */
334
   0,     /* bitpos */
335
   complain_overflow_bitfield,/* complain_on_overflow */
336
   bfd_elf_generic_reloc, /* special_function */
337
   "R_ARM_TLS_DTPMOD32",  /* name */
338
   true,      /* partial_inplace */
339
   0xffffffff,    /* src_mask */
340
   0xffffffff,    /* dst_mask */
341
   false),    /* pcrel_offset */
342
343
  HOWTO (R_ARM_TLS_DTPOFF32,  /* type */
344
   0,     /* rightshift */
345
   4,     /* size */
346
   32,      /* bitsize */
347
   false,     /* pc_relative */
348
   0,     /* bitpos */
349
   complain_overflow_bitfield,/* complain_on_overflow */
350
   bfd_elf_generic_reloc, /* special_function */
351
   "R_ARM_TLS_DTPOFF32",  /* name */
352
   true,      /* partial_inplace */
353
   0xffffffff,    /* src_mask */
354
   0xffffffff,    /* dst_mask */
355
   false),    /* pcrel_offset */
356
357
  HOWTO (R_ARM_TLS_TPOFF32, /* type */
358
   0,     /* rightshift */
359
   4,     /* size */
360
   32,      /* bitsize */
361
   false,     /* pc_relative */
362
   0,     /* bitpos */
363
   complain_overflow_bitfield,/* complain_on_overflow */
364
   bfd_elf_generic_reloc, /* special_function */
365
   "R_ARM_TLS_TPOFF32", /* name */
366
   true,      /* partial_inplace */
367
   0xffffffff,    /* src_mask */
368
   0xffffffff,    /* dst_mask */
369
   false),    /* pcrel_offset */
370
371
  /* Relocs used in ARM Linux */
372
373
  HOWTO (R_ARM_COPY,    /* type */
374
   0,     /* rightshift */
375
   4,     /* size */
376
   32,      /* bitsize */
377
   false,     /* pc_relative */
378
   0,     /* bitpos */
379
   complain_overflow_bitfield,/* complain_on_overflow */
380
   bfd_elf_generic_reloc, /* special_function */
381
   "R_ARM_COPY",    /* name */
382
   true,      /* partial_inplace */
383
   0xffffffff,    /* src_mask */
384
   0xffffffff,    /* dst_mask */
385
   false),    /* pcrel_offset */
386
387
  HOWTO (R_ARM_GLOB_DAT,  /* type */
388
   0,     /* rightshift */
389
   4,     /* size */
390
   32,      /* bitsize */
391
   false,     /* pc_relative */
392
   0,     /* bitpos */
393
   complain_overflow_bitfield,/* complain_on_overflow */
394
   bfd_elf_generic_reloc, /* special_function */
395
   "R_ARM_GLOB_DAT",  /* name */
396
   true,      /* partial_inplace */
397
   0xffffffff,    /* src_mask */
398
   0xffffffff,    /* dst_mask */
399
   false),    /* pcrel_offset */
400
401
  HOWTO (R_ARM_JUMP_SLOT, /* type */
402
   0,     /* rightshift */
403
   4,     /* size */
404
   32,      /* bitsize */
405
   false,     /* pc_relative */
406
   0,     /* bitpos */
407
   complain_overflow_bitfield,/* complain_on_overflow */
408
   bfd_elf_generic_reloc, /* special_function */
409
   "R_ARM_JUMP_SLOT", /* name */
410
   true,      /* partial_inplace */
411
   0xffffffff,    /* src_mask */
412
   0xffffffff,    /* dst_mask */
413
   false),    /* pcrel_offset */
414
415
  HOWTO (R_ARM_RELATIVE,  /* type */
416
   0,     /* rightshift */
417
   4,     /* size */
418
   32,      /* bitsize */
419
   false,     /* pc_relative */
420
   0,     /* bitpos */
421
   complain_overflow_bitfield,/* complain_on_overflow */
422
   bfd_elf_generic_reloc, /* special_function */
423
   "R_ARM_RELATIVE",  /* name */
424
   true,      /* partial_inplace */
425
   0xffffffff,    /* src_mask */
426
   0xffffffff,    /* dst_mask */
427
   false),    /* pcrel_offset */
428
429
  HOWTO (R_ARM_GOTOFF32,  /* type */
430
   0,     /* rightshift */
431
   4,     /* size */
432
   32,      /* bitsize */
433
   false,     /* pc_relative */
434
   0,     /* bitpos */
435
   complain_overflow_bitfield,/* complain_on_overflow */
436
   bfd_elf_generic_reloc, /* special_function */
437
   "R_ARM_GOTOFF32",  /* name */
438
   true,      /* partial_inplace */
439
   0xffffffff,    /* src_mask */
440
   0xffffffff,    /* dst_mask */
441
   false),    /* pcrel_offset */
442
443
  HOWTO (R_ARM_GOTPC,   /* type */
444
   0,     /* rightshift */
445
   4,     /* size */
446
   32,      /* bitsize */
447
   true,      /* pc_relative */
448
   0,     /* bitpos */
449
   complain_overflow_bitfield,/* complain_on_overflow */
450
   bfd_elf_generic_reloc, /* special_function */
451
   "R_ARM_GOTPC",   /* name */
452
   true,      /* partial_inplace */
453
   0xffffffff,    /* src_mask */
454
   0xffffffff,    /* dst_mask */
455
   true),     /* pcrel_offset */
456
457
  HOWTO (R_ARM_GOT32,   /* type */
458
   0,     /* rightshift */
459
   4,     /* size */
460
   32,      /* bitsize */
461
   false,     /* pc_relative */
462
   0,     /* bitpos */
463
   complain_overflow_bitfield,/* complain_on_overflow */
464
   bfd_elf_generic_reloc, /* special_function */
465
   "R_ARM_GOT32",   /* name */
466
   true,      /* partial_inplace */
467
   0xffffffff,    /* src_mask */
468
   0xffffffff,    /* dst_mask */
469
   false),    /* pcrel_offset */
470
471
  HOWTO (R_ARM_PLT32,   /* type */
472
   2,     /* rightshift */
473
   4,     /* size */
474
   24,      /* bitsize */
475
   true,      /* pc_relative */
476
   0,     /* bitpos */
477
   complain_overflow_bitfield,/* complain_on_overflow */
478
   bfd_elf_generic_reloc, /* special_function */
479
   "R_ARM_PLT32",   /* name */
480
   false,     /* partial_inplace */
481
   0x00ffffff,    /* src_mask */
482
   0x00ffffff,    /* dst_mask */
483
   true),     /* pcrel_offset */
484
485
  HOWTO (R_ARM_CALL,    /* type */
486
   2,     /* rightshift */
487
   4,     /* size */
488
   24,      /* bitsize */
489
   true,      /* pc_relative */
490
   0,     /* bitpos */
491
   complain_overflow_signed,/* complain_on_overflow */
492
   bfd_elf_generic_reloc, /* special_function */
493
   "R_ARM_CALL",    /* name */
494
   false,     /* partial_inplace */
495
   0x00ffffff,    /* src_mask */
496
   0x00ffffff,    /* dst_mask */
497
   true),     /* pcrel_offset */
498
499
  HOWTO (R_ARM_JUMP24,    /* type */
500
   2,     /* rightshift */
501
   4,     /* size */
502
   24,      /* bitsize */
503
   true,      /* pc_relative */
504
   0,     /* bitpos */
505
   complain_overflow_signed,/* complain_on_overflow */
506
   bfd_elf_generic_reloc, /* special_function */
507
   "R_ARM_JUMP24",  /* name */
508
   false,     /* partial_inplace */
509
   0x00ffffff,    /* src_mask */
510
   0x00ffffff,    /* dst_mask */
511
   true),     /* pcrel_offset */
512
513
  HOWTO (R_ARM_THM_JUMP24,  /* type */
514
   1,     /* rightshift */
515
   4,     /* size */
516
   24,      /* bitsize */
517
   true,      /* pc_relative */
518
   0,     /* bitpos */
519
   complain_overflow_signed,/* complain_on_overflow */
520
   bfd_elf_generic_reloc, /* special_function */
521
   "R_ARM_THM_JUMP24",  /* name */
522
   false,     /* partial_inplace */
523
   0x07ff2fff,    /* src_mask */
524
   0x07ff2fff,    /* dst_mask */
525
   true),     /* pcrel_offset */
526
527
  HOWTO (R_ARM_BASE_ABS,  /* type */
528
   0,     /* rightshift */
529
   4,     /* size */
530
   32,      /* bitsize */
531
   false,     /* pc_relative */
532
   0,     /* bitpos */
533
   complain_overflow_dont,/* complain_on_overflow */
534
   bfd_elf_generic_reloc, /* special_function */
535
   "R_ARM_BASE_ABS",  /* name */
536
   false,     /* partial_inplace */
537
   0xffffffff,    /* src_mask */
538
   0xffffffff,    /* dst_mask */
539
   false),    /* pcrel_offset */
540
541
  HOWTO (R_ARM_ALU_PCREL7_0,  /* type */
542
   0,     /* rightshift */
543
   4,     /* size */
544
   12,      /* bitsize */
545
   true,      /* pc_relative */
546
   0,     /* bitpos */
547
   complain_overflow_dont,/* complain_on_overflow */
548
   bfd_elf_generic_reloc, /* special_function */
549
   "R_ARM_ALU_PCREL_7_0", /* name */
550
   false,     /* partial_inplace */
551
   0x00000fff,    /* src_mask */
552
   0x00000fff,    /* dst_mask */
553
   true),     /* pcrel_offset */
554
555
  HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556
   0,     /* rightshift */
557
   4,     /* size */
558
   12,      /* bitsize */
559
   true,      /* pc_relative */
560
   8,     /* bitpos */
561
   complain_overflow_dont,/* complain_on_overflow */
562
   bfd_elf_generic_reloc, /* special_function */
563
   "R_ARM_ALU_PCREL_15_8",/* name */
564
   false,     /* partial_inplace */
565
   0x00000fff,    /* src_mask */
566
   0x00000fff,    /* dst_mask */
567
   true),     /* pcrel_offset */
568
569
  HOWTO (R_ARM_ALU_PCREL23_15,  /* type */
570
   0,     /* rightshift */
571
   4,     /* size */
572
   12,      /* bitsize */
573
   true,      /* pc_relative */
574
   16,      /* bitpos */
575
   complain_overflow_dont,/* complain_on_overflow */
576
   bfd_elf_generic_reloc, /* special_function */
577
   "R_ARM_ALU_PCREL_23_15",/* name */
578
   false,     /* partial_inplace */
579
   0x00000fff,    /* src_mask */
580
   0x00000fff,    /* dst_mask */
581
   true),     /* pcrel_offset */
582
583
  HOWTO (R_ARM_LDR_SBREL_11_0,  /* type */
584
   0,     /* rightshift */
585
   4,     /* size */
586
   12,      /* bitsize */
587
   false,     /* pc_relative */
588
   0,     /* bitpos */
589
   complain_overflow_dont,/* complain_on_overflow */
590
   bfd_elf_generic_reloc, /* special_function */
591
   "R_ARM_LDR_SBREL_11_0",/* name */
592
   false,     /* partial_inplace */
593
   0x00000fff,    /* src_mask */
594
   0x00000fff,    /* dst_mask */
595
   false),    /* pcrel_offset */
596
597
  HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598
   0,     /* rightshift */
599
   4,     /* size */
600
   8,     /* bitsize */
601
   false,     /* pc_relative */
602
   12,      /* bitpos */
603
   complain_overflow_dont,/* complain_on_overflow */
604
   bfd_elf_generic_reloc, /* special_function */
605
   "R_ARM_ALU_SBREL_19_12",/* name */
606
   false,     /* partial_inplace */
607
   0x000ff000,    /* src_mask */
608
   0x000ff000,    /* dst_mask */
609
   false),    /* pcrel_offset */
610
611
  HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612
   0,     /* rightshift */
613
   4,     /* size */
614
   8,     /* bitsize */
615
   false,     /* pc_relative */
616
   20,      /* bitpos */
617
   complain_overflow_dont,/* complain_on_overflow */
618
   bfd_elf_generic_reloc, /* special_function */
619
   "R_ARM_ALU_SBREL_27_20",/* name */
620
   false,     /* partial_inplace */
621
   0x0ff00000,    /* src_mask */
622
   0x0ff00000,    /* dst_mask */
623
   false),    /* pcrel_offset */
624
625
  HOWTO (R_ARM_TARGET1,   /* type */
626
   0,     /* rightshift */
627
   4,     /* size */
628
   32,      /* bitsize */
629
   false,     /* pc_relative */
630
   0,     /* bitpos */
631
   complain_overflow_dont,/* complain_on_overflow */
632
   bfd_elf_generic_reloc, /* special_function */
633
   "R_ARM_TARGET1", /* name */
634
   false,     /* partial_inplace */
635
   0xffffffff,    /* src_mask */
636
   0xffffffff,    /* dst_mask */
637
   false),    /* pcrel_offset */
638
639
  HOWTO (R_ARM_ROSEGREL32,  /* type */
640
   0,     /* rightshift */
641
   4,     /* size */
642
   32,      /* bitsize */
643
   false,     /* pc_relative */
644
   0,     /* bitpos */
645
   complain_overflow_dont,/* complain_on_overflow */
646
   bfd_elf_generic_reloc, /* special_function */
647
   "R_ARM_ROSEGREL32",  /* name */
648
   false,     /* partial_inplace */
649
   0xffffffff,    /* src_mask */
650
   0xffffffff,    /* dst_mask */
651
   false),    /* pcrel_offset */
652
653
  HOWTO (R_ARM_V4BX,    /* type */
654
   0,     /* rightshift */
655
   4,     /* size */
656
   32,      /* bitsize */
657
   false,     /* pc_relative */
658
   0,     /* bitpos */
659
   complain_overflow_dont,/* complain_on_overflow */
660
   bfd_elf_generic_reloc, /* special_function */
661
   "R_ARM_V4BX",    /* name */
662
   false,     /* partial_inplace */
663
   0xffffffff,    /* src_mask */
664
   0xffffffff,    /* dst_mask */
665
   false),    /* pcrel_offset */
666
667
  HOWTO (R_ARM_TARGET2,   /* type */
668
   0,     /* rightshift */
669
   4,     /* size */
670
   32,      /* bitsize */
671
   false,     /* pc_relative */
672
   0,     /* bitpos */
673
   complain_overflow_signed,/* complain_on_overflow */
674
   bfd_elf_generic_reloc, /* special_function */
675
   "R_ARM_TARGET2", /* name */
676
   false,     /* partial_inplace */
677
   0xffffffff,    /* src_mask */
678
   0xffffffff,    /* dst_mask */
679
   true),     /* pcrel_offset */
680
681
  HOWTO (R_ARM_PREL31,    /* type */
682
   0,     /* rightshift */
683
   4,     /* size */
684
   31,      /* bitsize */
685
   true,      /* pc_relative */
686
   0,     /* bitpos */
687
   complain_overflow_signed,/* complain_on_overflow */
688
   bfd_elf_generic_reloc, /* special_function */
689
   "R_ARM_PREL31",  /* name */
690
   false,     /* partial_inplace */
691
   0x7fffffff,    /* src_mask */
692
   0x7fffffff,    /* dst_mask */
693
   true),     /* pcrel_offset */
694
695
  HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696
   0,     /* rightshift */
697
   4,     /* size */
698
   16,      /* bitsize */
699
   false,     /* pc_relative */
700
   0,     /* bitpos */
701
   complain_overflow_dont,/* complain_on_overflow */
702
   bfd_elf_generic_reloc, /* special_function */
703
   "R_ARM_MOVW_ABS_NC", /* name */
704
   false,     /* partial_inplace */
705
   0x000f0fff,    /* src_mask */
706
   0x000f0fff,    /* dst_mask */
707
   false),    /* pcrel_offset */
708
709
  HOWTO (R_ARM_MOVT_ABS,  /* type */
710
   0,     /* rightshift */
711
   4,     /* size */
712
   16,      /* bitsize */
713
   false,     /* pc_relative */
714
   0,     /* bitpos */
715
   complain_overflow_bitfield,/* complain_on_overflow */
716
   bfd_elf_generic_reloc, /* special_function */
717
   "R_ARM_MOVT_ABS",  /* name */
718
   false,     /* partial_inplace */
719
   0x000f0fff,    /* src_mask */
720
   0x000f0fff,    /* dst_mask */
721
   false),    /* pcrel_offset */
722
723
  HOWTO (R_ARM_MOVW_PREL_NC,  /* type */
724
   0,     /* rightshift */
725
   4,     /* size */
726
   16,      /* bitsize */
727
   true,      /* pc_relative */
728
   0,     /* bitpos */
729
   complain_overflow_dont,/* complain_on_overflow */
730
   bfd_elf_generic_reloc, /* special_function */
731
   "R_ARM_MOVW_PREL_NC",  /* name */
732
   false,     /* partial_inplace */
733
   0x000f0fff,    /* src_mask */
734
   0x000f0fff,    /* dst_mask */
735
   true),     /* pcrel_offset */
736
737
  HOWTO (R_ARM_MOVT_PREL, /* type */
738
   0,     /* rightshift */
739
   4,     /* size */
740
   16,      /* bitsize */
741
   true,      /* pc_relative */
742
   0,     /* bitpos */
743
   complain_overflow_bitfield,/* complain_on_overflow */
744
   bfd_elf_generic_reloc, /* special_function */
745
   "R_ARM_MOVT_PREL", /* name */
746
   false,     /* partial_inplace */
747
   0x000f0fff,    /* src_mask */
748
   0x000f0fff,    /* dst_mask */
749
   true),     /* pcrel_offset */
750
751
  HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752
   0,     /* rightshift */
753
   4,     /* size */
754
   16,      /* bitsize */
755
   false,     /* pc_relative */
756
   0,     /* bitpos */
757
   complain_overflow_dont,/* complain_on_overflow */
758
   bfd_elf_generic_reloc, /* special_function */
759
   "R_ARM_THM_MOVW_ABS_NC",/* name */
760
   false,     /* partial_inplace */
761
   0x040f70ff,    /* src_mask */
762
   0x040f70ff,    /* dst_mask */
763
   false),    /* pcrel_offset */
764
765
  HOWTO (R_ARM_THM_MOVT_ABS,  /* type */
766
   0,     /* rightshift */
767
   4,     /* size */
768
   16,      /* bitsize */
769
   false,     /* pc_relative */
770
   0,     /* bitpos */
771
   complain_overflow_bitfield,/* complain_on_overflow */
772
   bfd_elf_generic_reloc, /* special_function */
773
   "R_ARM_THM_MOVT_ABS",  /* name */
774
   false,     /* partial_inplace */
775
   0x040f70ff,    /* src_mask */
776
   0x040f70ff,    /* dst_mask */
777
   false),    /* pcrel_offset */
778
779
  HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780
   0,     /* rightshift */
781
   4,     /* size */
782
   16,      /* bitsize */
783
   true,      /* pc_relative */
784
   0,     /* bitpos */
785
   complain_overflow_dont,/* complain_on_overflow */
786
   bfd_elf_generic_reloc, /* special_function */
787
   "R_ARM_THM_MOVW_PREL_NC",/* name */
788
   false,     /* partial_inplace */
789
   0x040f70ff,    /* src_mask */
790
   0x040f70ff,    /* dst_mask */
791
   true),     /* pcrel_offset */
792
793
  HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794
   0,     /* rightshift */
795
   4,     /* size */
796
   16,      /* bitsize */
797
   true,      /* pc_relative */
798
   0,     /* bitpos */
799
   complain_overflow_bitfield,/* complain_on_overflow */
800
   bfd_elf_generic_reloc, /* special_function */
801
   "R_ARM_THM_MOVT_PREL", /* name */
802
   false,     /* partial_inplace */
803
   0x040f70ff,    /* src_mask */
804
   0x040f70ff,    /* dst_mask */
805
   true),     /* pcrel_offset */
806
807
  HOWTO (R_ARM_THM_JUMP19,  /* type */
808
   1,     /* rightshift */
809
   4,     /* size */
810
   19,      /* bitsize */
811
   true,      /* pc_relative */
812
   0,     /* bitpos */
813
   complain_overflow_signed,/* complain_on_overflow */
814
   bfd_elf_generic_reloc, /* special_function */
815
   "R_ARM_THM_JUMP19",  /* name */
816
   false,     /* partial_inplace */
817
   0x043f2fff,    /* src_mask */
818
   0x043f2fff,    /* dst_mask */
819
   true),     /* pcrel_offset */
820
821
  HOWTO (R_ARM_THM_JUMP6, /* type */
822
   1,     /* rightshift */
823
   2,     /* size */
824
   6,     /* bitsize */
825
   true,      /* pc_relative */
826
   0,     /* bitpos */
827
   complain_overflow_unsigned,/* complain_on_overflow */
828
   bfd_elf_generic_reloc, /* special_function */
829
   "R_ARM_THM_JUMP6", /* name */
830
   false,     /* partial_inplace */
831
   0x02f8,    /* src_mask */
832
   0x02f8,    /* dst_mask */
833
   true),     /* pcrel_offset */
834
835
  /* These are declared as 13-bit signed relocations because we can
836
     address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837
     versa.  */
838
  HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839
   0,     /* rightshift */
840
   4,     /* size */
841
   13,      /* bitsize */
842
   true,      /* pc_relative */
843
   0,     /* bitpos */
844
   complain_overflow_dont,/* complain_on_overflow */
845
   bfd_elf_generic_reloc, /* special_function */
846
   "R_ARM_THM_ALU_PREL_11_0",/* name */
847
   false,     /* partial_inplace */
848
   0xffffffff,    /* src_mask */
849
   0xffffffff,    /* dst_mask */
850
   true),     /* pcrel_offset */
851
852
  HOWTO (R_ARM_THM_PC12,  /* type */
853
   0,     /* rightshift */
854
   4,     /* size */
855
   13,      /* bitsize */
856
   true,      /* pc_relative */
857
   0,     /* bitpos */
858
   complain_overflow_dont,/* complain_on_overflow */
859
   bfd_elf_generic_reloc, /* special_function */
860
   "R_ARM_THM_PC12",  /* name */
861
   false,     /* partial_inplace */
862
   0xffffffff,    /* src_mask */
863
   0xffffffff,    /* dst_mask */
864
   true),     /* pcrel_offset */
865
866
  HOWTO (R_ARM_ABS32_NOI, /* type */
867
   0,     /* rightshift */
868
   4,     /* size */
869
   32,      /* bitsize */
870
   false,     /* pc_relative */
871
   0,     /* bitpos */
872
   complain_overflow_dont,/* complain_on_overflow */
873
   bfd_elf_generic_reloc, /* special_function */
874
   "R_ARM_ABS32_NOI", /* name */
875
   false,     /* partial_inplace */
876
   0xffffffff,    /* src_mask */
877
   0xffffffff,    /* dst_mask */
878
   false),    /* pcrel_offset */
879
880
  HOWTO (R_ARM_REL32_NOI, /* type */
881
   0,     /* rightshift */
882
   4,     /* size */
883
   32,      /* bitsize */
884
   true,      /* pc_relative */
885
   0,     /* bitpos */
886
   complain_overflow_dont,/* complain_on_overflow */
887
   bfd_elf_generic_reloc, /* special_function */
888
   "R_ARM_REL32_NOI", /* name */
889
   false,     /* partial_inplace */
890
   0xffffffff,    /* src_mask */
891
   0xffffffff,    /* dst_mask */
892
   false),    /* pcrel_offset */
893
894
  /* Group relocations.  */
895
896
  HOWTO (R_ARM_ALU_PC_G0_NC,  /* type */
897
   0,     /* rightshift */
898
   4,     /* size */
899
   32,      /* bitsize */
900
   true,      /* pc_relative */
901
   0,     /* bitpos */
902
   complain_overflow_dont,/* complain_on_overflow */
903
   bfd_elf_generic_reloc, /* special_function */
904
   "R_ARM_ALU_PC_G0_NC",  /* name */
905
   false,     /* partial_inplace */
906
   0xffffffff,    /* src_mask */
907
   0xffffffff,    /* dst_mask */
908
   true),     /* pcrel_offset */
909
910
  HOWTO (R_ARM_ALU_PC_G0, /* type */
911
   0,     /* rightshift */
912
   4,     /* size */
913
   32,      /* bitsize */
914
   true,      /* pc_relative */
915
   0,     /* bitpos */
916
   complain_overflow_dont,/* complain_on_overflow */
917
   bfd_elf_generic_reloc, /* special_function */
918
   "R_ARM_ALU_PC_G0", /* name */
919
   false,     /* partial_inplace */
920
   0xffffffff,    /* src_mask */
921
   0xffffffff,    /* dst_mask */
922
   true),     /* pcrel_offset */
923
924
  HOWTO (R_ARM_ALU_PC_G1_NC,  /* type */
925
   0,     /* rightshift */
926
   4,     /* size */
927
   32,      /* bitsize */
928
   true,      /* pc_relative */
929
   0,     /* bitpos */
930
   complain_overflow_dont,/* complain_on_overflow */
931
   bfd_elf_generic_reloc, /* special_function */
932
   "R_ARM_ALU_PC_G1_NC",  /* name */
933
   false,     /* partial_inplace */
934
   0xffffffff,    /* src_mask */
935
   0xffffffff,    /* dst_mask */
936
   true),     /* pcrel_offset */
937
938
  HOWTO (R_ARM_ALU_PC_G1, /* type */
939
   0,     /* rightshift */
940
   4,     /* size */
941
   32,      /* bitsize */
942
   true,      /* pc_relative */
943
   0,     /* bitpos */
944
   complain_overflow_dont,/* complain_on_overflow */
945
   bfd_elf_generic_reloc, /* special_function */
946
   "R_ARM_ALU_PC_G1", /* name */
947
   false,     /* partial_inplace */
948
   0xffffffff,    /* src_mask */
949
   0xffffffff,    /* dst_mask */
950
   true),     /* pcrel_offset */
951
952
  HOWTO (R_ARM_ALU_PC_G2, /* type */
953
   0,     /* rightshift */
954
   4,     /* size */
955
   32,      /* bitsize */
956
   true,      /* pc_relative */
957
   0,     /* bitpos */
958
   complain_overflow_dont,/* complain_on_overflow */
959
   bfd_elf_generic_reloc, /* special_function */
960
   "R_ARM_ALU_PC_G2", /* name */
961
   false,     /* partial_inplace */
962
   0xffffffff,    /* src_mask */
963
   0xffffffff,    /* dst_mask */
964
   true),     /* pcrel_offset */
965
966
  HOWTO (R_ARM_LDR_PC_G1, /* type */
967
   0,     /* rightshift */
968
   4,     /* size */
969
   32,      /* bitsize */
970
   true,      /* pc_relative */
971
   0,     /* bitpos */
972
   complain_overflow_dont,/* complain_on_overflow */
973
   bfd_elf_generic_reloc, /* special_function */
974
   "R_ARM_LDR_PC_G1", /* name */
975
   false,     /* partial_inplace */
976
   0xffffffff,    /* src_mask */
977
   0xffffffff,    /* dst_mask */
978
   true),     /* pcrel_offset */
979
980
  HOWTO (R_ARM_LDR_PC_G2, /* type */
981
   0,     /* rightshift */
982
   4,     /* size */
983
   32,      /* bitsize */
984
   true,      /* pc_relative */
985
   0,     /* bitpos */
986
   complain_overflow_dont,/* complain_on_overflow */
987
   bfd_elf_generic_reloc, /* special_function */
988
   "R_ARM_LDR_PC_G2", /* name */
989
   false,     /* partial_inplace */
990
   0xffffffff,    /* src_mask */
991
   0xffffffff,    /* dst_mask */
992
   true),     /* pcrel_offset */
993
994
  HOWTO (R_ARM_LDRS_PC_G0,  /* type */
995
   0,     /* rightshift */
996
   4,     /* size */
997
   32,      /* bitsize */
998
   true,      /* pc_relative */
999
   0,     /* bitpos */
1000
   complain_overflow_dont,/* complain_on_overflow */
1001
   bfd_elf_generic_reloc, /* special_function */
1002
   "R_ARM_LDRS_PC_G0",  /* name */
1003
   false,     /* partial_inplace */
1004
   0xffffffff,    /* src_mask */
1005
   0xffffffff,    /* dst_mask */
1006
   true),     /* pcrel_offset */
1007
1008
  HOWTO (R_ARM_LDRS_PC_G1,  /* type */
1009
   0,     /* rightshift */
1010
   4,     /* size */
1011
   32,      /* bitsize */
1012
   true,      /* pc_relative */
1013
   0,     /* bitpos */
1014
   complain_overflow_dont,/* complain_on_overflow */
1015
   bfd_elf_generic_reloc, /* special_function */
1016
   "R_ARM_LDRS_PC_G1",  /* name */
1017
   false,     /* partial_inplace */
1018
   0xffffffff,    /* src_mask */
1019
   0xffffffff,    /* dst_mask */
1020
   true),     /* pcrel_offset */
1021
1022
  HOWTO (R_ARM_LDRS_PC_G2,  /* type */
1023
   0,     /* rightshift */
1024
   4,     /* size */
1025
   32,      /* bitsize */
1026
   true,      /* pc_relative */
1027
   0,     /* bitpos */
1028
   complain_overflow_dont,/* complain_on_overflow */
1029
   bfd_elf_generic_reloc, /* special_function */
1030
   "R_ARM_LDRS_PC_G2",  /* name */
1031
   false,     /* partial_inplace */
1032
   0xffffffff,    /* src_mask */
1033
   0xffffffff,    /* dst_mask */
1034
   true),     /* pcrel_offset */
1035
1036
  HOWTO (R_ARM_LDC_PC_G0, /* type */
1037
   0,     /* rightshift */
1038
   4,     /* size */
1039
   32,      /* bitsize */
1040
   true,      /* pc_relative */
1041
   0,     /* bitpos */
1042
   complain_overflow_dont,/* complain_on_overflow */
1043
   bfd_elf_generic_reloc, /* special_function */
1044
   "R_ARM_LDC_PC_G0", /* name */
1045
   false,     /* partial_inplace */
1046
   0xffffffff,    /* src_mask */
1047
   0xffffffff,    /* dst_mask */
1048
   true),     /* pcrel_offset */
1049
1050
  HOWTO (R_ARM_LDC_PC_G1, /* type */
1051
   0,     /* rightshift */
1052
   4,     /* size */
1053
   32,      /* bitsize */
1054
   true,      /* pc_relative */
1055
   0,     /* bitpos */
1056
   complain_overflow_dont,/* complain_on_overflow */
1057
   bfd_elf_generic_reloc, /* special_function */
1058
   "R_ARM_LDC_PC_G1", /* name */
1059
   false,     /* partial_inplace */
1060
   0xffffffff,    /* src_mask */
1061
   0xffffffff,    /* dst_mask */
1062
   true),     /* pcrel_offset */
1063
1064
  HOWTO (R_ARM_LDC_PC_G2, /* type */
1065
   0,     /* rightshift */
1066
   4,     /* size */
1067
   32,      /* bitsize */
1068
   true,      /* pc_relative */
1069
   0,     /* bitpos */
1070
   complain_overflow_dont,/* complain_on_overflow */
1071
   bfd_elf_generic_reloc, /* special_function */
1072
   "R_ARM_LDC_PC_G2", /* name */
1073
   false,     /* partial_inplace */
1074
   0xffffffff,    /* src_mask */
1075
   0xffffffff,    /* dst_mask */
1076
   true),     /* pcrel_offset */
1077
1078
  HOWTO (R_ARM_ALU_SB_G0_NC,  /* type */
1079
   0,     /* rightshift */
1080
   4,     /* size */
1081
   32,      /* bitsize */
1082
   true,      /* pc_relative */
1083
   0,     /* bitpos */
1084
   complain_overflow_dont,/* complain_on_overflow */
1085
   bfd_elf_generic_reloc, /* special_function */
1086
   "R_ARM_ALU_SB_G0_NC",  /* name */
1087
   false,     /* partial_inplace */
1088
   0xffffffff,    /* src_mask */
1089
   0xffffffff,    /* dst_mask */
1090
   true),     /* pcrel_offset */
1091
1092
  HOWTO (R_ARM_ALU_SB_G0, /* type */
1093
   0,     /* rightshift */
1094
   4,     /* size */
1095
   32,      /* bitsize */
1096
   true,      /* pc_relative */
1097
   0,     /* bitpos */
1098
   complain_overflow_dont,/* complain_on_overflow */
1099
   bfd_elf_generic_reloc, /* special_function */
1100
   "R_ARM_ALU_SB_G0", /* name */
1101
   false,     /* partial_inplace */
1102
   0xffffffff,    /* src_mask */
1103
   0xffffffff,    /* dst_mask */
1104
   true),     /* pcrel_offset */
1105
1106
  HOWTO (R_ARM_ALU_SB_G1_NC,  /* type */
1107
   0,     /* rightshift */
1108
   4,     /* size */
1109
   32,      /* bitsize */
1110
   true,      /* pc_relative */
1111
   0,     /* bitpos */
1112
   complain_overflow_dont,/* complain_on_overflow */
1113
   bfd_elf_generic_reloc, /* special_function */
1114
   "R_ARM_ALU_SB_G1_NC",  /* name */
1115
   false,     /* partial_inplace */
1116
   0xffffffff,    /* src_mask */
1117
   0xffffffff,    /* dst_mask */
1118
   true),     /* pcrel_offset */
1119
1120
  HOWTO (R_ARM_ALU_SB_G1, /* type */
1121
   0,     /* rightshift */
1122
   4,     /* size */
1123
   32,      /* bitsize */
1124
   true,      /* pc_relative */
1125
   0,     /* bitpos */
1126
   complain_overflow_dont,/* complain_on_overflow */
1127
   bfd_elf_generic_reloc, /* special_function */
1128
   "R_ARM_ALU_SB_G1", /* name */
1129
   false,     /* partial_inplace */
1130
   0xffffffff,    /* src_mask */
1131
   0xffffffff,    /* dst_mask */
1132
   true),     /* pcrel_offset */
1133
1134
  HOWTO (R_ARM_ALU_SB_G2, /* type */
1135
   0,     /* rightshift */
1136
   4,     /* size */
1137
   32,      /* bitsize */
1138
   true,      /* pc_relative */
1139
   0,     /* bitpos */
1140
   complain_overflow_dont,/* complain_on_overflow */
1141
   bfd_elf_generic_reloc, /* special_function */
1142
   "R_ARM_ALU_SB_G2", /* name */
1143
   false,     /* partial_inplace */
1144
   0xffffffff,    /* src_mask */
1145
   0xffffffff,    /* dst_mask */
1146
   true),     /* pcrel_offset */
1147
1148
  HOWTO (R_ARM_LDR_SB_G0, /* type */
1149
   0,     /* rightshift */
1150
   4,     /* size */
1151
   32,      /* bitsize */
1152
   true,      /* pc_relative */
1153
   0,     /* bitpos */
1154
   complain_overflow_dont,/* complain_on_overflow */
1155
   bfd_elf_generic_reloc, /* special_function */
1156
   "R_ARM_LDR_SB_G0", /* name */
1157
   false,     /* partial_inplace */
1158
   0xffffffff,    /* src_mask */
1159
   0xffffffff,    /* dst_mask */
1160
   true),     /* pcrel_offset */
1161
1162
  HOWTO (R_ARM_LDR_SB_G1, /* type */
1163
   0,     /* rightshift */
1164
   4,     /* size */
1165
   32,      /* bitsize */
1166
   true,      /* pc_relative */
1167
   0,     /* bitpos */
1168
   complain_overflow_dont,/* complain_on_overflow */
1169
   bfd_elf_generic_reloc, /* special_function */
1170
   "R_ARM_LDR_SB_G1", /* name */
1171
   false,     /* partial_inplace */
1172
   0xffffffff,    /* src_mask */
1173
   0xffffffff,    /* dst_mask */
1174
   true),     /* pcrel_offset */
1175
1176
  HOWTO (R_ARM_LDR_SB_G2, /* type */
1177
   0,     /* rightshift */
1178
   4,     /* size */
1179
   32,      /* bitsize */
1180
   true,      /* pc_relative */
1181
   0,     /* bitpos */
1182
   complain_overflow_dont,/* complain_on_overflow */
1183
   bfd_elf_generic_reloc, /* special_function */
1184
   "R_ARM_LDR_SB_G2", /* name */
1185
   false,     /* partial_inplace */
1186
   0xffffffff,    /* src_mask */
1187
   0xffffffff,    /* dst_mask */
1188
   true),     /* pcrel_offset */
1189
1190
  HOWTO (R_ARM_LDRS_SB_G0,  /* type */
1191
   0,     /* rightshift */
1192
   4,     /* size */
1193
   32,      /* bitsize */
1194
   true,      /* pc_relative */
1195
   0,     /* bitpos */
1196
   complain_overflow_dont,/* complain_on_overflow */
1197
   bfd_elf_generic_reloc, /* special_function */
1198
   "R_ARM_LDRS_SB_G0",  /* name */
1199
   false,     /* partial_inplace */
1200
   0xffffffff,    /* src_mask */
1201
   0xffffffff,    /* dst_mask */
1202
   true),     /* pcrel_offset */
1203
1204
  HOWTO (R_ARM_LDRS_SB_G1,  /* type */
1205
   0,     /* rightshift */
1206
   4,     /* size */
1207
   32,      /* bitsize */
1208
   true,      /* pc_relative */
1209
   0,     /* bitpos */
1210
   complain_overflow_dont,/* complain_on_overflow */
1211
   bfd_elf_generic_reloc, /* special_function */
1212
   "R_ARM_LDRS_SB_G1",  /* name */
1213
   false,     /* partial_inplace */
1214
   0xffffffff,    /* src_mask */
1215
   0xffffffff,    /* dst_mask */
1216
   true),     /* pcrel_offset */
1217
1218
  HOWTO (R_ARM_LDRS_SB_G2,  /* type */
1219
   0,     /* rightshift */
1220
   4,     /* size */
1221
   32,      /* bitsize */
1222
   true,      /* pc_relative */
1223
   0,     /* bitpos */
1224
   complain_overflow_dont,/* complain_on_overflow */
1225
   bfd_elf_generic_reloc, /* special_function */
1226
   "R_ARM_LDRS_SB_G2",  /* name */
1227
   false,     /* partial_inplace */
1228
   0xffffffff,    /* src_mask */
1229
   0xffffffff,    /* dst_mask */
1230
   true),     /* pcrel_offset */
1231
1232
  HOWTO (R_ARM_LDC_SB_G0, /* type */
1233
   0,     /* rightshift */
1234
   4,     /* size */
1235
   32,      /* bitsize */
1236
   true,      /* pc_relative */
1237
   0,     /* bitpos */
1238
   complain_overflow_dont,/* complain_on_overflow */
1239
   bfd_elf_generic_reloc, /* special_function */
1240
   "R_ARM_LDC_SB_G0", /* name */
1241
   false,     /* partial_inplace */
1242
   0xffffffff,    /* src_mask */
1243
   0xffffffff,    /* dst_mask */
1244
   true),     /* pcrel_offset */
1245
1246
  HOWTO (R_ARM_LDC_SB_G1, /* type */
1247
   0,     /* rightshift */
1248
   4,     /* size */
1249
   32,      /* bitsize */
1250
   true,      /* pc_relative */
1251
   0,     /* bitpos */
1252
   complain_overflow_dont,/* complain_on_overflow */
1253
   bfd_elf_generic_reloc, /* special_function */
1254
   "R_ARM_LDC_SB_G1", /* name */
1255
   false,     /* partial_inplace */
1256
   0xffffffff,    /* src_mask */
1257
   0xffffffff,    /* dst_mask */
1258
   true),     /* pcrel_offset */
1259
1260
  HOWTO (R_ARM_LDC_SB_G2, /* type */
1261
   0,     /* rightshift */
1262
   4,     /* size */
1263
   32,      /* bitsize */
1264
   true,      /* pc_relative */
1265
   0,     /* bitpos */
1266
   complain_overflow_dont,/* complain_on_overflow */
1267
   bfd_elf_generic_reloc, /* special_function */
1268
   "R_ARM_LDC_SB_G2", /* name */
1269
   false,     /* partial_inplace */
1270
   0xffffffff,    /* src_mask */
1271
   0xffffffff,    /* dst_mask */
1272
   true),     /* pcrel_offset */
1273
1274
  /* End of group relocations.  */
1275
1276
  HOWTO (R_ARM_MOVW_BREL_NC,  /* type */
1277
   0,     /* rightshift */
1278
   4,     /* size */
1279
   16,      /* bitsize */
1280
   false,     /* pc_relative */
1281
   0,     /* bitpos */
1282
   complain_overflow_dont,/* complain_on_overflow */
1283
   bfd_elf_generic_reloc, /* special_function */
1284
   "R_ARM_MOVW_BREL_NC",  /* name */
1285
   false,     /* partial_inplace */
1286
   0x0000ffff,    /* src_mask */
1287
   0x0000ffff,    /* dst_mask */
1288
   false),    /* pcrel_offset */
1289
1290
  HOWTO (R_ARM_MOVT_BREL, /* type */
1291
   0,     /* rightshift */
1292
   4,     /* size */
1293
   16,      /* bitsize */
1294
   false,     /* pc_relative */
1295
   0,     /* bitpos */
1296
   complain_overflow_bitfield,/* complain_on_overflow */
1297
   bfd_elf_generic_reloc, /* special_function */
1298
   "R_ARM_MOVT_BREL", /* name */
1299
   false,     /* partial_inplace */
1300
   0x0000ffff,    /* src_mask */
1301
   0x0000ffff,    /* dst_mask */
1302
   false),    /* pcrel_offset */
1303
1304
  HOWTO (R_ARM_MOVW_BREL, /* type */
1305
   0,     /* rightshift */
1306
   4,     /* size */
1307
   16,      /* bitsize */
1308
   false,     /* pc_relative */
1309
   0,     /* bitpos */
1310
   complain_overflow_dont,/* complain_on_overflow */
1311
   bfd_elf_generic_reloc, /* special_function */
1312
   "R_ARM_MOVW_BREL", /* name */
1313
   false,     /* partial_inplace */
1314
   0x0000ffff,    /* src_mask */
1315
   0x0000ffff,    /* dst_mask */
1316
   false),    /* pcrel_offset */
1317
1318
  HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319
   0,     /* rightshift */
1320
   4,     /* size */
1321
   16,      /* bitsize */
1322
   false,     /* pc_relative */
1323
   0,     /* bitpos */
1324
   complain_overflow_dont,/* complain_on_overflow */
1325
   bfd_elf_generic_reloc, /* special_function */
1326
   "R_ARM_THM_MOVW_BREL_NC",/* name */
1327
   false,     /* partial_inplace */
1328
   0x040f70ff,    /* src_mask */
1329
   0x040f70ff,    /* dst_mask */
1330
   false),    /* pcrel_offset */
1331
1332
  HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333
   0,     /* rightshift */
1334
   4,     /* size */
1335
   16,      /* bitsize */
1336
   false,     /* pc_relative */
1337
   0,     /* bitpos */
1338
   complain_overflow_bitfield,/* complain_on_overflow */
1339
   bfd_elf_generic_reloc, /* special_function */
1340
   "R_ARM_THM_MOVT_BREL", /* name */
1341
   false,     /* partial_inplace */
1342
   0x040f70ff,    /* src_mask */
1343
   0x040f70ff,    /* dst_mask */
1344
   false),    /* pcrel_offset */
1345
1346
  HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347
   0,     /* rightshift */
1348
   4,     /* size */
1349
   16,      /* bitsize */
1350
   false,     /* pc_relative */
1351
   0,     /* bitpos */
1352
   complain_overflow_dont,/* complain_on_overflow */
1353
   bfd_elf_generic_reloc, /* special_function */
1354
   "R_ARM_THM_MOVW_BREL", /* name */
1355
   false,     /* partial_inplace */
1356
   0x040f70ff,    /* src_mask */
1357
   0x040f70ff,    /* dst_mask */
1358
   false),    /* pcrel_offset */
1359
1360
  HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361
   0,     /* rightshift */
1362
   4,     /* size */
1363
   32,      /* bitsize */
1364
   false,     /* pc_relative */
1365
   0,     /* bitpos */
1366
   complain_overflow_bitfield,/* complain_on_overflow */
1367
   NULL,      /* special_function */
1368
   "R_ARM_TLS_GOTDESC", /* name */
1369
   true,      /* partial_inplace */
1370
   0xffffffff,    /* src_mask */
1371
   0xffffffff,    /* dst_mask */
1372
   false),    /* pcrel_offset */
1373
1374
  HOWTO (R_ARM_TLS_CALL,  /* type */
1375
   0,     /* rightshift */
1376
   4,     /* size */
1377
   24,      /* bitsize */
1378
   false,     /* pc_relative */
1379
   0,     /* bitpos */
1380
   complain_overflow_dont,/* complain_on_overflow */
1381
   bfd_elf_generic_reloc, /* special_function */
1382
   "R_ARM_TLS_CALL",  /* name */
1383
   false,     /* partial_inplace */
1384
   0x00ffffff,    /* src_mask */
1385
   0x00ffffff,    /* dst_mask */
1386
   false),    /* pcrel_offset */
1387
1388
  HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389
   0,     /* rightshift */
1390
   4,     /* size */
1391
   0,     /* bitsize */
1392
   false,     /* pc_relative */
1393
   0,     /* bitpos */
1394
   complain_overflow_dont,/* complain_on_overflow */
1395
   bfd_elf_generic_reloc, /* special_function */
1396
   "R_ARM_TLS_DESCSEQ", /* name */
1397
   false,     /* partial_inplace */
1398
   0x00000000,    /* src_mask */
1399
   0x00000000,    /* dst_mask */
1400
   false),    /* pcrel_offset */
1401
1402
  HOWTO (R_ARM_THM_TLS_CALL,  /* type */
1403
   0,     /* rightshift */
1404
   4,     /* size */
1405
   24,      /* bitsize */
1406
   false,     /* pc_relative */
1407
   0,     /* bitpos */
1408
   complain_overflow_dont,/* complain_on_overflow */
1409
   bfd_elf_generic_reloc, /* special_function */
1410
   "R_ARM_THM_TLS_CALL",  /* name */
1411
   false,     /* partial_inplace */
1412
   0x07ff07ff,    /* src_mask */
1413
   0x07ff07ff,    /* dst_mask */
1414
   false),    /* pcrel_offset */
1415
1416
  HOWTO (R_ARM_PLT32_ABS, /* type */
1417
   0,     /* rightshift */
1418
   4,     /* size */
1419
   32,      /* bitsize */
1420
   false,     /* pc_relative */
1421
   0,     /* bitpos */
1422
   complain_overflow_dont,/* complain_on_overflow */
1423
   bfd_elf_generic_reloc, /* special_function */
1424
   "R_ARM_PLT32_ABS", /* name */
1425
   false,     /* partial_inplace */
1426
   0xffffffff,    /* src_mask */
1427
   0xffffffff,    /* dst_mask */
1428
   false),    /* pcrel_offset */
1429
1430
  HOWTO (R_ARM_GOT_ABS,   /* type */
1431
   0,     /* rightshift */
1432
   4,     /* size */
1433
   32,      /* bitsize */
1434
   false,     /* pc_relative */
1435
   0,     /* bitpos */
1436
   complain_overflow_dont,/* complain_on_overflow */
1437
   bfd_elf_generic_reloc, /* special_function */
1438
   "R_ARM_GOT_ABS", /* name */
1439
   false,     /* partial_inplace */
1440
   0xffffffff,    /* src_mask */
1441
   0xffffffff,    /* dst_mask */
1442
   false),      /* pcrel_offset */
1443
1444
  HOWTO (R_ARM_GOT_PREL,  /* type */
1445
   0,     /* rightshift */
1446
   4,     /* size */
1447
   32,      /* bitsize */
1448
   true,      /* pc_relative */
1449
   0,     /* bitpos */
1450
   complain_overflow_dont,  /* complain_on_overflow */
1451
   bfd_elf_generic_reloc, /* special_function */
1452
   "R_ARM_GOT_PREL",  /* name */
1453
   false,     /* partial_inplace */
1454
   0xffffffff,    /* src_mask */
1455
   0xffffffff,    /* dst_mask */
1456
   true),     /* pcrel_offset */
1457
1458
  HOWTO (R_ARM_GOT_BREL12,  /* type */
1459
   0,     /* rightshift */
1460
   4,     /* size */
1461
   12,      /* bitsize */
1462
   false,     /* pc_relative */
1463
   0,     /* bitpos */
1464
   complain_overflow_bitfield,/* complain_on_overflow */
1465
   bfd_elf_generic_reloc, /* special_function */
1466
   "R_ARM_GOT_BREL12",  /* name */
1467
   false,     /* partial_inplace */
1468
   0x00000fff,    /* src_mask */
1469
   0x00000fff,    /* dst_mask */
1470
   false),    /* pcrel_offset */
1471
1472
  HOWTO (R_ARM_GOTOFF12,  /* type */
1473
   0,     /* rightshift */
1474
   4,     /* size */
1475
   12,      /* bitsize */
1476
   false,     /* pc_relative */
1477
   0,     /* bitpos */
1478
   complain_overflow_bitfield,/* complain_on_overflow */
1479
   bfd_elf_generic_reloc, /* special_function */
1480
   "R_ARM_GOTOFF12",  /* name */
1481
   false,     /* partial_inplace */
1482
   0x00000fff,    /* src_mask */
1483
   0x00000fff,    /* dst_mask */
1484
   false),    /* pcrel_offset */
1485
1486
  EMPTY_HOWTO (R_ARM_GOTRELAX),  /* reserved for future GOT-load optimizations */
1487
1488
  /* GNU extension to record C++ vtable member usage */
1489
  HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490
   0,     /* rightshift */
1491
   4,     /* size */
1492
   0,     /* bitsize */
1493
   false,     /* pc_relative */
1494
   0,     /* bitpos */
1495
   complain_overflow_dont, /* complain_on_overflow */
1496
   _bfd_elf_rel_vtable_reloc_fn,  /* special_function */
1497
   "R_ARM_GNU_VTENTRY", /* name */
1498
   false,     /* partial_inplace */
1499
   0,     /* src_mask */
1500
   0,     /* dst_mask */
1501
   false),    /* pcrel_offset */
1502
1503
  /* GNU extension to record C++ vtable hierarchy */
1504
  HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505
   0,     /* rightshift */
1506
   4,     /* size */
1507
   0,     /* bitsize */
1508
   false,     /* pc_relative */
1509
   0,     /* bitpos */
1510
   complain_overflow_dont, /* complain_on_overflow */
1511
   NULL,      /* special_function */
1512
   "R_ARM_GNU_VTINHERIT", /* name */
1513
   false,     /* partial_inplace */
1514
   0,     /* src_mask */
1515
   0,     /* dst_mask */
1516
   false),    /* pcrel_offset */
1517
1518
  HOWTO (R_ARM_THM_JUMP11,  /* type */
1519
   1,     /* rightshift */
1520
   2,     /* size */
1521
   11,      /* bitsize */
1522
   true,      /* pc_relative */
1523
   0,     /* bitpos */
1524
   complain_overflow_signed,  /* complain_on_overflow */
1525
   bfd_elf_generic_reloc, /* special_function */
1526
   "R_ARM_THM_JUMP11",  /* name */
1527
   false,     /* partial_inplace */
1528
   0x000007ff,    /* src_mask */
1529
   0x000007ff,    /* dst_mask */
1530
   true),     /* pcrel_offset */
1531
1532
  HOWTO (R_ARM_THM_JUMP8, /* type */
1533
   1,     /* rightshift */
1534
   2,     /* size */
1535
   8,     /* bitsize */
1536
   true,      /* pc_relative */
1537
   0,     /* bitpos */
1538
   complain_overflow_signed,  /* complain_on_overflow */
1539
   bfd_elf_generic_reloc, /* special_function */
1540
   "R_ARM_THM_JUMP8", /* name */
1541
   false,     /* partial_inplace */
1542
   0x000000ff,    /* src_mask */
1543
   0x000000ff,    /* dst_mask */
1544
   true),     /* pcrel_offset */
1545
1546
  /* TLS relocations */
1547
  HOWTO (R_ARM_TLS_GD32,  /* type */
1548
   0,     /* rightshift */
1549
   4,     /* size */
1550
   32,      /* bitsize */
1551
   false,     /* pc_relative */
1552
   0,     /* bitpos */
1553
   complain_overflow_bitfield,/* complain_on_overflow */
1554
   NULL,      /* special_function */
1555
   "R_ARM_TLS_GD32",  /* name */
1556
   true,      /* partial_inplace */
1557
   0xffffffff,    /* src_mask */
1558
   0xffffffff,    /* dst_mask */
1559
   false),    /* pcrel_offset */
1560
1561
  HOWTO (R_ARM_TLS_LDM32, /* type */
1562
   0,     /* rightshift */
1563
   4,     /* size */
1564
   32,      /* bitsize */
1565
   false,     /* pc_relative */
1566
   0,     /* bitpos */
1567
   complain_overflow_bitfield,/* complain_on_overflow */
1568
   bfd_elf_generic_reloc, /* special_function */
1569
   "R_ARM_TLS_LDM32", /* name */
1570
   true,      /* partial_inplace */
1571
   0xffffffff,    /* src_mask */
1572
   0xffffffff,    /* dst_mask */
1573
   false),    /* pcrel_offset */
1574
1575
  HOWTO (R_ARM_TLS_LDO32, /* type */
1576
   0,     /* rightshift */
1577
   4,     /* size */
1578
   32,      /* bitsize */
1579
   false,     /* pc_relative */
1580
   0,     /* bitpos */
1581
   complain_overflow_bitfield,/* complain_on_overflow */
1582
   bfd_elf_generic_reloc, /* special_function */
1583
   "R_ARM_TLS_LDO32", /* name */
1584
   true,      /* partial_inplace */
1585
   0xffffffff,    /* src_mask */
1586
   0xffffffff,    /* dst_mask */
1587
   false),    /* pcrel_offset */
1588
1589
  HOWTO (R_ARM_TLS_IE32,  /* type */
1590
   0,     /* rightshift */
1591
   4,     /* size */
1592
   32,      /* bitsize */
1593
   false,      /* pc_relative */
1594
   0,     /* bitpos */
1595
   complain_overflow_bitfield,/* complain_on_overflow */
1596
   NULL,      /* special_function */
1597
   "R_ARM_TLS_IE32",  /* name */
1598
   true,      /* partial_inplace */
1599
   0xffffffff,    /* src_mask */
1600
   0xffffffff,    /* dst_mask */
1601
   false),    /* pcrel_offset */
1602
1603
  HOWTO (R_ARM_TLS_LE32,  /* type */
1604
   0,     /* rightshift */
1605
   4,     /* size */
1606
   32,      /* bitsize */
1607
   false,     /* pc_relative */
1608
   0,     /* bitpos */
1609
   complain_overflow_bitfield,/* complain_on_overflow */
1610
   NULL,      /* special_function */
1611
   "R_ARM_TLS_LE32",  /* name */
1612
   true,      /* partial_inplace */
1613
   0xffffffff,    /* src_mask */
1614
   0xffffffff,    /* dst_mask */
1615
   false),    /* pcrel_offset */
1616
1617
  HOWTO (R_ARM_TLS_LDO12, /* type */
1618
   0,     /* rightshift */
1619
   4,     /* size */
1620
   12,      /* bitsize */
1621
   false,     /* pc_relative */
1622
   0,     /* bitpos */
1623
   complain_overflow_bitfield,/* complain_on_overflow */
1624
   bfd_elf_generic_reloc, /* special_function */
1625
   "R_ARM_TLS_LDO12", /* name */
1626
   false,     /* partial_inplace */
1627
   0x00000fff,    /* src_mask */
1628
   0x00000fff,    /* dst_mask */
1629
   false),    /* pcrel_offset */
1630
1631
  HOWTO (R_ARM_TLS_LE12,  /* type */
1632
   0,     /* rightshift */
1633
   4,     /* size */
1634
   12,      /* bitsize */
1635
   false,     /* pc_relative */
1636
   0,     /* bitpos */
1637
   complain_overflow_bitfield,/* complain_on_overflow */
1638
   bfd_elf_generic_reloc, /* special_function */
1639
   "R_ARM_TLS_LE12",  /* name */
1640
   false,     /* partial_inplace */
1641
   0x00000fff,    /* src_mask */
1642
   0x00000fff,    /* dst_mask */
1643
   false),    /* pcrel_offset */
1644
1645
  HOWTO (R_ARM_TLS_IE12GP,  /* type */
1646
   0,     /* rightshift */
1647
   4,     /* size */
1648
   12,      /* bitsize */
1649
   false,     /* pc_relative */
1650
   0,     /* bitpos */
1651
   complain_overflow_bitfield,/* complain_on_overflow */
1652
   bfd_elf_generic_reloc, /* special_function */
1653
   "R_ARM_TLS_IE12GP",  /* name */
1654
   false,     /* partial_inplace */
1655
   0x00000fff,    /* src_mask */
1656
   0x00000fff,    /* dst_mask */
1657
   false),    /* pcrel_offset */
1658
1659
  /* 112-127 private relocations.  */
1660
  EMPTY_HOWTO (112),
1661
  EMPTY_HOWTO (113),
1662
  EMPTY_HOWTO (114),
1663
  EMPTY_HOWTO (115),
1664
  EMPTY_HOWTO (116),
1665
  EMPTY_HOWTO (117),
1666
  EMPTY_HOWTO (118),
1667
  EMPTY_HOWTO (119),
1668
  EMPTY_HOWTO (120),
1669
  EMPTY_HOWTO (121),
1670
  EMPTY_HOWTO (122),
1671
  EMPTY_HOWTO (123),
1672
  EMPTY_HOWTO (124),
1673
  EMPTY_HOWTO (125),
1674
  EMPTY_HOWTO (126),
1675
  EMPTY_HOWTO (127),
1676
1677
  /* R_ARM_ME_TOO, obsolete.  */
1678
  EMPTY_HOWTO (128),
1679
1680
  HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681
   0,     /* rightshift */
1682
   2,     /* size */
1683
   0,     /* bitsize */
1684
   false,     /* pc_relative */
1685
   0,     /* bitpos */
1686
   complain_overflow_dont,/* complain_on_overflow */
1687
   bfd_elf_generic_reloc, /* special_function */
1688
   "R_ARM_THM_TLS_DESCSEQ",/* name */
1689
   false,     /* partial_inplace */
1690
   0x00000000,    /* src_mask */
1691
   0x00000000,    /* dst_mask */
1692
   false),    /* pcrel_offset */
1693
  EMPTY_HOWTO (130),
1694
  EMPTY_HOWTO (131),
1695
  HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type.  */
1696
   0,     /* rightshift.  */
1697
   2,     /* size.  */
1698
   16,      /* bitsize.  */
1699
   false,     /* pc_relative.  */
1700
   0,     /* bitpos.  */
1701
   complain_overflow_bitfield,/* complain_on_overflow.  */
1702
   bfd_elf_generic_reloc, /* special_function.  */
1703
   "R_ARM_THM_ALU_ABS_G0_NC",/* name.  */
1704
   false,     /* partial_inplace.  */
1705
   0x00000000,    /* src_mask.  */
1706
   0x00000000,    /* dst_mask.  */
1707
   false),    /* pcrel_offset.  */
1708
  HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type.  */
1709
   0,     /* rightshift.  */
1710
   2,     /* size.  */
1711
   16,      /* bitsize.  */
1712
   false,     /* pc_relative.  */
1713
   0,     /* bitpos.  */
1714
   complain_overflow_bitfield,/* complain_on_overflow.  */
1715
   bfd_elf_generic_reloc, /* special_function.  */
1716
   "R_ARM_THM_ALU_ABS_G1_NC",/* name.  */
1717
   false,     /* partial_inplace.  */
1718
   0x00000000,    /* src_mask.  */
1719
   0x00000000,    /* dst_mask.  */
1720
   false),    /* pcrel_offset.  */
1721
  HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type.  */
1722
   0,     /* rightshift.  */
1723
   2,     /* size.  */
1724
   16,      /* bitsize.  */
1725
   false,     /* pc_relative.  */
1726
   0,     /* bitpos.  */
1727
   complain_overflow_bitfield,/* complain_on_overflow.  */
1728
   bfd_elf_generic_reloc, /* special_function.  */
1729
   "R_ARM_THM_ALU_ABS_G2_NC",/* name.  */
1730
   false,     /* partial_inplace.  */
1731
   0x00000000,    /* src_mask.  */
1732
   0x00000000,    /* dst_mask.  */
1733
   false),    /* pcrel_offset.  */
1734
  HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type.  */
1735
   0,     /* rightshift.  */
1736
   2,     /* size.  */
1737
   16,      /* bitsize.  */
1738
   false,     /* pc_relative.  */
1739
   0,     /* bitpos.  */
1740
   complain_overflow_bitfield,/* complain_on_overflow.  */
1741
   bfd_elf_generic_reloc, /* special_function.  */
1742
   "R_ARM_THM_ALU_ABS_G3_NC",/* name.  */
1743
   false,     /* partial_inplace.  */
1744
   0x00000000,    /* src_mask.  */
1745
   0x00000000,    /* dst_mask.  */
1746
   false),    /* pcrel_offset.  */
1747
  /* Relocations for Armv8.1-M Mainline.  */
1748
  HOWTO (R_ARM_THM_BF16,  /* type.  */
1749
   0,     /* rightshift.  */
1750
   2,     /* size.  */
1751
   16,      /* bitsize.  */
1752
   true,      /* pc_relative.  */
1753
   0,     /* bitpos.  */
1754
   complain_overflow_dont,/* do not complain_on_overflow.  */
1755
   bfd_elf_generic_reloc, /* special_function.  */
1756
   "R_ARM_THM_BF16",  /* name.  */
1757
   false,     /* partial_inplace.  */
1758
   0x001f0ffe,    /* src_mask.  */
1759
   0x001f0ffe,    /* dst_mask.  */
1760
   true),     /* pcrel_offset.  */
1761
  HOWTO (R_ARM_THM_BF12,  /* type.  */
1762
   0,     /* rightshift.  */
1763
   2,     /* size.  */
1764
   12,      /* bitsize.  */
1765
   true,      /* pc_relative.  */
1766
   0,     /* bitpos.  */
1767
   complain_overflow_dont,/* do not complain_on_overflow.  */
1768
   bfd_elf_generic_reloc, /* special_function.  */
1769
   "R_ARM_THM_BF12",  /* name.  */
1770
   false,     /* partial_inplace.  */
1771
   0x00010ffe,    /* src_mask.  */
1772
   0x00010ffe,    /* dst_mask.  */
1773
   true),     /* pcrel_offset.  */
1774
  HOWTO (R_ARM_THM_BF18,  /* type.  */
1775
   0,     /* rightshift.  */
1776
   2,     /* size.  */
1777
   18,      /* bitsize.  */
1778
   true,      /* pc_relative.  */
1779
   0,     /* bitpos.  */
1780
   complain_overflow_dont,/* do not complain_on_overflow.  */
1781
   bfd_elf_generic_reloc, /* special_function.  */
1782
   "R_ARM_THM_BF18",  /* name.  */
1783
   false,     /* partial_inplace.  */
1784
   0x007f0ffe,    /* src_mask.  */
1785
   0x007f0ffe,    /* dst_mask.  */
1786
   true),     /* pcrel_offset.  */
1787
};
1788
1789
/* 160 onwards: */
1790
static reloc_howto_type elf32_arm_howto_table_2[8] =
1791
{
1792
  HOWTO (R_ARM_IRELATIVE, /* type */
1793
   0,     /* rightshift */
1794
   4,     /* size */
1795
   32,      /* bitsize */
1796
   false,     /* pc_relative */
1797
   0,     /* bitpos */
1798
   complain_overflow_bitfield,/* complain_on_overflow */
1799
   bfd_elf_generic_reloc, /* special_function */
1800
   "R_ARM_IRELATIVE", /* name */
1801
   true,      /* partial_inplace */
1802
   0xffffffff,    /* src_mask */
1803
   0xffffffff,    /* dst_mask */
1804
   false),    /* pcrel_offset */
1805
  HOWTO (R_ARM_GOTFUNCDESC, /* type */
1806
   0,     /* rightshift */
1807
   4,     /* size */
1808
   32,      /* bitsize */
1809
   false,     /* pc_relative */
1810
   0,     /* bitpos */
1811
   complain_overflow_bitfield,/* complain_on_overflow */
1812
   bfd_elf_generic_reloc, /* special_function */
1813
   "R_ARM_GOTFUNCDESC", /* name */
1814
   false,     /* partial_inplace */
1815
   0,     /* src_mask */
1816
   0xffffffff,    /* dst_mask */
1817
   false),    /* pcrel_offset */
1818
  HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1819
   0,     /* rightshift */
1820
   4,     /* size */
1821
   32,      /* bitsize */
1822
   false,     /* pc_relative */
1823
   0,     /* bitpos */
1824
   complain_overflow_bitfield,/* complain_on_overflow */
1825
   bfd_elf_generic_reloc, /* special_function */
1826
   "R_ARM_GOTOFFFUNCDESC",/* name */
1827
   false,     /* partial_inplace */
1828
   0,     /* src_mask */
1829
   0xffffffff,    /* dst_mask */
1830
   false),    /* pcrel_offset */
1831
  HOWTO (R_ARM_FUNCDESC,  /* type */
1832
   0,     /* rightshift */
1833
   4,     /* size */
1834
   32,      /* bitsize */
1835
   false,     /* pc_relative */
1836
   0,     /* bitpos */
1837
   complain_overflow_bitfield,/* complain_on_overflow */
1838
   bfd_elf_generic_reloc, /* special_function */
1839
   "R_ARM_FUNCDESC",  /* name */
1840
   false,     /* partial_inplace */
1841
   0,     /* src_mask */
1842
   0xffffffff,    /* dst_mask */
1843
   false),    /* pcrel_offset */
1844
  HOWTO (R_ARM_FUNCDESC_VALUE,  /* type */
1845
   0,     /* rightshift */
1846
   4,     /* size */
1847
   64,      /* bitsize */
1848
   false,     /* pc_relative */
1849
   0,     /* bitpos */
1850
   complain_overflow_bitfield,/* complain_on_overflow */
1851
   bfd_elf_generic_reloc, /* special_function */
1852
   "R_ARM_FUNCDESC_VALUE",/* name */
1853
   false,     /* partial_inplace */
1854
   0,     /* src_mask */
1855
   0xffffffff,    /* dst_mask */
1856
   false),    /* pcrel_offset */
1857
  HOWTO (R_ARM_TLS_GD32_FDPIC,  /* type */
1858
   0,     /* rightshift */
1859
   4,     /* size */
1860
   32,      /* bitsize */
1861
   false,     /* pc_relative */
1862
   0,     /* bitpos */
1863
   complain_overflow_bitfield,/* complain_on_overflow */
1864
   bfd_elf_generic_reloc, /* special_function */
1865
   "R_ARM_TLS_GD32_FDPIC",/* name */
1866
   false,     /* partial_inplace */
1867
   0,     /* src_mask */
1868
   0xffffffff,    /* dst_mask */
1869
   false),    /* pcrel_offset */
1870
  HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1871
   0,     /* rightshift */
1872
   4,     /* size */
1873
   32,      /* bitsize */
1874
   false,     /* pc_relative */
1875
   0,     /* bitpos */
1876
   complain_overflow_bitfield,/* complain_on_overflow */
1877
   bfd_elf_generic_reloc, /* special_function */
1878
   "R_ARM_TLS_LDM32_FDPIC",/* name */
1879
   false,     /* partial_inplace */
1880
   0,     /* src_mask */
1881
   0xffffffff,    /* dst_mask */
1882
   false),    /* pcrel_offset */
1883
  HOWTO (R_ARM_TLS_IE32_FDPIC,  /* type */
1884
   0,     /* rightshift */
1885
   4,     /* size */
1886
   32,      /* bitsize */
1887
   false,     /* pc_relative */
1888
   0,     /* bitpos */
1889
   complain_overflow_bitfield,/* complain_on_overflow */
1890
   bfd_elf_generic_reloc, /* special_function */
1891
   "R_ARM_TLS_IE32_FDPIC",/* name */
1892
   false,     /* partial_inplace */
1893
   0,     /* src_mask */
1894
   0xffffffff,    /* dst_mask */
1895
   false),    /* pcrel_offset */
1896
};
1897
1898
/* 249-255 extended, currently unused, relocations:  */
1899
static reloc_howto_type elf32_arm_howto_table_3[4] =
1900
{
1901
  HOWTO (R_ARM_RREL32,    /* type */
1902
   0,     /* rightshift */
1903
   0,     /* size */
1904
   0,     /* bitsize */
1905
   false,     /* pc_relative */
1906
   0,     /* bitpos */
1907
   complain_overflow_dont,/* complain_on_overflow */
1908
   bfd_elf_generic_reloc, /* special_function */
1909
   "R_ARM_RREL32",  /* name */
1910
   false,     /* partial_inplace */
1911
   0,     /* src_mask */
1912
   0,     /* dst_mask */
1913
   false),    /* pcrel_offset */
1914
1915
  HOWTO (R_ARM_RABS32,    /* type */
1916
   0,     /* rightshift */
1917
   0,     /* size */
1918
   0,     /* bitsize */
1919
   false,     /* pc_relative */
1920
   0,     /* bitpos */
1921
   complain_overflow_dont,/* complain_on_overflow */
1922
   bfd_elf_generic_reloc, /* special_function */
1923
   "R_ARM_RABS32",  /* name */
1924
   false,     /* partial_inplace */
1925
   0,     /* src_mask */
1926
   0,     /* dst_mask */
1927
   false),    /* pcrel_offset */
1928
1929
  HOWTO (R_ARM_RPC24,   /* type */
1930
   0,     /* rightshift */
1931
   0,     /* size */
1932
   0,     /* bitsize */
1933
   false,     /* pc_relative */
1934
   0,     /* bitpos */
1935
   complain_overflow_dont,/* complain_on_overflow */
1936
   bfd_elf_generic_reloc, /* special_function */
1937
   "R_ARM_RPC24",   /* name */
1938
   false,     /* partial_inplace */
1939
   0,     /* src_mask */
1940
   0,     /* dst_mask */
1941
   false),    /* pcrel_offset */
1942
1943
  HOWTO (R_ARM_RBASE,   /* type */
1944
   0,     /* rightshift */
1945
   0,     /* size */
1946
   0,     /* bitsize */
1947
   false,     /* pc_relative */
1948
   0,     /* bitpos */
1949
   complain_overflow_dont,/* complain_on_overflow */
1950
   bfd_elf_generic_reloc, /* special_function */
1951
   "R_ARM_RBASE",   /* name */
1952
   false,     /* partial_inplace */
1953
   0,     /* src_mask */
1954
   0,     /* dst_mask */
1955
   false)     /* pcrel_offset */
1956
};
1957
1958
static reloc_howto_type *
1959
elf32_arm_howto_from_type (unsigned int r_type)
1960
692
{
1961
692
  if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1962
689
    return &elf32_arm_howto_table_1[r_type];
1963
1964
3
  if (r_type >= R_ARM_IRELATIVE
1965
3
      && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1966
0
    return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1967
1968
3
  if (r_type >= R_ARM_RREL32
1969
3
      && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1970
0
    return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1971
1972
3
  return NULL;
1973
3
}
1974
1975
static bool
1976
elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1977
       Elf_Internal_Rela * elf_reloc)
1978
692
{
1979
692
  unsigned int r_type;
1980
1981
692
  r_type = ELF32_R_TYPE (elf_reloc->r_info);
1982
692
  if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1983
3
    {
1984
      /* xgettext:c-format */
1985
3
      _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1986
3
        abfd, r_type);
1987
3
      bfd_set_error (bfd_error_bad_value);
1988
3
      return false;
1989
3
    }
1990
689
  return true;
1991
692
}
1992
1993
struct elf32_arm_reloc_map
1994
  {
1995
    bfd_reloc_code_real_type  bfd_reloc_val;
1996
    unsigned char       elf_reloc_val;
1997
  };
1998
1999
/* All entries in this list must also be present in elf32_arm_howto_table.  */
2000
static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
2001
  {
2002
    {BFD_RELOC_NONE,         R_ARM_NONE},
2003
    {BFD_RELOC_ARM_PCREL_BRANCH,     R_ARM_PC24},
2004
    {BFD_RELOC_ARM_PCREL_CALL,       R_ARM_CALL},
2005
    {BFD_RELOC_ARM_PCREL_JUMP,       R_ARM_JUMP24},
2006
    {BFD_RELOC_ARM_PCREL_BLX,      R_ARM_XPC25},
2007
    {BFD_RELOC_THUMB_PCREL_BLX,      R_ARM_THM_XPC22},
2008
    {BFD_RELOC_32,         R_ARM_ABS32},
2009
    {BFD_RELOC_32_PCREL,       R_ARM_REL32},
2010
    {BFD_RELOC_8,        R_ARM_ABS8},
2011
    {BFD_RELOC_16,         R_ARM_ABS16},
2012
    {BFD_RELOC_ARM_OFFSET_IMM,       R_ARM_ABS12},
2013
    {BFD_RELOC_ARM_THUMB_OFFSET,     R_ARM_THM_ABS5},
2014
    {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2015
    {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2016
    {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2017
    {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2018
    {BFD_RELOC_THUMB_PCREL_BRANCH9,  R_ARM_THM_JUMP8},
2019
    {BFD_RELOC_THUMB_PCREL_BRANCH7,  R_ARM_THM_JUMP6},
2020
    {BFD_RELOC_ARM_GLOB_DAT,       R_ARM_GLOB_DAT},
2021
    {BFD_RELOC_ARM_JUMP_SLOT,      R_ARM_JUMP_SLOT},
2022
    {BFD_RELOC_ARM_RELATIVE,       R_ARM_RELATIVE},
2023
    {BFD_RELOC_ARM_GOTOFF,       R_ARM_GOTOFF32},
2024
    {BFD_RELOC_ARM_GOTPC,      R_ARM_GOTPC},
2025
    {BFD_RELOC_ARM_GOT_PREL,       R_ARM_GOT_PREL},
2026
    {BFD_RELOC_ARM_GOT32,      R_ARM_GOT32},
2027
    {BFD_RELOC_ARM_PLT32,      R_ARM_PLT32},
2028
    {BFD_RELOC_ARM_TARGET1,      R_ARM_TARGET1},
2029
    {BFD_RELOC_ARM_ROSEGREL32,       R_ARM_ROSEGREL32},
2030
    {BFD_RELOC_ARM_SBREL32,      R_ARM_SBREL32},
2031
    {BFD_RELOC_ARM_PREL31,       R_ARM_PREL31},
2032
    {BFD_RELOC_ARM_TARGET2,      R_ARM_TARGET2},
2033
    {BFD_RELOC_ARM_PLT32,      R_ARM_PLT32},
2034
    {BFD_RELOC_ARM_TLS_GOTDESC,      R_ARM_TLS_GOTDESC},
2035
    {BFD_RELOC_ARM_TLS_CALL,       R_ARM_TLS_CALL},
2036
    {BFD_RELOC_ARM_THM_TLS_CALL,     R_ARM_THM_TLS_CALL},
2037
    {BFD_RELOC_ARM_TLS_DESCSEQ,      R_ARM_TLS_DESCSEQ},
2038
    {BFD_RELOC_ARM_THM_TLS_DESCSEQ,  R_ARM_THM_TLS_DESCSEQ},
2039
    {BFD_RELOC_ARM_TLS_DESC,       R_ARM_TLS_DESC},
2040
    {BFD_RELOC_ARM_TLS_GD32,       R_ARM_TLS_GD32},
2041
    {BFD_RELOC_ARM_TLS_LDO32,      R_ARM_TLS_LDO32},
2042
    {BFD_RELOC_ARM_TLS_LDM32,      R_ARM_TLS_LDM32},
2043
    {BFD_RELOC_ARM_TLS_DTPMOD32,     R_ARM_TLS_DTPMOD32},
2044
    {BFD_RELOC_ARM_TLS_DTPOFF32,     R_ARM_TLS_DTPOFF32},
2045
    {BFD_RELOC_ARM_TLS_TPOFF32,      R_ARM_TLS_TPOFF32},
2046
    {BFD_RELOC_ARM_TLS_IE32,       R_ARM_TLS_IE32},
2047
    {BFD_RELOC_ARM_TLS_LE32,       R_ARM_TLS_LE32},
2048
    {BFD_RELOC_ARM_IRELATIVE,      R_ARM_IRELATIVE},
2049
    {BFD_RELOC_ARM_GOTFUNCDESC,      R_ARM_GOTFUNCDESC},
2050
    {BFD_RELOC_ARM_GOTOFFFUNCDESC,   R_ARM_GOTOFFFUNCDESC},
2051
    {BFD_RELOC_ARM_FUNCDESC,         R_ARM_FUNCDESC},
2052
    {BFD_RELOC_ARM_FUNCDESC_VALUE,   R_ARM_FUNCDESC_VALUE},
2053
    {BFD_RELOC_ARM_TLS_GD32_FDPIC,   R_ARM_TLS_GD32_FDPIC},
2054
    {BFD_RELOC_ARM_TLS_LDM32_FDPIC,  R_ARM_TLS_LDM32_FDPIC},
2055
    {BFD_RELOC_ARM_TLS_IE32_FDPIC,   R_ARM_TLS_IE32_FDPIC},
2056
    {BFD_RELOC_VTABLE_INHERIT,       R_ARM_GNU_VTINHERIT},
2057
    {BFD_RELOC_VTABLE_ENTRY,       R_ARM_GNU_VTENTRY},
2058
    {BFD_RELOC_ARM_MOVW,       R_ARM_MOVW_ABS_NC},
2059
    {BFD_RELOC_ARM_MOVT,       R_ARM_MOVT_ABS},
2060
    {BFD_RELOC_ARM_MOVW_PCREL,       R_ARM_MOVW_PREL_NC},
2061
    {BFD_RELOC_ARM_MOVT_PCREL,       R_ARM_MOVT_PREL},
2062
    {BFD_RELOC_ARM_THUMB_MOVW,       R_ARM_THM_MOVW_ABS_NC},
2063
    {BFD_RELOC_ARM_THUMB_MOVT,       R_ARM_THM_MOVT_ABS},
2064
    {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2065
    {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2066
    {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2067
    {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2068
    {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2069
    {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2070
    {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2071
    {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2072
    {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2073
    {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2074
    {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2075
    {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2076
    {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2077
    {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2078
    {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2079
    {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2080
    {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2081
    {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2082
    {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2083
    {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2084
    {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2085
    {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2086
    {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2087
    {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2088
    {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2089
    {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2090
    {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2091
    {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2092
    {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2093
    {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2094
    {BFD_RELOC_ARM_V4BX,       R_ARM_V4BX},
2095
    {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2096
    {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2097
    {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2098
    {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2099
    {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2100
    {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
2101
    {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2102
  };
2103
2104
static reloc_howto_type *
2105
elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2106
           bfd_reloc_code_real_type code)
2107
0
{
2108
0
  unsigned int i;
2109
2110
0
  for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2111
0
    if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2112
0
      return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2113
2114
0
  return NULL;
2115
0
}
2116
2117
static reloc_howto_type *
2118
elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2119
           const char *r_name)
2120
0
{
2121
0
  unsigned int i;
2122
2123
0
  for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2124
0
    if (elf32_arm_howto_table_1[i].name != NULL
2125
0
  && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2126
0
      return &elf32_arm_howto_table_1[i];
2127
2128
0
  for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2129
0
    if (elf32_arm_howto_table_2[i].name != NULL
2130
0
  && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2131
0
      return &elf32_arm_howto_table_2[i];
2132
2133
0
  for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2134
0
    if (elf32_arm_howto_table_3[i].name != NULL
2135
0
  && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2136
0
      return &elf32_arm_howto_table_3[i];
2137
2138
0
  return NULL;
2139
0
}
2140
2141
/* Support for core dump NOTE sections.  */
2142
2143
static bool
2144
elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2145
0
{
2146
0
  int offset;
2147
0
  size_t size;
2148
2149
0
  switch (note->descsz)
2150
0
    {
2151
0
      default:
2152
0
  return false;
2153
2154
0
      case 148:   /* Linux/ARM 32-bit.  */
2155
  /* pr_cursig */
2156
0
  elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2157
2158
  /* pr_pid */
2159
0
  elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2160
2161
  /* pr_reg */
2162
0
  offset = 72;
2163
0
  size = 72;
2164
2165
0
  break;
2166
0
    }
2167
2168
  /* Make a ".reg/999" section.  */
2169
0
  return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2170
0
            size, note->descpos + offset);
2171
0
}
2172
2173
static bool
2174
elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2175
0
{
2176
0
  switch (note->descsz)
2177
0
    {
2178
0
      default:
2179
0
  return false;
2180
2181
0
      case 124:   /* Linux/ARM elf_prpsinfo.  */
2182
0
  elf_tdata (abfd)->core->pid
2183
0
   = bfd_get_32 (abfd, note->descdata + 12);
2184
0
  elf_tdata (abfd)->core->program
2185
0
   = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2186
0
  elf_tdata (abfd)->core->command
2187
0
   = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2188
0
    }
2189
2190
  /* Note that for some reason, a spurious space is tacked
2191
     onto the end of the args in some (at least one anyway)
2192
     implementations, so strip it off if it exists.  */
2193
0
  {
2194
0
    char *command = elf_tdata (abfd)->core->command;
2195
0
    int n = strlen (command);
2196
2197
0
    if (0 < n && command[n - 1] == ' ')
2198
0
      command[n - 1] = '\0';
2199
0
  }
2200
2201
0
  return true;
2202
0
}
2203
2204
static char *
2205
elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2206
        int note_type, ...)
2207
0
{
2208
0
  switch (note_type)
2209
0
    {
2210
0
    default:
2211
0
      return NULL;
2212
2213
0
    case NT_PRPSINFO:
2214
0
      {
2215
0
  char data[124] ATTRIBUTE_NONSTRING;
2216
0
  va_list ap;
2217
2218
0
  va_start (ap, note_type);
2219
0
  memset (data, 0, sizeof (data));
2220
0
  strncpy (data + 28, va_arg (ap, const char *), 16);
2221
#if GCC_VERSION == 8000 || GCC_VERSION == 8001
2222
  DIAGNOSTIC_PUSH;
2223
  /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2224
     -Wstringop-truncation:
2225
     https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2226
   */
2227
  DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2228
#endif
2229
0
  strncpy (data + 44, va_arg (ap, const char *), 80);
2230
#if GCC_VERSION == 8000 || GCC_VERSION == 8001
2231
  DIAGNOSTIC_POP;
2232
#endif
2233
0
  va_end (ap);
2234
2235
0
  return elfcore_write_note (abfd, buf, bufsiz,
2236
0
           "CORE", note_type, data, sizeof (data));
2237
0
      }
2238
2239
0
    case NT_PRSTATUS:
2240
0
      {
2241
0
  char data[148];
2242
0
  va_list ap;
2243
0
  long pid;
2244
0
  int cursig;
2245
0
  const void *greg;
2246
2247
0
  va_start (ap, note_type);
2248
0
  memset (data, 0, sizeof (data));
2249
0
  pid = va_arg (ap, long);
2250
0
  bfd_put_32 (abfd, pid, data + 24);
2251
0
  cursig = va_arg (ap, int);
2252
0
  bfd_put_16 (abfd, cursig, data + 12);
2253
0
  greg = va_arg (ap, const void *);
2254
0
  memcpy (data + 72, greg, 72);
2255
0
  va_end (ap);
2256
2257
0
  return elfcore_write_note (abfd, buf, bufsiz,
2258
0
           "CORE", note_type, data, sizeof (data));
2259
0
      }
2260
0
    }
2261
0
}
2262
2263
#define TARGET_LITTLE_SYM   arm_elf32_le_vec
2264
#define TARGET_LITTLE_NAME    "elf32-littlearm"
2265
#define TARGET_BIG_SYM      arm_elf32_be_vec
2266
#define TARGET_BIG_NAME     "elf32-bigarm"
2267
2268
#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2269
#define elf_backend_grok_psinfo   elf32_arm_nabi_grok_psinfo
2270
#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2271
2272
typedef unsigned long int insn32;
2273
typedef unsigned short int insn16;
2274
2275
/* In lieu of proper flags, assume all EABIv4 or later objects are
2276
   interworkable.  */
2277
#define INTERWORK_FLAG(abfd)  \
2278
0
  (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2279
0
  || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2280
0
  || ((abfd)->flags & BFD_LINKER_CREATED))
2281
2282
/* The linker script knows the section names for placement.
2283
   The entry_names are used to do simple name mangling on the stubs.
2284
   Given a function name, and its type, the stub can be found. The
2285
   name can be changed. The only requirement is the %s be present.  */
2286
0
#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2287
0
#define THUMB2ARM_GLUE_ENTRY_NAME   "__%s_from_thumb"
2288
2289
0
#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2290
0
#define ARM2THUMB_GLUE_ENTRY_NAME   "__%s_from_arm"
2291
2292
0
#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2293
0
#define VFP11_ERRATUM_VENEER_ENTRY_NAME   "__vfp11_veneer_%x"
2294
2295
0
#define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2296
0
#define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME   "__stm32l4xx_veneer_%x"
2297
2298
0
#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2299
0
#define ARM_BX_GLUE_ENTRY_NAME   "__bx_r%d"
2300
2301
0
#define STUB_ENTRY_NAME   "__%s_veneer"
2302
2303
0
#define CMSE_PREFIX "__acle_se_"
2304
2305
0
#define CMSE_STUB_NAME ".gnu.sgstubs"
2306
2307
/* The name of the dynamic interpreter.  This is put in the .interp
2308
   section.  */
2309
0
#define ELF_DYNAMIC_INTERPRETER     "/usr/lib/ld.so.1"
2310
2311
/* FDPIC default stack size.  */
2312
0
#define DEFAULT_STACK_SIZE 0x8000
2313
2314
static const unsigned long tls_trampoline [] =
2315
{
2316
  0xe08e0000,   /* add r0, lr, r0 */
2317
  0xe5901004,   /* ldr r1, [r0,#4] */
2318
  0xe12fff11,   /* bx  r1 */
2319
};
2320
2321
static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2322
{
2323
  0xe52d2004, /*  push    {r2}      */
2324
  0xe59f200c, /*      ldr     r2, [pc, #3f - . - 8] */
2325
  0xe59f100c, /*      ldr     r1, [pc, #4f - . - 8] */
2326
  0xe79f2002, /* 1:   ldr     r2, [pc, r2]    */
2327
  0xe081100f, /* 2:   add     r1, pc      */
2328
  0xe12fff12, /*      bx      r2      */
2329
  0x00000014, /* 3:   .word  _GLOBAL_OFFSET_TABLE_ - 1b - 8
2330
        + dl_tlsdesc_lazy_resolver(GOT)   */
2331
  0x00000018, /* 4:   .word  _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2332
};
2333
2334
/* NOTE: [Thumb nop sequence]
2335
   When adding code that transitions from Thumb to Arm the instruction that
2336
   should be used for the alignment padding should be 0xe7fd (b .-2) instead of
2337
   a nop for performance reasons.  */
2338
2339
/* ARM FDPIC PLT entry.  */
2340
/* The last 5 words contain PLT lazy fragment code and data.  */
2341
static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2342
  {
2343
    0xe59fc008,    /* ldr     r12, .L1 */
2344
    0xe08cc009,    /* add     r12, r12, r9 */
2345
    0xe59c9004,    /* ldr     r9, [r12, #4] */
2346
    0xe59cf000,    /* ldr     pc, [r12] */
2347
    0x00000000,    /* L1.     .word   foo(GOTOFFFUNCDESC) */
2348
    0x00000000,    /* L1.     .word   foo(funcdesc_value_reloc_offset) */
2349
    0xe51fc00c,    /* ldr     r12, [pc, #-12] */
2350
    0xe92d1000,    /* push    {r12} */
2351
    0xe599c004,    /* ldr     r12, [r9, #4] */
2352
    0xe599f000,    /* ldr     pc, [r9] */
2353
  };
2354
2355
/* Thumb FDPIC PLT entry.  */
2356
/* The last 5 words contain PLT lazy fragment code and data.  */
2357
static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2358
  {
2359
    0xc00cf8df,    /* ldr.w   r12, .L1 */
2360
    0x0c09eb0c,    /* add.w   r12, r12, r9 */
2361
    0x9004f8dc,    /* ldr.w   r9, [r12, #4] */
2362
    0xf000f8dc,    /* ldr.w   pc, [r12] */
2363
    0x00000000,    /* .L1     .word   foo(GOTOFFFUNCDESC) */
2364
    0x00000000,    /* .L2     .word   foo(funcdesc_value_reloc_offset) */
2365
    0xc008f85f,    /* ldr.w   r12, .L2 */
2366
    0xcd04f84d,    /* push    {r12} */
2367
    0xc004f8d9,    /* ldr.w   r12, [r9, #4] */
2368
    0xf000f8d9,    /* ldr.w   pc, [r9] */
2369
  };
2370
2371
#ifdef FOUR_WORD_PLT
2372
2373
/* The first entry in a procedure linkage table looks like
2374
   this.  It is set up so that any shared library function that is
2375
   called before the relocation has been set up calls the dynamic
2376
   linker first.  */
2377
static const bfd_vma elf32_arm_plt0_entry [] =
2378
{
2379
  0xe52de004,   /* str   lr, [sp, #-4]! */
2380
  0xe59fe010,   /* ldr   lr, [pc, #16]  */
2381
  0xe08fe00e,   /* add   lr, pc, lr     */
2382
  0xe5bef008,   /* ldr   pc, [lr, #8]!  */
2383
};
2384
2385
/* Subsequent entries in a procedure linkage table look like
2386
   this.  */
2387
static const bfd_vma elf32_arm_plt_entry [] =
2388
{
2389
  0xe28fc600,   /* add   ip, pc, #NN  */
2390
  0xe28cca00,   /* add   ip, ip, #NN  */
2391
  0xe5bcf000,   /* ldr   pc, [ip, #NN]! */
2392
  0x00000000,   /* unused   */
2393
};
2394
2395
#else /* not FOUR_WORD_PLT */
2396
2397
/* The first entry in a procedure linkage table looks like
2398
   this.  It is set up so that any shared library function that is
2399
   called before the relocation has been set up calls the dynamic
2400
   linker first.  */
2401
static const bfd_vma elf32_arm_plt0_entry [] =
2402
{
2403
  0xe52de004,   /* str   lr, [sp, #-4]! */
2404
  0xe59fe004,   /* ldr   lr, [pc, #4] */
2405
  0xe08fe00e,   /* add   lr, pc, lr */
2406
  0xe5bef008,   /* ldr   pc, [lr, #8]!  */
2407
  0x00000000,   /* &GOT[0] - .    */
2408
};
2409
2410
/* By default subsequent entries in a procedure linkage table look like
2411
   this. Offsets that don't fit into 28 bits will cause link error.  */
2412
static const bfd_vma elf32_arm_plt_entry_short [] =
2413
{
2414
  0xe28fc600,   /* add   ip, pc, #0xNN00000 */
2415
  0xe28cca00,   /* add   ip, ip, #0xNN000   */
2416
  0xe5bcf000,   /* ldr   pc, [ip, #0xNNN]!  */
2417
};
2418
2419
/* When explicitly asked, we'll use this "long" entry format
2420
   which can cope with arbitrary displacements.  */
2421
static const bfd_vma elf32_arm_plt_entry_long [] =
2422
{
2423
  0xe28fc200,   /* add   ip, pc, #0xN0000000 */
2424
  0xe28cc600,   /* add   ip, ip, #0xNN00000  */
2425
  0xe28cca00,   /* add   ip, ip, #0xNN000    */
2426
  0xe5bcf000,   /* ldr   pc, [ip, #0xNNN]!   */
2427
};
2428
2429
static bool elf32_arm_use_long_plt_entry = false;
2430
2431
#endif /* not FOUR_WORD_PLT */
2432
2433
/* The first entry in a procedure linkage table looks like this.
2434
   It is set up so that any shared library function that is called before the
2435
   relocation has been set up calls the dynamic linker first.  */
2436
static const bfd_vma elf32_thumb2_plt0_entry [] =
2437
{
2438
  /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2439
     an instruction maybe encoded to one or two array elements.  */
2440
  0xf8dfb500,   /* push    {lr}    */
2441
  0x44fee008,   /* ldr.w   lr, [pc, #8]  */
2442
      /* add     lr, pc  */
2443
  0xff08f85e,   /* ldr.w   pc, [lr, #8]! */
2444
  0x00000000,   /* &GOT[0] - .     */
2445
};
2446
2447
/* Subsequent entries in a procedure linkage table for thumb only target
2448
   look like this.  */
2449
static const bfd_vma elf32_thumb2_plt_entry [] =
2450
{
2451
  /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2452
     an instruction maybe encoded to one or two array elements.  */
2453
  0x0c00f240,   /* movw    ip, #0xNNNN    */
2454
  0x0c00f2c0,   /* movt    ip, #0xNNNN    */
2455
  0xf8dc44fc,   /* add     ip, pc   */
2456
  0xe7fcf000    /* ldr.w   pc, [ip]   */
2457
      /* b      .-4     */
2458
};
2459
2460
/* The format of the first entry in the procedure linkage table
2461
   for a VxWorks executable.  */
2462
static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2463
{
2464
  0xe52dc008,   /* str    ip,[sp,#-8]!      */
2465
  0xe59fc000,   /* ldr    ip,[pc]     */
2466
  0xe59cf008,   /* ldr    pc,[ip,#8]      */
2467
  0x00000000,   /* .long  _GLOBAL_OFFSET_TABLE_   */
2468
};
2469
2470
/* The format of subsequent entries in a VxWorks executable.  */
2471
static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2472
{
2473
  0xe59fc000,       /* ldr  ip,[pc]     */
2474
  0xe59cf000,       /* ldr  pc,[ip]     */
2475
  0x00000000,       /* .long  @got        */
2476
  0xe59fc000,       /* ldr  ip,[pc]     */
2477
  0xea000000,       /* b  _PLT        */
2478
  0x00000000,       /* .long  @pltindex*sizeof(Elf32_Rela)  */
2479
};
2480
2481
/* The format of entries in a VxWorks shared library.  */
2482
static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2483
{
2484
  0xe59fc000,       /* ldr  ip,[pc]     */
2485
  0xe79cf009,       /* ldr  pc,[ip,r9]      */
2486
  0x00000000,       /* .long  @got        */
2487
  0xe59fc000,       /* ldr  ip,[pc]     */
2488
  0xe599f008,       /* ldr  pc,[r9,#8]      */
2489
  0x00000000,       /* .long  @pltindex*sizeof(Elf32_Rela)  */
2490
};
2491
2492
/* An initial stub used if the PLT entry is referenced from Thumb code.  */
2493
0
#define PLT_THUMB_STUB_SIZE 4
2494
static const bfd_vma elf32_arm_plt_thumb_stub [] =
2495
{
2496
  0x4778,   /* bx pc */
2497
  0xe7fd    /* b .-2 */
2498
};
2499
2500
/* The first entry in a procedure linkage table looks like
2501
   this.  It is set up so that any shared library function that is
2502
   called before the relocation has been set up calls the dynamic
2503
   linker first.  */
2504
static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2505
{
2506
  /* First bundle: */
2507
  0xe300c000,   /* movw ip, #:lower16:&GOT[2]-.+8 */
2508
  0xe340c000,   /* movt ip, #:upper16:&GOT[2]-.+8 */
2509
  0xe08cc00f,   /* add  ip, ip, pc      */
2510
  0xe52dc008,   /* str  ip, [sp, #-8]!      */
2511
  /* Second bundle: */
2512
  0xe3ccc103,   /* bic  ip, ip, #0xc0000000   */
2513
  0xe59cc000,   /* ldr  ip, [ip]      */
2514
  0xe3ccc13f,   /* bic  ip, ip, #0xc000000f   */
2515
  0xe12fff1c,   /* bx ip        */
2516
  /* Third bundle: */
2517
  0xe320f000,   /* nop          */
2518
  0xe320f000,   /* nop          */
2519
  0xe320f000,   /* nop          */
2520
  /* .Lplt_tail: */
2521
  0xe50dc004,   /* str  ip, [sp, #-4]     */
2522
  /* Fourth bundle: */
2523
  0xe3ccc103,   /* bic  ip, ip, #0xc0000000   */
2524
  0xe59cc000,   /* ldr  ip, [ip]      */
2525
  0xe3ccc13f,   /* bic  ip, ip, #0xc000000f   */
2526
  0xe12fff1c,   /* bx ip        */
2527
};
2528
0
#define ARM_NACL_PLT_TAIL_OFFSET  (11 * 4)
2529
2530
/* Subsequent entries in a procedure linkage table look like this.  */
2531
static const bfd_vma elf32_arm_nacl_plt_entry [] =
2532
{
2533
  0xe300c000,   /* movw ip, #:lower16:&GOT[n]-.+8 */
2534
  0xe340c000,   /* movt ip, #:upper16:&GOT[n]-.+8 */
2535
  0xe08cc00f,   /* add  ip, ip, pc      */
2536
  0xea000000,   /* b  .Lplt_tail      */
2537
};
2538
2539
/* PR 28924:
2540
   There was a bug due to too high values of THM_MAX_FWD_BRANCH_OFFSET and
2541
   THM2_MAX_FWD_BRANCH_OFFSET.  The first macro concerns the case when Thumb-2
2542
   is not available, and second macro when Thumb-2 is available.  Among other
2543
   things, they affect the range of branches represented as BLX instructions
2544
   in Encoding T2 defined in Section A8.8.25 of the ARM Architecture
2545
   Reference Manual ARMv7-A and ARMv7-R edition issue C.d.  Such branches are
2546
   specified there to have a maximum forward offset that is a multiple of 4.
2547
   Previously, the respective values defined here were multiples of 2 but not
2548
   4 and they are included in comments for reference.  */
2549
0
#define ARM_MAX_FWD_BRANCH_OFFSET  ((((1 << 23) - 1) << 2) + 8)
2550
0
#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2551
0
#define THM_MAX_FWD_BRANCH_OFFSET   ((1 << 22) - 4 + 4)
2552
/* #def THM_MAX_FWD_BRANCH_OFFSET   ((1 << 22) - 2 + 4) */
2553
0
#define THM_MAX_BWD_BRANCH_OFFSET  (-(1 << 22) + 4)
2554
0
#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 4) + 4)
2555
/* #def THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) */
2556
0
#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2557
0
#define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2558
0
#define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2559
2560
enum stub_insn_type
2561
{
2562
  THUMB16_TYPE = 1,
2563
  THUMB32_TYPE,
2564
  ARM_TYPE,
2565
  DATA_TYPE
2566
};
2567
2568
#define THUMB16_INSN(X)   {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2569
/* A bit of a hack.  A Thumb conditional branch, in which the proper condition
2570
   is inserted in arm_build_one_stub().  */
2571
#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2572
#define THUMB32_INSN(X)   {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2573
#define THUMB32_MOVT(X)   {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2574
#define THUMB32_MOVW(X)   {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2575
#define THUMB32_B_INSN(X, Z)  {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2576
#define ARM_INSN(X)   {(X), ARM_TYPE, R_ARM_NONE, 0}
2577
#define ARM_REL_INSN(X, Z)  {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2578
#define DATA_WORD(X,Y,Z)  {(X), DATA_TYPE, (Y), (Z)}
2579
2580
typedef struct
2581
{
2582
  bfd_vma        data;
2583
  enum stub_insn_type  type;
2584
  unsigned int         r_type;
2585
  int          reloc_addend;
2586
}  insn_sequence;
2587
2588
/* See note [Thumb nop sequence] when adding a veneer.  */
2589
2590
/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2591
   to reach the stub if necessary.  */
2592
static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2593
{
2594
  ARM_INSN (0xe51ff004),      /* ldr   pc, [pc, #-4] */
2595
  DATA_WORD (0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
2596
};
2597
2598
/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2599
   available.  */
2600
static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2601
{
2602
  ARM_INSN (0xe59fc000),      /* ldr   ip, [pc, #0] */
2603
  ARM_INSN (0xe12fff1c),      /* bx    ip */
2604
  DATA_WORD (0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
2605
};
2606
2607
/* Thumb -> Thumb long branch stub. Used on M-profile architectures.  */
2608
static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2609
{
2610
  THUMB16_INSN (0xb401),       /* push {r0} */
2611
  THUMB16_INSN (0x4802),       /* ldr  r0, [pc, #8] */
2612
  THUMB16_INSN (0x4684),       /* mov  ip, r0 */
2613
  THUMB16_INSN (0xbc01),       /* pop  {r0} */
2614
  THUMB16_INSN (0x4760),       /* bx   ip */
2615
  THUMB16_INSN (0xbf00),       /* nop */
2616
  DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
2617
};
2618
2619
/* Thumb -> Thumb long branch stub in thumb2 encoding.  Used on armv7.  */
2620
static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2621
{
2622
  THUMB32_INSN (0xf85ff000),       /* ldr.w  pc, [pc, #-0] */
2623
  DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(x) */
2624
};
2625
2626
/* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2627
   M-profile architectures.  */
2628
static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2629
{
2630
  THUMB32_MOVW (0xf2400c00),       /* mov.w ip, R_ARM_MOVW_ABS_NC */
2631
  THUMB32_MOVT (0xf2c00c00),       /* movt  ip, R_ARM_MOVT_ABS << 16 */
2632
  THUMB16_INSN (0x4760),       /* bx   ip */
2633
};
2634
2635
/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2636
   allowed.  */
2637
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2638
{
2639
  THUMB16_INSN (0x4778),       /* bx   pc */
2640
  THUMB16_INSN (0xe7fd),       /* b   .-2 */
2641
  ARM_INSN (0xe59fc000),       /* ldr  ip, [pc, #0] */
2642
  ARM_INSN (0xe12fff1c),       /* bx   ip */
2643
  DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
2644
};
2645
2646
/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2647
   available.  */
2648
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2649
{
2650
  THUMB16_INSN (0x4778),       /* bx   pc */
2651
  THUMB16_INSN (0xe7fd),       /* b   .-2 */
2652
  ARM_INSN (0xe51ff004),       /* ldr   pc, [pc, #-4] */
2653
  DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd   R_ARM_ABS32(X) */
2654
};
2655
2656
/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2657
   one, when the destination is close enough.  */
2658
static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2659
{
2660
  THUMB16_INSN (0x4778),       /* bx   pc */
2661
  THUMB16_INSN (0xe7fd),       /* b   .-2 */
2662
  ARM_REL_INSN (0xea000000, -8),     /* b    (X-8) */
2663
};
2664
2665
/* ARM/Thumb -> ARM long branch stub, PIC.  On V5T and above, use
2666
   blx to reach the stub if necessary.  */
2667
static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2668
{
2669
  ARM_INSN (0xe59fc000),       /* ldr   ip, [pc] */
2670
  ARM_INSN (0xe08ff00c),       /* add   pc, pc, ip */
2671
  DATA_WORD (0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
2672
};
2673
2674
/* ARM/Thumb -> Thumb long branch stub, PIC.  On V5T and above, use
2675
   blx to reach the stub if necessary.  We can not add into pc;
2676
   it is not guaranteed to mode switch (different in ARMv6 and
2677
   ARMv7).  */
2678
static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2679
{
2680
  ARM_INSN (0xe59fc004),       /* ldr   ip, [pc, #4] */
2681
  ARM_INSN (0xe08fc00c),       /* add   ip, pc, ip */
2682
  ARM_INSN (0xe12fff1c),       /* bx    ip */
2683
  DATA_WORD (0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
2684
};
2685
2686
/* V4T ARM -> ARM long branch stub, PIC.  */
2687
static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2688
{
2689
  ARM_INSN (0xe59fc004),       /* ldr   ip, [pc, #4] */
2690
  ARM_INSN (0xe08fc00c),       /* add   ip, pc, ip */
2691
  ARM_INSN (0xe12fff1c),       /* bx    ip */
2692
  DATA_WORD (0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
2693
};
2694
2695
/* V4T Thumb -> ARM long branch stub, PIC.  */
2696
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2697
{
2698
  THUMB16_INSN (0x4778),       /* bx   pc */
2699
  THUMB16_INSN (0xe7fd),       /* b   .-2 */
2700
  ARM_INSN (0xe59fc000),       /* ldr  ip, [pc, #0] */
2701
  ARM_INSN (0xe08cf00f),       /* add  pc, ip, pc */
2702
  DATA_WORD (0, R_ARM_REL32, -4),     /* dcd  R_ARM_REL32(X) */
2703
};
2704
2705
/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2706
   architectures.  */
2707
static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2708
{
2709
  THUMB16_INSN (0xb401),       /* push {r0} */
2710
  THUMB16_INSN (0x4802),       /* ldr  r0, [pc, #8] */
2711
  THUMB16_INSN (0x46fc),       /* mov  ip, pc */
2712
  THUMB16_INSN (0x4484),       /* add  ip, r0 */
2713
  THUMB16_INSN (0xbc01),       /* pop  {r0} */
2714
  THUMB16_INSN (0x4760),       /* bx   ip */
2715
  DATA_WORD (0, R_ARM_REL32, 4),     /* dcd  R_ARM_REL32(X) */
2716
};
2717
2718
/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2719
   allowed.  */
2720
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2721
{
2722
  THUMB16_INSN (0x4778),       /* bx   pc */
2723
  THUMB16_INSN (0xe7fd),       /* b   .-2 */
2724
  ARM_INSN (0xe59fc004),       /* ldr  ip, [pc, #4] */
2725
  ARM_INSN (0xe08fc00c),       /* add   ip, pc, ip */
2726
  ARM_INSN (0xe12fff1c),       /* bx   ip */
2727
  DATA_WORD (0, R_ARM_REL32, 0),     /* dcd  R_ARM_REL32(X) */
2728
};
2729
2730
/* Thumb2/ARM -> TLS trampoline.  Lowest common denominator, which is a
2731
   long PIC stub.  We can use r1 as a scratch -- and cannot use ip.  */
2732
static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2733
{
2734
  ARM_INSN (0xe59f1000),       /* ldr   r1, [pc] */
2735
  ARM_INSN (0xe08ff001),       /* add   pc, pc, r1 */
2736
  DATA_WORD (0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
2737
};
2738
2739
/* V4T Thumb -> TLS trampoline.  lowest common denominator, which is a
2740
   long PIC stub.  We can use r1 as a scratch -- and cannot use ip.  */
2741
static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2742
{
2743
  THUMB16_INSN (0x4778),       /* bx   pc */
2744
  THUMB16_INSN (0xe7fd),       /* b   .-2 */
2745
  ARM_INSN (0xe59f1000),       /* ldr  r1, [pc, #0] */
2746
  ARM_INSN (0xe081f00f),       /* add  pc, r1, pc */
2747
  DATA_WORD (0, R_ARM_REL32, -4),    /* dcd  R_ARM_REL32(X) */
2748
};
2749
2750
/* NaCl ARM -> ARM long branch stub.  */
2751
static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2752
{
2753
  ARM_INSN (0xe59fc00c),    /* ldr  ip, [pc, #12] */
2754
  ARM_INSN (0xe3ccc13f),    /* bic  ip, ip, #0xc000000f */
2755
  ARM_INSN (0xe12fff1c),    /* bx ip */
2756
  ARM_INSN (0xe320f000),    /* nop */
2757
  ARM_INSN (0xe125be70),    /* bkpt 0x5be0 */
2758
  DATA_WORD (0, R_ARM_ABS32, 0),  /* dcd  R_ARM_ABS32(X) */
2759
  DATA_WORD (0, R_ARM_NONE, 0),   /* .word 0 */
2760
  DATA_WORD (0, R_ARM_NONE, 0),   /* .word 0 */
2761
};
2762
2763
/* NaCl ARM -> ARM long branch stub, PIC.  */
2764
static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2765
{
2766
  ARM_INSN (0xe59fc00c),    /* ldr  ip, [pc, #12] */
2767
  ARM_INSN (0xe08cc00f),    /* add  ip, ip, pc */
2768
  ARM_INSN (0xe3ccc13f),    /* bic  ip, ip, #0xc000000f */
2769
  ARM_INSN (0xe12fff1c),    /* bx ip */
2770
  ARM_INSN (0xe125be70),    /* bkpt 0x5be0 */
2771
  DATA_WORD (0, R_ARM_REL32, 8),  /* dcd  R_ARM_REL32(X+8) */
2772
  DATA_WORD (0, R_ARM_NONE, 0),   /* .word 0 */
2773
  DATA_WORD (0, R_ARM_NONE, 0),   /* .word 0 */
2774
};
2775
2776
/* Stub used for transition to secure state (aka SG veneer).  */
2777
static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2778
{
2779
  THUMB32_INSN (0xe97fe97f),    /* sg.  */
2780
  THUMB32_B_INSN (0xf000b800, -4),  /* b.w original_branch_dest.  */
2781
};
2782
2783
2784
/* Cortex-A8 erratum-workaround stubs.  */
2785
2786
/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2787
   can't use a conditional branch to reach this stub).  */
2788
2789
static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2790
{
2791
  THUMB16_BCOND_INSN (0xd001),         /* b<cond>.n true.  */
2792
  THUMB32_B_INSN (0xf000b800, -4),     /* b.w insn_after_original_branch.  */
2793
  THUMB32_B_INSN (0xf000b800, -4)      /* true: b.w original_branch_dest.  */
2794
};
2795
2796
/* Stub used for b.w and bl.w instructions.  */
2797
2798
static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2799
{
2800
  THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest.  */
2801
};
2802
2803
static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2804
{
2805
  THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest.  */
2806
};
2807
2808
/* Stub used for Thumb-2 blx.w instructions.  We modified the original blx.w
2809
   instruction (which switches to ARM mode) to point to this stub.  Jump to the
2810
   real destination using an ARM-mode branch.  */
2811
2812
static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2813
{
2814
  ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest.  */
2815
};
2816
2817
/* For each section group there can be a specially created linker section
2818
   to hold the stubs for that group.  The name of the stub section is based
2819
   upon the name of another section within that group with the suffix below
2820
   applied.
2821
2822
   PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2823
   create what appeared to be a linker stub section when it actually
2824
   contained user code/data.  For example, consider this fragment:
2825
2826
     const char * stubborn_problems[] = { "np" };
2827
2828
   If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2829
   section called:
2830
2831
     .data.rel.local.stubborn_problems
2832
2833
   This then causes problems in arm32_arm_build_stubs() as it triggers:
2834
2835
      // Ignore non-stub sections.
2836
      if (!strstr (stub_sec->name, STUB_SUFFIX))
2837
  continue;
2838
2839
   And so the section would be ignored instead of being processed.  Hence
2840
   the change in definition of STUB_SUFFIX to a name that cannot be a valid
2841
   C identifier.  */
2842
0
#define STUB_SUFFIX ".__stub"
2843
2844
/* One entry per long/short branch stub defined above.  */
2845
#define DEF_STUBS \
2846
  DEF_STUB (long_branch_any_any)  \
2847
  DEF_STUB (long_branch_v4t_arm_thumb) \
2848
  DEF_STUB (long_branch_thumb_only) \
2849
  DEF_STUB (long_branch_v4t_thumb_thumb)  \
2850
  DEF_STUB (long_branch_v4t_thumb_arm) \
2851
  DEF_STUB (short_branch_v4t_thumb_arm) \
2852
  DEF_STUB (long_branch_any_arm_pic) \
2853
  DEF_STUB (long_branch_any_thumb_pic) \
2854
  DEF_STUB (long_branch_v4t_thumb_thumb_pic) \
2855
  DEF_STUB (long_branch_v4t_arm_thumb_pic) \
2856
  DEF_STUB (long_branch_v4t_thumb_arm_pic) \
2857
  DEF_STUB (long_branch_thumb_only_pic) \
2858
  DEF_STUB (long_branch_any_tls_pic) \
2859
  DEF_STUB (long_branch_v4t_thumb_tls_pic) \
2860
  DEF_STUB (long_branch_arm_nacl) \
2861
  DEF_STUB (long_branch_arm_nacl_pic) \
2862
  DEF_STUB (cmse_branch_thumb_only) \
2863
  DEF_STUB (a8_veneer_b_cond) \
2864
  DEF_STUB (a8_veneer_b) \
2865
  DEF_STUB (a8_veneer_bl) \
2866
  DEF_STUB (a8_veneer_blx) \
2867
  DEF_STUB (long_branch_thumb2_only) \
2868
  DEF_STUB (long_branch_thumb2_only_pure)
2869
2870
#define DEF_STUB(x) arm_stub_##x,
2871
enum elf32_arm_stub_type
2872
{
2873
  arm_stub_none,
2874
  DEF_STUBS
2875
  max_stub_type
2876
};
2877
#undef DEF_STUB
2878
2879
/* Note the first a8_veneer type.  */
2880
const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2881
2882
typedef struct
2883
{
2884
  const insn_sequence* template_sequence;
2885
  int template_size;
2886
} stub_def;
2887
2888
#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2889
static const stub_def stub_definitions[] =
2890
{
2891
  {NULL, 0},
2892
  DEF_STUBS
2893
};
2894
2895
struct elf32_arm_stub_hash_entry
2896
{
2897
  /* Base hash table entry structure.  */
2898
  struct bfd_hash_entry root;
2899
2900
  /* The stub section.  */
2901
  asection *stub_sec;
2902
2903
  /* Offset within stub_sec of the beginning of this stub.  */
2904
  bfd_vma stub_offset;
2905
2906
  /* Given the symbol's value and its section we can determine its final
2907
     value when building the stubs (so the stub knows where to jump).  */
2908
  bfd_vma target_value;
2909
  asection *target_section;
2910
2911
  /* Same as above but for the source of the branch to the stub.  Used for
2912
     Cortex-A8 erratum workaround to patch it to branch to the stub.  As
2913
     such, source section does not need to be recorded since Cortex-A8 erratum
2914
     workaround stubs are only generated when both source and target are in the
2915
     same section.  */
2916
  bfd_vma source_value;
2917
2918
  /* The instruction which caused this stub to be generated (only valid for
2919
     Cortex-A8 erratum workaround stubs at present).  */
2920
  unsigned long orig_insn;
2921
2922
  /* The stub type.  */
2923
  enum elf32_arm_stub_type stub_type;
2924
  /* Its encoding size in bytes.  */
2925
  int stub_size;
2926
  /* Its template.  */
2927
  const insn_sequence *stub_template;
2928
  /* The size of the template (number of entries).  */
2929
  int stub_template_size;
2930
2931
  /* The symbol table entry, if any, that this was derived from.  */
2932
  struct elf32_arm_link_hash_entry *h;
2933
2934
  /* Type of branch.  */
2935
  enum arm_st_branch_type branch_type;
2936
2937
  /* Where this stub is being called from, or, in the case of combined
2938
     stub sections, the first input section in the group.  */
2939
  asection *id_sec;
2940
2941
  /* The name for the local symbol at the start of this stub.  The
2942
     stub name in the hash table has to be unique; this does not, so
2943
     it can be friendlier.  */
2944
  char *output_name;
2945
};
2946
2947
/* Used to build a map of a section.  This is required for mixed-endian
2948
   code/data.  */
2949
2950
typedef struct elf32_elf_section_map
2951
{
2952
  bfd_vma vma;
2953
  char type;
2954
}
2955
elf32_arm_section_map;
2956
2957
/* Information about a VFP11 erratum veneer, or a branch to such a veneer.  */
2958
2959
typedef enum
2960
{
2961
  VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2962
  VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2963
  VFP11_ERRATUM_ARM_VENEER,
2964
  VFP11_ERRATUM_THUMB_VENEER
2965
}
2966
elf32_vfp11_erratum_type;
2967
2968
typedef struct elf32_vfp11_erratum_list
2969
{
2970
  struct elf32_vfp11_erratum_list *next;
2971
  bfd_vma vma;
2972
  union
2973
  {
2974
    struct
2975
    {
2976
      struct elf32_vfp11_erratum_list *veneer;
2977
      unsigned int vfp_insn;
2978
    } b;
2979
    struct
2980
    {
2981
      struct elf32_vfp11_erratum_list *branch;
2982
      unsigned int id;
2983
    } v;
2984
  } u;
2985
  elf32_vfp11_erratum_type type;
2986
}
2987
elf32_vfp11_erratum_list;
2988
2989
/* Information about a STM32L4XX erratum veneer, or a branch to such a
2990
   veneer.  */
2991
typedef enum
2992
{
2993
  STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2994
  STM32L4XX_ERRATUM_VENEER
2995
}
2996
elf32_stm32l4xx_erratum_type;
2997
2998
typedef struct elf32_stm32l4xx_erratum_list
2999
{
3000
  struct elf32_stm32l4xx_erratum_list *next;
3001
  bfd_vma vma;
3002
  union
3003
  {
3004
    struct
3005
    {
3006
      struct elf32_stm32l4xx_erratum_list *veneer;
3007
      unsigned int insn;
3008
    } b;
3009
    struct
3010
    {
3011
      struct elf32_stm32l4xx_erratum_list *branch;
3012
      unsigned int id;
3013
    } v;
3014
  } u;
3015
  elf32_stm32l4xx_erratum_type type;
3016
}
3017
elf32_stm32l4xx_erratum_list;
3018
3019
typedef enum
3020
{
3021
  DELETE_EXIDX_ENTRY,
3022
  INSERT_EXIDX_CANTUNWIND_AT_END
3023
}
3024
arm_unwind_edit_type;
3025
3026
/* A (sorted) list of edits to apply to an unwind table.  */
3027
typedef struct arm_unwind_table_edit
3028
{
3029
  arm_unwind_edit_type type;
3030
  /* Note: we sometimes want to insert an unwind entry corresponding to a
3031
     section different from the one we're currently writing out, so record the
3032
     (text) section this edit relates to here.  */
3033
  asection *linked_section;
3034
  unsigned int index;
3035
  struct arm_unwind_table_edit *next;
3036
}
3037
arm_unwind_table_edit;
3038
3039
typedef struct _arm_elf_section_data
3040
{
3041
  /* Information about mapping symbols.  */
3042
  struct bfd_elf_section_data elf;
3043
  unsigned int mapcount;
3044
  unsigned int mapsize;
3045
  elf32_arm_section_map *map;
3046
  /* Information about CPU errata.  */
3047
  unsigned int erratumcount;
3048
  elf32_vfp11_erratum_list *erratumlist;
3049
  unsigned int stm32l4xx_erratumcount;
3050
  elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3051
  unsigned int additional_reloc_count;
3052
  /* Information about unwind tables.  */
3053
  union
3054
  {
3055
    /* Unwind info attached to a text section.  */
3056
    struct
3057
    {
3058
      asection *arm_exidx_sec;
3059
    } text;
3060
3061
    /* Unwind info attached to an .ARM.exidx section.  */
3062
    struct
3063
    {
3064
      arm_unwind_table_edit *unwind_edit_list;
3065
      arm_unwind_table_edit *unwind_edit_tail;
3066
    } exidx;
3067
  } u;
3068
}
3069
_arm_elf_section_data;
3070
3071
#define elf32_arm_section_data(sec) \
3072
0
  ((_arm_elf_section_data *) elf_section_data (sec))
3073
3074
/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3075
   These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3076
   so may be created multiple times: we use an array of these entries whilst
3077
   relaxing which we can refresh easily, then create stubs for each potentially
3078
   erratum-triggering instruction once we've settled on a solution.  */
3079
3080
struct a8_erratum_fix
3081
{
3082
  bfd *input_bfd;
3083
  asection *section;
3084
  bfd_vma offset;
3085
  bfd_vma target_offset;
3086
  unsigned long orig_insn;
3087
  char *stub_name;
3088
  enum elf32_arm_stub_type stub_type;
3089
  enum arm_st_branch_type branch_type;
3090
};
3091
3092
/* A table of relocs applied to branches which might trigger Cortex-A8
3093
   erratum.  */
3094
3095
struct a8_erratum_reloc
3096
{
3097
  bfd_vma from;
3098
  bfd_vma destination;
3099
  struct elf32_arm_link_hash_entry *hash;
3100
  const char *sym_name;
3101
  unsigned int r_type;
3102
  enum arm_st_branch_type branch_type;
3103
  bool non_a8_stub;
3104
};
3105
3106
/* The size of the thread control block.  */
3107
#define TCB_SIZE  8
3108
3109
/* ARM-specific information about a PLT entry, over and above the usual
3110
   gotplt_union.  */
3111
struct arm_plt_info
3112
{
3113
  /* We reference count Thumb references to a PLT entry separately,
3114
     so that we can emit the Thumb trampoline only if needed.  */
3115
  bfd_signed_vma thumb_refcount;
3116
3117
  /* Some references from Thumb code may be eliminated by BL->BLX
3118
     conversion, so record them separately.  */
3119
  bfd_signed_vma maybe_thumb_refcount;
3120
3121
  /* How many of the recorded PLT accesses were from non-call relocations.
3122
     This information is useful when deciding whether anything takes the
3123
     address of an STT_GNU_IFUNC PLT.  A value of 0 means that all
3124
     non-call references to the function should resolve directly to the
3125
     real runtime target.  */
3126
  unsigned int noncall_refcount;
3127
3128
  /* Since PLT entries have variable size if the Thumb prologue is
3129
     used, we need to record the index into .got.plt instead of
3130
     recomputing it from the PLT offset.  */
3131
  bfd_signed_vma got_offset;
3132
};
3133
3134
/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol.  */
3135
struct arm_local_iplt_info
3136
{
3137
  /* The information that is usually found in the generic ELF part of
3138
     the hash table entry.  */
3139
  union gotplt_union root;
3140
3141
  /* The information that is usually found in the ARM-specific part of
3142
     the hash table entry.  */
3143
  struct arm_plt_info arm;
3144
3145
  /* A list of all potential dynamic relocations against this symbol.  */
3146
  struct elf_dyn_relocs *dyn_relocs;
3147
};
3148
3149
/* Structure to handle FDPIC support for local functions.  */
3150
struct fdpic_local
3151
{
3152
  unsigned int funcdesc_cnt;
3153
  unsigned int gotofffuncdesc_cnt;
3154
  int funcdesc_offset;
3155
};
3156
3157
struct elf_arm_obj_tdata
3158
{
3159
  struct elf_obj_tdata root;
3160
3161
  /* Zero to warn when linking objects with incompatible enum sizes.  */
3162
  int no_enum_size_warning;
3163
3164
  /* Zero to warn when linking objects with incompatible wchar_t sizes.  */
3165
  int no_wchar_size_warning;
3166
3167
  /* The number of entries in each of the arrays in this strcuture.
3168
     Used to avoid buffer overruns.  */
3169
  bfd_size_type num_entries;
3170
3171
  /* tls_type for each local got entry.  */
3172
  char *local_got_tls_type;
3173
3174
  /* GOTPLT entries for TLS descriptors.  */
3175
  bfd_vma *local_tlsdesc_gotent;
3176
3177
  /* Information for local symbols that need entries in .iplt.  */
3178
  struct arm_local_iplt_info **local_iplt;
3179
3180
  /* Maintains FDPIC counters and funcdesc info.  */
3181
  struct fdpic_local *local_fdpic_cnts;
3182
};
3183
3184
#define elf_arm_tdata(bfd) \
3185
0
  ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3186
3187
#define elf32_arm_num_entries(bfd) \
3188
0
  (elf_arm_tdata (bfd)->num_entries)
3189
3190
#define elf32_arm_local_got_tls_type(bfd) \
3191
0
  (elf_arm_tdata (bfd)->local_got_tls_type)
3192
3193
#define elf32_arm_local_tlsdesc_gotent(bfd) \
3194
0
  (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3195
3196
#define elf32_arm_local_iplt(bfd) \
3197
0
  (elf_arm_tdata (bfd)->local_iplt)
3198
3199
#define elf32_arm_local_fdpic_cnts(bfd) \
3200
0
  (elf_arm_tdata (bfd)->local_fdpic_cnts)
3201
3202
#define is_arm_elf(bfd) \
3203
0
  (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3204
0
   && elf_tdata (bfd) != NULL \
3205
0
   && elf_object_id (bfd) == ARM_ELF_DATA)
3206
3207
static bool
3208
elf32_arm_mkobject (bfd *abfd)
3209
491k
{
3210
491k
  return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3211
491k
          ARM_ELF_DATA);
3212
491k
}
3213
3214
0
#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3215
3216
/* Structure to handle FDPIC support for extern functions.  */
3217
struct fdpic_global {
3218
  unsigned int gotofffuncdesc_cnt;
3219
  unsigned int gotfuncdesc_cnt;
3220
  unsigned int funcdesc_cnt;
3221
  int funcdesc_offset;
3222
  int gotfuncdesc_offset;
3223
};
3224
3225
/* Arm ELF linker hash entry.  */
3226
struct elf32_arm_link_hash_entry
3227
{
3228
  struct elf_link_hash_entry root;
3229
3230
  /* ARM-specific PLT information.  */
3231
  struct arm_plt_info plt;
3232
3233
0
#define GOT_UNKNOWN 0
3234
0
#define GOT_NORMAL  1
3235
0
#define GOT_TLS_GD  2
3236
0
#define GOT_TLS_IE  4
3237
0
#define GOT_TLS_GDESC 8
3238
0
#define GOT_TLS_GD_ANY_P(type)  ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3239
  unsigned int tls_type : 8;
3240
3241
  /* True if the symbol's PLT entry is in .iplt rather than .plt.  */
3242
  unsigned int is_iplt : 1;
3243
3244
  unsigned int unused : 23;
3245
3246
  /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3247
     starting at the end of the jump table.  */
3248
  bfd_vma tlsdesc_got;
3249
3250
  /* The symbol marking the real symbol location for exported thumb
3251
     symbols with Arm stubs.  */
3252
  struct elf_link_hash_entry *export_glue;
3253
3254
  /* A pointer to the most recently used stub hash entry against this
3255
     symbol.  */
3256
  struct elf32_arm_stub_hash_entry *stub_cache;
3257
3258
  /* Counter for FDPIC relocations against this symbol.  */
3259
  struct fdpic_global fdpic_cnts;
3260
};
3261
3262
/* Traverse an arm ELF linker hash table.  */
3263
#define elf32_arm_link_hash_traverse(table, func, info)     \
3264
  (elf_link_hash_traverse           \
3265
   (&(table)->root,             \
3266
    (bool (*) (struct elf_link_hash_entry *, void *)) (func),   \
3267
    (info)))
3268
3269
/* Get the ARM elf linker hash table from a link_info structure.  */
3270
#define elf32_arm_hash_table(p) \
3271
0
  ((is_elf_hash_table ((p)->hash)          \
3272
0
    && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA)   \
3273
0
   ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
3274
3275
#define arm_stub_hash_lookup(table, string, create, copy) \
3276
0
  ((struct elf32_arm_stub_hash_entry *) \
3277
0
   bfd_hash_lookup ((table), (string), (create), (copy)))
3278
3279
/* Array to keep track of which stub sections have been created, and
3280
   information on stub grouping.  */
3281
struct map_stub
3282
{
3283
  /* This is the section to which stubs in the group will be
3284
     attached.  */
3285
  asection *link_sec;
3286
  /* The stub section.  */
3287
  asection *stub_sec;
3288
};
3289
3290
#define elf32_arm_compute_jump_table_size(htab) \
3291
0
  ((htab)->next_tls_desc_index * 4)
3292
3293
/* ARM ELF linker hash table.  */
3294
struct elf32_arm_link_hash_table
3295
{
3296
  /* The main hash table.  */
3297
  struct elf_link_hash_table root;
3298
3299
  /* The size in bytes of the section containing the Thumb-to-ARM glue.  */
3300
  bfd_size_type thumb_glue_size;
3301
3302
  /* The size in bytes of the section containing the ARM-to-Thumb glue.  */
3303
  bfd_size_type arm_glue_size;
3304
3305
  /* The size in bytes of section containing the ARMv4 BX veneers.  */
3306
  bfd_size_type bx_glue_size;
3307
3308
  /* Offsets of ARMv4 BX veneers.  Bit1 set if present, and Bit0 set when
3309
     veneer has been populated.  */
3310
  bfd_vma bx_glue_offset[15];
3311
3312
  /* The size in bytes of the section containing glue for VFP11 erratum
3313
     veneers.  */
3314
  bfd_size_type vfp11_erratum_glue_size;
3315
3316
 /* The size in bytes of the section containing glue for STM32L4XX erratum
3317
     veneers.  */
3318
  bfd_size_type stm32l4xx_erratum_glue_size;
3319
3320
  /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum.  This
3321
     holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3322
     elf32_arm_write_section().  */
3323
  struct a8_erratum_fix *a8_erratum_fixes;
3324
  unsigned int num_a8_erratum_fixes;
3325
3326
  /* An arbitrary input BFD chosen to hold the glue sections.  */
3327
  bfd * bfd_of_glue_owner;
3328
3329
  /* Nonzero to output a BE8 image.  */
3330
  int byteswap_code;
3331
3332
  /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3333
     Nonzero if R_ARM_TARGET1 means R_ARM_REL32.  */
3334
  int target1_is_rel;
3335
3336
  /* The relocation to use for R_ARM_TARGET2 relocations.  */
3337
  int target2_reloc;
3338
3339
  /* 0 = Ignore R_ARM_V4BX.
3340
     1 = Convert BX to MOV PC.
3341
     2 = Generate v4 interworing stubs.  */
3342
  int fix_v4bx;
3343
3344
  /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum.  */
3345
  int fix_cortex_a8;
3346
3347
  /* Whether we should fix the ARM1176 BLX immediate issue.  */
3348
  int fix_arm1176;
3349
3350
  /* Nonzero if the ARM/Thumb BLX instructions are available for use.  */
3351
  int use_blx;
3352
3353
  /* What sort of code sequences we should look for which may trigger the
3354
     VFP11 denorm erratum.  */
3355
  bfd_arm_vfp11_fix vfp11_fix;
3356
3357
  /* Global counter for the number of fixes we have emitted.  */
3358
  int num_vfp11_fixes;
3359
3360
  /* What sort of code sequences we should look for which may trigger the
3361
     STM32L4XX erratum.  */
3362
  bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3363
3364
  /* Global counter for the number of fixes we have emitted.  */
3365
  int num_stm32l4xx_fixes;
3366
3367
  /* Nonzero to force PIC branch veneers.  */
3368
  int pic_veneer;
3369
3370
  /* The number of bytes in the initial entry in the PLT.  */
3371
  bfd_size_type plt_header_size;
3372
3373
  /* The number of bytes in the subsequent PLT etries.  */
3374
  bfd_size_type plt_entry_size;
3375
3376
  /* True if the target uses REL relocations.  */
3377
  bool use_rel;
3378
3379
  /* Nonzero if import library must be a secure gateway import library
3380
     as per ARMv8-M Security Extensions.  */
3381
  int cmse_implib;
3382
3383
  /* The import library whose symbols' address must remain stable in
3384
     the import library generated.  */
3385
  bfd *in_implib_bfd;
3386
3387
  /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt.  */
3388
  bfd_vma next_tls_desc_index;
3389
3390
  /* How many R_ARM_TLS_DESC relocations were generated so far.  */
3391
  bfd_vma num_tls_desc;
3392
3393
  /* The (unloaded but important) VxWorks .rela.plt.unloaded section.  */
3394
  asection *srelplt2;
3395
3396
  /* Offset in .plt section of tls_arm_trampoline.  */
3397
  bfd_vma tls_trampoline;
3398
3399
  /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations.  */
3400
  union
3401
  {
3402
    bfd_signed_vma refcount;
3403
    bfd_vma offset;
3404
  } tls_ldm_got;
3405
3406
  /* For convenience in allocate_dynrelocs.  */
3407
  bfd * obfd;
3408
3409
  /* The amount of space used by the reserved portion of the sgotplt
3410
     section, plus whatever space is used by the jump slots.  */
3411
  bfd_vma sgotplt_jump_table_size;
3412
3413
  /* The stub hash table.  */
3414
  struct bfd_hash_table stub_hash_table;
3415
3416
  /* Linker stub bfd.  */
3417
  bfd *stub_bfd;
3418
3419
  /* Linker call-backs.  */
3420
  asection * (*add_stub_section) (const char *, asection *, asection *,
3421
          unsigned int);
3422
  void (*layout_sections_again) (void);
3423
3424
  /* Array to keep track of which stub sections have been created, and
3425
     information on stub grouping.  */
3426
  struct map_stub *stub_group;
3427
3428
  /* Input stub section holding secure gateway veneers.  */
3429
  asection *cmse_stub_sec;
3430
3431
  /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3432
     start to be allocated.  */
3433
  bfd_vma new_cmse_stub_offset;
3434
3435
  /* Number of elements in stub_group.  */
3436
  unsigned int top_id;
3437
3438
  /* Assorted information used by elf32_arm_size_stubs.  */
3439
  unsigned int bfd_count;
3440
  unsigned int top_index;
3441
  asection **input_list;
3442
3443
  /* True if the target system uses FDPIC. */
3444
  int fdpic_p;
3445
3446
  /* Fixup section. Used for FDPIC.  */
3447
  asection *srofixup;
3448
};
3449
3450
/* Add an FDPIC read-only fixup.  */
3451
static void
3452
arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3453
0
{
3454
0
  bfd_vma fixup_offset;
3455
3456
0
  fixup_offset = srofixup->reloc_count++ * 4;
3457
0
  BFD_ASSERT (fixup_offset < srofixup->size);
3458
0
  bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3459
0
}
3460
3461
static inline int
3462
ctz (unsigned int mask)
3463
0
{
3464
0
#if GCC_VERSION >= 3004
3465
0
  return __builtin_ctz (mask);
3466
#else
3467
  unsigned int i;
3468
3469
  for (i = 0; i < 8 * sizeof (mask); i++)
3470
    {
3471
      if (mask & 0x1)
3472
  break;
3473
      mask = (mask >> 1);
3474
    }
3475
  return i;
3476
#endif
3477
0
}
3478
3479
static inline int
3480
elf32_arm_popcount (unsigned int mask)
3481
0
{
3482
0
#if GCC_VERSION >= 3004
3483
0
  return __builtin_popcount (mask);
3484
#else
3485
  unsigned int i;
3486
  int sum = 0;
3487
3488
  for (i = 0; i < 8 * sizeof (mask); i++)
3489
    {
3490
      if (mask & 0x1)
3491
  sum++;
3492
      mask = (mask >> 1);
3493
    }
3494
  return sum;
3495
#endif
3496
0
}
3497
3498
static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3499
            asection *sreloc, Elf_Internal_Rela *rel);
3500
3501
static void
3502
arm_elf_fill_funcdesc (bfd *output_bfd,
3503
           struct bfd_link_info *info,
3504
           int *funcdesc_offset,
3505
           int dynindx,
3506
           int offset,
3507
           bfd_vma addr,
3508
           bfd_vma dynreloc_value,
3509
           bfd_vma seg)
3510
0
{
3511
0
  if ((*funcdesc_offset & 1) == 0)
3512
0
    {
3513
0
      struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3514
0
      asection *sgot = globals->root.sgot;
3515
3516
0
      if (bfd_link_pic (info))
3517
0
  {
3518
0
    asection *srelgot = globals->root.srelgot;
3519
0
    Elf_Internal_Rela outrel;
3520
3521
0
    outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3522
0
    outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3523
0
    outrel.r_addend = 0;
3524
3525
0
    elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3526
0
    bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3527
0
    bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3528
0
  }
3529
0
      else
3530
0
  {
3531
0
    struct elf_link_hash_entry *hgot = globals->root.hgot;
3532
0
    bfd_vma got_value = hgot->root.u.def.value
3533
0
      + hgot->root.u.def.section->output_section->vma
3534
0
      + hgot->root.u.def.section->output_offset;
3535
3536
0
    arm_elf_add_rofixup (output_bfd, globals->srofixup,
3537
0
             sgot->output_section->vma + sgot->output_offset
3538
0
             + offset);
3539
0
    arm_elf_add_rofixup (output_bfd, globals->srofixup,
3540
0
             sgot->output_section->vma + sgot->output_offset
3541
0
             + offset + 4);
3542
0
    bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3543
0
    bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3544
0
  }
3545
0
      *funcdesc_offset |= 1;
3546
0
    }
3547
0
}
3548
3549
/* Create an entry in an ARM ELF linker hash table.  */
3550
3551
static struct bfd_hash_entry *
3552
elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3553
           struct bfd_hash_table * table,
3554
           const char * string)
3555
0
{
3556
0
  struct elf32_arm_link_hash_entry * ret =
3557
0
    (struct elf32_arm_link_hash_entry *) entry;
3558
3559
  /* Allocate the structure if it has not already been allocated by a
3560
     subclass.  */
3561
0
  if (ret == NULL)
3562
0
    ret = (struct elf32_arm_link_hash_entry *)
3563
0
  bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3564
0
  if (ret == NULL)
3565
0
    return (struct bfd_hash_entry *) ret;
3566
3567
  /* Call the allocation method of the superclass.  */
3568
0
  ret = ((struct elf32_arm_link_hash_entry *)
3569
0
   _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3570
0
             table, string));
3571
0
  if (ret != NULL)
3572
0
    {
3573
0
      ret->tls_type = GOT_UNKNOWN;
3574
0
      ret->tlsdesc_got = (bfd_vma) -1;
3575
0
      ret->plt.thumb_refcount = 0;
3576
0
      ret->plt.maybe_thumb_refcount = 0;
3577
0
      ret->plt.noncall_refcount = 0;
3578
0
      ret->plt.got_offset = -1;
3579
0
      ret->is_iplt = false;
3580
0
      ret->export_glue = NULL;
3581
3582
0
      ret->stub_cache = NULL;
3583
3584
0
      ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3585
0
      ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3586
0
      ret->fdpic_cnts.funcdesc_cnt = 0;
3587
0
      ret->fdpic_cnts.funcdesc_offset = -1;
3588
0
      ret->fdpic_cnts.gotfuncdesc_offset = -1;
3589
0
    }
3590
3591
0
  return (struct bfd_hash_entry *) ret;
3592
0
}
3593
3594
/* Ensure that we have allocated bookkeeping structures for ABFD's local
3595
   symbols.  */
3596
3597
static bool
3598
elf32_arm_allocate_local_sym_info (bfd *abfd)
3599
0
{
3600
0
  if (elf_local_got_refcounts (abfd) == NULL)
3601
0
    {
3602
0
      bfd_size_type num_syms;
3603
3604
0
      elf32_arm_num_entries (abfd) = 0;
3605
3606
      /* Whilst it might be tempting to allocate a single block of memory and
3607
   then divide it up amoungst the arrays in the elf_arm_obj_tdata
3608
   structure, this interferes with the work of memory checkers looking
3609
   for buffer overruns.  So allocate each array individually.  */
3610
3611
0
      num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3612
3613
0
      elf_local_got_refcounts (abfd) = bfd_zalloc
3614
0
  (abfd, num_syms * sizeof (* elf_local_got_refcounts (abfd)));
3615
3616
0
      if (elf_local_got_refcounts (abfd) == NULL)
3617
0
  return false;
3618
3619
0
      elf32_arm_local_tlsdesc_gotent (abfd) = bfd_zalloc
3620
0
  (abfd, num_syms * sizeof (* elf32_arm_local_tlsdesc_gotent (abfd)));
3621
3622
0
      if (elf32_arm_local_tlsdesc_gotent (abfd) == NULL)
3623
0
  return false;
3624
3625
0
      elf32_arm_local_iplt (abfd) = bfd_zalloc
3626
0
  (abfd, num_syms * sizeof (* elf32_arm_local_iplt (abfd)));
3627
3628
0
      if (elf32_arm_local_iplt (abfd) == NULL)
3629
0
  return false;
3630
3631
0
      elf32_arm_local_fdpic_cnts (abfd) = bfd_zalloc
3632
0
  (abfd, num_syms * sizeof (* elf32_arm_local_fdpic_cnts (abfd)));
3633
3634
0
      if (elf32_arm_local_fdpic_cnts (abfd) == NULL)
3635
0
  return false;
3636
3637
0
      elf32_arm_local_got_tls_type (abfd) = bfd_zalloc
3638
0
  (abfd, num_syms * sizeof (* elf32_arm_local_got_tls_type (abfd)));
3639
3640
0
      if (elf32_arm_local_got_tls_type (abfd) == NULL)
3641
0
  return false;
3642
3643
0
      elf32_arm_num_entries (abfd) = num_syms;
3644
3645
0
#if GCC_VERSION >= 3000
3646
0
      BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
3647
0
      <= __alignof__ (*elf_local_got_refcounts (abfd)));
3648
0
      BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
3649
0
      <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
3650
0
      BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
3651
0
      <= __alignof__ (*elf32_arm_local_iplt (abfd)));
3652
0
      BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
3653
0
      <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
3654
0
#endif
3655
0
    }
3656
0
  return true;
3657
0
}
3658
3659
/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3660
   to input bfd ABFD.  Create the information if it doesn't already exist.
3661
   Return null if an allocation fails.  */
3662
3663
static struct arm_local_iplt_info *
3664
elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3665
0
{
3666
0
  struct arm_local_iplt_info **ptr;
3667
3668
0
  if (!elf32_arm_allocate_local_sym_info (abfd))
3669
0
    return NULL;
3670
3671
0
  BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3672
0
  BFD_ASSERT (r_symndx < elf32_arm_num_entries (abfd));
3673
0
  ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3674
0
  if (*ptr == NULL)
3675
0
    *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3676
0
  return *ptr;
3677
0
}
3678
3679
/* Try to obtain PLT information for the symbol with index R_SYMNDX
3680
   in ABFD's symbol table.  If the symbol is global, H points to its
3681
   hash table entry, otherwise H is null.
3682
3683
   Return true if the symbol does have PLT information.  When returning
3684
   true, point *ROOT_PLT at the target-independent reference count/offset
3685
   union and *ARM_PLT at the ARM-specific information.  */
3686
3687
static bool
3688
elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3689
      struct elf32_arm_link_hash_entry *h,
3690
      unsigned long r_symndx, union gotplt_union **root_plt,
3691
      struct arm_plt_info **arm_plt)
3692
0
{
3693
0
  struct arm_local_iplt_info *local_iplt;
3694
3695
0
  if (globals->root.splt == NULL && globals->root.iplt == NULL)
3696
0
    return false;
3697
3698
0
  if (h != NULL)
3699
0
    {
3700
0
      *root_plt = &h->root.plt;
3701
0
      *arm_plt = &h->plt;
3702
0
      return true;
3703
0
    }
3704
3705
0
  if (elf32_arm_local_iplt (abfd) == NULL)
3706
0
    return false;
3707
3708
0
  if (r_symndx >= elf32_arm_num_entries (abfd))
3709
0
    return false;
3710
3711
0
  local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3712
0
  if (local_iplt == NULL)
3713
0
    return false;
3714
3715
0
  *root_plt = &local_iplt->root;
3716
0
  *arm_plt = &local_iplt->arm;
3717
0
  return true;
3718
0
}
3719
3720
static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
3721
3722
/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3723
   before it.  */
3724
3725
static bool
3726
elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3727
          struct arm_plt_info *arm_plt)
3728
0
{
3729
0
  struct elf32_arm_link_hash_table *htab;
3730
3731
0
  htab = elf32_arm_hash_table (info);
3732
3733
0
  return (!using_thumb_only (htab) && (arm_plt->thumb_refcount != 0
3734
0
    || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3735
0
}
3736
3737
/* Return a pointer to the head of the dynamic reloc list that should
3738
   be used for local symbol ISYM, which is symbol number R_SYMNDX in
3739
   ABFD's symbol table.  Return null if an error occurs.  */
3740
3741
static struct elf_dyn_relocs **
3742
elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3743
           Elf_Internal_Sym *isym)
3744
0
{
3745
0
  if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3746
0
    {
3747
0
      struct arm_local_iplt_info *local_iplt;
3748
3749
0
      local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3750
0
      if (local_iplt == NULL)
3751
0
  return NULL;
3752
0
      return &local_iplt->dyn_relocs;
3753
0
    }
3754
0
  else
3755
0
    {
3756
      /* Track dynamic relocs needed for local syms too.
3757
   We really need local syms available to do this
3758
   easily.  Oh well.  */
3759
0
      asection *s;
3760
0
      void *vpp;
3761
3762
0
      s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3763
0
      if (s == NULL)
3764
0
  return NULL;
3765
3766
0
      vpp = &elf_section_data (s)->local_dynrel;
3767
0
      return (struct elf_dyn_relocs **) vpp;
3768
0
    }
3769
0
}
3770
3771
/* Initialize an entry in the stub hash table.  */
3772
3773
static struct bfd_hash_entry *
3774
stub_hash_newfunc (struct bfd_hash_entry *entry,
3775
       struct bfd_hash_table *table,
3776
       const char *string)
3777
0
{
3778
  /* Allocate the structure if it has not already been allocated by a
3779
     subclass.  */
3780
0
  if (entry == NULL)
3781
0
    {
3782
0
      entry = (struct bfd_hash_entry *)
3783
0
    bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3784
0
      if (entry == NULL)
3785
0
  return entry;
3786
0
    }
3787
3788
  /* Call the allocation method of the superclass.  */
3789
0
  entry = bfd_hash_newfunc (entry, table, string);
3790
0
  if (entry != NULL)
3791
0
    {
3792
0
      struct elf32_arm_stub_hash_entry *eh;
3793
3794
      /* Initialize the local fields.  */
3795
0
      eh = (struct elf32_arm_stub_hash_entry *) entry;
3796
0
      eh->stub_sec = NULL;
3797
0
      eh->stub_offset = (bfd_vma) -1;
3798
0
      eh->source_value = 0;
3799
0
      eh->target_value = 0;
3800
0
      eh->target_section = NULL;
3801
0
      eh->orig_insn = 0;
3802
0
      eh->stub_type = arm_stub_none;
3803
0
      eh->stub_size = 0;
3804
0
      eh->stub_template = NULL;
3805
0
      eh->stub_template_size = -1;
3806
0
      eh->h = NULL;
3807
0
      eh->id_sec = NULL;
3808
0
      eh->output_name = NULL;
3809
0
    }
3810
3811
0
  return entry;
3812
0
}
3813
3814
/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3815
   shortcuts to them in our hash table.  */
3816
3817
static bool
3818
create_got_section (bfd *dynobj, struct bfd_link_info *info)
3819
0
{
3820
0
  struct elf32_arm_link_hash_table *htab;
3821
3822
0
  htab = elf32_arm_hash_table (info);
3823
0
  if (htab == NULL)
3824
0
    return false;
3825
3826
0
  if (! _bfd_elf_create_got_section (dynobj, info))
3827
0
    return false;
3828
3829
  /* Also create .rofixup.  */
3830
0
  if (htab->fdpic_p)
3831
0
    {
3832
0
      htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3833
0
                (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3834
0
                 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3835
0
      if (htab->srofixup == NULL
3836
0
    || !bfd_set_section_alignment (htab->srofixup, 2))
3837
0
  return false;
3838
0
    }
3839
3840
0
  return true;
3841
0
}
3842
3843
/* Create the .iplt, .rel(a).iplt and .igot.plt sections.  */
3844
3845
static bool
3846
create_ifunc_sections (struct bfd_link_info *info)
3847
0
{
3848
0
  struct elf32_arm_link_hash_table *htab;
3849
0
  const struct elf_backend_data *bed;
3850
0
  bfd *dynobj;
3851
0
  asection *s;
3852
0
  flagword flags;
3853
3854
0
  htab = elf32_arm_hash_table (info);
3855
0
  dynobj = htab->root.dynobj;
3856
0
  bed = get_elf_backend_data (dynobj);
3857
0
  flags = bed->dynamic_sec_flags;
3858
3859
0
  if (htab->root.iplt == NULL)
3860
0
    {
3861
0
      s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3862
0
                flags | SEC_READONLY | SEC_CODE);
3863
0
      if (s == NULL
3864
0
    || !bfd_set_section_alignment (s, bed->plt_alignment))
3865
0
  return false;
3866
0
      htab->root.iplt = s;
3867
0
    }
3868
3869
0
  if (htab->root.irelplt == NULL)
3870
0
    {
3871
0
      s = bfd_make_section_anyway_with_flags (dynobj,
3872
0
                RELOC_SECTION (htab, ".iplt"),
3873
0
                flags | SEC_READONLY);
3874
0
      if (s == NULL
3875
0
    || !bfd_set_section_alignment (s, bed->s->log_file_align))
3876
0
  return false;
3877
0
      htab->root.irelplt = s;
3878
0
    }
3879
3880
0
  if (htab->root.igotplt == NULL)
3881
0
    {
3882
0
      s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3883
0
      if (s == NULL
3884
0
    || !bfd_set_section_alignment (s, bed->s->log_file_align))
3885
0
  return false;
3886
0
      htab->root.igotplt = s;
3887
0
    }
3888
0
  return true;
3889
0
}
3890
3891
/* Determine if we're dealing with a Thumb only architecture.  */
3892
3893
static bool
3894
using_thumb_only (struct elf32_arm_link_hash_table *globals)
3895
0
{
3896
0
  int arch;
3897
0
  int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3898
0
            Tag_CPU_arch_profile);
3899
3900
0
  if (profile)
3901
0
    return profile == 'M';
3902
3903
0
  arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3904
3905
  /* Force return logic to be reviewed for each new architecture.  */
3906
0
  BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3907
3908
0
  if (arch == TAG_CPU_ARCH_V6_M
3909
0
      || arch == TAG_CPU_ARCH_V6S_M
3910
0
      || arch == TAG_CPU_ARCH_V7E_M
3911
0
      || arch == TAG_CPU_ARCH_V8M_BASE
3912
0
      || arch == TAG_CPU_ARCH_V8M_MAIN
3913
0
      || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3914
0
    return true;
3915
3916
0
  return false;
3917
0
}
3918
3919
/* Determine if we're dealing with a Thumb-2 object.  */
3920
3921
static bool
3922
using_thumb2 (struct elf32_arm_link_hash_table *globals)
3923
0
{
3924
0
  int arch;
3925
0
  int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3926
0
              Tag_THUMB_ISA_use);
3927
3928
  /* No use of thumb permitted, or a legacy thumb-1/2 definition.  */
3929
0
  if (thumb_isa < 3)
3930
0
    return thumb_isa == 2;
3931
3932
  /* Variant of thumb is described by the architecture tag.  */
3933
0
  arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3934
3935
  /* Force return logic to be reviewed for each new architecture.  */
3936
0
  BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3937
3938
0
  return (arch == TAG_CPU_ARCH_V6T2
3939
0
    || arch == TAG_CPU_ARCH_V7
3940
0
    || arch == TAG_CPU_ARCH_V7E_M
3941
0
    || arch == TAG_CPU_ARCH_V8
3942
0
    || arch == TAG_CPU_ARCH_V8R
3943
0
    || arch == TAG_CPU_ARCH_V8M_MAIN
3944
0
    || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3945
0
}
3946
3947
/* Determine whether Thumb-2 BL instruction is available.  */
3948
3949
static bool
3950
using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3951
0
{
3952
0
  int arch =
3953
0
    bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3954
3955
  /* Force return logic to be reviewed for each new architecture.  */
3956
0
  BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
3957
3958
  /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M).  */
3959
0
  return (arch == TAG_CPU_ARCH_V6T2
3960
0
    || arch >= TAG_CPU_ARCH_V7);
3961
0
}
3962
3963
/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3964
   .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3965
   hash table.  */
3966
3967
static bool
3968
elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3969
0
{
3970
0
  struct elf32_arm_link_hash_table *htab;
3971
3972
0
  htab = elf32_arm_hash_table (info);
3973
0
  if (htab == NULL)
3974
0
    return false;
3975
3976
0
  if (!htab->root.sgot && !create_got_section (dynobj, info))
3977
0
    return false;
3978
3979
0
  if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3980
0
    return false;
3981
3982
0
  if (htab->root.target_os == is_vxworks)
3983
0
    {
3984
0
      if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3985
0
  return false;
3986
3987
0
      if (bfd_link_pic (info))
3988
0
  {
3989
0
    htab->plt_header_size = 0;
3990
0
    htab->plt_entry_size
3991
0
      = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3992
0
  }
3993
0
      else
3994
0
  {
3995
0
    htab->plt_header_size
3996
0
      = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3997
0
    htab->plt_entry_size
3998
0
      = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3999
0
  }
4000
4001
0
      if (elf_elfheader (dynobj))
4002
0
  elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
4003
0
    }
4004
0
  else
4005
0
    {
4006
      /* PR ld/16017
4007
   Test for thumb only architectures.  Note - we cannot just call
4008
   using_thumb_only() as the attributes in the output bfd have not been
4009
   initialised at this point, so instead we use the input bfd.  */
4010
0
      bfd * saved_obfd = htab->obfd;
4011
4012
0
      htab->obfd = dynobj;
4013
0
      if (using_thumb_only (htab))
4014
0
  {
4015
0
    htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
4016
0
    htab->plt_entry_size  = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
4017
0
  }
4018
0
      htab->obfd = saved_obfd;
4019
0
    }
4020
4021
0
  if (htab->fdpic_p) {
4022
0
    htab->plt_header_size = 0;
4023
0
    if (info->flags & DF_BIND_NOW)
4024
0
      htab->plt_entry_size = 4 * (ARRAY_SIZE (elf32_arm_fdpic_plt_entry) - 5);
4025
0
    else
4026
0
      htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry);
4027
0
  }
4028
4029
0
  if (!htab->root.splt
4030
0
      || !htab->root.srelplt
4031
0
      || !htab->root.sdynbss
4032
0
      || (!bfd_link_pic (info) && !htab->root.srelbss))
4033
0
    abort ();
4034
4035
0
  return true;
4036
0
}
4037
4038
/* Copy the extra info we tack onto an elf_link_hash_entry.  */
4039
4040
static void
4041
elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4042
        struct elf_link_hash_entry *dir,
4043
        struct elf_link_hash_entry *ind)
4044
0
{
4045
0
  struct elf32_arm_link_hash_entry *edir, *eind;
4046
4047
0
  edir = (struct elf32_arm_link_hash_entry *) dir;
4048
0
  eind = (struct elf32_arm_link_hash_entry *) ind;
4049
4050
0
  if (ind->root.type == bfd_link_hash_indirect)
4051
0
    {
4052
      /* Copy over PLT info.  */
4053
0
      edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4054
0
      eind->plt.thumb_refcount = 0;
4055
0
      edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4056
0
      eind->plt.maybe_thumb_refcount = 0;
4057
0
      edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4058
0
      eind->plt.noncall_refcount = 0;
4059
4060
      /* Copy FDPIC counters.  */
4061
0
      edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4062
0
      edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4063
0
      edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4064
4065
      /* We should only allocate a function to .iplt once the final
4066
   symbol information is known.  */
4067
0
      BFD_ASSERT (!eind->is_iplt);
4068
4069
0
      if (dir->got.refcount <= 0)
4070
0
  {
4071
0
    edir->tls_type = eind->tls_type;
4072
0
    eind->tls_type = GOT_UNKNOWN;
4073
0
  }
4074
0
    }
4075
4076
0
  _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4077
0
}
4078
4079
/* Destroy an ARM elf linker hash table.  */
4080
4081
static void
4082
elf32_arm_link_hash_table_free (bfd *obfd)
4083
0
{
4084
0
  struct elf32_arm_link_hash_table *ret
4085
0
    = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4086
4087
0
  bfd_hash_table_free (&ret->stub_hash_table);
4088
0
  _bfd_elf_link_hash_table_free (obfd);
4089
0
}
4090
4091
/* Create an ARM elf linker hash table.  */
4092
4093
static struct bfd_link_hash_table *
4094
elf32_arm_link_hash_table_create (bfd *abfd)
4095
0
{
4096
0
  struct elf32_arm_link_hash_table *ret;
4097
0
  size_t amt = sizeof (struct elf32_arm_link_hash_table);
4098
4099
0
  ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4100
0
  if (ret == NULL)
4101
0
    return NULL;
4102
4103
0
  if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4104
0
              elf32_arm_link_hash_newfunc,
4105
0
              sizeof (struct elf32_arm_link_hash_entry),
4106
0
              ARM_ELF_DATA))
4107
0
    {
4108
0
      free (ret);
4109
0
      return NULL;
4110
0
    }
4111
4112
0
  ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4113
0
  ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4114
#ifdef FOUR_WORD_PLT
4115
  ret->plt_header_size = 16;
4116
  ret->plt_entry_size = 16;
4117
#else
4118
0
  ret->plt_header_size = 20;
4119
0
  ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4120
0
#endif
4121
0
  ret->use_rel = true;
4122
0
  ret->obfd = abfd;
4123
0
  ret->fdpic_p = 0;
4124
4125
0
  if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4126
0
          sizeof (struct elf32_arm_stub_hash_entry)))
4127
0
    {
4128
0
      _bfd_elf_link_hash_table_free (abfd);
4129
0
      return NULL;
4130
0
    }
4131
0
  ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4132
4133
0
  return &ret->root.root;
4134
0
}
4135
4136
/* Determine what kind of NOPs are available.  */
4137
4138
static bool
4139
arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4140
0
{
4141
0
  const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4142
0
               Tag_CPU_arch);
4143
4144
  /* Force return logic to be reviewed for each new architecture.  */
4145
0
  BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
4146
4147
0
  return (arch == TAG_CPU_ARCH_V6T2
4148
0
    || arch == TAG_CPU_ARCH_V6K
4149
0
    || arch == TAG_CPU_ARCH_V7
4150
0
    || arch == TAG_CPU_ARCH_V8
4151
0
    || arch == TAG_CPU_ARCH_V8R
4152
0
    || arch == TAG_CPU_ARCH_V9);
4153
0
}
4154
4155
static bool
4156
arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4157
0
{
4158
0
  switch (stub_type)
4159
0
    {
4160
0
    case arm_stub_long_branch_thumb_only:
4161
0
    case arm_stub_long_branch_thumb2_only:
4162
0
    case arm_stub_long_branch_thumb2_only_pure:
4163
0
    case arm_stub_long_branch_v4t_thumb_arm:
4164
0
    case arm_stub_short_branch_v4t_thumb_arm:
4165
0
    case arm_stub_long_branch_v4t_thumb_arm_pic:
4166
0
    case arm_stub_long_branch_v4t_thumb_tls_pic:
4167
0
    case arm_stub_long_branch_thumb_only_pic:
4168
0
    case arm_stub_cmse_branch_thumb_only:
4169
0
      return true;
4170
0
    case arm_stub_none:
4171
0
      BFD_FAIL ();
4172
0
      return false;
4173
0
      break;
4174
0
    default:
4175
0
      return false;
4176
0
    }
4177
0
}
4178
4179
/* Determine the type of stub needed, if any, for a call.  */
4180
4181
static enum elf32_arm_stub_type
4182
arm_type_of_stub (struct bfd_link_info *info,
4183
      asection *input_sec,
4184
      const Elf_Internal_Rela *rel,
4185
      unsigned char st_type,
4186
      enum arm_st_branch_type *actual_branch_type,
4187
      struct elf32_arm_link_hash_entry *hash,
4188
      bfd_vma destination,
4189
      asection *sym_sec,
4190
      bfd *input_bfd,
4191
      const char *name)
4192
0
{
4193
0
  bfd_vma location;
4194
0
  bfd_signed_vma branch_offset;
4195
0
  unsigned int r_type;
4196
0
  struct elf32_arm_link_hash_table * globals;
4197
0
  bool thumb2, thumb2_bl, thumb_only;
4198
0
  enum elf32_arm_stub_type stub_type = arm_stub_none;
4199
0
  int use_plt = 0;
4200
0
  enum arm_st_branch_type branch_type = *actual_branch_type;
4201
0
  union gotplt_union *root_plt;
4202
0
  struct arm_plt_info *arm_plt;
4203
0
  int arch;
4204
0
  int thumb2_movw;
4205
4206
0
  if (branch_type == ST_BRANCH_LONG)
4207
0
    return stub_type;
4208
4209
0
  globals = elf32_arm_hash_table (info);
4210
0
  if (globals == NULL)
4211
0
    return stub_type;
4212
4213
0
  thumb_only = using_thumb_only (globals);
4214
0
  thumb2 = using_thumb2 (globals);
4215
0
  thumb2_bl = using_thumb2_bl (globals);
4216
4217
0
  arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4218
4219
  /* True for architectures that implement the thumb2 movw instruction.  */
4220
0
  thumb2_movw = thumb2 || (arch  == TAG_CPU_ARCH_V8M_BASE);
4221
4222
  /* Determine where the call point is.  */
4223
0
  location = (input_sec->output_offset
4224
0
        + input_sec->output_section->vma
4225
0
        + rel->r_offset);
4226
4227
0
  r_type = ELF32_R_TYPE (rel->r_info);
4228
4229
  /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4230
     are considering a function call relocation.  */
4231
0
  if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4232
0
         || r_type == R_ARM_THM_JUMP19)
4233
0
      && branch_type == ST_BRANCH_TO_ARM)
4234
0
    branch_type = ST_BRANCH_TO_THUMB;
4235
4236
  /* For TLS call relocs, it is the caller's responsibility to provide
4237
     the address of the appropriate trampoline.  */
4238
0
  if (r_type != R_ARM_TLS_CALL
4239
0
      && r_type != R_ARM_THM_TLS_CALL
4240
0
      && elf32_arm_get_plt_info (input_bfd, globals, hash,
4241
0
         ELF32_R_SYM (rel->r_info), &root_plt,
4242
0
         &arm_plt)
4243
0
      && root_plt->offset != (bfd_vma) -1)
4244
0
    {
4245
0
      asection *splt;
4246
4247
0
      if (hash == NULL || hash->is_iplt)
4248
0
  splt = globals->root.iplt;
4249
0
      else
4250
0
  splt = globals->root.splt;
4251
0
      if (splt != NULL)
4252
0
  {
4253
0
    use_plt = 1;
4254
4255
    /* Note when dealing with PLT entries: the main PLT stub is in
4256
       ARM mode, so if the branch is in Thumb mode, another
4257
       Thumb->ARM stub will be inserted later just before the ARM
4258
       PLT stub. If a long branch stub is needed, we'll add a
4259
       Thumb->Arm one and branch directly to the ARM PLT entry.
4260
       Here, we have to check if a pre-PLT Thumb->ARM stub
4261
       is needed and if it will be close enough.  */
4262
4263
0
    destination = (splt->output_section->vma
4264
0
       + splt->output_offset
4265
0
       + root_plt->offset);
4266
0
    st_type = STT_FUNC;
4267
4268
    /* Thumb branch/call to PLT: it can become a branch to ARM
4269
       or to Thumb. We must perform the same checks and
4270
       corrections as in elf32_arm_final_link_relocate.  */
4271
0
    if ((r_type == R_ARM_THM_CALL)
4272
0
        || (r_type == R_ARM_THM_JUMP24))
4273
0
      {
4274
0
        if (globals->use_blx
4275
0
      && r_type == R_ARM_THM_CALL
4276
0
      && !thumb_only)
4277
0
    {
4278
      /* If the Thumb BLX instruction is available, convert
4279
         the BL to a BLX instruction to call the ARM-mode
4280
         PLT entry.  */
4281
0
      branch_type = ST_BRANCH_TO_ARM;
4282
0
    }
4283
0
        else
4284
0
    {
4285
0
      if (!thumb_only)
4286
        /* Target the Thumb stub before the ARM PLT entry.  */
4287
0
        destination -= PLT_THUMB_STUB_SIZE;
4288
0
      branch_type = ST_BRANCH_TO_THUMB;
4289
0
    }
4290
0
      }
4291
0
    else
4292
0
      {
4293
0
        branch_type = ST_BRANCH_TO_ARM;
4294
0
      }
4295
0
  }
4296
0
    }
4297
  /* Calls to STT_GNU_IFUNC symbols should go through a PLT.  */
4298
0
  BFD_ASSERT (st_type != STT_GNU_IFUNC);
4299
4300
0
  branch_offset = (bfd_signed_vma)(destination - location);
4301
4302
0
  if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4303
0
      || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4304
0
    {
4305
      /* Handle cases where:
4306
   - this call goes too far (different Thumb/Thumb2 max
4307
     distance)
4308
   - it's a Thumb->Arm call and blx is not available, or it's a
4309
     Thumb->Arm branch (not bl). A stub is needed in this case,
4310
     but only if this call is not through a PLT entry. Indeed,
4311
     PLT stubs handle mode switching already.  */
4312
0
      if ((!thumb2_bl
4313
0
      && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4314
0
    || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4315
0
    || (thumb2_bl
4316
0
        && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4317
0
      || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4318
0
    || (thumb2
4319
0
        && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4320
0
      || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4321
0
        && (r_type == R_ARM_THM_JUMP19))
4322
0
    || (branch_type == ST_BRANCH_TO_ARM
4323
0
        && (((r_type == R_ARM_THM_CALL
4324
0
        || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4325
0
      || (r_type == R_ARM_THM_JUMP24)
4326
0
      || (r_type == R_ARM_THM_JUMP19))
4327
0
        && !use_plt))
4328
0
  {
4329
    /* If we need to insert a Thumb-Thumb long branch stub to a
4330
       PLT, use one that branches directly to the ARM PLT
4331
       stub. If we pretended we'd use the pre-PLT Thumb->ARM
4332
       stub, undo this now.  */
4333
0
    if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4334
0
      {
4335
0
        branch_type = ST_BRANCH_TO_ARM;
4336
0
        branch_offset += PLT_THUMB_STUB_SIZE;
4337
0
      }
4338
4339
0
    if (branch_type == ST_BRANCH_TO_THUMB)
4340
0
      {
4341
        /* Thumb to thumb.  */
4342
0
        if (!thumb_only)
4343
0
    {
4344
0
      if (input_sec->flags & SEC_ELF_PURECODE)
4345
0
        _bfd_error_handler
4346
0
          (_("%pB(%pA): warning: long branch veneers used in"
4347
0
       " section with SHF_ARM_PURECODE section"
4348
0
       " attribute is only supported for M-profile"
4349
0
       " targets that implement the movw instruction"),
4350
0
           input_bfd, input_sec);
4351
4352
0
      stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4353
        /* PIC stubs.  */
4354
0
        ? ((globals->use_blx
4355
0
      && (r_type == R_ARM_THM_CALL))
4356
           /* V5T and above. Stub starts with ARM code, so
4357
        we must be able to switch mode before
4358
        reaching it, which is only possible for 'bl'
4359
        (ie R_ARM_THM_CALL relocation).  */
4360
0
           ? arm_stub_long_branch_any_thumb_pic
4361
           /* On V4T, use Thumb code only.  */
4362
0
           : arm_stub_long_branch_v4t_thumb_thumb_pic)
4363
4364
        /* non-PIC stubs.  */
4365
0
        : ((globals->use_blx
4366
0
      && (r_type == R_ARM_THM_CALL))
4367
           /* V5T and above.  */
4368
0
           ? arm_stub_long_branch_any_any
4369
           /* V4T.  */
4370
0
           : arm_stub_long_branch_v4t_thumb_thumb);
4371
0
    }
4372
0
        else
4373
0
    {
4374
0
      if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4375
0
          stub_type = arm_stub_long_branch_thumb2_only_pure;
4376
0
      else
4377
0
        {
4378
0
          if (input_sec->flags & SEC_ELF_PURECODE)
4379
0
      _bfd_error_handler
4380
0
        (_("%pB(%pA): warning: long branch veneers used in"
4381
0
           " section with SHF_ARM_PURECODE section"
4382
0
           " attribute is only supported for M-profile"
4383
0
           " targets that implement the movw instruction"),
4384
0
         input_bfd, input_sec);
4385
4386
0
          stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4387
      /* PIC stub.  */
4388
0
      ? arm_stub_long_branch_thumb_only_pic
4389
      /* non-PIC stub.  */
4390
0
      : (thumb2 ? arm_stub_long_branch_thumb2_only
4391
0
          : arm_stub_long_branch_thumb_only);
4392
0
        }
4393
0
    }
4394
0
      }
4395
0
    else
4396
0
      {
4397
0
        if (input_sec->flags & SEC_ELF_PURECODE)
4398
0
    _bfd_error_handler
4399
0
      (_("%pB(%pA): warning: long branch veneers used in"
4400
0
         " section with SHF_ARM_PURECODE section"
4401
0
         " attribute is only supported" " for M-profile"
4402
0
         " targets that implement the movw instruction"),
4403
0
       input_bfd, input_sec);
4404
4405
        /* Thumb to arm.  */
4406
0
        if (sym_sec != NULL
4407
0
      && sym_sec->owner != NULL
4408
0
      && !INTERWORK_FLAG (sym_sec->owner))
4409
0
    {
4410
0
      _bfd_error_handler
4411
0
        (_("%pB(%s): warning: interworking not enabled;"
4412
0
           " first occurrence: %pB: %s call to %s"),
4413
0
         sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4414
0
    }
4415
4416
0
        stub_type =
4417
0
    (bfd_link_pic (info) | globals->pic_veneer)
4418
    /* PIC stubs.  */
4419
0
    ? (r_type == R_ARM_THM_TLS_CALL
4420
       /* TLS PIC stubs.  */
4421
0
       ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4422
0
          : arm_stub_long_branch_v4t_thumb_tls_pic)
4423
0
       : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4424
          /* V5T PIC and above.  */
4425
0
          ? arm_stub_long_branch_any_arm_pic
4426
          /* V4T PIC stub.  */
4427
0
          : arm_stub_long_branch_v4t_thumb_arm_pic))
4428
4429
    /* non-PIC stubs.  */
4430
0
    : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4431
       /* V5T and above.  */
4432
0
       ? arm_stub_long_branch_any_any
4433
       /* V4T.  */
4434
0
       : arm_stub_long_branch_v4t_thumb_arm);
4435
4436
        /* Handle v4t short branches.  */
4437
0
        if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4438
0
      && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4439
0
      && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4440
0
    stub_type = arm_stub_short_branch_v4t_thumb_arm;
4441
0
      }
4442
0
  }
4443
0
    }
4444
0
  else if (r_type == R_ARM_CALL
4445
0
     || r_type == R_ARM_JUMP24
4446
0
     || r_type == R_ARM_PLT32
4447
0
     || r_type == R_ARM_TLS_CALL)
4448
0
    {
4449
0
      if (input_sec->flags & SEC_ELF_PURECODE)
4450
0
  _bfd_error_handler
4451
0
    (_("%pB(%pA): warning: long branch veneers used in"
4452
0
       " section with SHF_ARM_PURECODE section"
4453
0
       " attribute is only supported for M-profile"
4454
0
       " targets that implement the movw instruction"),
4455
0
     input_bfd, input_sec);
4456
0
      if (branch_type == ST_BRANCH_TO_THUMB)
4457
0
  {
4458
    /* Arm to thumb.  */
4459
4460
0
    if (sym_sec != NULL
4461
0
        && sym_sec->owner != NULL
4462
0
        && !INTERWORK_FLAG (sym_sec->owner))
4463
0
      {
4464
0
        _bfd_error_handler
4465
0
    (_("%pB(%s): warning: interworking not enabled;"
4466
0
       " first occurrence: %pB: %s call to %s"),
4467
0
     sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4468
0
      }
4469
4470
    /* We have an extra 2-bytes reach because of
4471
       the mode change (bit 24 (H) of BLX encoding).  */
4472
0
    if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4473
0
        || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4474
0
        || (r_type == R_ARM_CALL && !globals->use_blx)
4475
0
        || (r_type == R_ARM_JUMP24)
4476
0
        || (r_type == R_ARM_PLT32))
4477
0
      {
4478
0
        stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4479
    /* PIC stubs.  */
4480
0
    ? ((globals->use_blx)
4481
       /* V5T and above.  */
4482
0
       ? arm_stub_long_branch_any_thumb_pic
4483
       /* V4T stub.  */
4484
0
       : arm_stub_long_branch_v4t_arm_thumb_pic)
4485
4486
    /* non-PIC stubs.  */
4487
0
    : ((globals->use_blx)
4488
       /* V5T and above.  */
4489
0
       ? arm_stub_long_branch_any_any
4490
       /* V4T.  */
4491
0
       : arm_stub_long_branch_v4t_arm_thumb);
4492
0
      }
4493
0
  }
4494
0
      else
4495
0
  {
4496
    /* Arm to arm.  */
4497
0
    if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4498
0
        || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4499
0
      {
4500
0
        stub_type =
4501
0
    (bfd_link_pic (info) | globals->pic_veneer)
4502
    /* PIC stubs.  */
4503
0
    ? (r_type == R_ARM_TLS_CALL
4504
       /* TLS PIC Stub.  */
4505
0
       ? arm_stub_long_branch_any_tls_pic
4506
0
       : (globals->root.target_os == is_nacl
4507
0
          ? arm_stub_long_branch_arm_nacl_pic
4508
0
          : arm_stub_long_branch_any_arm_pic))
4509
    /* non-PIC stubs.  */
4510
0
    : (globals->root.target_os == is_nacl
4511
0
       ? arm_stub_long_branch_arm_nacl
4512
0
       : arm_stub_long_branch_any_any);
4513
0
      }
4514
0
  }
4515
0
    }
4516
4517
  /* If a stub is needed, record the actual destination type.  */
4518
0
  if (stub_type != arm_stub_none)
4519
0
    *actual_branch_type = branch_type;
4520
4521
0
  return stub_type;
4522
0
}
4523
4524
/* Build a name for an entry in the stub hash table.  */
4525
4526
static char *
4527
elf32_arm_stub_name (const asection *input_section,
4528
         const asection *sym_sec,
4529
         const struct elf32_arm_link_hash_entry *hash,
4530
         const Elf_Internal_Rela *rel,
4531
         enum elf32_arm_stub_type stub_type)
4532
0
{
4533
0
  char *stub_name;
4534
0
  bfd_size_type len;
4535
4536
0
  if (hash)
4537
0
    {
4538
0
      len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4539
0
      stub_name = (char *) bfd_malloc (len);
4540
0
      if (stub_name != NULL)
4541
0
  sprintf (stub_name, "%08x_%s+%x_%d",
4542
0
     input_section->id & 0xffffffff,
4543
0
     hash->root.root.root.string,
4544
0
     (int) rel->r_addend & 0xffffffff,
4545
0
     (int) stub_type);
4546
0
    }
4547
0
  else
4548
0
    {
4549
0
      len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4550
0
      stub_name = (char *) bfd_malloc (len);
4551
0
      if (stub_name != NULL)
4552
0
  sprintf (stub_name, "%08x_%x:%x+%x_%d",
4553
0
     input_section->id & 0xffffffff,
4554
0
     sym_sec->id & 0xffffffff,
4555
0
     ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4556
0
     || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4557
0
     ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4558
0
     (int) rel->r_addend & 0xffffffff,
4559
0
     (int) stub_type);
4560
0
    }
4561
4562
0
  return stub_name;
4563
0
}
4564
4565
/* Look up an entry in the stub hash.  Stub entries are cached because
4566
   creating the stub name takes a bit of time.  */
4567
4568
static struct elf32_arm_stub_hash_entry *
4569
elf32_arm_get_stub_entry (const asection *input_section,
4570
        const asection *sym_sec,
4571
        struct elf_link_hash_entry *hash,
4572
        const Elf_Internal_Rela *rel,
4573
        struct elf32_arm_link_hash_table *htab,
4574
        enum elf32_arm_stub_type stub_type)
4575
0
{
4576
0
  struct elf32_arm_stub_hash_entry *stub_entry;
4577
0
  struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4578
0
  const asection *id_sec;
4579
4580
0
  if ((input_section->flags & SEC_CODE) == 0)
4581
0
    return NULL;
4582
4583
  /* If the input section is the CMSE stubs one and it needs a long
4584
     branch stub to reach it's final destination, give up with an
4585
     error message: this is not supported.  See PR ld/24709.  */
4586
0
  if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen (CMSE_STUB_NAME)))
4587
0
    {
4588
0
      bfd *output_bfd = htab->obfd;
4589
0
      asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
4590
4591
0
      _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
4592
0
          "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
4593
0
        CMSE_STUB_NAME,
4594
0
        (uint64_t)out_sec->output_section->vma
4595
0
          + out_sec->output_offset,
4596
0
        (uint64_t)sym_sec->output_section->vma
4597
0
          + sym_sec->output_offset
4598
0
          + h->root.root.u.def.value);
4599
      /* Exit, rather than leave incompletely processed
4600
   relocations.  */
4601
0
      xexit (1);
4602
0
    }
4603
4604
  /* If this input section is part of a group of sections sharing one
4605
     stub section, then use the id of the first section in the group.
4606
     Stub names need to include a section id, as there may well be
4607
     more than one stub used to reach say, printf, and we need to
4608
     distinguish between them.  */
4609
0
  BFD_ASSERT (input_section->id <= htab->top_id);
4610
0
  id_sec = htab->stub_group[input_section->id].link_sec;
4611
4612
0
  if (h != NULL && h->stub_cache != NULL
4613
0
      && h->stub_cache->h == h
4614
0
      && h->stub_cache->id_sec == id_sec
4615
0
      && h->stub_cache->stub_type == stub_type)
4616
0
    {
4617
0
      stub_entry = h->stub_cache;
4618
0
    }
4619
0
  else
4620
0
    {
4621
0
      char *stub_name;
4622
4623
0
      stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4624
0
      if (stub_name == NULL)
4625
0
  return NULL;
4626
4627
0
      stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4628
0
          stub_name, false, false);
4629
0
      if (h != NULL)
4630
0
  h->stub_cache = stub_entry;
4631
4632
0
      free (stub_name);
4633
0
    }
4634
4635
0
  return stub_entry;
4636
0
}
4637
4638
/* Whether veneers of type STUB_TYPE require to be in a dedicated output
4639
   section.  */
4640
4641
static bool
4642
arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4643
0
{
4644
0
  if (stub_type >= max_stub_type)
4645
0
    abort ();  /* Should be unreachable.  */
4646
4647
0
  switch (stub_type)
4648
0
    {
4649
0
    case arm_stub_cmse_branch_thumb_only:
4650
0
      return true;
4651
4652
0
    default:
4653
0
      return false;
4654
0
    }
4655
4656
0
  abort ();  /* Should be unreachable.  */
4657
0
}
4658
4659
/* Required alignment (as a power of 2) for the dedicated section holding
4660
   veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4661
   with input sections.  */
4662
4663
static int
4664
arm_dedicated_stub_output_section_required_alignment
4665
  (enum elf32_arm_stub_type stub_type)
4666
0
{
4667
0
  if (stub_type >= max_stub_type)
4668
0
    abort ();  /* Should be unreachable.  */
4669
4670
0
  switch (stub_type)
4671
0
    {
4672
    /* Vectors of Secure Gateway veneers must be aligned on 32byte
4673
       boundary.  */
4674
0
    case arm_stub_cmse_branch_thumb_only:
4675
0
      return 5;
4676
4677
0
    default:
4678
0
      BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4679
0
      return 0;
4680
0
    }
4681
4682
0
  abort ();  /* Should be unreachable.  */
4683
0
}
4684
4685
/* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4686
   NULL if veneers of this type are interspersed with input sections.  */
4687
4688
static const char *
4689
arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4690
0
{
4691
0
  if (stub_type >= max_stub_type)
4692
0
    abort ();  /* Should be unreachable.  */
4693
4694
0
  switch (stub_type)
4695
0
    {
4696
0
    case arm_stub_cmse_branch_thumb_only:
4697
0
      return CMSE_STUB_NAME;
4698
4699
0
    default:
4700
0
      BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4701
0
      return NULL;
4702
0
    }
4703
4704
0
  abort ();  /* Should be unreachable.  */
4705
0
}
4706
4707
/* If veneers of type STUB_TYPE should go in a dedicated output section,
4708
   returns the address of the hash table field in HTAB holding a pointer to the
4709
   corresponding input section.  Otherwise, returns NULL.  */
4710
4711
static asection **
4712
arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4713
              enum elf32_arm_stub_type stub_type)
4714
0
{
4715
0
  if (stub_type >= max_stub_type)
4716
0
    abort ();  /* Should be unreachable.  */
4717
4718
0
  switch (stub_type)
4719
0
    {
4720
0
    case arm_stub_cmse_branch_thumb_only:
4721
0
      return &htab->cmse_stub_sec;
4722
4723
0
    default:
4724
0
      BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4725
0
      return NULL;
4726
0
    }
4727
4728
0
  abort ();  /* Should be unreachable.  */
4729
0
}
4730
4731
/* Find or create a stub section to contain a stub of type STUB_TYPE.  SECTION
4732
   is the section that branch into veneer and can be NULL if stub should go in
4733
   a dedicated output section.  Returns a pointer to the stub section, and the
4734
   section to which the stub section will be attached (in *LINK_SEC_P).
4735
   LINK_SEC_P may be NULL.  */
4736
4737
static asection *
4738
elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4739
           struct elf32_arm_link_hash_table *htab,
4740
           enum elf32_arm_stub_type stub_type)
4741
0
{
4742
0
  asection *link_sec, *out_sec, **stub_sec_p;
4743
0
  const char *stub_sec_prefix;
4744
0
  bool dedicated_output_section =
4745
0
    arm_dedicated_stub_output_section_required (stub_type);
4746
0
  int align;
4747
4748
0
  if (dedicated_output_section)
4749
0
    {
4750
0
      bfd *output_bfd = htab->obfd;
4751
0
      const char *out_sec_name =
4752
0
  arm_dedicated_stub_output_section_name (stub_type);
4753
0
      link_sec = NULL;
4754
0
      stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4755
0
      stub_sec_prefix = out_sec_name;
4756
0
      align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4757
0
      out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4758
0
      if (out_sec == NULL)
4759
0
  {
4760
0
    _bfd_error_handler (_("no address assigned to the veneers output "
4761
0
        "section %s"), out_sec_name);
4762
0
    return NULL;
4763
0
  }
4764
0
    }
4765
0
  else
4766
0
    {
4767
0
      BFD_ASSERT (section->id <= htab->top_id);
4768
0
      link_sec = htab->stub_group[section->id].link_sec;
4769
0
      BFD_ASSERT (link_sec != NULL);
4770
0
      stub_sec_p = &htab->stub_group[section->id].stub_sec;
4771
0
      if (*stub_sec_p == NULL)
4772
0
  stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4773
0
      stub_sec_prefix = link_sec->name;
4774
0
      out_sec = link_sec->output_section;
4775
0
      align = htab->root.target_os == is_nacl ? 4 : 3;
4776
0
    }
4777
4778
0
  if (*stub_sec_p == NULL)
4779
0
    {
4780
0
      size_t namelen;
4781
0
      bfd_size_type len;
4782
0
      char *s_name;
4783
4784
0
      namelen = strlen (stub_sec_prefix);
4785
0
      len = namelen + sizeof (STUB_SUFFIX);
4786
0
      s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4787
0
      if (s_name == NULL)
4788
0
  return NULL;
4789
4790
0
      memcpy (s_name, stub_sec_prefix, namelen);
4791
0
      memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4792
0
      *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4793
0
                 align);
4794
0
      if (*stub_sec_p == NULL)
4795
0
  return NULL;
4796
4797
0
      out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4798
0
      | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4799
0
      | SEC_KEEP;
4800
0
    }
4801
4802
0
  if (!dedicated_output_section)
4803
0
    htab->stub_group[section->id].stub_sec = *stub_sec_p;
4804
4805
0
  if (link_sec_p)
4806
0
    *link_sec_p = link_sec;
4807
4808
0
  return *stub_sec_p;
4809
0
}
4810
4811
/* Add a new stub entry to the stub hash.  Not all fields of the new
4812
   stub entry are initialised.  */
4813
4814
static struct elf32_arm_stub_hash_entry *
4815
elf32_arm_add_stub (const char *stub_name, asection *section,
4816
        struct elf32_arm_link_hash_table *htab,
4817
        enum elf32_arm_stub_type stub_type)
4818
0
{
4819
0
  asection *link_sec;
4820
0
  asection *stub_sec;
4821
0
  struct elf32_arm_stub_hash_entry *stub_entry;
4822
4823
0
  stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4824
0
            stub_type);
4825
0
  if (stub_sec == NULL)
4826
0
    return NULL;
4827
4828
  /* Enter this entry into the linker stub hash table.  */
4829
0
  stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4830
0
             true, false);
4831
0
  if (stub_entry == NULL)
4832
0
    {
4833
0
      if (section == NULL)
4834
0
  section = stub_sec;
4835
0
      _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4836
0
        section->owner, stub_name);
4837
0
      return NULL;
4838
0
    }
4839
4840
0
  stub_entry->stub_sec = stub_sec;
4841
0
  stub_entry->stub_offset = (bfd_vma) -1;
4842
0
  stub_entry->id_sec = link_sec;
4843
4844
0
  return stub_entry;
4845
0
}
4846
4847
/* Store an Arm insn into an output section not processed by
4848
   elf32_arm_write_section.  */
4849
4850
static void
4851
put_arm_insn (struct elf32_arm_link_hash_table * htab,
4852
        bfd * output_bfd, bfd_vma val, void * ptr)
4853
0
{
4854
0
  if (htab->byteswap_code != bfd_little_endian (output_bfd))
4855
0
    bfd_putl32 (val, ptr);
4856
0
  else
4857
0
    bfd_putb32 (val, ptr);
4858
0
}
4859
4860
/* Store a 16-bit Thumb insn into an output section not processed by
4861
   elf32_arm_write_section.  */
4862
4863
static void
4864
put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4865
    bfd * output_bfd, bfd_vma val, void * ptr)
4866
0
{
4867
0
  if (htab->byteswap_code != bfd_little_endian (output_bfd))
4868
0
    bfd_putl16 (val, ptr);
4869
0
  else
4870
0
    bfd_putb16 (val, ptr);
4871
0
}
4872
4873
/* Store a Thumb2 insn into an output section not processed by
4874
   elf32_arm_write_section.  */
4875
4876
static void
4877
put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4878
     bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4879
0
{
4880
  /* T2 instructions are 16-bit streamed.  */
4881
0
  if (htab->byteswap_code != bfd_little_endian (output_bfd))
4882
0
    {
4883
0
      bfd_putl16 ((val >> 16) & 0xffff, ptr);
4884
0
      bfd_putl16 ((val & 0xffff), ptr + 2);
4885
0
    }
4886
0
  else
4887
0
    {
4888
0
      bfd_putb16 ((val >> 16) & 0xffff, ptr);
4889
0
      bfd_putb16 ((val & 0xffff), ptr + 2);
4890
0
    }
4891
0
}
4892
4893
/* If it's possible to change R_TYPE to a more efficient access
4894
   model, return the new reloc type.  */
4895
4896
static unsigned
4897
elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4898
        struct elf_link_hash_entry *h)
4899
0
{
4900
0
  int is_local = (h == NULL);
4901
4902
0
  if (bfd_link_dll (info)
4903
0
      || (h && h->root.type == bfd_link_hash_undefweak))
4904
0
    return r_type;
4905
4906
  /* We do not support relaxations for Old TLS models.  */
4907
0
  switch (r_type)
4908
0
    {
4909
0
    case R_ARM_TLS_GOTDESC:
4910
0
    case R_ARM_TLS_CALL:
4911
0
    case R_ARM_THM_TLS_CALL:
4912
0
    case R_ARM_TLS_DESCSEQ:
4913
0
    case R_ARM_THM_TLS_DESCSEQ:
4914
0
      return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4915
0
    }
4916
4917
0
  return r_type;
4918
0
}
4919
4920
static bfd_reloc_status_type elf32_arm_final_link_relocate
4921
  (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4922
   Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4923
   const char *, unsigned char, enum arm_st_branch_type,
4924
   struct elf_link_hash_entry *, bool *, char **);
4925
4926
static unsigned int
4927
arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4928
0
{
4929
0
  switch (stub_type)
4930
0
    {
4931
0
    case arm_stub_a8_veneer_b_cond:
4932
0
    case arm_stub_a8_veneer_b:
4933
0
    case arm_stub_a8_veneer_bl:
4934
0
      return 2;
4935
4936
0
    case arm_stub_long_branch_any_any:
4937
0
    case arm_stub_long_branch_v4t_arm_thumb:
4938
0
    case arm_stub_long_branch_thumb_only:
4939
0
    case arm_stub_long_branch_thumb2_only:
4940
0
    case arm_stub_long_branch_thumb2_only_pure:
4941
0
    case arm_stub_long_branch_v4t_thumb_thumb:
4942
0
    case arm_stub_long_branch_v4t_thumb_arm:
4943
0
    case arm_stub_short_branch_v4t_thumb_arm:
4944
0
    case arm_stub_long_branch_any_arm_pic:
4945
0
    case arm_stub_long_branch_any_thumb_pic:
4946
0
    case arm_stub_long_branch_v4t_thumb_thumb_pic:
4947
0
    case arm_stub_long_branch_v4t_arm_thumb_pic:
4948
0
    case arm_stub_long_branch_v4t_thumb_arm_pic:
4949
0
    case arm_stub_long_branch_thumb_only_pic:
4950
0
    case arm_stub_long_branch_any_tls_pic:
4951
0
    case arm_stub_long_branch_v4t_thumb_tls_pic:
4952
0
    case arm_stub_cmse_branch_thumb_only:
4953
0
    case arm_stub_a8_veneer_blx:
4954
0
      return 4;
4955
4956
0
    case arm_stub_long_branch_arm_nacl:
4957
0
    case arm_stub_long_branch_arm_nacl_pic:
4958
0
      return 16;
4959
4960
0
    default:
4961
0
      abort ();  /* Should be unreachable.  */
4962
0
    }
4963
0
}
4964
4965
/* Returns whether stubs of type STUB_TYPE take over the symbol they are
4966
   veneering (TRUE) or have their own symbol (FALSE).  */
4967
4968
static bool
4969
arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4970
0
{
4971
0
  if (stub_type >= max_stub_type)
4972
0
    abort ();  /* Should be unreachable.  */
4973
4974
0
  switch (stub_type)
4975
0
    {
4976
0
    case arm_stub_cmse_branch_thumb_only:
4977
0
      return true;
4978
4979
0
    default:
4980
0
      return false;
4981
0
    }
4982
4983
0
  abort ();  /* Should be unreachable.  */
4984
0
}
4985
4986
/* Returns the padding needed for the dedicated section used stubs of type
4987
   STUB_TYPE.  */
4988
4989
static int
4990
arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4991
0
{
4992
0
  if (stub_type >= max_stub_type)
4993
0
    abort ();  /* Should be unreachable.  */
4994
4995
0
  switch (stub_type)
4996
0
    {
4997
0
    case arm_stub_cmse_branch_thumb_only:
4998
0
      return 32;
4999
5000
0
    default:
5001
0
      return 0;
5002
0
    }
5003
5004
0
  abort ();  /* Should be unreachable.  */
5005
0
}
5006
5007
/* If veneers of type STUB_TYPE should go in a dedicated output section,
5008
   returns the address of the hash table field in HTAB holding the offset at
5009
   which new veneers should be layed out in the stub section.  */
5010
5011
static bfd_vma*
5012
arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
5013
        enum elf32_arm_stub_type stub_type)
5014
0
{
5015
0
  switch (stub_type)
5016
0
    {
5017
0
    case arm_stub_cmse_branch_thumb_only:
5018
0
      return &htab->new_cmse_stub_offset;
5019
5020
0
    default:
5021
0
      BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
5022
0
      return NULL;
5023
0
    }
5024
0
}
5025
5026
static bool
5027
arm_build_one_stub (struct bfd_hash_entry *gen_entry,
5028
        void * in_arg)
5029
0
{
5030
0
#define MAXRELOCS 3
5031
0
  bool removed_sg_veneer;
5032
0
  struct elf32_arm_stub_hash_entry *stub_entry;
5033
0
  struct elf32_arm_link_hash_table *globals;
5034
0
  struct bfd_link_info *info;
5035
0
  asection *stub_sec;
5036
0
  bfd *stub_bfd;
5037
0
  bfd_byte *loc;
5038
0
  bfd_vma sym_value;
5039
0
  int template_size;
5040
0
  int size;
5041
0
  const insn_sequence *template_sequence;
5042
0
  int i;
5043
0
  int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5044
0
  int stub_reloc_offset[MAXRELOCS] = {0, 0};
5045
0
  int nrelocs = 0;
5046
0
  int just_allocated = 0;
5047
5048
  /* Massage our args to the form they really have.  */
5049
0
  stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5050
0
  info = (struct bfd_link_info *) in_arg;
5051
5052
  /* Fail if the target section could not be assigned to an output
5053
     section.  The user should fix his linker script.  */
5054
0
  if (stub_entry->target_section->output_section == NULL
5055
0
      && info->non_contiguous_regions)
5056
0
    info->callbacks->einfo (_("%F%P: Could not assign `%pA' to an output section. "
5057
0
            "Retry without --enable-non-contiguous-regions.\n"),
5058
0
          stub_entry->target_section);
5059
5060
0
  globals = elf32_arm_hash_table (info);
5061
0
  if (globals == NULL)
5062
0
    return false;
5063
5064
0
  stub_sec = stub_entry->stub_sec;
5065
5066
0
  if ((globals->fix_cortex_a8 < 0)
5067
0
      != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5068
    /* We have to do less-strictly-aligned fixes last.  */
5069
0
    return true;
5070
5071
  /* Assign a slot at the end of section if none assigned yet.  */
5072
0
  if (stub_entry->stub_offset == (bfd_vma) -1)
5073
0
    {
5074
0
      stub_entry->stub_offset = stub_sec->size;
5075
0
      just_allocated = 1;
5076
0
    }
5077
0
  loc = stub_sec->contents + stub_entry->stub_offset;
5078
5079
0
  stub_bfd = stub_sec->owner;
5080
5081
  /* This is the address of the stub destination.  */
5082
0
  sym_value = (stub_entry->target_value
5083
0
         + stub_entry->target_section->output_offset
5084
0
         + stub_entry->target_section->output_section->vma);
5085
5086
0
  template_sequence = stub_entry->stub_template;
5087
0
  template_size = stub_entry->stub_template_size;
5088
5089
0
  size = 0;
5090
0
  for (i = 0; i < template_size; i++)
5091
0
    {
5092
0
      switch (template_sequence[i].type)
5093
0
  {
5094
0
  case THUMB16_TYPE:
5095
0
    {
5096
0
      bfd_vma data = (bfd_vma) template_sequence[i].data;
5097
0
      if (template_sequence[i].reloc_addend != 0)
5098
0
        {
5099
    /* We've borrowed the reloc_addend field to mean we should
5100
       insert a condition code into this (Thumb-1 branch)
5101
       instruction.  See THUMB16_BCOND_INSN.  */
5102
0
    BFD_ASSERT ((data & 0xff00) == 0xd000);
5103
0
    data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5104
0
        }
5105
0
      bfd_put_16 (stub_bfd, data, loc + size);
5106
0
      size += 2;
5107
0
    }
5108
0
    break;
5109
5110
0
  case THUMB32_TYPE:
5111
0
    bfd_put_16 (stub_bfd,
5112
0
          (template_sequence[i].data >> 16) & 0xffff,
5113
0
          loc + size);
5114
0
    bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5115
0
          loc + size + 2);
5116
0
    if (template_sequence[i].r_type != R_ARM_NONE)
5117
0
      {
5118
0
        stub_reloc_idx[nrelocs] = i;
5119
0
        stub_reloc_offset[nrelocs++] = size;
5120
0
      }
5121
0
    size += 4;
5122
0
    break;
5123
5124
0
  case ARM_TYPE:
5125
0
    bfd_put_32 (stub_bfd, template_sequence[i].data,
5126
0
          loc + size);
5127
    /* Handle cases where the target is encoded within the
5128
       instruction.  */
5129
0
    if (template_sequence[i].r_type == R_ARM_JUMP24)
5130
0
      {
5131
0
        stub_reloc_idx[nrelocs] = i;
5132
0
        stub_reloc_offset[nrelocs++] = size;
5133
0
      }
5134
0
    size += 4;
5135
0
    break;
5136
5137
0
  case DATA_TYPE:
5138
0
    bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5139
0
    stub_reloc_idx[nrelocs] = i;
5140
0
    stub_reloc_offset[nrelocs++] = size;
5141
0
    size += 4;
5142
0
    break;
5143
5144
0
  default:
5145
0
    BFD_FAIL ();
5146
0
    return false;
5147
0
  }
5148
0
    }
5149
5150
0
  if (just_allocated)
5151
0
    stub_sec->size += size;
5152
5153
  /* Stub size has already been computed in arm_size_one_stub. Check
5154
     consistency.  */
5155
0
  BFD_ASSERT (size == stub_entry->stub_size);
5156
5157
  /* Destination is Thumb. Force bit 0 to 1 to reflect this.  */
5158
0
  if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5159
0
    sym_value |= 1;
5160
5161
  /* Assume non empty slots have at least one and at most MAXRELOCS entries
5162
     to relocate in each stub.  */
5163
0
  removed_sg_veneer =
5164
0
    (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5165
0
  BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5166
5167
0
  for (i = 0; i < nrelocs; i++)
5168
0
    {
5169
0
      Elf_Internal_Rela rel;
5170
0
      bool unresolved_reloc;
5171
0
      char *error_message;
5172
0
      bfd_vma points_to =
5173
0
  sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5174
5175
0
      rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5176
0
      rel.r_info = ELF32_R_INFO (0,
5177
0
         template_sequence[stub_reloc_idx[i]].r_type);
5178
0
      rel.r_addend = 0;
5179
5180
0
      if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5181
  /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5182
     template should refer back to the instruction after the original
5183
     branch.  We use target_section as Cortex-A8 erratum workaround stubs
5184
     are only generated when both source and target are in the same
5185
     section.  */
5186
0
  points_to = stub_entry->target_section->output_section->vma
5187
0
        + stub_entry->target_section->output_offset
5188
0
        + stub_entry->source_value;
5189
5190
0
      elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5191
0
    (template_sequence[stub_reloc_idx[i]].r_type),
5192
0
     stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5193
0
     points_to, info, stub_entry->target_section, "", STT_FUNC,
5194
0
     stub_entry->branch_type,
5195
0
     (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5196
0
     &error_message);
5197
0
    }
5198
5199
0
  return true;
5200
0
#undef MAXRELOCS
5201
0
}
5202
5203
/* Calculate the template, template size and instruction size for a stub.
5204
   Return value is the instruction size.  */
5205
5206
static unsigned int
5207
find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5208
           const insn_sequence **stub_template,
5209
           int *stub_template_size)
5210
0
{
5211
0
  const insn_sequence *template_sequence = NULL;
5212
0
  int template_size = 0, i;
5213
0
  unsigned int size;
5214
5215
0
  template_sequence = stub_definitions[stub_type].template_sequence;
5216
0
  if (stub_template)
5217
0
    *stub_template = template_sequence;
5218
5219
0
  template_size = stub_definitions[stub_type].template_size;
5220
0
  if (stub_template_size)
5221
0
    *stub_template_size = template_size;
5222
5223
0
  size = 0;
5224
0
  for (i = 0; i < template_size; i++)
5225
0
    {
5226
0
      switch (template_sequence[i].type)
5227
0
  {
5228
0
  case THUMB16_TYPE:
5229
0
    size += 2;
5230
0
    break;
5231
5232
0
  case ARM_TYPE:
5233
0
  case THUMB32_TYPE:
5234
0
  case DATA_TYPE:
5235
0
    size += 4;
5236
0
    break;
5237
5238
0
  default:
5239
0
    BFD_FAIL ();
5240
0
    return 0;
5241
0
  }
5242
0
    }
5243
5244
0
  return size;
5245
0
}
5246
5247
/* As above, but don't actually build the stub.  Just bump offset so
5248
   we know stub section sizes.  */
5249
5250
static bool
5251
arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5252
       void *in_arg ATTRIBUTE_UNUSED)
5253
0
{
5254
0
  struct elf32_arm_stub_hash_entry *stub_entry;
5255
0
  const insn_sequence *template_sequence;
5256
0
  int template_size, size;
5257
5258
  /* Massage our args to the form they really have.  */
5259
0
  stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5260
5261
0
  BFD_ASSERT ((stub_entry->stub_type > arm_stub_none)
5262
0
        && stub_entry->stub_type < ARRAY_SIZE (stub_definitions));
5263
5264
0
  size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5265
0
              &template_size);
5266
5267
  /* Initialized to -1.  Null size indicates an empty slot full of zeros.  */
5268
0
  if (stub_entry->stub_template_size)
5269
0
    {
5270
0
      stub_entry->stub_size = size;
5271
0
      stub_entry->stub_template = template_sequence;
5272
0
      stub_entry->stub_template_size = template_size;
5273
0
    }
5274
5275
  /* Already accounted for.  */
5276
0
  if (stub_entry->stub_offset != (bfd_vma) -1)
5277
0
    return true;
5278
5279
0
  size = (size + 7) & ~7;
5280
0
  stub_entry->stub_sec->size += size;
5281
5282
0
  return true;
5283
0
}
5284
5285
/* External entry points for sizing and building linker stubs.  */
5286
5287
/* Set up various things so that we can make a list of input sections
5288
   for each output section included in the link.  Returns -1 on error,
5289
   0 when no stubs will be needed, and 1 on success.  */
5290
5291
int
5292
elf32_arm_setup_section_lists (bfd *output_bfd,
5293
             struct bfd_link_info *info)
5294
0
{
5295
0
  bfd *input_bfd;
5296
0
  unsigned int bfd_count;
5297
0
  unsigned int top_id, top_index;
5298
0
  asection *section;
5299
0
  asection **input_list, **list;
5300
0
  size_t amt;
5301
0
  struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5302
5303
0
  if (htab == NULL)
5304
0
    return 0;
5305
5306
  /* Count the number of input BFDs and find the top input section id.  */
5307
0
  for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5308
0
       input_bfd != NULL;
5309
0
       input_bfd = input_bfd->link.next)
5310
0
    {
5311
0
      bfd_count += 1;
5312
0
      for (section = input_bfd->sections;
5313
0
     section != NULL;
5314
0
     section = section->next)
5315
0
  {
5316
0
    if (top_id < section->id)
5317
0
      top_id = section->id;
5318
0
  }
5319
0
    }
5320
0
  htab->bfd_count = bfd_count;
5321
5322
0
  amt = sizeof (struct map_stub) * (top_id + 1);
5323
0
  htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5324
0
  if (htab->stub_group == NULL)
5325
0
    return -1;
5326
0
  htab->top_id = top_id;
5327
5328
  /* We can't use output_bfd->section_count here to find the top output
5329
     section index as some sections may have been removed, and
5330
     _bfd_strip_section_from_output doesn't renumber the indices.  */
5331
0
  for (section = output_bfd->sections, top_index = 0;
5332
0
       section != NULL;
5333
0
       section = section->next)
5334
0
    {
5335
0
      if (top_index < section->index)
5336
0
  top_index = section->index;
5337
0
    }
5338
5339
0
  htab->top_index = top_index;
5340
0
  amt = sizeof (asection *) * (top_index + 1);
5341
0
  input_list = (asection **) bfd_malloc (amt);
5342
0
  htab->input_list = input_list;
5343
0
  if (input_list == NULL)
5344
0
    return -1;
5345
5346
  /* For sections we aren't interested in, mark their entries with a
5347
     value we can check later.  */
5348
0
  list = input_list + top_index;
5349
0
  do
5350
0
    *list = bfd_abs_section_ptr;
5351
0
  while (list-- != input_list);
5352
5353
0
  for (section = output_bfd->sections;
5354
0
       section != NULL;
5355
0
       section = section->next)
5356
0
    {
5357
0
      if ((section->flags & SEC_CODE) != 0)
5358
0
  input_list[section->index] = NULL;
5359
0
    }
5360
5361
0
  return 1;
5362
0
}
5363
5364
/* The linker repeatedly calls this function for each input section,
5365
   in the order that input sections are linked into output sections.
5366
   Build lists of input sections to determine groupings between which
5367
   we may insert linker stubs.  */
5368
5369
void
5370
elf32_arm_next_input_section (struct bfd_link_info *info,
5371
            asection *isec)
5372
0
{
5373
0
  struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5374
5375
0
  if (htab == NULL)
5376
0
    return;
5377
5378
0
  if (isec->output_section->index <= htab->top_index)
5379
0
    {
5380
0
      asection **list = htab->input_list + isec->output_section->index;
5381
5382
0
      if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5383
0
  {
5384
    /* Steal the link_sec pointer for our list.  */
5385
0
#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5386
    /* This happens to make the list in reverse order,
5387
       which we reverse later.  */
5388
0
    PREV_SEC (isec) = *list;
5389
0
    *list = isec;
5390
0
  }
5391
0
    }
5392
0
}
5393
5394
/* See whether we can group stub sections together.  Grouping stub
5395
   sections may result in fewer stubs.  More importantly, we need to
5396
   put all .init* and .fini* stubs at the end of the .init or
5397
   .fini output sections respectively, because glibc splits the
5398
   _init and _fini functions into multiple parts.  Putting a stub in
5399
   the middle of a function is not a good idea.  */
5400
5401
static void
5402
group_sections (struct elf32_arm_link_hash_table *htab,
5403
    bfd_size_type stub_group_size,
5404
    bool stubs_always_after_branch)
5405
0
{
5406
0
  asection **list = htab->input_list;
5407
5408
0
  do
5409
0
    {
5410
0
      asection *tail = *list;
5411
0
      asection *head;
5412
5413
0
      if (tail == bfd_abs_section_ptr)
5414
0
  continue;
5415
5416
      /* Reverse the list: we must avoid placing stubs at the
5417
   beginning of the section because the beginning of the text
5418
   section may be required for an interrupt vector in bare metal
5419
   code.  */
5420
0
#define NEXT_SEC PREV_SEC
5421
0
      head = NULL;
5422
0
      while (tail != NULL)
5423
0
  {
5424
    /* Pop from tail.  */
5425
0
    asection *item = tail;
5426
0
    tail = PREV_SEC (item);
5427
5428
    /* Push on head.  */
5429
0
    NEXT_SEC (item) = head;
5430
0
    head = item;
5431
0
  }
5432
5433
0
      while (head != NULL)
5434
0
  {
5435
0
    asection *curr;
5436
0
    asection *next;
5437
0
    bfd_vma stub_group_start = head->output_offset;
5438
0
    bfd_vma end_of_next;
5439
5440
0
    curr = head;
5441
0
    while (NEXT_SEC (curr) != NULL)
5442
0
      {
5443
0
        next = NEXT_SEC (curr);
5444
0
        end_of_next = next->output_offset + next->size;
5445
0
        if (end_of_next - stub_group_start >= stub_group_size)
5446
    /* End of NEXT is too far from start, so stop.  */
5447
0
    break;
5448
        /* Add NEXT to the group.  */
5449
0
        curr = next;
5450
0
      }
5451
5452
    /* OK, the size from the start to the start of CURR is less
5453
       than stub_group_size and thus can be handled by one stub
5454
       section.  (Or the head section is itself larger than
5455
       stub_group_size, in which case we may be toast.)
5456
       We should really be keeping track of the total size of
5457
       stubs added here, as stubs contribute to the final output
5458
       section size.  */
5459
0
    do
5460
0
      {
5461
0
        next = NEXT_SEC (head);
5462
        /* Set up this stub group.  */
5463
0
        htab->stub_group[head->id].link_sec = curr;
5464
0
      }
5465
0
    while (head != curr && (head = next) != NULL);
5466
5467
    /* But wait, there's more!  Input sections up to stub_group_size
5468
       bytes after the stub section can be handled by it too.  */
5469
0
    if (!stubs_always_after_branch)
5470
0
      {
5471
0
        stub_group_start = curr->output_offset + curr->size;
5472
5473
0
        while (next != NULL)
5474
0
    {
5475
0
      end_of_next = next->output_offset + next->size;
5476
0
      if (end_of_next - stub_group_start >= stub_group_size)
5477
        /* End of NEXT is too far from stubs, so stop.  */
5478
0
        break;
5479
      /* Add NEXT to the stub group.  */
5480
0
      head = next;
5481
0
      next = NEXT_SEC (head);
5482
0
      htab->stub_group[head->id].link_sec = curr;
5483
0
    }
5484
0
      }
5485
0
    head = next;
5486
0
  }
5487
0
    }
5488
0
  while (list++ != htab->input_list + htab->top_index);
5489
5490
0
  free (htab->input_list);
5491
0
#undef PREV_SEC
5492
0
#undef NEXT_SEC
5493
0
}
5494
5495
/* Comparison function for sorting/searching relocations relating to Cortex-A8
5496
   erratum fix.  */
5497
5498
static int
5499
a8_reloc_compare (const void *a, const void *b)
5500
0
{
5501
0
  const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5502
0
  const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5503
5504
0
  if (ra->from < rb->from)
5505
0
    return -1;
5506
0
  else if (ra->from > rb->from)
5507
0
    return 1;
5508
0
  else
5509
0
    return 0;
5510
0
}
5511
5512
static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5513
                const char *, char **);
5514
5515
/* Helper function to scan code for sequences which might trigger the Cortex-A8
5516
   branch/TLB erratum.  Fill in the table described by A8_FIXES_P,
5517
   NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P.  Returns true if an error occurs, false
5518
   otherwise.  */
5519
5520
static bool
5521
cortex_a8_erratum_scan (bfd *input_bfd,
5522
      struct bfd_link_info *info,
5523
      struct a8_erratum_fix **a8_fixes_p,
5524
      unsigned int *num_a8_fixes_p,
5525
      unsigned int *a8_fix_table_size_p,
5526
      struct a8_erratum_reloc *a8_relocs,
5527
      unsigned int num_a8_relocs,
5528
      unsigned prev_num_a8_fixes,
5529
      bool *stub_changed_p)
5530
0
{
5531
0
  asection *section;
5532
0
  struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5533
0
  struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5534
0
  unsigned int num_a8_fixes = *num_a8_fixes_p;
5535
0
  unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5536
5537
0
  if (htab == NULL)
5538
0
    return false;
5539
5540
0
  for (section = input_bfd->sections;
5541
0
       section != NULL;
5542
0
       section = section->next)
5543
0
    {
5544
0
      bfd_byte *contents = NULL;
5545
0
      struct _arm_elf_section_data *sec_data;
5546
0
      unsigned int span;
5547
0
      bfd_vma base_vma;
5548
5549
0
      if (elf_section_type (section) != SHT_PROGBITS
5550
0
    || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5551
0
    || (section->flags & SEC_EXCLUDE) != 0
5552
0
    || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5553
0
    || (section->output_section == bfd_abs_section_ptr))
5554
0
  continue;
5555
5556
0
      base_vma = section->output_section->vma + section->output_offset;
5557
5558
0
      if (elf_section_data (section)->this_hdr.contents != NULL)
5559
0
  contents = elf_section_data (section)->this_hdr.contents;
5560
0
      else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5561
0
  return true;
5562
5563
0
      sec_data = elf32_arm_section_data (section);
5564
5565
0
      for (span = 0; span < sec_data->mapcount; span++)
5566
0
  {
5567
0
    unsigned int span_start = sec_data->map[span].vma;
5568
0
    unsigned int span_end = (span == sec_data->mapcount - 1)
5569
0
      ? section->size : sec_data->map[span + 1].vma;
5570
0
    unsigned int i;
5571
0
    char span_type = sec_data->map[span].type;
5572
0
    bool last_was_32bit = false, last_was_branch = false;
5573
5574
0
    if (span_type != 't')
5575
0
      continue;
5576
5577
    /* Span is entirely within a single 4KB region: skip scanning.  */
5578
0
    if (((base_vma + span_start) & ~0xfff)
5579
0
        == ((base_vma + span_end) & ~0xfff))
5580
0
      continue;
5581
5582
    /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5583
5584
         * The opcode is BLX.W, BL.W, B.W, Bcc.W
5585
         * The branch target is in the same 4KB region as the
5586
     first half of the branch.
5587
         * The instruction before the branch is a 32-bit
5588
     length non-branch instruction.  */
5589
0
    for (i = span_start; i < span_end;)
5590
0
      {
5591
0
        unsigned int insn = bfd_getl16 (&contents[i]);
5592
0
        bool insn_32bit = false, is_blx = false, is_b = false;
5593
0
        bool is_bl = false, is_bcc = false, is_32bit_branch;
5594
5595
0
        if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5596
0
    insn_32bit = true;
5597
5598
0
        if (insn_32bit)
5599
0
    {
5600
      /* Load the rest of the insn (in manual-friendly order).  */
5601
0
      insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5602
5603
      /* Encoding T4: B<c>.W.  */
5604
0
      is_b = (insn & 0xf800d000) == 0xf0009000;
5605
      /* Encoding T1: BL<c>.W.  */
5606
0
      is_bl = (insn & 0xf800d000) == 0xf000d000;
5607
      /* Encoding T2: BLX<c>.W.  */
5608
0
      is_blx = (insn & 0xf800d000) == 0xf000c000;
5609
      /* Encoding T3: B<c>.W (not permitted in IT block).  */
5610
0
      is_bcc = (insn & 0xf800d000) == 0xf0008000
5611
0
         && (insn & 0x07f00000) != 0x03800000;
5612
0
    }
5613
5614
0
        is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5615
5616
0
        if (((base_vma + i) & 0xfff) == 0xffe
5617
0
      && insn_32bit
5618
0
      && is_32bit_branch
5619
0
      && last_was_32bit
5620
0
      && ! last_was_branch)
5621
0
    {
5622
0
      bfd_signed_vma offset = 0;
5623
0
      bool force_target_arm = false;
5624
0
      bool force_target_thumb = false;
5625
0
      bfd_vma target;
5626
0
      enum elf32_arm_stub_type stub_type = arm_stub_none;
5627
0
      struct a8_erratum_reloc key, *found;
5628
0
      bool use_plt = false;
5629
5630
0
      key.from = base_vma + i;
5631
0
      found = (struct a8_erratum_reloc *)
5632
0
          bsearch (&key, a8_relocs, num_a8_relocs,
5633
0
             sizeof (struct a8_erratum_reloc),
5634
0
             &a8_reloc_compare);
5635
5636
0
      if (found)
5637
0
        {
5638
0
          char *error_message = NULL;
5639
0
          struct elf_link_hash_entry *entry;
5640
5641
          /* We don't care about the error returned from this
5642
       function, only if there is glue or not.  */
5643
0
          entry = find_thumb_glue (info, found->sym_name,
5644
0
                 &error_message);
5645
5646
0
          if (entry)
5647
0
      found->non_a8_stub = true;
5648
5649
          /* Keep a simpler condition, for the sake of clarity.  */
5650
0
          if (htab->root.splt != NULL && found->hash != NULL
5651
0
        && found->hash->root.plt.offset != (bfd_vma) -1)
5652
0
      use_plt = true;
5653
5654
0
          if (found->r_type == R_ARM_THM_CALL)
5655
0
      {
5656
0
        if (found->branch_type == ST_BRANCH_TO_ARM
5657
0
            || use_plt)
5658
0
          force_target_arm = true;
5659
0
        else
5660
0
          force_target_thumb = true;
5661
0
      }
5662
0
        }
5663
5664
      /* Check if we have an offending branch instruction.  */
5665
5666
0
      if (found && found->non_a8_stub)
5667
        /* We've already made a stub for this instruction, e.g.
5668
           it's a long branch or a Thumb->ARM stub.  Assume that
5669
           stub will suffice to work around the A8 erratum (see
5670
           setting of always_after_branch above).  */
5671
0
        ;
5672
0
      else if (is_bcc)
5673
0
        {
5674
0
          offset = (insn & 0x7ff) << 1;
5675
0
          offset |= (insn & 0x3f0000) >> 4;
5676
0
          offset |= (insn & 0x2000) ? 0x40000 : 0;
5677
0
          offset |= (insn & 0x800) ? 0x80000 : 0;
5678
0
          offset |= (insn & 0x4000000) ? 0x100000 : 0;
5679
0
          if (offset & 0x100000)
5680
0
      offset |= ~ ((bfd_signed_vma) 0xfffff);
5681
0
          stub_type = arm_stub_a8_veneer_b_cond;
5682
0
        }
5683
0
      else if (is_b || is_bl || is_blx)
5684
0
        {
5685
0
          int s = (insn & 0x4000000) != 0;
5686
0
          int j1 = (insn & 0x2000) != 0;
5687
0
          int j2 = (insn & 0x800) != 0;
5688
0
          int i1 = !(j1 ^ s);
5689
0
          int i2 = !(j2 ^ s);
5690
5691
0
          offset = (insn & 0x7ff) << 1;
5692
0
          offset |= (insn & 0x3ff0000) >> 4;
5693
0
          offset |= i2 << 22;
5694
0
          offset |= i1 << 23;
5695
0
          offset |= s << 24;
5696
0
          if (offset & 0x1000000)
5697
0
      offset |= ~ ((bfd_signed_vma) 0xffffff);
5698
5699
0
          if (is_blx)
5700
0
      offset &= ~ ((bfd_signed_vma) 3);
5701
5702
0
          stub_type = is_blx ? arm_stub_a8_veneer_blx :
5703
0
      is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5704
0
        }
5705
5706
0
      if (stub_type != arm_stub_none)
5707
0
        {
5708
0
          bfd_vma pc_for_insn = base_vma + i + 4;
5709
5710
          /* The original instruction is a BL, but the target is
5711
       an ARM instruction.  If we were not making a stub,
5712
       the BL would have been converted to a BLX.  Use the
5713
       BLX stub instead in that case.  */
5714
0
          if (htab->use_blx && force_target_arm
5715
0
        && stub_type == arm_stub_a8_veneer_bl)
5716
0
      {
5717
0
        stub_type = arm_stub_a8_veneer_blx;
5718
0
        is_blx = true;
5719
0
        is_bl = false;
5720
0
      }
5721
          /* Conversely, if the original instruction was
5722
       BLX but the target is Thumb mode, use the BL
5723
       stub.  */
5724
0
          else if (force_target_thumb
5725
0
             && stub_type == arm_stub_a8_veneer_blx)
5726
0
      {
5727
0
        stub_type = arm_stub_a8_veneer_bl;
5728
0
        is_blx = false;
5729
0
        is_bl = true;
5730
0
      }
5731
5732
0
          if (is_blx)
5733
0
      pc_for_insn &= ~ ((bfd_vma) 3);
5734
5735
          /* If we found a relocation, use the proper destination,
5736
       not the offset in the (unrelocated) instruction.
5737
       Note this is always done if we switched the stub type
5738
       above.  */
5739
0
          if (found)
5740
0
      offset =
5741
0
        (bfd_signed_vma) (found->destination - pc_for_insn);
5742
5743
          /* If the stub will use a Thumb-mode branch to a
5744
       PLT target, redirect it to the preceding Thumb
5745
       entry point.  */
5746
0
          if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5747
0
      offset -= PLT_THUMB_STUB_SIZE;
5748
5749
0
          target = pc_for_insn + offset;
5750
5751
          /* The BLX stub is ARM-mode code.  Adjust the offset to
5752
       take the different PC value (+8 instead of +4) into
5753
       account.  */
5754
0
          if (stub_type == arm_stub_a8_veneer_blx)
5755
0
      offset += 4;
5756
5757
0
          if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5758
0
      {
5759
0
        char *stub_name = NULL;
5760
5761
0
        if (num_a8_fixes == a8_fix_table_size)
5762
0
          {
5763
0
            a8_fix_table_size *= 2;
5764
0
            a8_fixes = (struct a8_erratum_fix *)
5765
0
          bfd_realloc (a8_fixes,
5766
0
                 sizeof (struct a8_erratum_fix)
5767
0
                 * a8_fix_table_size);
5768
0
          }
5769
5770
0
        if (num_a8_fixes < prev_num_a8_fixes)
5771
0
          {
5772
            /* If we're doing a subsequent scan,
5773
         check if we've found the same fix as
5774
         before, and try and reuse the stub
5775
         name.  */
5776
0
            stub_name = a8_fixes[num_a8_fixes].stub_name;
5777
0
            if ((a8_fixes[num_a8_fixes].section != section)
5778
0
          || (a8_fixes[num_a8_fixes].offset != i))
5779
0
        {
5780
0
          free (stub_name);
5781
0
          stub_name = NULL;
5782
0
          *stub_changed_p = true;
5783
0
        }
5784
0
          }
5785
5786
0
        if (!stub_name)
5787
0
          {
5788
0
            stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5789
0
            if (stub_name != NULL)
5790
0
        sprintf (stub_name, "%x:%x", section->id, i);
5791
0
          }
5792
5793
0
        a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5794
0
        a8_fixes[num_a8_fixes].section = section;
5795
0
        a8_fixes[num_a8_fixes].offset = i;
5796
0
        a8_fixes[num_a8_fixes].target_offset =
5797
0
          target - base_vma;
5798
0
        a8_fixes[num_a8_fixes].orig_insn = insn;
5799
0
        a8_fixes[num_a8_fixes].stub_name = stub_name;
5800
0
        a8_fixes[num_a8_fixes].stub_type = stub_type;
5801
0
        a8_fixes[num_a8_fixes].branch_type =
5802
0
          is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5803
5804
0
        num_a8_fixes++;
5805
0
      }
5806
0
        }
5807
0
    }
5808
5809
0
        i += insn_32bit ? 4 : 2;
5810
0
        last_was_32bit = insn_32bit;
5811
0
        last_was_branch = is_32bit_branch;
5812
0
      }
5813
0
  }
5814
5815
0
      if (elf_section_data (section)->this_hdr.contents == NULL)
5816
0
  free (contents);
5817
0
    }
5818
5819
0
  *a8_fixes_p = a8_fixes;
5820
0
  *num_a8_fixes_p = num_a8_fixes;
5821
0
  *a8_fix_table_size_p = a8_fix_table_size;
5822
5823
0
  return false;
5824
0
}
5825
5826
/* Create or update a stub entry depending on whether the stub can already be
5827
   found in HTAB.  The stub is identified by:
5828
   - its type STUB_TYPE
5829
   - its source branch (note that several can share the same stub) whose
5830
     section and relocation (if any) are given by SECTION and IRELA
5831
     respectively
5832
   - its target symbol whose input section, hash, name, value and branch type
5833
     are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5834
     respectively
5835
5836
   If found, the value of the stub's target symbol is updated from SYM_VALUE
5837
   and *NEW_STUB is set to FALSE.  Otherwise, *NEW_STUB is set to
5838
   TRUE and the stub entry is initialized.
5839
5840
   Returns the stub that was created or updated, or NULL if an error
5841
   occurred.  */
5842
5843
static struct elf32_arm_stub_hash_entry *
5844
elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5845
           enum elf32_arm_stub_type stub_type, asection *section,
5846
           Elf_Internal_Rela *irela, asection *sym_sec,
5847
           struct elf32_arm_link_hash_entry *hash, char *sym_name,
5848
           bfd_vma sym_value, enum arm_st_branch_type branch_type,
5849
           bool *new_stub)
5850
0
{
5851
0
  const asection *id_sec;
5852
0
  char *stub_name;
5853
0
  struct elf32_arm_stub_hash_entry *stub_entry;
5854
0
  unsigned int r_type;
5855
0
  bool sym_claimed = arm_stub_sym_claimed (stub_type);
5856
5857
0
  BFD_ASSERT (stub_type != arm_stub_none);
5858
0
  *new_stub = false;
5859
5860
0
  if (sym_claimed)
5861
0
    stub_name = sym_name;
5862
0
  else
5863
0
    {
5864
0
      BFD_ASSERT (irela);
5865
0
      BFD_ASSERT (section);
5866
0
      BFD_ASSERT (section->id <= htab->top_id);
5867
5868
      /* Support for grouping stub sections.  */
5869
0
      id_sec = htab->stub_group[section->id].link_sec;
5870
5871
      /* Get the name of this stub.  */
5872
0
      stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5873
0
               stub_type);
5874
0
      if (!stub_name)
5875
0
  return NULL;
5876
0
    }
5877
5878
0
  stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
5879
0
             false);
5880
  /* The proper stub has already been created, just update its value.  */
5881
0
  if (stub_entry != NULL)
5882
0
    {
5883
0
      if (!sym_claimed)
5884
0
  free (stub_name);
5885
0
      stub_entry->target_value = sym_value;
5886
0
      return stub_entry;
5887
0
    }
5888
5889
0
  stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5890
0
  if (stub_entry == NULL)
5891
0
    {
5892
0
      if (!sym_claimed)
5893
0
  free (stub_name);
5894
0
      return NULL;
5895
0
    }
5896
5897
0
  stub_entry->target_value = sym_value;
5898
0
  stub_entry->target_section = sym_sec;
5899
0
  stub_entry->stub_type = stub_type;
5900
0
  stub_entry->h = hash;
5901
0
  stub_entry->branch_type = branch_type;
5902
5903
0
  if (sym_claimed)
5904
0
    stub_entry->output_name = sym_name;
5905
0
  else
5906
0
    {
5907
0
      if (sym_name == NULL)
5908
0
  sym_name = "unnamed";
5909
0
      stub_entry->output_name = (char *)
5910
0
  bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5911
0
           + strlen (sym_name));
5912
0
      if (stub_entry->output_name == NULL)
5913
0
  {
5914
0
    free (stub_name);
5915
0
    return NULL;
5916
0
  }
5917
5918
      /* For historical reasons, use the existing names for ARM-to-Thumb and
5919
   Thumb-to-ARM stubs.  */
5920
0
      r_type = ELF32_R_TYPE (irela->r_info);
5921
0
      if ((r_type == (unsigned int) R_ARM_THM_CALL
5922
0
     || r_type == (unsigned int) R_ARM_THM_JUMP24
5923
0
     || r_type == (unsigned int) R_ARM_THM_JUMP19)
5924
0
    && branch_type == ST_BRANCH_TO_ARM)
5925
0
  sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5926
0
      else if ((r_type == (unsigned int) R_ARM_CALL
5927
0
    || r_type == (unsigned int) R_ARM_JUMP24)
5928
0
         && branch_type == ST_BRANCH_TO_THUMB)
5929
0
  sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5930
0
      else
5931
0
  sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5932
0
    }
5933
5934
0
  *new_stub = true;
5935
0
  return stub_entry;
5936
0
}
5937
5938
/* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5939
   gateway veneer to transition from non secure to secure state and create them
5940
   accordingly.
5941
5942
   "ARMv8-M Security Extensions: Requirements on Development Tools" document
5943
   defines the conditions that govern Secure Gateway veneer creation for a
5944
   given symbol <SYM> as follows:
5945
   - it has function type
5946
   - it has non local binding
5947
   - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5948
     same type, binding and value as <SYM> (called normal symbol).
5949
   An entry function can handle secure state transition itself in which case
5950
   its special symbol would have a different value from the normal symbol.
5951
5952
   OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5953
   entry mapping while HTAB gives the name to hash entry mapping.
5954
   *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5955
   created.
5956
5957
   The return value gives whether a stub failed to be allocated.  */
5958
5959
static bool
5960
cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5961
     obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5962
     int *cmse_stub_created)
5963
0
{
5964
0
  const struct elf_backend_data *bed;
5965
0
  Elf_Internal_Shdr *symtab_hdr;
5966
0
  unsigned i, j, sym_count, ext_start;
5967
0
  Elf_Internal_Sym *cmse_sym, *local_syms;
5968
0
  struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5969
0
  enum arm_st_branch_type branch_type;
5970
0
  char *sym_name, *lsym_name;
5971
0
  bfd_vma sym_value;
5972
0
  asection *section;
5973
0
  struct elf32_arm_stub_hash_entry *stub_entry;
5974
0
  bool is_v8m, new_stub, cmse_invalid, ret = true;
5975
5976
0
  bed = get_elf_backend_data (input_bfd);
5977
0
  symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5978
0
  sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5979
0
  ext_start = symtab_hdr->sh_info;
5980
0
  is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5981
0
      && out_attr[Tag_CPU_arch_profile].i == 'M');
5982
5983
0
  local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5984
0
  if (local_syms == NULL)
5985
0
    local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5986
0
               symtab_hdr->sh_info, 0, NULL, NULL,
5987
0
               NULL);
5988
0
  if (symtab_hdr->sh_info && local_syms == NULL)
5989
0
    return false;
5990
5991
  /* Scan symbols.  */
5992
0
  for (i = 0; i < sym_count; i++)
5993
0
    {
5994
0
      cmse_invalid = false;
5995
5996
0
      if (i < ext_start)
5997
0
  {
5998
0
    cmse_sym = &local_syms[i];
5999
0
    sym_name = bfd_elf_string_from_elf_section (input_bfd,
6000
0
                  symtab_hdr->sh_link,
6001
0
                  cmse_sym->st_name);
6002
0
    if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
6003
0
      continue;
6004
6005
    /* Special symbol with local binding.  */
6006
0
    cmse_invalid = true;
6007
0
  }
6008
0
      else
6009
0
  {
6010
0
    cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
6011
0
    if (cmse_hash == NULL)
6012
0
      continue;
6013
6014
0
    sym_name = (char *) cmse_hash->root.root.root.string;
6015
0
    if (!startswith (sym_name, CMSE_PREFIX))
6016
0
      continue;
6017
6018
    /* Special symbol has incorrect binding or type.  */
6019
0
    if ((cmse_hash->root.root.type != bfd_link_hash_defined
6020
0
         && cmse_hash->root.root.type != bfd_link_hash_defweak)
6021
0
        || cmse_hash->root.type != STT_FUNC)
6022
0
      cmse_invalid = true;
6023
0
  }
6024
6025
0
      if (!is_v8m)
6026
0
  {
6027
0
    _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
6028
0
        "ARMv8-M architecture or later"),
6029
0
            input_bfd, sym_name);
6030
0
    is_v8m = true; /* Avoid multiple warning.  */
6031
0
    ret = false;
6032
0
  }
6033
6034
0
      if (cmse_invalid)
6035
0
  {
6036
0
    _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
6037
0
        " a global or weak function symbol"),
6038
0
            input_bfd, sym_name);
6039
0
    ret = false;
6040
0
    if (i < ext_start)
6041
0
      continue;
6042
0
  }
6043
6044
0
      sym_name += strlen (CMSE_PREFIX);
6045
0
      hash = (struct elf32_arm_link_hash_entry *)
6046
0
  elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6047
6048
      /* No associated normal symbol or it is neither global nor weak.  */
6049
0
      if (!hash
6050
0
    || (hash->root.root.type != bfd_link_hash_defined
6051
0
        && hash->root.root.type != bfd_link_hash_defweak)
6052
0
    || hash->root.type != STT_FUNC)
6053
0
  {
6054
    /* Initialize here to avoid warning about use of possibly
6055
       uninitialized variable.  */
6056
0
    j = 0;
6057
6058
0
    if (!hash)
6059
0
      {
6060
        /* Searching for a normal symbol with local binding.  */
6061
0
        for (; j < ext_start; j++)
6062
0
    {
6063
0
      lsym_name =
6064
0
        bfd_elf_string_from_elf_section (input_bfd,
6065
0
                 symtab_hdr->sh_link,
6066
0
                 local_syms[j].st_name);
6067
0
      if (!strcmp (sym_name, lsym_name))
6068
0
        break;
6069
0
    }
6070
0
      }
6071
6072
0
    if (hash || j < ext_start)
6073
0
      {
6074
0
        _bfd_error_handler
6075
0
    (_("%pB: invalid standard symbol `%s'; it must be "
6076
0
       "a global or weak function symbol"),
6077
0
     input_bfd, sym_name);
6078
0
      }
6079
0
    else
6080
0
      _bfd_error_handler
6081
0
        (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6082
0
    ret = false;
6083
0
    if (!hash)
6084
0
      continue;
6085
0
  }
6086
6087
0
      sym_value = hash->root.root.u.def.value;
6088
0
      section = hash->root.root.u.def.section;
6089
6090
0
      if (cmse_hash->root.root.u.def.section != section)
6091
0
  {
6092
0
    _bfd_error_handler
6093
0
      (_("%pB: `%s' and its special symbol are in different sections"),
6094
0
       input_bfd, sym_name);
6095
0
    ret = false;
6096
0
  }
6097
0
      if (cmse_hash->root.root.u.def.value != sym_value)
6098
0
  continue; /* Ignore: could be an entry function starting with SG.  */
6099
6100
  /* If this section is a link-once section that will be discarded, then
6101
     don't create any stubs.  */
6102
0
      if (section->output_section == NULL)
6103
0
  {
6104
0
    _bfd_error_handler
6105
0
      (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6106
0
    continue;
6107
0
  }
6108
6109
0
      if (hash->root.size == 0)
6110
0
  {
6111
0
    _bfd_error_handler
6112
0
      (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6113
0
    ret = false;
6114
0
  }
6115
6116
0
      if (!ret)
6117
0
  continue;
6118
0
      branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6119
0
      stub_entry
6120
0
  = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6121
0
         NULL, NULL, section, hash, sym_name,
6122
0
         sym_value, branch_type, &new_stub);
6123
6124
0
      if (stub_entry == NULL)
6125
0
   ret = false;
6126
0
      else
6127
0
  {
6128
0
    BFD_ASSERT (new_stub);
6129
0
    (*cmse_stub_created)++;
6130
0
  }
6131
0
    }
6132
6133
0
  if (!symtab_hdr->contents)
6134
0
    free (local_syms);
6135
0
  return ret;
6136
0
}
6137
6138
/* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6139
   code entry function, ie can be called from non secure code without using a
6140
   veneer.  */
6141
6142
static bool
6143
cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6144
0
{
6145
0
  bfd_byte contents[4];
6146
0
  uint32_t first_insn;
6147
0
  asection *section;
6148
0
  file_ptr offset;
6149
0
  bfd *abfd;
6150
6151
  /* Defined symbol of function type.  */
6152
0
  if (hash->root.root.type != bfd_link_hash_defined
6153
0
      && hash->root.root.type != bfd_link_hash_defweak)
6154
0
    return false;
6155
0
  if (hash->root.type != STT_FUNC)
6156
0
    return false;
6157
6158
  /* Read first instruction.  */
6159
0
  section = hash->root.root.u.def.section;
6160
0
  abfd = section->owner;
6161
0
  offset = hash->root.root.u.def.value - section->vma;
6162
0
  if (!bfd_get_section_contents (abfd, section, contents, offset,
6163
0
         sizeof (contents)))
6164
0
    return false;
6165
6166
0
  first_insn = bfd_get_32 (abfd, contents);
6167
6168
  /* Starts by SG instruction.  */
6169
0
  return first_insn == 0xe97fe97f;
6170
0
}
6171
6172
/* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6173
   secure gateway veneers (ie. the veneers was not in the input import library)
6174
   and there is no output import library (GEN_INFO->out_implib_bfd is NULL.  */
6175
6176
static bool
6177
arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6178
0
{
6179
0
  struct elf32_arm_stub_hash_entry *stub_entry;
6180
0
  struct bfd_link_info *info;
6181
6182
  /* Massage our args to the form they really have.  */
6183
0
  stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6184
0
  info = (struct bfd_link_info *) gen_info;
6185
6186
0
  if (info->out_implib_bfd)
6187
0
    return true;
6188
6189
0
  if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6190
0
    return true;
6191
6192
0
  if (stub_entry->stub_offset == (bfd_vma) -1)
6193
0
    _bfd_error_handler ("  %s", stub_entry->output_name);
6194
6195
0
  return true;
6196
0
}
6197
6198
/* Set offset of each secure gateway veneers so that its address remain
6199
   identical to the one in the input import library referred by
6200
   HTAB->in_implib_bfd.  A warning is issued for veneers that disappeared
6201
   (present in input import library but absent from the executable being
6202
   linked) or if new veneers appeared and there is no output import library
6203
   (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6204
   number of secure gateway veneers found in the input import library.
6205
6206
   The function returns whether an error occurred.  If no error occurred,
6207
   *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6208
   and this function and HTAB->new_cmse_stub_offset is set to the biggest
6209
   veneer observed set for new veneers to be layed out after.  */
6210
6211
static bool
6212
set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6213
          struct elf32_arm_link_hash_table *htab,
6214
          int *cmse_stub_created)
6215
0
{
6216
0
  long symsize;
6217
0
  char *sym_name;
6218
0
  flagword flags;
6219
0
  long i, symcount;
6220
0
  bfd *in_implib_bfd;
6221
0
  asection *stub_out_sec;
6222
0
  bool ret = true;
6223
0
  Elf_Internal_Sym *intsym;
6224
0
  const char *out_sec_name;
6225
0
  bfd_size_type cmse_stub_size;
6226
0
  asymbol **sympp = NULL, *sym;
6227
0
  struct elf32_arm_link_hash_entry *hash;
6228
0
  const insn_sequence *cmse_stub_template;
6229
0
  struct elf32_arm_stub_hash_entry *stub_entry;
6230
0
  int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6231
0
  bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6232
0
  bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6233
6234
  /* No input secure gateway import library.  */
6235
0
  if (!htab->in_implib_bfd)
6236
0
    return true;
6237
6238
0
  in_implib_bfd = htab->in_implib_bfd;
6239
0
  if (!htab->cmse_implib)
6240
0
    {
6241
0
      _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6242
0
          "Gateway import libraries"), in_implib_bfd);
6243
0
      return false;
6244
0
    }
6245
6246
  /* Get symbol table size.  */
6247
0
  symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6248
0
  if (symsize < 0)
6249
0
    return false;
6250
6251
  /* Read in the input secure gateway import library's symbol table.  */
6252
0
  sympp = (asymbol **) bfd_malloc (symsize);
6253
0
  if (sympp == NULL)
6254
0
    return false;
6255
6256
0
  symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6257
0
  if (symcount < 0)
6258
0
    {
6259
0
      ret = false;
6260
0
      goto free_sym_buf;
6261
0
    }
6262
6263
0
  htab->new_cmse_stub_offset = 0;
6264
0
  cmse_stub_size =
6265
0
    find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6266
0
         &cmse_stub_template,
6267
0
         &cmse_stub_template_size);
6268
0
  out_sec_name =
6269
0
    arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6270
0
  stub_out_sec =
6271
0
    bfd_get_section_by_name (htab->obfd, out_sec_name);
6272
0
  if (stub_out_sec != NULL)
6273
0
    cmse_stub_sec_vma = stub_out_sec->vma;
6274
6275
  /* Set addresses of veneers mentionned in input secure gateway import
6276
     library's symbol table.  */
6277
0
  for (i = 0; i < symcount; i++)
6278
0
    {
6279
0
      sym = sympp[i];
6280
0
      flags = sym->flags;
6281
0
      sym_name = (char *) bfd_asymbol_name (sym);
6282
0
      intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6283
6284
0
      if (sym->section != bfd_abs_section_ptr
6285
0
    || !(flags & (BSF_GLOBAL | BSF_WEAK))
6286
0
    || (flags & BSF_FUNCTION) != BSF_FUNCTION
6287
0
    || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6288
0
        != ST_BRANCH_TO_THUMB))
6289
0
  {
6290
0
    _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6291
0
        "symbol should be absolute, global and "
6292
0
        "refer to Thumb functions"),
6293
0
            in_implib_bfd, sym_name);
6294
0
    ret = false;
6295
0
    continue;
6296
0
  }
6297
6298
0
      veneer_value = bfd_asymbol_value (sym);
6299
0
      stub_offset = veneer_value - cmse_stub_sec_vma;
6300
0
      stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6301
0
           false, false);
6302
0
      hash = (struct elf32_arm_link_hash_entry *)
6303
0
  elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
6304
6305
      /* Stub entry should have been created by cmse_scan or the symbol be of
6306
   a secure function callable from non secure code.  */
6307
0
      if (!stub_entry && !hash)
6308
0
  {
6309
0
    bool new_stub;
6310
6311
0
    _bfd_error_handler
6312
0
      (_("entry function `%s' disappeared from secure code"), sym_name);
6313
0
    hash = (struct elf32_arm_link_hash_entry *)
6314
0
      elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
6315
0
    stub_entry
6316
0
      = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6317
0
             NULL, NULL, bfd_abs_section_ptr, hash,
6318
0
             sym_name, veneer_value,
6319
0
             ST_BRANCH_TO_THUMB, &new_stub);
6320
0
    if (stub_entry == NULL)
6321
0
      ret = false;
6322
0
    else
6323
0
    {
6324
0
      BFD_ASSERT (new_stub);
6325
0
      new_cmse_stubs_created++;
6326
0
      (*cmse_stub_created)++;
6327
0
    }
6328
0
    stub_entry->stub_template_size = stub_entry->stub_size = 0;
6329
0
    stub_entry->stub_offset = stub_offset;
6330
0
  }
6331
      /* Symbol found is not callable from non secure code.  */
6332
0
      else if (!stub_entry)
6333
0
  {
6334
0
    if (!cmse_entry_fct_p (hash))
6335
0
      {
6336
0
        _bfd_error_handler (_("`%s' refers to a non entry function"),
6337
0
          sym_name);
6338
0
        ret = false;
6339
0
      }
6340
0
    continue;
6341
0
  }
6342
0
      else
6343
0
  {
6344
    /* Only stubs for SG veneers should have been created.  */
6345
0
    BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6346
6347
    /* Check visibility hasn't changed.  */
6348
0
    if (!!(flags & BSF_GLOBAL)
6349
0
        != (hash->root.root.type == bfd_link_hash_defined))
6350
0
      _bfd_error_handler
6351
0
        (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6352
0
         sym_name);
6353
6354
0
    stub_entry->stub_offset = stub_offset;
6355
0
  }
6356
6357
      /* Size should match that of a SG veneer.  */
6358
0
      if (intsym->st_size != cmse_stub_size)
6359
0
  {
6360
0
    _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6361
0
            in_implib_bfd, sym_name);
6362
0
    ret = false;
6363
0
  }
6364
6365
      /* Previous veneer address is before current SG veneer section.  */
6366
0
      if (veneer_value < cmse_stub_sec_vma)
6367
0
  {
6368
    /* Avoid offset underflow.  */
6369
0
    if (stub_entry)
6370
0
      stub_entry->stub_offset = 0;
6371
0
    stub_offset = 0;
6372
0
    ret = false;
6373
0
  }
6374
6375
      /* Complain if stub offset not a multiple of stub size.  */
6376
0
      if (stub_offset % cmse_stub_size)
6377
0
  {
6378
0
    _bfd_error_handler
6379
0
      (_("offset of veneer for entry function `%s' not a multiple of "
6380
0
         "its size"), sym_name);
6381
0
    ret = false;
6382
0
  }
6383
6384
0
      if (!ret)
6385
0
  continue;
6386
6387
0
      new_cmse_stubs_created--;
6388
0
      if (veneer_value < cmse_stub_array_start)
6389
0
  cmse_stub_array_start = veneer_value;
6390
0
      next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6391
0
      if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6392
0
  htab->new_cmse_stub_offset = next_cmse_stub_offset;
6393
0
    }
6394
6395
0
  if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6396
0
    {
6397
0
      BFD_ASSERT (new_cmse_stubs_created > 0);
6398
0
      _bfd_error_handler
6399
0
  (_("new entry function(s) introduced but no output import library "
6400
0
     "specified:"));
6401
0
      bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6402
0
    }
6403
6404
0
  if (cmse_stub_array_start != cmse_stub_sec_vma)
6405
0
    {
6406
0
      _bfd_error_handler
6407
0
  (_("start address of `%s' is different from previous link"),
6408
0
   out_sec_name);
6409
0
      ret = false;
6410
0
    }
6411
6412
0
 free_sym_buf:
6413
0
  free (sympp);
6414
0
  return ret;
6415
0
}
6416
6417
/* Determine and set the size of the stub section for a final link.
6418
6419
   The basic idea here is to examine all the relocations looking for
6420
   PC-relative calls to a target that is unreachable with a "bl"
6421
   instruction.  */
6422
6423
bool
6424
elf32_arm_size_stubs (bfd *output_bfd,
6425
          bfd *stub_bfd,
6426
          struct bfd_link_info *info,
6427
          bfd_signed_vma group_size,
6428
          asection * (*add_stub_section) (const char *, asection *,
6429
                  asection *,
6430
                  unsigned int),
6431
          void (*layout_sections_again) (void))
6432
0
{
6433
0
  bool ret = true;
6434
0
  obj_attribute *out_attr;
6435
0
  int cmse_stub_created = 0;
6436
0
  bfd_size_type stub_group_size;
6437
0
  bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
6438
0
  struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6439
0
  struct a8_erratum_fix *a8_fixes = NULL;
6440
0
  unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6441
0
  struct a8_erratum_reloc *a8_relocs = NULL;
6442
0
  unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6443
6444
0
  if (htab == NULL)
6445
0
    return false;
6446
6447
0
  if (htab->fix_cortex_a8)
6448
0
    {
6449
0
      a8_fixes = (struct a8_erratum_fix *)
6450
0
    bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6451
0
      a8_relocs = (struct a8_erratum_reloc *)
6452
0
    bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6453
0
    }
6454
6455
  /* Propagate mach to stub bfd, because it may not have been
6456
     finalized when we created stub_bfd.  */
6457
0
  bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6458
0
         bfd_get_mach (output_bfd));
6459
6460
  /* Stash our params away.  */
6461
0
  htab->stub_bfd = stub_bfd;
6462
0
  htab->add_stub_section = add_stub_section;
6463
0
  htab->layout_sections_again = layout_sections_again;
6464
0
  stubs_always_after_branch = group_size < 0;
6465
6466
0
  out_attr = elf_known_obj_attributes_proc (output_bfd);
6467
0
  m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6468
6469
  /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6470
     as the first half of a 32-bit branch straddling two 4K pages.  This is a
6471
     crude way of enforcing that.  */
6472
0
  if (htab->fix_cortex_a8)
6473
0
    stubs_always_after_branch = 1;
6474
6475
0
  if (group_size < 0)
6476
0
    stub_group_size = -group_size;
6477
0
  else
6478
0
    stub_group_size = group_size;
6479
6480
0
  if (stub_group_size == 1)
6481
0
    {
6482
      /* Default values.  */
6483
      /* Thumb branch range is +-4MB has to be used as the default
6484
   maximum size (a given section can contain both ARM and Thumb
6485
   code, so the worst case has to be taken into account).
6486
6487
   This value is 24K less than that, which allows for 2025
6488
   12-byte stubs.  If we exceed that, then we will fail to link.
6489
   The user will have to relink with an explicit group size
6490
   option.  */
6491
0
      stub_group_size = 4170000;
6492
0
    }
6493
6494
0
  group_sections (htab, stub_group_size, stubs_always_after_branch);
6495
6496
  /* If we're applying the cortex A8 fix, we need to determine the
6497
     program header size now, because we cannot change it later --
6498
     that could alter section placements.  Notice the A8 erratum fix
6499
     ends up requiring the section addresses to remain unchanged
6500
     modulo the page size.  That's something we cannot represent
6501
     inside BFD, and we don't want to force the section alignment to
6502
     be the page size.  */
6503
0
  if (htab->fix_cortex_a8)
6504
0
    (*htab->layout_sections_again) ();
6505
6506
0
  while (1)
6507
0
    {
6508
0
      bfd *input_bfd;
6509
0
      unsigned int bfd_indx;
6510
0
      asection *stub_sec;
6511
0
      enum elf32_arm_stub_type stub_type;
6512
0
      bool stub_changed = false;
6513
0
      unsigned prev_num_a8_fixes = num_a8_fixes;
6514
6515
0
      num_a8_fixes = 0;
6516
0
      for (input_bfd = info->input_bfds, bfd_indx = 0;
6517
0
     input_bfd != NULL;
6518
0
     input_bfd = input_bfd->link.next, bfd_indx++)
6519
0
  {
6520
0
    Elf_Internal_Shdr *symtab_hdr;
6521
0
    asection *section;
6522
0
    Elf_Internal_Sym *local_syms = NULL;
6523
6524
0
    if (!is_arm_elf (input_bfd))
6525
0
      continue;
6526
0
    if ((input_bfd->flags & DYNAMIC) != 0
6527
0
        && (elf_sym_hashes (input_bfd) == NULL
6528
0
      || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
6529
0
      continue;
6530
6531
0
    num_a8_relocs = 0;
6532
6533
    /* We'll need the symbol table in a second.  */
6534
0
    symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6535
0
    if (symtab_hdr->sh_info == 0)
6536
0
      continue;
6537
6538
    /* Limit scan of symbols to object file whose profile is
6539
       Microcontroller to not hinder performance in the general case.  */
6540
0
    if (m_profile && first_veneer_scan)
6541
0
      {
6542
0
        struct elf_link_hash_entry **sym_hashes;
6543
6544
0
        sym_hashes = elf_sym_hashes (input_bfd);
6545
0
        if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6546
0
            &cmse_stub_created))
6547
0
    goto error_ret_free_local;
6548
6549
0
        if (cmse_stub_created != 0)
6550
0
    stub_changed = true;
6551
0
      }
6552
6553
    /* Walk over each section attached to the input bfd.  */
6554
0
    for (section = input_bfd->sections;
6555
0
         section != NULL;
6556
0
         section = section->next)
6557
0
      {
6558
0
        Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6559
6560
        /* If there aren't any relocs, then there's nothing more
6561
     to do.  */
6562
0
        if ((section->flags & SEC_RELOC) == 0
6563
0
      || section->reloc_count == 0
6564
0
      || (section->flags & SEC_CODE) == 0)
6565
0
    continue;
6566
6567
        /* If this section is a link-once section that will be
6568
     discarded, then don't create any stubs.  */
6569
0
        if (section->output_section == NULL
6570
0
      || section->output_section->owner != output_bfd)
6571
0
    continue;
6572
6573
        /* Get the relocs.  */
6574
0
        internal_relocs
6575
0
    = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6576
0
               NULL, info->keep_memory);
6577
0
        if (internal_relocs == NULL)
6578
0
    goto error_ret_free_local;
6579
6580
        /* Now examine each relocation.  */
6581
0
        irela = internal_relocs;
6582
0
        irelaend = irela + section->reloc_count;
6583
0
        for (; irela < irelaend; irela++)
6584
0
    {
6585
0
      unsigned int r_type, r_indx;
6586
0
      asection *sym_sec;
6587
0
      bfd_vma sym_value;
6588
0
      bfd_vma destination;
6589
0
      struct elf32_arm_link_hash_entry *hash;
6590
0
      const char *sym_name;
6591
0
      unsigned char st_type;
6592
0
      enum arm_st_branch_type branch_type;
6593
0
      bool created_stub = false;
6594
6595
0
      r_type = ELF32_R_TYPE (irela->r_info);
6596
0
      r_indx = ELF32_R_SYM (irela->r_info);
6597
6598
0
      if (r_type >= (unsigned int) R_ARM_max)
6599
0
        {
6600
0
          bfd_set_error (bfd_error_bad_value);
6601
0
        error_ret_free_internal:
6602
0
          if (elf_section_data (section)->relocs == NULL)
6603
0
      free (internal_relocs);
6604
        /* Fall through.  */
6605
0
        error_ret_free_local:
6606
0
          if (symtab_hdr->contents != (unsigned char *) local_syms)
6607
0
      free (local_syms);
6608
0
          return false;
6609
0
        }
6610
6611
0
      hash = NULL;
6612
0
      if (r_indx >= symtab_hdr->sh_info)
6613
0
        hash = elf32_arm_hash_entry
6614
0
          (elf_sym_hashes (input_bfd)
6615
0
           [r_indx - symtab_hdr->sh_info]);
6616
6617
      /* Only look for stubs on branch instructions, or
6618
         non-relaxed TLSCALL  */
6619
0
      if ((r_type != (unsigned int) R_ARM_CALL)
6620
0
          && (r_type != (unsigned int) R_ARM_THM_CALL)
6621
0
          && (r_type != (unsigned int) R_ARM_JUMP24)
6622
0
          && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6623
0
          && (r_type != (unsigned int) R_ARM_THM_XPC22)
6624
0
          && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6625
0
          && (r_type != (unsigned int) R_ARM_PLT32)
6626
0
          && !((r_type == (unsigned int) R_ARM_TLS_CALL
6627
0
          || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6628
0
         && r_type == (elf32_arm_tls_transition
6629
0
           (info, r_type,
6630
0
            (struct elf_link_hash_entry *) hash))
6631
0
         && ((hash ? hash->tls_type
6632
0
        : (elf32_arm_local_got_tls_type
6633
0
           (input_bfd)[r_indx]))
6634
0
             & GOT_TLS_GDESC) != 0))
6635
0
        continue;
6636
6637
      /* Now determine the call target, its name, value,
6638
         section.  */
6639
0
      sym_sec = NULL;
6640
0
      sym_value = 0;
6641
0
      destination = 0;
6642
0
      sym_name = NULL;
6643
6644
0
      if (r_type == (unsigned int) R_ARM_TLS_CALL
6645
0
          || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6646
0
        {
6647
          /* A non-relaxed TLS call.  The target is the
6648
       plt-resident trampoline and nothing to do
6649
       with the symbol.  */
6650
0
          BFD_ASSERT (htab->tls_trampoline > 0);
6651
0
          sym_sec = htab->root.splt;
6652
0
          sym_value = htab->tls_trampoline;
6653
0
          hash = 0;
6654
0
          st_type = STT_FUNC;
6655
0
          branch_type = ST_BRANCH_TO_ARM;
6656
0
        }
6657
0
      else if (!hash)
6658
0
        {
6659
          /* It's a local symbol.  */
6660
0
          Elf_Internal_Sym *sym;
6661
6662
0
          if (local_syms == NULL)
6663
0
      {
6664
0
        local_syms
6665
0
          = (Elf_Internal_Sym *) symtab_hdr->contents;
6666
0
        if (local_syms == NULL)
6667
0
          local_syms
6668
0
            = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6669
0
                  symtab_hdr->sh_info, 0,
6670
0
                  NULL, NULL, NULL);
6671
0
        if (local_syms == NULL)
6672
0
          goto error_ret_free_internal;
6673
0
      }
6674
6675
0
          sym = local_syms + r_indx;
6676
0
          if (sym->st_shndx == SHN_UNDEF)
6677
0
      sym_sec = bfd_und_section_ptr;
6678
0
          else if (sym->st_shndx == SHN_ABS)
6679
0
      sym_sec = bfd_abs_section_ptr;
6680
0
          else if (sym->st_shndx == SHN_COMMON)
6681
0
      sym_sec = bfd_com_section_ptr;
6682
0
          else
6683
0
      sym_sec =
6684
0
        bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6685
6686
0
          if (!sym_sec)
6687
      /* This is an undefined symbol.  It can never
6688
         be resolved.  */
6689
0
      continue;
6690
6691
0
          if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6692
0
      sym_value = sym->st_value;
6693
0
          destination = (sym_value + irela->r_addend
6694
0
             + sym_sec->output_offset
6695
0
             + sym_sec->output_section->vma);
6696
0
          st_type = ELF_ST_TYPE (sym->st_info);
6697
0
          branch_type =
6698
0
      ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6699
0
          sym_name
6700
0
      = bfd_elf_string_from_elf_section (input_bfd,
6701
0
                 symtab_hdr->sh_link,
6702
0
                 sym->st_name);
6703
0
        }
6704
0
      else
6705
0
        {
6706
          /* It's an external symbol.  */
6707
0
          while (hash->root.root.type == bfd_link_hash_indirect
6708
0
           || hash->root.root.type == bfd_link_hash_warning)
6709
0
      hash = ((struct elf32_arm_link_hash_entry *)
6710
0
        hash->root.root.u.i.link);
6711
6712
0
          if (hash->root.root.type == bfd_link_hash_defined
6713
0
        || hash->root.root.type == bfd_link_hash_defweak)
6714
0
      {
6715
0
        sym_sec = hash->root.root.u.def.section;
6716
0
        sym_value = hash->root.root.u.def.value;
6717
6718
0
        struct elf32_arm_link_hash_table *globals =
6719
0
              elf32_arm_hash_table (info);
6720
6721
        /* For a destination in a shared library,
6722
           use the PLT stub as target address to
6723
           decide whether a branch stub is
6724
           needed.  */
6725
0
        if (globals != NULL
6726
0
            && globals->root.splt != NULL
6727
0
            && hash != NULL
6728
0
            && hash->root.plt.offset != (bfd_vma) -1)
6729
0
          {
6730
0
            sym_sec = globals->root.splt;
6731
0
            sym_value = hash->root.plt.offset;
6732
0
            if (sym_sec->output_section != NULL)
6733
0
        destination = (sym_value
6734
0
                 + sym_sec->output_offset
6735
0
                 + sym_sec->output_section->vma);
6736
0
          }
6737
0
        else if (sym_sec->output_section != NULL)
6738
0
          destination = (sym_value + irela->r_addend
6739
0
             + sym_sec->output_offset
6740
0
             + sym_sec->output_section->vma);
6741
0
      }
6742
0
          else if ((hash->root.root.type == bfd_link_hash_undefined)
6743
0
             || (hash->root.root.type == bfd_link_hash_undefweak))
6744
0
      {
6745
        /* For a shared library, use the PLT stub as
6746
           target address to decide whether a long
6747
           branch stub is needed.
6748
           For absolute code, they cannot be handled.  */
6749
0
        struct elf32_arm_link_hash_table *globals =
6750
0
          elf32_arm_hash_table (info);
6751
6752
0
        if (globals != NULL
6753
0
            && globals->root.splt != NULL
6754
0
            && hash != NULL
6755
0
            && hash->root.plt.offset != (bfd_vma) -1)
6756
0
          {
6757
0
            sym_sec = globals->root.splt;
6758
0
            sym_value = hash->root.plt.offset;
6759
0
            if (sym_sec->output_section != NULL)
6760
0
        destination = (sym_value
6761
0
                 + sym_sec->output_offset
6762
0
                 + sym_sec->output_section->vma);
6763
0
          }
6764
0
        else
6765
0
          continue;
6766
0
      }
6767
0
          else
6768
0
      {
6769
0
        bfd_set_error (bfd_error_bad_value);
6770
0
        goto error_ret_free_internal;
6771
0
      }
6772
0
          st_type = hash->root.type;
6773
0
          branch_type =
6774
0
      ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6775
0
          sym_name = hash->root.root.root.string;
6776
0
        }
6777
6778
0
      do
6779
0
        {
6780
0
          bool new_stub;
6781
0
          struct elf32_arm_stub_hash_entry *stub_entry;
6782
6783
          /* Determine what (if any) linker stub is needed.  */
6784
0
          stub_type = arm_type_of_stub (info, section, irela,
6785
0
                st_type, &branch_type,
6786
0
                hash, destination, sym_sec,
6787
0
                input_bfd, sym_name);
6788
0
          if (stub_type == arm_stub_none)
6789
0
      break;
6790
6791
          /* We've either created a stub for this reloc already,
6792
       or we are about to.  */
6793
0
          stub_entry =
6794
0
      elf32_arm_create_stub (htab, stub_type, section, irela,
6795
0
                 sym_sec, hash,
6796
0
                 (char *) sym_name, sym_value,
6797
0
                 branch_type, &new_stub);
6798
6799
0
          created_stub = stub_entry != NULL;
6800
0
          if (!created_stub)
6801
0
      goto error_ret_free_internal;
6802
0
          else if (!new_stub)
6803
0
      break;
6804
0
          else
6805
0
      stub_changed = true;
6806
0
        }
6807
0
      while (0);
6808
6809
      /* Look for relocations which might trigger Cortex-A8
6810
         erratum.  */
6811
0
      if (htab->fix_cortex_a8
6812
0
          && (r_type == (unsigned int) R_ARM_THM_JUMP24
6813
0
        || r_type == (unsigned int) R_ARM_THM_JUMP19
6814
0
        || r_type == (unsigned int) R_ARM_THM_CALL
6815
0
        || r_type == (unsigned int) R_ARM_THM_XPC22))
6816
0
        {
6817
0
          bfd_vma from = section->output_section->vma
6818
0
             + section->output_offset
6819
0
             + irela->r_offset;
6820
6821
0
          if ((from & 0xfff) == 0xffe)
6822
0
      {
6823
        /* Found a candidate.  Note we haven't checked the
6824
           destination is within 4K here: if we do so (and
6825
           don't create an entry in a8_relocs) we can't tell
6826
           that a branch should have been relocated when
6827
           scanning later.  */
6828
0
        if (num_a8_relocs == a8_reloc_table_size)
6829
0
          {
6830
0
            a8_reloc_table_size *= 2;
6831
0
            a8_relocs = (struct a8_erratum_reloc *)
6832
0
          bfd_realloc (a8_relocs,
6833
0
                 sizeof (struct a8_erratum_reloc)
6834
0
                 * a8_reloc_table_size);
6835
0
          }
6836
6837
0
        a8_relocs[num_a8_relocs].from = from;
6838
0
        a8_relocs[num_a8_relocs].destination = destination;
6839
0
        a8_relocs[num_a8_relocs].r_type = r_type;
6840
0
        a8_relocs[num_a8_relocs].branch_type = branch_type;
6841
0
        a8_relocs[num_a8_relocs].sym_name = sym_name;
6842
0
        a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6843
0
        a8_relocs[num_a8_relocs].hash = hash;
6844
6845
0
        num_a8_relocs++;
6846
0
      }
6847
0
        }
6848
0
    }
6849
6850
        /* We're done with the internal relocs, free them.  */
6851
0
        if (elf_section_data (section)->relocs == NULL)
6852
0
    free (internal_relocs);
6853
0
      }
6854
6855
0
    if (htab->fix_cortex_a8)
6856
0
      {
6857
        /* Sort relocs which might apply to Cortex-A8 erratum.  */
6858
0
        qsort (a8_relocs, num_a8_relocs,
6859
0
         sizeof (struct a8_erratum_reloc),
6860
0
         &a8_reloc_compare);
6861
6862
        /* Scan for branches which might trigger Cortex-A8 erratum.  */
6863
0
        if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6864
0
            &num_a8_fixes, &a8_fix_table_size,
6865
0
            a8_relocs, num_a8_relocs,
6866
0
            prev_num_a8_fixes, &stub_changed)
6867
0
      != 0)
6868
0
    goto error_ret_free_local;
6869
0
      }
6870
6871
0
    if (local_syms != NULL
6872
0
        && symtab_hdr->contents != (unsigned char *) local_syms)
6873
0
      {
6874
0
        if (!info->keep_memory)
6875
0
    free (local_syms);
6876
0
        else
6877
0
    symtab_hdr->contents = (unsigned char *) local_syms;
6878
0
      }
6879
0
  }
6880
6881
0
      if (first_veneer_scan
6882
0
    && !set_cmse_veneer_addr_from_implib (info, htab,
6883
0
            &cmse_stub_created))
6884
0
  ret = false;
6885
6886
0
      if (prev_num_a8_fixes != num_a8_fixes)
6887
0
  stub_changed = true;
6888
6889
0
      if (!stub_changed)
6890
0
  break;
6891
6892
      /* OK, we've added some stubs.  Find out the new size of the
6893
   stub sections.  */
6894
0
      for (stub_sec = htab->stub_bfd->sections;
6895
0
     stub_sec != NULL;
6896
0
     stub_sec = stub_sec->next)
6897
0
  {
6898
    /* Ignore non-stub sections.  */
6899
0
    if (!strstr (stub_sec->name, STUB_SUFFIX))
6900
0
      continue;
6901
6902
0
    stub_sec->size = 0;
6903
0
  }
6904
6905
      /* Add new SG veneers after those already in the input import
6906
   library.  */
6907
0
      for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6908
0
     stub_type++)
6909
0
  {
6910
0
    bfd_vma *start_offset_p;
6911
0
    asection **stub_sec_p;
6912
6913
0
    start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6914
0
    stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6915
0
    if (start_offset_p == NULL)
6916
0
      continue;
6917
6918
0
    BFD_ASSERT (stub_sec_p != NULL);
6919
0
    if (*stub_sec_p != NULL)
6920
0
      (*stub_sec_p)->size = *start_offset_p;
6921
0
  }
6922
6923
      /* Compute stub section size, considering padding.  */
6924
0
      bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6925
0
      for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6926
0
     stub_type++)
6927
0
  {
6928
0
    int size, padding;
6929
0
    asection **stub_sec_p;
6930
6931
0
    padding = arm_dedicated_stub_section_padding (stub_type);
6932
0
    stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6933
    /* Skip if no stub input section or no stub section padding
6934
       required.  */
6935
0
    if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6936
0
      continue;
6937
    /* Stub section padding required but no dedicated section.  */
6938
0
    BFD_ASSERT (stub_sec_p);
6939
6940
0
    size = (*stub_sec_p)->size;
6941
0
    size = (size + padding - 1) & ~(padding - 1);
6942
0
    (*stub_sec_p)->size = size;
6943
0
  }
6944
6945
      /* Add Cortex-A8 erratum veneers to stub section sizes too.  */
6946
0
      if (htab->fix_cortex_a8)
6947
0
  for (i = 0; i < num_a8_fixes; i++)
6948
0
    {
6949
0
      stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6950
0
       a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6951
6952
0
      if (stub_sec == NULL)
6953
0
        return false;
6954
6955
0
      stub_sec->size
6956
0
        += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6957
0
                NULL);
6958
0
    }
6959
6960
6961
      /* Ask the linker to do its stuff.  */
6962
0
      (*htab->layout_sections_again) ();
6963
0
      first_veneer_scan = false;
6964
0
    }
6965
6966
  /* Add stubs for Cortex-A8 erratum fixes now.  */
6967
0
  if (htab->fix_cortex_a8)
6968
0
    {
6969
0
      for (i = 0; i < num_a8_fixes; i++)
6970
0
  {
6971
0
    struct elf32_arm_stub_hash_entry *stub_entry;
6972
0
    char *stub_name = a8_fixes[i].stub_name;
6973
0
    asection *section = a8_fixes[i].section;
6974
0
    unsigned int section_id = a8_fixes[i].section->id;
6975
0
    asection *link_sec = htab->stub_group[section_id].link_sec;
6976
0
    asection *stub_sec = htab->stub_group[section_id].stub_sec;
6977
0
    const insn_sequence *template_sequence;
6978
0
    int template_size, size = 0;
6979
6980
0
    stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6981
0
               true, false);
6982
0
    if (stub_entry == NULL)
6983
0
      {
6984
0
        _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6985
0
          section->owner, stub_name);
6986
0
        return false;
6987
0
      }
6988
6989
0
    stub_entry->stub_sec = stub_sec;
6990
0
    stub_entry->stub_offset = (bfd_vma) -1;
6991
0
    stub_entry->id_sec = link_sec;
6992
0
    stub_entry->stub_type = a8_fixes[i].stub_type;
6993
0
    stub_entry->source_value = a8_fixes[i].offset;
6994
0
    stub_entry->target_section = a8_fixes[i].section;
6995
0
    stub_entry->target_value = a8_fixes[i].target_offset;
6996
0
    stub_entry->orig_insn = a8_fixes[i].orig_insn;
6997
0
    stub_entry->branch_type = a8_fixes[i].branch_type;
6998
6999
0
    size = find_stub_size_and_template (a8_fixes[i].stub_type,
7000
0
                &template_sequence,
7001
0
                &template_size);
7002
7003
0
    stub_entry->stub_size = size;
7004
0
    stub_entry->stub_template = template_sequence;
7005
0
    stub_entry->stub_template_size = template_size;
7006
0
  }
7007
7008
      /* Stash the Cortex-A8 erratum fix array for use later in
7009
   elf32_arm_write_section().  */
7010
0
      htab->a8_erratum_fixes = a8_fixes;
7011
0
      htab->num_a8_erratum_fixes = num_a8_fixes;
7012
0
    }
7013
0
  else
7014
0
    {
7015
0
      htab->a8_erratum_fixes = NULL;
7016
0
      htab->num_a8_erratum_fixes = 0;
7017
0
    }
7018
0
  return ret;
7019
0
}
7020
7021
/* Build all the stubs associated with the current output file.  The
7022
   stubs are kept in a hash table attached to the main linker hash
7023
   table.  We also set up the .plt entries for statically linked PIC
7024
   functions here.  This function is called via arm_elf_finish in the
7025
   linker.  */
7026
7027
bool
7028
elf32_arm_build_stubs (struct bfd_link_info *info)
7029
0
{
7030
0
  asection *stub_sec;
7031
0
  struct bfd_hash_table *table;
7032
0
  enum elf32_arm_stub_type stub_type;
7033
0
  struct elf32_arm_link_hash_table *htab;
7034
7035
0
  htab = elf32_arm_hash_table (info);
7036
0
  if (htab == NULL)
7037
0
    return false;
7038
7039
0
  for (stub_sec = htab->stub_bfd->sections;
7040
0
       stub_sec != NULL;
7041
0
       stub_sec = stub_sec->next)
7042
0
    {
7043
0
      bfd_size_type size;
7044
7045
      /* Ignore non-stub sections.  */
7046
0
      if (!strstr (stub_sec->name, STUB_SUFFIX))
7047
0
  continue;
7048
7049
      /* Allocate memory to hold the linker stubs.  Zeroing the stub sections
7050
   must at least be done for stub section requiring padding and for SG
7051
   veneers to ensure that a non secure code branching to a removed SG
7052
   veneer causes an error.  */
7053
0
      size = stub_sec->size;
7054
0
      stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7055
0
      if (stub_sec->contents == NULL && size != 0)
7056
0
  return false;
7057
7058
0
      stub_sec->size = 0;
7059
0
    }
7060
7061
  /* Add new SG veneers after those already in the input import library.  */
7062
0
  for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7063
0
    {
7064
0
      bfd_vma *start_offset_p;
7065
0
      asection **stub_sec_p;
7066
7067
0
      start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7068
0
      stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7069
0
      if (start_offset_p == NULL)
7070
0
  continue;
7071
7072
0
      BFD_ASSERT (stub_sec_p != NULL);
7073
0
      if (*stub_sec_p != NULL)
7074
0
  (*stub_sec_p)->size = *start_offset_p;
7075
0
    }
7076
7077
  /* Build the stubs as directed by the stub hash table.  */
7078
0
  table = &htab->stub_hash_table;
7079
0
  bfd_hash_traverse (table, arm_build_one_stub, info);
7080
0
  if (htab->fix_cortex_a8)
7081
0
    {
7082
      /* Place the cortex a8 stubs last.  */
7083
0
      htab->fix_cortex_a8 = -1;
7084
0
      bfd_hash_traverse (table, arm_build_one_stub, info);
7085
0
    }
7086
7087
0
  return true;
7088
0
}
7089
7090
/* Locate the Thumb encoded calling stub for NAME.  */
7091
7092
static struct elf_link_hash_entry *
7093
find_thumb_glue (struct bfd_link_info *link_info,
7094
     const char *name,
7095
     char **error_message)
7096
0
{
7097
0
  char *tmp_name;
7098
0
  struct elf_link_hash_entry *hash;
7099
0
  struct elf32_arm_link_hash_table *hash_table;
7100
7101
  /* We need a pointer to the armelf specific hash table.  */
7102
0
  hash_table = elf32_arm_hash_table (link_info);
7103
0
  if (hash_table == NULL)
7104
0
    return NULL;
7105
7106
0
  tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7107
0
          + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7108
7109
0
  BFD_ASSERT (tmp_name);
7110
7111
0
  sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7112
7113
0
  hash = elf_link_hash_lookup
7114
0
    (&(hash_table)->root, tmp_name, false, false, true);
7115
7116
0
  if (hash == NULL)
7117
0
    {
7118
0
      *error_message = bfd_asprintf (_("unable to find %s glue '%s' for '%s'"),
7119
0
             "Thumb", tmp_name, name);
7120
0
      if (*error_message == NULL)
7121
0
  *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7122
0
    }
7123
7124
0
  free (tmp_name);
7125
7126
0
  return hash;
7127
0
}
7128
7129
/* Locate the ARM encoded calling stub for NAME.  */
7130
7131
static struct elf_link_hash_entry *
7132
find_arm_glue (struct bfd_link_info *link_info,
7133
         const char *name,
7134
         char **error_message)
7135
0
{
7136
0
  char *tmp_name;
7137
0
  struct elf_link_hash_entry *myh;
7138
0
  struct elf32_arm_link_hash_table *hash_table;
7139
7140
  /* We need a pointer to the elfarm specific hash table.  */
7141
0
  hash_table = elf32_arm_hash_table (link_info);
7142
0
  if (hash_table == NULL)
7143
0
    return NULL;
7144
7145
0
  tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7146
0
          + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7147
0
  BFD_ASSERT (tmp_name);
7148
7149
0
  sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7150
7151
0
  myh = elf_link_hash_lookup
7152
0
    (&(hash_table)->root, tmp_name, false, false, true);
7153
7154
0
  if (myh == NULL)
7155
0
    {
7156
0
      *error_message = bfd_asprintf (_("unable to find %s glue '%s' for '%s'"),
7157
0
             "ARM", tmp_name, name);
7158
0
      if (*error_message == NULL)
7159
0
  *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7160
0
    }
7161
0
  free (tmp_name);
7162
7163
0
  return myh;
7164
0
}
7165
7166
/* ARM->Thumb glue (static images):
7167
7168
   .arm
7169
   __func_from_arm:
7170
   ldr r12, __func_addr
7171
   bx  r12
7172
   __func_addr:
7173
   .word func    @ behave as if you saw a ARM_32 reloc.
7174
7175
   (v5t static images)
7176
   .arm
7177
   __func_from_arm:
7178
   ldr pc, __func_addr
7179
   __func_addr:
7180
   .word func    @ behave as if you saw a ARM_32 reloc.
7181
7182
   (relocatable images)
7183
   .arm
7184
   __func_from_arm:
7185
   ldr r12, __func_offset
7186
   add r12, r12, pc
7187
   bx  r12
7188
   __func_offset:
7189
   .word func - .   */
7190
7191
0
#define ARM2THUMB_STATIC_GLUE_SIZE 12
7192
static const insn32 a2t1_ldr_insn = 0xe59fc000;
7193
static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7194
static const insn32 a2t3_func_addr_insn = 0x00000001;
7195
7196
0
#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7197
static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7198
static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7199
7200
0
#define ARM2THUMB_PIC_GLUE_SIZE 16
7201
static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7202
static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7203
static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7204
7205
/* Thumb->ARM:        Thumb->(non-interworking aware) ARM
7206
7207
     .thumb       .thumb
7208
     .align 2       .align 2
7209
 __func_from_thumb:       __func_from_thumb:
7210
     bx pc        push {r6, lr}
7211
     nop        ldr  r6, __func_addr
7212
     .arm       mov  lr, pc
7213
     b func       bx   r6
7214
          .arm
7215
            ;; back_to_thumb
7216
          ldmia r13! {r6, lr}
7217
          bx    lr
7218
            __func_addr:
7219
          .word      func  */
7220
7221
0
#define THUMB2ARM_GLUE_SIZE 8
7222
static const insn16 t2a1_bx_pc_insn = 0x4778;
7223
static const insn16 t2a2_noop_insn = 0x46c0;
7224
static const insn32 t2a3_b_insn = 0xea000000;
7225
7226
0
#define VFP11_ERRATUM_VENEER_SIZE 8
7227
0
#define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7228
0
#define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7229
7230
0
#define ARM_BX_VENEER_SIZE 12
7231
static const insn32 armbx1_tst_insn = 0xe3100001;
7232
static const insn32 armbx2_moveq_insn = 0x01a0f000;
7233
static const insn32 armbx3_bx_insn = 0xe12fff10;
7234
7235
#ifndef ELFARM_NABI_C_INCLUDED
7236
static void
7237
arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7238
0
{
7239
0
  asection * s;
7240
0
  bfd_byte * contents;
7241
7242
0
  if (size == 0)
7243
0
    {
7244
      /* Do not include empty glue sections in the output.  */
7245
0
      if (abfd != NULL)
7246
0
  {
7247
0
    s = bfd_get_linker_section (abfd, name);
7248
0
    if (s != NULL)
7249
0
      s->flags |= SEC_EXCLUDE;
7250
0
  }
7251
0
      return;
7252
0
    }
7253
7254
0
  BFD_ASSERT (abfd != NULL);
7255
7256
0
  s = bfd_get_linker_section (abfd, name);
7257
0
  BFD_ASSERT (s != NULL);
7258
7259
0
  contents = (bfd_byte *) bfd_zalloc (abfd, size);
7260
7261
0
  BFD_ASSERT (s->size == size);
7262
0
  s->contents = contents;
7263
0
}
7264
7265
bool
7266
bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7267
0
{
7268
0
  struct elf32_arm_link_hash_table * globals;
7269
7270
0
  globals = elf32_arm_hash_table (info);
7271
0
  BFD_ASSERT (globals != NULL);
7272
7273
0
  arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7274
0
           globals->arm_glue_size,
7275
0
           ARM2THUMB_GLUE_SECTION_NAME);
7276
7277
0
  arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7278
0
           globals->thumb_glue_size,
7279
0
           THUMB2ARM_GLUE_SECTION_NAME);
7280
7281
0
  arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7282
0
           globals->vfp11_erratum_glue_size,
7283
0
           VFP11_ERRATUM_VENEER_SECTION_NAME);
7284
7285
0
  arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7286
0
           globals->stm32l4xx_erratum_glue_size,
7287
0
           STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7288
7289
0
  arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7290
0
           globals->bx_glue_size,
7291
0
           ARM_BX_GLUE_SECTION_NAME);
7292
7293
0
  return true;
7294
0
}
7295
7296
/* Allocate space and symbols for calling a Thumb function from Arm mode.
7297
   returns the symbol identifying the stub.  */
7298
7299
static struct elf_link_hash_entry *
7300
record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7301
        struct elf_link_hash_entry * h)
7302
0
{
7303
0
  const char * name = h->root.root.string;
7304
0
  asection * s;
7305
0
  char * tmp_name;
7306
0
  struct elf_link_hash_entry * myh;
7307
0
  struct bfd_link_hash_entry * bh;
7308
0
  struct elf32_arm_link_hash_table * globals;
7309
0
  bfd_vma val;
7310
0
  bfd_size_type size;
7311
7312
0
  globals = elf32_arm_hash_table (link_info);
7313
0
  BFD_ASSERT (globals != NULL);
7314
0
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7315
7316
0
  s = bfd_get_linker_section
7317
0
    (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7318
7319
0
  BFD_ASSERT (s != NULL);
7320
7321
0
  tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7322
0
          + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7323
0
  BFD_ASSERT (tmp_name);
7324
7325
0
  sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7326
7327
0
  myh = elf_link_hash_lookup
7328
0
    (&(globals)->root, tmp_name, false, false, true);
7329
7330
0
  if (myh != NULL)
7331
0
    {
7332
      /* We've already seen this guy.  */
7333
0
      free (tmp_name);
7334
0
      return myh;
7335
0
    }
7336
7337
  /* The only trick here is using hash_table->arm_glue_size as the value.
7338
     Even though the section isn't allocated yet, this is where we will be
7339
     putting it.  The +1 on the value marks that the stub has not been
7340
     output yet - not that it is a Thumb function.  */
7341
0
  bh = NULL;
7342
0
  val = globals->arm_glue_size + 1;
7343
0
  _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7344
0
            tmp_name, BSF_GLOBAL, s, val,
7345
0
            NULL, true, false, &bh);
7346
7347
0
  myh = (struct elf_link_hash_entry *) bh;
7348
0
  myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7349
0
  myh->forced_local = 1;
7350
7351
0
  free (tmp_name);
7352
7353
0
  if (bfd_link_pic (link_info)
7354
0
      || globals->pic_veneer)
7355
0
    size = ARM2THUMB_PIC_GLUE_SIZE;
7356
0
  else if (globals->use_blx)
7357
0
    size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7358
0
  else
7359
0
    size = ARM2THUMB_STATIC_GLUE_SIZE;
7360
7361
0
  s->size += size;
7362
0
  globals->arm_glue_size += size;
7363
7364
0
  return myh;
7365
0
}
7366
7367
/* Allocate space for ARMv4 BX veneers.  */
7368
7369
static void
7370
record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7371
0
{
7372
0
  asection * s;
7373
0
  struct elf32_arm_link_hash_table *globals;
7374
0
  char *tmp_name;
7375
0
  struct elf_link_hash_entry *myh;
7376
0
  struct bfd_link_hash_entry *bh;
7377
0
  bfd_vma val;
7378
7379
  /* BX PC does not need a veneer.  */
7380
0
  if (reg == 15)
7381
0
    return;
7382
7383
0
  globals = elf32_arm_hash_table (link_info);
7384
0
  BFD_ASSERT (globals != NULL);
7385
0
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7386
7387
  /* Check if this veneer has already been allocated.  */
7388
0
  if (globals->bx_glue_offset[reg])
7389
0
    return;
7390
7391
0
  s = bfd_get_linker_section
7392
0
    (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7393
7394
0
  BFD_ASSERT (s != NULL);
7395
7396
  /* Add symbol for veneer.  */
7397
0
  tmp_name = (char *)
7398
0
      bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7399
0
  BFD_ASSERT (tmp_name);
7400
7401
0
  sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7402
7403
0
  myh = elf_link_hash_lookup
7404
0
    (&(globals)->root, tmp_name, false, false, false);
7405
7406
0
  BFD_ASSERT (myh == NULL);
7407
7408
0
  bh = NULL;
7409
0
  val = globals->bx_glue_size;
7410
0
  _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7411
0
            tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7412
0
            NULL, true, false, &bh);
7413
7414
0
  myh = (struct elf_link_hash_entry *) bh;
7415
0
  myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7416
0
  myh->forced_local = 1;
7417
7418
0
  s->size += ARM_BX_VENEER_SIZE;
7419
0
  globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7420
0
  globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7421
0
}
7422
7423
7424
/* Add an entry to the code/data map for section SEC.  */
7425
7426
static void
7427
elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7428
0
{
7429
0
  struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7430
0
  unsigned int newidx;
7431
7432
0
  if (sec_data->map == NULL)
7433
0
    {
7434
0
      sec_data->map = (elf32_arm_section_map *)
7435
0
    bfd_malloc (sizeof (elf32_arm_section_map));
7436
0
      sec_data->mapcount = 0;
7437
0
      sec_data->mapsize = 1;
7438
0
    }
7439
7440
0
  newidx = sec_data->mapcount++;
7441
7442
0
  if (sec_data->mapcount > sec_data->mapsize)
7443
0
    {
7444
0
      sec_data->mapsize *= 2;
7445
0
      sec_data->map = (elf32_arm_section_map *)
7446
0
    bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7447
0
             * sizeof (elf32_arm_section_map));
7448
0
    }
7449
7450
0
  if (sec_data->map)
7451
0
    {
7452
0
      sec_data->map[newidx].vma = vma;
7453
0
      sec_data->map[newidx].type = type;
7454
0
    }
7455
0
}
7456
7457
7458
/* Record information about a VFP11 denorm-erratum veneer.  Only ARM-mode
7459
   veneers are handled for now.  */
7460
7461
static bfd_vma
7462
record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7463
           elf32_vfp11_erratum_list *branch,
7464
           bfd *branch_bfd,
7465
           asection *branch_sec,
7466
           unsigned int offset)
7467
0
{
7468
0
  asection *s;
7469
0
  struct elf32_arm_link_hash_table *hash_table;
7470
0
  char *tmp_name;
7471
0
  struct elf_link_hash_entry *myh;
7472
0
  struct bfd_link_hash_entry *bh;
7473
0
  bfd_vma val;
7474
0
  struct _arm_elf_section_data *sec_data;
7475
0
  elf32_vfp11_erratum_list *newerr;
7476
7477
0
  hash_table = elf32_arm_hash_table (link_info);
7478
0
  BFD_ASSERT (hash_table != NULL);
7479
0
  BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7480
7481
0
  s = bfd_get_linker_section
7482
0
    (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7483
7484
0
  sec_data = elf32_arm_section_data (s);
7485
7486
0
  BFD_ASSERT (s != NULL);
7487
7488
0
  tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7489
0
          (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7490
0
  BFD_ASSERT (tmp_name);
7491
7492
0
  sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7493
0
     hash_table->num_vfp11_fixes);
7494
7495
0
  myh = elf_link_hash_lookup
7496
0
    (&(hash_table)->root, tmp_name, false, false, false);
7497
7498
0
  BFD_ASSERT (myh == NULL);
7499
7500
0
  bh = NULL;
7501
0
  val = hash_table->vfp11_erratum_glue_size;
7502
0
  _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7503
0
            tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7504
0
            NULL, true, false, &bh);
7505
7506
0
  myh = (struct elf_link_hash_entry *) bh;
7507
0
  myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7508
0
  myh->forced_local = 1;
7509
7510
  /* Link veneer back to calling location.  */
7511
0
  sec_data->erratumcount += 1;
7512
0
  newerr = (elf32_vfp11_erratum_list *)
7513
0
      bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7514
7515
0
  newerr->type = VFP11_ERRATUM_ARM_VENEER;
7516
0
  newerr->vma = -1;
7517
0
  newerr->u.v.branch = branch;
7518
0
  newerr->u.v.id = hash_table->num_vfp11_fixes;
7519
0
  branch->u.b.veneer = newerr;
7520
7521
0
  newerr->next = sec_data->erratumlist;
7522
0
  sec_data->erratumlist = newerr;
7523
7524
  /* A symbol for the return from the veneer.  */
7525
0
  sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7526
0
     hash_table->num_vfp11_fixes);
7527
7528
0
  myh = elf_link_hash_lookup
7529
0
    (&(hash_table)->root, tmp_name, false, false, false);
7530
7531
0
  if (myh != NULL)
7532
0
    abort ();
7533
7534
0
  bh = NULL;
7535
0
  val = offset + 4;
7536
0
  _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7537
0
            branch_sec, val, NULL, true, false, &bh);
7538
7539
0
  myh = (struct elf_link_hash_entry *) bh;
7540
0
  myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7541
0
  myh->forced_local = 1;
7542
7543
0
  free (tmp_name);
7544
7545
  /* Generate a mapping symbol for the veneer section, and explicitly add an
7546
     entry for that symbol to the code/data map for the section.  */
7547
0
  if (hash_table->vfp11_erratum_glue_size == 0)
7548
0
    {
7549
0
      bh = NULL;
7550
      /* FIXME: Creates an ARM symbol.  Thumb mode will need attention if it
7551
   ever requires this erratum fix.  */
7552
0
      _bfd_generic_link_add_one_symbol (link_info,
7553
0
          hash_table->bfd_of_glue_owner, "$a",
7554
0
          BSF_LOCAL, s, 0, NULL,
7555
0
          true, false, &bh);
7556
7557
0
      myh = (struct elf_link_hash_entry *) bh;
7558
0
      myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7559
0
      myh->forced_local = 1;
7560
7561
      /* The elf32_arm_init_maps function only cares about symbols from input
7562
   BFDs.  We must make a note of this generated mapping symbol
7563
   ourselves so that code byteswapping works properly in
7564
   elf32_arm_write_section.  */
7565
0
      elf32_arm_section_map_add (s, 'a', 0);
7566
0
    }
7567
7568
0
  s->size += VFP11_ERRATUM_VENEER_SIZE;
7569
0
  hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7570
0
  hash_table->num_vfp11_fixes++;
7571
7572
  /* The offset of the veneer.  */
7573
0
  return val;
7574
0
}
7575
7576
/* Record information about a STM32L4XX STM erratum veneer.  Only THUMB-mode
7577
   veneers need to be handled because used only in Cortex-M.  */
7578
7579
static bfd_vma
7580
record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7581
         elf32_stm32l4xx_erratum_list *branch,
7582
         bfd *branch_bfd,
7583
         asection *branch_sec,
7584
         unsigned int offset,
7585
         bfd_size_type veneer_size)
7586
0
{
7587
0
  asection *s;
7588
0
  struct elf32_arm_link_hash_table *hash_table;
7589
0
  char *tmp_name;
7590
0
  struct elf_link_hash_entry *myh;
7591
0
  struct bfd_link_hash_entry *bh;
7592
0
  bfd_vma val;
7593
0
  struct _arm_elf_section_data *sec_data;
7594
0
  elf32_stm32l4xx_erratum_list *newerr;
7595
7596
0
  hash_table = elf32_arm_hash_table (link_info);
7597
0
  BFD_ASSERT (hash_table != NULL);
7598
0
  BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7599
7600
0
  s = bfd_get_linker_section
7601
0
    (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7602
7603
0
  BFD_ASSERT (s != NULL);
7604
7605
0
  sec_data = elf32_arm_section_data (s);
7606
7607
0
  tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7608
0
          (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7609
0
  BFD_ASSERT (tmp_name);
7610
7611
0
  sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7612
0
     hash_table->num_stm32l4xx_fixes);
7613
7614
0
  myh = elf_link_hash_lookup
7615
0
    (&(hash_table)->root, tmp_name, false, false, false);
7616
7617
0
  BFD_ASSERT (myh == NULL);
7618
7619
0
  bh = NULL;
7620
0
  val = hash_table->stm32l4xx_erratum_glue_size;
7621
0
  _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7622
0
            tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7623
0
            NULL, true, false, &bh);
7624
7625
0
  myh = (struct elf_link_hash_entry *) bh;
7626
0
  myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7627
0
  myh->forced_local = 1;
7628
7629
  /* Link veneer back to calling location.  */
7630
0
  sec_data->stm32l4xx_erratumcount += 1;
7631
0
  newerr = (elf32_stm32l4xx_erratum_list *)
7632
0
      bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7633
7634
0
  newerr->type = STM32L4XX_ERRATUM_VENEER;
7635
0
  newerr->vma = -1;
7636
0
  newerr->u.v.branch = branch;
7637
0
  newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7638
0
  branch->u.b.veneer = newerr;
7639
7640
0
  newerr->next = sec_data->stm32l4xx_erratumlist;
7641
0
  sec_data->stm32l4xx_erratumlist = newerr;
7642
7643
  /* A symbol for the return from the veneer.  */
7644
0
  sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7645
0
     hash_table->num_stm32l4xx_fixes);
7646
7647
0
  myh = elf_link_hash_lookup
7648
0
    (&(hash_table)->root, tmp_name, false, false, false);
7649
7650
0
  if (myh != NULL)
7651
0
    abort ();
7652
7653
0
  bh = NULL;
7654
0
  val = offset + 4;
7655
0
  _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7656
0
            branch_sec, val, NULL, true, false, &bh);
7657
7658
0
  myh = (struct elf_link_hash_entry *) bh;
7659
0
  myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7660
0
  myh->forced_local = 1;
7661
7662
0
  free (tmp_name);
7663
7664
  /* Generate a mapping symbol for the veneer section, and explicitly add an
7665
     entry for that symbol to the code/data map for the section.  */
7666
0
  if (hash_table->stm32l4xx_erratum_glue_size == 0)
7667
0
    {
7668
0
      bh = NULL;
7669
      /* Creates a THUMB symbol since there is no other choice.  */
7670
0
      _bfd_generic_link_add_one_symbol (link_info,
7671
0
          hash_table->bfd_of_glue_owner, "$t",
7672
0
          BSF_LOCAL, s, 0, NULL,
7673
0
          true, false, &bh);
7674
7675
0
      myh = (struct elf_link_hash_entry *) bh;
7676
0
      myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7677
0
      myh->forced_local = 1;
7678
7679
      /* The elf32_arm_init_maps function only cares about symbols from input
7680
   BFDs.  We must make a note of this generated mapping symbol
7681
   ourselves so that code byteswapping works properly in
7682
   elf32_arm_write_section.  */
7683
0
      elf32_arm_section_map_add (s, 't', 0);
7684
0
    }
7685
7686
0
  s->size += veneer_size;
7687
0
  hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7688
0
  hash_table->num_stm32l4xx_fixes++;
7689
7690
  /* The offset of the veneer.  */
7691
0
  return val;
7692
0
}
7693
7694
#define ARM_GLUE_SECTION_FLAGS \
7695
0
  (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7696
0
   | SEC_READONLY | SEC_LINKER_CREATED)
7697
7698
/* Create a fake section for use by the ARM backend of the linker.  */
7699
7700
static bool
7701
arm_make_glue_section (bfd * abfd, const char * name)
7702
0
{
7703
0
  asection * sec;
7704
7705
0
  sec = bfd_get_linker_section (abfd, name);
7706
0
  if (sec != NULL)
7707
    /* Already made.  */
7708
0
    return true;
7709
7710
0
  sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7711
7712
0
  if (sec == NULL
7713
0
      || !bfd_set_section_alignment (sec, 2))
7714
0
    return false;
7715
7716
  /* Set the gc mark to prevent the section from being removed by garbage
7717
     collection, despite the fact that no relocs refer to this section.  */
7718
0
  sec->gc_mark = 1;
7719
7720
0
  return true;
7721
0
}
7722
7723
/* Set size of .plt entries.  This function is called from the
7724
   linker scripts in ld/emultempl/{armelf}.em.  */
7725
7726
void
7727
bfd_elf32_arm_use_long_plt (void)
7728
0
{
7729
0
  elf32_arm_use_long_plt_entry = true;
7730
0
}
7731
7732
/* Add the glue sections to ABFD.  This function is called from the
7733
   linker scripts in ld/emultempl/{armelf}.em.  */
7734
7735
bool
7736
bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7737
          struct bfd_link_info *info)
7738
0
{
7739
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7740
0
  bool dostm32l4xx = globals
7741
0
    && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7742
0
  bool addglue;
7743
7744
  /* If we are only performing a partial
7745
     link do not bother adding the glue.  */
7746
0
  if (bfd_link_relocatable (info))
7747
0
    return true;
7748
7749
0
  addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7750
0
    && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7751
0
    && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7752
0
    && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7753
7754
0
  if (!dostm32l4xx)
7755
0
    return addglue;
7756
7757
0
  return addglue
7758
0
    && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7759
0
}
7760
7761
/* Mark output sections of veneers needing a dedicated one with SEC_KEEP.  This
7762
   ensures they are not marked for deletion by
7763
   strip_excluded_output_sections () when veneers are going to be created
7764
   later.  Not doing so would trigger assert on empty section size in
7765
   lang_size_sections_1 ().  */
7766
7767
void
7768
bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7769
0
{
7770
0
  enum elf32_arm_stub_type stub_type;
7771
7772
  /* If we are only performing a partial
7773
     link do not bother adding the glue.  */
7774
0
  if (bfd_link_relocatable (info))
7775
0
    return;
7776
7777
0
  for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7778
0
    {
7779
0
      asection *out_sec;
7780
0
      const char *out_sec_name;
7781
7782
0
      if (!arm_dedicated_stub_output_section_required (stub_type))
7783
0
  continue;
7784
7785
0
     out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7786
0
     out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7787
0
     if (out_sec != NULL)
7788
0
  out_sec->flags |= SEC_KEEP;
7789
0
    }
7790
0
}
7791
7792
/* Select a BFD to be used to hold the sections used by the glue code.
7793
   This function is called from the linker scripts in ld/emultempl/
7794
   {armelf/pe}.em.  */
7795
7796
bool
7797
bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7798
0
{
7799
0
  struct elf32_arm_link_hash_table *globals;
7800
7801
  /* If we are only performing a partial link
7802
     do not bother getting a bfd to hold the glue.  */
7803
0
  if (bfd_link_relocatable (info))
7804
0
    return true;
7805
7806
  /* Make sure we don't attach the glue sections to a dynamic object.  */
7807
0
  BFD_ASSERT (!(abfd->flags & DYNAMIC));
7808
7809
0
  globals = elf32_arm_hash_table (info);
7810
0
  BFD_ASSERT (globals != NULL);
7811
7812
0
  if (globals->bfd_of_glue_owner != NULL)
7813
0
    return true;
7814
7815
  /* Save the bfd for later use.  */
7816
0
  globals->bfd_of_glue_owner = abfd;
7817
7818
0
  return true;
7819
0
}
7820
7821
static void
7822
check_use_blx (struct elf32_arm_link_hash_table *globals)
7823
0
{
7824
0
  int cpu_arch;
7825
7826
0
  cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7827
0
               Tag_CPU_arch);
7828
7829
0
  if (globals->fix_arm1176)
7830
0
    {
7831
0
      if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7832
0
  globals->use_blx = 1;
7833
0
    }
7834
0
  else
7835
0
    {
7836
0
      if (cpu_arch > TAG_CPU_ARCH_V4T)
7837
0
  globals->use_blx = 1;
7838
0
    }
7839
0
}
7840
7841
bool
7842
bfd_elf32_arm_process_before_allocation (bfd *abfd,
7843
           struct bfd_link_info *link_info)
7844
0
{
7845
0
  Elf_Internal_Shdr *symtab_hdr;
7846
0
  Elf_Internal_Rela *internal_relocs = NULL;
7847
0
  Elf_Internal_Rela *irel, *irelend;
7848
0
  bfd_byte *contents = NULL;
7849
7850
0
  asection *sec;
7851
0
  struct elf32_arm_link_hash_table *globals;
7852
7853
  /* If we are only performing a partial link do not bother
7854
     to construct any glue.  */
7855
0
  if (bfd_link_relocatable (link_info))
7856
0
    return true;
7857
7858
  /* Here we have a bfd that is to be included on the link.  We have a
7859
     hook to do reloc rummaging, before section sizes are nailed down.  */
7860
0
  globals = elf32_arm_hash_table (link_info);
7861
0
  BFD_ASSERT (globals != NULL);
7862
7863
0
  check_use_blx (globals);
7864
7865
0
  if (globals->byteswap_code && !bfd_big_endian (abfd))
7866
0
    {
7867
0
      _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7868
0
        abfd);
7869
0
      return false;
7870
0
    }
7871
7872
  /* PR 5398: If we have not decided to include any loadable sections in
7873
     the output then we will not have a glue owner bfd.  This is OK, it
7874
     just means that there is nothing else for us to do here.  */
7875
0
  if (globals->bfd_of_glue_owner == NULL)
7876
0
    return true;
7877
7878
  /* Rummage around all the relocs and map the glue vectors.  */
7879
0
  sec = abfd->sections;
7880
7881
0
  if (sec == NULL)
7882
0
    return true;
7883
7884
0
  for (; sec != NULL; sec = sec->next)
7885
0
    {
7886
0
      if (sec->reloc_count == 0)
7887
0
  continue;
7888
7889
0
      if ((sec->flags & SEC_EXCLUDE) != 0
7890
0
    || (sec->flags & SEC_HAS_CONTENTS) == 0)
7891
0
  continue;
7892
7893
0
      symtab_hdr = & elf_symtab_hdr (abfd);
7894
7895
      /* Load the relocs.  */
7896
0
      internal_relocs
7897
0
  = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
7898
7899
0
      if (internal_relocs == NULL)
7900
0
  goto error_return;
7901
7902
0
      irelend = internal_relocs + sec->reloc_count;
7903
0
      for (irel = internal_relocs; irel < irelend; irel++)
7904
0
  {
7905
0
    long r_type;
7906
0
    unsigned long r_index;
7907
7908
0
    struct elf_link_hash_entry *h;
7909
7910
0
    r_type = ELF32_R_TYPE (irel->r_info);
7911
0
    r_index = ELF32_R_SYM (irel->r_info);
7912
7913
    /* These are the only relocation types we care about.  */
7914
0
    if (   r_type != R_ARM_PC24
7915
0
        && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7916
0
      continue;
7917
7918
    /* Get the section contents if we haven't done so already.  */
7919
0
    if (contents == NULL)
7920
0
      {
7921
        /* Get cached copy if it exists.  */
7922
0
        if (elf_section_data (sec)->this_hdr.contents != NULL)
7923
0
    contents = elf_section_data (sec)->this_hdr.contents;
7924
0
        else
7925
0
    {
7926
      /* Go get them off disk.  */
7927
0
      if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7928
0
        goto error_return;
7929
0
    }
7930
0
      }
7931
7932
0
    if (r_type == R_ARM_V4BX)
7933
0
      {
7934
0
        int reg;
7935
7936
0
        reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7937
0
        record_arm_bx_glue (link_info, reg);
7938
0
        continue;
7939
0
      }
7940
7941
    /* If the relocation is not against a symbol it cannot concern us.  */
7942
0
    h = NULL;
7943
7944
    /* We don't care about local symbols.  */
7945
0
    if (r_index < symtab_hdr->sh_info)
7946
0
      continue;
7947
7948
    /* This is an external symbol.  */
7949
0
    r_index -= symtab_hdr->sh_info;
7950
0
    h = (struct elf_link_hash_entry *)
7951
0
      elf_sym_hashes (abfd)[r_index];
7952
7953
    /* If the relocation is against a static symbol it must be within
7954
       the current section and so cannot be a cross ARM/Thumb relocation.  */
7955
0
    if (h == NULL)
7956
0
      continue;
7957
7958
    /* If the call will go through a PLT entry then we do not need
7959
       glue.  */
7960
0
    if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7961
0
      continue;
7962
7963
0
    switch (r_type)
7964
0
      {
7965
0
      case R_ARM_PC24:
7966
        /* This one is a call from arm code.  We need to look up
7967
     the target of the call.  If it is a thumb target, we
7968
     insert glue.  */
7969
0
        if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7970
0
      == ST_BRANCH_TO_THUMB)
7971
0
    record_arm_to_thumb_glue (link_info, h);
7972
0
        break;
7973
7974
0
      default:
7975
0
        abort ();
7976
0
      }
7977
0
  }
7978
7979
0
      if (elf_section_data (sec)->this_hdr.contents != contents)
7980
0
  free (contents);
7981
0
      contents = NULL;
7982
7983
0
      if (elf_section_data (sec)->relocs != internal_relocs)
7984
0
  free (internal_relocs);
7985
0
      internal_relocs = NULL;
7986
0
    }
7987
7988
0
  return true;
7989
7990
0
 error_return:
7991
0
  if (elf_section_data (sec)->this_hdr.contents != contents)
7992
0
    free (contents);
7993
0
  if (elf_section_data (sec)->relocs != internal_relocs)
7994
0
    free (internal_relocs);
7995
7996
0
  return false;
7997
0
}
7998
#endif
7999
8000
8001
/* Initialise maps of ARM/Thumb/data for input BFDs.  */
8002
8003
void
8004
bfd_elf32_arm_init_maps (bfd *abfd)
8005
0
{
8006
0
  Elf_Internal_Sym *isymbuf;
8007
0
  Elf_Internal_Shdr *hdr;
8008
0
  unsigned int i, localsyms;
8009
8010
  /* PR 7093: Make sure that we are dealing with an arm elf binary.  */
8011
0
  if (! is_arm_elf (abfd))
8012
0
    return;
8013
8014
0
  if ((abfd->flags & DYNAMIC) != 0)
8015
0
    return;
8016
8017
0
  hdr = & elf_symtab_hdr (abfd);
8018
0
  localsyms = hdr->sh_info;
8019
8020
  /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
8021
     should contain the number of local symbols, which should come before any
8022
     global symbols.  Mapping symbols are always local.  */
8023
0
  isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
8024
0
          NULL);
8025
8026
  /* No internal symbols read?  Skip this BFD.  */
8027
0
  if (isymbuf == NULL)
8028
0
    return;
8029
8030
0
  for (i = 0; i < localsyms; i++)
8031
0
    {
8032
0
      Elf_Internal_Sym *isym = &isymbuf[i];
8033
0
      asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
8034
0
      const char *name;
8035
8036
0
      if (sec != NULL
8037
0
    && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8038
0
  {
8039
0
    name = bfd_elf_string_from_elf_section (abfd,
8040
0
      hdr->sh_link, isym->st_name);
8041
8042
0
    if (bfd_is_arm_special_symbol_name (name,
8043
0
                BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8044
0
      elf32_arm_section_map_add (sec, name[1], isym->st_value);
8045
0
  }
8046
0
    }
8047
0
}
8048
8049
8050
/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8051
   say what they wanted.  */
8052
8053
void
8054
bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8055
0
{
8056
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8057
0
  obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8058
8059
0
  if (globals == NULL)
8060
0
    return;
8061
8062
0
  if (globals->fix_cortex_a8 == -1)
8063
0
    {
8064
      /* Turn on Cortex-A8 erratum workaround for ARMv7-A.  */
8065
0
      if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8066
0
    && (out_attr[Tag_CPU_arch_profile].i == 'A'
8067
0
        || out_attr[Tag_CPU_arch_profile].i == 0))
8068
0
  globals->fix_cortex_a8 = 1;
8069
0
      else
8070
0
  globals->fix_cortex_a8 = 0;
8071
0
    }
8072
0
}
8073
8074
8075
void
8076
bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8077
0
{
8078
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8079
0
  obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8080
8081
0
  if (globals == NULL)
8082
0
    return;
8083
  /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix.  */
8084
0
  if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8085
0
    {
8086
0
      switch (globals->vfp11_fix)
8087
0
  {
8088
0
  case BFD_ARM_VFP11_FIX_DEFAULT:
8089
0
  case BFD_ARM_VFP11_FIX_NONE:
8090
0
    globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8091
0
    break;
8092
8093
0
  default:
8094
    /* Give a warning, but do as the user requests anyway.  */
8095
0
    _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8096
0
      "workaround is not necessary for target architecture"), obfd);
8097
0
  }
8098
0
    }
8099
0
  else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8100
    /* For earlier architectures, we might need the workaround, but do not
8101
       enable it by default.  If users is running with broken hardware, they
8102
       must enable the erratum fix explicitly.  */
8103
0
    globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8104
0
}
8105
8106
void
8107
bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8108
0
{
8109
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8110
0
  obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8111
8112
0
  if (globals == NULL)
8113
0
    return;
8114
8115
  /* We assume only Cortex-M4 may require the fix.  */
8116
0
  if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8117
0
      || out_attr[Tag_CPU_arch_profile].i != 'M')
8118
0
    {
8119
0
      if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8120
  /* Give a warning, but do as the user requests anyway.  */
8121
0
  _bfd_error_handler
8122
0
    (_("%pB: warning: selected STM32L4XX erratum "
8123
0
       "workaround is not necessary for target architecture"), obfd);
8124
0
    }
8125
0
}
8126
8127
enum bfd_arm_vfp11_pipe
8128
{
8129
  VFP11_FMAC,
8130
  VFP11_LS,
8131
  VFP11_DS,
8132
  VFP11_BAD
8133
};
8134
8135
/* Return a VFP register number.  This is encoded as RX:X for single-precision
8136
   registers, or X:RX for double-precision registers, where RX is the group of
8137
   four bits in the instruction encoding and X is the single extension bit.
8138
   RX and X fields are specified using their lowest (starting) bit.  The return
8139
   value is:
8140
8141
     0...31: single-precision registers s0...s31
8142
     32...63: double-precision registers d0...d31.
8143
8144
   Although X should be zero for VFP11 (encoding d0...d15 only), we might
8145
   encounter VFP3 instructions, so we allow the full range for DP registers.  */
8146
8147
static unsigned int
8148
bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
8149
         unsigned int x)
8150
0
{
8151
0
  if (is_double)
8152
0
    return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8153
0
  else
8154
0
    return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8155
0
}
8156
8157
/* Set bits in *WMASK according to a register number REG as encoded by
8158
   bfd_arm_vfp11_regno().  Ignore d16-d31.  */
8159
8160
static void
8161
bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8162
0
{
8163
0
  if (reg < 32)
8164
0
    *wmask |= 1 << reg;
8165
0
  else if (reg < 48)
8166
0
    *wmask |= 3 << ((reg - 32) * 2);
8167
0
}
8168
8169
/* Return TRUE if WMASK overwrites anything in REGS.  */
8170
8171
static bool
8172
bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8173
0
{
8174
0
  int i;
8175
8176
0
  for (i = 0; i < numregs; i++)
8177
0
    {
8178
0
      unsigned int reg = regs[i];
8179
8180
0
      if (reg < 32 && (wmask & (1 << reg)) != 0)
8181
0
  return true;
8182
8183
0
      reg -= 32;
8184
8185
0
      if (reg >= 16)
8186
0
  continue;
8187
8188
0
      if ((wmask & (3 << (reg * 2))) != 0)
8189
0
  return true;
8190
0
    }
8191
8192
0
  return false;
8193
0
}
8194
8195
/* In this function, we're interested in two things: finding input registers
8196
   for VFP data-processing instructions, and finding the set of registers which
8197
   arbitrary VFP instructions may write to.  We use a 32-bit unsigned int to
8198
   hold the written set, so FLDM etc. are easy to deal with (we're only
8199
   interested in 32 SP registers or 16 dp registers, due to the VFP version
8200
   implemented by the chip in question).  DP registers are marked by setting
8201
   both SP registers in the write mask).  */
8202
8203
static enum bfd_arm_vfp11_pipe
8204
bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8205
         int *numregs)
8206
0
{
8207
0
  enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8208
0
  bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8209
8210
0
  if ((insn & 0x0f000e10) == 0x0e000a00)  /* A data-processing insn.  */
8211
0
    {
8212
0
      unsigned int pqrs;
8213
0
      unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8214
0
      unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8215
8216
0
      pqrs = ((insn & 0x00800000) >> 20)
8217
0
     | ((insn & 0x00300000) >> 19)
8218
0
     | ((insn & 0x00000040) >> 6);
8219
8220
0
      switch (pqrs)
8221
0
  {
8222
0
  case 0: /* fmac[sd].  */
8223
0
  case 1: /* fnmac[sd].  */
8224
0
  case 2: /* fmsc[sd].  */
8225
0
  case 3: /* fnmsc[sd].  */
8226
0
    vpipe = VFP11_FMAC;
8227
0
    bfd_arm_vfp11_write_mask (destmask, fd);
8228
0
    regs[0] = fd;
8229
0
    regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7);  /* Fn.  */
8230
0
    regs[2] = fm;
8231
0
    *numregs = 3;
8232
0
    break;
8233
8234
0
  case 4: /* fmul[sd].  */
8235
0
  case 5: /* fnmul[sd].  */
8236
0
  case 6: /* fadd[sd].  */
8237
0
  case 7: /* fsub[sd].  */
8238
0
    vpipe = VFP11_FMAC;
8239
0
    goto vfp_binop;
8240
8241
0
  case 8: /* fdiv[sd].  */
8242
0
    vpipe = VFP11_DS;
8243
0
    vfp_binop:
8244
0
    bfd_arm_vfp11_write_mask (destmask, fd);
8245
0
    regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7);   /* Fn.  */
8246
0
    regs[1] = fm;
8247
0
    *numregs = 2;
8248
0
    break;
8249
8250
0
  case 15: /* extended opcode.  */
8251
0
    {
8252
0
      unsigned int extn = ((insn >> 15) & 0x1e)
8253
0
            | ((insn >> 7) & 1);
8254
8255
0
      switch (extn)
8256
0
        {
8257
0
        case 0: /* fcpy[sd].  */
8258
0
        case 1: /* fabs[sd].  */
8259
0
        case 2: /* fneg[sd].  */
8260
0
        case 8: /* fcmp[sd].  */
8261
0
        case 9: /* fcmpe[sd].  */
8262
0
        case 10: /* fcmpz[sd].  */
8263
0
        case 11: /* fcmpez[sd].  */
8264
0
        case 16: /* fuito[sd].  */
8265
0
        case 17: /* fsito[sd].  */
8266
0
        case 24: /* ftoui[sd].  */
8267
0
        case 25: /* ftouiz[sd].  */
8268
0
        case 26: /* ftosi[sd].  */
8269
0
        case 27: /* ftosiz[sd].  */
8270
    /* These instructions will not bounce due to underflow.  */
8271
0
    *numregs = 0;
8272
0
    vpipe = VFP11_FMAC;
8273
0
    break;
8274
8275
0
        case 3: /* fsqrt[sd].  */
8276
    /* fsqrt cannot underflow, but it can (perhaps) overwrite
8277
       registers to cause the erratum in previous instructions.  */
8278
0
    bfd_arm_vfp11_write_mask (destmask, fd);
8279
0
    vpipe = VFP11_DS;
8280
0
    break;
8281
8282
0
        case 15: /* fcvt{ds,sd}.  */
8283
0
    {
8284
0
      int rnum = 0;
8285
8286
0
      bfd_arm_vfp11_write_mask (destmask, fd);
8287
8288
      /* Only FCVTSD can underflow.  */
8289
0
      if ((insn & 0x100) != 0)
8290
0
        regs[rnum++] = fm;
8291
8292
0
      *numregs = rnum;
8293
8294
0
      vpipe = VFP11_FMAC;
8295
0
    }
8296
0
    break;
8297
8298
0
        default:
8299
0
    return VFP11_BAD;
8300
0
        }
8301
0
    }
8302
0
    break;
8303
8304
0
  default:
8305
0
    return VFP11_BAD;
8306
0
  }
8307
0
    }
8308
  /* Two-register transfer.  */
8309
0
  else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8310
0
    {
8311
0
      unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8312
8313
0
      if ((insn & 0x100000) == 0)
8314
0
  {
8315
0
    if (is_double)
8316
0
      bfd_arm_vfp11_write_mask (destmask, fm);
8317
0
    else
8318
0
      {
8319
0
        bfd_arm_vfp11_write_mask (destmask, fm);
8320
0
        bfd_arm_vfp11_write_mask (destmask, fm + 1);
8321
0
      }
8322
0
  }
8323
8324
0
      vpipe = VFP11_LS;
8325
0
    }
8326
0
  else if ((insn & 0x0e100e00) == 0x0c100a00)  /* A load insn.  */
8327
0
    {
8328
0
      int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8329
0
      unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8330
8331
0
      switch (puw)
8332
0
  {
8333
0
  case 0: /* Two-reg transfer.  We should catch these above.  */
8334
0
    abort ();
8335
8336
0
  case 2: /* fldm[sdx].  */
8337
0
  case 3:
8338
0
  case 5:
8339
0
    {
8340
0
      unsigned int i, offset = insn & 0xff;
8341
8342
0
      if (is_double)
8343
0
        offset >>= 1;
8344
8345
0
      for (i = fd; i < fd + offset; i++)
8346
0
        bfd_arm_vfp11_write_mask (destmask, i);
8347
0
    }
8348
0
    break;
8349
8350
0
  case 4: /* fld[sd].  */
8351
0
  case 6:
8352
0
    bfd_arm_vfp11_write_mask (destmask, fd);
8353
0
    break;
8354
8355
0
  default:
8356
0
    return VFP11_BAD;
8357
0
  }
8358
8359
0
      vpipe = VFP11_LS;
8360
0
    }
8361
  /* Single-register transfer. Note L==0.  */
8362
0
  else if ((insn & 0x0f100e10) == 0x0e000a10)
8363
0
    {
8364
0
      unsigned int opcode = (insn >> 21) & 7;
8365
0
      unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8366
8367
0
      switch (opcode)
8368
0
  {
8369
0
  case 0: /* fmsr/fmdlr.  */
8370
0
  case 1: /* fmdhr.  */
8371
    /* Mark fmdhr and fmdlr as writing to the whole of the DP
8372
       destination register.  I don't know if this is exactly right,
8373
       but it is the conservative choice.  */
8374
0
    bfd_arm_vfp11_write_mask (destmask, fn);
8375
0
    break;
8376
8377
0
  case 7: /* fmxr.  */
8378
0
    break;
8379
0
  }
8380
8381
0
      vpipe = VFP11_LS;
8382
0
    }
8383
8384
0
  return vpipe;
8385
0
}
8386
8387
8388
static int elf32_arm_compare_mapping (const void * a, const void * b);
8389
8390
8391
/* Look for potentially-troublesome code sequences which might trigger the
8392
   VFP11 denormal/antidependency erratum.  See, e.g., the ARM1136 errata sheet
8393
   (available from ARM) for details of the erratum.  A short version is
8394
   described in ld.texinfo.  */
8395
8396
bool
8397
bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8398
0
{
8399
0
  asection *sec;
8400
0
  bfd_byte *contents = NULL;
8401
0
  int state = 0;
8402
0
  int regs[3], numregs = 0;
8403
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8404
0
  int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8405
8406
0
  if (globals == NULL)
8407
0
    return false;
8408
8409
  /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8410
     The states transition as follows:
8411
8412
       0 -> 1 (vector) or 0 -> 2 (scalar)
8413
     A VFP FMAC-pipeline instruction has been seen. Fill
8414
     regs[0]..regs[numregs-1] with its input operands. Remember this
8415
     instruction in 'first_fmac'.
8416
8417
       1 -> 2
8418
     Any instruction, except for a VFP instruction which overwrites
8419
     regs[*].
8420
8421
       1 -> 3 [ -> 0 ]  or
8422
       2 -> 3 [ -> 0 ]
8423
     A VFP instruction has been seen which overwrites any of regs[*].
8424
     We must make a veneer!  Reset state to 0 before examining next
8425
     instruction.
8426
8427
       2 -> 0
8428
     If we fail to match anything in state 2, reset to state 0 and reset
8429
     the instruction pointer to the instruction after 'first_fmac'.
8430
8431
     If the VFP11 vector mode is in use, there must be at least two unrelated
8432
     instructions between anti-dependent VFP11 instructions to properly avoid
8433
     triggering the erratum, hence the use of the extra state 1.  */
8434
8435
  /* If we are only performing a partial link do not bother
8436
     to construct any glue.  */
8437
0
  if (bfd_link_relocatable (link_info))
8438
0
    return true;
8439
8440
  /* Skip if this bfd does not correspond to an ELF image.  */
8441
0
  if (! is_arm_elf (abfd))
8442
0
    return true;
8443
8444
  /* We should have chosen a fix type by the time we get here.  */
8445
0
  BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8446
8447
0
  if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8448
0
    return true;
8449
8450
  /* Skip this BFD if it corresponds to an executable or dynamic object.  */
8451
0
  if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8452
0
    return true;
8453
8454
0
  for (sec = abfd->sections; sec != NULL; sec = sec->next)
8455
0
    {
8456
0
      unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8457
0
      struct _arm_elf_section_data *sec_data;
8458
8459
      /* If we don't have executable progbits, we're not interested in this
8460
   section.  Also skip if section is to be excluded.  */
8461
0
      if (elf_section_type (sec) != SHT_PROGBITS
8462
0
    || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8463
0
    || (sec->flags & SEC_EXCLUDE) != 0
8464
0
    || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8465
0
    || sec->output_section == bfd_abs_section_ptr
8466
0
    || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8467
0
  continue;
8468
8469
0
      sec_data = elf32_arm_section_data (sec);
8470
8471
0
      if (sec_data->mapcount == 0)
8472
0
  continue;
8473
8474
0
      if (elf_section_data (sec)->this_hdr.contents != NULL)
8475
0
  contents = elf_section_data (sec)->this_hdr.contents;
8476
0
      else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8477
0
  goto error_return;
8478
8479
0
      qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8480
0
       elf32_arm_compare_mapping);
8481
8482
0
      for (span = 0; span < sec_data->mapcount; span++)
8483
0
  {
8484
0
    unsigned int span_start = sec_data->map[span].vma;
8485
0
    unsigned int span_end = (span == sec_data->mapcount - 1)
8486
0
          ? sec->size : sec_data->map[span + 1].vma;
8487
0
    char span_type = sec_data->map[span].type;
8488
8489
    /* FIXME: Only ARM mode is supported at present.  We may need to
8490
       support Thumb-2 mode also at some point.  */
8491
0
    if (span_type != 'a')
8492
0
      continue;
8493
8494
0
    for (i = span_start; i < span_end;)
8495
0
      {
8496
0
        unsigned int next_i = i + 4;
8497
0
        unsigned int insn = bfd_big_endian (abfd)
8498
0
    ? (((unsigned) contents[i] << 24)
8499
0
       | (contents[i + 1] << 16)
8500
0
       | (contents[i + 2] << 8)
8501
0
       | contents[i + 3])
8502
0
    : (((unsigned) contents[i + 3] << 24)
8503
0
       | (contents[i + 2] << 16)
8504
0
       | (contents[i + 1] << 8)
8505
0
       | contents[i]);
8506
0
        unsigned int writemask = 0;
8507
0
        enum bfd_arm_vfp11_pipe vpipe;
8508
8509
0
        switch (state)
8510
0
    {
8511
0
    case 0:
8512
0
      vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8513
0
                &numregs);
8514
      /* I'm assuming the VFP11 erratum can trigger with denorm
8515
         operands on either the FMAC or the DS pipeline. This might
8516
         lead to slightly overenthusiastic veneer insertion.  */
8517
0
      if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8518
0
        {
8519
0
          state = use_vector ? 1 : 2;
8520
0
          first_fmac = i;
8521
0
          veneer_of_insn = insn;
8522
0
        }
8523
0
      break;
8524
8525
0
    case 1:
8526
0
      {
8527
0
        int other_regs[3], other_numregs;
8528
0
        vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8529
0
                  other_regs,
8530
0
                  &other_numregs);
8531
0
        if (vpipe != VFP11_BAD
8532
0
      && bfd_arm_vfp11_antidependency (writemask, regs,
8533
0
               numregs))
8534
0
          state = 3;
8535
0
        else
8536
0
          state = 2;
8537
0
      }
8538
0
      break;
8539
8540
0
    case 2:
8541
0
      {
8542
0
        int other_regs[3], other_numregs;
8543
0
        vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8544
0
                  other_regs,
8545
0
                  &other_numregs);
8546
0
        if (vpipe != VFP11_BAD
8547
0
      && bfd_arm_vfp11_antidependency (writemask, regs,
8548
0
               numregs))
8549
0
          state = 3;
8550
0
        else
8551
0
          {
8552
0
      state = 0;
8553
0
      next_i = first_fmac + 4;
8554
0
          }
8555
0
      }
8556
0
      break;
8557
8558
0
    case 3:
8559
0
      abort ();  /* Should be unreachable.  */
8560
0
    }
8561
8562
0
        if (state == 3)
8563
0
    {
8564
0
      elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8565
0
          bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8566
8567
0
      elf32_arm_section_data (sec)->erratumcount += 1;
8568
8569
0
      newerr->u.b.vfp_insn = veneer_of_insn;
8570
8571
0
      switch (span_type)
8572
0
        {
8573
0
        case 'a':
8574
0
          newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8575
0
          break;
8576
8577
0
        default:
8578
0
          abort ();
8579
0
        }
8580
8581
0
      record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8582
0
                 first_fmac);
8583
8584
0
      newerr->vma = -1;
8585
8586
0
      newerr->next = sec_data->erratumlist;
8587
0
      sec_data->erratumlist = newerr;
8588
8589
0
      state = 0;
8590
0
    }
8591
8592
0
        i = next_i;
8593
0
      }
8594
0
  }
8595
8596
0
      if (elf_section_data (sec)->this_hdr.contents != contents)
8597
0
  free (contents);
8598
0
      contents = NULL;
8599
0
    }
8600
8601
0
  return true;
8602
8603
0
 error_return:
8604
0
  if (elf_section_data (sec)->this_hdr.contents != contents)
8605
0
    free (contents);
8606
8607
0
  return false;
8608
0
}
8609
8610
/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8611
   after sections have been laid out, using specially-named symbols.  */
8612
8613
void
8614
bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8615
            struct bfd_link_info *link_info)
8616
0
{
8617
0
  asection *sec;
8618
0
  struct elf32_arm_link_hash_table *globals;
8619
0
  char *tmp_name;
8620
8621
0
  if (bfd_link_relocatable (link_info))
8622
0
    return;
8623
8624
  /* Skip if this bfd does not correspond to an ELF image.  */
8625
0
  if (! is_arm_elf (abfd))
8626
0
    return;
8627
8628
0
  globals = elf32_arm_hash_table (link_info);
8629
0
  if (globals == NULL)
8630
0
    return;
8631
8632
0
  tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8633
0
          (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8634
0
  BFD_ASSERT (tmp_name);
8635
8636
0
  for (sec = abfd->sections; sec != NULL; sec = sec->next)
8637
0
    {
8638
0
      struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8639
0
      elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8640
8641
0
      for (; errnode != NULL; errnode = errnode->next)
8642
0
  {
8643
0
    struct elf_link_hash_entry *myh;
8644
0
    bfd_vma vma;
8645
8646
0
    switch (errnode->type)
8647
0
      {
8648
0
      case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8649
0
      case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8650
        /* Find veneer symbol.  */
8651
0
        sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8652
0
           errnode->u.b.veneer->u.v.id);
8653
8654
0
        myh = elf_link_hash_lookup
8655
0
    (&(globals)->root, tmp_name, false, false, true);
8656
8657
0
        if (myh == NULL)
8658
0
    _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8659
0
            abfd, "VFP11", tmp_name);
8660
8661
0
        vma = myh->root.u.def.section->output_section->vma
8662
0
        + myh->root.u.def.section->output_offset
8663
0
        + myh->root.u.def.value;
8664
8665
0
        errnode->u.b.veneer->vma = vma;
8666
0
        break;
8667
8668
0
      case VFP11_ERRATUM_ARM_VENEER:
8669
0
      case VFP11_ERRATUM_THUMB_VENEER:
8670
        /* Find return location.  */
8671
0
        sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8672
0
           errnode->u.v.id);
8673
8674
0
        myh = elf_link_hash_lookup
8675
0
    (&(globals)->root, tmp_name, false, false, true);
8676
8677
0
        if (myh == NULL)
8678
0
    _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8679
0
            abfd, "VFP11", tmp_name);
8680
8681
0
        vma = myh->root.u.def.section->output_section->vma
8682
0
        + myh->root.u.def.section->output_offset
8683
0
        + myh->root.u.def.value;
8684
8685
0
        errnode->u.v.branch->vma = vma;
8686
0
        break;
8687
8688
0
      default:
8689
0
        abort ();
8690
0
      }
8691
0
  }
8692
0
    }
8693
8694
0
  free (tmp_name);
8695
0
}
8696
8697
/* Find virtual-memory addresses for STM32L4XX erratum veneers and
8698
   return locations after sections have been laid out, using
8699
   specially-named symbols.  */
8700
8701
void
8702
bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8703
                struct bfd_link_info *link_info)
8704
0
{
8705
0
  asection *sec;
8706
0
  struct elf32_arm_link_hash_table *globals;
8707
0
  char *tmp_name;
8708
8709
0
  if (bfd_link_relocatable (link_info))
8710
0
    return;
8711
8712
  /* Skip if this bfd does not correspond to an ELF image.  */
8713
0
  if (! is_arm_elf (abfd))
8714
0
    return;
8715
8716
0
  globals = elf32_arm_hash_table (link_info);
8717
0
  if (globals == NULL)
8718
0
    return;
8719
8720
0
  tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8721
0
          (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8722
0
  BFD_ASSERT (tmp_name);
8723
8724
0
  for (sec = abfd->sections; sec != NULL; sec = sec->next)
8725
0
    {
8726
0
      struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8727
0
      elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8728
8729
0
      for (; errnode != NULL; errnode = errnode->next)
8730
0
  {
8731
0
    struct elf_link_hash_entry *myh;
8732
0
    bfd_vma vma;
8733
8734
0
    switch (errnode->type)
8735
0
      {
8736
0
      case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8737
        /* Find veneer symbol.  */
8738
0
        sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8739
0
           errnode->u.b.veneer->u.v.id);
8740
8741
0
        myh = elf_link_hash_lookup
8742
0
    (&(globals)->root, tmp_name, false, false, true);
8743
8744
0
        if (myh == NULL)
8745
0
    _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8746
0
            abfd, "STM32L4XX", tmp_name);
8747
8748
0
        vma = myh->root.u.def.section->output_section->vma
8749
0
    + myh->root.u.def.section->output_offset
8750
0
    + myh->root.u.def.value;
8751
8752
0
        errnode->u.b.veneer->vma = vma;
8753
0
        break;
8754
8755
0
      case STM32L4XX_ERRATUM_VENEER:
8756
        /* Find return location.  */
8757
0
        sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8758
0
           errnode->u.v.id);
8759
8760
0
        myh = elf_link_hash_lookup
8761
0
    (&(globals)->root, tmp_name, false, false, true);
8762
8763
0
        if (myh == NULL)
8764
0
    _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8765
0
            abfd, "STM32L4XX", tmp_name);
8766
8767
0
        vma = myh->root.u.def.section->output_section->vma
8768
0
    + myh->root.u.def.section->output_offset
8769
0
    + myh->root.u.def.value;
8770
8771
0
        errnode->u.v.branch->vma = vma;
8772
0
        break;
8773
8774
0
      default:
8775
0
        abort ();
8776
0
      }
8777
0
  }
8778
0
    }
8779
8780
0
  free (tmp_name);
8781
0
}
8782
8783
static inline bool
8784
is_thumb2_ldmia (const insn32 insn)
8785
0
{
8786
  /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8787
     1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll.  */
8788
0
  return (insn & 0xffd02000) == 0xe8900000;
8789
0
}
8790
8791
static inline bool
8792
is_thumb2_ldmdb (const insn32 insn)
8793
0
{
8794
  /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8795
     1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll.  */
8796
0
  return (insn & 0xffd02000) == 0xe9100000;
8797
0
}
8798
8799
static inline bool
8800
is_thumb2_vldm (const insn32 insn)
8801
0
{
8802
  /* A6.5 Extension register load or store instruction
8803
     A7.7.229
8804
     We look for SP 32-bit and DP 64-bit registers.
8805
     Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8806
     <list> is consecutive 64-bit registers
8807
     1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8808
     Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8809
     <list> is consecutive 32-bit registers
8810
     1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8811
     if P==0 && U==1 && W==1 && Rn=1101 VPOP
8812
     if PUW=010 || PUW=011 || PUW=101 VLDM.  */
8813
0
  return
8814
0
    (((insn & 0xfe100f00) == 0xec100b00) ||
8815
0
     ((insn & 0xfe100f00) == 0xec100a00))
8816
0
    && /* (IA without !).  */
8817
0
    (((((insn << 7) >> 28) & 0xd) == 0x4)
8818
     /* (IA with !), includes VPOP (when reg number is SP).  */
8819
0
     || ((((insn << 7) >> 28) & 0xd) == 0x5)
8820
     /* (DB with !).  */
8821
0
     || ((((insn << 7) >> 28) & 0xd) == 0x9));
8822
0
}
8823
8824
/* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8825
   VLDM opcode and:
8826
 - computes the number and the mode of memory accesses
8827
 - decides if the replacement should be done:
8828
   . replaces only if > 8-word accesses
8829
   . or (testing purposes only) replaces all accesses.  */
8830
8831
static bool
8832
stm32l4xx_need_create_replacing_stub (const insn32 insn,
8833
              bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8834
0
{
8835
0
  int nb_words = 0;
8836
8837
  /* The field encoding the register list is the same for both LDMIA
8838
     and LDMDB encodings.  */
8839
0
  if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8840
0
    nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8841
0
  else if (is_thumb2_vldm (insn))
8842
0
   nb_words = (insn & 0xff);
8843
8844
  /* DEFAULT mode accounts for the real bug condition situation,
8845
     ALL mode inserts stubs for each LDM/VLDM instruction (testing).  */
8846
0
  return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
8847
0
    ? nb_words > 8
8848
0
    : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
8849
0
}
8850
8851
/* Look for potentially-troublesome code sequences which might trigger
8852
   the STM STM32L4XX erratum.  */
8853
8854
bool
8855
bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8856
              struct bfd_link_info *link_info)
8857
0
{
8858
0
  asection *sec;
8859
0
  bfd_byte *contents = NULL;
8860
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8861
8862
0
  if (globals == NULL)
8863
0
    return false;
8864
8865
  /* If we are only performing a partial link do not bother
8866
     to construct any glue.  */
8867
0
  if (bfd_link_relocatable (link_info))
8868
0
    return true;
8869
8870
  /* Skip if this bfd does not correspond to an ELF image.  */
8871
0
  if (! is_arm_elf (abfd))
8872
0
    return true;
8873
8874
0
  if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8875
0
    return true;
8876
8877
  /* Skip this BFD if it corresponds to an executable or dynamic object.  */
8878
0
  if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8879
0
    return true;
8880
8881
0
  for (sec = abfd->sections; sec != NULL; sec = sec->next)
8882
0
    {
8883
0
      unsigned int i, span;
8884
0
      struct _arm_elf_section_data *sec_data;
8885
8886
      /* If we don't have executable progbits, we're not interested in this
8887
   section.  Also skip if section is to be excluded.  */
8888
0
      if (elf_section_type (sec) != SHT_PROGBITS
8889
0
    || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8890
0
    || (sec->flags & SEC_EXCLUDE) != 0
8891
0
    || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8892
0
    || sec->output_section == bfd_abs_section_ptr
8893
0
    || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8894
0
  continue;
8895
8896
0
      sec_data = elf32_arm_section_data (sec);
8897
8898
0
      if (sec_data->mapcount == 0)
8899
0
  continue;
8900
8901
0
      if (elf_section_data (sec)->this_hdr.contents != NULL)
8902
0
  contents = elf_section_data (sec)->this_hdr.contents;
8903
0
      else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8904
0
  goto error_return;
8905
8906
0
      qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8907
0
       elf32_arm_compare_mapping);
8908
8909
0
      for (span = 0; span < sec_data->mapcount; span++)
8910
0
  {
8911
0
    unsigned int span_start = sec_data->map[span].vma;
8912
0
    unsigned int span_end = (span == sec_data->mapcount - 1)
8913
0
      ? sec->size : sec_data->map[span + 1].vma;
8914
0
    char span_type = sec_data->map[span].type;
8915
0
    int itblock_current_pos = 0;
8916
8917
    /* Only Thumb2 mode need be supported with this CM4 specific
8918
       code, we should not encounter any arm mode eg span_type
8919
       != 'a'.  */
8920
0
    if (span_type != 't')
8921
0
      continue;
8922
8923
0
    for (i = span_start; i < span_end;)
8924
0
      {
8925
0
        unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8926
0
        bool insn_32bit = false;
8927
0
        bool is_ldm = false;
8928
0
        bool is_vldm = false;
8929
0
        bool is_not_last_in_it_block = false;
8930
8931
        /* The first 16-bits of all 32-bit thumb2 instructions start
8932
     with opcode[15..13]=0b111 and the encoded op1 can be anything
8933
     except opcode[12..11]!=0b00.
8934
     See 32-bit Thumb instruction encoding.  */
8935
0
        if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8936
0
    insn_32bit = true;
8937
8938
        /* Compute the predicate that tells if the instruction
8939
     is concerned by the IT block
8940
     - Creates an error if there is a ldm that is not
8941
       last in the IT block thus cannot be replaced
8942
     - Otherwise we can create a branch at the end of the
8943
       IT block, it will be controlled naturally by IT
8944
       with the proper pseudo-predicate
8945
     - So the only interesting predicate is the one that
8946
       tells that we are not on the last item of an IT
8947
       block.  */
8948
0
        if (itblock_current_pos != 0)
8949
0
      is_not_last_in_it_block = !!--itblock_current_pos;
8950
8951
0
        if (insn_32bit)
8952
0
    {
8953
      /* Load the rest of the insn (in manual-friendly order).  */
8954
0
      insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8955
0
      is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8956
0
      is_vldm = is_thumb2_vldm (insn);
8957
8958
      /* Veneers are created for (v)ldm depending on
8959
         option flags and memory accesses conditions; but
8960
         if the instruction is not the last instruction of
8961
         an IT block, we cannot create a jump there, so we
8962
         bail out.  */
8963
0
        if ((is_ldm || is_vldm)
8964
0
      && stm32l4xx_need_create_replacing_stub
8965
0
      (insn, globals->stm32l4xx_fix))
8966
0
          {
8967
0
      if (is_not_last_in_it_block)
8968
0
        {
8969
0
          _bfd_error_handler
8970
            /* xgettext:c-format */
8971
0
            (_("%pB(%pA+%#x): error: multiple load detected"
8972
0
         " in non-last IT block instruction:"
8973
0
         " STM32L4XX veneer cannot be generated; "
8974
0
         "use gcc option -mrestrict-it to generate"
8975
0
         " only one instruction per IT block"),
8976
0
             abfd, sec, i);
8977
0
        }
8978
0
      else
8979
0
        {
8980
0
          elf32_stm32l4xx_erratum_list *newerr =
8981
0
            (elf32_stm32l4xx_erratum_list *)
8982
0
            bfd_zmalloc
8983
0
            (sizeof (elf32_stm32l4xx_erratum_list));
8984
8985
0
          elf32_arm_section_data (sec)
8986
0
            ->stm32l4xx_erratumcount += 1;
8987
0
          newerr->u.b.insn = insn;
8988
          /* We create only thumb branches.  */
8989
0
          newerr->type =
8990
0
            STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8991
0
          record_stm32l4xx_erratum_veneer
8992
0
            (link_info, newerr, abfd, sec,
8993
0
             i,
8994
0
             is_ldm ?
8995
0
             STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8996
0
             STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8997
0
          newerr->vma = -1;
8998
0
          newerr->next = sec_data->stm32l4xx_erratumlist;
8999
0
          sec_data->stm32l4xx_erratumlist = newerr;
9000
0
        }
9001
0
          }
9002
0
    }
9003
0
        else
9004
0
    {
9005
      /* A7.7.37 IT p208
9006
         IT blocks are only encoded in T1
9007
         Encoding T1: IT{x{y{z}}} <firstcond>
9008
         1 0 1 1 - 1 1 1 1 - firstcond - mask
9009
         if mask = '0000' then see 'related encodings'
9010
         We don't deal with UNPREDICTABLE, just ignore these.
9011
         There can be no nested IT blocks so an IT block
9012
         is naturally a new one for which it is worth
9013
         computing its size.  */
9014
0
      bool is_newitblock = ((insn & 0xff00) == 0xbf00)
9015
0
        && ((insn & 0x000f) != 0x0000);
9016
      /* If we have a new IT block we compute its size.  */
9017
0
      if (is_newitblock)
9018
0
        {
9019
          /* Compute the number of instructions controlled
9020
       by the IT block, it will be used to decide
9021
       whether we are inside an IT block or not.  */
9022
0
          unsigned int mask = insn & 0x000f;
9023
0
          itblock_current_pos = 4 - ctz (mask);
9024
0
        }
9025
0
    }
9026
9027
0
        i += insn_32bit ? 4 : 2;
9028
0
      }
9029
0
  }
9030
9031
0
      if (elf_section_data (sec)->this_hdr.contents != contents)
9032
0
  free (contents);
9033
0
      contents = NULL;
9034
0
    }
9035
9036
0
  return true;
9037
9038
0
 error_return:
9039
0
  if (elf_section_data (sec)->this_hdr.contents != contents)
9040
0
    free (contents);
9041
9042
0
  return false;
9043
0
}
9044
9045
/* Set target relocation values needed during linking.  */
9046
9047
void
9048
bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9049
         struct bfd_link_info *link_info,
9050
         struct elf32_arm_params *params)
9051
0
{
9052
0
  struct elf32_arm_link_hash_table *globals;
9053
9054
0
  globals = elf32_arm_hash_table (link_info);
9055
0
  if (globals == NULL)
9056
0
    return;
9057
9058
0
  globals->target1_is_rel = params->target1_is_rel;
9059
0
  if (globals->fdpic_p)
9060
0
    globals->target2_reloc = R_ARM_GOT32;
9061
0
  else if (strcmp (params->target2_type, "rel") == 0)
9062
0
    globals->target2_reloc = R_ARM_REL32;
9063
0
  else if (strcmp (params->target2_type, "abs") == 0)
9064
0
    globals->target2_reloc = R_ARM_ABS32;
9065
0
  else if (strcmp (params->target2_type, "got-rel") == 0)
9066
0
    globals->target2_reloc = R_ARM_GOT_PREL;
9067
0
  else
9068
0
    {
9069
0
      _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9070
0
        params->target2_type);
9071
0
    }
9072
0
  globals->fix_v4bx = params->fix_v4bx;
9073
0
  globals->use_blx |= params->use_blx;
9074
0
  globals->vfp11_fix = params->vfp11_denorm_fix;
9075
0
  globals->stm32l4xx_fix = params->stm32l4xx_fix;
9076
0
  if (globals->fdpic_p)
9077
0
    globals->pic_veneer = 1;
9078
0
  else
9079
0
    globals->pic_veneer = params->pic_veneer;
9080
0
  globals->fix_cortex_a8 = params->fix_cortex_a8;
9081
0
  globals->fix_arm1176 = params->fix_arm1176;
9082
0
  globals->cmse_implib = params->cmse_implib;
9083
0
  globals->in_implib_bfd = params->in_implib_bfd;
9084
9085
0
  BFD_ASSERT (is_arm_elf (output_bfd));
9086
0
  elf_arm_tdata (output_bfd)->no_enum_size_warning
9087
0
    = params->no_enum_size_warning;
9088
0
  elf_arm_tdata (output_bfd)->no_wchar_size_warning
9089
0
    = params->no_wchar_size_warning;
9090
0
}
9091
9092
/* Replace the target offset of a Thumb bl or b.w instruction.  */
9093
9094
static void
9095
insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9096
0
{
9097
0
  bfd_vma upper;
9098
0
  bfd_vma lower;
9099
0
  int reloc_sign;
9100
9101
0
  BFD_ASSERT ((offset & 1) == 0);
9102
9103
0
  upper = bfd_get_16 (abfd, insn);
9104
0
  lower = bfd_get_16 (abfd, insn + 2);
9105
0
  reloc_sign = (offset < 0) ? 1 : 0;
9106
0
  upper = (upper & ~(bfd_vma) 0x7ff)
9107
0
    | ((offset >> 12) & 0x3ff)
9108
0
    | (reloc_sign << 10);
9109
0
  lower = (lower & ~(bfd_vma) 0x2fff)
9110
0
    | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9111
0
    | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9112
0
    | ((offset >> 1) & 0x7ff);
9113
0
  bfd_put_16 (abfd, upper, insn);
9114
0
  bfd_put_16 (abfd, lower, insn + 2);
9115
0
}
9116
9117
/* Thumb code calling an ARM function.  */
9118
9119
static int
9120
elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9121
       const char *   name,
9122
       bfd *      input_bfd,
9123
       bfd *      output_bfd,
9124
       asection *   input_section,
9125
       bfd_byte *   hit_data,
9126
       asection *   sym_sec,
9127
       bfd_vma    offset,
9128
       bfd_signed_vma   addend,
9129
       bfd_vma    val,
9130
       char **error_message)
9131
0
{
9132
0
  asection * s = 0;
9133
0
  bfd_vma my_offset;
9134
0
  long int ret_offset;
9135
0
  struct elf_link_hash_entry * myh;
9136
0
  struct elf32_arm_link_hash_table * globals;
9137
9138
0
  myh = find_thumb_glue (info, name, error_message);
9139
0
  if (myh == NULL)
9140
0
    return false;
9141
9142
0
  globals = elf32_arm_hash_table (info);
9143
0
  BFD_ASSERT (globals != NULL);
9144
0
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9145
9146
0
  my_offset = myh->root.u.def.value;
9147
9148
0
  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9149
0
            THUMB2ARM_GLUE_SECTION_NAME);
9150
9151
0
  BFD_ASSERT (s != NULL);
9152
0
  BFD_ASSERT (s->contents != NULL);
9153
0
  BFD_ASSERT (s->output_section != NULL);
9154
9155
0
  if ((my_offset & 0x01) == 0x01)
9156
0
    {
9157
0
      if (sym_sec != NULL
9158
0
    && sym_sec->owner != NULL
9159
0
    && !INTERWORK_FLAG (sym_sec->owner))
9160
0
  {
9161
0
    _bfd_error_handler
9162
0
      (_("%pB(%s): warning: interworking not enabled;"
9163
0
         " first occurrence: %pB: %s call to %s"),
9164
0
       sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9165
9166
0
    return false;
9167
0
  }
9168
9169
0
      --my_offset;
9170
0
      myh->root.u.def.value = my_offset;
9171
9172
0
      put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9173
0
          s->contents + my_offset);
9174
9175
0
      put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9176
0
          s->contents + my_offset + 2);
9177
9178
0
      ret_offset =
9179
  /* Address of destination of the stub.  */
9180
0
  ((bfd_signed_vma) val)
9181
0
  - ((bfd_signed_vma)
9182
     /* Offset from the start of the current section
9183
        to the start of the stubs.  */
9184
0
     (s->output_offset
9185
      /* Offset of the start of this stub from the start of the stubs.  */
9186
0
      + my_offset
9187
      /* Address of the start of the current section.  */
9188
0
      + s->output_section->vma)
9189
     /* The branch instruction is 4 bytes into the stub.  */
9190
0
     + 4
9191
     /* ARM branches work from the pc of the instruction + 8.  */
9192
0
     + 8);
9193
9194
0
      put_arm_insn (globals, output_bfd,
9195
0
        (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9196
0
        s->contents + my_offset + 4);
9197
0
    }
9198
9199
0
  BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9200
9201
  /* Now go back and fix up the original BL insn to point to here.  */
9202
0
  ret_offset =
9203
    /* Address of where the stub is located.  */
9204
0
    (s->output_section->vma + s->output_offset + my_offset)
9205
     /* Address of where the BL is located.  */
9206
0
    - (input_section->output_section->vma + input_section->output_offset
9207
0
       + offset)
9208
    /* Addend in the relocation.  */
9209
0
    - addend
9210
    /* Biassing for PC-relative addressing.  */
9211
0
    - 8;
9212
9213
0
  insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9214
9215
0
  return true;
9216
0
}
9217
9218
/* Populate an Arm to Thumb stub.  Returns the stub symbol.  */
9219
9220
static struct elf_link_hash_entry *
9221
elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9222
           const char *     name,
9223
           bfd *        input_bfd,
9224
           bfd *        output_bfd,
9225
           asection *       sym_sec,
9226
           bfd_vma        val,
9227
           asection *       s,
9228
           char **        error_message)
9229
0
{
9230
0
  bfd_vma my_offset;
9231
0
  long int ret_offset;
9232
0
  struct elf_link_hash_entry * myh;
9233
0
  struct elf32_arm_link_hash_table * globals;
9234
9235
0
  myh = find_arm_glue (info, name, error_message);
9236
0
  if (myh == NULL)
9237
0
    return NULL;
9238
9239
0
  globals = elf32_arm_hash_table (info);
9240
0
  BFD_ASSERT (globals != NULL);
9241
0
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9242
9243
0
  my_offset = myh->root.u.def.value;
9244
9245
0
  if ((my_offset & 0x01) == 0x01)
9246
0
    {
9247
0
      if (sym_sec != NULL
9248
0
    && sym_sec->owner != NULL
9249
0
    && !INTERWORK_FLAG (sym_sec->owner))
9250
0
  {
9251
0
    _bfd_error_handler
9252
0
      (_("%pB(%s): warning: interworking not enabled;"
9253
0
         " first occurrence: %pB: %s call to %s"),
9254
0
       sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9255
0
  }
9256
9257
0
      --my_offset;
9258
0
      myh->root.u.def.value = my_offset;
9259
9260
0
      if (bfd_link_pic (info)
9261
0
    || globals->pic_veneer)
9262
0
  {
9263
    /* For relocatable objects we can't use absolute addresses,
9264
       so construct the address from a relative offset.  */
9265
    /* TODO: If the offset is small it's probably worth
9266
       constructing the address with adds.  */
9267
0
    put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9268
0
      s->contents + my_offset);
9269
0
    put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9270
0
      s->contents + my_offset + 4);
9271
0
    put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9272
0
      s->contents + my_offset + 8);
9273
    /* Adjust the offset by 4 for the position of the add,
9274
       and 8 for the pipeline offset.  */
9275
0
    ret_offset = (val - (s->output_offset
9276
0
             + s->output_section->vma
9277
0
             + my_offset + 12))
9278
0
           | 1;
9279
0
    bfd_put_32 (output_bfd, ret_offset,
9280
0
          s->contents + my_offset + 12);
9281
0
  }
9282
0
      else if (globals->use_blx)
9283
0
  {
9284
0
    put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9285
0
      s->contents + my_offset);
9286
9287
    /* It's a thumb address.  Add the low order bit.  */
9288
0
    bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9289
0
          s->contents + my_offset + 4);
9290
0
  }
9291
0
      else
9292
0
  {
9293
0
    put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9294
0
      s->contents + my_offset);
9295
9296
0
    put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9297
0
      s->contents + my_offset + 4);
9298
9299
    /* It's a thumb address.  Add the low order bit.  */
9300
0
    bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9301
0
          s->contents + my_offset + 8);
9302
9303
0
    my_offset += 12;
9304
0
  }
9305
0
    }
9306
9307
0
  BFD_ASSERT (my_offset <= globals->arm_glue_size);
9308
9309
0
  return myh;
9310
0
}
9311
9312
/* Arm code calling a Thumb function.  */
9313
9314
static int
9315
elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9316
       const char *   name,
9317
       bfd *      input_bfd,
9318
       bfd *      output_bfd,
9319
       asection *   input_section,
9320
       bfd_byte *   hit_data,
9321
       asection *   sym_sec,
9322
       bfd_vma    offset,
9323
       bfd_signed_vma   addend,
9324
       bfd_vma    val,
9325
       char **error_message)
9326
0
{
9327
0
  unsigned long int tmp;
9328
0
  bfd_vma my_offset;
9329
0
  asection * s;
9330
0
  long int ret_offset;
9331
0
  struct elf_link_hash_entry * myh;
9332
0
  struct elf32_arm_link_hash_table * globals;
9333
9334
0
  globals = elf32_arm_hash_table (info);
9335
0
  BFD_ASSERT (globals != NULL);
9336
0
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9337
9338
0
  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9339
0
            ARM2THUMB_GLUE_SECTION_NAME);
9340
0
  BFD_ASSERT (s != NULL);
9341
0
  BFD_ASSERT (s->contents != NULL);
9342
0
  BFD_ASSERT (s->output_section != NULL);
9343
9344
0
  myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9345
0
             sym_sec, val, s, error_message);
9346
0
  if (!myh)
9347
0
    return false;
9348
9349
0
  my_offset = myh->root.u.def.value;
9350
0
  tmp = bfd_get_32 (input_bfd, hit_data);
9351
0
  tmp = tmp & 0xFF000000;
9352
9353
  /* Somehow these are both 4 too far, so subtract 8.  */
9354
0
  ret_offset = (s->output_offset
9355
0
    + my_offset
9356
0
    + s->output_section->vma
9357
0
    - (input_section->output_offset
9358
0
       + input_section->output_section->vma
9359
0
       + offset + addend)
9360
0
    - 8);
9361
9362
0
  tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9363
9364
0
  bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9365
9366
0
  return true;
9367
0
}
9368
9369
/* Populate Arm stub for an exported Thumb function.  */
9370
9371
static bool
9372
elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9373
0
{
9374
0
  struct bfd_link_info * info = (struct bfd_link_info *) inf;
9375
0
  asection * s;
9376
0
  struct elf_link_hash_entry * myh;
9377
0
  struct elf32_arm_link_hash_entry *eh;
9378
0
  struct elf32_arm_link_hash_table * globals;
9379
0
  asection *sec;
9380
0
  bfd_vma val;
9381
0
  char *error_message;
9382
9383
0
  eh = elf32_arm_hash_entry (h);
9384
  /* Allocate stubs for exported Thumb functions on v4t.  */
9385
0
  if (eh->export_glue == NULL)
9386
0
    return true;
9387
9388
0
  globals = elf32_arm_hash_table (info);
9389
0
  BFD_ASSERT (globals != NULL);
9390
0
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9391
9392
0
  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9393
0
            ARM2THUMB_GLUE_SECTION_NAME);
9394
0
  BFD_ASSERT (s != NULL);
9395
0
  BFD_ASSERT (s->contents != NULL);
9396
0
  BFD_ASSERT (s->output_section != NULL);
9397
9398
0
  sec = eh->export_glue->root.u.def.section;
9399
9400
0
  BFD_ASSERT (sec->output_section != NULL);
9401
9402
0
  val = eh->export_glue->root.u.def.value + sec->output_offset
9403
0
  + sec->output_section->vma;
9404
9405
0
  myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9406
0
             h->root.u.def.section->owner,
9407
0
             globals->obfd, sec, val, s,
9408
0
             &error_message);
9409
0
  BFD_ASSERT (myh);
9410
0
  return true;
9411
0
}
9412
9413
/* Populate ARMv4 BX veneers.  Returns the absolute adress of the veneer.  */
9414
9415
static bfd_vma
9416
elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9417
0
{
9418
0
  bfd_byte *p;
9419
0
  bfd_vma glue_addr;
9420
0
  asection *s;
9421
0
  struct elf32_arm_link_hash_table *globals;
9422
9423
0
  globals = elf32_arm_hash_table (info);
9424
0
  BFD_ASSERT (globals != NULL);
9425
0
  BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9426
9427
0
  s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9428
0
            ARM_BX_GLUE_SECTION_NAME);
9429
0
  BFD_ASSERT (s != NULL);
9430
0
  BFD_ASSERT (s->contents != NULL);
9431
0
  BFD_ASSERT (s->output_section != NULL);
9432
9433
0
  BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9434
9435
0
  glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9436
9437
0
  if ((globals->bx_glue_offset[reg] & 1) == 0)
9438
0
    {
9439
0
      p = s->contents + glue_addr;
9440
0
      bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9441
0
      bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9442
0
      bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9443
0
      globals->bx_glue_offset[reg] |= 1;
9444
0
    }
9445
9446
0
  return glue_addr + s->output_section->vma + s->output_offset;
9447
0
}
9448
9449
/* Generate Arm stubs for exported Thumb symbols.  */
9450
static void
9451
elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9452
          struct bfd_link_info *link_info)
9453
0
{
9454
0
  struct elf32_arm_link_hash_table * globals;
9455
9456
0
  if (link_info == NULL)
9457
    /* Ignore this if we are not called by the ELF backend linker.  */
9458
0
    return;
9459
9460
0
  globals = elf32_arm_hash_table (link_info);
9461
0
  if (globals == NULL)
9462
0
    return;
9463
9464
  /* If blx is available then exported Thumb symbols are OK and there is
9465
     nothing to do.  */
9466
0
  if (globals->use_blx)
9467
0
    return;
9468
9469
0
  elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9470
0
        link_info);
9471
0
}
9472
9473
/* Reserve space for COUNT dynamic relocations in relocation selection
9474
   SRELOC.  */
9475
9476
static void
9477
elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9478
            bfd_size_type count)
9479
0
{
9480
0
  struct elf32_arm_link_hash_table *htab;
9481
9482
0
  htab = elf32_arm_hash_table (info);
9483
0
  BFD_ASSERT (htab->root.dynamic_sections_created);
9484
0
  if (sreloc == NULL)
9485
0
    abort ();
9486
0
  sreloc->size += RELOC_SIZE (htab) * count;
9487
0
}
9488
9489
/* Reserve space for COUNT R_ARM_IRELATIVE relocations.  If the link is
9490
   dynamic, the relocations should go in SRELOC, otherwise they should
9491
   go in the special .rel.iplt section.  */
9492
9493
static void
9494
elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9495
          bfd_size_type count)
9496
0
{
9497
0
  struct elf32_arm_link_hash_table *htab;
9498
9499
0
  htab = elf32_arm_hash_table (info);
9500
0
  if (!htab->root.dynamic_sections_created)
9501
0
    htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9502
0
  else
9503
0
    {
9504
0
      BFD_ASSERT (sreloc != NULL);
9505
0
      sreloc->size += RELOC_SIZE (htab) * count;
9506
0
    }
9507
0
}
9508
9509
/* Add relocation REL to the end of relocation section SRELOC.  */
9510
9511
static void
9512
elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9513
      asection *sreloc, Elf_Internal_Rela *rel)
9514
0
{
9515
0
  bfd_byte *loc;
9516
0
  struct elf32_arm_link_hash_table *htab;
9517
9518
0
  htab = elf32_arm_hash_table (info);
9519
0
  if (!htab->root.dynamic_sections_created
9520
0
      && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9521
0
    sreloc = htab->root.irelplt;
9522
0
  if (sreloc == NULL)
9523
0
    abort ();
9524
0
  loc = sreloc->contents;
9525
0
  loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9526
0
  if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9527
0
    abort ();
9528
0
  SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9529
0
}
9530
9531
/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9532
   IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9533
   to .plt.  */
9534
9535
static void
9536
elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9537
            bool is_iplt_entry,
9538
            union gotplt_union *root_plt,
9539
            struct arm_plt_info *arm_plt)
9540
0
{
9541
0
  struct elf32_arm_link_hash_table *htab;
9542
0
  asection *splt;
9543
0
  asection *sgotplt;
9544
9545
0
  htab = elf32_arm_hash_table (info);
9546
9547
0
  if (is_iplt_entry)
9548
0
    {
9549
0
      splt = htab->root.iplt;
9550
0
      sgotplt = htab->root.igotplt;
9551
9552
      /* NaCl uses a special first entry in .iplt too.  */
9553
0
      if (htab->root.target_os == is_nacl && splt->size == 0)
9554
0
  splt->size += htab->plt_header_size;
9555
9556
      /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt.  */
9557
0
      elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9558
0
    }
9559
0
  else
9560
0
    {
9561
0
      splt = htab->root.splt;
9562
0
      sgotplt = htab->root.sgotplt;
9563
9564
0
    if (htab->fdpic_p)
9565
0
      {
9566
  /* Allocate room for R_ARM_FUNCDESC_VALUE.  */
9567
  /* For lazy binding, relocations will be put into .rel.plt, in
9568
     .rel.got otherwise.  */
9569
  /* FIXME: today we don't support lazy binding so put it in .rel.got */
9570
0
  if (info->flags & DF_BIND_NOW)
9571
0
    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9572
0
  else
9573
0
    elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9574
0
      }
9575
0
    else
9576
0
      {
9577
  /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt.  */
9578
0
  elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9579
0
      }
9580
9581
      /* If this is the first .plt entry, make room for the special
9582
   first entry.  */
9583
0
      if (splt->size == 0)
9584
0
  splt->size += htab->plt_header_size;
9585
9586
0
      htab->next_tls_desc_index++;
9587
0
    }
9588
9589
  /* Allocate the PLT entry itself, including any leading Thumb stub.  */
9590
0
  if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9591
0
    splt->size += PLT_THUMB_STUB_SIZE;
9592
0
  root_plt->offset = splt->size;
9593
0
  splt->size += htab->plt_entry_size;
9594
9595
  /* We also need to make an entry in the .got.plt section, which
9596
     will be placed in the .got section by the linker script.  */
9597
0
  if (is_iplt_entry)
9598
0
    arm_plt->got_offset = sgotplt->size;
9599
0
  else
9600
0
    arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9601
0
  if (htab->fdpic_p)
9602
    /* Function descriptor takes 64 bits in GOT.  */
9603
0
    sgotplt->size += 8;
9604
0
  else
9605
0
    sgotplt->size += 4;
9606
0
}
9607
9608
static bfd_vma
9609
arm_movw_immediate (bfd_vma value)
9610
0
{
9611
0
  return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9612
0
}
9613
9614
static bfd_vma
9615
arm_movt_immediate (bfd_vma value)
9616
0
{
9617
0
  return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9618
0
}
9619
9620
/* Fill in a PLT entry and its associated GOT slot.  If DYNINDX == -1,
9621
   the entry lives in .iplt and resolves to (*SYM_VALUE)().
9622
   Otherwise, DYNINDX is the index of the symbol in the dynamic
9623
   symbol table and SYM_VALUE is undefined.
9624
9625
   ROOT_PLT points to the offset of the PLT entry from the start of its
9626
   section (.iplt or .plt).  ARM_PLT points to the symbol's ARM-specific
9627
   bookkeeping information.
9628
9629
   Returns FALSE if there was a problem.  */
9630
9631
static bool
9632
elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9633
            union gotplt_union *root_plt,
9634
            struct arm_plt_info *arm_plt,
9635
            int dynindx, bfd_vma sym_value)
9636
0
{
9637
0
  struct elf32_arm_link_hash_table *htab;
9638
0
  asection *sgot;
9639
0
  asection *splt;
9640
0
  asection *srel;
9641
0
  bfd_byte *loc;
9642
0
  bfd_vma plt_index;
9643
0
  Elf_Internal_Rela rel;
9644
0
  bfd_vma got_header_size;
9645
9646
0
  htab = elf32_arm_hash_table (info);
9647
9648
  /* Pick the appropriate sections and sizes.  */
9649
0
  if (dynindx == -1)
9650
0
    {
9651
0
      splt = htab->root.iplt;
9652
0
      sgot = htab->root.igotplt;
9653
0
      srel = htab->root.irelplt;
9654
9655
      /* There are no reserved entries in .igot.plt, and no special
9656
   first entry in .iplt.  */
9657
0
      got_header_size = 0;
9658
0
    }
9659
0
  else
9660
0
    {
9661
0
      splt = htab->root.splt;
9662
0
      sgot = htab->root.sgotplt;
9663
0
      srel = htab->root.srelplt;
9664
9665
0
      got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9666
0
    }
9667
0
  BFD_ASSERT (splt != NULL && srel != NULL);
9668
9669
0
  bfd_vma got_offset, got_address, plt_address;
9670
0
  bfd_vma got_displacement, initial_got_entry;
9671
0
  bfd_byte * ptr;
9672
9673
0
  BFD_ASSERT (sgot != NULL);
9674
9675
  /* Get the offset into the .(i)got.plt table of the entry that
9676
     corresponds to this function.  */
9677
0
  got_offset = (arm_plt->got_offset & -2);
9678
9679
  /* Get the index in the procedure linkage table which
9680
     corresponds to this symbol.  This is the index of this symbol
9681
     in all the symbols for which we are making plt entries.
9682
     After the reserved .got.plt entries, all symbols appear in
9683
     the same order as in .plt.  */
9684
0
  if (htab->fdpic_p)
9685
    /* Function descriptor takes 8 bytes.  */
9686
0
    plt_index = (got_offset - got_header_size) / 8;
9687
0
  else
9688
0
    plt_index = (got_offset - got_header_size) / 4;
9689
9690
  /* Calculate the address of the GOT entry.  */
9691
0
  got_address = (sgot->output_section->vma
9692
0
     + sgot->output_offset
9693
0
     + got_offset);
9694
9695
  /* ...and the address of the PLT entry.  */
9696
0
  plt_address = (splt->output_section->vma
9697
0
     + splt->output_offset
9698
0
     + root_plt->offset);
9699
9700
0
  ptr = splt->contents + root_plt->offset;
9701
0
  if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
9702
0
    {
9703
0
      unsigned int i;
9704
0
      bfd_vma val;
9705
9706
0
      for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9707
0
  {
9708
0
    val = elf32_arm_vxworks_shared_plt_entry[i];
9709
0
    if (i == 2)
9710
0
      val |= got_address - sgot->output_section->vma;
9711
0
    if (i == 5)
9712
0
      val |= plt_index * RELOC_SIZE (htab);
9713
0
    if (i == 2 || i == 5)
9714
0
      bfd_put_32 (output_bfd, val, ptr);
9715
0
    else
9716
0
      put_arm_insn (htab, output_bfd, val, ptr);
9717
0
  }
9718
0
    }
9719
0
  else if (htab->root.target_os == is_vxworks)
9720
0
    {
9721
0
      unsigned int i;
9722
0
      bfd_vma val;
9723
9724
0
      for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9725
0
  {
9726
0
    val = elf32_arm_vxworks_exec_plt_entry[i];
9727
0
    if (i == 2)
9728
0
      val |= got_address;
9729
0
    if (i == 4)
9730
0
      val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9731
0
    if (i == 5)
9732
0
      val |= plt_index * RELOC_SIZE (htab);
9733
0
    if (i == 2 || i == 5)
9734
0
      bfd_put_32 (output_bfd, val, ptr);
9735
0
    else
9736
0
      put_arm_insn (htab, output_bfd, val, ptr);
9737
0
  }
9738
9739
0
      loc = (htab->srelplt2->contents
9740
0
       + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9741
9742
      /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9743
   referencing the GOT for this PLT entry.  */
9744
0
      rel.r_offset = plt_address + 8;
9745
0
      rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9746
0
      rel.r_addend = got_offset;
9747
0
      SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9748
0
      loc += RELOC_SIZE (htab);
9749
9750
      /* Create the R_ARM_ABS32 relocation referencing the
9751
   beginning of the PLT for this GOT entry.  */
9752
0
      rel.r_offset = got_address;
9753
0
      rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9754
0
      rel.r_addend = 0;
9755
0
      SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9756
0
    }
9757
0
  else if (htab->root.target_os == is_nacl)
9758
0
    {
9759
      /* Calculate the displacement between the PLT slot and the
9760
   common tail that's part of the special initial PLT slot.  */
9761
0
      int32_t tail_displacement
9762
0
  = ((splt->output_section->vma + splt->output_offset
9763
0
      + ARM_NACL_PLT_TAIL_OFFSET)
9764
0
     - (plt_address + htab->plt_entry_size + 4));
9765
0
      BFD_ASSERT ((tail_displacement & 3) == 0);
9766
0
      tail_displacement >>= 2;
9767
9768
0
      BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9769
0
      || (-tail_displacement & 0xff000000) == 0);
9770
9771
      /* Calculate the displacement between the PLT slot and the entry
9772
   in the GOT.  The offset accounts for the value produced by
9773
   adding to pc in the penultimate instruction of the PLT stub.  */
9774
0
      got_displacement = (got_address
9775
0
        - (plt_address + htab->plt_entry_size));
9776
9777
      /* NaCl does not support interworking at all.  */
9778
0
      BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9779
9780
0
      put_arm_insn (htab, output_bfd,
9781
0
        elf32_arm_nacl_plt_entry[0]
9782
0
        | arm_movw_immediate (got_displacement),
9783
0
        ptr + 0);
9784
0
      put_arm_insn (htab, output_bfd,
9785
0
        elf32_arm_nacl_plt_entry[1]
9786
0
        | arm_movt_immediate (got_displacement),
9787
0
        ptr + 4);
9788
0
      put_arm_insn (htab, output_bfd,
9789
0
        elf32_arm_nacl_plt_entry[2],
9790
0
        ptr + 8);
9791
0
      put_arm_insn (htab, output_bfd,
9792
0
        elf32_arm_nacl_plt_entry[3]
9793
0
        | (tail_displacement & 0x00ffffff),
9794
0
        ptr + 12);
9795
0
    }
9796
0
  else if (htab->fdpic_p)
9797
0
    {
9798
0
      const bfd_vma *plt_entry = using_thumb_only (htab)
9799
0
  ? elf32_arm_fdpic_thumb_plt_entry
9800
0
  : elf32_arm_fdpic_plt_entry;
9801
9802
      /* Fill-up Thumb stub if needed.  */
9803
0
      if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9804
0
  {
9805
0
    put_thumb_insn (htab, output_bfd,
9806
0
        elf32_arm_plt_thumb_stub[0], ptr - 4);
9807
0
    put_thumb_insn (htab, output_bfd,
9808
0
        elf32_arm_plt_thumb_stub[1], ptr - 2);
9809
0
  }
9810
      /* As we are using 32 bit instructions even for the Thumb
9811
   version, we have to use 'put_arm_insn' instead of
9812
   'put_thumb_insn'.  */
9813
0
      put_arm_insn (htab, output_bfd, plt_entry[0], ptr + 0);
9814
0
      put_arm_insn (htab, output_bfd, plt_entry[1], ptr + 4);
9815
0
      put_arm_insn (htab, output_bfd, plt_entry[2], ptr + 8);
9816
0
      put_arm_insn (htab, output_bfd, plt_entry[3], ptr + 12);
9817
0
      bfd_put_32 (output_bfd, got_offset, ptr + 16);
9818
9819
0
      if (!(info->flags & DF_BIND_NOW))
9820
0
  {
9821
    /* funcdesc_value_reloc_offset.  */
9822
0
    bfd_put_32 (output_bfd,
9823
0
          htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9824
0
          ptr + 20);
9825
0
    put_arm_insn (htab, output_bfd, plt_entry[6], ptr + 24);
9826
0
    put_arm_insn (htab, output_bfd, plt_entry[7], ptr + 28);
9827
0
    put_arm_insn (htab, output_bfd, plt_entry[8], ptr + 32);
9828
0
    put_arm_insn (htab, output_bfd, plt_entry[9], ptr + 36);
9829
0
  }
9830
0
    }
9831
0
  else if (using_thumb_only (htab))
9832
0
    {
9833
      /* PR ld/16017: Generate thumb only PLT entries.  */
9834
0
      if (!using_thumb2 (htab))
9835
0
  {
9836
    /* FIXME: We ought to be able to generate thumb-1 PLT
9837
       instructions...  */
9838
0
    _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9839
0
            output_bfd);
9840
0
    return false;
9841
0
  }
9842
9843
      /* Calculate the displacement between the PLT slot and the entry in
9844
   the GOT.  The 12-byte offset accounts for the value produced by
9845
   adding to pc in the 3rd instruction of the PLT stub.  */
9846
0
      got_displacement = got_address - (plt_address + 12);
9847
9848
      /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9849
   instead of 'put_thumb_insn'.  */
9850
0
      put_arm_insn (htab, output_bfd,
9851
0
        elf32_thumb2_plt_entry[0]
9852
0
        | ((got_displacement & 0x000000ff) << 16)
9853
0
        | ((got_displacement & 0x00000700) << 20)
9854
0
        | ((got_displacement & 0x00000800) >>  1)
9855
0
        | ((got_displacement & 0x0000f000) >> 12),
9856
0
        ptr + 0);
9857
0
      put_arm_insn (htab, output_bfd,
9858
0
        elf32_thumb2_plt_entry[1]
9859
0
        | ((got_displacement & 0x00ff0000)      )
9860
0
        | ((got_displacement & 0x07000000) <<  4)
9861
0
        | ((got_displacement & 0x08000000) >> 17)
9862
0
        | ((got_displacement & 0xf0000000) >> 28),
9863
0
        ptr + 4);
9864
0
      put_arm_insn (htab, output_bfd,
9865
0
        elf32_thumb2_plt_entry[2],
9866
0
        ptr + 8);
9867
0
      put_arm_insn (htab, output_bfd,
9868
0
        elf32_thumb2_plt_entry[3],
9869
0
        ptr + 12);
9870
0
    }
9871
0
  else
9872
0
    {
9873
      /* Calculate the displacement between the PLT slot and the
9874
   entry in the GOT.  The eight-byte offset accounts for the
9875
   value produced by adding to pc in the first instruction
9876
   of the PLT stub.  */
9877
0
      got_displacement = got_address - (plt_address + 8);
9878
9879
0
      if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9880
0
  {
9881
0
    put_thumb_insn (htab, output_bfd,
9882
0
        elf32_arm_plt_thumb_stub[0], ptr - 4);
9883
0
    put_thumb_insn (htab, output_bfd,
9884
0
        elf32_arm_plt_thumb_stub[1], ptr - 2);
9885
0
  }
9886
9887
0
      if (!elf32_arm_use_long_plt_entry)
9888
0
  {
9889
0
    BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9890
9891
0
    put_arm_insn (htab, output_bfd,
9892
0
      elf32_arm_plt_entry_short[0]
9893
0
      | ((got_displacement & 0x0ff00000) >> 20),
9894
0
      ptr + 0);
9895
0
    put_arm_insn (htab, output_bfd,
9896
0
      elf32_arm_plt_entry_short[1]
9897
0
      | ((got_displacement & 0x000ff000) >> 12),
9898
0
      ptr+ 4);
9899
0
    put_arm_insn (htab, output_bfd,
9900
0
      elf32_arm_plt_entry_short[2]
9901
0
      | (got_displacement & 0x00000fff),
9902
0
      ptr + 8);
9903
#ifdef FOUR_WORD_PLT
9904
    bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9905
#endif
9906
0
  }
9907
0
      else
9908
0
  {
9909
0
    put_arm_insn (htab, output_bfd,
9910
0
      elf32_arm_plt_entry_long[0]
9911
0
      | ((got_displacement & 0xf0000000) >> 28),
9912
0
      ptr + 0);
9913
0
    put_arm_insn (htab, output_bfd,
9914
0
      elf32_arm_plt_entry_long[1]
9915
0
      | ((got_displacement & 0x0ff00000) >> 20),
9916
0
      ptr + 4);
9917
0
    put_arm_insn (htab, output_bfd,
9918
0
      elf32_arm_plt_entry_long[2]
9919
0
      | ((got_displacement & 0x000ff000) >> 12),
9920
0
      ptr+ 8);
9921
0
    put_arm_insn (htab, output_bfd,
9922
0
      elf32_arm_plt_entry_long[3]
9923
0
      | (got_displacement & 0x00000fff),
9924
0
      ptr + 12);
9925
0
  }
9926
0
    }
9927
9928
  /* Fill in the entry in the .rel(a).(i)plt section.  */
9929
0
  rel.r_offset = got_address;
9930
0
  rel.r_addend = 0;
9931
0
  if (dynindx == -1)
9932
0
    {
9933
      /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9934
   The dynamic linker or static executable then calls SYM_VALUE
9935
   to determine the correct run-time value of the .igot.plt entry.  */
9936
0
      rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9937
0
      initial_got_entry = sym_value;
9938
0
    }
9939
0
  else
9940
0
    {
9941
      /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9942
   used by PLT entry.  */
9943
0
      if (htab->fdpic_p)
9944
0
  {
9945
0
    rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9946
0
    initial_got_entry = 0;
9947
0
  }
9948
0
      else
9949
0
  {
9950
0
    rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9951
0
    initial_got_entry = (splt->output_section->vma
9952
0
             + splt->output_offset);
9953
9954
    /* PR ld/16017
9955
       When thumb only we need to set the LSB for any address that
9956
       will be used with an interworking branch instruction.  */
9957
0
    if (using_thumb_only (htab))
9958
0
      initial_got_entry |= 1;
9959
0
  }
9960
0
    }
9961
9962
  /* Fill in the entry in the global offset table.  */
9963
0
  bfd_put_32 (output_bfd, initial_got_entry,
9964
0
        sgot->contents + got_offset);
9965
9966
0
  if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9967
0
    {
9968
      /* Setup initial funcdesc value.  */
9969
      /* FIXME: we don't support lazy binding because there is a
9970
   race condition between both words getting written and
9971
   some other thread attempting to read them. The ARM
9972
   architecture does not have an atomic 64 bit load/store
9973
   instruction that could be used to prevent it; it is
9974
   recommended that threaded FDPIC applications run with the
9975
   LD_BIND_NOW environment variable set.  */
9976
0
      bfd_put_32 (output_bfd, plt_address + 0x18,
9977
0
      sgot->contents + got_offset);
9978
0
      bfd_put_32 (output_bfd, -1 /*TODO*/,
9979
0
      sgot->contents + got_offset + 4);
9980
0
    }
9981
9982
0
  if (dynindx == -1)
9983
0
    elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9984
0
  else
9985
0
    {
9986
0
      if (htab->fdpic_p)
9987
0
  {
9988
    /* For FDPIC we put PLT relocationss into .rel.got when not
9989
       lazy binding otherwise we put them in .rel.plt.  For now,
9990
       we don't support lazy binding so put it in .rel.got.  */
9991
0
    if (info->flags & DF_BIND_NOW)
9992
0
      elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelgot, &rel);
9993
0
    else
9994
0
      elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelplt, &rel);
9995
0
  }
9996
0
      else
9997
0
  {
9998
0
    loc = srel->contents + plt_index * RELOC_SIZE (htab);
9999
0
    SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
10000
0
  }
10001
0
    }
10002
10003
0
  return true;
10004
0
}
10005
10006
/* Some relocations map to different relocations depending on the
10007
   target.  Return the real relocation.  */
10008
10009
static int
10010
arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10011
         int r_type)
10012
0
{
10013
0
  switch (r_type)
10014
0
    {
10015
0
    case R_ARM_TARGET1:
10016
0
      if (globals->target1_is_rel)
10017
0
  return R_ARM_REL32;
10018
0
      else
10019
0
  return R_ARM_ABS32;
10020
10021
0
    case R_ARM_TARGET2:
10022
0
      return globals->target2_reloc;
10023
10024
0
    default:
10025
0
      return r_type;
10026
0
    }
10027
0
}
10028
10029
/* Return the base VMA address which should be subtracted from real addresses
10030
   when resolving @dtpoff relocation.
10031
   This is PT_TLS segment p_vaddr.  */
10032
10033
static bfd_vma
10034
dtpoff_base (struct bfd_link_info *info)
10035
0
{
10036
  /* If tls_sec is NULL, we should have signalled an error already.  */
10037
0
  if (elf_hash_table (info)->tls_sec == NULL)
10038
0
    return 0;
10039
0
  return elf_hash_table (info)->tls_sec->vma;
10040
0
}
10041
10042
/* Return the relocation value for @tpoff relocation
10043
   if STT_TLS virtual address is ADDRESS.  */
10044
10045
static bfd_vma
10046
tpoff (struct bfd_link_info *info, bfd_vma address)
10047
0
{
10048
0
  struct elf_link_hash_table *htab = elf_hash_table (info);
10049
0
  bfd_vma base;
10050
10051
  /* If tls_sec is NULL, we should have signalled an error already.  */
10052
0
  if (htab->tls_sec == NULL)
10053
0
    return 0;
10054
0
  base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10055
0
  return address - htab->tls_sec->vma + base;
10056
0
}
10057
10058
/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10059
   VALUE is the relocation value.  */
10060
10061
static bfd_reloc_status_type
10062
elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10063
0
{
10064
0
  if (value > 0xfff)
10065
0
    return bfd_reloc_overflow;
10066
10067
0
  value |= bfd_get_32 (abfd, data) & 0xfffff000;
10068
0
  bfd_put_32 (abfd, value, data);
10069
0
  return bfd_reloc_ok;
10070
0
}
10071
10072
/* Handle TLS relaxations.  Relaxing is possible for symbols that use
10073
   R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10074
   R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10075
10076
   Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10077
   is to then call final_link_relocate.  Return other values in the
10078
   case of error.
10079
10080
   FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10081
   the pre-relaxed code.  It would be nice if the relocs were updated
10082
   to match the optimization.   */
10083
10084
static bfd_reloc_status_type
10085
elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10086
         bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10087
         Elf_Internal_Rela *rel, unsigned long is_local)
10088
0
{
10089
0
  unsigned long insn;
10090
10091
0
  switch (ELF32_R_TYPE (rel->r_info))
10092
0
    {
10093
0
    default:
10094
0
      return bfd_reloc_notsupported;
10095
10096
0
    case R_ARM_TLS_GOTDESC:
10097
0
      if (is_local)
10098
0
  insn = 0;
10099
0
      else
10100
0
  {
10101
0
    insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10102
0
    if (insn & 1)
10103
0
      insn -= 5; /* THUMB */
10104
0
    else
10105
0
      insn -= 8; /* ARM */
10106
0
  }
10107
0
      bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10108
0
      return bfd_reloc_continue;
10109
10110
0
    case R_ARM_THM_TLS_DESCSEQ:
10111
      /* Thumb insn.  */
10112
0
      insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10113
0
      if ((insn & 0xff78) == 0x4478)   /* add rx, pc */
10114
0
  {
10115
0
    if (is_local)
10116
      /* nop */
10117
0
      bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10118
0
  }
10119
0
      else if ((insn & 0xffc0) == 0x6840)  /* ldr rx,[ry,#4] */
10120
0
  {
10121
0
    if (is_local)
10122
      /* nop */
10123
0
      bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10124
0
    else
10125
      /* ldr rx,[ry] */
10126
0
      bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10127
0
  }
10128
0
      else if ((insn & 0xff87) == 0x4780)  /* blx rx */
10129
0
  {
10130
0
    if (is_local)
10131
      /* nop */
10132
0
      bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10133
0
    else
10134
      /* mov r0, rx */
10135
0
      bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10136
0
      contents + rel->r_offset);
10137
0
  }
10138
0
      else
10139
0
  {
10140
0
    if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10141
      /* It's a 32 bit instruction, fetch the rest of it for
10142
         error generation.  */
10143
0
      insn = (insn << 16)
10144
0
        | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10145
0
    _bfd_error_handler
10146
      /* xgettext:c-format */
10147
0
      (_("%pB(%pA+%#" PRIx64 "): "
10148
0
         "unexpected %s instruction '%#lx' in TLS trampoline"),
10149
0
       input_bfd, input_sec, (uint64_t) rel->r_offset,
10150
0
       "Thumb", insn);
10151
0
    return bfd_reloc_notsupported;
10152
0
  }
10153
0
      break;
10154
10155
0
    case R_ARM_TLS_DESCSEQ:
10156
      /* arm insn.  */
10157
0
      insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10158
0
      if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10159
0
  {
10160
0
    if (is_local)
10161
      /* mov rx, ry */
10162
0
      bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10163
0
      contents + rel->r_offset);
10164
0
  }
10165
0
      else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10166
0
  {
10167
0
    if (is_local)
10168
      /* nop */
10169
0
      bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10170
0
    else
10171
      /* ldr rx,[ry] */
10172
0
      bfd_put_32 (input_bfd, insn & 0xfffff000,
10173
0
      contents + rel->r_offset);
10174
0
  }
10175
0
      else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10176
0
  {
10177
0
    if (is_local)
10178
      /* nop */
10179
0
      bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10180
0
    else
10181
      /* mov r0, rx */
10182
0
      bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10183
0
      contents + rel->r_offset);
10184
0
  }
10185
0
      else
10186
0
  {
10187
0
    _bfd_error_handler
10188
      /* xgettext:c-format */
10189
0
      (_("%pB(%pA+%#" PRIx64 "): "
10190
0
         "unexpected %s instruction '%#lx' in TLS trampoline"),
10191
0
       input_bfd, input_sec, (uint64_t) rel->r_offset,
10192
0
       "ARM", insn);
10193
0
    return bfd_reloc_notsupported;
10194
0
  }
10195
0
      break;
10196
10197
0
    case R_ARM_TLS_CALL:
10198
      /* GD->IE relaxation, turn the instruction into 'nop' or
10199
   'ldr r0, [pc,r0]'  */
10200
0
      insn = is_local ? 0xe1a00000 : 0xe79f0000;
10201
0
      bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10202
0
      break;
10203
10204
0
    case R_ARM_THM_TLS_CALL:
10205
      /* GD->IE relaxation.  */
10206
0
      if (!is_local)
10207
  /* add r0,pc; ldr r0, [r0]  */
10208
0
  insn = 0x44786800;
10209
0
      else if (using_thumb2 (globals))
10210
  /* nop.w */
10211
0
  insn = 0xf3af8000;
10212
0
      else
10213
  /* nop; nop */
10214
0
  insn = 0xbf00bf00;
10215
10216
0
      bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10217
0
      bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10218
0
      break;
10219
0
    }
10220
0
  return bfd_reloc_ok;
10221
0
}
10222
10223
/* For a given value of n, calculate the value of G_n as required to
10224
   deal with group relocations.  We return it in the form of an
10225
   encoded constant-and-rotation, together with the final residual.  If n is
10226
   specified as less than zero, then final_residual is filled with the
10227
   input value and no further action is performed.  */
10228
10229
static bfd_vma
10230
calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10231
0
{
10232
0
  int current_n;
10233
0
  bfd_vma g_n;
10234
0
  bfd_vma encoded_g_n = 0;
10235
0
  bfd_vma residual = value; /* Also known as Y_n.  */
10236
10237
0
  for (current_n = 0; current_n <= n; current_n++)
10238
0
    {
10239
0
      int shift;
10240
10241
      /* Calculate which part of the value to mask.  */
10242
0
      if (residual == 0)
10243
0
  shift = 0;
10244
0
      else
10245
0
  {
10246
0
    int msb;
10247
10248
    /* Determine the most significant bit in the residual and
10249
       align the resulting value to a 2-bit boundary.  */
10250
0
    for (msb = 30; msb >= 0; msb -= 2)
10251
0
      if (residual & (3u << msb))
10252
0
        break;
10253
10254
    /* The desired shift is now (msb - 6), or zero, whichever
10255
       is the greater.  */
10256
0
    shift = msb - 6;
10257
0
    if (shift < 0)
10258
0
      shift = 0;
10259
0
  }
10260
10261
      /* Calculate g_n in 32-bit as well as encoded constant+rotation form.  */
10262
0
      g_n = residual & (0xff << shift);
10263
0
      encoded_g_n = (g_n >> shift)
10264
0
        | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10265
10266
      /* Calculate the residual for the next time around.  */
10267
0
      residual &= ~g_n;
10268
0
    }
10269
10270
0
  *final_residual = residual;
10271
10272
0
  return encoded_g_n;
10273
0
}
10274
10275
/* Given an ARM instruction, determine whether it is an ADD or a SUB.
10276
   Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise.  */
10277
10278
static int
10279
identify_add_or_sub (bfd_vma insn)
10280
0
{
10281
0
  int opcode = insn & 0x1e00000;
10282
10283
0
  if (opcode == 1 << 23) /* ADD */
10284
0
    return 1;
10285
10286
0
  if (opcode == 1 << 22) /* SUB */
10287
0
    return -1;
10288
10289
0
  return 0;
10290
0
}
10291
10292
/* Perform a relocation as part of a final link.  */
10293
10294
static bfd_reloc_status_type
10295
elf32_arm_final_link_relocate (reloc_howto_type *     howto,
10296
             bfd *          input_bfd,
10297
             bfd *          output_bfd,
10298
             asection *       input_section,
10299
             bfd_byte *       contents,
10300
             Elf_Internal_Rela *      rel,
10301
             bfd_vma          value,
10302
             struct bfd_link_info *     info,
10303
             asection *       sym_sec,
10304
             const char *       sym_name,
10305
             unsigned char        st_type,
10306
             enum arm_st_branch_type      branch_type,
10307
             struct elf_link_hash_entry * h,
10308
             bool *         unresolved_reloc_p,
10309
             char **          error_message)
10310
0
{
10311
0
  unsigned long     r_type = howto->type;
10312
0
  unsigned long     r_symndx;
10313
0
  bfd_byte *      hit_data = contents + rel->r_offset;
10314
0
  bfd_vma *     local_got_offsets;
10315
0
  bfd_vma *     local_tlsdesc_gotents;
10316
0
  asection *      sgot;
10317
0
  asection *      splt;
10318
0
  asection *      sreloc = NULL;
10319
0
  asection *      srelgot;
10320
0
  bfd_vma     addend;
10321
0
  bfd_signed_vma    signed_addend;
10322
0
  unsigned char     dynreloc_st_type;
10323
0
  bfd_vma     dynreloc_value;
10324
0
  struct elf32_arm_link_hash_table * globals;
10325
0
  struct elf32_arm_link_hash_entry *eh;
10326
0
  union gotplt_union         *root_plt;
10327
0
  struct arm_plt_info        *arm_plt;
10328
0
  bfd_vma     plt_offset;
10329
0
  bfd_vma     gotplt_offset;
10330
0
  bool        has_iplt_entry;
10331
0
  bool        resolved_to_zero;
10332
10333
0
  globals = elf32_arm_hash_table (info);
10334
0
  if (globals == NULL)
10335
0
    return bfd_reloc_notsupported;
10336
10337
0
  BFD_ASSERT (is_arm_elf (input_bfd));
10338
0
  BFD_ASSERT (howto != NULL);
10339
10340
  /* Some relocation types map to different relocations depending on the
10341
     target.  We pick the right one here.  */
10342
0
  r_type = arm_real_reloc_type (globals, r_type);
10343
10344
  /* It is possible to have linker relaxations on some TLS access
10345
     models.  Update our information here.  */
10346
0
  r_type = elf32_arm_tls_transition (info, r_type, h);
10347
10348
0
  if (r_type != howto->type)
10349
0
    howto = elf32_arm_howto_from_type (r_type);
10350
10351
0
  eh = (struct elf32_arm_link_hash_entry *) h;
10352
0
  sgot = globals->root.sgot;
10353
0
  local_got_offsets = elf_local_got_offsets (input_bfd);
10354
0
  local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10355
10356
0
  if (globals->root.dynamic_sections_created)
10357
0
    srelgot = globals->root.srelgot;
10358
0
  else
10359
0
    srelgot = NULL;
10360
10361
0
  r_symndx = ELF32_R_SYM (rel->r_info);
10362
10363
0
  if (globals->use_rel)
10364
0
    {
10365
0
      bfd_vma sign;
10366
10367
0
      switch (bfd_get_reloc_size (howto))
10368
0
  {
10369
0
  case 1: addend = bfd_get_8 (input_bfd, hit_data); break;
10370
0
  case 2: addend = bfd_get_16 (input_bfd, hit_data); break;
10371
0
  case 4: addend = bfd_get_32 (input_bfd, hit_data); break;
10372
0
  default: addend = 0; break;
10373
0
  }
10374
      /* Note: the addend and signed_addend calculated here are
10375
   incorrect for any split field.  */
10376
0
      addend &= howto->src_mask;
10377
0
      sign = howto->src_mask & ~(howto->src_mask >> 1);
10378
0
      signed_addend = (addend ^ sign) - sign;
10379
0
      signed_addend = (bfd_vma) signed_addend << howto->rightshift;
10380
0
      addend <<= howto->rightshift;
10381
0
    }
10382
0
  else
10383
0
    addend = signed_addend = rel->r_addend;
10384
10385
  /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10386
     are resolving a function call relocation.  */
10387
0
  if (using_thumb_only (globals)
10388
0
      && (r_type == R_ARM_THM_CALL
10389
0
    || r_type == R_ARM_THM_JUMP24)
10390
0
      && branch_type == ST_BRANCH_TO_ARM)
10391
0
    branch_type = ST_BRANCH_TO_THUMB;
10392
10393
  /* Record the symbol information that should be used in dynamic
10394
     relocations.  */
10395
0
  dynreloc_st_type = st_type;
10396
0
  dynreloc_value = value;
10397
0
  if (branch_type == ST_BRANCH_TO_THUMB)
10398
0
    dynreloc_value |= 1;
10399
10400
  /* Find out whether the symbol has a PLT.  Set ST_VALUE, BRANCH_TYPE and
10401
     VALUE appropriately for relocations that we resolve at link time.  */
10402
0
  has_iplt_entry = false;
10403
0
  if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10404
0
            &arm_plt)
10405
0
      && root_plt->offset != (bfd_vma) -1)
10406
0
    {
10407
0
      plt_offset = root_plt->offset;
10408
0
      gotplt_offset = arm_plt->got_offset;
10409
10410
0
      if (h == NULL || eh->is_iplt)
10411
0
  {
10412
0
    has_iplt_entry = true;
10413
0
    splt = globals->root.iplt;
10414
10415
    /* Populate .iplt entries here, because not all of them will
10416
       be seen by finish_dynamic_symbol.  The lower bit is set if
10417
       we have already populated the entry.  */
10418
0
    if (plt_offset & 1)
10419
0
      plt_offset--;
10420
0
    else
10421
0
      {
10422
0
        if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10423
0
            -1, dynreloc_value))
10424
0
    root_plt->offset |= 1;
10425
0
        else
10426
0
    return bfd_reloc_notsupported;
10427
0
      }
10428
10429
    /* Static relocations always resolve to the .iplt entry.  */
10430
0
    st_type = STT_FUNC;
10431
0
    value = (splt->output_section->vma
10432
0
       + splt->output_offset
10433
0
       + plt_offset);
10434
0
    branch_type = ST_BRANCH_TO_ARM;
10435
10436
    /* If there are non-call relocations that resolve to the .iplt
10437
       entry, then all dynamic ones must too.  */
10438
0
    if (arm_plt->noncall_refcount != 0)
10439
0
      {
10440
0
        dynreloc_st_type = st_type;
10441
0
        dynreloc_value = value;
10442
0
      }
10443
0
  }
10444
0
      else
10445
  /* We populate the .plt entry in finish_dynamic_symbol.  */
10446
0
  splt = globals->root.splt;
10447
0
    }
10448
0
  else
10449
0
    {
10450
0
      splt = NULL;
10451
0
      plt_offset = (bfd_vma) -1;
10452
0
      gotplt_offset = (bfd_vma) -1;
10453
0
    }
10454
10455
0
  resolved_to_zero = (h != NULL
10456
0
          && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10457
10458
0
  switch (r_type)
10459
0
    {
10460
0
    case R_ARM_NONE:
10461
      /* We don't need to find a value for this symbol.  It's just a
10462
   marker.  */
10463
0
      *unresolved_reloc_p = false;
10464
0
      return bfd_reloc_ok;
10465
10466
0
    case R_ARM_ABS12:
10467
0
      if (globals->root.target_os != is_vxworks)
10468
0
  return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10469
      /* Fall through.  */
10470
10471
0
    case R_ARM_PC24:
10472
0
    case R_ARM_ABS32:
10473
0
    case R_ARM_ABS32_NOI:
10474
0
    case R_ARM_REL32:
10475
0
    case R_ARM_REL32_NOI:
10476
0
    case R_ARM_CALL:
10477
0
    case R_ARM_JUMP24:
10478
0
    case R_ARM_XPC25:
10479
0
    case R_ARM_PREL31:
10480
0
    case R_ARM_PLT32:
10481
      /* Handle relocations which should use the PLT entry.  ABS32/REL32
10482
   will use the symbol's value, which may point to a PLT entry, but we
10483
   don't need to handle that here.  If we created a PLT entry, all
10484
   branches in this object should go to it, except if the PLT is too
10485
   far away, in which case a long branch stub should be inserted.  */
10486
0
      if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10487
0
     && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10488
0
     && r_type != R_ARM_CALL
10489
0
     && r_type != R_ARM_JUMP24
10490
0
     && r_type != R_ARM_PLT32)
10491
0
    && plt_offset != (bfd_vma) -1)
10492
0
  {
10493
    /* If we've created a .plt section, and assigned a PLT entry
10494
       to this function, it must either be a STT_GNU_IFUNC reference
10495
       or not be known to bind locally.  In other cases, we should
10496
       have cleared the PLT entry by now.  */
10497
0
    BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10498
10499
0
    value = (splt->output_section->vma
10500
0
       + splt->output_offset
10501
0
       + plt_offset);
10502
0
    *unresolved_reloc_p = false;
10503
0
    return _bfd_final_link_relocate (howto, input_bfd, input_section,
10504
0
             contents, rel->r_offset, value,
10505
0
             rel->r_addend);
10506
0
  }
10507
10508
      /* When generating a shared library or PIE, these relocations
10509
   are copied into the output file to be resolved at run time.  */
10510
0
      if ((bfd_link_pic (info)
10511
0
     || globals->fdpic_p)
10512
0
    && (input_section->flags & SEC_ALLOC)
10513
0
    && !(globals->root.target_os == is_vxworks
10514
0
         && strcmp (input_section->output_section->name,
10515
0
        ".tls_vars") == 0)
10516
0
    && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10517
0
        || !SYMBOL_CALLS_LOCAL (info, h))
10518
0
    && !(input_bfd == globals->stub_bfd
10519
0
         && strstr (input_section->name, STUB_SUFFIX))
10520
0
    && (h == NULL
10521
0
        || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10522
0
      && !resolved_to_zero)
10523
0
        || h->root.type != bfd_link_hash_undefweak)
10524
0
    && r_type != R_ARM_PC24
10525
0
    && r_type != R_ARM_CALL
10526
0
    && r_type != R_ARM_JUMP24
10527
0
    && r_type != R_ARM_PREL31
10528
0
    && r_type != R_ARM_PLT32)
10529
0
  {
10530
0
    Elf_Internal_Rela outrel;
10531
0
    bool skip, relocate;
10532
0
    int isrofixup = 0;
10533
10534
0
    if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10535
0
        && !h->def_regular)
10536
0
      {
10537
0
        char *v = _("shared object");
10538
10539
0
        if (bfd_link_executable (info))
10540
0
    v = _("PIE executable");
10541
10542
0
        _bfd_error_handler
10543
0
    (_("%pB: relocation %s against external or undefined symbol `%s'"
10544
0
       " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10545
0
     elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10546
0
        return bfd_reloc_notsupported;
10547
0
      }
10548
10549
0
    *unresolved_reloc_p = false;
10550
10551
0
    if (sreloc == NULL && globals->root.dynamic_sections_created)
10552
0
      {
10553
0
        sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10554
0
                 ! globals->use_rel);
10555
10556
0
        if (sreloc == NULL)
10557
0
    return bfd_reloc_notsupported;
10558
0
      }
10559
10560
0
    skip = false;
10561
0
    relocate = false;
10562
10563
0
    outrel.r_addend = addend;
10564
0
    outrel.r_offset =
10565
0
      _bfd_elf_section_offset (output_bfd, info, input_section,
10566
0
             rel->r_offset);
10567
0
    if (outrel.r_offset == (bfd_vma) -1)
10568
0
      skip = true;
10569
0
    else if (outrel.r_offset == (bfd_vma) -2)
10570
0
      skip = true, relocate = true;
10571
0
    outrel.r_offset += (input_section->output_section->vma
10572
0
            + input_section->output_offset);
10573
10574
0
    if (skip)
10575
0
      memset (&outrel, 0, sizeof outrel);
10576
0
    else if (h != NULL
10577
0
       && h->dynindx != -1
10578
0
       && (!bfd_link_pic (info)
10579
0
           || !(bfd_link_pie (info)
10580
0
          || SYMBOLIC_BIND (info, h))
10581
0
           || !h->def_regular))
10582
0
      outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10583
0
    else
10584
0
      {
10585
0
        int symbol;
10586
10587
        /* This symbol is local, or marked to become local.  */
10588
0
        BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10589
0
        || (globals->fdpic_p && !bfd_link_pic (info)));
10590
        /* On SVR4-ish systems, the dynamic loader cannot
10591
     relocate the text and data segments independently,
10592
     so the symbol does not matter.  */
10593
0
        symbol = 0;
10594
0
        if (dynreloc_st_type == STT_GNU_IFUNC)
10595
    /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10596
       to the .iplt entry.  Instead, every non-call reference
10597
       must use an R_ARM_IRELATIVE relocation to obtain the
10598
       correct run-time address.  */
10599
0
    outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10600
0
        else if (globals->fdpic_p && !bfd_link_pic (info))
10601
0
    isrofixup = 1;
10602
0
        else
10603
0
    outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10604
0
        if (globals->use_rel)
10605
0
    relocate = true;
10606
0
        else
10607
0
    outrel.r_addend += dynreloc_value;
10608
0
      }
10609
10610
0
    if (isrofixup)
10611
0
      arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
10612
0
    else
10613
0
      elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10614
10615
    /* If this reloc is against an external symbol, we do not want to
10616
       fiddle with the addend.  Otherwise, we need to include the symbol
10617
       value so that it becomes an addend for the dynamic reloc.  */
10618
0
    if (! relocate)
10619
0
      return bfd_reloc_ok;
10620
10621
0
    return _bfd_final_link_relocate (howto, input_bfd, input_section,
10622
0
             contents, rel->r_offset,
10623
0
             dynreloc_value, (bfd_vma) 0);
10624
0
  }
10625
0
      else switch (r_type)
10626
0
  {
10627
0
  case R_ARM_ABS12:
10628
0
    return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10629
10630
0
  case R_ARM_XPC25:   /* Arm BLX instruction.  */
10631
0
  case R_ARM_CALL:
10632
0
  case R_ARM_JUMP24:
10633
0
  case R_ARM_PC24:    /* Arm B/BL instruction.  */
10634
0
  case R_ARM_PLT32:
10635
0
    {
10636
0
    struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10637
10638
0
    if (r_type == R_ARM_XPC25)
10639
0
      {
10640
        /* Check for Arm calling Arm function.  */
10641
        /* FIXME: Should we translate the instruction into a BL
10642
     instruction instead ?  */
10643
0
        if (branch_type != ST_BRANCH_TO_THUMB)
10644
0
    _bfd_error_handler
10645
0
      (_("\%pB: warning: %s BLX instruction targets"
10646
0
         " %s function '%s'"),
10647
0
       input_bfd, "ARM",
10648
0
       "ARM", h ? h->root.root.string : "(local)");
10649
0
      }
10650
0
    else if (r_type == R_ARM_PC24)
10651
0
      {
10652
        /* Check for Arm calling Thumb function.  */
10653
0
        if (branch_type == ST_BRANCH_TO_THUMB)
10654
0
    {
10655
0
      if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10656
0
                 output_bfd, input_section,
10657
0
                 hit_data, sym_sec, rel->r_offset,
10658
0
                 signed_addend, value,
10659
0
                 error_message))
10660
0
        return bfd_reloc_ok;
10661
0
      else
10662
0
        return bfd_reloc_dangerous;
10663
0
    }
10664
0
      }
10665
10666
    /* Check if a stub has to be inserted because the
10667
       destination is too far or we are changing mode.  */
10668
0
    if (   r_type == R_ARM_CALL
10669
0
        || r_type == R_ARM_JUMP24
10670
0
        || r_type == R_ARM_PLT32)
10671
0
      {
10672
0
        enum elf32_arm_stub_type stub_type = arm_stub_none;
10673
0
        struct elf32_arm_link_hash_entry *hash;
10674
10675
0
        hash = (struct elf32_arm_link_hash_entry *) h;
10676
0
        stub_type = arm_type_of_stub (info, input_section, rel,
10677
0
              st_type, &branch_type,
10678
0
              hash, value, sym_sec,
10679
0
              input_bfd, sym_name);
10680
10681
0
        if (stub_type != arm_stub_none)
10682
0
    {
10683
      /* The target is out of reach, so redirect the
10684
         branch to the local stub for this function.  */
10685
0
      stub_entry = elf32_arm_get_stub_entry (input_section,
10686
0
               sym_sec, h,
10687
0
               rel, globals,
10688
0
               stub_type);
10689
0
      {
10690
0
        if (stub_entry != NULL)
10691
0
          value = (stub_entry->stub_offset
10692
0
             + stub_entry->stub_sec->output_offset
10693
0
             + stub_entry->stub_sec->output_section->vma);
10694
10695
0
        if (plt_offset != (bfd_vma) -1)
10696
0
          *unresolved_reloc_p = false;
10697
0
      }
10698
0
    }
10699
0
        else
10700
0
    {
10701
      /* If the call goes through a PLT entry, make sure to
10702
         check distance to the right destination address.  */
10703
0
      if (plt_offset != (bfd_vma) -1)
10704
0
        {
10705
0
          value = (splt->output_section->vma
10706
0
             + splt->output_offset
10707
0
             + plt_offset);
10708
0
          *unresolved_reloc_p = false;
10709
          /* The PLT entry is in ARM mode, regardless of the
10710
       target function.  */
10711
0
          branch_type = ST_BRANCH_TO_ARM;
10712
0
        }
10713
0
    }
10714
0
      }
10715
10716
    /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10717
       where:
10718
        S is the address of the symbol in the relocation.
10719
        P is address of the instruction being relocated.
10720
        A is the addend (extracted from the instruction) in bytes.
10721
10722
       S is held in 'value'.
10723
       P is the base address of the section containing the
10724
         instruction plus the offset of the reloc into that
10725
         section, ie:
10726
     (input_section->output_section->vma +
10727
      input_section->output_offset +
10728
      rel->r_offset).
10729
       A is the addend, converted into bytes, ie:
10730
     (signed_addend * 4)
10731
10732
       Note: None of these operations have knowledge of the pipeline
10733
       size of the processor, thus it is up to the assembler to
10734
       encode this information into the addend.  */
10735
0
    value -= (input_section->output_section->vma
10736
0
        + input_section->output_offset);
10737
0
    value -= rel->r_offset;
10738
0
    value += signed_addend;
10739
10740
0
    signed_addend = value;
10741
0
    signed_addend >>= howto->rightshift;
10742
10743
    /* A branch to an undefined weak symbol is turned into a jump to
10744
       the next instruction unless a PLT entry will be created.
10745
       Do the same for local undefined symbols (but not for STN_UNDEF).
10746
       The jump to the next instruction is optimized as a NOP depending
10747
       on the architecture.  */
10748
0
    if (h ? (h->root.type == bfd_link_hash_undefweak
10749
0
       && plt_offset == (bfd_vma) -1)
10750
0
        : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10751
0
      {
10752
0
        value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10753
10754
0
        if (arch_has_arm_nop (globals))
10755
0
    value |= 0x0320f000;
10756
0
        else
10757
0
    value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0.  */
10758
0
      }
10759
0
    else
10760
0
      {
10761
        /* Perform a signed range check.  */
10762
0
        if (   signed_addend >   ((bfd_signed_vma)  (howto->dst_mask >> 1))
10763
0
      || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10764
0
    return bfd_reloc_overflow;
10765
10766
0
        addend = (value & 2);
10767
10768
0
        value = (signed_addend & howto->dst_mask)
10769
0
    | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10770
10771
0
        if (r_type == R_ARM_CALL)
10772
0
    {
10773
      /* Set the H bit in the BLX instruction.  */
10774
0
      if (branch_type == ST_BRANCH_TO_THUMB)
10775
0
        {
10776
0
          if (addend)
10777
0
      value |= (1 << 24);
10778
0
          else
10779
0
      value &= ~(bfd_vma)(1 << 24);
10780
0
        }
10781
10782
      /* Select the correct instruction (BL or BLX).  */
10783
      /* Only if we are not handling a BL to a stub. In this
10784
         case, mode switching is performed by the stub.  */
10785
0
      if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10786
0
        value |= (1 << 28);
10787
0
      else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10788
0
        {
10789
0
          value &= ~(bfd_vma)(1 << 28);
10790
0
          value |= (1 << 24);
10791
0
        }
10792
0
    }
10793
0
      }
10794
0
    }
10795
0
    break;
10796
10797
0
  case R_ARM_ABS32:
10798
0
    value += addend;
10799
0
    if (branch_type == ST_BRANCH_TO_THUMB)
10800
0
      value |= 1;
10801
0
    break;
10802
10803
0
  case R_ARM_ABS32_NOI:
10804
0
    value += addend;
10805
0
    break;
10806
10807
0
  case R_ARM_REL32:
10808
0
    value += addend;
10809
0
    if (branch_type == ST_BRANCH_TO_THUMB)
10810
0
      value |= 1;
10811
0
    value -= (input_section->output_section->vma
10812
0
        + input_section->output_offset + rel->r_offset);
10813
0
    break;
10814
10815
0
  case R_ARM_REL32_NOI:
10816
0
    value += addend;
10817
0
    value -= (input_section->output_section->vma
10818
0
        + input_section->output_offset + rel->r_offset);
10819
0
    break;
10820
10821
0
  case R_ARM_PREL31:
10822
0
    value -= (input_section->output_section->vma
10823
0
        + input_section->output_offset + rel->r_offset);
10824
0
    value += signed_addend;
10825
0
    if (! h || h->root.type != bfd_link_hash_undefweak)
10826
0
      {
10827
        /* Check for overflow.  */
10828
0
        if ((value ^ (value >> 1)) & (1 << 30))
10829
0
    return bfd_reloc_overflow;
10830
0
      }
10831
0
    value &= 0x7fffffff;
10832
0
    value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10833
0
    if (branch_type == ST_BRANCH_TO_THUMB)
10834
0
      value |= 1;
10835
0
    break;
10836
0
  }
10837
10838
0
      bfd_put_32 (input_bfd, value, hit_data);
10839
0
      return bfd_reloc_ok;
10840
10841
0
    case R_ARM_ABS8:
10842
0
      value += addend;
10843
10844
      /* There is no way to tell whether the user intended to use a signed or
10845
   unsigned addend.  When checking for overflow we accept either,
10846
   as specified by the AAELF.  */
10847
0
      if ((long) value > 0xff || (long) value < -0x80)
10848
0
  return bfd_reloc_overflow;
10849
10850
0
      bfd_put_8 (input_bfd, value, hit_data);
10851
0
      return bfd_reloc_ok;
10852
10853
0
    case R_ARM_ABS16:
10854
0
      value += addend;
10855
10856
      /* See comment for R_ARM_ABS8.  */
10857
0
      if ((long) value > 0xffff || (long) value < -0x8000)
10858
0
  return bfd_reloc_overflow;
10859
10860
0
      bfd_put_16 (input_bfd, value, hit_data);
10861
0
      return bfd_reloc_ok;
10862
10863
0
    case R_ARM_THM_ABS5:
10864
      /* Support ldr and str instructions for the thumb.  */
10865
0
      if (globals->use_rel)
10866
0
  {
10867
    /* Need to refetch addend.  */
10868
0
    addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10869
    /* ??? Need to determine shift amount from operand size.  */
10870
0
    addend >>= howto->rightshift;
10871
0
  }
10872
0
      value += addend;
10873
10874
      /* ??? Isn't value unsigned?  */
10875
0
      if ((long) value > 0x1f || (long) value < -0x10)
10876
0
  return bfd_reloc_overflow;
10877
10878
      /* ??? Value needs to be properly shifted into place first.  */
10879
0
      value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10880
0
      bfd_put_16 (input_bfd, value, hit_data);
10881
0
      return bfd_reloc_ok;
10882
10883
0
    case R_ARM_THM_ALU_PREL_11_0:
10884
      /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw).  */
10885
0
      {
10886
0
  bfd_vma insn;
10887
0
  bfd_signed_vma relocation;
10888
10889
0
  insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10890
0
       | bfd_get_16 (input_bfd, hit_data + 2);
10891
10892
0
  if (globals->use_rel)
10893
0
    {
10894
0
      signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10895
0
        | ((insn & (1 << 26)) >> 15);
10896
0
      if (insn & 0xf00000)
10897
0
        signed_addend = -signed_addend;
10898
0
    }
10899
10900
0
  relocation = value + signed_addend;
10901
0
  relocation -= Pa (input_section->output_section->vma
10902
0
        + input_section->output_offset
10903
0
        + rel->r_offset);
10904
10905
  /* PR 21523: Use an absolute value.  The user of this reloc will
10906
     have already selected an ADD or SUB insn appropriately.  */
10907
0
  value = llabs (relocation);
10908
10909
0
  if (value >= 0x1000)
10910
0
    return bfd_reloc_overflow;
10911
10912
  /* Destination is Thumb.  Force bit 0 to 1 to reflect this.  */
10913
0
  if (branch_type == ST_BRANCH_TO_THUMB)
10914
0
    value |= 1;
10915
10916
0
  insn = (insn & 0xfb0f8f00) | (value & 0xff)
10917
0
       | ((value & 0x700) << 4)
10918
0
       | ((value & 0x800) << 15);
10919
0
  if (relocation < 0)
10920
0
    insn |= 0xa00000;
10921
10922
0
  bfd_put_16 (input_bfd, insn >> 16, hit_data);
10923
0
  bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10924
10925
0
  return bfd_reloc_ok;
10926
0
      }
10927
10928
0
    case R_ARM_THM_PC8:
10929
      /* PR 10073:  This reloc is not generated by the GNU toolchain,
10930
   but it is supported for compatibility with third party libraries
10931
   generated by other compilers, specifically the ARM/IAR.  */
10932
0
      {
10933
0
  bfd_vma insn;
10934
0
  bfd_signed_vma relocation;
10935
10936
0
  insn = bfd_get_16 (input_bfd, hit_data);
10937
10938
0
  if (globals->use_rel)
10939
0
    addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10940
10941
0
  relocation = value + addend;
10942
0
  relocation -= Pa (input_section->output_section->vma
10943
0
        + input_section->output_offset
10944
0
        + rel->r_offset);
10945
10946
0
  value = relocation;
10947
10948
  /* We do not check for overflow of this reloc.  Although strictly
10949
     speaking this is incorrect, it appears to be necessary in order
10950
     to work with IAR generated relocs.  Since GCC and GAS do not
10951
     generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10952
     a problem for them.  */
10953
0
  value &= 0x3fc;
10954
10955
0
  insn = (insn & 0xff00) | (value >> 2);
10956
10957
0
  bfd_put_16 (input_bfd, insn, hit_data);
10958
10959
0
  return bfd_reloc_ok;
10960
0
      }
10961
10962
0
    case R_ARM_THM_PC12:
10963
      /* Corresponds to: ldr.w reg, [pc, #offset].  */
10964
0
      {
10965
0
  bfd_vma insn;
10966
0
  bfd_signed_vma relocation;
10967
10968
0
  insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10969
0
       | bfd_get_16 (input_bfd, hit_data + 2);
10970
10971
0
  if (globals->use_rel)
10972
0
    {
10973
0
      signed_addend = insn & 0xfff;
10974
0
      if (!(insn & (1 << 23)))
10975
0
        signed_addend = -signed_addend;
10976
0
    }
10977
10978
0
  relocation = value + signed_addend;
10979
0
  relocation -= Pa (input_section->output_section->vma
10980
0
        + input_section->output_offset
10981
0
        + rel->r_offset);
10982
10983
0
  value = relocation;
10984
10985
0
  if (value >= 0x1000)
10986
0
    return bfd_reloc_overflow;
10987
10988
0
  insn = (insn & 0xff7ff000) | value;
10989
0
  if (relocation >= 0)
10990
0
    insn |= (1 << 23);
10991
10992
0
  bfd_put_16 (input_bfd, insn >> 16, hit_data);
10993
0
  bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10994
10995
0
  return bfd_reloc_ok;
10996
0
      }
10997
10998
0
    case R_ARM_THM_XPC22:
10999
0
    case R_ARM_THM_CALL:
11000
0
    case R_ARM_THM_JUMP24:
11001
      /* Thumb BL (branch long instruction).  */
11002
0
      {
11003
0
  bfd_vma relocation;
11004
0
  bfd_vma reloc_sign;
11005
0
  bool overflow = false;
11006
0
  bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11007
0
  bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11008
0
  bfd_signed_vma reloc_signed_max;
11009
0
  bfd_signed_vma reloc_signed_min;
11010
0
  bfd_vma check;
11011
0
  bfd_signed_vma signed_check;
11012
0
  int bitsize;
11013
0
  const int thumb2 = using_thumb2 (globals);
11014
0
  const int thumb2_bl = using_thumb2_bl (globals);
11015
11016
  /* A branch to an undefined weak symbol is turned into a jump to
11017
     the next instruction unless a PLT entry will be created.
11018
     The jump to the next instruction is optimized as a NOP.W for
11019
     Thumb-2 enabled architectures.  */
11020
0
  if (h && h->root.type == bfd_link_hash_undefweak
11021
0
      && plt_offset == (bfd_vma) -1)
11022
0
    {
11023
0
      if (thumb2)
11024
0
        {
11025
0
    bfd_put_16 (input_bfd, 0xf3af, hit_data);
11026
0
    bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11027
0
        }
11028
0
      else
11029
0
        {
11030
0
    bfd_put_16 (input_bfd, 0xe000, hit_data);
11031
0
    bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11032
0
        }
11033
0
      return bfd_reloc_ok;
11034
0
    }
11035
11036
  /* Fetch the addend.  We use the Thumb-2 encoding (backwards compatible
11037
     with Thumb-1) involving the J1 and J2 bits.  */
11038
0
  if (globals->use_rel)
11039
0
    {
11040
0
      bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11041
0
      bfd_vma upper = upper_insn & 0x3ff;
11042
0
      bfd_vma lower = lower_insn & 0x7ff;
11043
0
      bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11044
0
      bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11045
0
      bfd_vma i1 = j1 ^ s ? 0 : 1;
11046
0
      bfd_vma i2 = j2 ^ s ? 0 : 1;
11047
11048
0
      addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11049
      /* Sign extend.  */
11050
0
      addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11051
11052
0
      signed_addend = addend;
11053
0
    }
11054
11055
0
  if (r_type == R_ARM_THM_XPC22)
11056
0
    {
11057
      /* Check for Thumb to Thumb call.  */
11058
      /* FIXME: Should we translate the instruction into a BL
11059
         instruction instead ?  */
11060
0
      if (branch_type == ST_BRANCH_TO_THUMB)
11061
0
        _bfd_error_handler
11062
0
    (_("%pB: warning: %s BLX instruction targets"
11063
0
       " %s function '%s'"),
11064
0
     input_bfd, "Thumb",
11065
0
     "Thumb", h ? h->root.root.string : "(local)");
11066
0
    }
11067
0
  else
11068
0
    {
11069
      /* If it is not a call to Thumb, assume call to Arm.
11070
         If it is a call relative to a section name, then it is not a
11071
         function call at all, but rather a long jump.  Calls through
11072
         the PLT do not require stubs.  */
11073
0
      if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11074
0
        {
11075
0
    if (globals->use_blx && r_type == R_ARM_THM_CALL)
11076
0
      {
11077
        /* Convert BL to BLX.  */
11078
0
        lower_insn = (lower_insn & ~0x1000) | 0x0800;
11079
0
      }
11080
0
    else if ((   r_type != R_ARM_THM_CALL)
11081
0
       && (r_type != R_ARM_THM_JUMP24))
11082
0
      {
11083
0
        if (elf32_thumb_to_arm_stub
11084
0
      (info, sym_name, input_bfd, output_bfd, input_section,
11085
0
       hit_data, sym_sec, rel->r_offset, signed_addend, value,
11086
0
       error_message))
11087
0
          return bfd_reloc_ok;
11088
0
        else
11089
0
          return bfd_reloc_dangerous;
11090
0
      }
11091
0
        }
11092
0
      else if (branch_type == ST_BRANCH_TO_THUMB
11093
0
         && globals->use_blx
11094
0
         && r_type == R_ARM_THM_CALL)
11095
0
        {
11096
    /* Make sure this is a BL.  */
11097
0
    lower_insn |= 0x1800;
11098
0
        }
11099
0
    }
11100
11101
0
  enum elf32_arm_stub_type stub_type = arm_stub_none;
11102
0
  if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11103
0
    {
11104
      /* Check if a stub has to be inserted because the destination
11105
         is too far.  */
11106
0
      struct elf32_arm_stub_hash_entry *stub_entry;
11107
0
      struct elf32_arm_link_hash_entry *hash;
11108
11109
0
      hash = (struct elf32_arm_link_hash_entry *) h;
11110
11111
0
      stub_type = arm_type_of_stub (info, input_section, rel,
11112
0
            st_type, &branch_type,
11113
0
            hash, value, sym_sec,
11114
0
            input_bfd, sym_name);
11115
11116
0
      if (stub_type != arm_stub_none)
11117
0
        {
11118
    /* The target is out of reach or we are changing modes, so
11119
       redirect the branch to the local stub for this
11120
       function.  */
11121
0
    stub_entry = elf32_arm_get_stub_entry (input_section,
11122
0
                   sym_sec, h,
11123
0
                   rel, globals,
11124
0
                   stub_type);
11125
0
    if (stub_entry != NULL)
11126
0
      {
11127
0
        value = (stub_entry->stub_offset
11128
0
           + stub_entry->stub_sec->output_offset
11129
0
           + stub_entry->stub_sec->output_section->vma);
11130
11131
0
        if (plt_offset != (bfd_vma) -1)
11132
0
          *unresolved_reloc_p = false;
11133
0
      }
11134
11135
    /* If this call becomes a call to Arm, force BLX.  */
11136
0
    if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11137
0
      {
11138
0
        if ((stub_entry
11139
0
       && !arm_stub_is_thumb (stub_entry->stub_type))
11140
0
      || branch_type != ST_BRANCH_TO_THUMB)
11141
0
          lower_insn = (lower_insn & ~0x1000) | 0x0800;
11142
0
      }
11143
0
        }
11144
0
    }
11145
11146
  /* Handle calls via the PLT.  */
11147
0
  if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11148
0
    {
11149
0
      value = (splt->output_section->vma
11150
0
         + splt->output_offset
11151
0
         + plt_offset);
11152
11153
0
      if (globals->use_blx
11154
0
    && r_type == R_ARM_THM_CALL
11155
0
    && ! using_thumb_only (globals))
11156
0
        {
11157
    /* If the Thumb BLX instruction is available, convert
11158
       the BL to a BLX instruction to call the ARM-mode
11159
       PLT entry.  */
11160
0
    lower_insn = (lower_insn & ~0x1000) | 0x0800;
11161
0
    branch_type = ST_BRANCH_TO_ARM;
11162
0
        }
11163
0
      else
11164
0
        {
11165
0
    if (! using_thumb_only (globals))
11166
      /* Target the Thumb stub before the ARM PLT entry.  */
11167
0
      value -= PLT_THUMB_STUB_SIZE;
11168
0
    branch_type = ST_BRANCH_TO_THUMB;
11169
0
        }
11170
0
      *unresolved_reloc_p = false;
11171
0
    }
11172
11173
0
  relocation = value + signed_addend;
11174
11175
0
  relocation -= (input_section->output_section->vma
11176
0
           + input_section->output_offset
11177
0
           + rel->r_offset);
11178
11179
0
  check = relocation >> howto->rightshift;
11180
11181
  /* If this is a signed value, the rightshift just dropped
11182
     leading 1 bits (assuming twos complement).  */
11183
0
  if ((bfd_signed_vma) relocation >= 0)
11184
0
    signed_check = check;
11185
0
  else
11186
0
    signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11187
11188
  /* Calculate the permissable maximum and minimum values for
11189
     this relocation according to whether we're relocating for
11190
     Thumb-2 or not.  */
11191
0
  bitsize = howto->bitsize;
11192
0
  if (!thumb2_bl)
11193
0
    bitsize -= 2;
11194
0
  reloc_signed_max = (1 << (bitsize - 1)) - 1;
11195
0
  reloc_signed_min = ~reloc_signed_max;
11196
11197
  /* Assumes two's complement.  */
11198
0
  if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11199
0
    overflow = true;
11200
11201
0
  if ((lower_insn & 0x5000) == 0x4000)
11202
    /* For a BLX instruction, make sure that the relocation is rounded up
11203
       to a word boundary.  This follows the semantics of the instruction
11204
       which specifies that bit 1 of the target address will come from bit
11205
       1 of the base address.  */
11206
0
    relocation = (relocation + 2) & ~ 3;
11207
11208
  /* Put RELOCATION back into the insn.  Assumes two's complement.
11209
     We use the Thumb-2 encoding, which is safe even if dealing with
11210
     a Thumb-1 instruction by virtue of our overflow check above.  */
11211
0
  reloc_sign = (signed_check < 0) ? 1 : 0;
11212
0
  upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11213
0
         | ((relocation >> 12) & 0x3ff)
11214
0
         | (reloc_sign << 10);
11215
0
  lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11216
0
         | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11217
0
         | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11218
0
         | ((relocation >> 1) & 0x7ff);
11219
11220
  /* Put the relocated value back in the object file:  */
11221
0
  bfd_put_16 (input_bfd, upper_insn, hit_data);
11222
0
  bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11223
11224
0
  return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11225
0
      }
11226
0
      break;
11227
11228
0
    case R_ARM_THM_JUMP19:
11229
      /* Thumb32 conditional branch instruction.  */
11230
0
      {
11231
0
  bfd_vma relocation;
11232
0
  bool overflow = false;
11233
0
  bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11234
0
  bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11235
0
  bfd_signed_vma reloc_signed_max = 0xffffe;
11236
0
  bfd_signed_vma reloc_signed_min = -0x100000;
11237
0
  bfd_signed_vma signed_check;
11238
0
  enum elf32_arm_stub_type stub_type = arm_stub_none;
11239
0
  struct elf32_arm_stub_hash_entry *stub_entry;
11240
0
  struct elf32_arm_link_hash_entry *hash;
11241
11242
  /* Need to refetch the addend, reconstruct the top three bits,
11243
     and squish the two 11 bit pieces together.  */
11244
0
  if (globals->use_rel)
11245
0
    {
11246
0
      bfd_vma S     = (upper_insn & 0x0400) >> 10;
11247
0
      bfd_vma upper = (upper_insn & 0x003f);
11248
0
      bfd_vma J1    = (lower_insn & 0x2000) >> 13;
11249
0
      bfd_vma J2    = (lower_insn & 0x0800) >> 11;
11250
0
      bfd_vma lower = (lower_insn & 0x07ff);
11251
11252
0
      upper |= J1 << 6;
11253
0
      upper |= J2 << 7;
11254
0
      upper |= (!S) << 8;
11255
0
      upper -= 0x0100; /* Sign extend.  */
11256
11257
0
      addend = (upper << 12) | (lower << 1);
11258
0
      signed_addend = addend;
11259
0
    }
11260
11261
  /* Handle calls via the PLT.  */
11262
0
  if (plt_offset != (bfd_vma) -1)
11263
0
    {
11264
0
      value = (splt->output_section->vma
11265
0
         + splt->output_offset
11266
0
         + plt_offset);
11267
      /* Target the Thumb stub before the ARM PLT entry.  */
11268
0
      value -= PLT_THUMB_STUB_SIZE;
11269
0
      *unresolved_reloc_p = false;
11270
0
    }
11271
11272
0
  hash = (struct elf32_arm_link_hash_entry *)h;
11273
11274
0
  stub_type = arm_type_of_stub (info, input_section, rel,
11275
0
              st_type, &branch_type,
11276
0
              hash, value, sym_sec,
11277
0
              input_bfd, sym_name);
11278
0
  if (stub_type != arm_stub_none)
11279
0
    {
11280
0
      stub_entry = elf32_arm_get_stub_entry (input_section,
11281
0
               sym_sec, h,
11282
0
               rel, globals,
11283
0
               stub_type);
11284
0
      if (stub_entry != NULL)
11285
0
        {
11286
0
    value = (stub_entry->stub_offset
11287
0
      + stub_entry->stub_sec->output_offset
11288
0
      + stub_entry->stub_sec->output_section->vma);
11289
0
        }
11290
0
    }
11291
11292
0
  relocation = value + signed_addend;
11293
0
  relocation -= (input_section->output_section->vma
11294
0
           + input_section->output_offset
11295
0
           + rel->r_offset);
11296
0
  signed_check = (bfd_signed_vma) relocation;
11297
11298
0
  if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11299
0
    overflow = true;
11300
11301
  /* Put RELOCATION back into the insn.  */
11302
0
  {
11303
0
    bfd_vma S  = (relocation & 0x00100000) >> 20;
11304
0
    bfd_vma J2 = (relocation & 0x00080000) >> 19;
11305
0
    bfd_vma J1 = (relocation & 0x00040000) >> 18;
11306
0
    bfd_vma hi = (relocation & 0x0003f000) >> 12;
11307
0
    bfd_vma lo = (relocation & 0x00000ffe) >>  1;
11308
11309
0
    upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11310
0
    lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11311
0
  }
11312
11313
  /* Put the relocated value back in the object file:  */
11314
0
  bfd_put_16 (input_bfd, upper_insn, hit_data);
11315
0
  bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11316
11317
0
  return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11318
0
      }
11319
11320
0
    case R_ARM_THM_JUMP11:
11321
0
    case R_ARM_THM_JUMP8:
11322
0
    case R_ARM_THM_JUMP6:
11323
      /* Thumb B (branch) instruction).  */
11324
0
      {
11325
0
  bfd_signed_vma relocation;
11326
0
  bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11327
0
  bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11328
0
  bfd_signed_vma signed_check;
11329
11330
  /* CZB cannot jump backward.  */
11331
0
  if (r_type == R_ARM_THM_JUMP6)
11332
0
    {
11333
0
      reloc_signed_min = 0;
11334
0
      if (globals->use_rel)
11335
0
        signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
11336
0
    }
11337
11338
0
  relocation = value + signed_addend;
11339
11340
0
  relocation -= (input_section->output_section->vma
11341
0
           + input_section->output_offset
11342
0
           + rel->r_offset);
11343
11344
0
  relocation >>= howto->rightshift;
11345
0
  signed_check = relocation;
11346
11347
0
  if (r_type == R_ARM_THM_JUMP6)
11348
0
    relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11349
0
  else
11350
0
    relocation &= howto->dst_mask;
11351
0
  relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11352
11353
0
  bfd_put_16 (input_bfd, relocation, hit_data);
11354
11355
  /* Assumes two's complement.  */
11356
0
  if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11357
0
    return bfd_reloc_overflow;
11358
11359
0
  return bfd_reloc_ok;
11360
0
      }
11361
11362
0
    case R_ARM_ALU_PCREL7_0:
11363
0
    case R_ARM_ALU_PCREL15_8:
11364
0
    case R_ARM_ALU_PCREL23_15:
11365
0
      {
11366
0
  bfd_vma insn;
11367
0
  bfd_vma relocation;
11368
11369
0
  insn = bfd_get_32 (input_bfd, hit_data);
11370
0
  if (globals->use_rel)
11371
0
    {
11372
      /* Extract the addend.  */
11373
0
      addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11374
0
      signed_addend = addend;
11375
0
    }
11376
0
  relocation = value + signed_addend;
11377
11378
0
  relocation -= (input_section->output_section->vma
11379
0
           + input_section->output_offset
11380
0
           + rel->r_offset);
11381
0
  insn = (insn & ~0xfff)
11382
0
         | ((howto->bitpos << 7) & 0xf00)
11383
0
         | ((relocation >> howto->bitpos) & 0xff);
11384
0
  bfd_put_32 (input_bfd, value, hit_data);
11385
0
      }
11386
0
      return bfd_reloc_ok;
11387
11388
0
    case R_ARM_GNU_VTINHERIT:
11389
0
    case R_ARM_GNU_VTENTRY:
11390
0
      return bfd_reloc_ok;
11391
11392
0
    case R_ARM_GOTOFF32:
11393
      /* Relocation is relative to the start of the
11394
   global offset table.  */
11395
11396
0
      BFD_ASSERT (sgot != NULL);
11397
0
      if (sgot == NULL)
11398
0
  return bfd_reloc_notsupported;
11399
11400
      /* If we are addressing a Thumb function, we need to adjust the
11401
   address by one, so that attempts to call the function pointer will
11402
   correctly interpret it as Thumb code.  */
11403
0
      if (branch_type == ST_BRANCH_TO_THUMB)
11404
0
  value += 1;
11405
11406
      /* Note that sgot->output_offset is not involved in this
11407
   calculation.  We always want the start of .got.  If we
11408
   define _GLOBAL_OFFSET_TABLE in a different way, as is
11409
   permitted by the ABI, we might have to change this
11410
   calculation.  */
11411
0
      value -= sgot->output_section->vma;
11412
0
      return _bfd_final_link_relocate (howto, input_bfd, input_section,
11413
0
               contents, rel->r_offset, value,
11414
0
               rel->r_addend);
11415
11416
0
    case R_ARM_GOTPC:
11417
      /* Use global offset table as symbol value.  */
11418
0
      BFD_ASSERT (sgot != NULL);
11419
11420
0
      if (sgot == NULL)
11421
0
  return bfd_reloc_notsupported;
11422
11423
0
      *unresolved_reloc_p = false;
11424
0
      value = sgot->output_section->vma;
11425
0
      return _bfd_final_link_relocate (howto, input_bfd, input_section,
11426
0
               contents, rel->r_offset, value,
11427
0
               rel->r_addend);
11428
11429
0
    case R_ARM_GOT32:
11430
0
    case R_ARM_GOT_PREL:
11431
      /* Relocation is to the entry for this symbol in the
11432
   global offset table.  */
11433
0
      if (sgot == NULL)
11434
0
  return bfd_reloc_notsupported;
11435
11436
0
      if (dynreloc_st_type == STT_GNU_IFUNC
11437
0
    && plt_offset != (bfd_vma) -1
11438
0
    && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11439
0
  {
11440
    /* We have a relocation against a locally-binding STT_GNU_IFUNC
11441
       symbol, and the relocation resolves directly to the runtime
11442
       target rather than to the .iplt entry.  This means that any
11443
       .got entry would be the same value as the .igot.plt entry,
11444
       so there's no point creating both.  */
11445
0
    sgot = globals->root.igotplt;
11446
0
    value = sgot->output_offset + gotplt_offset;
11447
0
  }
11448
0
      else if (h != NULL)
11449
0
  {
11450
0
    bfd_vma off;
11451
11452
0
    off = h->got.offset;
11453
0
    BFD_ASSERT (off != (bfd_vma) -1);
11454
0
    if ((off & 1) != 0)
11455
0
      {
11456
        /* We have already processsed one GOT relocation against
11457
     this symbol.  */
11458
0
        off &= ~1;
11459
0
        if (globals->root.dynamic_sections_created
11460
0
      && !SYMBOL_REFERENCES_LOCAL (info, h))
11461
0
    *unresolved_reloc_p = false;
11462
0
      }
11463
0
    else
11464
0
      {
11465
0
        Elf_Internal_Rela outrel;
11466
0
        int isrofixup = 0;
11467
11468
0
        if (((h->dynindx != -1) || globals->fdpic_p)
11469
0
      && !SYMBOL_REFERENCES_LOCAL (info, h))
11470
0
    {
11471
      /* If the symbol doesn't resolve locally in a static
11472
         object, we have an undefined reference.  If the
11473
         symbol doesn't resolve locally in a dynamic object,
11474
         it should be resolved by the dynamic linker.  */
11475
0
      if (globals->root.dynamic_sections_created)
11476
0
        {
11477
0
          outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11478
0
          *unresolved_reloc_p = false;
11479
0
        }
11480
0
      else
11481
0
        outrel.r_info = 0;
11482
0
      outrel.r_addend = 0;
11483
0
    }
11484
0
        else
11485
0
    {
11486
0
      if (dynreloc_st_type == STT_GNU_IFUNC)
11487
0
        outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11488
0
      else if (bfd_link_pic (info)
11489
0
         && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
11490
0
        outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11491
0
      else
11492
0
        {
11493
0
          outrel.r_info = 0;
11494
0
          if (globals->fdpic_p)
11495
0
      isrofixup = 1;
11496
0
        }
11497
0
      outrel.r_addend = dynreloc_value;
11498
0
    }
11499
11500
        /* The GOT entry is initialized to zero by default.
11501
     See if we should install a different value.  */
11502
0
        if (outrel.r_addend != 0
11503
0
      && (globals->use_rel || outrel.r_info == 0))
11504
0
    {
11505
0
      bfd_put_32 (output_bfd, outrel.r_addend,
11506
0
            sgot->contents + off);
11507
0
      outrel.r_addend = 0;
11508
0
    }
11509
11510
0
        if (isrofixup)
11511
0
    arm_elf_add_rofixup (output_bfd,
11512
0
             elf32_arm_hash_table (info)->srofixup,
11513
0
             sgot->output_section->vma
11514
0
             + sgot->output_offset + off);
11515
11516
0
        else if (outrel.r_info != 0)
11517
0
    {
11518
0
      outrel.r_offset = (sgot->output_section->vma
11519
0
             + sgot->output_offset
11520
0
             + off);
11521
0
      elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11522
0
    }
11523
11524
0
        h->got.offset |= 1;
11525
0
      }
11526
0
    value = sgot->output_offset + off;
11527
0
  }
11528
0
      else
11529
0
  {
11530
0
    bfd_vma off;
11531
11532
0
    BFD_ASSERT (local_got_offsets != NULL
11533
0
          && local_got_offsets[r_symndx] != (bfd_vma) -1);
11534
11535
0
    off = local_got_offsets[r_symndx];
11536
11537
    /* The offset must always be a multiple of 4.  We use the
11538
       least significant bit to record whether we have already
11539
       generated the necessary reloc.  */
11540
0
    if ((off & 1) != 0)
11541
0
      off &= ~1;
11542
0
    else
11543
0
      {
11544
0
        Elf_Internal_Rela outrel;
11545
0
        int isrofixup = 0;
11546
11547
0
        if (dynreloc_st_type == STT_GNU_IFUNC)
11548
0
    outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11549
0
        else if (bfd_link_pic (info))
11550
0
    outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11551
0
        else
11552
0
    {
11553
0
      outrel.r_info = 0;
11554
0
      if (globals->fdpic_p)
11555
0
        isrofixup = 1;
11556
0
    }
11557
11558
        /* The GOT entry is initialized to zero by default.
11559
     See if we should install a different value.  */
11560
0
        if (globals->use_rel || outrel.r_info == 0)
11561
0
    bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11562
11563
0
        if (isrofixup)
11564
0
    arm_elf_add_rofixup (output_bfd,
11565
0
             globals->srofixup,
11566
0
             sgot->output_section->vma
11567
0
             + sgot->output_offset + off);
11568
11569
0
        else if (outrel.r_info != 0)
11570
0
    {
11571
0
      outrel.r_addend = addend + dynreloc_value;
11572
0
      outrel.r_offset = (sgot->output_section->vma
11573
0
             + sgot->output_offset
11574
0
             + off);
11575
0
      elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11576
0
    }
11577
11578
0
        local_got_offsets[r_symndx] |= 1;
11579
0
      }
11580
11581
0
    value = sgot->output_offset + off;
11582
0
  }
11583
0
      if (r_type != R_ARM_GOT32)
11584
0
  value += sgot->output_section->vma;
11585
11586
0
      return _bfd_final_link_relocate (howto, input_bfd, input_section,
11587
0
               contents, rel->r_offset, value,
11588
0
               rel->r_addend);
11589
11590
0
    case R_ARM_TLS_LDO32:
11591
0
      value = value - dtpoff_base (info);
11592
11593
0
      return _bfd_final_link_relocate (howto, input_bfd, input_section,
11594
0
               contents, rel->r_offset, value,
11595
0
               rel->r_addend);
11596
11597
0
    case R_ARM_TLS_LDM32:
11598
0
    case R_ARM_TLS_LDM32_FDPIC:
11599
0
      {
11600
0
  bfd_vma off;
11601
11602
0
  if (sgot == NULL)
11603
0
    abort ();
11604
11605
0
  off = globals->tls_ldm_got.offset;
11606
11607
0
  if ((off & 1) != 0)
11608
0
    off &= ~1;
11609
0
  else
11610
0
    {
11611
      /* If we don't know the module number, create a relocation
11612
         for it.  */
11613
0
      if (bfd_link_dll (info))
11614
0
        {
11615
0
    Elf_Internal_Rela outrel;
11616
11617
0
    if (srelgot == NULL)
11618
0
      abort ();
11619
11620
0
    outrel.r_addend = 0;
11621
0
    outrel.r_offset = (sgot->output_section->vma
11622
0
           + sgot->output_offset + off);
11623
0
    outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11624
11625
0
    if (globals->use_rel)
11626
0
      bfd_put_32 (output_bfd, outrel.r_addend,
11627
0
            sgot->contents + off);
11628
11629
0
    elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11630
0
        }
11631
0
      else
11632
0
        bfd_put_32 (output_bfd, 1, sgot->contents + off);
11633
11634
0
      globals->tls_ldm_got.offset |= 1;
11635
0
    }
11636
11637
0
  if (r_type == R_ARM_TLS_LDM32_FDPIC)
11638
0
    {
11639
0
      bfd_put_32 (output_bfd,
11640
0
      globals->root.sgot->output_offset + off,
11641
0
      contents + rel->r_offset);
11642
11643
0
      return bfd_reloc_ok;
11644
0
    }
11645
0
  else
11646
0
    {
11647
0
      value = sgot->output_section->vma + sgot->output_offset + off
11648
0
        - (input_section->output_section->vma
11649
0
     + input_section->output_offset + rel->r_offset);
11650
11651
0
      return _bfd_final_link_relocate (howto, input_bfd, input_section,
11652
0
               contents, rel->r_offset, value,
11653
0
               rel->r_addend);
11654
0
    }
11655
0
      }
11656
11657
0
    case R_ARM_TLS_CALL:
11658
0
    case R_ARM_THM_TLS_CALL:
11659
0
    case R_ARM_TLS_GD32:
11660
0
    case R_ARM_TLS_GD32_FDPIC:
11661
0
    case R_ARM_TLS_IE32:
11662
0
    case R_ARM_TLS_IE32_FDPIC:
11663
0
    case R_ARM_TLS_GOTDESC:
11664
0
    case R_ARM_TLS_DESCSEQ:
11665
0
    case R_ARM_THM_TLS_DESCSEQ:
11666
0
      {
11667
0
  bfd_vma off, offplt;
11668
0
  int indx = 0;
11669
0
  char tls_type;
11670
11671
0
  BFD_ASSERT (sgot != NULL);
11672
11673
0
  if (h != NULL)
11674
0
    {
11675
0
      bool dyn;
11676
0
      dyn = globals->root.dynamic_sections_created;
11677
0
      if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11678
0
             bfd_link_pic (info),
11679
0
             h)
11680
0
    && (!bfd_link_pic (info)
11681
0
        || !SYMBOL_REFERENCES_LOCAL (info, h)))
11682
0
        {
11683
0
    *unresolved_reloc_p = false;
11684
0
    indx = h->dynindx;
11685
0
        }
11686
0
      off = h->got.offset;
11687
0
      offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11688
0
      tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11689
0
    }
11690
0
  else
11691
0
    {
11692
0
      BFD_ASSERT (local_got_offsets != NULL);
11693
11694
0
      if (r_symndx >= elf32_arm_num_entries (input_bfd))
11695
0
        {
11696
0
    _bfd_error_handler (_("\
11697
0
%pB: expected symbol index in range 0..%lu but found local symbol with index %lu"),
11698
0
            input_bfd,
11699
0
            (unsigned long) elf32_arm_num_entries (input_bfd),
11700
0
            r_symndx);
11701
0
    return false;
11702
0
        }
11703
0
      off = local_got_offsets[r_symndx];
11704
0
      offplt = local_tlsdesc_gotents[r_symndx];
11705
0
      tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11706
0
    }
11707
11708
  /* Linker relaxations happens from one of the
11709
     R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE.  */
11710
0
  if (ELF32_R_TYPE (rel->r_info) != r_type)
11711
0
    tls_type = GOT_TLS_IE;
11712
11713
0
  BFD_ASSERT (tls_type != GOT_UNKNOWN);
11714
11715
0
  if ((off & 1) != 0)
11716
0
    off &= ~1;
11717
0
  else
11718
0
    {
11719
0
      bool need_relocs = false;
11720
0
      Elf_Internal_Rela outrel;
11721
0
      int cur_off = off;
11722
11723
      /* The GOT entries have not been initialized yet.  Do it
11724
         now, and emit any relocations.  If both an IE GOT and a
11725
         GD GOT are necessary, we emit the GD first.  */
11726
11727
0
      if ((bfd_link_dll (info) || indx != 0)
11728
0
    && (h == NULL
11729
0
        || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11730
0
      && !resolved_to_zero)
11731
0
        || h->root.type != bfd_link_hash_undefweak))
11732
0
        {
11733
0
    need_relocs = true;
11734
0
    BFD_ASSERT (srelgot != NULL);
11735
0
        }
11736
11737
0
      if (tls_type & GOT_TLS_GDESC)
11738
0
        {
11739
0
    bfd_byte *loc;
11740
11741
    /* We should have relaxed, unless this is an undefined
11742
       weak symbol.  */
11743
0
    BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11744
0
          || bfd_link_dll (info));
11745
0
    BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11746
0
          <= globals->root.sgotplt->size);
11747
11748
0
    outrel.r_addend = 0;
11749
0
    outrel.r_offset = (globals->root.sgotplt->output_section->vma
11750
0
           + globals->root.sgotplt->output_offset
11751
0
           + offplt
11752
0
           + globals->sgotplt_jump_table_size);
11753
11754
0
    outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11755
0
    sreloc = globals->root.srelplt;
11756
0
    loc = sreloc->contents;
11757
0
    loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11758
0
    BFD_ASSERT (loc + RELOC_SIZE (globals)
11759
0
         <= sreloc->contents + sreloc->size);
11760
11761
0
    SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11762
11763
    /* For globals, the first word in the relocation gets
11764
       the relocation index and the top bit set, or zero,
11765
       if we're binding now.  For locals, it gets the
11766
       symbol's offset in the tls section.  */
11767
0
    bfd_put_32 (output_bfd,
11768
0
          !h ? value - elf_hash_table (info)->tls_sec->vma
11769
0
          : info->flags & DF_BIND_NOW ? 0
11770
0
          : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11771
0
          globals->root.sgotplt->contents + offplt
11772
0
          + globals->sgotplt_jump_table_size);
11773
11774
    /* Second word in the relocation is always zero.  */
11775
0
    bfd_put_32 (output_bfd, 0,
11776
0
          globals->root.sgotplt->contents + offplt
11777
0
          + globals->sgotplt_jump_table_size + 4);
11778
0
        }
11779
0
      if (tls_type & GOT_TLS_GD)
11780
0
        {
11781
0
    if (need_relocs)
11782
0
      {
11783
0
        outrel.r_addend = 0;
11784
0
        outrel.r_offset = (sgot->output_section->vma
11785
0
               + sgot->output_offset
11786
0
               + cur_off);
11787
0
        outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11788
11789
0
        if (globals->use_rel)
11790
0
          bfd_put_32 (output_bfd, outrel.r_addend,
11791
0
          sgot->contents + cur_off);
11792
11793
0
        elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11794
11795
0
        if (indx == 0)
11796
0
          bfd_put_32 (output_bfd, value - dtpoff_base (info),
11797
0
          sgot->contents + cur_off + 4);
11798
0
        else
11799
0
          {
11800
0
      outrel.r_addend = 0;
11801
0
      outrel.r_info = ELF32_R_INFO (indx,
11802
0
                  R_ARM_TLS_DTPOFF32);
11803
0
      outrel.r_offset += 4;
11804
11805
0
      if (globals->use_rel)
11806
0
        bfd_put_32 (output_bfd, outrel.r_addend,
11807
0
              sgot->contents + cur_off + 4);
11808
11809
0
      elf32_arm_add_dynreloc (output_bfd, info,
11810
0
            srelgot, &outrel);
11811
0
          }
11812
0
      }
11813
0
    else
11814
0
      {
11815
        /* If we are not emitting relocations for a
11816
           general dynamic reference, then we must be in a
11817
           static link or an executable link with the
11818
           symbol binding locally.  Mark it as belonging
11819
           to module 1, the executable.  */
11820
0
        bfd_put_32 (output_bfd, 1,
11821
0
        sgot->contents + cur_off);
11822
0
        bfd_put_32 (output_bfd, value - dtpoff_base (info),
11823
0
        sgot->contents + cur_off + 4);
11824
0
      }
11825
11826
0
    cur_off += 8;
11827
0
        }
11828
11829
0
      if (tls_type & GOT_TLS_IE)
11830
0
        {
11831
0
    if (need_relocs)
11832
0
      {
11833
0
        if (indx == 0)
11834
0
          outrel.r_addend = value - dtpoff_base (info);
11835
0
        else
11836
0
          outrel.r_addend = 0;
11837
0
        outrel.r_offset = (sgot->output_section->vma
11838
0
               + sgot->output_offset
11839
0
               + cur_off);
11840
0
        outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11841
11842
0
        if (globals->use_rel)
11843
0
          bfd_put_32 (output_bfd, outrel.r_addend,
11844
0
          sgot->contents + cur_off);
11845
11846
0
        elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11847
0
      }
11848
0
    else
11849
0
      bfd_put_32 (output_bfd, tpoff (info, value),
11850
0
            sgot->contents + cur_off);
11851
0
    cur_off += 4;
11852
0
        }
11853
11854
0
      if (h != NULL)
11855
0
        h->got.offset |= 1;
11856
0
      else
11857
0
        local_got_offsets[r_symndx] |= 1;
11858
0
    }
11859
11860
0
  if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11861
0
    off += 8;
11862
0
  else if (tls_type & GOT_TLS_GDESC)
11863
0
    off = offplt;
11864
11865
0
  if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
11866
0
      || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL)
11867
0
    {
11868
0
      bfd_signed_vma offset;
11869
      /* TLS stubs are arm mode.  The original symbol is a
11870
         data object, so branch_type is bogus.  */
11871
0
      branch_type = ST_BRANCH_TO_ARM;
11872
0
      enum elf32_arm_stub_type stub_type
11873
0
        = arm_type_of_stub (info, input_section, rel,
11874
0
          st_type, &branch_type,
11875
0
          (struct elf32_arm_link_hash_entry *)h,
11876
0
          globals->tls_trampoline, globals->root.splt,
11877
0
          input_bfd, sym_name);
11878
11879
0
      if (stub_type != arm_stub_none)
11880
0
        {
11881
0
    struct elf32_arm_stub_hash_entry *stub_entry
11882
0
      = elf32_arm_get_stub_entry
11883
0
      (input_section, globals->root.splt, 0, rel,
11884
0
       globals, stub_type);
11885
0
    offset = (stub_entry->stub_offset
11886
0
        + stub_entry->stub_sec->output_offset
11887
0
        + stub_entry->stub_sec->output_section->vma);
11888
0
        }
11889
0
      else
11890
0
        offset = (globals->root.splt->output_section->vma
11891
0
      + globals->root.splt->output_offset
11892
0
      + globals->tls_trampoline);
11893
11894
0
      if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL)
11895
0
        {
11896
0
    unsigned long inst;
11897
11898
0
    offset -= (input_section->output_section->vma
11899
0
         + input_section->output_offset
11900
0
         + rel->r_offset + 8);
11901
11902
0
    inst = offset >> 2;
11903
0
    inst &= 0x00ffffff;
11904
0
    value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11905
0
        }
11906
0
      else
11907
0
        {
11908
    /* Thumb blx encodes the offset in a complicated
11909
       fashion.  */
11910
0
    unsigned upper_insn, lower_insn;
11911
0
    unsigned neg;
11912
11913
0
    offset -= (input_section->output_section->vma
11914
0
         + input_section->output_offset
11915
0
         + rel->r_offset + 4);
11916
11917
0
    if (stub_type != arm_stub_none
11918
0
        && arm_stub_is_thumb (stub_type))
11919
0
      {
11920
0
        lower_insn = 0xd000;
11921
0
      }
11922
0
    else
11923
0
      {
11924
0
        lower_insn = 0xc000;
11925
        /* Round up the offset to a word boundary.  */
11926
0
        offset = (offset + 2) & ~2;
11927
0
      }
11928
11929
0
    neg = offset < 0;
11930
0
    upper_insn = (0xf000
11931
0
            | ((offset >> 12) & 0x3ff)
11932
0
            | (neg << 10));
11933
0
    lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11934
0
            | (((!((offset >> 22) & 1)) ^ neg) << 11)
11935
0
            | ((offset >> 1) & 0x7ff);
11936
0
    bfd_put_16 (input_bfd, upper_insn, hit_data);
11937
0
    bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11938
0
    return bfd_reloc_ok;
11939
0
        }
11940
0
    }
11941
  /* These relocations needs special care, as besides the fact
11942
     they point somewhere in .gotplt, the addend must be
11943
     adjusted accordingly depending on the type of instruction
11944
     we refer to.  */
11945
0
  else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11946
0
    {
11947
0
      unsigned long data, insn;
11948
0
      unsigned thumb;
11949
11950
0
      data = bfd_get_signed_32 (input_bfd, hit_data);
11951
0
      thumb = data & 1;
11952
0
      data &= ~1ul;
11953
11954
0
      if (thumb)
11955
0
        {
11956
0
    insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11957
0
    if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11958
0
      insn = (insn << 16)
11959
0
        | bfd_get_16 (input_bfd,
11960
0
          contents + rel->r_offset - data + 2);
11961
0
    if ((insn & 0xf800c000) == 0xf000c000)
11962
      /* bl/blx */
11963
0
      value = -6;
11964
0
    else if ((insn & 0xffffff00) == 0x4400)
11965
      /* add */
11966
0
      value = -5;
11967
0
    else
11968
0
      {
11969
0
        _bfd_error_handler
11970
          /* xgettext:c-format */
11971
0
          (_("%pB(%pA+%#" PRIx64 "): "
11972
0
       "unexpected %s instruction '%#lx' "
11973
0
       "referenced by TLS_GOTDESC"),
11974
0
           input_bfd, input_section, (uint64_t) rel->r_offset,
11975
0
           "Thumb", insn);
11976
0
        return bfd_reloc_notsupported;
11977
0
      }
11978
0
        }
11979
0
      else
11980
0
        {
11981
0
    insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11982
11983
0
    switch (insn >> 24)
11984
0
      {
11985
0
      case 0xeb:  /* bl */
11986
0
      case 0xfa:  /* blx */
11987
0
        value = -4;
11988
0
        break;
11989
11990
0
      case 0xe0:  /* add */
11991
0
        value = -8;
11992
0
        break;
11993
11994
0
      default:
11995
0
        _bfd_error_handler
11996
          /* xgettext:c-format */
11997
0
          (_("%pB(%pA+%#" PRIx64 "): "
11998
0
       "unexpected %s instruction '%#lx' "
11999
0
       "referenced by TLS_GOTDESC"),
12000
0
           input_bfd, input_section, (uint64_t) rel->r_offset,
12001
0
           "ARM", insn);
12002
0
        return bfd_reloc_notsupported;
12003
0
      }
12004
0
        }
12005
12006
0
      value += ((globals->root.sgotplt->output_section->vma
12007
0
           + globals->root.sgotplt->output_offset + off)
12008
0
          - (input_section->output_section->vma
12009
0
       + input_section->output_offset
12010
0
       + rel->r_offset)
12011
0
          + globals->sgotplt_jump_table_size);
12012
0
    }
12013
0
  else
12014
0
    value = ((globals->root.sgot->output_section->vma
12015
0
        + globals->root.sgot->output_offset + off)
12016
0
       - (input_section->output_section->vma
12017
0
          + input_section->output_offset + rel->r_offset));
12018
12019
0
  if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12020
0
         r_type == R_ARM_TLS_IE32_FDPIC))
12021
0
    {
12022
      /* For FDPIC relocations, resolve to the offset of the GOT
12023
         entry from the start of GOT.  */
12024
0
      bfd_put_32 (output_bfd,
12025
0
      globals->root.sgot->output_offset + off,
12026
0
      contents + rel->r_offset);
12027
12028
0
      return bfd_reloc_ok;
12029
0
    }
12030
0
  else
12031
0
    {
12032
0
      return _bfd_final_link_relocate (howto, input_bfd, input_section,
12033
0
               contents, rel->r_offset, value,
12034
0
               rel->r_addend);
12035
0
    }
12036
0
      }
12037
12038
0
    case R_ARM_TLS_LE32:
12039
0
      if (bfd_link_dll (info))
12040
0
  {
12041
0
    _bfd_error_handler
12042
      /* xgettext:c-format */
12043
0
      (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12044
0
         "in shared object"),
12045
0
       input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12046
0
    return bfd_reloc_notsupported;
12047
0
  }
12048
0
      else
12049
0
  value = tpoff (info, value);
12050
12051
0
      return _bfd_final_link_relocate (howto, input_bfd, input_section,
12052
0
               contents, rel->r_offset, value,
12053
0
               rel->r_addend);
12054
12055
0
    case R_ARM_V4BX:
12056
0
      if (globals->fix_v4bx)
12057
0
  {
12058
0
    bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12059
12060
    /* Ensure that we have a BX instruction.  */
12061
0
    BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12062
12063
0
    if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12064
0
      {
12065
        /* Branch to veneer.  */
12066
0
        bfd_vma glue_addr;
12067
0
        glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12068
0
        glue_addr -= input_section->output_section->vma
12069
0
         + input_section->output_offset
12070
0
         + rel->r_offset + 8;
12071
0
        insn = (insn & 0xf0000000) | 0x0a000000
12072
0
         | ((glue_addr >> 2) & 0x00ffffff);
12073
0
      }
12074
0
    else
12075
0
      {
12076
        /* Preserve Rm (lowest four bits) and the condition code
12077
     (highest four bits). Other bits encode MOV PC,Rm.  */
12078
0
        insn = (insn & 0xf000000f) | 0x01a0f000;
12079
0
      }
12080
12081
0
    bfd_put_32 (input_bfd, insn, hit_data);
12082
0
  }
12083
0
      return bfd_reloc_ok;
12084
12085
0
    case R_ARM_MOVW_ABS_NC:
12086
0
    case R_ARM_MOVT_ABS:
12087
0
    case R_ARM_MOVW_PREL_NC:
12088
0
    case R_ARM_MOVT_PREL:
12089
    /* Until we properly support segment-base-relative addressing then
12090
       we assume the segment base to be zero, as for the group relocations.
12091
       Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12092
       and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS.  */
12093
0
    case R_ARM_MOVW_BREL_NC:
12094
0
    case R_ARM_MOVW_BREL:
12095
0
    case R_ARM_MOVT_BREL:
12096
0
      {
12097
0
  bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12098
12099
0
  if (globals->use_rel)
12100
0
    {
12101
0
      addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12102
0
      signed_addend = (addend ^ 0x8000) - 0x8000;
12103
0
    }
12104
12105
0
  value += signed_addend;
12106
12107
0
  if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12108
0
    value -= (input_section->output_section->vma
12109
0
        + input_section->output_offset + rel->r_offset);
12110
12111
0
  if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12112
0
    return bfd_reloc_overflow;
12113
12114
0
  if (branch_type == ST_BRANCH_TO_THUMB)
12115
0
    value |= 1;
12116
12117
0
  if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12118
0
      || r_type == R_ARM_MOVT_BREL)
12119
0
    value >>= 16;
12120
12121
0
  insn &= 0xfff0f000;
12122
0
  insn |= value & 0xfff;
12123
0
  insn |= (value & 0xf000) << 4;
12124
0
  bfd_put_32 (input_bfd, insn, hit_data);
12125
0
      }
12126
0
      return bfd_reloc_ok;
12127
12128
0
    case R_ARM_THM_MOVW_ABS_NC:
12129
0
    case R_ARM_THM_MOVT_ABS:
12130
0
    case R_ARM_THM_MOVW_PREL_NC:
12131
0
    case R_ARM_THM_MOVT_PREL:
12132
    /* Until we properly support segment-base-relative addressing then
12133
       we assume the segment base to be zero, as for the above relocations.
12134
       Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12135
       R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12136
       as R_ARM_THM_MOVT_ABS.  */
12137
0
    case R_ARM_THM_MOVW_BREL_NC:
12138
0
    case R_ARM_THM_MOVW_BREL:
12139
0
    case R_ARM_THM_MOVT_BREL:
12140
0
      {
12141
0
  bfd_vma insn;
12142
12143
0
  insn = bfd_get_16 (input_bfd, hit_data) << 16;
12144
0
  insn |= bfd_get_16 (input_bfd, hit_data + 2);
12145
12146
0
  if (globals->use_rel)
12147
0
    {
12148
0
      addend = ((insn >> 4)  & 0xf000)
12149
0
       | ((insn >> 15) & 0x0800)
12150
0
       | ((insn >> 4)  & 0x0700)
12151
0
       | (insn     & 0x00ff);
12152
0
      signed_addend = (addend ^ 0x8000) - 0x8000;
12153
0
    }
12154
12155
0
  value += signed_addend;
12156
12157
0
  if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12158
0
    value -= (input_section->output_section->vma
12159
0
        + input_section->output_offset + rel->r_offset);
12160
12161
0
  if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12162
0
    return bfd_reloc_overflow;
12163
12164
0
  if (branch_type == ST_BRANCH_TO_THUMB)
12165
0
    value |= 1;
12166
12167
0
  if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12168
0
      || r_type == R_ARM_THM_MOVT_BREL)
12169
0
    value >>= 16;
12170
12171
0
  insn &= 0xfbf08f00;
12172
0
  insn |= (value & 0xf000) << 4;
12173
0
  insn |= (value & 0x0800) << 15;
12174
0
  insn |= (value & 0x0700) << 4;
12175
0
  insn |= (value & 0x00ff);
12176
12177
0
  bfd_put_16 (input_bfd, insn >> 16, hit_data);
12178
0
  bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12179
0
      }
12180
0
      return bfd_reloc_ok;
12181
12182
0
    case R_ARM_ALU_PC_G0_NC:
12183
0
    case R_ARM_ALU_PC_G1_NC:
12184
0
    case R_ARM_ALU_PC_G0:
12185
0
    case R_ARM_ALU_PC_G1:
12186
0
    case R_ARM_ALU_PC_G2:
12187
0
    case R_ARM_ALU_SB_G0_NC:
12188
0
    case R_ARM_ALU_SB_G1_NC:
12189
0
    case R_ARM_ALU_SB_G0:
12190
0
    case R_ARM_ALU_SB_G1:
12191
0
    case R_ARM_ALU_SB_G2:
12192
0
      {
12193
0
  bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12194
0
  bfd_vma pc = input_section->output_section->vma
12195
0
         + input_section->output_offset + rel->r_offset;
12196
  /* sb is the origin of the *segment* containing the symbol.  */
12197
0
  bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12198
0
  bfd_vma residual;
12199
0
  bfd_vma g_n;
12200
0
  bfd_signed_vma signed_value;
12201
0
  int group = 0;
12202
12203
  /* Determine which group of bits to select.  */
12204
0
  switch (r_type)
12205
0
    {
12206
0
    case R_ARM_ALU_PC_G0_NC:
12207
0
    case R_ARM_ALU_PC_G0:
12208
0
    case R_ARM_ALU_SB_G0_NC:
12209
0
    case R_ARM_ALU_SB_G0:
12210
0
      group = 0;
12211
0
      break;
12212
12213
0
    case R_ARM_ALU_PC_G1_NC:
12214
0
    case R_ARM_ALU_PC_G1:
12215
0
    case R_ARM_ALU_SB_G1_NC:
12216
0
    case R_ARM_ALU_SB_G1:
12217
0
      group = 1;
12218
0
      break;
12219
12220
0
    case R_ARM_ALU_PC_G2:
12221
0
    case R_ARM_ALU_SB_G2:
12222
0
      group = 2;
12223
0
      break;
12224
12225
0
    default:
12226
0
      abort ();
12227
0
    }
12228
12229
  /* If REL, extract the addend from the insn.  If RELA, it will
12230
     have already been fetched for us.  */
12231
0
  if (globals->use_rel)
12232
0
    {
12233
0
      int negative;
12234
0
      bfd_vma constant = insn & 0xff;
12235
0
      bfd_vma rotation = (insn & 0xf00) >> 8;
12236
12237
0
      if (rotation == 0)
12238
0
        signed_addend = constant;
12239
0
      else
12240
0
        {
12241
    /* Compensate for the fact that in the instruction, the
12242
       rotation is stored in multiples of 2 bits.  */
12243
0
    rotation *= 2;
12244
12245
    /* Rotate "constant" right by "rotation" bits.  */
12246
0
    signed_addend = (constant >> rotation) |
12247
0
        (constant << (8 * sizeof (bfd_vma) - rotation));
12248
0
        }
12249
12250
      /* Determine if the instruction is an ADD or a SUB.
12251
         (For REL, this determines the sign of the addend.)  */
12252
0
      negative = identify_add_or_sub (insn);
12253
0
      if (negative == 0)
12254
0
        {
12255
0
    _bfd_error_handler
12256
      /* xgettext:c-format */
12257
0
      (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12258
0
         "are allowed for ALU group relocations"),
12259
0
      input_bfd, input_section, (uint64_t) rel->r_offset);
12260
0
    return bfd_reloc_overflow;
12261
0
        }
12262
12263
0
      signed_addend *= negative;
12264
0
    }
12265
12266
  /* Compute the value (X) to go in the place.  */
12267
0
  if (r_type == R_ARM_ALU_PC_G0_NC
12268
0
      || r_type == R_ARM_ALU_PC_G1_NC
12269
0
      || r_type == R_ARM_ALU_PC_G0
12270
0
      || r_type == R_ARM_ALU_PC_G1
12271
0
      || r_type == R_ARM_ALU_PC_G2)
12272
    /* PC relative.  */
12273
0
    signed_value = value - pc + signed_addend;
12274
0
  else
12275
    /* Section base relative.  */
12276
0
    signed_value = value - sb + signed_addend;
12277
12278
  /* If the target symbol is a Thumb function, then set the
12279
     Thumb bit in the address.  */
12280
0
  if (branch_type == ST_BRANCH_TO_THUMB)
12281
0
    signed_value |= 1;
12282
12283
  /* Calculate the value of the relevant G_n, in encoded
12284
     constant-with-rotation format.  */
12285
0
  g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12286
0
            group, &residual);
12287
12288
  /* Check for overflow if required.  */
12289
0
  if ((r_type == R_ARM_ALU_PC_G0
12290
0
       || r_type == R_ARM_ALU_PC_G1
12291
0
       || r_type == R_ARM_ALU_PC_G2
12292
0
       || r_type == R_ARM_ALU_SB_G0
12293
0
       || r_type == R_ARM_ALU_SB_G1
12294
0
       || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12295
0
    {
12296
0
      _bfd_error_handler
12297
        /* xgettext:c-format */
12298
0
        (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12299
0
     "splitting %#" PRIx64 " for group relocation %s"),
12300
0
         input_bfd, input_section, (uint64_t) rel->r_offset,
12301
0
         (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12302
0
         howto->name);
12303
0
      return bfd_reloc_overflow;
12304
0
    }
12305
12306
  /* Mask out the value and the ADD/SUB part of the opcode; take care
12307
     not to destroy the S bit.  */
12308
0
  insn &= 0xff1ff000;
12309
12310
  /* Set the opcode according to whether the value to go in the
12311
     place is negative.  */
12312
0
  if (signed_value < 0)
12313
0
    insn |= 1 << 22;
12314
0
  else
12315
0
    insn |= 1 << 23;
12316
12317
  /* Encode the offset.  */
12318
0
  insn |= g_n;
12319
12320
0
  bfd_put_32 (input_bfd, insn, hit_data);
12321
0
      }
12322
0
      return bfd_reloc_ok;
12323
12324
0
    case R_ARM_LDR_PC_G0:
12325
0
    case R_ARM_LDR_PC_G1:
12326
0
    case R_ARM_LDR_PC_G2:
12327
0
    case R_ARM_LDR_SB_G0:
12328
0
    case R_ARM_LDR_SB_G1:
12329
0
    case R_ARM_LDR_SB_G2:
12330
0
      {
12331
0
  bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12332
0
  bfd_vma pc = input_section->output_section->vma
12333
0
         + input_section->output_offset + rel->r_offset;
12334
  /* sb is the origin of the *segment* containing the symbol.  */
12335
0
  bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12336
0
  bfd_vma residual;
12337
0
  bfd_signed_vma signed_value;
12338
0
  int group = 0;
12339
12340
  /* Determine which groups of bits to calculate.  */
12341
0
  switch (r_type)
12342
0
    {
12343
0
    case R_ARM_LDR_PC_G0:
12344
0
    case R_ARM_LDR_SB_G0:
12345
0
      group = 0;
12346
0
      break;
12347
12348
0
    case R_ARM_LDR_PC_G1:
12349
0
    case R_ARM_LDR_SB_G1:
12350
0
      group = 1;
12351
0
      break;
12352
12353
0
    case R_ARM_LDR_PC_G2:
12354
0
    case R_ARM_LDR_SB_G2:
12355
0
      group = 2;
12356
0
      break;
12357
12358
0
    default:
12359
0
      abort ();
12360
0
    }
12361
12362
  /* If REL, extract the addend from the insn.  If RELA, it will
12363
     have already been fetched for us.  */
12364
0
  if (globals->use_rel)
12365
0
    {
12366
0
      int negative = (insn & (1 << 23)) ? 1 : -1;
12367
0
      signed_addend = negative * (insn & 0xfff);
12368
0
    }
12369
12370
  /* Compute the value (X) to go in the place.  */
12371
0
  if (r_type == R_ARM_LDR_PC_G0
12372
0
      || r_type == R_ARM_LDR_PC_G1
12373
0
      || r_type == R_ARM_LDR_PC_G2)
12374
    /* PC relative.  */
12375
0
    signed_value = value - pc + signed_addend;
12376
0
  else
12377
    /* Section base relative.  */
12378
0
    signed_value = value - sb + signed_addend;
12379
12380
  /* Calculate the value of the relevant G_{n-1} to obtain
12381
     the residual at that stage.  */
12382
0
  calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12383
0
            group - 1, &residual);
12384
12385
  /* Check for overflow.  */
12386
0
  if (residual >= 0x1000)
12387
0
    {
12388
0
      _bfd_error_handler
12389
        /* xgettext:c-format */
12390
0
        (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12391
0
     "splitting %#" PRIx64 " for group relocation %s"),
12392
0
         input_bfd, input_section, (uint64_t) rel->r_offset,
12393
0
         (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12394
0
         howto->name);
12395
0
      return bfd_reloc_overflow;
12396
0
    }
12397
12398
  /* Mask out the value and U bit.  */
12399
0
  insn &= 0xff7ff000;
12400
12401
  /* Set the U bit if the value to go in the place is non-negative.  */
12402
0
  if (signed_value >= 0)
12403
0
    insn |= 1 << 23;
12404
12405
  /* Encode the offset.  */
12406
0
  insn |= residual;
12407
12408
0
  bfd_put_32 (input_bfd, insn, hit_data);
12409
0
      }
12410
0
      return bfd_reloc_ok;
12411
12412
0
    case R_ARM_LDRS_PC_G0:
12413
0
    case R_ARM_LDRS_PC_G1:
12414
0
    case R_ARM_LDRS_PC_G2:
12415
0
    case R_ARM_LDRS_SB_G0:
12416
0
    case R_ARM_LDRS_SB_G1:
12417
0
    case R_ARM_LDRS_SB_G2:
12418
0
      {
12419
0
  bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12420
0
  bfd_vma pc = input_section->output_section->vma
12421
0
         + input_section->output_offset + rel->r_offset;
12422
  /* sb is the origin of the *segment* containing the symbol.  */
12423
0
  bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12424
0
  bfd_vma residual;
12425
0
  bfd_signed_vma signed_value;
12426
0
  int group = 0;
12427
12428
  /* Determine which groups of bits to calculate.  */
12429
0
  switch (r_type)
12430
0
    {
12431
0
    case R_ARM_LDRS_PC_G0:
12432
0
    case R_ARM_LDRS_SB_G0:
12433
0
      group = 0;
12434
0
      break;
12435
12436
0
    case R_ARM_LDRS_PC_G1:
12437
0
    case R_ARM_LDRS_SB_G1:
12438
0
      group = 1;
12439
0
      break;
12440
12441
0
    case R_ARM_LDRS_PC_G2:
12442
0
    case R_ARM_LDRS_SB_G2:
12443
0
      group = 2;
12444
0
      break;
12445
12446
0
    default:
12447
0
      abort ();
12448
0
    }
12449
12450
  /* If REL, extract the addend from the insn.  If RELA, it will
12451
     have already been fetched for us.  */
12452
0
  if (globals->use_rel)
12453
0
    {
12454
0
      int negative = (insn & (1 << 23)) ? 1 : -1;
12455
0
      signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12456
0
    }
12457
12458
  /* Compute the value (X) to go in the place.  */
12459
0
  if (r_type == R_ARM_LDRS_PC_G0
12460
0
      || r_type == R_ARM_LDRS_PC_G1
12461
0
      || r_type == R_ARM_LDRS_PC_G2)
12462
    /* PC relative.  */
12463
0
    signed_value = value - pc + signed_addend;
12464
0
  else
12465
    /* Section base relative.  */
12466
0
    signed_value = value - sb + signed_addend;
12467
12468
  /* Calculate the value of the relevant G_{n-1} to obtain
12469
     the residual at that stage.  */
12470
0
  calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12471
0
            group - 1, &residual);
12472
12473
  /* Check for overflow.  */
12474
0
  if (residual >= 0x100)
12475
0
    {
12476
0
      _bfd_error_handler
12477
        /* xgettext:c-format */
12478
0
        (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12479
0
     "splitting %#" PRIx64 " for group relocation %s"),
12480
0
         input_bfd, input_section, (uint64_t) rel->r_offset,
12481
0
         (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12482
0
         howto->name);
12483
0
      return bfd_reloc_overflow;
12484
0
    }
12485
12486
  /* Mask out the value and U bit.  */
12487
0
  insn &= 0xff7ff0f0;
12488
12489
  /* Set the U bit if the value to go in the place is non-negative.  */
12490
0
  if (signed_value >= 0)
12491
0
    insn |= 1 << 23;
12492
12493
  /* Encode the offset.  */
12494
0
  insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12495
12496
0
  bfd_put_32 (input_bfd, insn, hit_data);
12497
0
      }
12498
0
      return bfd_reloc_ok;
12499
12500
0
    case R_ARM_LDC_PC_G0:
12501
0
    case R_ARM_LDC_PC_G1:
12502
0
    case R_ARM_LDC_PC_G2:
12503
0
    case R_ARM_LDC_SB_G0:
12504
0
    case R_ARM_LDC_SB_G1:
12505
0
    case R_ARM_LDC_SB_G2:
12506
0
      {
12507
0
  bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12508
0
  bfd_vma pc = input_section->output_section->vma
12509
0
         + input_section->output_offset + rel->r_offset;
12510
  /* sb is the origin of the *segment* containing the symbol.  */
12511
0
  bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12512
0
  bfd_vma residual;
12513
0
  bfd_signed_vma signed_value;
12514
0
  int group = 0;
12515
12516
  /* Determine which groups of bits to calculate.  */
12517
0
  switch (r_type)
12518
0
    {
12519
0
    case R_ARM_LDC_PC_G0:
12520
0
    case R_ARM_LDC_SB_G0:
12521
0
      group = 0;
12522
0
      break;
12523
12524
0
    case R_ARM_LDC_PC_G1:
12525
0
    case R_ARM_LDC_SB_G1:
12526
0
      group = 1;
12527
0
      break;
12528
12529
0
    case R_ARM_LDC_PC_G2:
12530
0
    case R_ARM_LDC_SB_G2:
12531
0
      group = 2;
12532
0
      break;
12533
12534
0
    default:
12535
0
      abort ();
12536
0
    }
12537
12538
  /* If REL, extract the addend from the insn.  If RELA, it will
12539
     have already been fetched for us.  */
12540
0
  if (globals->use_rel)
12541
0
    {
12542
0
      int negative = (insn & (1 << 23)) ? 1 : -1;
12543
0
      signed_addend = negative * ((insn & 0xff) << 2);
12544
0
    }
12545
12546
  /* Compute the value (X) to go in the place.  */
12547
0
  if (r_type == R_ARM_LDC_PC_G0
12548
0
      || r_type == R_ARM_LDC_PC_G1
12549
0
      || r_type == R_ARM_LDC_PC_G2)
12550
    /* PC relative.  */
12551
0
    signed_value = value - pc + signed_addend;
12552
0
  else
12553
    /* Section base relative.  */
12554
0
    signed_value = value - sb + signed_addend;
12555
12556
  /* Calculate the value of the relevant G_{n-1} to obtain
12557
     the residual at that stage.  */
12558
0
  calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12559
0
            group - 1, &residual);
12560
12561
  /* Check for overflow.  (The absolute value to go in the place must be
12562
     divisible by four and, after having been divided by four, must
12563
     fit in eight bits.)  */
12564
0
  if ((residual & 0x3) != 0 || residual >= 0x400)
12565
0
    {
12566
0
      _bfd_error_handler
12567
        /* xgettext:c-format */
12568
0
        (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12569
0
     "splitting %#" PRIx64 " for group relocation %s"),
12570
0
         input_bfd, input_section, (uint64_t) rel->r_offset,
12571
0
         (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12572
0
         howto->name);
12573
0
      return bfd_reloc_overflow;
12574
0
    }
12575
12576
  /* Mask out the value and U bit.  */
12577
0
  insn &= 0xff7fff00;
12578
12579
  /* Set the U bit if the value to go in the place is non-negative.  */
12580
0
  if (signed_value >= 0)
12581
0
    insn |= 1 << 23;
12582
12583
  /* Encode the offset.  */
12584
0
  insn |= residual >> 2;
12585
12586
0
  bfd_put_32 (input_bfd, insn, hit_data);
12587
0
      }
12588
0
      return bfd_reloc_ok;
12589
12590
0
    case R_ARM_THM_ALU_ABS_G0_NC:
12591
0
    case R_ARM_THM_ALU_ABS_G1_NC:
12592
0
    case R_ARM_THM_ALU_ABS_G2_NC:
12593
0
    case R_ARM_THM_ALU_ABS_G3_NC:
12594
0
  {
12595
0
      const int shift_array[4] = {0, 8, 16, 24};
12596
0
      bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12597
0
      bfd_vma addr = value;
12598
0
      int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12599
12600
      /* Compute address.  */
12601
0
      if (globals->use_rel)
12602
0
    signed_addend = insn & 0xff;
12603
0
      addr += signed_addend;
12604
0
      if (branch_type == ST_BRANCH_TO_THUMB)
12605
0
    addr |= 1;
12606
      /* Clean imm8 insn.  */
12607
0
      insn &= 0xff00;
12608
      /* And update with correct part of address.  */
12609
0
      insn |= (addr >> shift) & 0xff;
12610
      /* Update insn.  */
12611
0
      bfd_put_16 (input_bfd, insn, hit_data);
12612
0
  }
12613
12614
0
  *unresolved_reloc_p = false;
12615
0
  return bfd_reloc_ok;
12616
12617
0
    case R_ARM_GOTOFFFUNCDESC:
12618
0
      {
12619
0
  if (h == NULL)
12620
0
    {
12621
0
      struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12622
0
      int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12623
12624
0
      if (r_symndx >= elf32_arm_num_entries (input_bfd))
12625
0
        {
12626
0
    * error_message = _("local symbol index too big");
12627
0
    return bfd_reloc_dangerous;
12628
0
        }
12629
12630
0
      int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12631
0
      bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12632
0
      bfd_vma seg = -1;
12633
12634
0
      if (bfd_link_pic (info) && dynindx == 0)
12635
0
        {
12636
0
    * error_message = _("no dynamic index information available");
12637
0
    return bfd_reloc_dangerous;
12638
0
        }
12639
12640
      /* Resolve relocation.  */
12641
0
      bfd_put_32 (output_bfd, (offset + sgot->output_offset)
12642
0
           , contents + rel->r_offset);
12643
      /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12644
         not done yet.  */
12645
0
      arm_elf_fill_funcdesc (output_bfd, info,
12646
0
           &local_fdpic_cnts[r_symndx].funcdesc_offset,
12647
0
           dynindx, offset, addr, dynreloc_value, seg);
12648
0
    }
12649
0
  else
12650
0
    {
12651
0
      int dynindx;
12652
0
      int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12653
0
      bfd_vma addr;
12654
0
      bfd_vma seg = -1;
12655
12656
      /* For static binaries, sym_sec can be null.  */
12657
0
      if (sym_sec)
12658
0
        {
12659
0
    dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12660
0
    addr = dynreloc_value - sym_sec->output_section->vma;
12661
0
        }
12662
0
      else
12663
0
        {
12664
0
    dynindx = 0;
12665
0
    addr = 0;
12666
0
        }
12667
12668
0
      if (bfd_link_pic (info) && dynindx == 0)
12669
0
        {
12670
0
    * error_message = _("no dynamic index information available");
12671
0
    return bfd_reloc_dangerous;
12672
0
        }
12673
12674
      /* This case cannot occur since funcdesc is allocated by
12675
         the dynamic loader so we cannot resolve the relocation.  */
12676
0
      if (h->dynindx != -1)
12677
0
        {
12678
0
    * error_message = _("invalid dynamic index");
12679
0
    return bfd_reloc_dangerous;
12680
0
        }
12681
12682
      /* Resolve relocation.  */
12683
0
      bfd_put_32 (output_bfd, (offset + sgot->output_offset),
12684
0
            contents + rel->r_offset);
12685
      /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
12686
0
      arm_elf_fill_funcdesc (output_bfd, info,
12687
0
           &eh->fdpic_cnts.funcdesc_offset,
12688
0
           dynindx, offset, addr, dynreloc_value, seg);
12689
0
    }
12690
0
      }
12691
0
      *unresolved_reloc_p = false;
12692
0
      return bfd_reloc_ok;
12693
12694
0
    case R_ARM_GOTFUNCDESC:
12695
0
      {
12696
0
  if (h != NULL)
12697
0
    {
12698
0
      Elf_Internal_Rela outrel;
12699
12700
      /* Resolve relocation.  */
12701
0
      bfd_put_32 (output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12702
0
             + sgot->output_offset),
12703
0
      contents + rel->r_offset);
12704
      /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE.  */
12705
0
      if (h->dynindx == -1)
12706
0
        {
12707
0
    int dynindx;
12708
0
    int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12709
0
    bfd_vma addr;
12710
0
    bfd_vma seg = -1;
12711
12712
    /* For static binaries sym_sec can be null.  */
12713
0
    if (sym_sec)
12714
0
      {
12715
0
        dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12716
0
        addr = dynreloc_value - sym_sec->output_section->vma;
12717
0
      }
12718
0
    else
12719
0
      {
12720
0
        dynindx = 0;
12721
0
        addr = 0;
12722
0
      }
12723
12724
    /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
12725
0
    arm_elf_fill_funcdesc (output_bfd, info,
12726
0
               &eh->fdpic_cnts.funcdesc_offset,
12727
0
               dynindx, offset, addr, dynreloc_value, seg);
12728
0
        }
12729
12730
      /* Add a dynamic relocation on GOT entry if not already done.  */
12731
0
      if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12732
0
        {
12733
0
    if (h->dynindx == -1)
12734
0
      {
12735
0
        outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12736
0
        if (h->root.type == bfd_link_hash_undefweak)
12737
0
          bfd_put_32 (output_bfd, 0, sgot->contents
12738
0
          + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12739
0
        else
12740
0
          bfd_put_32 (output_bfd, sgot->output_section->vma
12741
0
          + sgot->output_offset
12742
0
          + (eh->fdpic_cnts.funcdesc_offset & ~1),
12743
0
          sgot->contents
12744
0
          + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12745
0
      }
12746
0
    else
12747
0
      {
12748
0
        outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12749
0
      }
12750
0
    outrel.r_offset = sgot->output_section->vma
12751
0
      + sgot->output_offset
12752
0
      + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12753
0
    outrel.r_addend = 0;
12754
0
    if (h->dynindx == -1 && !bfd_link_pic (info))
12755
0
      if (h->root.type == bfd_link_hash_undefweak)
12756
0
        arm_elf_add_rofixup (output_bfd, globals->srofixup, -1);
12757
0
      else
12758
0
        arm_elf_add_rofixup (output_bfd, globals->srofixup,
12759
0
           outrel.r_offset);
12760
0
    else
12761
0
      elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12762
0
    eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12763
0
        }
12764
0
    }
12765
0
  else
12766
0
    {
12767
      /* Such relocation on static function should not have been
12768
         emitted by the compiler.  */
12769
0
      return bfd_reloc_notsupported;
12770
0
    }
12771
0
      }
12772
0
      *unresolved_reloc_p = false;
12773
0
      return bfd_reloc_ok;
12774
12775
0
    case R_ARM_FUNCDESC:
12776
0
      {
12777
0
  if (h == NULL)
12778
0
    {
12779
0
      struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
12780
0
      Elf_Internal_Rela outrel;
12781
0
      int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12782
12783
0
      if (r_symndx >= elf32_arm_num_entries (input_bfd))
12784
0
        {
12785
0
    * error_message = _("local symbol index too big");
12786
0
    return bfd_reloc_dangerous;
12787
0
        }
12788
12789
0
      int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12790
0
      bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12791
0
      bfd_vma seg = -1;
12792
12793
0
      if (bfd_link_pic (info) && dynindx == 0)
12794
0
        {
12795
0
    * error_message = _("dynamic index information not available");
12796
0
    return bfd_reloc_dangerous;
12797
0
        }
12798
12799
      /* Replace static FUNCDESC relocation with a
12800
         R_ARM_RELATIVE dynamic relocation or with a rofixup for
12801
         executable.  */
12802
0
      outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12803
0
      outrel.r_offset = input_section->output_section->vma
12804
0
        + input_section->output_offset + rel->r_offset;
12805
0
      outrel.r_addend = 0;
12806
0
      if (bfd_link_pic (info))
12807
0
        elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12808
0
      else
12809
0
        arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12810
12811
0
      bfd_put_32 (input_bfd, sgot->output_section->vma
12812
0
      + sgot->output_offset + offset, hit_data);
12813
12814
      /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
12815
0
      arm_elf_fill_funcdesc (output_bfd, info,
12816
0
           &local_fdpic_cnts[r_symndx].funcdesc_offset,
12817
0
           dynindx, offset, addr, dynreloc_value, seg);
12818
0
    }
12819
0
  else
12820
0
    {
12821
0
      if (h->dynindx == -1)
12822
0
        {
12823
0
    int dynindx;
12824
0
    int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12825
0
    bfd_vma addr;
12826
0
    bfd_vma seg = -1;
12827
0
    Elf_Internal_Rela outrel;
12828
12829
    /* For static binaries sym_sec can be null.  */
12830
0
    if (sym_sec)
12831
0
      {
12832
0
        dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12833
0
        addr = dynreloc_value - sym_sec->output_section->vma;
12834
0
      }
12835
0
    else
12836
0
      {
12837
0
        dynindx = 0;
12838
0
        addr = 0;
12839
0
      }
12840
12841
0
    if (bfd_link_pic (info) && dynindx == 0)
12842
0
      abort ();
12843
12844
    /* Replace static FUNCDESC relocation with a
12845
       R_ARM_RELATIVE dynamic relocation.  */
12846
0
    outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12847
0
    outrel.r_offset = input_section->output_section->vma
12848
0
      + input_section->output_offset + rel->r_offset;
12849
0
    outrel.r_addend = 0;
12850
0
    if (bfd_link_pic (info))
12851
0
      elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12852
0
    else
12853
0
      arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
12854
12855
0
    bfd_put_32 (input_bfd, sgot->output_section->vma
12856
0
          + sgot->output_offset + offset, hit_data);
12857
12858
    /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
12859
0
    arm_elf_fill_funcdesc (output_bfd, info,
12860
0
               &eh->fdpic_cnts.funcdesc_offset,
12861
0
               dynindx, offset, addr, dynreloc_value, seg);
12862
0
        }
12863
0
      else
12864
0
        {
12865
0
    Elf_Internal_Rela outrel;
12866
12867
    /* Add a dynamic relocation.  */
12868
0
    outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12869
0
    outrel.r_offset = input_section->output_section->vma
12870
0
      + input_section->output_offset + rel->r_offset;
12871
0
    outrel.r_addend = 0;
12872
0
    elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12873
0
        }
12874
0
    }
12875
0
      }
12876
0
      *unresolved_reloc_p = false;
12877
0
      return bfd_reloc_ok;
12878
12879
0
    case R_ARM_THM_BF16:
12880
0
      {
12881
0
  bfd_vma relocation;
12882
0
  bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12883
0
  bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12884
12885
0
  if (globals->use_rel)
12886
0
    {
12887
0
      bfd_vma immA  = (upper_insn & 0x001f);
12888
0
      bfd_vma immB  = (lower_insn & 0x07fe) >> 1;
12889
0
      bfd_vma immC  = (lower_insn & 0x0800) >> 11;
12890
0
      addend  = (immA << 12);
12891
0
      addend |= (immB << 2);
12892
0
      addend |= (immC << 1);
12893
0
      addend |= 1;
12894
      /* Sign extend.  */
12895
0
      signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12896
0
    }
12897
12898
0
  relocation  = value + signed_addend;
12899
0
  relocation -= (input_section->output_section->vma
12900
0
           + input_section->output_offset
12901
0
           + rel->r_offset);
12902
12903
  /* Put RELOCATION back into the insn.  */
12904
0
  {
12905
0
    bfd_vma immA = (relocation & 0x0001f000) >> 12;
12906
0
    bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12907
0
    bfd_vma immC = (relocation & 0x00000002) >> 1;
12908
12909
0
    upper_insn = (upper_insn & 0xffe0) | immA;
12910
0
    lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12911
0
  }
12912
12913
  /* Put the relocated value back in the object file:  */
12914
0
  bfd_put_16 (input_bfd, upper_insn, hit_data);
12915
0
  bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12916
12917
0
  return bfd_reloc_ok;
12918
0
      }
12919
12920
0
    case R_ARM_THM_BF12:
12921
0
      {
12922
0
  bfd_vma relocation;
12923
0
  bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12924
0
  bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12925
12926
0
  if (globals->use_rel)
12927
0
    {
12928
0
      bfd_vma immA  = (upper_insn & 0x0001);
12929
0
      bfd_vma immB  = (lower_insn & 0x07fe) >> 1;
12930
0
      bfd_vma immC  = (lower_insn & 0x0800) >> 11;
12931
0
      addend  = (immA << 12);
12932
0
      addend |= (immB << 2);
12933
0
      addend |= (immC << 1);
12934
0
      addend |= 1;
12935
      /* Sign extend.  */
12936
0
      addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
12937
0
      signed_addend = addend;
12938
0
    }
12939
12940
0
  relocation  = value + signed_addend;
12941
0
  relocation -= (input_section->output_section->vma
12942
0
           + input_section->output_offset
12943
0
           + rel->r_offset);
12944
12945
  /* Put RELOCATION back into the insn.  */
12946
0
  {
12947
0
    bfd_vma immA = (relocation & 0x00001000) >> 12;
12948
0
    bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12949
0
    bfd_vma immC = (relocation & 0x00000002) >> 1;
12950
12951
0
    upper_insn = (upper_insn & 0xfffe) | immA;
12952
0
    lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12953
0
  }
12954
12955
  /* Put the relocated value back in the object file:  */
12956
0
  bfd_put_16 (input_bfd, upper_insn, hit_data);
12957
0
  bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12958
12959
0
  return bfd_reloc_ok;
12960
0
      }
12961
12962
0
    case R_ARM_THM_BF18:
12963
0
      {
12964
0
  bfd_vma relocation;
12965
0
  bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12966
0
  bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12967
12968
0
  if (globals->use_rel)
12969
0
    {
12970
0
      bfd_vma immA  = (upper_insn & 0x007f);
12971
0
      bfd_vma immB  = (lower_insn & 0x07fe) >> 1;
12972
0
      bfd_vma immC  = (lower_insn & 0x0800) >> 11;
12973
0
      addend  = (immA << 12);
12974
0
      addend |= (immB << 2);
12975
0
      addend |= (immC << 1);
12976
0
      addend |= 1;
12977
      /* Sign extend.  */
12978
0
      addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
12979
0
      signed_addend = addend;
12980
0
    }
12981
12982
0
  relocation  = value + signed_addend;
12983
0
  relocation -= (input_section->output_section->vma
12984
0
           + input_section->output_offset
12985
0
           + rel->r_offset);
12986
12987
  /* Put RELOCATION back into the insn.  */
12988
0
  {
12989
0
    bfd_vma immA = (relocation & 0x0007f000) >> 12;
12990
0
    bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12991
0
    bfd_vma immC = (relocation & 0x00000002) >> 1;
12992
12993
0
    upper_insn = (upper_insn & 0xff80) | immA;
12994
0
    lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12995
0
  }
12996
12997
  /* Put the relocated value back in the object file:  */
12998
0
  bfd_put_16 (input_bfd, upper_insn, hit_data);
12999
0
  bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13000
13001
0
  return bfd_reloc_ok;
13002
0
      }
13003
13004
0
    default:
13005
0
      return bfd_reloc_notsupported;
13006
0
    }
13007
0
}
13008
13009
/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS.  */
13010
static void
13011
arm_add_to_rel (bfd *      abfd,
13012
    bfd_byte *     address,
13013
    reloc_howto_type * howto,
13014
    bfd_signed_vma     increment)
13015
0
{
13016
0
  bfd_signed_vma addend;
13017
13018
0
  if (howto->type == R_ARM_THM_CALL
13019
0
      || howto->type == R_ARM_THM_JUMP24)
13020
0
    {
13021
0
      int upper_insn, lower_insn;
13022
0
      int upper, lower;
13023
13024
0
      upper_insn = bfd_get_16 (abfd, address);
13025
0
      lower_insn = bfd_get_16 (abfd, address + 2);
13026
0
      upper = upper_insn & 0x7ff;
13027
0
      lower = lower_insn & 0x7ff;
13028
13029
0
      addend = (upper << 12) | (lower << 1);
13030
0
      addend += increment;
13031
0
      addend >>= 1;
13032
13033
0
      upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13034
0
      lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13035
13036
0
      bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13037
0
      bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13038
0
    }
13039
0
  else
13040
0
    {
13041
0
      bfd_vma      contents;
13042
13043
0
      contents = bfd_get_32 (abfd, address);
13044
13045
      /* Get the (signed) value from the instruction.  */
13046
0
      addend = contents & howto->src_mask;
13047
0
      if (addend & ((howto->src_mask + 1) >> 1))
13048
0
  {
13049
0
    bfd_signed_vma mask;
13050
13051
0
    mask = -1;
13052
0
    mask &= ~ howto->src_mask;
13053
0
    addend |= mask;
13054
0
  }
13055
13056
      /* Add in the increment, (which is a byte value).  */
13057
0
      switch (howto->type)
13058
0
  {
13059
0
  default:
13060
0
    addend += increment;
13061
0
    break;
13062
13063
0
  case R_ARM_PC24:
13064
0
  case R_ARM_PLT32:
13065
0
  case R_ARM_CALL:
13066
0
  case R_ARM_JUMP24:
13067
0
    addend *= bfd_get_reloc_size (howto);
13068
0
    addend += increment;
13069
13070
    /* Should we check for overflow here ?  */
13071
13072
    /* Drop any undesired bits.  */
13073
0
    addend >>= howto->rightshift;
13074
0
    break;
13075
0
  }
13076
13077
0
      contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13078
13079
0
      bfd_put_32 (abfd, contents, address);
13080
0
    }
13081
0
}
13082
13083
#define IS_ARM_TLS_RELOC(R_TYPE)  \
13084
0
  ((R_TYPE) == R_ARM_TLS_GD32    \
13085
0
   || (R_TYPE) == R_ARM_TLS_GD32_FDPIC  \
13086
0
   || (R_TYPE) == R_ARM_TLS_LDO32  \
13087
0
   || (R_TYPE) == R_ARM_TLS_LDM32  \
13088
0
   || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC  \
13089
0
   || (R_TYPE) == R_ARM_TLS_DTPOFF32  \
13090
0
   || (R_TYPE) == R_ARM_TLS_DTPMOD32  \
13091
0
   || (R_TYPE) == R_ARM_TLS_TPOFF32  \
13092
0
   || (R_TYPE) == R_ARM_TLS_LE32  \
13093
0
   || (R_TYPE) == R_ARM_TLS_IE32  \
13094
0
   || (R_TYPE) == R_ARM_TLS_IE32_FDPIC  \
13095
0
   || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13096
13097
/* Specific set of relocations for the gnu tls dialect.  */
13098
#define IS_ARM_TLS_GNU_RELOC(R_TYPE)  \
13099
0
  ((R_TYPE) == R_ARM_TLS_GOTDESC  \
13100
0
   || (R_TYPE) == R_ARM_TLS_CALL  \
13101
0
   || (R_TYPE) == R_ARM_THM_TLS_CALL  \
13102
0
   || (R_TYPE) == R_ARM_TLS_DESCSEQ  \
13103
0
   || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13104
13105
/* Relocate an ARM ELF section.  */
13106
13107
static int
13108
elf32_arm_relocate_section (bfd *      output_bfd,
13109
          struct bfd_link_info * info,
13110
          bfd *      input_bfd,
13111
          asection *       input_section,
13112
          bfd_byte *       contents,
13113
          Elf_Internal_Rela *    relocs,
13114
          Elf_Internal_Sym *     local_syms,
13115
          asection **      local_sections)
13116
0
{
13117
0
  Elf_Internal_Shdr *symtab_hdr;
13118
0
  struct elf_link_hash_entry **sym_hashes;
13119
0
  Elf_Internal_Rela *rel;
13120
0
  Elf_Internal_Rela *relend;
13121
0
  const char *name;
13122
0
  struct elf32_arm_link_hash_table * globals;
13123
13124
0
  globals = elf32_arm_hash_table (info);
13125
0
  if (globals == NULL)
13126
0
    return false;
13127
13128
0
  symtab_hdr = & elf_symtab_hdr (input_bfd);
13129
0
  sym_hashes = elf_sym_hashes (input_bfd);
13130
13131
0
  rel = relocs;
13132
0
  relend = relocs + input_section->reloc_count;
13133
0
  for (; rel < relend; rel++)
13134
0
    {
13135
0
      int        r_type;
13136
0
      reloc_howto_type *     howto;
13137
0
      unsigned long      r_symndx;
13138
0
      Elf_Internal_Sym *     sym;
13139
0
      asection *       sec;
13140
0
      struct elf_link_hash_entry * h;
13141
0
      bfd_vma        relocation;
13142
0
      bfd_reloc_status_type    r;
13143
0
      arelent        bfd_reloc;
13144
0
      char         sym_type;
13145
0
      bool         unresolved_reloc = false;
13146
0
      char *error_message = NULL;
13147
13148
0
      r_symndx = ELF32_R_SYM (rel->r_info);
13149
0
      r_type   = ELF32_R_TYPE (rel->r_info);
13150
0
      r_type   = arm_real_reloc_type (globals, r_type);
13151
13152
0
      if (   r_type == R_ARM_GNU_VTENTRY
13153
0
    || r_type == R_ARM_GNU_VTINHERIT)
13154
0
  continue;
13155
13156
0
      howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13157
13158
0
      if (howto == NULL)
13159
0
  return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13160
13161
0
      h = NULL;
13162
0
      sym = NULL;
13163
0
      sec = NULL;
13164
13165
0
      if (r_symndx < symtab_hdr->sh_info)
13166
0
  {
13167
0
    sym = local_syms + r_symndx;
13168
0
    sym_type = ELF32_ST_TYPE (sym->st_info);
13169
0
    sec = local_sections[r_symndx];
13170
13171
    /* An object file might have a reference to a local
13172
       undefined symbol.  This is a daft object file, but we
13173
       should at least do something about it.  V4BX & NONE
13174
       relocations do not use the symbol and are explicitly
13175
       allowed to use the undefined symbol, so allow those.
13176
       Likewise for relocations against STN_UNDEF.  */
13177
0
    if (r_type != R_ARM_V4BX
13178
0
        && r_type != R_ARM_NONE
13179
0
        && r_symndx != STN_UNDEF
13180
0
        && bfd_is_und_section (sec)
13181
0
        && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13182
0
      (*info->callbacks->undefined_symbol)
13183
0
        (info, bfd_elf_string_from_elf_section
13184
0
         (input_bfd, symtab_hdr->sh_link, sym->st_name),
13185
0
         input_bfd, input_section,
13186
0
         rel->r_offset, true);
13187
13188
0
    if (globals->use_rel)
13189
0
      {
13190
0
        relocation = (sec->output_section->vma
13191
0
          + sec->output_offset
13192
0
          + sym->st_value);
13193
0
        if (!bfd_link_relocatable (info)
13194
0
      && (sec->flags & SEC_MERGE)
13195
0
      && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13196
0
    {
13197
0
      asection *msec;
13198
0
      bfd_vma addend, value;
13199
13200
0
      switch (r_type)
13201
0
        {
13202
0
        case R_ARM_MOVW_ABS_NC:
13203
0
        case R_ARM_MOVT_ABS:
13204
0
          value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13205
0
          addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13206
0
          addend = (addend ^ 0x8000) - 0x8000;
13207
0
          break;
13208
13209
0
        case R_ARM_THM_MOVW_ABS_NC:
13210
0
        case R_ARM_THM_MOVT_ABS:
13211
0
          value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13212
0
            << 16;
13213
0
          value |= bfd_get_16 (input_bfd,
13214
0
             contents + rel->r_offset + 2);
13215
0
          addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13216
0
             | ((value & 0x04000000) >> 15);
13217
0
          addend = (addend ^ 0x8000) - 0x8000;
13218
0
          break;
13219
13220
0
        default:
13221
0
          if (howto->rightshift
13222
0
        || (howto->src_mask & (howto->src_mask + 1)))
13223
0
      {
13224
0
        _bfd_error_handler
13225
          /* xgettext:c-format */
13226
0
          (_("%pB(%pA+%#" PRIx64 "): "
13227
0
             "%s relocation against SEC_MERGE section"),
13228
0
           input_bfd, input_section,
13229
0
           (uint64_t) rel->r_offset, howto->name);
13230
0
        return false;
13231
0
      }
13232
13233
0
          value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13234
13235
          /* Get the (signed) value from the instruction.  */
13236
0
          addend = value & howto->src_mask;
13237
0
          if (addend & ((howto->src_mask + 1) >> 1))
13238
0
      {
13239
0
        bfd_signed_vma mask;
13240
13241
0
        mask = -1;
13242
0
        mask &= ~ howto->src_mask;
13243
0
        addend |= mask;
13244
0
      }
13245
0
          break;
13246
0
        }
13247
13248
0
      msec = sec;
13249
0
      addend =
13250
0
        _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13251
0
        - relocation;
13252
0
      addend += msec->output_section->vma + msec->output_offset;
13253
13254
      /* Cases here must match those in the preceding
13255
         switch statement.  */
13256
0
      switch (r_type)
13257
0
        {
13258
0
        case R_ARM_MOVW_ABS_NC:
13259
0
        case R_ARM_MOVT_ABS:
13260
0
          value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13261
0
            | (addend & 0xfff);
13262
0
          bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13263
0
          break;
13264
13265
0
        case R_ARM_THM_MOVW_ABS_NC:
13266
0
        case R_ARM_THM_MOVT_ABS:
13267
0
          value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13268
0
            | (addend & 0xff) | ((addend & 0x0800) << 15);
13269
0
          bfd_put_16 (input_bfd, value >> 16,
13270
0
          contents + rel->r_offset);
13271
0
          bfd_put_16 (input_bfd, value,
13272
0
          contents + rel->r_offset + 2);
13273
0
          break;
13274
13275
0
        default:
13276
0
          value = (value & ~ howto->dst_mask)
13277
0
            | (addend & howto->dst_mask);
13278
0
          bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13279
0
          break;
13280
0
        }
13281
0
    }
13282
0
      }
13283
0
    else
13284
0
      relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13285
0
  }
13286
0
      else
13287
0
  {
13288
0
    bool warned, ignored;
13289
13290
0
    RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13291
0
           r_symndx, symtab_hdr, sym_hashes,
13292
0
           h, sec, relocation,
13293
0
           unresolved_reloc, warned, ignored);
13294
13295
0
    sym_type = h->type;
13296
0
  }
13297
13298
0
      if (sec != NULL && discarded_section (sec))
13299
0
  RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13300
0
           rel, 1, relend, howto, 0, contents);
13301
13302
0
      if (bfd_link_relocatable (info))
13303
0
  {
13304
    /* This is a relocatable link.  We don't have to change
13305
       anything, unless the reloc is against a section symbol,
13306
       in which case we have to adjust according to where the
13307
       section symbol winds up in the output section.  */
13308
0
    if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13309
0
      {
13310
0
        if (globals->use_rel)
13311
0
    arm_add_to_rel (input_bfd, contents + rel->r_offset,
13312
0
        howto, (bfd_signed_vma) sec->output_offset);
13313
0
        else
13314
0
    rel->r_addend += sec->output_offset;
13315
0
      }
13316
0
    continue;
13317
0
  }
13318
13319
0
      if (h != NULL)
13320
0
  name = h->root.root.string;
13321
0
      else
13322
0
  {
13323
0
    name = (bfd_elf_string_from_elf_section
13324
0
      (input_bfd, symtab_hdr->sh_link, sym->st_name));
13325
0
    if (name == NULL || *name == '\0')
13326
0
      name = bfd_section_name (sec);
13327
0
  }
13328
13329
0
      if (r_symndx != STN_UNDEF
13330
0
    && r_type != R_ARM_NONE
13331
0
    && (h == NULL
13332
0
        || h->root.type == bfd_link_hash_defined
13333
0
        || h->root.type == bfd_link_hash_defweak)
13334
0
    && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13335
0
  {
13336
0
    _bfd_error_handler
13337
0
      ((sym_type == STT_TLS
13338
        /* xgettext:c-format */
13339
0
        ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13340
        /* xgettext:c-format */
13341
0
        : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13342
0
       input_bfd,
13343
0
       input_section,
13344
0
       (uint64_t) rel->r_offset,
13345
0
       howto->name,
13346
0
       name);
13347
0
  }
13348
13349
      /* We call elf32_arm_final_link_relocate unless we're completely
13350
   done, i.e., the relaxation produced the final output we want,
13351
   and we won't let anybody mess with it. Also, we have to do
13352
   addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13353
   both in relaxed and non-relaxed cases.  */
13354
0
      if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13355
0
    || (IS_ARM_TLS_GNU_RELOC (r_type)
13356
0
        && !((h ? elf32_arm_hash_entry (h)->tls_type :
13357
0
        elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13358
0
       & GOT_TLS_GDESC)))
13359
0
  {
13360
0
    r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13361
0
           contents, rel, h == NULL);
13362
    /* This may have been marked unresolved because it came from
13363
       a shared library.  But we've just dealt with that.  */
13364
0
    unresolved_reloc = 0;
13365
0
  }
13366
0
      else
13367
0
  r = bfd_reloc_continue;
13368
13369
0
      if (r == bfd_reloc_continue)
13370
0
  {
13371
0
    unsigned char branch_type =
13372
0
      h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13373
0
        : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13374
13375
0
    r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13376
0
               input_section, contents, rel,
13377
0
               relocation, info, sec, name,
13378
0
               sym_type, branch_type, h,
13379
0
               &unresolved_reloc,
13380
0
               &error_message);
13381
0
  }
13382
13383
      /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13384
   because such sections are not SEC_ALLOC and thus ld.so will
13385
   not process them.  */
13386
0
      if (unresolved_reloc
13387
0
    && !((input_section->flags & SEC_DEBUGGING) != 0
13388
0
         && h->def_dynamic)
13389
0
    && _bfd_elf_section_offset (output_bfd, info, input_section,
13390
0
              rel->r_offset) != (bfd_vma) -1)
13391
0
  {
13392
0
    _bfd_error_handler
13393
      /* xgettext:c-format */
13394
0
      (_("%pB(%pA+%#" PRIx64 "): "
13395
0
         "unresolvable %s relocation against symbol `%s'"),
13396
0
       input_bfd,
13397
0
       input_section,
13398
0
       (uint64_t) rel->r_offset,
13399
0
       howto->name,
13400
0
       h->root.root.string);
13401
0
    return false;
13402
0
  }
13403
13404
0
      if (r != bfd_reloc_ok)
13405
0
  {
13406
0
    switch (r)
13407
0
      {
13408
0
      case bfd_reloc_overflow:
13409
        /* If the overflowing reloc was to an undefined symbol,
13410
     we have already printed one error message and there
13411
     is no point complaining again.  */
13412
0
        if (!h || h->root.type != bfd_link_hash_undefined)
13413
0
    (*info->callbacks->reloc_overflow)
13414
0
      (info, (h ? &h->root : NULL), name, howto->name,
13415
0
       (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13416
0
        break;
13417
13418
0
      case bfd_reloc_undefined:
13419
0
        (*info->callbacks->undefined_symbol)
13420
0
    (info, name, input_bfd, input_section, rel->r_offset, true);
13421
0
        break;
13422
13423
0
      case bfd_reloc_outofrange:
13424
0
        error_message = _("out of range");
13425
0
        goto common_error;
13426
13427
0
      case bfd_reloc_notsupported:
13428
0
        error_message = _("unsupported relocation");
13429
0
        goto common_error;
13430
13431
0
      case bfd_reloc_dangerous:
13432
        /* error_message should already be set.  */
13433
0
        goto common_error;
13434
13435
0
      default:
13436
0
        error_message = _("unknown error");
13437
        /* Fall through.  */
13438
13439
0
      common_error:
13440
0
        BFD_ASSERT (error_message != NULL);
13441
0
        (*info->callbacks->reloc_dangerous)
13442
0
    (info, error_message, input_bfd, input_section, rel->r_offset);
13443
0
        break;
13444
0
      }
13445
0
  }
13446
0
    }
13447
13448
0
  return true;
13449
0
}
13450
13451
/* Add a new unwind edit to the list described by HEAD, TAIL.  If TINDEX is zero,
13452
   adds the edit to the start of the list.  (The list must be built in order of
13453
   ascending TINDEX: the function's callers are primarily responsible for
13454
   maintaining that condition).  */
13455
13456
static void
13457
add_unwind_table_edit (arm_unwind_table_edit **head,
13458
           arm_unwind_table_edit **tail,
13459
           arm_unwind_edit_type type,
13460
           asection *linked_section,
13461
           unsigned int tindex)
13462
0
{
13463
0
  arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13464
0
      xmalloc (sizeof (arm_unwind_table_edit));
13465
13466
0
  new_edit->type = type;
13467
0
  new_edit->linked_section = linked_section;
13468
0
  new_edit->index = tindex;
13469
13470
0
  if (tindex > 0)
13471
0
    {
13472
0
      new_edit->next = NULL;
13473
13474
0
      if (*tail)
13475
0
  (*tail)->next = new_edit;
13476
13477
0
      (*tail) = new_edit;
13478
13479
0
      if (!*head)
13480
0
  (*head) = new_edit;
13481
0
    }
13482
0
  else
13483
0
    {
13484
0
      new_edit->next = *head;
13485
13486
0
      if (!*tail)
13487
0
  *tail = new_edit;
13488
13489
0
      *head = new_edit;
13490
0
    }
13491
0
}
13492
13493
static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13494
13495
/* Increase the size of EXIDX_SEC by ADJUST bytes.  ADJUST mau be negative.  */
13496
13497
static void
13498
adjust_exidx_size (asection *exidx_sec, int adjust)
13499
0
{
13500
0
  asection *out_sec;
13501
13502
0
  if (!exidx_sec->rawsize)
13503
0
    exidx_sec->rawsize = exidx_sec->size;
13504
13505
0
  bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
13506
0
  out_sec = exidx_sec->output_section;
13507
  /* Adjust size of output section.  */
13508
0
  bfd_set_section_size (out_sec, out_sec->size + adjust);
13509
0
}
13510
13511
/* Insert an EXIDX_CANTUNWIND marker at the end of a section.  */
13512
13513
static void
13514
insert_cantunwind_after (asection *text_sec, asection *exidx_sec)
13515
0
{
13516
0
  struct _arm_elf_section_data *exidx_arm_data;
13517
13518
0
  exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13519
0
  add_unwind_table_edit
13520
0
    (&exidx_arm_data->u.exidx.unwind_edit_list,
13521
0
     &exidx_arm_data->u.exidx.unwind_edit_tail,
13522
0
     INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13523
13524
0
  exidx_arm_data->additional_reloc_count++;
13525
13526
0
  adjust_exidx_size (exidx_sec, 8);
13527
0
}
13528
13529
/* Scan .ARM.exidx tables, and create a list describing edits which should be
13530
   made to those tables, such that:
13531
13532
     1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13533
     2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13534
  codes which have been inlined into the index).
13535
13536
   If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13537
13538
   The edits are applied when the tables are written
13539
   (in elf32_arm_write_section).  */
13540
13541
bool
13542
elf32_arm_fix_exidx_coverage (asection **text_section_order,
13543
            unsigned int num_text_sections,
13544
            struct bfd_link_info *info,
13545
            bool merge_exidx_entries)
13546
0
{
13547
0
  bfd *inp;
13548
0
  unsigned int last_second_word = 0, i;
13549
0
  asection *last_exidx_sec = NULL;
13550
0
  asection *last_text_sec = NULL;
13551
0
  int last_unwind_type = -1;
13552
13553
  /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13554
     text sections.  */
13555
0
  for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13556
0
    {
13557
0
      asection *sec;
13558
13559
0
      for (sec = inp->sections; sec != NULL; sec = sec->next)
13560
0
  {
13561
0
    struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13562
0
    Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13563
13564
0
    if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13565
0
      continue;
13566
13567
0
    if (elf_sec->linked_to)
13568
0
      {
13569
0
        Elf_Internal_Shdr *linked_hdr
13570
0
    = &elf_section_data (elf_sec->linked_to)->this_hdr;
13571
0
        struct _arm_elf_section_data *linked_sec_arm_data
13572
0
    = get_arm_elf_section_data (linked_hdr->bfd_section);
13573
13574
0
        if (linked_sec_arm_data == NULL)
13575
0
    continue;
13576
13577
        /* Link this .ARM.exidx section back from the text section it
13578
     describes.  */
13579
0
        linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13580
0
      }
13581
0
  }
13582
0
    }
13583
13584
  /* Walk all text sections in order of increasing VMA.  Eilminate duplicate
13585
     index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13586
     and add EXIDX_CANTUNWIND entries for sections with no unwind table data.  */
13587
13588
0
  for (i = 0; i < num_text_sections; i++)
13589
0
    {
13590
0
      asection *sec = text_section_order[i];
13591
0
      asection *exidx_sec;
13592
0
      struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13593
0
      struct _arm_elf_section_data *exidx_arm_data;
13594
0
      bfd_byte *contents = NULL;
13595
0
      int deleted_exidx_bytes = 0;
13596
0
      bfd_vma j;
13597
0
      arm_unwind_table_edit *unwind_edit_head = NULL;
13598
0
      arm_unwind_table_edit *unwind_edit_tail = NULL;
13599
0
      Elf_Internal_Shdr *hdr;
13600
0
      bfd *ibfd;
13601
13602
0
      if (arm_data == NULL)
13603
0
  continue;
13604
13605
0
      exidx_sec = arm_data->u.text.arm_exidx_sec;
13606
0
      if (exidx_sec == NULL)
13607
0
  {
13608
    /* Section has no unwind data.  */
13609
0
    if (last_unwind_type == 0 || !last_exidx_sec)
13610
0
      continue;
13611
13612
    /* Ignore zero sized sections.  */
13613
0
    if (sec->size == 0)
13614
0
      continue;
13615
13616
0
    insert_cantunwind_after (last_text_sec, last_exidx_sec);
13617
0
    last_unwind_type = 0;
13618
0
    continue;
13619
0
  }
13620
13621
      /* Skip /DISCARD/ sections.  */
13622
0
      if (bfd_is_abs_section (exidx_sec->output_section))
13623
0
  continue;
13624
13625
0
      hdr = &elf_section_data (exidx_sec)->this_hdr;
13626
0
      if (hdr->sh_type != SHT_ARM_EXIDX)
13627
0
  continue;
13628
13629
0
      exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13630
0
      if (exidx_arm_data == NULL)
13631
0
  continue;
13632
13633
0
      ibfd = exidx_sec->owner;
13634
13635
0
      if (hdr->contents != NULL)
13636
0
  contents = hdr->contents;
13637
0
      else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13638
  /* An error?  */
13639
0
  continue;
13640
13641
0
      if (last_unwind_type > 0)
13642
0
  {
13643
0
    unsigned int first_word = bfd_get_32 (ibfd, contents);
13644
    /* Add cantunwind if first unwind item does not match section
13645
       start.  */
13646
0
    if (first_word != sec->vma)
13647
0
      {
13648
0
        insert_cantunwind_after (last_text_sec, last_exidx_sec);
13649
0
        last_unwind_type = 0;
13650
0
      }
13651
0
  }
13652
13653
0
      for (j = 0; j < hdr->sh_size; j += 8)
13654
0
  {
13655
0
    unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13656
0
    int unwind_type;
13657
0
    int elide = 0;
13658
13659
    /* An EXIDX_CANTUNWIND entry.  */
13660
0
    if (second_word == 1)
13661
0
      {
13662
0
        if (last_unwind_type == 0)
13663
0
    elide = 1;
13664
0
        unwind_type = 0;
13665
0
      }
13666
    /* Inlined unwinding data.  Merge if equal to previous.  */
13667
0
    else if ((second_word & 0x80000000) != 0)
13668
0
      {
13669
0
        if (merge_exidx_entries
13670
0
       && last_second_word == second_word && last_unwind_type == 1)
13671
0
    elide = 1;
13672
0
        unwind_type = 1;
13673
0
        last_second_word = second_word;
13674
0
      }
13675
    /* Normal table entry.  In theory we could merge these too,
13676
       but duplicate entries are likely to be much less common.  */
13677
0
    else
13678
0
      unwind_type = 2;
13679
13680
0
    if (elide && !bfd_link_relocatable (info))
13681
0
      {
13682
0
        add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13683
0
             DELETE_EXIDX_ENTRY, NULL, j / 8);
13684
13685
0
        deleted_exidx_bytes += 8;
13686
0
      }
13687
13688
0
    last_unwind_type = unwind_type;
13689
0
  }
13690
13691
      /* Free contents if we allocated it ourselves.  */
13692
0
      if (contents != hdr->contents)
13693
0
  free (contents);
13694
13695
      /* Record edits to be applied later (in elf32_arm_write_section).  */
13696
0
      exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13697
0
      exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13698
13699
0
      if (deleted_exidx_bytes > 0)
13700
0
  adjust_exidx_size (exidx_sec, - deleted_exidx_bytes);
13701
13702
0
      last_exidx_sec = exidx_sec;
13703
0
      last_text_sec = sec;
13704
0
    }
13705
13706
  /* Add terminating CANTUNWIND entry.  */
13707
0
  if (!bfd_link_relocatable (info) && last_exidx_sec
13708
0
      && last_unwind_type != 0)
13709
0
    insert_cantunwind_after (last_text_sec, last_exidx_sec);
13710
13711
0
  return true;
13712
0
}
13713
13714
static bool
13715
elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13716
             bfd *ibfd, const char *name)
13717
0
{
13718
0
  asection *sec, *osec;
13719
13720
0
  sec = bfd_get_linker_section (ibfd, name);
13721
0
  if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13722
0
    return true;
13723
13724
0
  osec = sec->output_section;
13725
0
  if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13726
0
    return true;
13727
13728
0
  if (! bfd_set_section_contents (obfd, osec, sec->contents,
13729
0
          sec->output_offset, sec->size))
13730
0
    return false;
13731
13732
0
  return true;
13733
0
}
13734
13735
static bool
13736
elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13737
0
{
13738
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13739
0
  asection *sec, *osec;
13740
13741
0
  if (globals == NULL)
13742
0
    return false;
13743
13744
  /* Invoke the regular ELF backend linker to do all the work.  */
13745
0
  if (!bfd_elf_final_link (abfd, info))
13746
0
    return false;
13747
13748
  /* Process stub sections (eg BE8 encoding, ...).  */
13749
0
  struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13750
0
  unsigned int i;
13751
0
  for (i=0; i<htab->top_id; i++)
13752
0
    {
13753
0
      sec = htab->stub_group[i].stub_sec;
13754
      /* Only process it once, in its link_sec slot.  */
13755
0
      if (sec && i == htab->stub_group[i].link_sec->id)
13756
0
  {
13757
0
    osec = sec->output_section;
13758
0
    elf32_arm_write_section (abfd, info, sec, sec->contents);
13759
0
    if (! bfd_set_section_contents (abfd, osec, sec->contents,
13760
0
            sec->output_offset, sec->size))
13761
0
      return false;
13762
0
  }
13763
0
    }
13764
13765
  /* Write out any glue sections now that we have created all the
13766
     stubs.  */
13767
0
  if (globals->bfd_of_glue_owner != NULL)
13768
0
    {
13769
0
      if (! elf32_arm_output_glue_section (info, abfd,
13770
0
             globals->bfd_of_glue_owner,
13771
0
             ARM2THUMB_GLUE_SECTION_NAME))
13772
0
  return false;
13773
13774
0
      if (! elf32_arm_output_glue_section (info, abfd,
13775
0
             globals->bfd_of_glue_owner,
13776
0
             THUMB2ARM_GLUE_SECTION_NAME))
13777
0
  return false;
13778
13779
0
      if (! elf32_arm_output_glue_section (info, abfd,
13780
0
             globals->bfd_of_glue_owner,
13781
0
             VFP11_ERRATUM_VENEER_SECTION_NAME))
13782
0
  return false;
13783
13784
0
      if (! elf32_arm_output_glue_section (info, abfd,
13785
0
             globals->bfd_of_glue_owner,
13786
0
             STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13787
0
  return false;
13788
13789
0
      if (! elf32_arm_output_glue_section (info, abfd,
13790
0
             globals->bfd_of_glue_owner,
13791
0
             ARM_BX_GLUE_SECTION_NAME))
13792
0
  return false;
13793
0
    }
13794
13795
0
  return true;
13796
0
}
13797
13798
/* Return a best guess for the machine number based on the attributes.  */
13799
13800
static unsigned int
13801
bfd_arm_get_mach_from_attributes (bfd * abfd)
13802
7.77k
{
13803
7.77k
  int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13804
13805
7.77k
  switch (arch)
13806
7.77k
    {
13807
7.75k
    case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13808
0
    case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13809
0
    case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13810
0
    case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13811
13812
0
    case TAG_CPU_ARCH_V5TE:
13813
0
      {
13814
0
  char * name;
13815
13816
0
  BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13817
0
  name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13818
13819
0
  if (name)
13820
0
    {
13821
0
      if (strcmp (name, "IWMMXT2") == 0)
13822
0
        return bfd_mach_arm_iWMMXt2;
13823
13824
0
      if (strcmp (name, "IWMMXT") == 0)
13825
0
        return bfd_mach_arm_iWMMXt;
13826
13827
0
      if (strcmp (name, "XSCALE") == 0)
13828
0
        {
13829
0
    int wmmx;
13830
13831
0
    BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13832
0
    wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13833
0
    switch (wmmx)
13834
0
      {
13835
0
      case 1: return bfd_mach_arm_iWMMXt;
13836
0
      case 2: return bfd_mach_arm_iWMMXt2;
13837
0
      default: return bfd_mach_arm_XScale;
13838
0
      }
13839
0
        }
13840
0
    }
13841
13842
0
  return bfd_mach_arm_5TE;
13843
0
      }
13844
13845
0
    case TAG_CPU_ARCH_V5TEJ:
13846
0
  return bfd_mach_arm_5TEJ;
13847
12
    case TAG_CPU_ARCH_V6:
13848
12
  return bfd_mach_arm_6;
13849
0
    case TAG_CPU_ARCH_V6KZ:
13850
0
  return bfd_mach_arm_6KZ;
13851
0
    case TAG_CPU_ARCH_V6T2:
13852
0
  return bfd_mach_arm_6T2;
13853
0
    case TAG_CPU_ARCH_V6K:
13854
0
  return bfd_mach_arm_6K;
13855
0
    case TAG_CPU_ARCH_V7:
13856
0
  return bfd_mach_arm_7;
13857
0
    case TAG_CPU_ARCH_V6_M:
13858
0
  return bfd_mach_arm_6M;
13859
0
    case TAG_CPU_ARCH_V6S_M:
13860
0
  return bfd_mach_arm_6SM;
13861
0
    case TAG_CPU_ARCH_V7E_M:
13862
0
  return bfd_mach_arm_7EM;
13863
0
    case TAG_CPU_ARCH_V8:
13864
0
  return bfd_mach_arm_8;
13865
0
    case TAG_CPU_ARCH_V8R:
13866
0
  return bfd_mach_arm_8R;
13867
0
    case TAG_CPU_ARCH_V8M_BASE:
13868
0
  return bfd_mach_arm_8M_BASE;
13869
0
    case TAG_CPU_ARCH_V8M_MAIN:
13870
0
  return bfd_mach_arm_8M_MAIN;
13871
0
    case TAG_CPU_ARCH_V8_1M_MAIN:
13872
0
  return bfd_mach_arm_8_1M_MAIN;
13873
0
    case TAG_CPU_ARCH_V9:
13874
0
  return bfd_mach_arm_9;
13875
13876
0
    default:
13877
      /* Force entry to be added for any new known Tag_CPU_arch value.  */
13878
0
      BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13879
13880
      /* Unknown Tag_CPU_arch value.  */
13881
0
      return bfd_mach_arm_unknown;
13882
7.77k
    }
13883
7.77k
}
13884
13885
/* Set the right machine number.  */
13886
13887
static bool
13888
elf32_arm_object_p (bfd *abfd)
13889
7.77k
{
13890
7.77k
  unsigned int mach;
13891
13892
7.77k
  mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13893
13894
7.77k
  if (mach == bfd_mach_arm_unknown)
13895
7.77k
    mach = bfd_arm_get_mach_from_attributes (abfd);
13896
13897
7.77k
  bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13898
7.77k
  return true;
13899
7.77k
}
13900
13901
/* Function to keep ARM specific flags in the ELF header.  */
13902
13903
static bool
13904
elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13905
0
{
13906
0
  if (elf_flags_init (abfd)
13907
0
      && elf_elfheader (abfd)->e_flags != flags)
13908
0
    {
13909
0
      if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13910
0
  {
13911
0
    if (flags & EF_ARM_INTERWORK)
13912
0
      _bfd_error_handler
13913
0
        (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13914
0
         abfd);
13915
0
    else
13916
0
      _bfd_error_handler
13917
0
        (_("warning: clearing the interworking flag of %pB due to outside request"),
13918
0
         abfd);
13919
0
  }
13920
0
    }
13921
0
  else
13922
0
    {
13923
0
      elf_elfheader (abfd)->e_flags = flags;
13924
0
      elf_flags_init (abfd) = true;
13925
0
    }
13926
13927
0
  return true;
13928
0
}
13929
13930
/* Copy backend specific data from one object module to another.  */
13931
13932
static bool
13933
elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13934
0
{
13935
0
  flagword in_flags;
13936
0
  flagword out_flags;
13937
13938
0
  if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13939
0
    return true;
13940
13941
0
  in_flags  = elf_elfheader (ibfd)->e_flags;
13942
0
  out_flags = elf_elfheader (obfd)->e_flags;
13943
13944
0
  if (elf_flags_init (obfd)
13945
0
      && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13946
0
      && in_flags != out_flags)
13947
0
    {
13948
      /* Cannot mix APCS26 and APCS32 code.  */
13949
0
      if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13950
0
  return false;
13951
13952
      /* Cannot mix float APCS and non-float APCS code.  */
13953
0
      if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13954
0
  return false;
13955
13956
      /* If the src and dest have different interworking flags
13957
   then turn off the interworking bit.  */
13958
0
      if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13959
0
  {
13960
0
    if (out_flags & EF_ARM_INTERWORK)
13961
0
      _bfd_error_handler
13962
0
        (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13963
0
         obfd, ibfd);
13964
13965
0
    in_flags &= ~EF_ARM_INTERWORK;
13966
0
  }
13967
13968
      /* Likewise for PIC, though don't warn for this case.  */
13969
0
      if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13970
0
  in_flags &= ~EF_ARM_PIC;
13971
0
    }
13972
13973
0
  elf_elfheader (obfd)->e_flags = in_flags;
13974
0
  elf_flags_init (obfd) = true;
13975
13976
0
  return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13977
0
}
13978
13979
/* Values for Tag_ABI_PCS_R9_use.  */
13980
enum
13981
{
13982
  AEABI_R9_V6,
13983
  AEABI_R9_SB,
13984
  AEABI_R9_TLS,
13985
  AEABI_R9_unused
13986
};
13987
13988
/* Values for Tag_ABI_PCS_RW_data.  */
13989
enum
13990
{
13991
  AEABI_PCS_RW_data_absolute,
13992
  AEABI_PCS_RW_data_PCrel,
13993
  AEABI_PCS_RW_data_SBrel,
13994
  AEABI_PCS_RW_data_unused
13995
};
13996
13997
/* Values for Tag_ABI_enum_size.  */
13998
enum
13999
{
14000
  AEABI_enum_unused,
14001
  AEABI_enum_short,
14002
  AEABI_enum_wide,
14003
  AEABI_enum_forced_wide
14004
};
14005
14006
/* Determine whether an object attribute tag takes an integer, a
14007
   string or both.  */
14008
14009
static int
14010
elf32_arm_obj_attrs_arg_type (int tag)
14011
384
{
14012
384
  if (tag == Tag_compatibility)
14013
0
    return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14014
384
  else if (tag == Tag_nodefaults)
14015
0
    return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14016
384
  else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14017
24
    return ATTR_TYPE_FLAG_STR_VAL;
14018
360
  else if (tag < 32)
14019
336
    return ATTR_TYPE_FLAG_INT_VAL;
14020
24
  else
14021
24
    return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14022
384
}
14023
14024
/* The ABI defines that Tag_conformance should be emitted first, and that
14025
   Tag_nodefaults should be second (if either is defined).  This sets those
14026
   two positions, and bumps up the position of all the remaining tags to
14027
   compensate.  */
14028
static int
14029
elf32_arm_obj_attrs_order (int num)
14030
0
{
14031
0
  if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14032
0
    return Tag_conformance;
14033
0
  if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14034
0
    return Tag_nodefaults;
14035
0
  if ((num - 2) < Tag_nodefaults)
14036
0
    return num - 2;
14037
0
  if ((num - 1) < Tag_conformance)
14038
0
    return num - 1;
14039
0
  return num;
14040
0
}
14041
14042
/* Attribute numbers >=64 (mod 128) can be safely ignored.  */
14043
static bool
14044
elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14045
0
{
14046
0
  if ((tag & 127) < 64)
14047
0
    {
14048
0
      _bfd_error_handler
14049
0
  (_("%pB: unknown mandatory EABI object attribute %d"),
14050
0
   abfd, tag);
14051
0
      bfd_set_error (bfd_error_bad_value);
14052
0
      return false;
14053
0
    }
14054
0
  else
14055
0
    {
14056
0
      _bfd_error_handler
14057
0
  (_("warning: %pB: unknown EABI object attribute %d"),
14058
0
   abfd, tag);
14059
0
      return true;
14060
0
    }
14061
0
}
14062
14063
/* Read the architecture from the Tag_also_compatible_with attribute, if any.
14064
   Returns -1 if no architecture could be read.  */
14065
14066
static int
14067
get_secondary_compatible_arch (bfd *abfd)
14068
0
{
14069
0
  obj_attribute *attr =
14070
0
    &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14071
14072
  /* Note: the tag and its argument below are uleb128 values, though
14073
     currently-defined values fit in one byte for each.  */
14074
0
  if (attr->s
14075
0
      && attr->s[0] == Tag_CPU_arch
14076
0
      && (attr->s[1] & 128) != 128
14077
0
      && attr->s[2] == 0)
14078
0
   return attr->s[1];
14079
14080
  /* This tag is "safely ignorable", so don't complain if it looks funny.  */
14081
0
  return -1;
14082
0
}
14083
14084
/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14085
   The tag is removed if ARCH is -1.  */
14086
14087
static void
14088
set_secondary_compatible_arch (bfd *abfd, int arch)
14089
0
{
14090
0
  obj_attribute *attr =
14091
0
    &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14092
14093
0
  if (arch == -1)
14094
0
    {
14095
0
      attr->s = NULL;
14096
0
      return;
14097
0
    }
14098
14099
  /* Note: the tag and its argument below are uleb128 values, though
14100
     currently-defined values fit in one byte for each.  */
14101
0
  if (!attr->s)
14102
0
    attr->s = (char *) bfd_alloc (abfd, 3);
14103
0
  attr->s[0] = Tag_CPU_arch;
14104
0
  attr->s[1] = arch;
14105
0
  attr->s[2] = '\0';
14106
0
}
14107
14108
/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14109
   into account.  */
14110
14111
static int
14112
tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14113
          int newtag, int secondary_compat, const char* name_table[])
14114
0
{
14115
0
#define T(X) TAG_CPU_ARCH_##X
14116
0
  int tagl, tagh, result;
14117
0
  const int v6t2[] =
14118
0
    {
14119
0
      T(V6T2),   /* PRE_V4.  */
14120
0
      T(V6T2),   /* V4.  */
14121
0
      T(V6T2),   /* V4T.  */
14122
0
      T(V6T2),   /* V5T.  */
14123
0
      T(V6T2),   /* V5TE.  */
14124
0
      T(V6T2),   /* V5TEJ.  */
14125
0
      T(V6T2),   /* V6.  */
14126
0
      T(V7),     /* V6KZ.  */
14127
      T(V6T2)    /* V6T2.  */
14128
0
    };
14129
0
  const int v6k[] =
14130
0
    {
14131
0
      T(V6K),    /* PRE_V4.  */
14132
0
      T(V6K),    /* V4.  */
14133
0
      T(V6K),    /* V4T.  */
14134
0
      T(V6K),    /* V5T.  */
14135
0
      T(V6K),    /* V5TE.  */
14136
0
      T(V6K),    /* V5TEJ.  */
14137
0
      T(V6K),    /* V6.  */
14138
0
      T(V6KZ),   /* V6KZ.  */
14139
0
      T(V7),     /* V6T2.  */
14140
      T(V6K)     /* V6K.  */
14141
0
    };
14142
0
  const int v7[] =
14143
0
    {
14144
0
      T(V7),     /* PRE_V4.  */
14145
0
      T(V7),     /* V4.  */
14146
0
      T(V7),     /* V4T.  */
14147
0
      T(V7),     /* V5T.  */
14148
0
      T(V7),     /* V5TE.  */
14149
0
      T(V7),     /* V5TEJ.  */
14150
0
      T(V7),     /* V6.  */
14151
0
      T(V7),     /* V6KZ.  */
14152
0
      T(V7),     /* V6T2.  */
14153
0
      T(V7),     /* V6K.  */
14154
      T(V7)      /* V7.  */
14155
0
    };
14156
0
  const int v6_m[] =
14157
0
    {
14158
0
      -1,  /* PRE_V4.  */
14159
0
      -1,  /* V4.  */
14160
0
      T(V6K),    /* V4T.  */
14161
0
      T(V6K),    /* V5T.  */
14162
0
      T(V6K),    /* V5TE.  */
14163
0
      T(V6K),    /* V5TEJ.  */
14164
0
      T(V6K),    /* V6.  */
14165
0
      T(V6KZ),   /* V6KZ.  */
14166
0
      T(V7),     /* V6T2.  */
14167
0
      T(V6K),    /* V6K.  */
14168
0
      T(V7),     /* V7.  */
14169
      T(V6_M)    /* V6_M.  */
14170
0
    };
14171
0
  const int v6s_m[] =
14172
0
    {
14173
0
      -1,  /* PRE_V4.  */
14174
0
      -1,  /* V4.  */
14175
0
      T(V6K),    /* V4T.  */
14176
0
      T(V6K),    /* V5T.  */
14177
0
      T(V6K),    /* V5TE.  */
14178
0
      T(V6K),    /* V5TEJ.  */
14179
0
      T(V6K),    /* V6.  */
14180
0
      T(V6KZ),   /* V6KZ.  */
14181
0
      T(V7),     /* V6T2.  */
14182
0
      T(V6K),    /* V6K.  */
14183
0
      T(V7),     /* V7.  */
14184
0
      T(V6S_M),  /* V6_M.  */
14185
      T(V6S_M)   /* V6S_M.  */
14186
0
    };
14187
0
  const int v7e_m[] =
14188
0
    {
14189
0
      -1,  /* PRE_V4.  */
14190
0
      -1,  /* V4.  */
14191
0
      T(V7E_M),  /* V4T.  */
14192
0
      T(V7E_M),  /* V5T.  */
14193
0
      T(V7E_M),  /* V5TE.  */
14194
0
      T(V7E_M),  /* V5TEJ.  */
14195
0
      T(V7E_M),  /* V6.  */
14196
0
      T(V7E_M),  /* V6KZ.  */
14197
0
      T(V7E_M),  /* V6T2.  */
14198
0
      T(V7E_M),  /* V6K.  */
14199
0
      T(V7E_M),  /* V7.  */
14200
0
      T(V7E_M),  /* V6_M.  */
14201
0
      T(V7E_M),  /* V6S_M.  */
14202
      T(V7E_M)   /* V7E_M.  */
14203
0
    };
14204
0
  const int v8[] =
14205
0
    {
14206
0
      T(V8),   /* PRE_V4.  */
14207
0
      T(V8),   /* V4.  */
14208
0
      T(V8),   /* V4T.  */
14209
0
      T(V8),   /* V5T.  */
14210
0
      T(V8),   /* V5TE.  */
14211
0
      T(V8),   /* V5TEJ.  */
14212
0
      T(V8),   /* V6.  */
14213
0
      T(V8),   /* V6KZ.  */
14214
0
      T(V8),   /* V6T2.  */
14215
0
      T(V8),   /* V6K.  */
14216
0
      T(V8),   /* V7.  */
14217
0
      T(V8),   /* V6_M.  */
14218
0
      T(V8),   /* V6S_M.  */
14219
0
      T(V8),   /* V7E_M.  */
14220
0
      T(V8),   /* V8.  */
14221
0
      T(V8),   /* V8-R.  */
14222
0
      T(V8),   /* V8-M.BASE.  */
14223
0
      T(V8),   /* V8-M.MAIN.  */
14224
0
      T(V8),   /* V8.1.  */
14225
0
      T(V8),   /* V8.2.  */
14226
0
      T(V8),   /* V8.3.  */
14227
0
      T(V8),   /* V8.1-M.MAIN.  */
14228
0
    };
14229
0
  const int v8r[] =
14230
0
    {
14231
0
      T(V8R),    /* PRE_V4.  */
14232
0
      T(V8R),    /* V4.  */
14233
0
      T(V8R),    /* V4T.  */
14234
0
      T(V8R),    /* V5T.  */
14235
0
      T(V8R),    /* V5TE.  */
14236
0
      T(V8R),    /* V5TEJ.  */
14237
0
      T(V8R),    /* V6.  */
14238
0
      T(V8R),    /* V6KZ.  */
14239
0
      T(V8R),    /* V6T2.  */
14240
0
      T(V8R),    /* V6K.  */
14241
0
      T(V8R),    /* V7.  */
14242
0
      T(V8R),    /* V6_M.  */
14243
0
      T(V8R),    /* V6S_M.  */
14244
0
      T(V8R),    /* V7E_M.  */
14245
0
      T(V8),   /* V8.  */
14246
0
      T(V8R),    /* V8R.  */
14247
0
    };
14248
0
  const int v8m_baseline[] =
14249
0
    {
14250
0
      -1,   /* PRE_V4.  */
14251
0
      -1,   /* V4.  */
14252
0
      -1,   /* V4T.  */
14253
0
      -1,   /* V5T.  */
14254
0
      -1,   /* V5TE.  */
14255
0
      -1,   /* V5TEJ.  */
14256
0
      -1,   /* V6.  */
14257
0
      -1,   /* V6KZ.  */
14258
0
      -1,   /* V6T2.  */
14259
0
      -1,   /* V6K.  */
14260
0
      -1,   /* V7.  */
14261
0
      T(V8M_BASE), /* V6_M.  */
14262
0
      T(V8M_BASE), /* V6S_M.  */
14263
0
      -1,   /* V7E_M.  */
14264
0
      -1,   /* V8.  */
14265
0
      -1,   /* V8R.  */
14266
      T(V8M_BASE)  /* V8-M BASELINE.  */
14267
0
    };
14268
0
  const int v8m_mainline[] =
14269
0
    {
14270
0
      -1,   /* PRE_V4.  */
14271
0
      -1,   /* V4.  */
14272
0
      -1,   /* V4T.  */
14273
0
      -1,   /* V5T.  */
14274
0
      -1,   /* V5TE.  */
14275
0
      -1,   /* V5TEJ.  */
14276
0
      -1,   /* V6.  */
14277
0
      -1,   /* V6KZ.  */
14278
0
      -1,   /* V6T2.  */
14279
0
      -1,   /* V6K.  */
14280
0
      T(V8M_MAIN), /* V7.  */
14281
0
      T(V8M_MAIN), /* V6_M.  */
14282
0
      T(V8M_MAIN), /* V6S_M.  */
14283
0
      T(V8M_MAIN), /* V7E_M.  */
14284
0
      -1,   /* V8.  */
14285
0
      -1,   /* V8R.  */
14286
0
      T(V8M_MAIN), /* V8-M BASELINE.  */
14287
      T(V8M_MAIN)  /* V8-M MAINLINE.  */
14288
0
    };
14289
0
  const int v8_1m_mainline[] =
14290
0
    {
14291
0
      -1,   /* PRE_V4.  */
14292
0
      -1,   /* V4.  */
14293
0
      -1,   /* V4T.  */
14294
0
      -1,   /* V5T.  */
14295
0
      -1,   /* V5TE.  */
14296
0
      -1,   /* V5TEJ.  */
14297
0
      -1,   /* V6.  */
14298
0
      -1,   /* V6KZ.  */
14299
0
      -1,   /* V6T2.  */
14300
0
      -1,   /* V6K.  */
14301
0
      T(V8_1M_MAIN), /* V7.  */
14302
0
      T(V8_1M_MAIN), /* V6_M.  */
14303
0
      T(V8_1M_MAIN), /* V6S_M.  */
14304
0
      T(V8_1M_MAIN), /* V7E_M.  */
14305
0
      -1,   /* V8.  */
14306
0
      -1,   /* V8R.  */
14307
0
      T(V8_1M_MAIN), /* V8-M BASELINE.  */
14308
0
      T(V8_1M_MAIN), /* V8-M MAINLINE.  */
14309
0
      -1,   /* Unused (18).  */
14310
0
      -1,   /* Unused (19).  */
14311
0
      -1,   /* Unused (20).  */
14312
      T(V8_1M_MAIN)  /* V8.1-M MAINLINE.  */
14313
0
    };
14314
0
  const int v9[] =
14315
0
    {
14316
0
      T(V9),   /* PRE_V4.  */
14317
0
      T(V9),   /* V4.  */
14318
0
      T(V9),   /* V4T.  */
14319
0
      T(V9),   /* V5T.  */
14320
0
      T(V9),   /* V5TE.  */
14321
0
      T(V9),   /* V5TEJ.  */
14322
0
      T(V9),   /* V6.  */
14323
0
      T(V9),   /* V6KZ.  */
14324
0
      T(V9),   /* V6T2.  */
14325
0
      T(V9),   /* V6K.  */
14326
0
      T(V9),   /* V7.  */
14327
0
      T(V9),   /* V6_M.  */
14328
0
      T(V9),   /* V6S_M.  */
14329
0
      T(V9),   /* V7E_M.  */
14330
0
      T(V9),   /* V8.  */
14331
0
      T(V9),   /* V8-R.  */
14332
0
      T(V9),   /* V8-M.BASE.  */
14333
0
      T(V9),   /* V8-M.MAIN.  */
14334
0
      T(V9),   /* V8.1.  */
14335
0
      T(V9),   /* V8.2.  */
14336
0
      T(V9),   /* V8.3.  */
14337
0
      T(V9),   /* V8.1-M.MAIN.  */
14338
0
      T(V9),   /* V9.  */
14339
0
     };
14340
0
  const int v4t_plus_v6_m[] =
14341
0
    {
14342
0
      -1,   /* PRE_V4.  */
14343
0
      -1,   /* V4.  */
14344
0
      T(V4T),    /* V4T.  */
14345
0
      T(V5T),    /* V5T.  */
14346
0
      T(V5TE),   /* V5TE.  */
14347
0
      T(V5TEJ),    /* V5TEJ.  */
14348
0
      T(V6),   /* V6.  */
14349
0
      T(V6KZ),   /* V6KZ.  */
14350
0
      T(V6T2),   /* V6T2.  */
14351
0
      T(V6K),    /* V6K.  */
14352
0
      T(V7),   /* V7.  */
14353
0
      T(V6_M),   /* V6_M.  */
14354
0
      T(V6S_M),    /* V6S_M.  */
14355
0
      T(V7E_M),    /* V7E_M.  */
14356
0
      T(V8),   /* V8.  */
14357
0
      -1,   /* V8R.  */
14358
0
      T(V8M_BASE), /* V8-M BASELINE.  */
14359
0
      T(V8M_MAIN), /* V8-M MAINLINE.  */
14360
0
      -1,   /* Unused (18).  */
14361
0
      -1,   /* Unused (19).  */
14362
0
      -1,   /* Unused (20).  */
14363
0
      T(V8_1M_MAIN), /* V8.1-M MAINLINE.  */
14364
0
      T(V9),   /* V9.  */
14365
      T(V4T_PLUS_V6_M) /* V4T plus V6_M.  */
14366
0
    };
14367
0
  const int *comb[] =
14368
0
    {
14369
0
      v6t2,
14370
0
      v6k,
14371
0
      v7,
14372
0
      v6_m,
14373
0
      v6s_m,
14374
0
      v7e_m,
14375
0
      v8,
14376
0
      v8r,
14377
0
      v8m_baseline,
14378
0
      v8m_mainline,
14379
0
      NULL,
14380
0
      NULL,
14381
0
      NULL,
14382
0
      v8_1m_mainline,
14383
0
      v9,
14384
      /* Pseudo-architecture.  */
14385
0
      v4t_plus_v6_m
14386
0
    };
14387
14388
  /* Check we've not got a higher architecture than we know about.  */
14389
14390
0
  if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14391
0
    {
14392
0
      _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14393
0
      return -1;
14394
0
    }
14395
14396
  /* Override old tag if we have a Tag_also_compatible_with on the output.  */
14397
14398
0
  if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14399
0
      || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14400
0
    oldtag = T(V4T_PLUS_V6_M);
14401
14402
  /* And override the new tag if we have a Tag_also_compatible_with on the
14403
     input.  */
14404
14405
0
  if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14406
0
      || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14407
0
    newtag = T(V4T_PLUS_V6_M);
14408
14409
0
  tagl = (oldtag < newtag) ? oldtag : newtag;
14410
0
  result = tagh = (oldtag > newtag) ? oldtag : newtag;
14411
14412
  /* Architectures before V6KZ add features monotonically.  */
14413
0
  if (tagh <= TAG_CPU_ARCH_V6KZ)
14414
0
    return result;
14415
14416
0
  result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14417
14418
  /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14419
     as the canonical version.  */
14420
0
  if (result == T(V4T_PLUS_V6_M))
14421
0
    {
14422
0
      result = T(V4T);
14423
0
      *secondary_compat_out = T(V6_M);
14424
0
    }
14425
0
  else
14426
0
    *secondary_compat_out = -1;
14427
14428
0
  if (result == -1)
14429
0
    {
14430
0
      _bfd_error_handler (_("error: conflicting CPU architectures %s vs %s in %pB"),
14431
0
        name_table[oldtag], name_table[newtag], ibfd);
14432
0
      return -1;
14433
0
    }
14434
14435
0
  return result;
14436
0
#undef T
14437
0
}
14438
14439
/* Query attributes object to see if integer divide instructions may be
14440
   present in an object.  */
14441
static bool
14442
elf32_arm_attributes_accept_div (const obj_attribute *attr)
14443
0
{
14444
0
  int arch = attr[Tag_CPU_arch].i;
14445
0
  int profile = attr[Tag_CPU_arch_profile].i;
14446
14447
0
  switch (attr[Tag_DIV_use].i)
14448
0
    {
14449
0
    case 0:
14450
      /* Integer divide allowed if instruction contained in archetecture.  */
14451
0
      if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14452
0
  return true;
14453
0
      else if (arch >= TAG_CPU_ARCH_V7E_M)
14454
0
  return true;
14455
0
      else
14456
0
  return false;
14457
14458
0
    case 1:
14459
      /* Integer divide explicitly prohibited.  */
14460
0
      return false;
14461
14462
0
    default:
14463
      /* Unrecognised case - treat as allowing divide everywhere.  */
14464
0
    case 2:
14465
      /* Integer divide allowed in ARM state.  */
14466
0
      return true;
14467
0
    }
14468
0
}
14469
14470
/* Query attributes object to see if integer divide instructions are
14471
   forbidden to be in the object.  This is not the inverse of
14472
   elf32_arm_attributes_accept_div.  */
14473
static bool
14474
elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14475
0
{
14476
0
  return attr[Tag_DIV_use].i == 1;
14477
0
}
14478
14479
/* Merge EABI object attributes from IBFD into OBFD.  Raise an error if there
14480
   are conflicting attributes.  */
14481
14482
static bool
14483
elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14484
0
{
14485
0
  bfd *obfd = info->output_bfd;
14486
0
  obj_attribute *in_attr;
14487
0
  obj_attribute *out_attr;
14488
  /* Some tags have 0 = don't care, 1 = strong requirement,
14489
     2 = weak requirement.  */
14490
0
  static const int order_021[3] = {0, 2, 1};
14491
0
  int i;
14492
0
  bool result = true;
14493
0
  const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14494
14495
  /* Skip the linker stubs file.  This preserves previous behavior
14496
     of accepting unknown attributes in the first input file - but
14497
     is that a bug?  */
14498
0
  if (ibfd->flags & BFD_LINKER_CREATED)
14499
0
    return true;
14500
14501
  /* Skip any input that hasn't attribute section.
14502
     This enables to link object files without attribute section with
14503
     any others.  */
14504
0
  if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14505
0
    return true;
14506
14507
0
  if (!elf_known_obj_attributes_proc (obfd)[0].i)
14508
0
    {
14509
      /* This is the first object.  Copy the attributes.  */
14510
0
      _bfd_elf_copy_obj_attributes (ibfd, obfd);
14511
14512
0
      out_attr = elf_known_obj_attributes_proc (obfd);
14513
14514
      /* Use the Tag_null value to indicate the attributes have been
14515
   initialized.  */
14516
0
      out_attr[0].i = 1;
14517
14518
      /* We do not output objects with Tag_MPextension_use_legacy - we move
14519
   the attribute's value to Tag_MPextension_use.  */
14520
0
      if (out_attr[Tag_MPextension_use_legacy].i != 0)
14521
0
  {
14522
0
    if (out_attr[Tag_MPextension_use].i != 0
14523
0
        && out_attr[Tag_MPextension_use_legacy].i
14524
0
    != out_attr[Tag_MPextension_use].i)
14525
0
      {
14526
0
        _bfd_error_handler
14527
0
    (_("Error: %pB has both the current and legacy "
14528
0
       "Tag_MPextension_use attributes"), ibfd);
14529
0
        result = false;
14530
0
      }
14531
14532
0
    out_attr[Tag_MPextension_use] =
14533
0
      out_attr[Tag_MPextension_use_legacy];
14534
0
    out_attr[Tag_MPextension_use_legacy].type = 0;
14535
0
    out_attr[Tag_MPextension_use_legacy].i = 0;
14536
0
  }
14537
14538
      /* PR 28859 and 28848:  Handle the case where the first input file,
14539
   eg crti.o, has a Tag_ABI_HardFP_use of 3 but no Tag_FP_arch set.
14540
   Using Tag_ABI_HardFP_use in this way is deprecated, so reset the
14541
   attribute to zero.
14542
   FIXME: Should we handle other non-zero values of Tag_ABI_HardFO_use ? */
14543
0
      if (out_attr[Tag_ABI_HardFP_use].i == 3 && out_attr[Tag_FP_arch].i == 0)
14544
0
  out_attr[Tag_ABI_HardFP_use].i = 0;
14545
14546
0
      return result;
14547
0
    }
14548
14549
0
  in_attr = elf_known_obj_attributes_proc (ibfd);
14550
0
  out_attr = elf_known_obj_attributes_proc (obfd);
14551
  /* This needs to happen before Tag_ABI_FP_number_model is merged.  */
14552
0
  if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14553
0
    {
14554
      /* Ignore mismatches if the object doesn't use floating point or is
14555
   floating point ABI independent.  */
14556
0
      if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14557
0
    || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14558
0
        && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14559
0
  out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14560
0
      else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14561
0
         && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14562
0
  {
14563
0
    _bfd_error_handler
14564
0
      (_("error: %pB uses VFP register arguments, %pB does not"),
14565
0
       in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14566
0
       in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14567
0
    result = false;
14568
0
  }
14569
0
    }
14570
14571
0
  for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14572
0
    {
14573
      /* Merge this attribute with existing attributes.  */
14574
0
      switch (i)
14575
0
  {
14576
0
  case Tag_CPU_raw_name:
14577
0
  case Tag_CPU_name:
14578
    /* These are merged after Tag_CPU_arch.  */
14579
0
    break;
14580
14581
0
  case Tag_ABI_optimization_goals:
14582
0
  case Tag_ABI_FP_optimization_goals:
14583
    /* Use the first value seen.  */
14584
0
    break;
14585
14586
0
  case Tag_CPU_arch:
14587
0
    {
14588
0
      int secondary_compat = -1, secondary_compat_out = -1;
14589
0
      unsigned int saved_out_attr = out_attr[i].i;
14590
0
      int arch_attr;
14591
0
      static const char *name_table[] =
14592
0
        {
14593
    /* These aren't real CPU names, but we can't guess
14594
       that from the architecture version alone.  */
14595
0
    "Pre v4",
14596
0
    "ARM v4",
14597
0
    "ARM v4T",
14598
0
    "ARM v5T",
14599
0
    "ARM v5TE",
14600
0
    "ARM v5TEJ",
14601
0
    "ARM v6",
14602
0
    "ARM v6KZ",
14603
0
    "ARM v6T2",
14604
0
    "ARM v6K",
14605
0
    "ARM v7",
14606
0
    "ARM v6-M",
14607
0
    "ARM v6S-M",
14608
0
    "ARM v7E-M",
14609
0
    "ARM v8",
14610
0
    "ARM v8-R",
14611
0
    "ARM v8-M.baseline",
14612
0
    "ARM v8-M.mainline",
14613
0
    "ARM v8.1-A",
14614
0
    "ARM v8.2-A",
14615
0
    "ARM v8.3-A",
14616
0
    "ARM v8.1-M.mainline",
14617
0
    "ARM v9",
14618
0
      };
14619
14620
      /* Merge Tag_CPU_arch and Tag_also_compatible_with.  */
14621
0
      secondary_compat = get_secondary_compatible_arch (ibfd);
14622
0
      secondary_compat_out = get_secondary_compatible_arch (obfd);
14623
0
      arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14624
0
                &secondary_compat_out,
14625
0
                in_attr[i].i,
14626
0
                secondary_compat,
14627
0
                name_table);
14628
14629
      /* Return with error if failed to merge.  */
14630
0
      if (arch_attr == -1)
14631
0
        return false;
14632
14633
0
      out_attr[i].i = arch_attr;
14634
14635
0
      set_secondary_compatible_arch (obfd, secondary_compat_out);
14636
14637
      /* Merge Tag_CPU_name and Tag_CPU_raw_name.  */
14638
0
      if (out_attr[i].i == saved_out_attr)
14639
0
        ; /* Leave the names alone.  */
14640
0
      else if (out_attr[i].i == in_attr[i].i)
14641
0
        {
14642
    /* The output architecture has been changed to match the
14643
       input architecture.  Use the input names.  */
14644
0
    out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14645
0
      ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14646
0
      : NULL;
14647
0
    out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14648
0
      ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14649
0
      : NULL;
14650
0
        }
14651
0
      else
14652
0
        {
14653
0
    out_attr[Tag_CPU_name].s = NULL;
14654
0
    out_attr[Tag_CPU_raw_name].s = NULL;
14655
0
        }
14656
14657
      /* If we still don't have a value for Tag_CPU_name,
14658
         make one up now.  Tag_CPU_raw_name remains blank.  */
14659
0
      if (out_attr[Tag_CPU_name].s == NULL
14660
0
    && out_attr[i].i < ARRAY_SIZE (name_table))
14661
0
        out_attr[Tag_CPU_name].s =
14662
0
    _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14663
0
    }
14664
0
    break;
14665
14666
0
  case Tag_ARM_ISA_use:
14667
0
  case Tag_THUMB_ISA_use:
14668
0
  case Tag_WMMX_arch:
14669
0
  case Tag_Advanced_SIMD_arch:
14670
    /* ??? Do Advanced_SIMD (NEON) and WMMX conflict?  */
14671
0
  case Tag_ABI_FP_rounding:
14672
0
  case Tag_ABI_FP_exceptions:
14673
0
  case Tag_ABI_FP_user_exceptions:
14674
0
  case Tag_ABI_FP_number_model:
14675
0
  case Tag_FP_HP_extension:
14676
0
  case Tag_CPU_unaligned_access:
14677
0
  case Tag_T2EE_use:
14678
0
  case Tag_MPextension_use:
14679
0
  case Tag_MVE_arch:
14680
0
  case Tag_PAC_extension:
14681
0
  case Tag_BTI_extension:
14682
0
  case Tag_BTI_use:
14683
0
  case Tag_PACRET_use:
14684
    /* Use the largest value specified.  */
14685
0
    if (in_attr[i].i > out_attr[i].i)
14686
0
      out_attr[i].i = in_attr[i].i;
14687
0
    break;
14688
14689
0
  case Tag_ABI_align_preserved:
14690
0
  case Tag_ABI_PCS_RO_data:
14691
    /* Use the smallest value specified.  */
14692
0
    if (in_attr[i].i < out_attr[i].i)
14693
0
      out_attr[i].i = in_attr[i].i;
14694
0
    break;
14695
14696
0
  case Tag_ABI_align_needed:
14697
0
    if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14698
0
        && (in_attr[Tag_ABI_align_preserved].i == 0
14699
0
      || out_attr[Tag_ABI_align_preserved].i == 0))
14700
0
      {
14701
        /* This error message should be enabled once all non-conformant
14702
     binaries in the toolchain have had the attributes set
14703
     properly.
14704
        _bfd_error_handler
14705
    (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14706
     obfd, ibfd);
14707
        result = false; */
14708
0
      }
14709
    /* Fall through.  */
14710
0
  case Tag_ABI_FP_denormal:
14711
0
  case Tag_ABI_PCS_GOT_use:
14712
    /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14713
       value if greater than 2 (for future-proofing).  */
14714
0
    if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14715
0
        || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14716
0
      && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14717
0
      out_attr[i].i = in_attr[i].i;
14718
0
    break;
14719
14720
0
  case Tag_Virtualization_use:
14721
    /* The virtualization tag effectively stores two bits of
14722
       information: the intended use of TrustZone (in bit 0), and the
14723
       intended use of Virtualization (in bit 1).  */
14724
0
    if (out_attr[i].i == 0)
14725
0
      out_attr[i].i = in_attr[i].i;
14726
0
    else if (in_attr[i].i != 0
14727
0
       && in_attr[i].i != out_attr[i].i)
14728
0
      {
14729
0
        if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14730
0
    out_attr[i].i = 3;
14731
0
        else
14732
0
    {
14733
0
      _bfd_error_handler
14734
0
        (_("error: %pB: unable to merge virtualization attributes "
14735
0
           "with %pB"),
14736
0
         obfd, ibfd);
14737
0
      result = false;
14738
0
    }
14739
0
      }
14740
0
    break;
14741
14742
0
  case Tag_CPU_arch_profile:
14743
0
    if (out_attr[i].i != in_attr[i].i)
14744
0
      {
14745
        /* 0 will merge with anything.
14746
     'A' and 'S' merge to 'A'.
14747
     'R' and 'S' merge to 'R'.
14748
     'M' and 'A|R|S' is an error.  */
14749
0
        if (out_attr[i].i == 0
14750
0
      || (out_attr[i].i == 'S'
14751
0
          && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14752
0
    out_attr[i].i = in_attr[i].i;
14753
0
        else if (in_attr[i].i == 0
14754
0
           || (in_attr[i].i == 'S'
14755
0
         && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14756
0
    ; /* Do nothing.  */
14757
0
        else
14758
0
    {
14759
0
      _bfd_error_handler
14760
0
        (_("error: %pB: conflicting architecture profiles %c/%c"),
14761
0
         ibfd,
14762
0
         in_attr[i].i ? in_attr[i].i : '0',
14763
0
         out_attr[i].i ? out_attr[i].i : '0');
14764
0
      result = false;
14765
0
    }
14766
0
      }
14767
0
    break;
14768
14769
0
  case Tag_DSP_extension:
14770
    /* No need to change output value if any of:
14771
       - pre (<=) ARMv5T input architecture (do not have DSP)
14772
       - M input profile not ARMv7E-M and do not have DSP.  */
14773
0
    if (in_attr[Tag_CPU_arch].i <= 3
14774
0
        || (in_attr[Tag_CPU_arch_profile].i == 'M'
14775
0
      && in_attr[Tag_CPU_arch].i != 13
14776
0
      && in_attr[i].i == 0))
14777
0
      ; /* Do nothing.  */
14778
    /* Output value should be 0 if DSP part of architecture, ie.
14779
       - post (>=) ARMv5te architecture output
14780
       - A, R or S profile output or ARMv7E-M output architecture.  */
14781
0
    else if (out_attr[Tag_CPU_arch].i >= 4
14782
0
       && (out_attr[Tag_CPU_arch_profile].i == 'A'
14783
0
           || out_attr[Tag_CPU_arch_profile].i == 'R'
14784
0
           || out_attr[Tag_CPU_arch_profile].i == 'S'
14785
0
           || out_attr[Tag_CPU_arch].i == 13))
14786
0
      out_attr[i].i = 0;
14787
    /* Otherwise, DSP instructions are added and not part of output
14788
       architecture.  */
14789
0
    else
14790
0
      out_attr[i].i = 1;
14791
0
    break;
14792
14793
0
  case Tag_FP_arch:
14794
0
      {
14795
        /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14796
     the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14797
     when it's 0.  It might mean absence of FP hardware if
14798
     Tag_FP_arch is zero.  */
14799
14800
0
#define VFP_VERSION_COUNT 9
14801
0
        static const struct
14802
0
        {
14803
0
      int ver;
14804
0
      int regs;
14805
0
        } vfp_versions[VFP_VERSION_COUNT] =
14806
0
    {
14807
0
      {0, 0},
14808
0
      {1, 16},
14809
0
      {2, 16},
14810
0
      {3, 32},
14811
0
      {3, 16},
14812
0
      {4, 32},
14813
0
      {4, 16},
14814
0
      {8, 32},
14815
0
      {8, 16}
14816
0
    };
14817
0
        int ver;
14818
0
        int regs;
14819
0
        int newval;
14820
14821
        /* If the output has no requirement about FP hardware,
14822
     follow the requirement of the input.  */
14823
0
        if (out_attr[i].i == 0)
14824
0
    {
14825
      /* This assert is still reasonable, we shouldn't
14826
         produce the suspicious build attribute
14827
         combination (See below for in_attr).  */
14828
0
      BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14829
0
      out_attr[i].i = in_attr[i].i;
14830
0
      out_attr[Tag_ABI_HardFP_use].i
14831
0
        = in_attr[Tag_ABI_HardFP_use].i;
14832
0
      break;
14833
0
    }
14834
        /* If the input has no requirement about FP hardware, do
14835
     nothing.  */
14836
0
        else if (in_attr[i].i == 0)
14837
0
    {
14838
      /* We used to assert that Tag_ABI_HardFP_use was
14839
         zero here, but we should never assert when
14840
         consuming an object file that has suspicious
14841
         build attributes.  The single precision variant
14842
         of 'no FP architecture' is still 'no FP
14843
         architecture', so we just ignore the tag in this
14844
         case.  */
14845
0
      break;
14846
0
    }
14847
14848
        /* Both the input and the output have nonzero Tag_FP_arch.
14849
     So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero.  */
14850
14851
        /* If both the input and the output have zero Tag_ABI_HardFP_use,
14852
     do nothing.  */
14853
0
        if (in_attr[Tag_ABI_HardFP_use].i == 0
14854
0
      && out_attr[Tag_ABI_HardFP_use].i == 0)
14855
0
    ;
14856
        /* If the input and the output have different Tag_ABI_HardFP_use,
14857
     the combination of them is 0 (implied by Tag_FP_arch).  */
14858
0
        else if (in_attr[Tag_ABI_HardFP_use].i
14859
0
           != out_attr[Tag_ABI_HardFP_use].i)
14860
0
    out_attr[Tag_ABI_HardFP_use].i = 0;
14861
14862
        /* Now we can handle Tag_FP_arch.  */
14863
14864
        /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14865
     pick the biggest.  */
14866
0
        if (in_attr[i].i >= VFP_VERSION_COUNT
14867
0
      && in_attr[i].i > out_attr[i].i)
14868
0
    {
14869
0
      out_attr[i] = in_attr[i];
14870
0
      break;
14871
0
    }
14872
        /* The output uses the superset of input features
14873
     (ISA version) and registers.  */
14874
0
        ver = vfp_versions[in_attr[i].i].ver;
14875
0
        if (ver < vfp_versions[out_attr[i].i].ver)
14876
0
    ver = vfp_versions[out_attr[i].i].ver;
14877
0
        regs = vfp_versions[in_attr[i].i].regs;
14878
0
        if (regs < vfp_versions[out_attr[i].i].regs)
14879
0
    regs = vfp_versions[out_attr[i].i].regs;
14880
        /* This assumes all possible supersets are also a valid
14881
     options.  */
14882
0
        for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14883
0
    {
14884
0
      if (regs == vfp_versions[newval].regs
14885
0
          && ver == vfp_versions[newval].ver)
14886
0
        break;
14887
0
    }
14888
0
        out_attr[i].i = newval;
14889
0
      }
14890
0
    break;
14891
0
  case Tag_PCS_config:
14892
0
    if (out_attr[i].i == 0)
14893
0
      out_attr[i].i = in_attr[i].i;
14894
0
    else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14895
0
      {
14896
        /* It's sometimes ok to mix different configs, so this is only
14897
     a warning.  */
14898
0
        _bfd_error_handler
14899
0
    (_("warning: %pB: conflicting platform configuration"), ibfd);
14900
0
      }
14901
0
    break;
14902
0
  case Tag_ABI_PCS_R9_use:
14903
0
    if (in_attr[i].i != out_attr[i].i
14904
0
        && out_attr[i].i != AEABI_R9_unused
14905
0
        && in_attr[i].i != AEABI_R9_unused)
14906
0
      {
14907
0
        _bfd_error_handler
14908
0
    (_("error: %pB: conflicting use of R9"), ibfd);
14909
0
        result = false;
14910
0
      }
14911
0
    if (out_attr[i].i == AEABI_R9_unused)
14912
0
      out_attr[i].i = in_attr[i].i;
14913
0
    break;
14914
0
  case Tag_ABI_PCS_RW_data:
14915
0
    if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14916
0
        && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14917
0
        && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14918
0
      {
14919
0
        _bfd_error_handler
14920
0
    (_("error: %pB: SB relative addressing conflicts with use of R9"),
14921
0
     ibfd);
14922
0
        result = false;
14923
0
      }
14924
    /* Use the smallest value specified.  */
14925
0
    if (in_attr[i].i < out_attr[i].i)
14926
0
      out_attr[i].i = in_attr[i].i;
14927
0
    break;
14928
0
  case Tag_ABI_PCS_wchar_t:
14929
0
    if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14930
0
        && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14931
0
      {
14932
0
        _bfd_error_handler
14933
0
    (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14934
0
     ibfd, in_attr[i].i, out_attr[i].i);
14935
0
      }
14936
0
    else if (in_attr[i].i && !out_attr[i].i)
14937
0
      out_attr[i].i = in_attr[i].i;
14938
0
    break;
14939
0
  case Tag_ABI_enum_size:
14940
0
    if (in_attr[i].i != AEABI_enum_unused)
14941
0
      {
14942
0
        if (out_attr[i].i == AEABI_enum_unused
14943
0
      || out_attr[i].i == AEABI_enum_forced_wide)
14944
0
    {
14945
      /* The existing object is compatible with anything.
14946
         Use whatever requirements the new object has.  */
14947
0
      out_attr[i].i = in_attr[i].i;
14948
0
    }
14949
0
        else if (in_attr[i].i != AEABI_enum_forced_wide
14950
0
           && out_attr[i].i != in_attr[i].i
14951
0
           && !elf_arm_tdata (obfd)->no_enum_size_warning)
14952
0
    {
14953
0
      static const char *aeabi_enum_names[] =
14954
0
        { "", "variable-size", "32-bit", "" };
14955
0
      const char *in_name =
14956
0
        in_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14957
0
        ? aeabi_enum_names[in_attr[i].i]
14958
0
        : "<unknown>";
14959
0
      const char *out_name =
14960
0
        out_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
14961
0
        ? aeabi_enum_names[out_attr[i].i]
14962
0
        : "<unknown>";
14963
0
      _bfd_error_handler
14964
0
        (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14965
0
         ibfd, in_name, out_name);
14966
0
    }
14967
0
      }
14968
0
    break;
14969
0
  case Tag_ABI_VFP_args:
14970
    /* Aready done.  */
14971
0
    break;
14972
0
  case Tag_ABI_WMMX_args:
14973
0
    if (in_attr[i].i != out_attr[i].i)
14974
0
      {
14975
0
        _bfd_error_handler
14976
0
    (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14977
0
     ibfd, obfd);
14978
0
        result = false;
14979
0
      }
14980
0
    break;
14981
0
  case Tag_compatibility:
14982
    /* Merged in target-independent code.  */
14983
0
    break;
14984
0
  case Tag_ABI_HardFP_use:
14985
    /* This is handled along with Tag_FP_arch.  */
14986
0
    break;
14987
0
  case Tag_ABI_FP_16bit_format:
14988
0
    if (in_attr[i].i != 0 && out_attr[i].i != 0)
14989
0
      {
14990
0
        if (in_attr[i].i != out_attr[i].i)
14991
0
    {
14992
0
      _bfd_error_handler
14993
0
        (_("error: fp16 format mismatch between %pB and %pB"),
14994
0
         ibfd, obfd);
14995
0
      result = false;
14996
0
    }
14997
0
      }
14998
0
    if (in_attr[i].i != 0)
14999
0
      out_attr[i].i = in_attr[i].i;
15000
0
    break;
15001
15002
0
  case Tag_DIV_use:
15003
    /* A value of zero on input means that the divide instruction may
15004
       be used if available in the base architecture as specified via
15005
       Tag_CPU_arch and Tag_CPU_arch_profile.  A value of 1 means that
15006
       the user did not want divide instructions.  A value of 2
15007
       explicitly means that divide instructions were allowed in ARM
15008
       and Thumb state.  */
15009
0
    if (in_attr[i].i == out_attr[i].i)
15010
0
      /* Do nothing.  */ ;
15011
0
    else if (elf32_arm_attributes_forbid_div (in_attr)
15012
0
       && !elf32_arm_attributes_accept_div (out_attr))
15013
0
      out_attr[i].i = 1;
15014
0
    else if (elf32_arm_attributes_forbid_div (out_attr)
15015
0
       && elf32_arm_attributes_accept_div (in_attr))
15016
0
      out_attr[i].i = in_attr[i].i;
15017
0
    else if (in_attr[i].i == 2)
15018
0
      out_attr[i].i = in_attr[i].i;
15019
0
    break;
15020
15021
0
  case Tag_MPextension_use_legacy:
15022
    /* We don't output objects with Tag_MPextension_use_legacy - we
15023
       move the value to Tag_MPextension_use.  */
15024
0
    if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
15025
0
      {
15026
0
        if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
15027
0
    {
15028
0
      _bfd_error_handler
15029
0
        (_("%pB has both the current and legacy "
15030
0
           "Tag_MPextension_use attributes"),
15031
0
         ibfd);
15032
0
      result = false;
15033
0
    }
15034
0
      }
15035
15036
0
    if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15037
0
      out_attr[Tag_MPextension_use] = in_attr[i];
15038
15039
0
    break;
15040
15041
0
  case Tag_nodefaults:
15042
    /* This tag is set if it exists, but the value is unused (and is
15043
       typically zero).  We don't actually need to do anything here -
15044
       the merge happens automatically when the type flags are merged
15045
       below.  */
15046
0
    break;
15047
0
  case Tag_also_compatible_with:
15048
    /* Already done in Tag_CPU_arch.  */
15049
0
    break;
15050
0
  case Tag_conformance:
15051
    /* Keep the attribute if it matches.  Throw it away otherwise.
15052
       No attribute means no claim to conform.  */
15053
0
    if (!in_attr[i].s || !out_attr[i].s
15054
0
        || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15055
0
      out_attr[i].s = NULL;
15056
0
    break;
15057
15058
0
  default:
15059
0
    result
15060
0
      = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15061
0
  }
15062
15063
      /* If out_attr was copied from in_attr then it won't have a type yet.  */
15064
0
      if (in_attr[i].type && !out_attr[i].type)
15065
0
  out_attr[i].type = in_attr[i].type;
15066
0
    }
15067
15068
  /* Merge Tag_compatibility attributes and any common GNU ones.  */
15069
0
  if (!_bfd_elf_merge_object_attributes (ibfd, info))
15070
0
    return false;
15071
15072
  /* Check for any attributes not known on ARM.  */
15073
0
  result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15074
15075
0
  return result;
15076
0
}
15077
15078
15079
/* Return TRUE if the two EABI versions are incompatible.  */
15080
15081
static bool
15082
elf32_arm_versions_compatible (unsigned iver, unsigned over)
15083
0
{
15084
  /* v4 and v5 are the same spec before and after it was released,
15085
     so allow mixing them.  */
15086
0
  if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15087
0
      || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15088
0
    return true;
15089
15090
0
  return (iver == over);
15091
0
}
15092
15093
/* Merge backend specific data from an object file to the output
15094
   object file when linking.  */
15095
15096
static bool
15097
elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15098
15099
/* Display the flags field.  */
15100
15101
static bool
15102
elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15103
221
{
15104
221
  FILE * file = (FILE *) ptr;
15105
221
  unsigned long flags;
15106
15107
221
  BFD_ASSERT (abfd != NULL && ptr != NULL);
15108
15109
  /* Print normal ELF private data.  */
15110
221
  _bfd_elf_print_private_bfd_data (abfd, ptr);
15111
15112
221
  flags = elf_elfheader (abfd)->e_flags;
15113
  /* Ignore init flag - it may not be set, despite the flags field
15114
     containing valid data.  */
15115
15116
221
  fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
15117
15118
221
  switch (EF_ARM_EABI_VERSION (flags))
15119
221
    {
15120
135
    case EF_ARM_EABI_UNKNOWN:
15121
      /* The following flag bits are GNU extensions and not part of the
15122
   official ARM ELF extended ABI.  Hence they are only decoded if
15123
   the EABI version is not set.  */
15124
135
      if (flags & EF_ARM_INTERWORK)
15125
43
  fprintf (file, _(" [interworking enabled]"));
15126
15127
135
      if (flags & EF_ARM_APCS_26)
15128
44
  fprintf (file, " [APCS-26]");
15129
91
      else
15130
91
  fprintf (file, " [APCS-32]");
15131
15132
135
      if (flags & EF_ARM_VFP_FLOAT)
15133
11
  fprintf (file, _(" [VFP float format]"));
15134
124
      else
15135
124
  fprintf (file, _(" [FPA float format]"));
15136
15137
135
      if (flags & EF_ARM_APCS_FLOAT)
15138
43
  fprintf (file, _(" [floats passed in float registers]"));
15139
15140
135
      if (flags & EF_ARM_PIC)
15141
45
  fprintf (file, _(" [position independent]"));
15142
15143
135
      if (flags & EF_ARM_NEW_ABI)
15144
42
  fprintf (file, _(" [new ABI]"));
15145
15146
135
      if (flags & EF_ARM_OLD_ABI)
15147
81
  fprintf (file, _(" [old ABI]"));
15148
15149
135
      if (flags & EF_ARM_SOFT_FLOAT)
15150
9
  fprintf (file, _(" [software FP]"));
15151
15152
135
      flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15153
135
     | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15154
135
     | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT);
15155
135
      break;
15156
15157
0
    case EF_ARM_EABI_VER1:
15158
0
      fprintf (file, _(" [Version1 EABI]"));
15159
15160
0
      if (flags & EF_ARM_SYMSARESORTED)
15161
0
  fprintf (file, _(" [sorted symbol table]"));
15162
0
      else
15163
0
  fprintf (file, _(" [unsorted symbol table]"));
15164
15165
0
      flags &= ~ EF_ARM_SYMSARESORTED;
15166
0
      break;
15167
15168
1
    case EF_ARM_EABI_VER2:
15169
1
      fprintf (file, _(" [Version2 EABI]"));
15170
15171
1
      if (flags & EF_ARM_SYMSARESORTED)
15172
0
  fprintf (file, _(" [sorted symbol table]"));
15173
1
      else
15174
1
  fprintf (file, _(" [unsorted symbol table]"));
15175
15176
1
      if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15177
0
  fprintf (file, _(" [dynamic symbols use segment index]"));
15178
15179
1
      if (flags & EF_ARM_MAPSYMSFIRST)
15180
0
  fprintf (file, _(" [mapping symbols precede others]"));
15181
15182
1
      flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15183
1
     | EF_ARM_MAPSYMSFIRST);
15184
1
      break;
15185
15186
6
    case EF_ARM_EABI_VER3:
15187
6
      fprintf (file, _(" [Version3 EABI]"));
15188
6
      break;
15189
15190
61
    case EF_ARM_EABI_VER4:
15191
61
      fprintf (file, _(" [Version4 EABI]"));
15192
61
      goto eabi;
15193
15194
5
    case EF_ARM_EABI_VER5:
15195
5
      fprintf (file, _(" [Version5 EABI]"));
15196
15197
5
      if (flags & EF_ARM_ABI_FLOAT_SOFT)
15198
0
  fprintf (file, _(" [soft-float ABI]"));
15199
15200
5
      if (flags & EF_ARM_ABI_FLOAT_HARD)
15201
0
  fprintf (file, _(" [hard-float ABI]"));
15202
15203
5
      flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15204
15205
66
    eabi:
15206
66
      if (flags & EF_ARM_BE8)
15207
1
  fprintf (file, _(" [BE8]"));
15208
15209
66
      if (flags & EF_ARM_LE8)
15210
2
  fprintf (file, _(" [LE8]"));
15211
15212
66
      flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15213
66
      break;
15214
15215
13
    default:
15216
13
      fprintf (file, _(" <EABI version unrecognised>"));
15217
13
      break;
15218
221
    }
15219
15220
221
  flags &= ~ EF_ARM_EABIMASK;
15221
15222
221
  if (flags & EF_ARM_RELEXEC)
15223
47
    fprintf (file, _(" [relocatable executable]"));
15224
15225
221
  if (flags & EF_ARM_PIC)
15226
6
    fprintf (file, _(" [position independent]"));
15227
15228
221
  if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15229
2
    fprintf (file, _(" [FDPIC ABI supplement]"));
15230
15231
221
  flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15232
15233
221
  if (flags)
15234
210
    fprintf (file, _(" <Unrecognised flag bits set>"));
15235
15236
221
  fputc ('\n', file);
15237
15238
221
  return true;
15239
221
}
15240
15241
static int
15242
elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15243
0
{
15244
0
  switch (ELF_ST_TYPE (elf_sym->st_info))
15245
0
    {
15246
0
    case STT_ARM_TFUNC:
15247
0
      return ELF_ST_TYPE (elf_sym->st_info);
15248
15249
0
    case STT_ARM_16BIT:
15250
      /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15251
   This allows us to distinguish between data used by Thumb instructions
15252
   and non-data (which is probably code) inside Thumb regions of an
15253
   executable.  */
15254
0
      if (type != STT_OBJECT && type != STT_TLS)
15255
0
  return ELF_ST_TYPE (elf_sym->st_info);
15256
0
      break;
15257
15258
0
    default:
15259
0
      break;
15260
0
    }
15261
15262
0
  return type;
15263
0
}
15264
15265
static asection *
15266
elf32_arm_gc_mark_hook (asection *sec,
15267
      struct bfd_link_info *info,
15268
      Elf_Internal_Rela *rel,
15269
      struct elf_link_hash_entry *h,
15270
      Elf_Internal_Sym *sym)
15271
0
{
15272
0
  if (h != NULL)
15273
0
    switch (ELF32_R_TYPE (rel->r_info))
15274
0
      {
15275
0
      case R_ARM_GNU_VTINHERIT:
15276
0
      case R_ARM_GNU_VTENTRY:
15277
0
  return NULL;
15278
0
      }
15279
15280
0
  return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15281
0
}
15282
15283
/* Look through the relocs for a section during the first phase.  */
15284
15285
static bool
15286
elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15287
      asection *sec, const Elf_Internal_Rela *relocs)
15288
0
{
15289
0
  Elf_Internal_Shdr *symtab_hdr;
15290
0
  struct elf_link_hash_entry **sym_hashes;
15291
0
  const Elf_Internal_Rela *rel;
15292
0
  const Elf_Internal_Rela *rel_end;
15293
0
  bfd *dynobj;
15294
0
  asection *sreloc;
15295
0
  struct elf32_arm_link_hash_table *htab;
15296
0
  bool call_reloc_p;
15297
0
  bool may_become_dynamic_p;
15298
0
  bool may_need_local_target_p;
15299
0
  unsigned long nsyms;
15300
15301
0
  if (bfd_link_relocatable (info))
15302
0
    return true;
15303
15304
0
  BFD_ASSERT (is_arm_elf (abfd));
15305
15306
0
  htab = elf32_arm_hash_table (info);
15307
0
  if (htab == NULL)
15308
0
    return false;
15309
15310
0
  sreloc = NULL;
15311
15312
0
  if (htab->root.dynobj == NULL)
15313
0
    htab->root.dynobj = abfd;
15314
0
  if (!create_ifunc_sections (info))
15315
0
    return false;
15316
15317
0
  dynobj = htab->root.dynobj;
15318
15319
0
  symtab_hdr = & elf_symtab_hdr (abfd);
15320
0
  sym_hashes = elf_sym_hashes (abfd);
15321
0
  nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15322
15323
0
  rel_end = relocs + sec->reloc_count;
15324
0
  for (rel = relocs; rel < rel_end; rel++)
15325
0
    {
15326
0
      Elf_Internal_Sym *isym;
15327
0
      struct elf_link_hash_entry *h;
15328
0
      struct elf32_arm_link_hash_entry *eh;
15329
0
      unsigned int r_symndx;
15330
0
      int r_type;
15331
15332
0
      r_symndx = ELF32_R_SYM (rel->r_info);
15333
0
      r_type = ELF32_R_TYPE (rel->r_info);
15334
0
      r_type = arm_real_reloc_type (htab, r_type);
15335
15336
0
      if (r_symndx >= nsyms
15337
    /* PR 9934: It is possible to have relocations that do not
15338
       refer to symbols, thus it is also possible to have an
15339
       object file containing relocations but no symbol table.  */
15340
0
    && (r_symndx > STN_UNDEF || nsyms > 0))
15341
0
  {
15342
0
    _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15343
0
            r_symndx);
15344
0
    return false;
15345
0
  }
15346
15347
0
      h = NULL;
15348
0
      isym = NULL;
15349
0
      if (nsyms > 0)
15350
0
  {
15351
0
    if (r_symndx < symtab_hdr->sh_info)
15352
0
      {
15353
        /* A local symbol.  */
15354
0
        isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
15355
0
              abfd, r_symndx);
15356
0
        if (isym == NULL)
15357
0
    return false;
15358
0
      }
15359
0
    else
15360
0
      {
15361
0
        h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15362
0
        while (h->root.type == bfd_link_hash_indirect
15363
0
         || h->root.type == bfd_link_hash_warning)
15364
0
    h = (struct elf_link_hash_entry *) h->root.u.i.link;
15365
0
      }
15366
0
  }
15367
15368
0
      eh = (struct elf32_arm_link_hash_entry *) h;
15369
15370
0
      call_reloc_p = false;
15371
0
      may_become_dynamic_p = false;
15372
0
      may_need_local_target_p = false;
15373
15374
      /* Could be done earlier, if h were already available.  */
15375
0
      r_type = elf32_arm_tls_transition (info, r_type, h);
15376
0
      switch (r_type)
15377
0
  {
15378
0
  case R_ARM_GOTOFFFUNCDESC:
15379
0
    {
15380
0
      if (h == NULL)
15381
0
        {
15382
0
    if (!elf32_arm_allocate_local_sym_info (abfd))
15383
0
      return false;
15384
0
    if (r_symndx >= elf32_arm_num_entries (abfd))
15385
0
      return false;
15386
0
    elf32_arm_local_fdpic_cnts (abfd) [r_symndx].gotofffuncdesc_cnt += 1;
15387
0
    elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15388
0
        }
15389
0
      else
15390
0
        {
15391
0
    eh->fdpic_cnts.gotofffuncdesc_cnt++;
15392
0
        }
15393
0
    }
15394
0
    break;
15395
15396
0
  case R_ARM_GOTFUNCDESC:
15397
0
    {
15398
0
      if (h == NULL)
15399
0
        {
15400
    /* Such a relocation is not supposed to be generated
15401
       by gcc on a static function.  */
15402
    /* Anyway if needed it could be handled.  */
15403
0
    return false;
15404
0
        }
15405
0
      else
15406
0
        {
15407
0
    eh->fdpic_cnts.gotfuncdesc_cnt++;
15408
0
        }
15409
0
    }
15410
0
    break;
15411
15412
0
  case R_ARM_FUNCDESC:
15413
0
    {
15414
0
      if (h == NULL)
15415
0
        {
15416
0
    if (!elf32_arm_allocate_local_sym_info (abfd))
15417
0
      return false;
15418
0
    if (r_symndx >= elf32_arm_num_entries (abfd))
15419
0
      return false;
15420
0
    elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_cnt += 1;
15421
0
    elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
15422
0
        }
15423
0
      else
15424
0
        {
15425
0
    eh->fdpic_cnts.funcdesc_cnt++;
15426
0
        }
15427
0
    }
15428
0
    break;
15429
15430
0
    case R_ARM_GOT32:
15431
0
    case R_ARM_GOT_PREL:
15432
0
    case R_ARM_TLS_GD32:
15433
0
    case R_ARM_TLS_GD32_FDPIC:
15434
0
    case R_ARM_TLS_IE32:
15435
0
    case R_ARM_TLS_IE32_FDPIC:
15436
0
    case R_ARM_TLS_GOTDESC:
15437
0
    case R_ARM_TLS_DESCSEQ:
15438
0
    case R_ARM_THM_TLS_DESCSEQ:
15439
0
    case R_ARM_TLS_CALL:
15440
0
    case R_ARM_THM_TLS_CALL:
15441
      /* This symbol requires a global offset table entry.  */
15442
0
      {
15443
0
        int tls_type, old_tls_type;
15444
15445
0
        switch (r_type)
15446
0
    {
15447
0
    case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15448
0
    case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15449
15450
0
    case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15451
0
    case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15452
15453
0
    case R_ARM_TLS_GOTDESC:
15454
0
    case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15455
0
    case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15456
0
      tls_type = GOT_TLS_GDESC; break;
15457
15458
0
    default: tls_type = GOT_NORMAL; break;
15459
0
    }
15460
15461
0
        if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15462
0
    info->flags |= DF_STATIC_TLS;
15463
15464
0
        if (h != NULL)
15465
0
    {
15466
0
      h->got.refcount++;
15467
0
      old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15468
0
    }
15469
0
        else
15470
0
    {
15471
      /* This is a global offset table entry for a local symbol.  */
15472
0
      if (!elf32_arm_allocate_local_sym_info (abfd))
15473
0
        return false;
15474
0
      if (r_symndx >= elf32_arm_num_entries (abfd))
15475
0
        {
15476
0
          _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15477
0
            r_symndx);
15478
0
          return false;
15479
0
        }
15480
15481
0
      elf_local_got_refcounts (abfd)[r_symndx] += 1;
15482
0
      old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15483
0
    }
15484
15485
        /* If a variable is accessed with both tls methods, two
15486
     slots may be created.  */
15487
0
        if (GOT_TLS_GD_ANY_P (old_tls_type)
15488
0
      && GOT_TLS_GD_ANY_P (tls_type))
15489
0
    tls_type |= old_tls_type;
15490
15491
        /* We will already have issued an error message if there
15492
     is a TLS/non-TLS mismatch, based on the symbol
15493
     type.  So just combine any TLS types needed.  */
15494
0
        if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15495
0
      && tls_type != GOT_NORMAL)
15496
0
    tls_type |= old_tls_type;
15497
15498
        /* If the symbol is accessed in both IE and GDESC
15499
     method, we're able to relax. Turn off the GDESC flag,
15500
     without messing up with any other kind of tls types
15501
     that may be involved.  */
15502
0
        if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15503
0
    tls_type &= ~GOT_TLS_GDESC;
15504
15505
0
        if (old_tls_type != tls_type)
15506
0
    {
15507
0
      if (h != NULL)
15508
0
        elf32_arm_hash_entry (h)->tls_type = tls_type;
15509
0
      else
15510
0
        elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15511
0
    }
15512
0
      }
15513
      /* Fall through.  */
15514
15515
0
    case R_ARM_TLS_LDM32:
15516
0
    case R_ARM_TLS_LDM32_FDPIC:
15517
0
      if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15518
0
    htab->tls_ldm_got.refcount++;
15519
      /* Fall through.  */
15520
15521
0
    case R_ARM_GOTOFF32:
15522
0
    case R_ARM_GOTPC:
15523
0
      if (htab->root.sgot == NULL
15524
0
    && !create_got_section (htab->root.dynobj, info))
15525
0
        return false;
15526
0
      break;
15527
15528
0
    case R_ARM_PC24:
15529
0
    case R_ARM_PLT32:
15530
0
    case R_ARM_CALL:
15531
0
    case R_ARM_JUMP24:
15532
0
    case R_ARM_PREL31:
15533
0
    case R_ARM_THM_CALL:
15534
0
    case R_ARM_THM_JUMP24:
15535
0
    case R_ARM_THM_JUMP19:
15536
0
      call_reloc_p = true;
15537
0
      may_need_local_target_p = true;
15538
0
      break;
15539
15540
0
    case R_ARM_ABS12:
15541
      /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15542
         ldr __GOTT_INDEX__ offsets.  */
15543
0
      if (htab->root.target_os != is_vxworks)
15544
0
        {
15545
0
    may_need_local_target_p = true;
15546
0
    break;
15547
0
        }
15548
0
      else goto jump_over;
15549
15550
      /* Fall through.  */
15551
15552
0
    case R_ARM_MOVW_ABS_NC:
15553
0
    case R_ARM_MOVT_ABS:
15554
0
    case R_ARM_THM_MOVW_ABS_NC:
15555
0
    case R_ARM_THM_MOVT_ABS:
15556
0
      if (bfd_link_pic (info))
15557
0
        {
15558
0
    _bfd_error_handler
15559
0
      (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15560
0
       abfd, elf32_arm_howto_table_1[r_type].name,
15561
0
       (h) ? h->root.root.string : "a local symbol");
15562
0
    bfd_set_error (bfd_error_bad_value);
15563
0
    return false;
15564
0
        }
15565
15566
      /* Fall through.  */
15567
0
    case R_ARM_ABS32:
15568
0
    case R_ARM_ABS32_NOI:
15569
0
  jump_over:
15570
0
      if (h != NULL && bfd_link_executable (info))
15571
0
        {
15572
0
    h->pointer_equality_needed = 1;
15573
0
        }
15574
      /* Fall through.  */
15575
0
    case R_ARM_REL32:
15576
0
    case R_ARM_REL32_NOI:
15577
0
    case R_ARM_MOVW_PREL_NC:
15578
0
    case R_ARM_MOVT_PREL:
15579
0
    case R_ARM_THM_MOVW_PREL_NC:
15580
0
    case R_ARM_THM_MOVT_PREL:
15581
15582
      /* Should the interworking branches be listed here?  */
15583
0
      if ((bfd_link_pic (info)
15584
0
     || htab->fdpic_p)
15585
0
    && (sec->flags & SEC_ALLOC) != 0)
15586
0
        {
15587
0
    if (h == NULL
15588
0
        && elf32_arm_howto_from_type (r_type)->pc_relative)
15589
0
      {
15590
        /* In shared libraries and relocatable executables,
15591
           we treat local relative references as calls;
15592
           see the related SYMBOL_CALLS_LOCAL code in
15593
           allocate_dynrelocs.  */
15594
0
        call_reloc_p = true;
15595
0
        may_need_local_target_p = true;
15596
0
      }
15597
0
    else
15598
      /* We are creating a shared library or relocatable
15599
         executable, and this is a reloc against a global symbol,
15600
         or a non-PC-relative reloc against a local symbol.
15601
         We may need to copy the reloc into the output.  */
15602
0
      may_become_dynamic_p = true;
15603
0
        }
15604
0
      else
15605
0
        may_need_local_target_p = true;
15606
0
      break;
15607
15608
  /* This relocation describes the C++ object vtable hierarchy.
15609
     Reconstruct it for later use during GC.  */
15610
0
  case R_ARM_GNU_VTINHERIT:
15611
0
    if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15612
0
      return false;
15613
0
    break;
15614
15615
  /* This relocation describes which C++ vtable entries are actually
15616
     used.  Record for later use during GC.  */
15617
0
  case R_ARM_GNU_VTENTRY:
15618
0
    if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15619
0
      return false;
15620
0
    break;
15621
0
  }
15622
15623
0
      if (h != NULL)
15624
0
  {
15625
0
    if (call_reloc_p)
15626
      /* We may need a .plt entry if the function this reloc
15627
         refers to is in a different object, regardless of the
15628
         symbol's type.  We can't tell for sure yet, because
15629
         something later might force the symbol local.  */
15630
0
      h->needs_plt = 1;
15631
0
    else if (may_need_local_target_p)
15632
      /* If this reloc is in a read-only section, we might
15633
         need a copy reloc.  We can't check reliably at this
15634
         stage whether the section is read-only, as input
15635
         sections have not yet been mapped to output sections.
15636
         Tentatively set the flag for now, and correct in
15637
         adjust_dynamic_symbol.  */
15638
0
      h->non_got_ref = 1;
15639
0
  }
15640
15641
0
      if (may_need_local_target_p
15642
0
    && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15643
0
  {
15644
0
    union gotplt_union *root_plt;
15645
0
    struct arm_plt_info *arm_plt;
15646
0
    struct arm_local_iplt_info *local_iplt;
15647
15648
0
    if (h != NULL)
15649
0
      {
15650
0
        root_plt = &h->plt;
15651
0
        arm_plt = &eh->plt;
15652
0
      }
15653
0
    else
15654
0
      {
15655
0
        local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15656
0
        if (local_iplt == NULL)
15657
0
    return false;
15658
0
        root_plt = &local_iplt->root;
15659
0
        arm_plt = &local_iplt->arm;
15660
0
      }
15661
15662
    /* If the symbol is a function that doesn't bind locally,
15663
       this relocation will need a PLT entry.  */
15664
0
    if (root_plt->refcount != -1)
15665
0
      root_plt->refcount += 1;
15666
15667
0
    if (!call_reloc_p)
15668
0
      arm_plt->noncall_refcount++;
15669
15670
    /* It's too early to use htab->use_blx here, so we have to
15671
       record possible blx references separately from
15672
       relocs that definitely need a thumb stub.  */
15673
15674
0
    if (r_type == R_ARM_THM_CALL)
15675
0
      arm_plt->maybe_thumb_refcount += 1;
15676
15677
0
    if (r_type == R_ARM_THM_JUMP24
15678
0
        || r_type == R_ARM_THM_JUMP19)
15679
0
      arm_plt->thumb_refcount += 1;
15680
0
  }
15681
15682
0
      if (may_become_dynamic_p)
15683
0
  {
15684
0
    struct elf_dyn_relocs *p, **head;
15685
15686
    /* Create a reloc section in dynobj.  */
15687
0
    if (sreloc == NULL)
15688
0
      {
15689
0
        sreloc = _bfd_elf_make_dynamic_reloc_section
15690
0
    (sec, dynobj, 2, abfd, ! htab->use_rel);
15691
15692
0
        if (sreloc == NULL)
15693
0
    return false;
15694
0
      }
15695
15696
    /* If this is a global symbol, count the number of
15697
       relocations we need for this symbol.  */
15698
0
    if (h != NULL)
15699
0
      head = &h->dyn_relocs;
15700
0
    else
15701
0
      {
15702
0
        head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15703
0
        if (head == NULL)
15704
0
    return false;
15705
0
      }
15706
15707
0
    p = *head;
15708
0
    if (p == NULL || p->sec != sec)
15709
0
      {
15710
0
        size_t amt = sizeof *p;
15711
15712
0
        p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15713
0
        if (p == NULL)
15714
0
    return false;
15715
0
        p->next = *head;
15716
0
        *head = p;
15717
0
        p->sec = sec;
15718
0
        p->count = 0;
15719
0
        p->pc_count = 0;
15720
0
      }
15721
15722
0
    if (elf32_arm_howto_from_type (r_type)->pc_relative)
15723
0
      p->pc_count += 1;
15724
0
    p->count += 1;
15725
0
    if (h == NULL && htab->fdpic_p && !bfd_link_pic (info)
15726
0
        && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI)
15727
0
      {
15728
        /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15729
     that will become rofixup.  */
15730
        /* This is due to the fact that we suppose all will become rofixup.  */
15731
0
        _bfd_error_handler
15732
0
    (_("FDPIC does not yet support %s relocation"
15733
0
       " to become dynamic for executable"),
15734
0
     elf32_arm_howto_table_1[r_type].name);
15735
0
        abort ();
15736
0
      }
15737
0
  }
15738
0
    }
15739
15740
0
  return true;
15741
0
}
15742
15743
static void
15744
elf32_arm_update_relocs (asection *o,
15745
       struct bfd_elf_section_reloc_data *reldata)
15746
0
{
15747
0
  void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15748
0
  void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15749
0
  const struct elf_backend_data *bed;
15750
0
  _arm_elf_section_data *eado;
15751
0
  struct bfd_link_order *p;
15752
0
  bfd_byte *erela_head, *erela;
15753
0
  Elf_Internal_Rela *irela_head, *irela;
15754
0
  Elf_Internal_Shdr *rel_hdr;
15755
0
  bfd *abfd;
15756
0
  unsigned int count;
15757
15758
0
  eado = get_arm_elf_section_data (o);
15759
15760
0
  if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15761
0
    return;
15762
15763
0
  abfd = o->owner;
15764
0
  bed = get_elf_backend_data (abfd);
15765
0
  rel_hdr = reldata->hdr;
15766
15767
0
  if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15768
0
    {
15769
0
      swap_in = bed->s->swap_reloc_in;
15770
0
      swap_out = bed->s->swap_reloc_out;
15771
0
    }
15772
0
  else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15773
0
    {
15774
0
      swap_in = bed->s->swap_reloca_in;
15775
0
      swap_out = bed->s->swap_reloca_out;
15776
0
    }
15777
0
  else
15778
0
    abort ();
15779
15780
0
  erela_head = rel_hdr->contents;
15781
0
  irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15782
0
    ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15783
15784
0
  erela = erela_head;
15785
0
  irela = irela_head;
15786
0
  count = 0;
15787
15788
0
  for (p = o->map_head.link_order; p; p = p->next)
15789
0
    {
15790
0
      if (p->type == bfd_section_reloc_link_order
15791
0
    || p->type == bfd_symbol_reloc_link_order)
15792
0
  {
15793
0
    (*swap_in) (abfd, erela, irela);
15794
0
    erela += rel_hdr->sh_entsize;
15795
0
    irela++;
15796
0
    count++;
15797
0
  }
15798
0
      else if (p->type == bfd_indirect_link_order)
15799
0
  {
15800
0
    struct bfd_elf_section_reloc_data *input_reldata;
15801
0
    arm_unwind_table_edit *edit_list, *edit_tail;
15802
0
    _arm_elf_section_data *eadi;
15803
0
    bfd_size_type j;
15804
0
    bfd_vma offset;
15805
0
    asection *i;
15806
15807
0
    i = p->u.indirect.section;
15808
15809
0
    eadi = get_arm_elf_section_data (i);
15810
0
    edit_list = eadi->u.exidx.unwind_edit_list;
15811
0
    edit_tail = eadi->u.exidx.unwind_edit_tail;
15812
0
    offset = i->output_offset;
15813
15814
0
    if (eadi->elf.rel.hdr &&
15815
0
        eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15816
0
      input_reldata = &eadi->elf.rel;
15817
0
    else if (eadi->elf.rela.hdr &&
15818
0
       eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15819
0
      input_reldata = &eadi->elf.rela;
15820
0
    else
15821
0
      abort ();
15822
15823
0
    if (edit_list)
15824
0
      {
15825
0
        for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15826
0
    {
15827
0
      arm_unwind_table_edit *edit_node, *edit_next;
15828
0
      bfd_vma bias;
15829
0
      bfd_vma reloc_index;
15830
15831
0
      (*swap_in) (abfd, erela, irela);
15832
0
      reloc_index = (irela->r_offset - offset) / 8;
15833
15834
0
      bias = 0;
15835
0
      edit_node = edit_list;
15836
0
      for (edit_next = edit_list;
15837
0
           edit_next && edit_next->index <= reloc_index;
15838
0
           edit_next = edit_node->next)
15839
0
        {
15840
0
          bias++;
15841
0
          edit_node = edit_next;
15842
0
        }
15843
15844
0
      if (edit_node->type != DELETE_EXIDX_ENTRY
15845
0
          || edit_node->index != reloc_index)
15846
0
        {
15847
0
          irela->r_offset -= bias * 8;
15848
0
          irela++;
15849
0
          count++;
15850
0
        }
15851
15852
0
      erela += rel_hdr->sh_entsize;
15853
0
    }
15854
15855
0
        if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15856
0
    {
15857
      /* New relocation entity.  */
15858
0
      asection *text_sec = edit_tail->linked_section;
15859
0
      asection *text_out = text_sec->output_section;
15860
0
      bfd_vma exidx_offset = offset + i->size - 8;
15861
15862
0
      irela->r_addend = 0;
15863
0
      irela->r_offset = exidx_offset;
15864
0
      irela->r_info = ELF32_R_INFO
15865
0
        (text_out->target_index, R_ARM_PREL31);
15866
0
      irela++;
15867
0
      count++;
15868
0
    }
15869
0
      }
15870
0
    else
15871
0
      {
15872
0
        for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15873
0
    {
15874
0
      (*swap_in) (abfd, erela, irela);
15875
0
      erela += rel_hdr->sh_entsize;
15876
0
      irela++;
15877
0
    }
15878
15879
0
        count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15880
0
      }
15881
0
  }
15882
0
    }
15883
15884
0
  reldata->count = count;
15885
0
  rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15886
15887
0
  erela = erela_head;
15888
0
  irela = irela_head;
15889
0
  while (count > 0)
15890
0
    {
15891
0
      (*swap_out) (abfd, irela, erela);
15892
0
      erela += rel_hdr->sh_entsize;
15893
0
      irela++;
15894
0
      count--;
15895
0
    }
15896
15897
0
  free (irela_head);
15898
15899
  /* Hashes are no longer valid.  */
15900
0
  free (reldata->hashes);
15901
0
  reldata->hashes = NULL;
15902
0
}
15903
15904
/* Unwinding tables are not referenced directly.  This pass marks them as
15905
   required if the corresponding code section is marked.  Similarly, ARMv8-M
15906
   secure entry functions can only be referenced by SG veneers which are
15907
   created after the GC process. They need to be marked in case they reside in
15908
   their own section (as would be the case if code was compiled with
15909
   -ffunction-sections).  */
15910
15911
static bool
15912
elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15913
          elf_gc_mark_hook_fn gc_mark_hook)
15914
0
{
15915
0
  bfd *sub;
15916
0
  Elf_Internal_Shdr **elf_shdrp;
15917
0
  asection *cmse_sec;
15918
0
  obj_attribute *out_attr;
15919
0
  Elf_Internal_Shdr *symtab_hdr;
15920
0
  unsigned i, sym_count, ext_start;
15921
0
  const struct elf_backend_data *bed;
15922
0
  struct elf_link_hash_entry **sym_hashes;
15923
0
  struct elf32_arm_link_hash_entry *cmse_hash;
15924
0
  bool again, is_v8m, first_bfd_browse = true;
15925
0
  bool extra_marks_added = false;
15926
0
  asection *isec;
15927
15928
0
  _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15929
15930
0
  out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15931
0
  is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15932
0
     && out_attr[Tag_CPU_arch_profile].i == 'M';
15933
15934
  /* Marking EH data may cause additional code sections to be marked,
15935
     requiring multiple passes.  */
15936
0
  again = true;
15937
0
  while (again)
15938
0
    {
15939
0
      again = false;
15940
0
      for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15941
0
  {
15942
0
    asection *o;
15943
15944
0
    if (! is_arm_elf (sub))
15945
0
      continue;
15946
15947
0
    elf_shdrp = elf_elfsections (sub);
15948
0
    for (o = sub->sections; o != NULL; o = o->next)
15949
0
      {
15950
0
        Elf_Internal_Shdr *hdr;
15951
15952
0
        hdr = &elf_section_data (o)->this_hdr;
15953
0
        if (hdr->sh_type == SHT_ARM_EXIDX
15954
0
      && hdr->sh_link
15955
0
      && hdr->sh_link < elf_numsections (sub)
15956
0
      && !o->gc_mark
15957
0
      && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15958
0
    {
15959
0
      again = true;
15960
0
      if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15961
0
        return false;
15962
0
    }
15963
0
      }
15964
15965
    /* Mark section holding ARMv8-M secure entry functions.  We mark all
15966
       of them so no need for a second browsing.  */
15967
0
    if (is_v8m && first_bfd_browse)
15968
0
      {
15969
0
        bool debug_sec_need_to_be_marked = false;
15970
15971
0
        sym_hashes = elf_sym_hashes (sub);
15972
0
        bed = get_elf_backend_data (sub);
15973
0
        symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15974
0
        sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15975
0
        ext_start = symtab_hdr->sh_info;
15976
15977
        /* Scan symbols.  */
15978
0
        for (i = ext_start; i < sym_count; i++)
15979
0
    {
15980
0
      cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15981
0
      if (cmse_hash == NULL)
15982
0
        continue;
15983
15984
      /* Assume it is a special symbol.  If not, cmse_scan will
15985
         warn about it and user can do something about it.  */
15986
0
      if (startswith (cmse_hash->root.root.root.string,
15987
0
          CMSE_PREFIX))
15988
0
        {
15989
0
          cmse_sec = cmse_hash->root.root.u.def.section;
15990
0
          if (!cmse_sec->gc_mark
15991
0
        && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15992
0
      return false;
15993
          /* The debug sections related to these secure entry
15994
       functions are marked on enabling below flag.  */
15995
0
          debug_sec_need_to_be_marked = true;
15996
0
        }
15997
0
    }
15998
15999
0
        if (debug_sec_need_to_be_marked)
16000
0
    {
16001
      /* Looping over all the sections of the object file containing
16002
         Armv8-M secure entry functions and marking all the debug
16003
         sections.  */
16004
0
      for (isec = sub->sections; isec != NULL; isec = isec->next)
16005
0
        {
16006
          /* If not a debug sections, skip it.  */
16007
0
          if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
16008
0
      {
16009
0
        isec->gc_mark = 1;
16010
0
        extra_marks_added = true;
16011
0
      }
16012
0
        }
16013
0
      debug_sec_need_to_be_marked = false;
16014
0
    }
16015
0
      }
16016
0
  }
16017
16018
0
      first_bfd_browse = false;
16019
0
    }
16020
16021
  /* PR 30354: If we have added extra marks then make sure that any
16022
     dependencies of the newly marked sections are also marked.  */
16023
0
  if (extra_marks_added)
16024
0
    _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
16025
16026
0
  return true;
16027
0
}
16028
16029
/* Treat mapping symbols as special target symbols.  */
16030
16031
static bool
16032
elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
16033
1.85k
{
16034
1.85k
  return bfd_is_arm_special_symbol_name (sym->name,
16035
1.85k
           BFD_ARM_SPECIAL_SYM_TYPE_ANY);
16036
1.85k
}
16037
16038
/* If the ELF symbol SYM might be a function in SEC, return the
16039
   function size and set *CODE_OFF to the function's entry point,
16040
   otherwise return zero.  */
16041
16042
static bfd_size_type
16043
elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
16044
            bfd_vma *code_off)
16045
53.7k
{
16046
53.7k
  bfd_size_type size;
16047
53.7k
  elf_symbol_type * elf_sym = (elf_symbol_type *) sym;
16048
16049
53.7k
  if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
16050
53.7k
         | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
16051
53.7k
      || sym->section != sec)
16052
53.4k
    return 0;
16053
16054
240
  size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size;
16055
16056
240
  if (!(sym->flags & BSF_SYNTHETIC))
16057
240
    switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info))
16058
240
      {
16059
131
  case STT_NOTYPE:
16060
    /* Ignore symbols created by the annobin plugin for gcc and clang.
16061
       These symbols are hidden, local, notype and have a size of 0.  */
16062
131
    if (size == 0
16063
131
        && sym->flags & BSF_LOCAL
16064
131
        && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN)
16065
0
      return 0;
16066
    /* Fall through.  */
16067
136
  case STT_FUNC:
16068
136
  case STT_ARM_TFUNC:
16069
    /* FIXME: Allow STT_GNU_IFUNC as well ?  */
16070
136
    break;
16071
104
  default:
16072
104
    return 0;
16073
240
      }
16074
16075
136
  if ((sym->flags & BSF_LOCAL)
16076
136
      && bfd_is_arm_special_symbol_name (sym->name,
16077
133
           BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16078
0
    return 0;
16079
16080
136
  *code_off = sym->value;
16081
16082
  /* Do not return 0 for the function's size.  */
16083
136
  return size ? size : 1;
16084
16085
136
}
16086
16087
static bool
16088
elf32_arm_find_inliner_info (bfd *      abfd,
16089
           const char **  filename_ptr,
16090
           const char **  functionname_ptr,
16091
           unsigned int * line_ptr)
16092
0
{
16093
0
  bool found;
16094
0
  found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16095
0
           functionname_ptr, line_ptr,
16096
0
           & elf_tdata (abfd)->dwarf2_find_line_info);
16097
0
  return found;
16098
0
}
16099
16100
/* Adjust a symbol defined by a dynamic object and referenced by a
16101
   regular object.  The current definition is in some section of the
16102
   dynamic object, but we're not including those sections.  We have to
16103
   change the definition to something the rest of the link can
16104
   understand.  */
16105
16106
static bool
16107
elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16108
         struct elf_link_hash_entry * h)
16109
0
{
16110
0
  bfd * dynobj;
16111
0
  asection *s, *srel;
16112
0
  struct elf32_arm_link_hash_entry * eh;
16113
0
  struct elf32_arm_link_hash_table *globals;
16114
16115
0
  globals = elf32_arm_hash_table (info);
16116
0
  if (globals == NULL)
16117
0
    return false;
16118
16119
0
  dynobj = elf_hash_table (info)->dynobj;
16120
16121
  /* Make sure we know what is going on here.  */
16122
0
  BFD_ASSERT (dynobj != NULL
16123
0
        && (h->needs_plt
16124
0
      || h->type == STT_GNU_IFUNC
16125
0
      || h->is_weakalias
16126
0
      || (h->def_dynamic
16127
0
          && h->ref_regular
16128
0
          && !h->def_regular)));
16129
16130
0
  eh = (struct elf32_arm_link_hash_entry *) h;
16131
16132
  /* If this is a function, put it in the procedure linkage table.  We
16133
     will fill in the contents of the procedure linkage table later,
16134
     when we know the address of the .got section.  */
16135
0
  if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16136
0
    {
16137
      /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16138
   symbol binds locally.  */
16139
0
      if (h->plt.refcount <= 0
16140
0
    || (h->type != STT_GNU_IFUNC
16141
0
        && (SYMBOL_CALLS_LOCAL (info, h)
16142
0
      || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16143
0
          && h->root.type == bfd_link_hash_undefweak))))
16144
0
  {
16145
    /* This case can occur if we saw a PLT32 reloc in an input
16146
       file, but the symbol was never referred to by a dynamic
16147
       object, or if all references were garbage collected.  In
16148
       such a case, we don't actually need to build a procedure
16149
       linkage table, and we can just do a PC24 reloc instead.  */
16150
0
    h->plt.offset = (bfd_vma) -1;
16151
0
    eh->plt.thumb_refcount = 0;
16152
0
    eh->plt.maybe_thumb_refcount = 0;
16153
0
    eh->plt.noncall_refcount = 0;
16154
0
    h->needs_plt = 0;
16155
0
  }
16156
16157
0
      return true;
16158
0
    }
16159
0
  else
16160
0
    {
16161
      /* It's possible that we incorrectly decided a .plt reloc was
16162
   needed for an R_ARM_PC24 or similar reloc to a non-function sym
16163
   in check_relocs.  We can't decide accurately between function
16164
   and non-function syms in check-relocs; Objects loaded later in
16165
   the link may change h->type.  So fix it now.  */
16166
0
      h->plt.offset = (bfd_vma) -1;
16167
0
      eh->plt.thumb_refcount = 0;
16168
0
      eh->plt.maybe_thumb_refcount = 0;
16169
0
      eh->plt.noncall_refcount = 0;
16170
0
    }
16171
16172
  /* If this is a weak symbol, and there is a real definition, the
16173
     processor independent code will have arranged for us to see the
16174
     real definition first, and we can just use the same value.  */
16175
0
  if (h->is_weakalias)
16176
0
    {
16177
0
      struct elf_link_hash_entry *def = weakdef (h);
16178
0
      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16179
0
      h->root.u.def.section = def->root.u.def.section;
16180
0
      h->root.u.def.value = def->root.u.def.value;
16181
0
      return true;
16182
0
    }
16183
16184
  /* If there are no non-GOT references, we do not need a copy
16185
     relocation.  */
16186
0
  if (!h->non_got_ref)
16187
0
    return true;
16188
16189
  /* This is a reference to a symbol defined by a dynamic object which
16190
     is not a function.  */
16191
16192
  /* If we are creating a shared library, we must presume that the
16193
     only references to the symbol are via the global offset table.
16194
     For such cases we need not do anything here; the relocations will
16195
     be handled correctly by relocate_section.  */
16196
0
  if (bfd_link_pic (info))
16197
0
    return true;
16198
16199
  /* We must allocate the symbol in our .dynbss section, which will
16200
     become part of the .bss section of the executable.  There will be
16201
     an entry for this symbol in the .dynsym section.  The dynamic
16202
     object will contain position independent code, so all references
16203
     from the dynamic object to this symbol will go through the global
16204
     offset table.  The dynamic linker will use the .dynsym entry to
16205
     determine the address it must put in the global offset table, so
16206
     both the dynamic object and the regular object will refer to the
16207
     same memory location for the variable.  */
16208
  /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16209
     linker to copy the initial value out of the dynamic object and into
16210
     the runtime process image.  We need to remember the offset into the
16211
     .rel(a).bss section we are going to use.  */
16212
0
  if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16213
0
    {
16214
0
      s = globals->root.sdynrelro;
16215
0
      srel = globals->root.sreldynrelro;
16216
0
    }
16217
0
  else
16218
0
    {
16219
0
      s = globals->root.sdynbss;
16220
0
      srel = globals->root.srelbss;
16221
0
    }
16222
0
  if (info->nocopyreloc == 0
16223
0
      && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16224
0
      && h->size != 0)
16225
0
    {
16226
0
      elf32_arm_allocate_dynrelocs (info, srel, 1);
16227
0
      h->needs_copy = 1;
16228
0
    }
16229
16230
0
  return _bfd_elf_adjust_dynamic_copy (info, h, s);
16231
0
}
16232
16233
/* Allocate space in .plt, .got and associated reloc sections for
16234
   dynamic relocs.  */
16235
16236
static bool
16237
allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16238
0
{
16239
0
  struct bfd_link_info *info;
16240
0
  struct elf32_arm_link_hash_table *htab;
16241
0
  struct elf32_arm_link_hash_entry *eh;
16242
0
  struct elf_dyn_relocs *p;
16243
16244
0
  if (h->root.type == bfd_link_hash_indirect)
16245
0
    return true;
16246
16247
0
  eh = (struct elf32_arm_link_hash_entry *) h;
16248
16249
0
  info = (struct bfd_link_info *) inf;
16250
0
  htab = elf32_arm_hash_table (info);
16251
0
  if (htab == NULL)
16252
0
    return false;
16253
16254
0
  if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16255
0
      && h->plt.refcount > 0)
16256
0
    {
16257
      /* Make sure this symbol is output as a dynamic symbol.
16258
   Undefined weak syms won't yet be marked as dynamic.  */
16259
0
      if (h->dynindx == -1 && !h->forced_local
16260
0
    && h->root.type == bfd_link_hash_undefweak)
16261
0
  {
16262
0
    if (! bfd_elf_link_record_dynamic_symbol (info, h))
16263
0
      return false;
16264
0
  }
16265
16266
      /* If the call in the PLT entry binds locally, the associated
16267
   GOT entry should use an R_ARM_IRELATIVE relocation instead of
16268
   the usual R_ARM_JUMP_SLOT.  Put it in the .iplt section rather
16269
   than the .plt section.  */
16270
0
      if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16271
0
  {
16272
0
    eh->is_iplt = 1;
16273
0
    if (eh->plt.noncall_refcount == 0
16274
0
        && SYMBOL_REFERENCES_LOCAL (info, h))
16275
      /* All non-call references can be resolved directly.
16276
         This means that they can (and in some cases, must)
16277
         resolve directly to the run-time target, rather than
16278
         to the PLT.  That in turns means that any .got entry
16279
         would be equal to the .igot.plt entry, so there's
16280
         no point having both.  */
16281
0
      h->got.refcount = 0;
16282
0
  }
16283
16284
0
      if (bfd_link_pic (info)
16285
0
    || eh->is_iplt
16286
0
    || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16287
0
  {
16288
0
    elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16289
16290
    /* If this symbol is not defined in a regular file, and we are
16291
       not generating a shared library, then set the symbol to this
16292
       location in the .plt.  This is required to make function
16293
       pointers compare as equal between the normal executable and
16294
       the shared library.  */
16295
0
    if (! bfd_link_pic (info)
16296
0
        && !h->def_regular)
16297
0
      {
16298
0
        h->root.u.def.section = htab->root.splt;
16299
0
        h->root.u.def.value = h->plt.offset;
16300
16301
        /* Make sure the function is not marked as Thumb, in case
16302
     it is the target of an ABS32 relocation, which will
16303
     point to the PLT entry.  */
16304
0
        ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16305
0
      }
16306
16307
    /* VxWorks executables have a second set of relocations for
16308
       each PLT entry.  They go in a separate relocation section,
16309
       which is processed by the kernel loader.  */
16310
0
    if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
16311
0
      {
16312
        /* There is a relocation for the initial PLT entry:
16313
     an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_.  */
16314
0
        if (h->plt.offset == htab->plt_header_size)
16315
0
    elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16316
16317
        /* There are two extra relocations for each subsequent
16318
     PLT entry: an R_ARM_32 relocation for the GOT entry,
16319
     and an R_ARM_32 relocation for the PLT entry.  */
16320
0
        elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16321
0
      }
16322
0
  }
16323
0
      else
16324
0
  {
16325
0
    h->plt.offset = (bfd_vma) -1;
16326
0
    h->needs_plt = 0;
16327
0
  }
16328
0
    }
16329
0
  else
16330
0
    {
16331
0
      h->plt.offset = (bfd_vma) -1;
16332
0
      h->needs_plt = 0;
16333
0
    }
16334
16335
0
  eh = (struct elf32_arm_link_hash_entry *) h;
16336
0
  eh->tlsdesc_got = (bfd_vma) -1;
16337
16338
0
  if (h->got.refcount > 0)
16339
0
    {
16340
0
      asection *s;
16341
0
      bool dyn;
16342
0
      int tls_type = elf32_arm_hash_entry (h)->tls_type;
16343
0
      int indx;
16344
16345
      /* Make sure this symbol is output as a dynamic symbol.
16346
   Undefined weak syms won't yet be marked as dynamic.  */
16347
0
      if (htab->root.dynamic_sections_created
16348
0
    && h->dynindx == -1
16349
0
    && !h->forced_local
16350
0
    && h->root.type == bfd_link_hash_undefweak)
16351
0
  {
16352
0
    if (! bfd_elf_link_record_dynamic_symbol (info, h))
16353
0
      return false;
16354
0
  }
16355
16356
0
      s = htab->root.sgot;
16357
0
      h->got.offset = s->size;
16358
16359
0
      if (tls_type == GOT_UNKNOWN)
16360
0
  abort ();
16361
16362
0
      if (tls_type == GOT_NORMAL)
16363
  /* Non-TLS symbols need one GOT slot.  */
16364
0
  s->size += 4;
16365
0
      else
16366
0
  {
16367
0
    if (tls_type & GOT_TLS_GDESC)
16368
0
      {
16369
        /* R_ARM_TLS_DESC needs 2 GOT slots.  */
16370
0
        eh->tlsdesc_got
16371
0
    = (htab->root.sgotplt->size
16372
0
       - elf32_arm_compute_jump_table_size (htab));
16373
0
        htab->root.sgotplt->size += 8;
16374
0
        h->got.offset = (bfd_vma) -2;
16375
        /* plt.got_offset needs to know there's a TLS_DESC
16376
     reloc in the middle of .got.plt.  */
16377
0
        htab->num_tls_desc++;
16378
0
      }
16379
16380
0
    if (tls_type & GOT_TLS_GD)
16381
0
      {
16382
        /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16383
     consecutive GOT slots.  If the symbol is both GD
16384
     and GDESC, got.offset may have been
16385
     overwritten.  */
16386
0
        h->got.offset = s->size;
16387
0
        s->size += 8;
16388
0
      }
16389
16390
0
    if (tls_type & GOT_TLS_IE)
16391
      /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16392
         slot.  */
16393
0
      s->size += 4;
16394
0
  }
16395
16396
0
      dyn = htab->root.dynamic_sections_created;
16397
16398
0
      indx = 0;
16399
0
      if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
16400
0
    && (!bfd_link_pic (info)
16401
0
        || !SYMBOL_REFERENCES_LOCAL (info, h)))
16402
0
  indx = h->dynindx;
16403
16404
0
      if (tls_type != GOT_NORMAL
16405
0
    && (bfd_link_dll (info) || indx != 0)
16406
0
    && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16407
0
        || h->root.type != bfd_link_hash_undefweak))
16408
0
  {
16409
0
    if (tls_type & GOT_TLS_IE)
16410
0
      elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16411
16412
0
    if (tls_type & GOT_TLS_GD)
16413
0
      elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16414
16415
0
    if (tls_type & GOT_TLS_GDESC)
16416
0
      {
16417
0
        elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16418
        /* GDESC needs a trampoline to jump to.  */
16419
0
        htab->tls_trampoline = -1;
16420
0
      }
16421
16422
    /* Only GD needs it.  GDESC just emits one relocation per
16423
       2 entries.  */
16424
0
    if ((tls_type & GOT_TLS_GD) && indx != 0)
16425
0
      elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16426
0
  }
16427
0
      else if (((indx != -1) || htab->fdpic_p)
16428
0
         && !SYMBOL_REFERENCES_LOCAL (info, h))
16429
0
  {
16430
0
    if (htab->root.dynamic_sections_created)
16431
      /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation.  */
16432
0
      elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16433
0
  }
16434
0
      else if (h->type == STT_GNU_IFUNC
16435
0
         && eh->plt.noncall_refcount == 0)
16436
  /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16437
     they all resolve dynamically instead.  Reserve room for the
16438
     GOT entry's R_ARM_IRELATIVE relocation.  */
16439
0
  elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16440
0
      else if (bfd_link_pic (info)
16441
0
         && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16442
  /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation.  */
16443
0
  elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16444
0
      else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16445
  /* Reserve room for rofixup for FDPIC executable.  */
16446
  /* TLS relocs do not need space since they are completely
16447
     resolved.  */
16448
0
  htab->srofixup->size += 4;
16449
0
    }
16450
0
  else
16451
0
    h->got.offset = (bfd_vma) -1;
16452
16453
  /* FDPIC support.  */
16454
0
  if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16455
0
    {
16456
      /* Symbol musn't be exported.  */
16457
0
      if (h->dynindx != -1)
16458
0
  abort ();
16459
16460
      /* We only allocate one function descriptor with its associated
16461
   relocation.  */
16462
0
      if (eh->fdpic_cnts.funcdesc_offset == -1)
16463
0
  {
16464
0
    asection *s = htab->root.sgot;
16465
16466
0
    eh->fdpic_cnts.funcdesc_offset = s->size;
16467
0
    s->size += 8;
16468
    /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups.  */
16469
0
    if (bfd_link_pic (info))
16470
0
      elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16471
0
    else
16472
0
      htab->srofixup->size += 8;
16473
0
  }
16474
0
    }
16475
16476
0
  if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16477
0
    {
16478
0
      asection *s = htab->root.sgot;
16479
16480
0
      if (htab->root.dynamic_sections_created && h->dynindx == -1
16481
0
    && !h->forced_local)
16482
0
  if (! bfd_elf_link_record_dynamic_symbol (info, h))
16483
0
    return false;
16484
16485
0
      if (h->dynindx == -1)
16486
0
  {
16487
    /* We only allocate one function descriptor with its
16488
       associated relocation.  */
16489
0
    if (eh->fdpic_cnts.funcdesc_offset == -1)
16490
0
      {
16491
16492
0
        eh->fdpic_cnts.funcdesc_offset = s->size;
16493
0
        s->size += 8;
16494
        /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16495
     rofixups.  */
16496
0
        if (bfd_link_pic (info))
16497
0
    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16498
0
        else
16499
0
    htab->srofixup->size += 8;
16500
0
      }
16501
0
  }
16502
16503
      /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16504
   R_ARM_RELATIVE/rofixup relocation on it.  */
16505
0
      eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16506
0
      s->size += 4;
16507
0
      if (h->dynindx == -1 && !bfd_link_pic (info))
16508
0
  htab->srofixup->size += 4;
16509
0
      else
16510
0
  elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16511
0
    }
16512
16513
0
  if (eh->fdpic_cnts.funcdesc_cnt > 0)
16514
0
    {
16515
0
      if (htab->root.dynamic_sections_created && h->dynindx == -1
16516
0
    && !h->forced_local)
16517
0
  if (! bfd_elf_link_record_dynamic_symbol (info, h))
16518
0
    return false;
16519
16520
0
      if (h->dynindx == -1)
16521
0
  {
16522
    /* We only allocate one function descriptor with its
16523
       associated relocation.  */
16524
0
    if (eh->fdpic_cnts.funcdesc_offset == -1)
16525
0
      {
16526
0
        asection *s = htab->root.sgot;
16527
16528
0
        eh->fdpic_cnts.funcdesc_offset = s->size;
16529
0
        s->size += 8;
16530
        /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
16531
     rofixups.  */
16532
0
        if (bfd_link_pic (info))
16533
0
    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16534
0
        else
16535
0
    htab->srofixup->size += 8;
16536
0
      }
16537
0
  }
16538
0
      if (h->dynindx == -1 && !bfd_link_pic (info))
16539
0
  {
16540
    /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup.  */
16541
0
    htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16542
0
  }
16543
0
      else
16544
0
  {
16545
    /* Will need one dynamic reloc per reference. will be either
16546
       R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols.  */
16547
0
    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16548
0
          eh->fdpic_cnts.funcdesc_cnt);
16549
0
  }
16550
0
    }
16551
16552
  /* Allocate stubs for exported Thumb functions on v4t.  */
16553
0
  if (!htab->use_blx && h->dynindx != -1
16554
0
      && h->def_regular
16555
0
      && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16556
0
      && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16557
0
    {
16558
0
      struct elf_link_hash_entry * th;
16559
0
      struct bfd_link_hash_entry * bh;
16560
0
      struct elf_link_hash_entry * myh;
16561
0
      char name[1024];
16562
0
      asection *s;
16563
0
      bh = NULL;
16564
      /* Create a new symbol to regist the real location of the function.  */
16565
0
      s = h->root.u.def.section;
16566
0
      sprintf (name, "__real_%s", h->root.root.string);
16567
0
      _bfd_generic_link_add_one_symbol (info, s->owner,
16568
0
          name, BSF_GLOBAL, s,
16569
0
          h->root.u.def.value,
16570
0
          NULL, true, false, &bh);
16571
16572
0
      myh = (struct elf_link_hash_entry *) bh;
16573
0
      myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16574
0
      myh->forced_local = 1;
16575
0
      ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16576
0
      eh->export_glue = myh;
16577
0
      th = record_arm_to_thumb_glue (info, h);
16578
      /* Point the symbol at the stub.  */
16579
0
      h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16580
0
      ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16581
0
      h->root.u.def.section = th->root.u.def.section;
16582
0
      h->root.u.def.value = th->root.u.def.value & ~1;
16583
0
    }
16584
16585
0
  if (h->dyn_relocs == NULL)
16586
0
    return true;
16587
16588
  /* In the shared -Bsymbolic case, discard space allocated for
16589
     dynamic pc-relative relocs against symbols which turn out to be
16590
     defined in regular objects.  For the normal shared case, discard
16591
     space for pc-relative relocs that have become local due to symbol
16592
     visibility changes.  */
16593
16594
0
  if (bfd_link_pic (info)
16595
0
      || htab->fdpic_p)
16596
0
    {
16597
      /* Relocs that use pc_count are PC-relative forms, which will appear
16598
   on something like ".long foo - ." or "movw REG, foo - .".  We want
16599
   calls to protected symbols to resolve directly to the function
16600
   rather than going via the plt.  If people want function pointer
16601
   comparisons to work as expected then they should avoid writing
16602
   assembly like ".long foo - .".  */
16603
0
      if (SYMBOL_CALLS_LOCAL (info, h))
16604
0
  {
16605
0
    struct elf_dyn_relocs **pp;
16606
16607
0
    for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16608
0
      {
16609
0
        p->count -= p->pc_count;
16610
0
        p->pc_count = 0;
16611
0
        if (p->count == 0)
16612
0
    *pp = p->next;
16613
0
        else
16614
0
    pp = &p->next;
16615
0
      }
16616
0
  }
16617
16618
0
      if (htab->root.target_os == is_vxworks)
16619
0
  {
16620
0
    struct elf_dyn_relocs **pp;
16621
16622
0
    for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
16623
0
      {
16624
0
        if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16625
0
    *pp = p->next;
16626
0
        else
16627
0
    pp = &p->next;
16628
0
      }
16629
0
  }
16630
16631
      /* Also discard relocs on undefined weak syms with non-default
16632
   visibility.  */
16633
0
      if (h->dyn_relocs != NULL
16634
0
    && h->root.type == bfd_link_hash_undefweak)
16635
0
  {
16636
0
    if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16637
0
        || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16638
0
      h->dyn_relocs = NULL;
16639
16640
    /* Make sure undefined weak symbols are output as a dynamic
16641
       symbol in PIEs.  */
16642
0
    else if (htab->root.dynamic_sections_created && h->dynindx == -1
16643
0
       && !h->forced_local)
16644
0
      {
16645
0
        if (! bfd_elf_link_record_dynamic_symbol (info, h))
16646
0
    return false;
16647
0
      }
16648
0
  }
16649
0
    }
16650
0
  else
16651
0
    {
16652
      /* For the non-shared case, discard space for relocs against
16653
   symbols which turn out to need copy relocs or are not
16654
   dynamic.  */
16655
16656
0
      if (!h->non_got_ref
16657
0
    && ((h->def_dynamic
16658
0
         && !h->def_regular)
16659
0
        || (htab->root.dynamic_sections_created
16660
0
      && (h->root.type == bfd_link_hash_undefweak
16661
0
          || h->root.type == bfd_link_hash_undefined))))
16662
0
  {
16663
    /* Make sure this symbol is output as a dynamic symbol.
16664
       Undefined weak syms won't yet be marked as dynamic.  */
16665
0
    if (h->dynindx == -1 && !h->forced_local
16666
0
        && h->root.type == bfd_link_hash_undefweak)
16667
0
      {
16668
0
        if (! bfd_elf_link_record_dynamic_symbol (info, h))
16669
0
    return false;
16670
0
      }
16671
16672
    /* If that succeeded, we know we'll be keeping all the
16673
       relocs.  */
16674
0
    if (h->dynindx != -1)
16675
0
      goto keep;
16676
0
  }
16677
16678
0
      h->dyn_relocs = NULL;
16679
16680
0
    keep: ;
16681
0
    }
16682
16683
  /* Finally, allocate space.  */
16684
0
  for (p = h->dyn_relocs; p != NULL; p = p->next)
16685
0
    {
16686
0
      asection *sreloc = elf_section_data (p->sec)->sreloc;
16687
16688
0
      if (h->type == STT_GNU_IFUNC
16689
0
    && eh->plt.noncall_refcount == 0
16690
0
    && SYMBOL_REFERENCES_LOCAL (info, h))
16691
0
  elf32_arm_allocate_irelocs (info, sreloc, p->count);
16692
0
      else if (h->dynindx != -1
16693
0
         && (!bfd_link_pic (info) || !info->symbolic || !h->def_regular))
16694
0
  elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16695
0
      else if (htab->fdpic_p && !bfd_link_pic (info))
16696
0
  htab->srofixup->size += 4 * p->count;
16697
0
      else
16698
0
  elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16699
0
    }
16700
16701
0
  return true;
16702
0
}
16703
16704
void
16705
bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16706
         int byteswap_code)
16707
0
{
16708
0
  struct elf32_arm_link_hash_table *globals;
16709
16710
0
  globals = elf32_arm_hash_table (info);
16711
0
  if (globals == NULL)
16712
0
    return;
16713
16714
0
  globals->byteswap_code = byteswap_code;
16715
0
}
16716
16717
/* Set the sizes of the dynamic sections.  */
16718
16719
static bool
16720
elf32_arm_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16721
            struct bfd_link_info * info)
16722
0
{
16723
0
  bfd * dynobj;
16724
0
  asection * s;
16725
0
  bool relocs;
16726
0
  bfd *ibfd;
16727
0
  struct elf32_arm_link_hash_table *htab;
16728
16729
0
  htab = elf32_arm_hash_table (info);
16730
0
  if (htab == NULL)
16731
0
    return false;
16732
16733
0
  dynobj = elf_hash_table (info)->dynobj;
16734
0
  if (dynobj == NULL)
16735
0
    return true;
16736
16737
0
  check_use_blx (htab);
16738
16739
0
  if (elf_hash_table (info)->dynamic_sections_created)
16740
0
    {
16741
      /* Set the contents of the .interp section to the interpreter.  */
16742
0
      if (bfd_link_executable (info) && !info->nointerp)
16743
0
  {
16744
0
    s = bfd_get_linker_section (dynobj, ".interp");
16745
0
    BFD_ASSERT (s != NULL);
16746
0
    s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16747
0
    s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16748
0
  }
16749
0
    }
16750
16751
  /* Set up .got offsets for local syms, and space for local dynamic
16752
     relocs.  */
16753
0
  for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16754
0
    {
16755
0
      bfd_signed_vma *local_got;
16756
0
      bfd_signed_vma *end_local_got;
16757
0
      struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16758
0
      char *local_tls_type;
16759
0
      bfd_vma *local_tlsdesc_gotent;
16760
0
      bfd_size_type locsymcount;
16761
0
      Elf_Internal_Shdr *symtab_hdr;
16762
0
      asection *srel;
16763
0
      unsigned int symndx;
16764
0
      struct fdpic_local *local_fdpic_cnts;
16765
16766
0
      if (! is_arm_elf (ibfd))
16767
0
  continue;
16768
16769
0
      for (s = ibfd->sections; s != NULL; s = s->next)
16770
0
  {
16771
0
    struct elf_dyn_relocs *p;
16772
16773
0
    for (p = (struct elf_dyn_relocs *)
16774
0
       elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16775
0
      {
16776
0
        if (!bfd_is_abs_section (p->sec)
16777
0
      && bfd_is_abs_section (p->sec->output_section))
16778
0
    {
16779
      /* Input section has been discarded, either because
16780
         it is a copy of a linkonce section or due to
16781
         linker script /DISCARD/, so we'll be discarding
16782
         the relocs too.  */
16783
0
    }
16784
0
        else if (htab->root.target_os == is_vxworks
16785
0
           && strcmp (p->sec->output_section->name,
16786
0
          ".tls_vars") == 0)
16787
0
    {
16788
      /* Relocations in vxworks .tls_vars sections are
16789
         handled specially by the loader.  */
16790
0
    }
16791
0
        else if (p->count != 0)
16792
0
    {
16793
0
      srel = elf_section_data (p->sec)->sreloc;
16794
0
      if (htab->fdpic_p && !bfd_link_pic (info))
16795
0
        htab->srofixup->size += 4 * p->count;
16796
0
      else
16797
0
        elf32_arm_allocate_dynrelocs (info, srel, p->count);
16798
0
      if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16799
0
        info->flags |= DF_TEXTREL;
16800
0
    }
16801
0
      }
16802
0
  }
16803
16804
0
      local_got = elf_local_got_refcounts (ibfd);
16805
0
      if (local_got == NULL)
16806
0
  continue;
16807
16808
0
      symtab_hdr = & elf_symtab_hdr (ibfd);
16809
0
      locsymcount = symtab_hdr->sh_info;
16810
0
      end_local_got = local_got + locsymcount;
16811
0
      local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16812
0
      local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16813
0
      local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16814
0
      local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16815
0
      symndx = 0;
16816
0
      s = htab->root.sgot;
16817
0
      srel = htab->root.srelgot;
16818
0
      for (; local_got < end_local_got;
16819
0
     ++local_got, ++local_iplt_ptr, ++local_tls_type,
16820
0
     ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16821
0
  {
16822
0
    if (symndx >= elf32_arm_num_entries (ibfd))
16823
0
      return false;
16824
16825
0
    *local_tlsdesc_gotent = (bfd_vma) -1;
16826
0
    local_iplt = *local_iplt_ptr;
16827
16828
    /* FDPIC support.  */
16829
0
    if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16830
0
      {
16831
0
        if (local_fdpic_cnts->funcdesc_offset == -1)
16832
0
    {
16833
0
      local_fdpic_cnts->funcdesc_offset = s->size;
16834
0
      s->size += 8;
16835
16836
      /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups.  */
16837
0
      if (bfd_link_pic (info))
16838
0
        elf32_arm_allocate_dynrelocs (info, srel, 1);
16839
0
      else
16840
0
        htab->srofixup->size += 8;
16841
0
    }
16842
0
      }
16843
16844
0
    if (local_fdpic_cnts->funcdesc_cnt > 0)
16845
0
      {
16846
0
        if (local_fdpic_cnts->funcdesc_offset == -1)
16847
0
    {
16848
0
      local_fdpic_cnts->funcdesc_offset = s->size;
16849
0
      s->size += 8;
16850
16851
      /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups.  */
16852
0
      if (bfd_link_pic (info))
16853
0
        elf32_arm_allocate_dynrelocs (info, srel, 1);
16854
0
      else
16855
0
        htab->srofixup->size += 8;
16856
0
    }
16857
16858
        /* We will add n R_ARM_RELATIVE relocations or n rofixups.  */
16859
0
        if (bfd_link_pic (info))
16860
0
    elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16861
0
        else
16862
0
    htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16863
0
      }
16864
16865
0
    if (local_iplt != NULL)
16866
0
      {
16867
0
        struct elf_dyn_relocs *p;
16868
16869
0
        if (local_iplt->root.refcount > 0)
16870
0
    {
16871
0
      elf32_arm_allocate_plt_entry (info, true,
16872
0
            &local_iplt->root,
16873
0
            &local_iplt->arm);
16874
0
      if (local_iplt->arm.noncall_refcount == 0)
16875
        /* All references to the PLT are calls, so all
16876
           non-call references can resolve directly to the
16877
           run-time target.  This means that the .got entry
16878
           would be the same as the .igot.plt entry, so there's
16879
           no point creating both.  */
16880
0
        *local_got = 0;
16881
0
    }
16882
0
        else
16883
0
    {
16884
0
      BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16885
0
      local_iplt->root.offset = (bfd_vma) -1;
16886
0
    }
16887
16888
0
        for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16889
0
    {
16890
0
      asection *psrel;
16891
16892
0
      psrel = elf_section_data (p->sec)->sreloc;
16893
0
      if (local_iplt->arm.noncall_refcount == 0)
16894
0
        elf32_arm_allocate_irelocs (info, psrel, p->count);
16895
0
      else
16896
0
        elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16897
0
    }
16898
0
      }
16899
0
    if (*local_got > 0)
16900
0
      {
16901
0
        Elf_Internal_Sym *isym;
16902
16903
0
        *local_got = s->size;
16904
0
        if (*local_tls_type & GOT_TLS_GD)
16905
    /* TLS_GD relocs need an 8-byte structure in the GOT.  */
16906
0
    s->size += 8;
16907
0
        if (*local_tls_type & GOT_TLS_GDESC)
16908
0
    {
16909
0
      *local_tlsdesc_gotent = htab->root.sgotplt->size
16910
0
        - elf32_arm_compute_jump_table_size (htab);
16911
0
      htab->root.sgotplt->size += 8;
16912
0
      *local_got = (bfd_vma) -2;
16913
      /* plt.got_offset needs to know there's a TLS_DESC
16914
         reloc in the middle of .got.plt.  */
16915
0
      htab->num_tls_desc++;
16916
0
    }
16917
0
        if (*local_tls_type & GOT_TLS_IE)
16918
0
    s->size += 4;
16919
16920
0
        if (*local_tls_type & GOT_NORMAL)
16921
0
    {
16922
      /* If the symbol is both GD and GDESC, *local_got
16923
         may have been overwritten.  */
16924
0
      *local_got = s->size;
16925
0
      s->size += 4;
16926
0
    }
16927
16928
0
        isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
16929
0
              symndx);
16930
0
        if (isym == NULL)
16931
0
    return false;
16932
16933
        /* If all references to an STT_GNU_IFUNC PLT are calls,
16934
     then all non-call references, including this GOT entry,
16935
     resolve directly to the run-time target.  */
16936
0
        if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16937
0
      && (local_iplt == NULL
16938
0
          || local_iplt->arm.noncall_refcount == 0))
16939
0
    elf32_arm_allocate_irelocs (info, srel, 1);
16940
0
        else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16941
0
    {
16942
0
      if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16943
0
        elf32_arm_allocate_dynrelocs (info, srel, 1);
16944
0
      else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16945
0
        htab->srofixup->size += 4;
16946
16947
0
      if ((bfd_link_pic (info) || htab->fdpic_p)
16948
0
          && *local_tls_type & GOT_TLS_GDESC)
16949
0
        {
16950
0
          elf32_arm_allocate_dynrelocs (info,
16951
0
                htab->root.srelplt, 1);
16952
0
          htab->tls_trampoline = -1;
16953
0
        }
16954
0
    }
16955
0
      }
16956
0
    else
16957
0
      *local_got = (bfd_vma) -1;
16958
0
  }
16959
0
    }
16960
16961
0
  if (htab->tls_ldm_got.refcount > 0)
16962
0
    {
16963
      /* Allocate two GOT entries and one dynamic relocation (if necessary)
16964
   for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations.  */
16965
0
      htab->tls_ldm_got.offset = htab->root.sgot->size;
16966
0
      htab->root.sgot->size += 8;
16967
0
      if (bfd_link_pic (info))
16968
0
  elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16969
0
    }
16970
0
  else
16971
0
    htab->tls_ldm_got.offset = -1;
16972
16973
  /* At the very end of the .rofixup section is a pointer to the GOT,
16974
     reserve space for it. */
16975
0
  if (htab->fdpic_p && htab->srofixup != NULL)
16976
0
    htab->srofixup->size += 4;
16977
16978
  /* Allocate global sym .plt and .got entries, and space for global
16979
     sym dynamic relocs.  */
16980
0
  elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16981
16982
  /* Here we rummage through the found bfds to collect glue information.  */
16983
0
  for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16984
0
    {
16985
0
      if (! is_arm_elf (ibfd))
16986
0
  continue;
16987
16988
      /* Initialise mapping tables for code/data.  */
16989
0
      bfd_elf32_arm_init_maps (ibfd);
16990
16991
0
      if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16992
0
    || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16993
0
    || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16994
0
  _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16995
0
    }
16996
16997
  /* Allocate space for the glue sections now that we've sized them.  */
16998
0
  bfd_elf32_arm_allocate_interworking_sections (info);
16999
17000
  /* For every jump slot reserved in the sgotplt, reloc_count is
17001
     incremented.  However, when we reserve space for TLS descriptors,
17002
     it's not incremented, so in order to compute the space reserved
17003
     for them, it suffices to multiply the reloc count by the jump
17004
     slot size.  */
17005
0
  if (htab->root.srelplt)
17006
0
    htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size (htab);
17007
17008
0
  if (htab->tls_trampoline)
17009
0
    {
17010
0
      if (htab->root.splt->size == 0)
17011
0
  htab->root.splt->size += htab->plt_header_size;
17012
17013
0
      htab->tls_trampoline = htab->root.splt->size;
17014
0
      htab->root.splt->size += htab->plt_entry_size;
17015
17016
      /* If we're not using lazy TLS relocations, don't generate the
17017
   PLT and GOT entries they require.  */
17018
0
      if ((info->flags & DF_BIND_NOW))
17019
0
  htab->root.tlsdesc_plt = 0;
17020
0
      else
17021
0
  {
17022
0
    htab->root.tlsdesc_got = htab->root.sgot->size;
17023
0
    htab->root.sgot->size += 4;
17024
17025
0
    htab->root.tlsdesc_plt = htab->root.splt->size;
17026
0
    htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
17027
0
  }
17028
0
    }
17029
17030
  /* The check_relocs and adjust_dynamic_symbol entry points have
17031
     determined the sizes of the various dynamic sections.  Allocate
17032
     memory for them.  */
17033
0
  relocs = false;
17034
0
  for (s = dynobj->sections; s != NULL; s = s->next)
17035
0
    {
17036
0
      const char * name;
17037
17038
0
      if ((s->flags & SEC_LINKER_CREATED) == 0)
17039
0
  continue;
17040
17041
      /* It's OK to base decisions on the section name, because none
17042
   of the dynobj section names depend upon the input files.  */
17043
0
      name = bfd_section_name (s);
17044
17045
0
      if (s == htab->root.splt)
17046
0
  {
17047
    /* Remember whether there is a PLT.  */
17048
0
    ;
17049
0
  }
17050
0
      else if (startswith (name, ".rel"))
17051
0
  {
17052
0
    if (s->size != 0)
17053
0
      {
17054
        /* Remember whether there are any reloc sections other
17055
     than .rel(a).plt and .rela.plt.unloaded.  */
17056
0
        if (s != htab->root.srelplt && s != htab->srelplt2)
17057
0
    relocs = true;
17058
17059
        /* We use the reloc_count field as a counter if we need
17060
     to copy relocs into the output file.  */
17061
0
        s->reloc_count = 0;
17062
0
      }
17063
0
  }
17064
0
      else if (s != htab->root.sgot
17065
0
         && s != htab->root.sgotplt
17066
0
         && s != htab->root.iplt
17067
0
         && s != htab->root.igotplt
17068
0
         && s != htab->root.sdynbss
17069
0
         && s != htab->root.sdynrelro
17070
0
         && s != htab->srofixup)
17071
0
  {
17072
    /* It's not one of our sections, so don't allocate space.  */
17073
0
    continue;
17074
0
  }
17075
17076
0
      if (s->size == 0)
17077
0
  {
17078
    /* If we don't need this section, strip it from the
17079
       output file.  This is mostly to handle .rel(a).bss and
17080
       .rel(a).plt.  We must create both sections in
17081
       create_dynamic_sections, because they must be created
17082
       before the linker maps input sections to output
17083
       sections.  The linker does that before
17084
       adjust_dynamic_symbol is called, and it is that
17085
       function which decides whether anything needs to go
17086
       into these sections.  */
17087
0
    s->flags |= SEC_EXCLUDE;
17088
0
    continue;
17089
0
  }
17090
17091
0
      if ((s->flags & SEC_HAS_CONTENTS) == 0)
17092
0
  continue;
17093
17094
      /* Allocate memory for the section contents.  */
17095
0
      s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17096
0
      if (s->contents == NULL)
17097
0
  return false;
17098
0
    }
17099
17100
0
  return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
17101
0
              relocs);
17102
0
}
17103
17104
/* Size sections even though they're not dynamic.  We use it to setup
17105
   _TLS_MODULE_BASE_, if needed.  */
17106
17107
static bool
17108
elf32_arm_early_size_sections (bfd *output_bfd, struct bfd_link_info *info)
17109
0
{
17110
0
  asection *tls_sec;
17111
0
  struct elf32_arm_link_hash_table *htab;
17112
17113
0
  htab = elf32_arm_hash_table (info);
17114
17115
0
  if (bfd_link_relocatable (info))
17116
0
    return true;
17117
17118
0
  tls_sec = elf_hash_table (info)->tls_sec;
17119
17120
0
  if (tls_sec)
17121
0
    {
17122
0
      struct elf_link_hash_entry *tlsbase;
17123
17124
0
      tlsbase = elf_link_hash_lookup
17125
0
  (elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
17126
17127
0
      if (tlsbase)
17128
0
  {
17129
0
    struct bfd_link_hash_entry *bh = NULL;
17130
0
    const struct elf_backend_data *bed
17131
0
      = get_elf_backend_data (output_bfd);
17132
17133
0
    if (!(_bfd_generic_link_add_one_symbol
17134
0
    (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17135
0
     tls_sec, 0, NULL, false,
17136
0
     bed->collect, &bh)))
17137
0
      return false;
17138
17139
0
    tlsbase->type = STT_TLS;
17140
0
    tlsbase = (struct elf_link_hash_entry *)bh;
17141
0
    tlsbase->def_regular = 1;
17142
0
    tlsbase->other = STV_HIDDEN;
17143
0
    (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
17144
0
  }
17145
0
    }
17146
17147
0
  if (htab->fdpic_p && !bfd_link_relocatable (info)
17148
0
      && !bfd_elf_stack_segment_size (output_bfd, info,
17149
0
              "__stacksize", DEFAULT_STACK_SIZE))
17150
0
    return false;
17151
17152
0
  return true;
17153
0
}
17154
17155
/* Finish up dynamic symbol handling.  We set the contents of various
17156
   dynamic sections here.  */
17157
17158
static bool
17159
elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17160
         struct bfd_link_info * info,
17161
         struct elf_link_hash_entry * h,
17162
         Elf_Internal_Sym * sym)
17163
0
{
17164
0
  struct elf32_arm_link_hash_table *htab;
17165
0
  struct elf32_arm_link_hash_entry *eh;
17166
17167
0
  htab = elf32_arm_hash_table (info);
17168
17169
0
  eh = (struct elf32_arm_link_hash_entry *) h;
17170
17171
0
  if (h->plt.offset != (bfd_vma) -1)
17172
0
    {
17173
0
      if (!eh->is_iplt)
17174
0
  {
17175
0
    BFD_ASSERT (h->dynindx != -1);
17176
0
    if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17177
0
                h->dynindx, 0))
17178
0
      return false;
17179
0
  }
17180
17181
0
      if (!h->def_regular)
17182
0
  {
17183
    /* Mark the symbol as undefined, rather than as defined in
17184
       the .plt section.  */
17185
0
    sym->st_shndx = SHN_UNDEF;
17186
    /* If the symbol is weak we need to clear the value.
17187
       Otherwise, the PLT entry would provide a definition for
17188
       the symbol even if the symbol wasn't defined anywhere,
17189
       and so the symbol would never be NULL.  Leave the value if
17190
       there were any relocations where pointer equality matters
17191
       (this is a clue for the dynamic linker, to make function
17192
       pointer comparisons work between an application and shared
17193
       library).  */
17194
0
    if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17195
0
      sym->st_value = 0;
17196
0
  }
17197
0
      else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17198
0
  {
17199
    /* At least one non-call relocation references this .iplt entry,
17200
       so the .iplt entry is the function's canonical address.  */
17201
0
    sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17202
0
    ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17203
0
    sym->st_shndx = (_bfd_elf_section_from_bfd_section
17204
0
         (output_bfd, htab->root.iplt->output_section));
17205
0
    sym->st_value = (h->plt.offset
17206
0
         + htab->root.iplt->output_section->vma
17207
0
         + htab->root.iplt->output_offset);
17208
0
  }
17209
0
    }
17210
17211
0
  if (h->needs_copy)
17212
0
    {
17213
0
      asection * s;
17214
0
      Elf_Internal_Rela rel;
17215
17216
      /* This symbol needs a copy reloc.  Set it up.  */
17217
0
      BFD_ASSERT (h->dynindx != -1
17218
0
      && (h->root.type == bfd_link_hash_defined
17219
0
          || h->root.type == bfd_link_hash_defweak));
17220
17221
0
      rel.r_addend = 0;
17222
0
      rel.r_offset = (h->root.u.def.value
17223
0
          + h->root.u.def.section->output_section->vma
17224
0
          + h->root.u.def.section->output_offset);
17225
0
      rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17226
0
      if (h->root.u.def.section == htab->root.sdynrelro)
17227
0
  s = htab->root.sreldynrelro;
17228
0
      else
17229
0
  s = htab->root.srelbss;
17230
0
      elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17231
0
    }
17232
17233
  /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute.  On VxWorks,
17234
     and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17235
     it is relative to the ".got" section.  */
17236
0
  if (h == htab->root.hdynamic
17237
0
      || (!htab->fdpic_p
17238
0
    && htab->root.target_os != is_vxworks
17239
0
    && h == htab->root.hgot))
17240
0
    sym->st_shndx = SHN_ABS;
17241
17242
0
  return true;
17243
0
}
17244
17245
static void
17246
arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17247
        void *contents,
17248
        const unsigned long *template, unsigned count)
17249
0
{
17250
0
  unsigned ix;
17251
17252
0
  for (ix = 0; ix != count; ix++)
17253
0
    {
17254
0
      unsigned long insn = template[ix];
17255
17256
      /* Emit mov pc,rx if bx is not permitted.  */
17257
0
      if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17258
0
  insn = (insn & 0xf000000f) | 0x01a0f000;
17259
0
      put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17260
0
    }
17261
0
}
17262
17263
/* Install the special first PLT entry for elf32-arm-nacl.  Unlike
17264
   other variants, NaCl needs this entry in a static executable's
17265
   .iplt too.  When we're handling that case, GOT_DISPLACEMENT is
17266
   zero.  For .iplt really only the last bundle is useful, and .iplt
17267
   could have a shorter first entry, with each individual PLT entry's
17268
   relative branch calculated differently so it targets the last
17269
   bundle instead of the instruction before it (labelled .Lplt_tail
17270
   above).  But it's simpler to keep the size and layout of PLT0
17271
   consistent with the dynamic case, at the cost of some dead code at
17272
   the start of .iplt and the one dead store to the stack at the start
17273
   of .Lplt_tail.  */
17274
static void
17275
arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17276
       asection *plt, bfd_vma got_displacement)
17277
0
{
17278
0
  unsigned int i;
17279
17280
0
  put_arm_insn (htab, output_bfd,
17281
0
    elf32_arm_nacl_plt0_entry[0]
17282
0
    | arm_movw_immediate (got_displacement),
17283
0
    plt->contents + 0);
17284
0
  put_arm_insn (htab, output_bfd,
17285
0
    elf32_arm_nacl_plt0_entry[1]
17286
0
    | arm_movt_immediate (got_displacement),
17287
0
    plt->contents + 4);
17288
17289
0
  for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17290
0
    put_arm_insn (htab, output_bfd,
17291
0
      elf32_arm_nacl_plt0_entry[i],
17292
0
      plt->contents + (i * 4));
17293
0
}
17294
17295
/* Finish up the dynamic sections.  */
17296
17297
static bool
17298
elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17299
0
{
17300
0
  bfd * dynobj;
17301
0
  asection * sgot;
17302
0
  asection * sdyn;
17303
0
  struct elf32_arm_link_hash_table *htab;
17304
17305
0
  htab = elf32_arm_hash_table (info);
17306
0
  if (htab == NULL)
17307
0
    return false;
17308
17309
0
  dynobj = elf_hash_table (info)->dynobj;
17310
17311
0
  sgot = htab->root.sgotplt;
17312
  /* A broken linker script might have discarded the dynamic sections.
17313
     Catch this here so that we do not seg-fault later on.  */
17314
0
  if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17315
0
    return false;
17316
0
  sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17317
17318
0
  if (elf_hash_table (info)->dynamic_sections_created)
17319
0
    {
17320
0
      asection *splt;
17321
0
      Elf32_External_Dyn *dyncon, *dynconend;
17322
17323
0
      splt = htab->root.splt;
17324
0
      BFD_ASSERT (splt != NULL && sdyn != NULL);
17325
0
      BFD_ASSERT (sgot != NULL);
17326
17327
0
      dyncon = (Elf32_External_Dyn *) sdyn->contents;
17328
0
      dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17329
17330
0
      for (; dyncon < dynconend; dyncon++)
17331
0
  {
17332
0
    Elf_Internal_Dyn dyn;
17333
0
    const char * name;
17334
0
    asection * s;
17335
17336
0
    bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17337
17338
0
    switch (dyn.d_tag)
17339
0
      {
17340
0
      default:
17341
0
        if (htab->root.target_os == is_vxworks
17342
0
      && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17343
0
    bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17344
0
        break;
17345
17346
0
      case DT_HASH:
17347
0
      case DT_STRTAB:
17348
0
      case DT_SYMTAB:
17349
0
      case DT_VERSYM:
17350
0
      case DT_VERDEF:
17351
0
      case DT_VERNEED:
17352
0
        break;
17353
17354
0
      case DT_PLTGOT:
17355
0
        name = ".got.plt";
17356
0
        goto get_vma;
17357
0
      case DT_JMPREL:
17358
0
        name = RELOC_SECTION (htab, ".plt");
17359
0
      get_vma:
17360
0
        s = bfd_get_linker_section (dynobj, name);
17361
0
        if (s == NULL)
17362
0
    {
17363
0
      _bfd_error_handler
17364
0
        (_("could not find section %s"), name);
17365
0
      bfd_set_error (bfd_error_invalid_operation);
17366
0
      return false;
17367
0
    }
17368
0
        dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17369
0
        bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17370
0
        break;
17371
17372
0
      case DT_PLTRELSZ:
17373
0
        s = htab->root.srelplt;
17374
0
        BFD_ASSERT (s != NULL);
17375
0
        dyn.d_un.d_val = s->size;
17376
0
        bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17377
0
        break;
17378
17379
0
      case DT_RELSZ:
17380
0
      case DT_RELASZ:
17381
0
      case DT_REL:
17382
0
      case DT_RELA:
17383
0
        break;
17384
17385
0
      case DT_TLSDESC_PLT:
17386
0
        s = htab->root.splt;
17387
0
        dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17388
0
        + htab->root.tlsdesc_plt);
17389
0
        bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17390
0
        break;
17391
17392
0
      case DT_TLSDESC_GOT:
17393
0
        s = htab->root.sgot;
17394
0
        dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17395
0
        + htab->root.tlsdesc_got);
17396
0
        bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17397
0
        break;
17398
17399
        /* Set the bottom bit of DT_INIT/FINI if the
17400
     corresponding function is Thumb.  */
17401
0
      case DT_INIT:
17402
0
        name = info->init_function;
17403
0
        goto get_sym;
17404
0
      case DT_FINI:
17405
0
        name = info->fini_function;
17406
0
      get_sym:
17407
        /* If it wasn't set by elf_bfd_final_link
17408
     then there is nothing to adjust.  */
17409
0
        if (dyn.d_un.d_val != 0)
17410
0
    {
17411
0
      struct elf_link_hash_entry * eh;
17412
17413
0
      eh = elf_link_hash_lookup (elf_hash_table (info), name,
17414
0
               false, false, true);
17415
0
      if (eh != NULL
17416
0
          && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17417
0
       == ST_BRANCH_TO_THUMB)
17418
0
        {
17419
0
          dyn.d_un.d_val |= 1;
17420
0
          bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17421
0
        }
17422
0
    }
17423
0
        break;
17424
0
      }
17425
0
  }
17426
17427
      /* Fill in the first entry in the procedure linkage table.  */
17428
0
      if (splt->size > 0 && htab->plt_header_size)
17429
0
  {
17430
0
    const bfd_vma *plt0_entry;
17431
0
    bfd_vma got_address, plt_address, got_displacement;
17432
17433
    /* Calculate the addresses of the GOT and PLT.  */
17434
0
    got_address = sgot->output_section->vma + sgot->output_offset;
17435
0
    plt_address = splt->output_section->vma + splt->output_offset;
17436
17437
0
    if (htab->root.target_os == is_vxworks)
17438
0
      {
17439
        /* The VxWorks GOT is relocated by the dynamic linker.
17440
     Therefore, we must emit relocations rather than simply
17441
     computing the values now.  */
17442
0
        Elf_Internal_Rela rel;
17443
17444
0
        plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17445
0
        put_arm_insn (htab, output_bfd, plt0_entry[0],
17446
0
          splt->contents + 0);
17447
0
        put_arm_insn (htab, output_bfd, plt0_entry[1],
17448
0
          splt->contents + 4);
17449
0
        put_arm_insn (htab, output_bfd, plt0_entry[2],
17450
0
          splt->contents + 8);
17451
0
        bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17452
17453
        /* Generate a relocation for _GLOBAL_OFFSET_TABLE_.  */
17454
0
        rel.r_offset = plt_address + 12;
17455
0
        rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17456
0
        rel.r_addend = 0;
17457
0
        SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17458
0
             htab->srelplt2->contents);
17459
0
      }
17460
0
    else if (htab->root.target_os == is_nacl)
17461
0
      arm_nacl_put_plt0 (htab, output_bfd, splt,
17462
0
             got_address + 8 - (plt_address + 16));
17463
0
    else if (using_thumb_only (htab))
17464
0
      {
17465
0
        got_displacement = got_address - (plt_address + 12);
17466
17467
0
        plt0_entry = elf32_thumb2_plt0_entry;
17468
0
        put_arm_insn (htab, output_bfd, plt0_entry[0],
17469
0
          splt->contents + 0);
17470
0
        put_arm_insn (htab, output_bfd, plt0_entry[1],
17471
0
          splt->contents + 4);
17472
0
        put_arm_insn (htab, output_bfd, plt0_entry[2],
17473
0
          splt->contents + 8);
17474
17475
0
        bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17476
0
      }
17477
0
    else
17478
0
      {
17479
0
        got_displacement = got_address - (plt_address + 16);
17480
17481
0
        plt0_entry = elf32_arm_plt0_entry;
17482
0
        put_arm_insn (htab, output_bfd, plt0_entry[0],
17483
0
          splt->contents + 0);
17484
0
        put_arm_insn (htab, output_bfd, plt0_entry[1],
17485
0
          splt->contents + 4);
17486
0
        put_arm_insn (htab, output_bfd, plt0_entry[2],
17487
0
          splt->contents + 8);
17488
0
        put_arm_insn (htab, output_bfd, plt0_entry[3],
17489
0
          splt->contents + 12);
17490
17491
#ifdef FOUR_WORD_PLT
17492
        /* The displacement value goes in the otherwise-unused
17493
     last word of the second entry.  */
17494
        bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17495
#else
17496
0
        bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17497
0
#endif
17498
0
      }
17499
0
  }
17500
17501
      /* UnixWare sets the entsize of .plt to 4, although that doesn't
17502
   really seem like the right value.  */
17503
0
      if (splt->output_section->owner == output_bfd)
17504
0
  elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17505
17506
0
      if (htab->root.tlsdesc_plt)
17507
0
  {
17508
0
    bfd_vma got_address
17509
0
      = sgot->output_section->vma + sgot->output_offset;
17510
0
    bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17511
0
            + htab->root.sgot->output_offset);
17512
0
    bfd_vma plt_address
17513
0
      = splt->output_section->vma + splt->output_offset;
17514
17515
0
    arm_put_trampoline (htab, output_bfd,
17516
0
            splt->contents + htab->root.tlsdesc_plt,
17517
0
            dl_tlsdesc_lazy_trampoline, 6);
17518
17519
0
    bfd_put_32 (output_bfd,
17520
0
          gotplt_address + htab->root.tlsdesc_got
17521
0
          - (plt_address + htab->root.tlsdesc_plt)
17522
0
          - dl_tlsdesc_lazy_trampoline[6],
17523
0
          splt->contents + htab->root.tlsdesc_plt + 24);
17524
0
    bfd_put_32 (output_bfd,
17525
0
          got_address - (plt_address + htab->root.tlsdesc_plt)
17526
0
          - dl_tlsdesc_lazy_trampoline[7],
17527
0
          splt->contents + htab->root.tlsdesc_plt + 24 + 4);
17528
0
  }
17529
17530
0
      if (htab->tls_trampoline)
17531
0
  {
17532
0
    arm_put_trampoline (htab, output_bfd,
17533
0
            splt->contents + htab->tls_trampoline,
17534
0
            tls_trampoline, 3);
17535
#ifdef FOUR_WORD_PLT
17536
    bfd_put_32 (output_bfd, 0x00000000,
17537
          splt->contents + htab->tls_trampoline + 12);
17538
#endif
17539
0
  }
17540
17541
0
      if (htab->root.target_os == is_vxworks
17542
0
    && !bfd_link_pic (info)
17543
0
    && htab->root.splt->size > 0)
17544
0
  {
17545
    /* Correct the .rel(a).plt.unloaded relocations.  They will have
17546
       incorrect symbol indexes.  */
17547
0
    int num_plts;
17548
0
    unsigned char *p;
17549
17550
0
    num_plts = ((htab->root.splt->size - htab->plt_header_size)
17551
0
          / htab->plt_entry_size);
17552
0
    p = htab->srelplt2->contents + RELOC_SIZE (htab);
17553
17554
0
    for (; num_plts; num_plts--)
17555
0
      {
17556
0
        Elf_Internal_Rela rel;
17557
17558
0
        SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17559
0
        rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17560
0
        SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17561
0
        p += RELOC_SIZE (htab);
17562
17563
0
        SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17564
0
        rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17565
0
        SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17566
0
        p += RELOC_SIZE (htab);
17567
0
      }
17568
0
  }
17569
0
    }
17570
17571
0
  if (htab->root.target_os == is_nacl
17572
0
      && htab->root.iplt != NULL
17573
0
      && htab->root.iplt->size > 0)
17574
    /* NaCl uses a special first entry in .iplt too.  */
17575
0
    arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17576
17577
  /* Fill in the first three entries in the global offset table.  */
17578
0
  if (sgot)
17579
0
    {
17580
0
      if (sgot->size > 0)
17581
0
  {
17582
0
    if (sdyn == NULL)
17583
0
      bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17584
0
    else
17585
0
      bfd_put_32 (output_bfd,
17586
0
      sdyn->output_section->vma + sdyn->output_offset,
17587
0
      sgot->contents);
17588
0
    bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17589
0
    bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17590
0
  }
17591
17592
0
      elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17593
0
    }
17594
17595
  /* At the very end of the .rofixup section is a pointer to the GOT.  */
17596
0
  if (htab->fdpic_p && htab->srofixup != NULL)
17597
0
    {
17598
0
      struct elf_link_hash_entry *hgot = htab->root.hgot;
17599
17600
0
      bfd_vma got_value = hgot->root.u.def.value
17601
0
  + hgot->root.u.def.section->output_section->vma
17602
0
  + hgot->root.u.def.section->output_offset;
17603
17604
0
      arm_elf_add_rofixup (output_bfd, htab->srofixup, got_value);
17605
17606
      /* Make sure we allocated and generated the same number of fixups.  */
17607
0
      BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17608
0
    }
17609
17610
0
  return true;
17611
0
}
17612
17613
static bool
17614
elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
17615
0
{
17616
0
  Elf_Internal_Ehdr * i_ehdrp;  /* ELF file header, internal form.  */
17617
0
  struct elf32_arm_link_hash_table *globals;
17618
0
  struct elf_segment_map *m;
17619
17620
0
  if (!_bfd_elf_init_file_header (abfd, link_info))
17621
0
    return false;
17622
17623
0
  i_ehdrp = elf_elfheader (abfd);
17624
17625
0
  if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17626
0
    i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17627
0
  i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17628
17629
0
  if (link_info)
17630
0
    {
17631
0
      globals = elf32_arm_hash_table (link_info);
17632
0
      if (globals != NULL && globals->byteswap_code)
17633
0
  i_ehdrp->e_flags |= EF_ARM_BE8;
17634
17635
0
      if (globals->fdpic_p)
17636
0
  i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17637
0
    }
17638
17639
0
  if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17640
0
      && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17641
0
    {
17642
0
      int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17643
0
      if (abi == AEABI_VFP_args_vfp)
17644
0
  i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17645
0
      else
17646
0
  i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17647
0
    }
17648
17649
  /* Scan segment to set p_flags attribute if it contains only sections with
17650
     SHF_ARM_PURECODE flag.  */
17651
0
  for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17652
0
    {
17653
0
      unsigned int j;
17654
17655
0
      if (m->count == 0)
17656
0
  continue;
17657
0
      for (j = 0; j < m->count; j++)
17658
0
  {
17659
0
    if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17660
0
      break;
17661
0
  }
17662
0
      if (j == m->count)
17663
0
  {
17664
0
    m->p_flags = PF_X;
17665
0
    m->p_flags_valid = 1;
17666
0
  }
17667
0
    }
17668
0
  return true;
17669
0
}
17670
17671
static enum elf_reloc_type_class
17672
elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17673
          const asection *rel_sec ATTRIBUTE_UNUSED,
17674
          const Elf_Internal_Rela *rela)
17675
0
{
17676
0
  struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
17677
17678
0
  if (htab->root.dynsym != NULL
17679
0
      && htab->root.dynsym->contents != NULL)
17680
0
    {
17681
      /* Check relocation against STT_GNU_IFUNC symbol if there are
17682
   dynamic symbols.  */
17683
0
      bfd *abfd = info->output_bfd;
17684
0
      const struct elf_backend_data *bed = get_elf_backend_data (abfd);
17685
0
      unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
17686
0
      if (r_symndx != STN_UNDEF)
17687
0
  {
17688
0
    Elf_Internal_Sym sym;
17689
0
    if (!bed->s->swap_symbol_in (abfd,
17690
0
               (htab->root.dynsym->contents
17691
0
          + r_symndx * bed->s->sizeof_sym),
17692
0
               0, &sym))
17693
0
      {
17694
        /* xgettext:c-format */
17695
0
        _bfd_error_handler (_("%pB symbol number %lu references"
17696
0
            " nonexistent SHT_SYMTAB_SHNDX section"),
17697
0
          abfd, r_symndx);
17698
        /* Ideally an error class should be returned here.  */
17699
0
      }
17700
0
    else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
17701
0
      return reloc_class_ifunc;
17702
0
  }
17703
0
    }
17704
17705
0
  switch ((int) ELF32_R_TYPE (rela->r_info))
17706
0
    {
17707
0
    case R_ARM_RELATIVE:
17708
0
      return reloc_class_relative;
17709
0
    case R_ARM_JUMP_SLOT:
17710
0
      return reloc_class_plt;
17711
0
    case R_ARM_COPY:
17712
0
      return reloc_class_copy;
17713
0
    case R_ARM_IRELATIVE:
17714
0
      return reloc_class_ifunc;
17715
0
    default:
17716
0
      return reloc_class_normal;
17717
0
    }
17718
0
}
17719
17720
static void
17721
arm_final_write_processing (bfd *abfd)
17722
0
{
17723
0
  bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17724
0
}
17725
17726
static bool
17727
elf32_arm_final_write_processing (bfd *abfd)
17728
0
{
17729
0
  arm_final_write_processing (abfd);
17730
0
  return _bfd_elf_final_write_processing (abfd);
17731
0
}
17732
17733
/* Return TRUE if this is an unwinding table entry.  */
17734
17735
static bool
17736
is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17737
0
{
17738
0
  return (startswith (name, ELF_STRING_ARM_unwind)
17739
0
    || startswith (name, ELF_STRING_ARM_unwind_once));
17740
0
}
17741
17742
17743
/* Set the type and flags for an ARM section.  We do this by
17744
   the section name, which is a hack, but ought to work.  */
17745
17746
static bool
17747
elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17748
0
{
17749
0
  const char * name;
17750
17751
0
  name = bfd_section_name (sec);
17752
17753
0
  if (is_arm_elf_unwind_section_name (abfd, name))
17754
0
    {
17755
0
      hdr->sh_type = SHT_ARM_EXIDX;
17756
0
      hdr->sh_flags |= SHF_LINK_ORDER;
17757
0
    }
17758
17759
0
  if (sec->flags & SEC_ELF_PURECODE)
17760
0
    hdr->sh_flags |= SHF_ARM_PURECODE;
17761
17762
0
  return true;
17763
0
}
17764
17765
/* Handle an ARM specific section when reading an object file.  This is
17766
   called when bfd_section_from_shdr finds a section with an unknown
17767
   type.  */
17768
17769
static bool
17770
elf32_arm_section_from_shdr (bfd *abfd,
17771
           Elf_Internal_Shdr * hdr,
17772
           const char *name,
17773
           int shindex)
17774
962
{
17775
  /* There ought to be a place to keep ELF backend specific flags, but
17776
     at the moment there isn't one.  We just keep track of the
17777
     sections by their name, instead.  Fortunately, the ABI gives
17778
     names for all the ARM specific sections, so we will probably get
17779
     away with this.  */
17780
962
  switch (hdr->sh_type)
17781
962
    {
17782
20
    case SHT_ARM_EXIDX:
17783
20
    case SHT_ARM_PREEMPTMAP:
17784
20
    case SHT_ARM_ATTRIBUTES:
17785
20
      break;
17786
17787
942
    default:
17788
942
      return false;
17789
962
    }
17790
17791
20
  if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17792
0
    return false;
17793
17794
20
  return true;
17795
20
}
17796
17797
static _arm_elf_section_data *
17798
get_arm_elf_section_data (asection * sec)
17799
0
{
17800
0
  if (sec && sec->owner && is_arm_elf (sec->owner))
17801
0
    return elf32_arm_section_data (sec);
17802
0
  else
17803
0
    return NULL;
17804
0
}
17805
17806
typedef struct
17807
{
17808
  void *flaginfo;
17809
  struct bfd_link_info *info;
17810
  asection *sec;
17811
  int sec_shndx;
17812
  int (*func) (void *, const char *, Elf_Internal_Sym *,
17813
         asection *, struct elf_link_hash_entry *);
17814
} output_arch_syminfo;
17815
17816
enum map_symbol_type
17817
{
17818
  ARM_MAP_ARM,
17819
  ARM_MAP_THUMB,
17820
  ARM_MAP_DATA
17821
};
17822
17823
17824
/* Output a single mapping symbol.  */
17825
17826
static bool
17827
elf32_arm_output_map_sym (output_arch_syminfo *osi,
17828
        enum map_symbol_type type,
17829
        bfd_vma offset)
17830
0
{
17831
0
  static const char *names[3] = {"$a", "$t", "$d"};
17832
0
  Elf_Internal_Sym sym;
17833
17834
0
  sym.st_value = osi->sec->output_section->vma
17835
0
     + osi->sec->output_offset
17836
0
     + offset;
17837
0
  sym.st_size = 0;
17838
0
  sym.st_other = 0;
17839
0
  sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17840
0
  sym.st_shndx = osi->sec_shndx;
17841
0
  sym.st_target_internal = 0;
17842
0
  elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17843
0
  return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17844
0
}
17845
17846
/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17847
   IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt.  */
17848
17849
static bool
17850
elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17851
          bool is_iplt_entry_p,
17852
          union gotplt_union *root_plt,
17853
          struct arm_plt_info *arm_plt)
17854
0
{
17855
0
  struct elf32_arm_link_hash_table *htab;
17856
0
  bfd_vma addr, plt_header_size;
17857
17858
0
  if (root_plt->offset == (bfd_vma) -1)
17859
0
    return true;
17860
17861
0
  htab = elf32_arm_hash_table (osi->info);
17862
0
  if (htab == NULL)
17863
0
    return false;
17864
17865
0
  if (is_iplt_entry_p)
17866
0
    {
17867
0
      osi->sec = htab->root.iplt;
17868
0
      plt_header_size = 0;
17869
0
    }
17870
0
  else
17871
0
    {
17872
0
      osi->sec = htab->root.splt;
17873
0
      plt_header_size = htab->plt_header_size;
17874
0
    }
17875
0
  osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17876
0
        (osi->info->output_bfd, osi->sec->output_section));
17877
17878
0
  addr = root_plt->offset & -2;
17879
0
  if (htab->root.target_os == is_vxworks)
17880
0
    {
17881
0
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17882
0
  return false;
17883
0
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17884
0
  return false;
17885
0
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17886
0
  return false;
17887
0
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17888
0
  return false;
17889
0
    }
17890
0
  else if (htab->root.target_os == is_nacl)
17891
0
    {
17892
0
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17893
0
  return false;
17894
0
    }
17895
0
  else if (htab->fdpic_p)
17896
0
    {
17897
0
      enum map_symbol_type type = using_thumb_only (htab)
17898
0
  ? ARM_MAP_THUMB
17899
0
  : ARM_MAP_ARM;
17900
17901
0
      if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17902
0
  if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17903
0
    return false;
17904
0
      if (!elf32_arm_output_map_sym (osi, type, addr))
17905
0
  return false;
17906
0
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17907
0
  return false;
17908
0
      if (htab->plt_entry_size == 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry))
17909
0
  if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17910
0
    return false;
17911
0
    }
17912
0
  else if (using_thumb_only (htab))
17913
0
    {
17914
0
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17915
0
  return false;
17916
0
    }
17917
0
  else
17918
0
    {
17919
0
      bool thumb_stub_p;
17920
17921
0
      thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17922
0
      if (thumb_stub_p)
17923
0
  {
17924
0
    if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17925
0
      return false;
17926
0
  }
17927
#ifdef FOUR_WORD_PLT
17928
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17929
  return false;
17930
      if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17931
  return false;
17932
#else
17933
      /* A three-word PLT with no Thumb thunk contains only Arm code,
17934
   so only need to output a mapping symbol for the first PLT entry and
17935
   entries with thumb thunks.  */
17936
0
      if (thumb_stub_p || addr == plt_header_size)
17937
0
  {
17938
0
    if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17939
0
      return false;
17940
0
  }
17941
0
#endif
17942
0
    }
17943
17944
0
  return true;
17945
0
}
17946
17947
/* Output mapping symbols for PLT entries associated with H.  */
17948
17949
static bool
17950
elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17951
0
{
17952
0
  output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17953
0
  struct elf32_arm_link_hash_entry *eh;
17954
17955
0
  if (h->root.type == bfd_link_hash_indirect)
17956
0
    return true;
17957
17958
0
  if (h->root.type == bfd_link_hash_warning)
17959
    /* When warning symbols are created, they **replace** the "real"
17960
       entry in the hash table, thus we never get to see the real
17961
       symbol in a hash traversal.  So look at it now.  */
17962
0
    h = (struct elf_link_hash_entry *) h->root.u.i.link;
17963
17964
0
  eh = (struct elf32_arm_link_hash_entry *) h;
17965
0
  return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17966
0
             &h->plt, &eh->plt);
17967
0
}
17968
17969
/* Bind a veneered symbol to its veneer identified by its hash entry
17970
   STUB_ENTRY.  The veneered location thus loose its symbol.  */
17971
17972
static void
17973
arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17974
0
{
17975
0
  struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17976
17977
0
  BFD_ASSERT (hash);
17978
0
  hash->root.root.u.def.section = stub_entry->stub_sec;
17979
0
  hash->root.root.u.def.value = stub_entry->stub_offset;
17980
0
  hash->root.size = stub_entry->stub_size;
17981
0
}
17982
17983
/* Output a single local symbol for a generated stub.  */
17984
17985
static bool
17986
elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17987
         bfd_vma offset, bfd_vma size)
17988
0
{
17989
0
  Elf_Internal_Sym sym;
17990
17991
0
  sym.st_value = osi->sec->output_section->vma
17992
0
     + osi->sec->output_offset
17993
0
     + offset;
17994
0
  sym.st_size = size;
17995
0
  sym.st_other = 0;
17996
0
  sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17997
0
  sym.st_shndx = osi->sec_shndx;
17998
0
  sym.st_target_internal = 0;
17999
0
  return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
18000
0
}
18001
18002
static bool
18003
arm_map_one_stub (struct bfd_hash_entry * gen_entry,
18004
      void * in_arg)
18005
0
{
18006
0
  struct elf32_arm_stub_hash_entry *stub_entry;
18007
0
  asection *stub_sec;
18008
0
  bfd_vma addr;
18009
0
  char *stub_name;
18010
0
  output_arch_syminfo *osi;
18011
0
  const insn_sequence *template_sequence;
18012
0
  enum stub_insn_type prev_type;
18013
0
  int size;
18014
0
  int i;
18015
0
  enum map_symbol_type sym_type;
18016
18017
  /* Massage our args to the form they really have.  */
18018
0
  stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18019
0
  osi = (output_arch_syminfo *) in_arg;
18020
18021
0
  stub_sec = stub_entry->stub_sec;
18022
18023
  /* Ensure this stub is attached to the current section being
18024
     processed.  */
18025
0
  if (stub_sec != osi->sec)
18026
0
    return true;
18027
18028
0
  addr = (bfd_vma) stub_entry->stub_offset;
18029
0
  template_sequence = stub_entry->stub_template;
18030
18031
0
  if (arm_stub_sym_claimed (stub_entry->stub_type))
18032
0
    arm_stub_claim_sym (stub_entry);
18033
0
  else
18034
0
    {
18035
0
      stub_name = stub_entry->output_name;
18036
0
      switch (template_sequence[0].type)
18037
0
  {
18038
0
  case ARM_TYPE:
18039
0
    if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18040
0
            stub_entry->stub_size))
18041
0
      return false;
18042
0
    break;
18043
0
  case THUMB16_TYPE:
18044
0
  case THUMB32_TYPE:
18045
0
    if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18046
0
            stub_entry->stub_size))
18047
0
      return false;
18048
0
    break;
18049
0
  default:
18050
0
    BFD_FAIL ();
18051
0
    return 0;
18052
0
  }
18053
0
    }
18054
18055
0
  prev_type = DATA_TYPE;
18056
0
  size = 0;
18057
0
  for (i = 0; i < stub_entry->stub_template_size; i++)
18058
0
    {
18059
0
      switch (template_sequence[i].type)
18060
0
  {
18061
0
  case ARM_TYPE:
18062
0
    sym_type = ARM_MAP_ARM;
18063
0
    break;
18064
18065
0
  case THUMB16_TYPE:
18066
0
  case THUMB32_TYPE:
18067
0
    sym_type = ARM_MAP_THUMB;
18068
0
    break;
18069
18070
0
  case DATA_TYPE:
18071
0
    sym_type = ARM_MAP_DATA;
18072
0
    break;
18073
18074
0
  default:
18075
0
    BFD_FAIL ();
18076
0
    return false;
18077
0
  }
18078
18079
0
      if (template_sequence[i].type != prev_type)
18080
0
  {
18081
0
    prev_type = template_sequence[i].type;
18082
0
    if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18083
0
      return false;
18084
0
  }
18085
18086
0
      switch (template_sequence[i].type)
18087
0
  {
18088
0
  case ARM_TYPE:
18089
0
  case THUMB32_TYPE:
18090
0
    size += 4;
18091
0
    break;
18092
18093
0
  case THUMB16_TYPE:
18094
0
    size += 2;
18095
0
    break;
18096
18097
0
  case DATA_TYPE:
18098
0
    size += 4;
18099
0
    break;
18100
18101
0
  default:
18102
0
    BFD_FAIL ();
18103
0
    return false;
18104
0
  }
18105
0
    }
18106
18107
0
  return true;
18108
0
}
18109
18110
/* Output mapping symbols for linker generated sections,
18111
   and for those data-only sections that do not have a
18112
   $d.  */
18113
18114
static bool
18115
elf32_arm_output_arch_local_syms (bfd *output_bfd,
18116
          struct bfd_link_info *info,
18117
          void *flaginfo,
18118
          int (*func) (void *, const char *,
18119
                 Elf_Internal_Sym *,
18120
                 asection *,
18121
                 struct elf_link_hash_entry *))
18122
0
{
18123
0
  output_arch_syminfo osi;
18124
0
  struct elf32_arm_link_hash_table *htab;
18125
0
  bfd_vma offset;
18126
0
  bfd_size_type size;
18127
0
  bfd *input_bfd;
18128
18129
0
  if (info->strip == strip_all
18130
0
      && !info->emitrelocations
18131
0
      && !bfd_link_relocatable (info))
18132
0
    return true;
18133
18134
0
  htab = elf32_arm_hash_table (info);
18135
0
  if (htab == NULL)
18136
0
    return false;
18137
18138
0
  check_use_blx (htab);
18139
18140
0
  osi.flaginfo = flaginfo;
18141
0
  osi.info = info;
18142
0
  osi.func = func;
18143
18144
  /* Add a $d mapping symbol to data-only sections that
18145
     don't have any mapping symbol.  This may result in (harmless) redundant
18146
     mapping symbols.  */
18147
0
  for (input_bfd = info->input_bfds;
18148
0
       input_bfd != NULL;
18149
0
       input_bfd = input_bfd->link.next)
18150
0
    {
18151
0
      if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18152
0
  for (osi.sec = input_bfd->sections;
18153
0
       osi.sec != NULL;
18154
0
       osi.sec = osi.sec->next)
18155
0
    {
18156
0
      if (osi.sec->output_section != NULL
18157
0
    && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18158
0
        != 0)
18159
0
    && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18160
0
       == SEC_HAS_CONTENTS
18161
0
    && get_arm_elf_section_data (osi.sec) != NULL
18162
0
    && get_arm_elf_section_data (osi.sec)->mapcount == 0
18163
0
    && osi.sec->size > 0
18164
0
    && (osi.sec->flags & SEC_EXCLUDE) == 0)
18165
0
        {
18166
0
    osi.sec_shndx = _bfd_elf_section_from_bfd_section
18167
0
      (output_bfd, osi.sec->output_section);
18168
0
    if (osi.sec_shndx != (int)SHN_BAD)
18169
0
      elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18170
0
        }
18171
0
    }
18172
0
    }
18173
18174
  /* ARM->Thumb glue.  */
18175
0
  if (htab->arm_glue_size > 0)
18176
0
    {
18177
0
      osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18178
0
          ARM2THUMB_GLUE_SECTION_NAME);
18179
18180
0
      osi.sec_shndx = _bfd_elf_section_from_bfd_section
18181
0
    (output_bfd, osi.sec->output_section);
18182
0
      if (bfd_link_pic (info)
18183
0
    || htab->pic_veneer)
18184
0
  size = ARM2THUMB_PIC_GLUE_SIZE;
18185
0
      else if (htab->use_blx)
18186
0
  size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18187
0
      else
18188
0
  size = ARM2THUMB_STATIC_GLUE_SIZE;
18189
18190
0
      for (offset = 0; offset < htab->arm_glue_size; offset += size)
18191
0
  {
18192
0
    elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18193
0
    elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18194
0
  }
18195
0
    }
18196
18197
  /* Thumb->ARM glue.  */
18198
0
  if (htab->thumb_glue_size > 0)
18199
0
    {
18200
0
      osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18201
0
          THUMB2ARM_GLUE_SECTION_NAME);
18202
18203
0
      osi.sec_shndx = _bfd_elf_section_from_bfd_section
18204
0
    (output_bfd, osi.sec->output_section);
18205
0
      size = THUMB2ARM_GLUE_SIZE;
18206
18207
0
      for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18208
0
  {
18209
0
    elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18210
0
    elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18211
0
  }
18212
0
    }
18213
18214
  /* ARMv4 BX veneers.  */
18215
0
  if (htab->bx_glue_size > 0)
18216
0
    {
18217
0
      osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18218
0
          ARM_BX_GLUE_SECTION_NAME);
18219
18220
0
      osi.sec_shndx = _bfd_elf_section_from_bfd_section
18221
0
    (output_bfd, osi.sec->output_section);
18222
18223
0
      elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18224
0
    }
18225
18226
  /* Long calls stubs.  */
18227
0
  if (htab->stub_bfd && htab->stub_bfd->sections)
18228
0
    {
18229
0
      asection* stub_sec;
18230
18231
0
      for (stub_sec = htab->stub_bfd->sections;
18232
0
     stub_sec != NULL;
18233
0
     stub_sec = stub_sec->next)
18234
0
  {
18235
    /* Ignore non-stub sections.  */
18236
0
    if (!strstr (stub_sec->name, STUB_SUFFIX))
18237
0
      continue;
18238
18239
0
    osi.sec = stub_sec;
18240
18241
0
    osi.sec_shndx = _bfd_elf_section_from_bfd_section
18242
0
      (output_bfd, osi.sec->output_section);
18243
18244
0
    bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18245
0
  }
18246
0
    }
18247
18248
  /* Finally, output mapping symbols for the PLT.  */
18249
0
  if (htab->root.splt && htab->root.splt->size > 0)
18250
0
    {
18251
0
      osi.sec = htab->root.splt;
18252
0
      osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18253
0
           (output_bfd, osi.sec->output_section));
18254
18255
      /* Output mapping symbols for the plt header.  */
18256
0
      if (htab->root.target_os == is_vxworks)
18257
0
  {
18258
    /* VxWorks shared libraries have no PLT header.  */
18259
0
    if (!bfd_link_pic (info))
18260
0
      {
18261
0
        if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18262
0
    return false;
18263
0
        if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18264
0
    return false;
18265
0
      }
18266
0
  }
18267
0
      else if (htab->root.target_os == is_nacl)
18268
0
  {
18269
0
    if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18270
0
      return false;
18271
0
  }
18272
0
      else if (using_thumb_only (htab) && !htab->fdpic_p)
18273
0
  {
18274
0
    if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18275
0
      return false;
18276
0
    if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18277
0
      return false;
18278
0
    if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18279
0
      return false;
18280
0
  }
18281
0
      else if (!htab->fdpic_p)
18282
0
  {
18283
0
    if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18284
0
      return false;
18285
0
#ifndef FOUR_WORD_PLT
18286
0
    if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18287
0
      return false;
18288
0
#endif
18289
0
  }
18290
0
    }
18291
0
  if (htab->root.target_os == is_nacl
18292
0
      && htab->root.iplt
18293
0
      && htab->root.iplt->size > 0)
18294
0
    {
18295
      /* NaCl uses a special first entry in .iplt too.  */
18296
0
      osi.sec = htab->root.iplt;
18297
0
      osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18298
0
           (output_bfd, osi.sec->output_section));
18299
0
      if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18300
0
  return false;
18301
0
    }
18302
0
  if ((htab->root.splt && htab->root.splt->size > 0)
18303
0
      || (htab->root.iplt && htab->root.iplt->size > 0))
18304
0
    {
18305
0
      elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18306
0
      for (input_bfd = info->input_bfds;
18307
0
     input_bfd != NULL;
18308
0
     input_bfd = input_bfd->link.next)
18309
0
  {
18310
0
    struct arm_local_iplt_info **local_iplt;
18311
0
    unsigned int i, num_syms;
18312
18313
0
    local_iplt = elf32_arm_local_iplt (input_bfd);
18314
0
    if (local_iplt != NULL)
18315
0
      {
18316
0
        num_syms = elf_symtab_hdr (input_bfd).sh_info;
18317
0
        if (num_syms > elf32_arm_num_entries (input_bfd))
18318
0
    {
18319
0
      _bfd_error_handler (_("\
18320
0
%pB: Number of symbols in input file has increased from %lu to %u\n"),
18321
0
              input_bfd,
18322
0
              (unsigned long) elf32_arm_num_entries (input_bfd),
18323
0
              num_syms);
18324
0
      return false;
18325
0
    }
18326
0
        for (i = 0; i < num_syms; i++)
18327
0
    if (local_iplt[i] != NULL
18328
0
        && !elf32_arm_output_plt_map_1 (&osi, true,
18329
0
                &local_iplt[i]->root,
18330
0
                &local_iplt[i]->arm))
18331
0
      return false;
18332
0
      }
18333
0
  }
18334
0
    }
18335
0
  if (htab->root.tlsdesc_plt != 0)
18336
0
    {
18337
      /* Mapping symbols for the lazy tls trampoline.  */
18338
0
      if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
18339
0
             htab->root.tlsdesc_plt))
18340
0
  return false;
18341
18342
0
      if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18343
0
             htab->root.tlsdesc_plt + 24))
18344
0
  return false;
18345
0
    }
18346
0
  if (htab->tls_trampoline != 0)
18347
0
    {
18348
      /* Mapping symbols for the tls trampoline.  */
18349
0
      if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18350
0
  return false;
18351
#ifdef FOUR_WORD_PLT
18352
      if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18353
             htab->tls_trampoline + 12))
18354
  return false;
18355
#endif
18356
0
    }
18357
18358
0
  return true;
18359
0
}
18360
18361
/* Filter normal symbols of CMSE entry functions of ABFD to include in
18362
   the import library.  All SYMCOUNT symbols of ABFD can be examined
18363
   from their pointers in SYMS.  Pointers of symbols to keep should be
18364
   stored continuously at the beginning of that array.
18365
18366
   Returns the number of symbols to keep.  */
18367
18368
static unsigned int
18369
elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18370
             struct bfd_link_info *info,
18371
             asymbol **syms, long symcount)
18372
0
{
18373
0
  size_t maxnamelen;
18374
0
  char *cmse_name;
18375
0
  long src_count, dst_count = 0;
18376
0
  struct elf32_arm_link_hash_table *htab;
18377
18378
0
  htab = elf32_arm_hash_table (info);
18379
0
  if (!htab->stub_bfd || !htab->stub_bfd->sections)
18380
0
    symcount = 0;
18381
18382
0
  maxnamelen = 128;
18383
0
  cmse_name = (char *) bfd_malloc (maxnamelen);
18384
0
  BFD_ASSERT (cmse_name);
18385
18386
0
  for (src_count = 0; src_count < symcount; src_count++)
18387
0
    {
18388
0
      struct elf32_arm_link_hash_entry *cmse_hash;
18389
0
      asymbol *sym;
18390
0
      flagword flags;
18391
0
      char *name;
18392
0
      size_t namelen;
18393
18394
0
      sym = syms[src_count];
18395
0
      flags = sym->flags;
18396
0
      name = (char *) bfd_asymbol_name (sym);
18397
18398
0
      if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18399
0
  continue;
18400
0
      if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18401
0
  continue;
18402
18403
0
      namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18404
0
      if (namelen > maxnamelen)
18405
0
  {
18406
0
    cmse_name = (char *)
18407
0
      bfd_realloc (cmse_name, namelen);
18408
0
    maxnamelen = namelen;
18409
0
  }
18410
0
      snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18411
0
      cmse_hash = (struct elf32_arm_link_hash_entry *)
18412
0
  elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
18413
18414
0
      if (!cmse_hash
18415
0
    || (cmse_hash->root.root.type != bfd_link_hash_defined
18416
0
        && cmse_hash->root.root.type != bfd_link_hash_defweak)
18417
0
    || cmse_hash->root.type != STT_FUNC)
18418
0
  continue;
18419
18420
0
      syms[dst_count++] = sym;
18421
0
    }
18422
0
  free (cmse_name);
18423
18424
0
  syms[dst_count] = NULL;
18425
18426
0
  return dst_count;
18427
0
}
18428
18429
/* Filter symbols of ABFD to include in the import library.  All
18430
   SYMCOUNT symbols of ABFD can be examined from their pointers in
18431
   SYMS.  Pointers of symbols to keep should be stored continuously at
18432
   the beginning of that array.
18433
18434
   Returns the number of symbols to keep.  */
18435
18436
static unsigned int
18437
elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18438
         struct bfd_link_info *info,
18439
         asymbol **syms, long symcount)
18440
0
{
18441
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18442
18443
  /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18444
     Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18445
     library to be a relocatable object file.  */
18446
0
  BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18447
0
  if (globals->cmse_implib)
18448
0
    return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18449
0
  else
18450
0
    return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18451
0
}
18452
18453
/* Allocate target specific section data.  */
18454
18455
static bool
18456
elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18457
6.86k
{
18458
6.86k
  if (!sec->used_by_bfd)
18459
6.86k
    {
18460
6.86k
      _arm_elf_section_data *sdata;
18461
6.86k
      size_t amt = sizeof (*sdata);
18462
18463
6.86k
      sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18464
6.86k
      if (sdata == NULL)
18465
0
  return false;
18466
6.86k
      sec->used_by_bfd = sdata;
18467
6.86k
    }
18468
18469
6.86k
  return _bfd_elf_new_section_hook (abfd, sec);
18470
6.86k
}
18471
18472
18473
/* Used to order a list of mapping symbols by address.  */
18474
18475
static int
18476
elf32_arm_compare_mapping (const void * a, const void * b)
18477
0
{
18478
0
  const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18479
0
  const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18480
18481
0
  if (amap->vma > bmap->vma)
18482
0
    return 1;
18483
0
  else if (amap->vma < bmap->vma)
18484
0
    return -1;
18485
0
  else if (amap->type > bmap->type)
18486
    /* Ensure results do not depend on the host qsort for objects with
18487
       multiple mapping symbols at the same address by sorting on type
18488
       after vma.  */
18489
0
    return 1;
18490
0
  else if (amap->type < bmap->type)
18491
0
    return -1;
18492
0
  else
18493
0
    return 0;
18494
0
}
18495
18496
/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified.  */
18497
18498
static unsigned long
18499
offset_prel31 (unsigned long addr, bfd_vma offset)
18500
0
{
18501
0
  return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18502
0
}
18503
18504
/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18505
   relocations.  */
18506
18507
static void
18508
copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18509
0
{
18510
0
  unsigned long first_word = bfd_get_32 (output_bfd, from);
18511
0
  unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18512
18513
  /* High bit of first word is supposed to be zero.  */
18514
0
  if ((first_word & 0x80000000ul) == 0)
18515
0
    first_word = offset_prel31 (first_word, offset);
18516
18517
  /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18518
     (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry.  */
18519
0
  if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18520
0
    second_word = offset_prel31 (second_word, offset);
18521
18522
0
  bfd_put_32 (output_bfd, first_word, to);
18523
0
  bfd_put_32 (output_bfd, second_word, to + 4);
18524
0
}
18525
18526
/* Data for make_branch_to_a8_stub().  */
18527
18528
struct a8_branch_to_stub_data
18529
{
18530
  asection *writing_section;
18531
  bfd_byte *contents;
18532
};
18533
18534
18535
/* Helper to insert branches to Cortex-A8 erratum stubs in the right
18536
   places for a particular section.  */
18537
18538
static bool
18539
make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18540
           void *in_arg)
18541
0
{
18542
0
  struct elf32_arm_stub_hash_entry *stub_entry;
18543
0
  struct a8_branch_to_stub_data *data;
18544
0
  bfd_byte *contents;
18545
0
  unsigned long branch_insn;
18546
0
  bfd_vma veneered_insn_loc, veneer_entry_loc;
18547
0
  bfd_signed_vma branch_offset;
18548
0
  bfd *abfd;
18549
0
  unsigned int loc;
18550
18551
0
  stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18552
0
  data = (struct a8_branch_to_stub_data *) in_arg;
18553
18554
0
  if (stub_entry->target_section != data->writing_section
18555
0
      || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18556
0
    return true;
18557
18558
0
  contents = data->contents;
18559
18560
  /* We use target_section as Cortex-A8 erratum workaround stubs are only
18561
     generated when both source and target are in the same section.  */
18562
0
  veneered_insn_loc = stub_entry->target_section->output_section->vma
18563
0
          + stub_entry->target_section->output_offset
18564
0
          + stub_entry->source_value;
18565
18566
0
  veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18567
0
         + stub_entry->stub_sec->output_offset
18568
0
         + stub_entry->stub_offset;
18569
18570
0
  if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18571
0
    veneered_insn_loc &= ~3u;
18572
18573
0
  branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18574
18575
0
  abfd = stub_entry->target_section->owner;
18576
0
  loc = stub_entry->source_value;
18577
18578
  /* We attempt to avoid this condition by setting stubs_always_after_branch
18579
     in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18580
     This check is just to be on the safe side...  */
18581
0
  if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18582
0
    {
18583
0
      _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18584
0
          "allocated in unsafe location"), abfd);
18585
0
      return false;
18586
0
    }
18587
18588
0
  switch (stub_entry->stub_type)
18589
0
    {
18590
0
    case arm_stub_a8_veneer_b:
18591
0
    case arm_stub_a8_veneer_b_cond:
18592
0
      branch_insn = 0xf0009000;
18593
0
      goto jump24;
18594
18595
0
    case arm_stub_a8_veneer_blx:
18596
0
      branch_insn = 0xf000e800;
18597
0
      goto jump24;
18598
18599
0
    case arm_stub_a8_veneer_bl:
18600
0
      {
18601
0
  unsigned int i1, j1, i2, j2, s;
18602
18603
0
  branch_insn = 0xf000d000;
18604
18605
0
      jump24:
18606
0
  if (branch_offset < -16777216 || branch_offset > 16777214)
18607
0
    {
18608
      /* There's not much we can do apart from complain if this
18609
         happens.  */
18610
0
      _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18611
0
          "of range (input file too large)"), abfd);
18612
0
      return false;
18613
0
    }
18614
18615
  /* i1 = not(j1 eor s), so:
18616
     not i1 = j1 eor s
18617
     j1 = (not i1) eor s.  */
18618
18619
0
  branch_insn |= (branch_offset >> 1) & 0x7ff;
18620
0
  branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18621
0
  i2 = (branch_offset >> 22) & 1;
18622
0
  i1 = (branch_offset >> 23) & 1;
18623
0
  s = (branch_offset >> 24) & 1;
18624
0
  j1 = (!i1) ^ s;
18625
0
  j2 = (!i2) ^ s;
18626
0
  branch_insn |= j2 << 11;
18627
0
  branch_insn |= j1 << 13;
18628
0
  branch_insn |= s << 26;
18629
0
      }
18630
0
      break;
18631
18632
0
    default:
18633
0
      BFD_FAIL ();
18634
0
      return false;
18635
0
    }
18636
18637
0
  bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18638
0
  bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18639
18640
0
  return true;
18641
0
}
18642
18643
/* Beginning of stm32l4xx work-around.  */
18644
18645
/* Functions encoding instructions necessary for the emission of the
18646
   fix-stm32l4xx-629360.
18647
   Encoding is extracted from the
18648
   ARM (C) Architecture Reference Manual
18649
   ARMv7-A and ARMv7-R edition
18650
   ARM DDI 0406C.b (ID072512).  */
18651
18652
static inline bfd_vma
18653
create_instruction_branch_absolute (int branch_offset)
18654
0
{
18655
  /* A8.8.18 B (A8-334)
18656
     B target_address (Encoding T4).  */
18657
  /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii.  */
18658
  /* jump offset is:  S:I1:I2:imm10:imm11:0.  */
18659
  /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S).  */
18660
18661
0
  int s = ((branch_offset & 0x1000000) >> 24);
18662
0
  int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18663
0
  int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18664
18665
0
  if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18666
0
    BFD_ASSERT (0 && "Error: branch out of range.  Cannot create branch.");
18667
18668
0
  bfd_vma patched_inst = 0xf0009000
18669
0
    | s << 26 /* S.  */
18670
0
    | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10.  */
18671
0
    | j1 << 13 /* J1.  */
18672
0
    | j2 << 11 /* J2.  */
18673
0
    | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11.  */
18674
18675
0
  return patched_inst;
18676
0
}
18677
18678
static inline bfd_vma
18679
create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18680
0
{
18681
  /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18682
     LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2).  */
18683
0
  bfd_vma patched_inst = 0xe8900000
18684
0
    | (/*W=*/wback << 21)
18685
0
    | (base_reg << 16)
18686
0
    | (reg_mask & 0x0000ffff);
18687
18688
0
  return patched_inst;
18689
0
}
18690
18691
static inline bfd_vma
18692
create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18693
0
{
18694
  /* A8.8.60 LDMDB/LDMEA (A8-402)
18695
     LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1).  */
18696
0
  bfd_vma patched_inst = 0xe9100000
18697
0
    | (/*W=*/wback << 21)
18698
0
    | (base_reg << 16)
18699
0
    | (reg_mask & 0x0000ffff);
18700
18701
0
  return patched_inst;
18702
0
}
18703
18704
static inline bfd_vma
18705
create_instruction_mov (int target_reg, int source_reg)
18706
0
{
18707
  /* A8.8.103 MOV (register) (A8-486)
18708
     MOV Rd, Rm (Encoding T1).  */
18709
0
  bfd_vma patched_inst = 0x4600
18710
0
    | (target_reg & 0x7)
18711
0
    | ((target_reg & 0x8) >> 3) << 7
18712
0
    | (source_reg << 3);
18713
18714
0
  return patched_inst;
18715
0
}
18716
18717
static inline bfd_vma
18718
create_instruction_sub (int target_reg, int source_reg, int value)
18719
0
{
18720
  /* A8.8.221 SUB (immediate) (A8-708)
18721
     SUB Rd, Rn, #value (Encoding T3).  */
18722
0
  bfd_vma patched_inst = 0xf1a00000
18723
0
    | (target_reg << 8)
18724
0
    | (source_reg << 16)
18725
0
    | (/*S=*/0 << 20)
18726
0
    | ((value & 0x800) >> 11) << 26
18727
0
    | ((value & 0x700) >>  8) << 12
18728
0
    | (value & 0x0ff);
18729
18730
0
  return patched_inst;
18731
0
}
18732
18733
static inline bfd_vma
18734
create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18735
         int first_reg)
18736
0
{
18737
  /* A8.8.332 VLDM (A8-922)
18738
     VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2).  */
18739
0
  bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18740
0
    | (/*W=*/wback << 21)
18741
0
    | (base_reg << 16)
18742
0
    | (num_words & 0x000000ff)
18743
0
    | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18744
0
    | (first_reg & 0x00000001) << 22;
18745
18746
0
  return patched_inst;
18747
0
}
18748
18749
static inline bfd_vma
18750
create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18751
         int first_reg)
18752
0
{
18753
  /* A8.8.332 VLDM (A8-922)
18754
     VLMD{MODE} Rn!, {} (Encoding T1 or T2).  */
18755
0
  bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18756
0
    | (base_reg << 16)
18757
0
    | (num_words & 0x000000ff)
18758
0
    | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18759
0
    | (first_reg & 0x00000001) << 22;
18760
18761
0
  return patched_inst;
18762
0
}
18763
18764
static inline bfd_vma
18765
create_instruction_udf_w (int value)
18766
0
{
18767
  /* A8.8.247 UDF (A8-758)
18768
     Undefined (Encoding T2).  */
18769
0
  bfd_vma patched_inst = 0xf7f0a000
18770
0
    | (value & 0x00000fff)
18771
0
    | (value & 0x000f0000) << 16;
18772
18773
0
  return patched_inst;
18774
0
}
18775
18776
static inline bfd_vma
18777
create_instruction_udf (int value)
18778
0
{
18779
  /* A8.8.247 UDF (A8-758)
18780
     Undefined (Encoding T1).  */
18781
0
  bfd_vma patched_inst = 0xde00
18782
0
    | (value & 0xff);
18783
18784
0
  return patched_inst;
18785
0
}
18786
18787
/* Functions writing an instruction in memory, returning the next
18788
   memory position to write to.  */
18789
18790
static inline bfd_byte *
18791
push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18792
        bfd * output_bfd, bfd_byte *pt, insn32 insn)
18793
0
{
18794
0
  put_thumb2_insn (htab, output_bfd, insn, pt);
18795
0
  return pt + 4;
18796
0
}
18797
18798
static inline bfd_byte *
18799
push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18800
        bfd * output_bfd, bfd_byte *pt, insn32 insn)
18801
0
{
18802
0
  put_thumb_insn (htab, output_bfd, insn, pt);
18803
0
  return pt + 2;
18804
0
}
18805
18806
/* Function filling up a region in memory with T1 and T2 UDFs taking
18807
   care of alignment.  */
18808
18809
static bfd_byte *
18810
stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18811
       bfd *       output_bfd,
18812
       const bfd_byte * const  base_stub_contents,
18813
       bfd_byte * const  from_stub_contents,
18814
       const bfd_byte * const  end_stub_contents)
18815
0
{
18816
0
  bfd_byte *current_stub_contents = from_stub_contents;
18817
18818
  /* Fill the remaining of the stub with deterministic contents : UDF
18819
     instructions.
18820
     Check if realignment is needed on modulo 4 frontier using T1, to
18821
     further use T2.  */
18822
0
  if ((current_stub_contents < end_stub_contents)
18823
0
      && !((current_stub_contents - base_stub_contents) % 2)
18824
0
      && ((current_stub_contents - base_stub_contents) % 4))
18825
0
    current_stub_contents =
18826
0
      push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18827
0
        create_instruction_udf (0));
18828
18829
0
  for (; current_stub_contents < end_stub_contents;)
18830
0
    current_stub_contents =
18831
0
      push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18832
0
        create_instruction_udf_w (0));
18833
18834
0
  return current_stub_contents;
18835
0
}
18836
18837
/* Functions writing the stream of instructions equivalent to the
18838
   derived sequence for ldmia, ldmdb, vldm respectively.  */
18839
18840
static void
18841
stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18842
               bfd * output_bfd,
18843
               const insn32 initial_insn,
18844
               const bfd_byte *const initial_insn_addr,
18845
               bfd_byte *const base_stub_contents)
18846
0
{
18847
0
  int wback = (initial_insn & 0x00200000) >> 21;
18848
0
  int ri, rn = (initial_insn & 0x000F0000) >> 16;
18849
0
  int insn_all_registers = initial_insn & 0x0000ffff;
18850
0
  int insn_low_registers, insn_high_registers;
18851
0
  int usable_register_mask;
18852
0
  int nb_registers = elf32_arm_popcount (insn_all_registers);
18853
0
  int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18854
0
  int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18855
0
  bfd_byte *current_stub_contents = base_stub_contents;
18856
18857
0
  BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18858
18859
  /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18860
     smaller than 8 registers load sequences that do not cause the
18861
     hardware issue.  */
18862
0
  if (nb_registers <= 8)
18863
0
    {
18864
      /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}.  */
18865
0
      current_stub_contents =
18866
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18867
0
          initial_insn);
18868
18869
      /* B initial_insn_addr+4.  */
18870
0
      if (!restore_pc)
18871
0
  current_stub_contents =
18872
0
    push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18873
0
            create_instruction_branch_absolute
18874
0
            (initial_insn_addr - current_stub_contents));
18875
18876
      /* Fill the remaining of the stub with deterministic contents.  */
18877
0
      current_stub_contents =
18878
0
  stm32l4xx_fill_stub_udf (htab, output_bfd,
18879
0
         base_stub_contents, current_stub_contents,
18880
0
         base_stub_contents +
18881
0
         STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18882
18883
0
      return;
18884
0
    }
18885
18886
  /* - reg_list[13] == 0.  */
18887
0
  BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18888
18889
  /* - reg_list[14] & reg_list[15] != 1.  */
18890
0
  BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18891
18892
  /* - if (wback==1) reg_list[rn] == 0.  */
18893
0
  BFD_ASSERT (!wback || !restore_rn);
18894
18895
  /* - nb_registers > 8.  */
18896
0
  BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18897
18898
  /* At this point, LDMxx initial insn loads between 9 and 14 registers.  */
18899
18900
  /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18901
    - One with the 7 lowest registers (register mask 0x007F)
18902
      This LDM will finally contain between 2 and 7 registers
18903
    - One with the 7 highest registers (register mask 0xDF80)
18904
      This ldm will finally contain between 2 and 7 registers.  */
18905
0
  insn_low_registers = insn_all_registers & 0x007F;
18906
0
  insn_high_registers = insn_all_registers & 0xDF80;
18907
18908
  /* A spare register may be needed during this veneer to temporarily
18909
     handle the base register.  This register will be restored with the
18910
     last LDM operation.
18911
     The usable register may be any general purpose register (that
18912
     excludes PC, SP, LR : register mask is 0x1FFF).  */
18913
0
  usable_register_mask = 0x1FFF;
18914
18915
  /* Generate the stub function.  */
18916
0
  if (wback)
18917
0
    {
18918
      /* LDMIA Rn!, {R-low-register-list} : (Encoding T2).  */
18919
0
      current_stub_contents =
18920
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18921
0
          create_instruction_ldmia
18922
0
          (rn, /*wback=*/1, insn_low_registers));
18923
18924
      /* LDMIA Rn!, {R-high-register-list} : (Encoding T2).  */
18925
0
      current_stub_contents =
18926
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18927
0
          create_instruction_ldmia
18928
0
          (rn, /*wback=*/1, insn_high_registers));
18929
0
      if (!restore_pc)
18930
0
  {
18931
    /* B initial_insn_addr+4.  */
18932
0
    current_stub_contents =
18933
0
      push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18934
0
        create_instruction_branch_absolute
18935
0
        (initial_insn_addr - current_stub_contents));
18936
0
       }
18937
0
    }
18938
0
  else /* if (!wback).  */
18939
0
    {
18940
0
      ri = rn;
18941
18942
      /* If Rn is not part of the high-register-list, move it there.  */
18943
0
      if (!(insn_high_registers & (1 << rn)))
18944
0
  {
18945
    /* Choose a Ri in the high-register-list that will be restored.  */
18946
0
    ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18947
18948
    /* MOV Ri, Rn.  */
18949
0
    current_stub_contents =
18950
0
      push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18951
0
        create_instruction_mov (ri, rn));
18952
0
  }
18953
18954
      /* LDMIA Ri!, {R-low-register-list} : (Encoding T2).  */
18955
0
      current_stub_contents =
18956
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18957
0
          create_instruction_ldmia
18958
0
          (ri, /*wback=*/1, insn_low_registers));
18959
18960
      /* LDMIA Ri, {R-high-register-list} : (Encoding T2).  */
18961
0
      current_stub_contents =
18962
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18963
0
          create_instruction_ldmia
18964
0
          (ri, /*wback=*/0, insn_high_registers));
18965
18966
0
      if (!restore_pc)
18967
0
  {
18968
    /* B initial_insn_addr+4.  */
18969
0
    current_stub_contents =
18970
0
      push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18971
0
        create_instruction_branch_absolute
18972
0
        (initial_insn_addr - current_stub_contents));
18973
0
  }
18974
0
    }
18975
18976
  /* Fill the remaining of the stub with deterministic contents.  */
18977
0
  current_stub_contents =
18978
0
    stm32l4xx_fill_stub_udf (htab, output_bfd,
18979
0
           base_stub_contents, current_stub_contents,
18980
0
           base_stub_contents +
18981
0
           STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18982
0
}
18983
18984
static void
18985
stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18986
               bfd * output_bfd,
18987
               const insn32 initial_insn,
18988
               const bfd_byte *const initial_insn_addr,
18989
               bfd_byte *const base_stub_contents)
18990
0
{
18991
0
  int wback = (initial_insn & 0x00200000) >> 21;
18992
0
  int ri, rn = (initial_insn & 0x000f0000) >> 16;
18993
0
  int insn_all_registers = initial_insn & 0x0000ffff;
18994
0
  int insn_low_registers, insn_high_registers;
18995
0
  int usable_register_mask;
18996
0
  int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18997
0
  int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18998
0
  int nb_registers = elf32_arm_popcount (insn_all_registers);
18999
0
  bfd_byte *current_stub_contents = base_stub_contents;
19000
19001
0
  BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
19002
19003
  /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19004
     smaller than 8 registers load sequences that do not cause the
19005
     hardware issue.  */
19006
0
  if (nb_registers <= 8)
19007
0
    {
19008
      /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}.  */
19009
0
      current_stub_contents =
19010
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19011
0
          initial_insn);
19012
19013
      /* B initial_insn_addr+4.  */
19014
0
      current_stub_contents =
19015
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19016
0
          create_instruction_branch_absolute
19017
0
          (initial_insn_addr - current_stub_contents));
19018
19019
      /* Fill the remaining of the stub with deterministic contents.  */
19020
0
      current_stub_contents =
19021
0
  stm32l4xx_fill_stub_udf (htab, output_bfd,
19022
0
         base_stub_contents, current_stub_contents,
19023
0
         base_stub_contents +
19024
0
         STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19025
19026
0
      return;
19027
0
    }
19028
19029
  /* - reg_list[13] == 0.  */
19030
0
  BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19031
19032
  /* - reg_list[14] & reg_list[15] != 1.  */
19033
0
  BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19034
19035
  /* - if (wback==1) reg_list[rn] == 0.  */
19036
0
  BFD_ASSERT (!wback || !restore_rn);
19037
19038
  /* - nb_registers > 8.  */
19039
0
  BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19040
19041
  /* At this point, LDMxx initial insn loads between 9 and 14 registers.  */
19042
19043
  /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19044
    - One with the 7 lowest registers (register mask 0x007F)
19045
      This LDM will finally contain between 2 and 7 registers
19046
    - One with the 7 highest registers (register mask 0xDF80)
19047
      This ldm will finally contain between 2 and 7 registers.  */
19048
0
  insn_low_registers = insn_all_registers & 0x007F;
19049
0
  insn_high_registers = insn_all_registers & 0xDF80;
19050
19051
  /* A spare register may be needed during this veneer to temporarily
19052
     handle the base register.  This register will be restored with
19053
     the last LDM operation.
19054
     The usable register may be any general purpose register (that excludes
19055
     PC, SP, LR : register mask is 0x1FFF).  */
19056
0
  usable_register_mask = 0x1FFF;
19057
19058
  /* Generate the stub function.  */
19059
0
  if (!wback && !restore_pc && !restore_rn)
19060
0
    {
19061
      /* Choose a Ri in the low-register-list that will be restored.  */
19062
0
      ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19063
19064
      /* MOV Ri, Rn.  */
19065
0
      current_stub_contents =
19066
0
  push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19067
0
          create_instruction_mov (ri, rn));
19068
19069
      /* LDMDB Ri!, {R-high-register-list}.  */
19070
0
      current_stub_contents =
19071
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19072
0
          create_instruction_ldmdb
19073
0
          (ri, /*wback=*/1, insn_high_registers));
19074
19075
      /* LDMDB Ri, {R-low-register-list}.  */
19076
0
      current_stub_contents =
19077
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19078
0
          create_instruction_ldmdb
19079
0
          (ri, /*wback=*/0, insn_low_registers));
19080
19081
      /* B initial_insn_addr+4.  */
19082
0
      current_stub_contents =
19083
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19084
0
          create_instruction_branch_absolute
19085
0
          (initial_insn_addr - current_stub_contents));
19086
0
    }
19087
0
  else if (wback && !restore_pc && !restore_rn)
19088
0
    {
19089
      /* LDMDB Rn!, {R-high-register-list}.  */
19090
0
      current_stub_contents =
19091
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19092
0
          create_instruction_ldmdb
19093
0
          (rn, /*wback=*/1, insn_high_registers));
19094
19095
      /* LDMDB Rn!, {R-low-register-list}.  */
19096
0
      current_stub_contents =
19097
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19098
0
          create_instruction_ldmdb
19099
0
          (rn, /*wback=*/1, insn_low_registers));
19100
19101
      /* B initial_insn_addr+4.  */
19102
0
      current_stub_contents =
19103
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19104
0
          create_instruction_branch_absolute
19105
0
          (initial_insn_addr - current_stub_contents));
19106
0
    }
19107
0
  else if (!wback && restore_pc && !restore_rn)
19108
0
    {
19109
      /* Choose a Ri in the high-register-list that will be restored.  */
19110
0
      ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19111
19112
      /* SUB Ri, Rn, #(4*nb_registers).  */
19113
0
      current_stub_contents =
19114
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19115
0
          create_instruction_sub (ri, rn, (4 * nb_registers)));
19116
19117
      /* LDMIA Ri!, {R-low-register-list}.  */
19118
0
      current_stub_contents =
19119
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19120
0
          create_instruction_ldmia
19121
0
          (ri, /*wback=*/1, insn_low_registers));
19122
19123
      /* LDMIA Ri, {R-high-register-list}.  */
19124
0
      current_stub_contents =
19125
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19126
0
          create_instruction_ldmia
19127
0
          (ri, /*wback=*/0, insn_high_registers));
19128
0
    }
19129
0
  else if (wback && restore_pc && !restore_rn)
19130
0
    {
19131
      /* Choose a Ri in the high-register-list that will be restored.  */
19132
0
      ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19133
19134
      /* SUB Rn, Rn, #(4*nb_registers)  */
19135
0
      current_stub_contents =
19136
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19137
0
          create_instruction_sub (rn, rn, (4 * nb_registers)));
19138
19139
      /* MOV Ri, Rn.  */
19140
0
      current_stub_contents =
19141
0
  push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19142
0
          create_instruction_mov (ri, rn));
19143
19144
      /* LDMIA Ri!, {R-low-register-list}.  */
19145
0
      current_stub_contents =
19146
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19147
0
          create_instruction_ldmia
19148
0
          (ri, /*wback=*/1, insn_low_registers));
19149
19150
      /* LDMIA Ri, {R-high-register-list}.  */
19151
0
      current_stub_contents =
19152
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19153
0
          create_instruction_ldmia
19154
0
          (ri, /*wback=*/0, insn_high_registers));
19155
0
    }
19156
0
  else if (!wback && !restore_pc && restore_rn)
19157
0
    {
19158
0
      ri = rn;
19159
0
      if (!(insn_low_registers & (1 << rn)))
19160
0
  {
19161
    /* Choose a Ri in the low-register-list that will be restored.  */
19162
0
    ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19163
19164
    /* MOV Ri, Rn.  */
19165
0
    current_stub_contents =
19166
0
      push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19167
0
        create_instruction_mov (ri, rn));
19168
0
  }
19169
19170
      /* LDMDB Ri!, {R-high-register-list}.  */
19171
0
      current_stub_contents =
19172
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19173
0
          create_instruction_ldmdb
19174
0
          (ri, /*wback=*/1, insn_high_registers));
19175
19176
      /* LDMDB Ri, {R-low-register-list}.  */
19177
0
      current_stub_contents =
19178
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19179
0
          create_instruction_ldmdb
19180
0
          (ri, /*wback=*/0, insn_low_registers));
19181
19182
      /* B initial_insn_addr+4.  */
19183
0
      current_stub_contents =
19184
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19185
0
          create_instruction_branch_absolute
19186
0
          (initial_insn_addr - current_stub_contents));
19187
0
    }
19188
0
  else if (!wback && restore_pc && restore_rn)
19189
0
    {
19190
0
      ri = rn;
19191
0
      if (!(insn_high_registers & (1 << rn)))
19192
0
  {
19193
    /* Choose a Ri in the high-register-list that will be restored.  */
19194
0
    ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19195
0
  }
19196
19197
      /* SUB Ri, Rn, #(4*nb_registers).  */
19198
0
      current_stub_contents =
19199
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19200
0
          create_instruction_sub (ri, rn, (4 * nb_registers)));
19201
19202
      /* LDMIA Ri!, {R-low-register-list}.  */
19203
0
      current_stub_contents =
19204
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19205
0
          create_instruction_ldmia
19206
0
          (ri, /*wback=*/1, insn_low_registers));
19207
19208
      /* LDMIA Ri, {R-high-register-list}.  */
19209
0
      current_stub_contents =
19210
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19211
0
          create_instruction_ldmia
19212
0
          (ri, /*wback=*/0, insn_high_registers));
19213
0
    }
19214
0
  else if (wback && restore_rn)
19215
0
    {
19216
      /* The assembler should not have accepted to encode this.  */
19217
0
      BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19218
0
  "undefined behavior.\n");
19219
0
    }
19220
19221
  /* Fill the remaining of the stub with deterministic contents.  */
19222
0
  current_stub_contents =
19223
0
    stm32l4xx_fill_stub_udf (htab, output_bfd,
19224
0
           base_stub_contents, current_stub_contents,
19225
0
           base_stub_contents +
19226
0
           STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19227
19228
0
}
19229
19230
static void
19231
stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19232
              bfd * output_bfd,
19233
              const insn32 initial_insn,
19234
              const bfd_byte *const initial_insn_addr,
19235
              bfd_byte *const base_stub_contents)
19236
0
{
19237
0
  int num_words = initial_insn & 0xff;
19238
0
  bfd_byte *current_stub_contents = base_stub_contents;
19239
19240
0
  BFD_ASSERT (is_thumb2_vldm (initial_insn));
19241
19242
  /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19243
     smaller than 8 words load sequences that do not cause the
19244
     hardware issue.  */
19245
0
  if (num_words <= 8)
19246
0
    {
19247
      /* Untouched instruction.  */
19248
0
      current_stub_contents =
19249
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19250
0
          initial_insn);
19251
19252
      /* B initial_insn_addr+4.  */
19253
0
      current_stub_contents =
19254
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19255
0
          create_instruction_branch_absolute
19256
0
          (initial_insn_addr - current_stub_contents));
19257
0
    }
19258
0
  else
19259
0
    {
19260
0
      bool is_dp = /* DP encoding.  */
19261
0
  (initial_insn & 0xfe100f00) == 0xec100b00;
19262
0
      bool is_ia_nobang = /* (IA without !).  */
19263
0
  (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19264
0
      bool is_ia_bang = /* (IA with !) - includes VPOP.  */
19265
0
  (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19266
0
      bool is_db_bang = /* (DB with !).  */
19267
0
  (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19268
0
      int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19269
      /* d = UInt (Vd:D);.  */
19270
0
      int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19271
0
  | (((unsigned int)initial_insn << 9) >> 31);
19272
19273
      /* Compute the number of 8-words chunks needed to split.  */
19274
0
      int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19275
0
      int chunk;
19276
19277
      /* The test coverage has been done assuming the following
19278
   hypothesis that exactly one of the previous is_ predicates is
19279
   true.  */
19280
0
      BFD_ASSERT (    (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19281
0
      && !(is_ia_nobang & is_ia_bang & is_db_bang));
19282
19283
      /* We treat the cutting of the words in one pass for all
19284
   cases, then we emit the adjustments:
19285
19286
   vldm rx, {...}
19287
   -> vldm rx!, {8_words_or_less} for each needed 8_word
19288
   -> sub rx, rx, #size (list)
19289
19290
   vldm rx!, {...}
19291
   -> vldm rx!, {8_words_or_less} for each needed 8_word
19292
   This also handles vpop instruction (when rx is sp)
19293
19294
   vldmd rx!, {...}
19295
   -> vldmb rx!, {8_words_or_less} for each needed 8_word.  */
19296
0
      for (chunk = 0; chunk < chunks; ++chunk)
19297
0
  {
19298
0
    bfd_vma new_insn = 0;
19299
19300
0
    if (is_ia_nobang || is_ia_bang)
19301
0
      {
19302
0
        new_insn = create_instruction_vldmia
19303
0
    (base_reg,
19304
0
     is_dp,
19305
0
     /*wback= .  */1,
19306
0
     chunks - (chunk + 1) ?
19307
0
     8 : num_words - chunk * 8,
19308
0
     first_reg + chunk * 8);
19309
0
      }
19310
0
    else if (is_db_bang)
19311
0
      {
19312
0
        new_insn = create_instruction_vldmdb
19313
0
    (base_reg,
19314
0
     is_dp,
19315
0
     chunks - (chunk + 1) ?
19316
0
     8 : num_words - chunk * 8,
19317
0
     first_reg + chunk * 8);
19318
0
      }
19319
19320
0
    if (new_insn)
19321
0
      current_stub_contents =
19322
0
        push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19323
0
          new_insn);
19324
0
  }
19325
19326
      /* Only this case requires the base register compensation
19327
   subtract.  */
19328
0
      if (is_ia_nobang)
19329
0
  {
19330
0
    current_stub_contents =
19331
0
      push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19332
0
        create_instruction_sub
19333
0
        (base_reg, base_reg, 4*num_words));
19334
0
  }
19335
19336
      /* B initial_insn_addr+4.  */
19337
0
      current_stub_contents =
19338
0
  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19339
0
          create_instruction_branch_absolute
19340
0
          (initial_insn_addr - current_stub_contents));
19341
0
    }
19342
19343
  /* Fill the remaining of the stub with deterministic contents.  */
19344
0
  current_stub_contents =
19345
0
    stm32l4xx_fill_stub_udf (htab, output_bfd,
19346
0
           base_stub_contents, current_stub_contents,
19347
0
           base_stub_contents +
19348
0
           STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19349
0
}
19350
19351
static void
19352
stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19353
         bfd * output_bfd,
19354
         const insn32 wrong_insn,
19355
         const bfd_byte *const wrong_insn_addr,
19356
         bfd_byte *const stub_contents)
19357
0
{
19358
0
  if (is_thumb2_ldmia (wrong_insn))
19359
0
    stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19360
0
             wrong_insn, wrong_insn_addr,
19361
0
             stub_contents);
19362
0
  else if (is_thumb2_ldmdb (wrong_insn))
19363
0
    stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19364
0
             wrong_insn, wrong_insn_addr,
19365
0
             stub_contents);
19366
0
  else if (is_thumb2_vldm (wrong_insn))
19367
0
    stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19368
0
            wrong_insn, wrong_insn_addr,
19369
0
            stub_contents);
19370
0
}
19371
19372
/* End of stm32l4xx work-around.  */
19373
19374
19375
/* Do code byteswapping.  Return FALSE afterwards so that the section is
19376
   written out as normal.  */
19377
19378
static bool
19379
elf32_arm_write_section (bfd *output_bfd,
19380
       struct bfd_link_info *link_info,
19381
       asection *sec,
19382
       bfd_byte *contents)
19383
0
{
19384
0
  unsigned int mapcount, errcount;
19385
0
  _arm_elf_section_data *arm_data;
19386
0
  struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19387
0
  elf32_arm_section_map *map;
19388
0
  elf32_vfp11_erratum_list *errnode;
19389
0
  elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19390
0
  bfd_vma ptr;
19391
0
  bfd_vma end;
19392
0
  bfd_vma offset = sec->output_section->vma + sec->output_offset;
19393
0
  bfd_byte tmp;
19394
0
  unsigned int i;
19395
19396
0
  if (globals == NULL)
19397
0
    return false;
19398
19399
  /* If this section has not been allocated an _arm_elf_section_data
19400
     structure then we cannot record anything.  */
19401
0
  arm_data = get_arm_elf_section_data (sec);
19402
0
  if (arm_data == NULL)
19403
0
    return false;
19404
19405
0
  mapcount = arm_data->mapcount;
19406
0
  map = arm_data->map;
19407
0
  errcount = arm_data->erratumcount;
19408
19409
0
  if (errcount != 0)
19410
0
    {
19411
0
      unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19412
19413
0
      for (errnode = arm_data->erratumlist; errnode != 0;
19414
0
     errnode = errnode->next)
19415
0
  {
19416
0
    bfd_vma target = errnode->vma - offset;
19417
19418
0
    switch (errnode->type)
19419
0
      {
19420
0
      case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19421
0
        {
19422
0
    bfd_vma branch_to_veneer;
19423
    /* Original condition code of instruction, plus bit mask for
19424
       ARM B instruction.  */
19425
0
    unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19426
0
          | 0x0a000000;
19427
19428
    /* The instruction is before the label.  */
19429
0
    target -= 4;
19430
19431
    /* Above offset included in -4 below.  */
19432
0
    branch_to_veneer = errnode->u.b.veneer->vma
19433
0
           - errnode->vma - 4;
19434
19435
0
    if ((signed) branch_to_veneer < -(1 << 25)
19436
0
        || (signed) branch_to_veneer >= (1 << 25))
19437
0
      _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19438
0
          "range"), output_bfd);
19439
19440
0
    insn |= (branch_to_veneer >> 2) & 0xffffff;
19441
0
    contents[endianflip ^ target] = insn & 0xff;
19442
0
    contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19443
0
    contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19444
0
    contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19445
0
        }
19446
0
        break;
19447
19448
0
      case VFP11_ERRATUM_ARM_VENEER:
19449
0
        {
19450
0
    bfd_vma branch_from_veneer;
19451
0
    unsigned int insn;
19452
19453
    /* Take size of veneer into account.  */
19454
0
    branch_from_veneer = errnode->u.v.branch->vma
19455
0
             - errnode->vma - 12;
19456
19457
0
    if ((signed) branch_from_veneer < -(1 << 25)
19458
0
        || (signed) branch_from_veneer >= (1 << 25))
19459
0
      _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19460
0
          "range"), output_bfd);
19461
19462
    /* Original instruction.  */
19463
0
    insn = errnode->u.v.branch->u.b.vfp_insn;
19464
0
    contents[endianflip ^ target] = insn & 0xff;
19465
0
    contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19466
0
    contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19467
0
    contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19468
19469
    /* Branch back to insn after original insn.  */
19470
0
    insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19471
0
    contents[endianflip ^ (target + 4)] = insn & 0xff;
19472
0
    contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19473
0
    contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19474
0
    contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19475
0
        }
19476
0
        break;
19477
19478
0
      default:
19479
0
        abort ();
19480
0
      }
19481
0
  }
19482
0
    }
19483
19484
0
  if (arm_data->stm32l4xx_erratumcount != 0)
19485
0
    {
19486
0
      for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19487
0
     stm32l4xx_errnode != 0;
19488
0
     stm32l4xx_errnode = stm32l4xx_errnode->next)
19489
0
  {
19490
0
    bfd_vma target = stm32l4xx_errnode->vma - offset;
19491
19492
0
    switch (stm32l4xx_errnode->type)
19493
0
      {
19494
0
      case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19495
0
        {
19496
0
    unsigned int insn;
19497
0
    bfd_vma branch_to_veneer =
19498
0
      stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19499
19500
0
    if ((signed) branch_to_veneer < -(1 << 24)
19501
0
        || (signed) branch_to_veneer >= (1 << 24))
19502
0
      {
19503
0
        bfd_vma out_of_range =
19504
0
          ((signed) branch_to_veneer < -(1 << 24)) ?
19505
0
          - branch_to_veneer - (1 << 24) :
19506
0
          ((signed) branch_to_veneer >= (1 << 24)) ?
19507
0
          branch_to_veneer - (1 << 24) : 0;
19508
19509
0
        _bfd_error_handler
19510
0
          (_("%pB(%#" PRIx64 "): error: "
19511
0
       "cannot create STM32L4XX veneer; "
19512
0
       "jump out of range by %" PRId64 " bytes; "
19513
0
       "cannot encode branch instruction"),
19514
0
           output_bfd,
19515
0
           (uint64_t) (stm32l4xx_errnode->vma - 4),
19516
0
           (int64_t) out_of_range);
19517
0
        continue;
19518
0
      }
19519
19520
0
    insn = create_instruction_branch_absolute
19521
0
      (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19522
19523
    /* The instruction is before the label.  */
19524
0
    target -= 4;
19525
19526
0
    put_thumb2_insn (globals, output_bfd,
19527
0
         (bfd_vma) insn, contents + target);
19528
0
        }
19529
0
        break;
19530
19531
0
      case STM32L4XX_ERRATUM_VENEER:
19532
0
        {
19533
0
    bfd_byte * veneer;
19534
0
    bfd_byte * veneer_r;
19535
0
    unsigned int insn;
19536
19537
0
    veneer = contents + target;
19538
0
    veneer_r = veneer
19539
0
      + stm32l4xx_errnode->u.b.veneer->vma
19540
0
      - stm32l4xx_errnode->vma - 4;
19541
19542
0
    if ((signed) (veneer_r - veneer -
19543
0
            STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19544
0
            STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19545
0
            STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19546
0
            STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19547
0
        || (signed) (veneer_r - veneer) >= (1 << 24))
19548
0
      {
19549
0
        _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19550
0
            "veneer"), output_bfd);
19551
0
         continue;
19552
0
      }
19553
19554
    /* Original instruction.  */
19555
0
    insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19556
19557
0
    stm32l4xx_create_replacing_stub
19558
0
      (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19559
0
        }
19560
0
        break;
19561
19562
0
      default:
19563
0
        abort ();
19564
0
      }
19565
0
  }
19566
0
    }
19567
19568
0
  if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19569
0
    {
19570
0
      arm_unwind_table_edit *edit_node
19571
0
  = arm_data->u.exidx.unwind_edit_list;
19572
      /* Now, sec->size is the size of the section we will write.  The original
19573
   size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19574
   markers) was sec->rawsize.  (This isn't the case if we perform no
19575
   edits, then rawsize will be zero and we should use size).  */
19576
0
      bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19577
0
      unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19578
0
      unsigned int in_index, out_index;
19579
0
      bfd_vma add_to_offsets = 0;
19580
19581
0
      if (edited_contents == NULL)
19582
0
  return false;
19583
0
      for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19584
0
  {
19585
0
    if (edit_node)
19586
0
      {
19587
0
        unsigned int edit_index = edit_node->index;
19588
19589
0
        if (in_index < edit_index && in_index * 8 < input_size)
19590
0
    {
19591
0
      copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19592
0
            contents + in_index * 8, add_to_offsets);
19593
0
      out_index++;
19594
0
      in_index++;
19595
0
    }
19596
0
        else if (in_index == edit_index
19597
0
           || (in_index * 8 >= input_size
19598
0
         && edit_index == UINT_MAX))
19599
0
    {
19600
0
      switch (edit_node->type)
19601
0
        {
19602
0
        case DELETE_EXIDX_ENTRY:
19603
0
          in_index++;
19604
0
          add_to_offsets += 8;
19605
0
          break;
19606
19607
0
        case INSERT_EXIDX_CANTUNWIND_AT_END:
19608
0
          {
19609
0
      asection *text_sec = edit_node->linked_section;
19610
0
      bfd_vma text_offset = text_sec->output_section->vma
19611
0
                + text_sec->output_offset
19612
0
                + text_sec->size;
19613
0
      bfd_vma exidx_offset = offset + out_index * 8;
19614
0
      unsigned long prel31_offset;
19615
19616
      /* Note: this is meant to be equivalent to an
19617
         R_ARM_PREL31 relocation.  These synthetic
19618
         EXIDX_CANTUNWIND markers are not relocated by the
19619
         usual BFD method.  */
19620
0
      prel31_offset = (text_offset - exidx_offset)
19621
0
          & 0x7ffffffful;
19622
0
      if (bfd_link_relocatable (link_info))
19623
0
        {
19624
          /* Here relocation for new EXIDX_CANTUNWIND is
19625
             created, so there is no need to
19626
             adjust offset by hand.  */
19627
0
          prel31_offset = text_sec->output_offset
19628
0
              + text_sec->size;
19629
0
        }
19630
19631
      /* First address we can't unwind.  */
19632
0
      bfd_put_32 (output_bfd, prel31_offset,
19633
0
            &edited_contents[out_index * 8]);
19634
19635
      /* Code for EXIDX_CANTUNWIND.  */
19636
0
      bfd_put_32 (output_bfd, 0x1,
19637
0
            &edited_contents[out_index * 8 + 4]);
19638
19639
0
      out_index++;
19640
0
      add_to_offsets -= 8;
19641
0
          }
19642
0
          break;
19643
0
        }
19644
19645
0
      edit_node = edit_node->next;
19646
0
    }
19647
0
      }
19648
0
    else
19649
0
      {
19650
        /* No more edits, copy remaining entries verbatim.  */
19651
0
        copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19652
0
        contents + in_index * 8, add_to_offsets);
19653
0
        out_index++;
19654
0
        in_index++;
19655
0
      }
19656
0
  }
19657
19658
0
      if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19659
0
  bfd_set_section_contents (output_bfd, sec->output_section,
19660
0
          edited_contents,
19661
0
          (file_ptr) sec->output_offset, sec->size);
19662
19663
0
      return true;
19664
0
    }
19665
19666
  /* Fix code to point to Cortex-A8 erratum stubs.  */
19667
0
  if (globals->fix_cortex_a8)
19668
0
    {
19669
0
      struct a8_branch_to_stub_data data;
19670
19671
0
      data.writing_section = sec;
19672
0
      data.contents = contents;
19673
19674
0
      bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19675
0
       & data);
19676
0
    }
19677
19678
0
  if (mapcount == 0)
19679
0
    return false;
19680
19681
0
  if (globals->byteswap_code)
19682
0
    {
19683
0
      qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19684
19685
0
      ptr = map[0].vma;
19686
0
      for (i = 0; i < mapcount; i++)
19687
0
  {
19688
0
    if (i == mapcount - 1)
19689
0
      end = sec->size;
19690
0
    else
19691
0
      end = map[i + 1].vma;
19692
19693
0
    switch (map[i].type)
19694
0
      {
19695
0
      case 'a':
19696
        /* Byte swap code words.  */
19697
0
        while (ptr + 3 < end)
19698
0
    {
19699
0
      tmp = contents[ptr];
19700
0
      contents[ptr] = contents[ptr + 3];
19701
0
      contents[ptr + 3] = tmp;
19702
0
      tmp = contents[ptr + 1];
19703
0
      contents[ptr + 1] = contents[ptr + 2];
19704
0
      contents[ptr + 2] = tmp;
19705
0
      ptr += 4;
19706
0
    }
19707
0
        break;
19708
19709
0
      case 't':
19710
        /* Byte swap code halfwords.  */
19711
0
        while (ptr + 1 < end)
19712
0
    {
19713
0
      tmp = contents[ptr];
19714
0
      contents[ptr] = contents[ptr + 1];
19715
0
      contents[ptr + 1] = tmp;
19716
0
      ptr += 2;
19717
0
    }
19718
0
        break;
19719
19720
0
      case 'd':
19721
        /* Leave data alone.  */
19722
0
        break;
19723
0
      }
19724
0
    ptr = end;
19725
0
  }
19726
0
    }
19727
19728
0
  free (map);
19729
0
  arm_data->mapcount = -1;
19730
0
  arm_data->mapsize = 0;
19731
0
  arm_data->map = NULL;
19732
19733
0
  return false;
19734
0
}
19735
19736
/* Mangle thumb function symbols as we read them in.  */
19737
19738
static bool
19739
elf32_arm_swap_symbol_in (bfd * abfd,
19740
        const void *psrc,
19741
        const void *pshn,
19742
        Elf_Internal_Sym *dst)
19743
7.69k
{
19744
7.69k
  if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19745
12
    return false;
19746
7.68k
  dst->st_target_internal = 0;
19747
19748
  /* New EABI objects mark thumb function symbols by setting the low bit of
19749
     the address.  */
19750
7.68k
  if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19751
7.68k
      || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19752
1.18k
    {
19753
1.18k
      if (dst->st_value & 1)
19754
153
  {
19755
153
    dst->st_value &= ~(bfd_vma) 1;
19756
153
    ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19757
153
           ST_BRANCH_TO_THUMB);
19758
153
  }
19759
1.02k
      else
19760
1.02k
  ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19761
1.18k
    }
19762
6.50k
  else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19763
263
    {
19764
263
      dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19765
263
      ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19766
263
    }
19767
6.24k
  else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19768
257
    ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19769
5.98k
  else
19770
5.98k
    ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19771
19772
7.68k
  return true;
19773
7.69k
}
19774
19775
19776
/* Mangle thumb function symbols as we write them out.  */
19777
19778
static void
19779
elf32_arm_swap_symbol_out (bfd *abfd,
19780
         const Elf_Internal_Sym *src,
19781
         void *cdst,
19782
         void *shndx)
19783
0
{
19784
0
  Elf_Internal_Sym newsym;
19785
19786
  /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19787
     of the address set, as per the new EABI.  We do this unconditionally
19788
     because objcopy does not set the elf header flags until after
19789
     it writes out the symbol table.  */
19790
0
  if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19791
0
    {
19792
0
      newsym = *src;
19793
0
      if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19794
0
  newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19795
0
      if (newsym.st_shndx != SHN_UNDEF)
19796
0
  {
19797
    /* Do this only for defined symbols. At link type, the static
19798
       linker will simulate the work of dynamic linker of resolving
19799
       symbols and will carry over the thumbness of found symbols to
19800
       the output symbol table. It's not clear how it happens, but
19801
       the thumbness of undefined symbols can well be different at
19802
       runtime, and writing '1' for them will be confusing for users
19803
       and possibly for dynamic linker itself.
19804
    */
19805
0
    newsym.st_value |= 1;
19806
0
  }
19807
19808
0
      src = &newsym;
19809
0
    }
19810
0
  bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19811
0
}
19812
19813
/* Add the PT_ARM_EXIDX program header.  */
19814
19815
static bool
19816
elf32_arm_modify_segment_map (bfd *abfd,
19817
            struct bfd_link_info *info ATTRIBUTE_UNUSED)
19818
0
{
19819
0
  struct elf_segment_map *m;
19820
0
  asection *sec;
19821
19822
0
  sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19823
0
  if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19824
0
    {
19825
      /* If there is already a PT_ARM_EXIDX header, then we do not
19826
   want to add another one.  This situation arises when running
19827
   "strip"; the input binary already has the header.  */
19828
0
      m = elf_seg_map (abfd);
19829
0
      while (m && m->p_type != PT_ARM_EXIDX)
19830
0
  m = m->next;
19831
0
      if (!m)
19832
0
  {
19833
0
    m = (struct elf_segment_map *)
19834
0
        bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19835
0
    if (m == NULL)
19836
0
      return false;
19837
0
    m->p_type = PT_ARM_EXIDX;
19838
0
    m->count = 1;
19839
0
    m->sections[0] = sec;
19840
19841
0
    m->next = elf_seg_map (abfd);
19842
0
    elf_seg_map (abfd) = m;
19843
0
  }
19844
0
    }
19845
19846
0
  return true;
19847
0
}
19848
19849
/* We may add a PT_ARM_EXIDX program header.  */
19850
19851
static int
19852
elf32_arm_additional_program_headers (bfd *abfd,
19853
              struct bfd_link_info *info ATTRIBUTE_UNUSED)
19854
0
{
19855
0
  asection *sec;
19856
19857
0
  sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19858
0
  if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19859
0
    return 1;
19860
0
  else
19861
0
    return 0;
19862
0
}
19863
19864
/* Hook called by the linker routine which adds symbols from an object
19865
   file.  */
19866
19867
static bool
19868
elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19869
         Elf_Internal_Sym *sym, const char **namep,
19870
         flagword *flagsp, asection **secp, bfd_vma *valp)
19871
0
{
19872
0
  if (elf32_arm_hash_table (info) == NULL)
19873
0
    return false;
19874
19875
0
  if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
19876
0
      && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19877
0
               flagsp, secp, valp))
19878
0
    return false;
19879
19880
0
  return true;
19881
0
}
19882
19883
/* We use this to override swap_symbol_in and swap_symbol_out.  */
19884
const struct elf_size_info elf32_arm_size_info =
19885
{
19886
  sizeof (Elf32_External_Ehdr),
19887
  sizeof (Elf32_External_Phdr),
19888
  sizeof (Elf32_External_Shdr),
19889
  sizeof (Elf32_External_Rel),
19890
  sizeof (Elf32_External_Rela),
19891
  sizeof (Elf32_External_Sym),
19892
  sizeof (Elf32_External_Dyn),
19893
  sizeof (Elf_External_Note),
19894
  4,
19895
  1,
19896
  32, 2,
19897
  ELFCLASS32, EV_CURRENT,
19898
  bfd_elf32_write_out_phdrs,
19899
  bfd_elf32_write_shdrs_and_ehdr,
19900
  bfd_elf32_checksum_contents,
19901
  bfd_elf32_write_relocs,
19902
  elf32_arm_swap_symbol_in,
19903
  elf32_arm_swap_symbol_out,
19904
  bfd_elf32_slurp_reloc_table,
19905
  bfd_elf32_slurp_symbol_table,
19906
  bfd_elf32_swap_dyn_in,
19907
  bfd_elf32_swap_dyn_out,
19908
  bfd_elf32_swap_reloc_in,
19909
  bfd_elf32_swap_reloc_out,
19910
  bfd_elf32_swap_reloca_in,
19911
  bfd_elf32_swap_reloca_out
19912
};
19913
19914
static bfd_vma
19915
read_code32 (const bfd *abfd, const bfd_byte *addr)
19916
663
{
19917
  /* V7 BE8 code is always little endian.  */
19918
663
  if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19919
0
    return bfd_getl32 (addr);
19920
19921
663
  return bfd_get_32 (abfd, addr);
19922
663
}
19923
19924
static bfd_vma
19925
read_code16 (const bfd *abfd, const bfd_byte *addr)
19926
329
{
19927
  /* V7 BE8 code is always little endian.  */
19928
329
  if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19929
0
    return bfd_getl16 (addr);
19930
19931
329
  return bfd_get_16 (abfd, addr);
19932
329
}
19933
19934
/* Return size of plt0 entry starting at ADDR
19935
   or (bfd_vma) -1 if size can not be determined.  */
19936
19937
static bfd_vma
19938
elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr,
19939
         bfd_size_type data_size)
19940
3
{
19941
3
  bfd_vma first_word;
19942
3
  bfd_vma plt0_size;
19943
19944
3
  if (data_size < 4)
19945
0
    return (bfd_vma) -1;
19946
19947
3
  first_word = read_code32 (abfd, addr);
19948
19949
3
  if (first_word == elf32_arm_plt0_entry[0])
19950
3
    plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19951
0
  else if (first_word == elf32_thumb2_plt0_entry[0])
19952
0
    plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19953
0
  else
19954
    /* We don't yet handle this PLT format.  */
19955
0
    return (bfd_vma) -1;
19956
19957
3
  return plt0_size;
19958
3
}
19959
19960
/* Return size of plt entry starting at offset OFFSET
19961
   of plt section located at address START
19962
   or (bfd_vma) -1 if size can not be determined.  */
19963
19964
static bfd_vma
19965
elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset,
19966
        bfd_size_type data_size)
19967
331
{
19968
331
  bfd_vma first_insn;
19969
331
  bfd_vma plt_size = 0;
19970
19971
  /* PLT entry size if fixed on Thumb-only platforms.  */
19972
331
  if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19973
0
    return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19974
19975
  /* Respect Thumb stub if necessary.  */
19976
331
  if (offset + 2 > data_size)
19977
2
    return (bfd_vma) -1;
19978
329
  if (read_code16 (abfd, start + offset) == elf32_arm_plt_thumb_stub[0])
19979
0
    {
19980
0
      plt_size += 2 * ARRAY_SIZE (elf32_arm_plt_thumb_stub);
19981
0
    }
19982
19983
  /* Strip immediate from first add.  */
19984
329
  if (offset + plt_size + 4 > data_size)
19985
0
    return (bfd_vma) -1;
19986
329
  first_insn = read_code32 (abfd, start + offset + plt_size) & 0xffffff00;
19987
19988
#ifdef FOUR_WORD_PLT
19989
  if (first_insn == elf32_arm_plt_entry[0])
19990
    plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19991
#else
19992
329
  if (first_insn == elf32_arm_plt_entry_long[0])
19993
0
    plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19994
329
  else if (first_insn == elf32_arm_plt_entry_short[0])
19995
329
    plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19996
0
#endif
19997
0
  else
19998
    /* We don't yet handle this PLT format.  */
19999
0
    return (bfd_vma) -1;
20000
20001
329
  return plt_size;
20002
329
}
20003
20004
/* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab.  */
20005
20006
static long
20007
elf32_arm_get_synthetic_symtab (bfd *abfd,
20008
             long symcount ATTRIBUTE_UNUSED,
20009
             asymbol **syms ATTRIBUTE_UNUSED,
20010
             long dynsymcount,
20011
             asymbol **dynsyms,
20012
             asymbol **ret)
20013
221
{
20014
221
  asection *relplt;
20015
221
  asymbol *s;
20016
221
  arelent *p;
20017
221
  long count, i, n;
20018
221
  size_t size;
20019
221
  Elf_Internal_Shdr *hdr;
20020
221
  char *names;
20021
221
  asection *plt;
20022
221
  bfd_vma offset;
20023
221
  bfd_byte *data;
20024
20025
221
  *ret = NULL;
20026
20027
221
  if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
20028
214
    return 0;
20029
20030
7
  if (dynsymcount <= 0)
20031
4
    return 0;
20032
20033
3
  relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20034
3
  if (relplt == NULL)
20035
0
    return 0;
20036
20037
3
  hdr = &elf_section_data (relplt)->this_hdr;
20038
3
  if (hdr->sh_link != elf_dynsymtab (abfd)
20039
3
      || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20040
0
    return 0;
20041
20042
3
  plt = bfd_get_section_by_name (abfd, ".plt");
20043
3
  if (plt == NULL)
20044
0
    return 0;
20045
20046
3
  if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
20047
0
    return -1;
20048
20049
3
  data = NULL;
20050
3
  if (!bfd_get_full_section_contents (abfd, plt, &data))
20051
0
    return -1;
20052
20053
3
  count = NUM_SHDR_ENTRIES (hdr);
20054
3
  size = count * sizeof (asymbol);
20055
3
  p = relplt->relocation;
20056
336
  for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20057
333
    {
20058
333
      size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20059
333
      if (p->addend != 0)
20060
0
  size += sizeof ("+0x") - 1 + 8;
20061
333
    }
20062
20063
3
  offset = elf32_arm_plt0_size (abfd, data, plt->size);
20064
3
  if (offset == (bfd_vma) -1
20065
3
      || (s = *ret = (asymbol *) bfd_malloc (size)) == NULL)
20066
0
    {
20067
0
      free (data);
20068
0
      return -1;
20069
0
    }
20070
20071
3
  names = (char *) (s + count);
20072
3
  p = relplt->relocation;
20073
3
  n = 0;
20074
332
  for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20075
331
    {
20076
331
      size_t len;
20077
20078
331
      bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset, plt->size);
20079
331
      if (plt_size == (bfd_vma) -1)
20080
2
  break;
20081
20082
329
      *s = **p->sym_ptr_ptr;
20083
      /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set.  Since
20084
   we are defining a symbol, ensure one of them is set.  */
20085
329
      if ((s->flags & BSF_LOCAL) == 0)
20086
329
  s->flags |= BSF_GLOBAL;
20087
329
      s->flags |= BSF_SYNTHETIC;
20088
329
      s->section = plt;
20089
329
      s->value = offset;
20090
329
      s->name = names;
20091
329
      s->udata.p = NULL;
20092
329
      len = strlen ((*p->sym_ptr_ptr)->name);
20093
329
      memcpy (names, (*p->sym_ptr_ptr)->name, len);
20094
329
      names += len;
20095
329
      if (p->addend != 0)
20096
0
  {
20097
0
    char buf[30], *a;
20098
20099
0
    memcpy (names, "+0x", sizeof ("+0x") - 1);
20100
0
    names += sizeof ("+0x") - 1;
20101
0
    bfd_sprintf_vma (abfd, buf, p->addend);
20102
0
    for (a = buf; *a == '0'; ++a)
20103
0
      ;
20104
0
    len = strlen (a);
20105
0
    memcpy (names, a, len);
20106
0
    names += len;
20107
0
  }
20108
329
      memcpy (names, "@plt", sizeof ("@plt"));
20109
329
      names += sizeof ("@plt");
20110
329
      ++s, ++n;
20111
329
      offset += plt_size;
20112
329
    }
20113
20114
3
  free (data);
20115
3
  return n;
20116
3
}
20117
20118
static bool
20119
elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
20120
1.98k
{
20121
1.98k
  if (hdr->sh_flags & SHF_ARM_PURECODE)
20122
48
    hdr->bfd_section->flags |= SEC_ELF_PURECODE;
20123
1.98k
  return true;
20124
1.98k
}
20125
20126
static flagword
20127
elf32_arm_lookup_section_flags (char *flag_name)
20128
0
{
20129
0
  if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20130
0
    return SHF_ARM_PURECODE;
20131
20132
0
  return SEC_NO_FLAGS;
20133
0
}
20134
20135
static unsigned int
20136
elf32_arm_count_additional_relocs (asection *sec)
20137
0
{
20138
0
  struct _arm_elf_section_data *arm_data;
20139
0
  arm_data = get_arm_elf_section_data (sec);
20140
20141
0
  return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20142
0
}
20143
20144
/* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20145
   has a type >= SHT_LOOS.  Returns TRUE if these fields were initialised
20146
   FALSE otherwise.  ISECTION is the best guess matching section from the
20147
   input bfd IBFD, but it might be NULL.  */
20148
20149
static bool
20150
elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20151
               bfd *obfd ATTRIBUTE_UNUSED,
20152
               const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20153
               Elf_Internal_Shdr *osection)
20154
0
{
20155
0
  switch (osection->sh_type)
20156
0
    {
20157
0
    case SHT_ARM_EXIDX:
20158
0
      {
20159
0
  Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20160
0
  Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20161
0
  unsigned i = 0;
20162
20163
0
  osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20164
0
  osection->sh_info = 0;
20165
20166
  /* The sh_link field must be set to the text section associated with
20167
     this index section.  Unfortunately the ARM EHABI does not specify
20168
     exactly how to determine this association.  Our caller does try
20169
     to match up OSECTION with its corresponding input section however
20170
     so that is a good first guess.  */
20171
0
  if (isection != NULL
20172
0
      && osection->bfd_section != NULL
20173
0
      && isection->bfd_section != NULL
20174
0
      && isection->bfd_section->output_section != NULL
20175
0
      && isection->bfd_section->output_section == osection->bfd_section
20176
0
      && iheaders != NULL
20177
0
      && isection->sh_link > 0
20178
0
      && isection->sh_link < elf_numsections (ibfd)
20179
0
      && iheaders[isection->sh_link]->bfd_section != NULL
20180
0
      && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20181
0
      )
20182
0
    {
20183
0
      for (i = elf_numsections (obfd); i-- > 0;)
20184
0
        if (oheaders[i]->bfd_section
20185
0
      == iheaders[isection->sh_link]->bfd_section->output_section)
20186
0
    break;
20187
0
    }
20188
20189
0
  if (i == 0)
20190
0
    {
20191
      /* Failing that we have to find a matching section ourselves.  If
20192
         we had the output section name available we could compare that
20193
         with input section names.  Unfortunately we don't.  So instead
20194
         we use a simple heuristic and look for the nearest executable
20195
         section before this one.  */
20196
0
      for (i = elf_numsections (obfd); i-- > 0;)
20197
0
        if (oheaders[i] == osection)
20198
0
    break;
20199
0
      if (i == 0)
20200
0
        break;
20201
20202
0
      while (i-- > 0)
20203
0
        if (oheaders[i]->sh_type == SHT_PROGBITS
20204
0
      && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20205
0
      == (SHF_ALLOC | SHF_EXECINSTR))
20206
0
    break;
20207
0
    }
20208
20209
0
  if (i)
20210
0
    {
20211
0
      osection->sh_link = i;
20212
      /* If the text section was part of a group
20213
         then the index section should be too.  */
20214
0
      if (oheaders[i]->sh_flags & SHF_GROUP)
20215
0
        osection->sh_flags |= SHF_GROUP;
20216
0
      return true;
20217
0
    }
20218
0
      }
20219
0
      break;
20220
20221
0
    case SHT_ARM_PREEMPTMAP:
20222
0
      osection->sh_flags = SHF_ALLOC;
20223
0
      break;
20224
20225
0
    case SHT_ARM_ATTRIBUTES:
20226
0
    case SHT_ARM_DEBUGOVERLAY:
20227
0
    case SHT_ARM_OVERLAYSECTION:
20228
0
    default:
20229
0
      break;
20230
0
    }
20231
20232
0
  return false;
20233
0
}
20234
20235
/* Returns TRUE if NAME is an ARM mapping symbol.
20236
   Traditionally the symbols $a, $d and $t have been used.
20237
   The ARM ELF standard also defines $x (for A64 code).  It also allows a
20238
   period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20239
   Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20240
   not support them here.  $t.x indicates the start of ThumbEE instructions.  */
20241
20242
static bool
20243
is_arm_mapping_symbol (const char * name)
20244
684
{
20245
  return name != NULL /* Paranoia.  */
20246
684
    && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20247
       the mapping symbols could have acquired a prefix.
20248
       We do not support this here, since such symbols no
20249
       longer conform to the ARM ELF ABI.  */
20250
684
    && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20251
684
    && (name[2] == 0 || name[2] == '.');
20252
  /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20253
     any characters that follow the period are legal characters for the body
20254
     of a symbol's name.  For now we just assume that this is the case.  */
20255
684
}
20256
20257
/* Make sure that mapping symbols in object files are not removed via the
20258
   "strip --strip-unneeded" tool.  These symbols are needed in order to
20259
   correctly generate interworking veneers, and for byte swapping code
20260
   regions.  Once an object file has been linked, it is safe to remove the
20261
   symbols as they will no longer be needed.  */
20262
20263
static void
20264
elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20265
6.79k
{
20266
6.79k
  if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20267
6.79k
      && sym->section != bfd_abs_section_ptr
20268
6.79k
      && is_arm_mapping_symbol (sym->name))
20269
0
    sym->flags |= BSF_KEEP;
20270
6.79k
}
20271
20272
#undef  elf_backend_copy_special_section_fields
20273
#define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20274
20275
#define ELF_ARCH      bfd_arch_arm
20276
#define ELF_TARGET_ID     ARM_ELF_DATA
20277
#define ELF_MACHINE_CODE    EM_ARM
20278
#define ELF_MAXPAGESIZE     0x1000
20279
#define ELF_COMMONPAGESIZE    0x1000
20280
20281
#define bfd_elf32_mkobject      elf32_arm_mkobject
20282
20283
#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20284
#define bfd_elf32_bfd_merge_private_bfd_data  elf32_arm_merge_private_bfd_data
20285
#define bfd_elf32_bfd_set_private_flags   elf32_arm_set_private_flags
20286
#define bfd_elf32_bfd_print_private_bfd_data  elf32_arm_print_private_bfd_data
20287
#define bfd_elf32_bfd_link_hash_table_create  elf32_arm_link_hash_table_create
20288
#define bfd_elf32_bfd_reloc_type_lookup   elf32_arm_reloc_type_lookup
20289
#define bfd_elf32_bfd_reloc_name_lookup   elf32_arm_reloc_name_lookup
20290
#define bfd_elf32_find_inliner_info   elf32_arm_find_inliner_info
20291
#define bfd_elf32_new_section_hook    elf32_arm_new_section_hook
20292
#define bfd_elf32_bfd_is_target_special_symbol  elf32_arm_is_target_special_symbol
20293
#define bfd_elf32_bfd_final_link    elf32_arm_final_link
20294
#define bfd_elf32_get_synthetic_symtab  elf32_arm_get_synthetic_symtab
20295
20296
#define elf_backend_get_symbol_type   elf32_arm_get_symbol_type
20297
#define elf_backend_maybe_function_sym    elf32_arm_maybe_function_sym
20298
#define elf_backend_gc_mark_hook    elf32_arm_gc_mark_hook
20299
#define elf_backend_gc_mark_extra_sections  elf32_arm_gc_mark_extra_sections
20300
#define elf_backend_check_relocs    elf32_arm_check_relocs
20301
#define elf_backend_update_relocs   elf32_arm_update_relocs
20302
#define elf_backend_relocate_section    elf32_arm_relocate_section
20303
#define elf_backend_write_section   elf32_arm_write_section
20304
#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20305
#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20306
#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20307
#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20308
#define elf_backend_late_size_sections    elf32_arm_late_size_sections
20309
#define elf_backend_early_size_sections   elf32_arm_early_size_sections
20310
#define elf_backend_init_index_section    _bfd_elf_init_2_index_sections
20311
#define elf_backend_init_file_header    elf32_arm_init_file_header
20312
#define elf_backend_reloc_type_class    elf32_arm_reloc_type_class
20313
#define elf_backend_object_p      elf32_arm_object_p
20314
#define elf_backend_fake_sections   elf32_arm_fake_sections
20315
#define elf_backend_section_from_shdr   elf32_arm_section_from_shdr
20316
#define elf_backend_final_write_processing  elf32_arm_final_write_processing
20317
#define elf_backend_copy_indirect_symbol  elf32_arm_copy_indirect_symbol
20318
#define elf_backend_size_info     elf32_arm_size_info
20319
#define elf_backend_modify_segment_map    elf32_arm_modify_segment_map
20320
#define elf_backend_additional_program_headers  elf32_arm_additional_program_headers
20321
#define elf_backend_output_arch_local_syms  elf32_arm_output_arch_local_syms
20322
#define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20323
#define elf_backend_begin_write_processing  elf32_arm_begin_write_processing
20324
#define elf_backend_add_symbol_hook   elf32_arm_add_symbol_hook
20325
#define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20326
#define elf_backend_symbol_processing   elf32_arm_backend_symbol_processing
20327
20328
#define elf_backend_can_refcount       1
20329
#define elf_backend_can_gc_sections    1
20330
#define elf_backend_plt_readonly       1
20331
#define elf_backend_want_got_plt       1
20332
#define elf_backend_want_plt_sym       0
20333
#define elf_backend_want_dynrelro      1
20334
#define elf_backend_may_use_rel_p      1
20335
#define elf_backend_may_use_rela_p     0
20336
#define elf_backend_default_use_rela_p 0
20337
#define elf_backend_dtrel_excludes_plt 1
20338
20339
#define elf_backend_got_header_size 12
20340
#define elf_backend_extern_protected_data 0
20341
20342
#undef  elf_backend_obj_attrs_vendor
20343
#define elf_backend_obj_attrs_vendor    "aeabi"
20344
#undef  elf_backend_obj_attrs_section
20345
#define elf_backend_obj_attrs_section   ".ARM.attributes"
20346
#undef  elf_backend_obj_attrs_arg_type
20347
#define elf_backend_obj_attrs_arg_type    elf32_arm_obj_attrs_arg_type
20348
#undef  elf_backend_obj_attrs_section_type
20349
#define elf_backend_obj_attrs_section_type  SHT_ARM_ATTRIBUTES
20350
#define elf_backend_obj_attrs_order   elf32_arm_obj_attrs_order
20351
#define elf_backend_obj_attrs_handle_unknown  elf32_arm_obj_attrs_handle_unknown
20352
20353
#undef  elf_backend_section_flags
20354
#define elf_backend_section_flags   elf32_arm_section_flags
20355
#undef  elf_backend_lookup_section_flags_hook
20356
#define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20357
20358
#define elf_backend_linux_prpsinfo32_ugid16 true
20359
20360
#include "elf32-target.h"
20361
20362
/* Native Client targets.  */
20363
20364
#undef  TARGET_LITTLE_SYM
20365
#define TARGET_LITTLE_SYM   arm_elf32_nacl_le_vec
20366
#undef  TARGET_LITTLE_NAME
20367
#define TARGET_LITTLE_NAME    "elf32-littlearm-nacl"
20368
#undef  TARGET_BIG_SYM
20369
#define TARGET_BIG_SYM      arm_elf32_nacl_be_vec
20370
#undef  TARGET_BIG_NAME
20371
#define TARGET_BIG_NAME     "elf32-bigarm-nacl"
20372
20373
/* Like elf32_arm_link_hash_table_create -- but overrides
20374
   appropriately for NaCl.  */
20375
20376
static struct bfd_link_hash_table *
20377
elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20378
0
{
20379
0
  struct bfd_link_hash_table *ret;
20380
20381
0
  ret = elf32_arm_link_hash_table_create (abfd);
20382
0
  if (ret)
20383
0
    {
20384
0
      struct elf32_arm_link_hash_table *htab
20385
0
  = (struct elf32_arm_link_hash_table *) ret;
20386
20387
0
      htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20388
0
      htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20389
0
    }
20390
0
  return ret;
20391
0
}
20392
20393
/* Since NaCl doesn't use the ARM-specific unwind format, we don't
20394
   really need to use elf32_arm_modify_segment_map.  But we do it
20395
   anyway just to reduce gratuitous differences with the stock ARM backend.  */
20396
20397
static bool
20398
elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20399
0
{
20400
0
  return (elf32_arm_modify_segment_map (abfd, info)
20401
0
    && nacl_modify_segment_map (abfd, info));
20402
0
}
20403
20404
static bool
20405
elf32_arm_nacl_final_write_processing (bfd *abfd)
20406
0
{
20407
0
  arm_final_write_processing (abfd);
20408
0
  return nacl_final_write_processing (abfd);
20409
0
}
20410
20411
static bfd_vma
20412
elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20413
          const arelent *rel ATTRIBUTE_UNUSED)
20414
0
{
20415
0
  return plt->vma
20416
0
    + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20417
0
     i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20418
0
}
20419
20420
#undef  elf32_bed
20421
#define elf32_bed       elf32_arm_nacl_bed
20422
#undef  bfd_elf32_bfd_link_hash_table_create
20423
#define bfd_elf32_bfd_link_hash_table_create  \
20424
  elf32_arm_nacl_link_hash_table_create
20425
#undef  elf_backend_plt_alignment
20426
#define elf_backend_plt_alignment   4
20427
#undef  elf_backend_modify_segment_map
20428
#define elf_backend_modify_segment_map    elf32_arm_nacl_modify_segment_map
20429
#undef  elf_backend_modify_headers
20430
#define elf_backend_modify_headers    nacl_modify_headers
20431
#undef  elf_backend_final_write_processing
20432
#define elf_backend_final_write_processing  elf32_arm_nacl_final_write_processing
20433
#undef bfd_elf32_get_synthetic_symtab
20434
#undef  elf_backend_plt_sym_val
20435
#define elf_backend_plt_sym_val     elf32_arm_nacl_plt_sym_val
20436
#undef  elf_backend_copy_special_section_fields
20437
20438
#undef  ELF_MINPAGESIZE
20439
#undef  ELF_COMMONPAGESIZE
20440
20441
#undef ELF_TARGET_OS
20442
#define ELF_TARGET_OS       is_nacl
20443
20444
#include "elf32-target.h"
20445
20446
/* Reset to defaults.  */
20447
#undef  elf_backend_plt_alignment
20448
#undef  elf_backend_modify_segment_map
20449
#define elf_backend_modify_segment_map    elf32_arm_modify_segment_map
20450
#undef  elf_backend_modify_headers
20451
#undef  elf_backend_final_write_processing
20452
#define elf_backend_final_write_processing  elf32_arm_final_write_processing
20453
#undef  ELF_MINPAGESIZE
20454
#undef  ELF_COMMONPAGESIZE
20455
#define ELF_COMMONPAGESIZE    0x1000
20456
20457
20458
/* FDPIC Targets.  */
20459
20460
#undef  TARGET_LITTLE_SYM
20461
#define TARGET_LITTLE_SYM   arm_elf32_fdpic_le_vec
20462
#undef  TARGET_LITTLE_NAME
20463
#define TARGET_LITTLE_NAME    "elf32-littlearm-fdpic"
20464
#undef  TARGET_BIG_SYM
20465
#define TARGET_BIG_SYM      arm_elf32_fdpic_be_vec
20466
#undef  TARGET_BIG_NAME
20467
#define TARGET_BIG_NAME     "elf32-bigarm-fdpic"
20468
#undef elf_match_priority
20469
#define elf_match_priority    128
20470
#undef ELF_OSABI
20471
#define ELF_OSABI   ELFOSABI_ARM_FDPIC
20472
20473
/* Like elf32_arm_link_hash_table_create -- but overrides
20474
   appropriately for FDPIC.  */
20475
20476
static struct bfd_link_hash_table *
20477
elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20478
0
{
20479
0
  struct bfd_link_hash_table *ret;
20480
20481
0
  ret = elf32_arm_link_hash_table_create (abfd);
20482
0
  if (ret)
20483
0
    {
20484
0
      struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20485
20486
0
      htab->fdpic_p = 1;
20487
0
    }
20488
0
  return ret;
20489
0
}
20490
20491
/* We need dynamic symbols for every section, since segments can
20492
   relocate independently.  */
20493
static bool
20494
elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20495
            struct bfd_link_info *info
20496
            ATTRIBUTE_UNUSED,
20497
            asection *p ATTRIBUTE_UNUSED)
20498
0
{
20499
0
  switch (elf_section_data (p)->this_hdr.sh_type)
20500
0
    {
20501
0
    case SHT_PROGBITS:
20502
0
    case SHT_NOBITS:
20503
      /* If sh_type is yet undecided, assume it could be
20504
   SHT_PROGBITS/SHT_NOBITS.  */
20505
0
    case SHT_NULL:
20506
0
      return false;
20507
20508
      /* There shouldn't be section relative relocations
20509
   against any other section.  */
20510
0
    default:
20511
0
      return true;
20512
0
    }
20513
0
}
20514
20515
#undef  elf32_bed
20516
#define elf32_bed       elf32_arm_fdpic_bed
20517
20518
#undef  bfd_elf32_bfd_link_hash_table_create
20519
#define bfd_elf32_bfd_link_hash_table_create  elf32_arm_fdpic_link_hash_table_create
20520
20521
#undef elf_backend_omit_section_dynsym
20522
#define elf_backend_omit_section_dynsym   elf32_arm_fdpic_omit_section_dynsym
20523
20524
#undef ELF_TARGET_OS
20525
20526
#include "elf32-target.h"
20527
20528
#undef elf_match_priority
20529
#undef ELF_OSABI
20530
#undef elf_backend_omit_section_dynsym
20531
20532
/* VxWorks Targets.  */
20533
20534
#undef  TARGET_LITTLE_SYM
20535
#define TARGET_LITTLE_SYM   arm_elf32_vxworks_le_vec
20536
#undef  TARGET_LITTLE_NAME
20537
#define TARGET_LITTLE_NAME    "elf32-littlearm-vxworks"
20538
#undef  TARGET_BIG_SYM
20539
#define TARGET_BIG_SYM      arm_elf32_vxworks_be_vec
20540
#undef  TARGET_BIG_NAME
20541
#define TARGET_BIG_NAME     "elf32-bigarm-vxworks"
20542
20543
/* Like elf32_arm_link_hash_table_create -- but overrides
20544
   appropriately for VxWorks.  */
20545
20546
static struct bfd_link_hash_table *
20547
elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20548
0
{
20549
0
  struct bfd_link_hash_table *ret;
20550
20551
0
  ret = elf32_arm_link_hash_table_create (abfd);
20552
0
  if (ret)
20553
0
    {
20554
0
      struct elf32_arm_link_hash_table *htab
20555
0
  = (struct elf32_arm_link_hash_table *) ret;
20556
0
      htab->use_rel = 0;
20557
0
    }
20558
0
  return ret;
20559
0
}
20560
20561
static bool
20562
elf32_arm_vxworks_final_write_processing (bfd *abfd)
20563
0
{
20564
0
  arm_final_write_processing (abfd);
20565
0
  return elf_vxworks_final_write_processing (abfd);
20566
0
}
20567
20568
#undef  elf32_bed
20569
#define elf32_bed elf32_arm_vxworks_bed
20570
20571
#undef  bfd_elf32_bfd_link_hash_table_create
20572
#define bfd_elf32_bfd_link_hash_table_create  elf32_arm_vxworks_link_hash_table_create
20573
#undef  elf_backend_final_write_processing
20574
#define elf_backend_final_write_processing  elf32_arm_vxworks_final_write_processing
20575
#undef  elf_backend_emit_relocs
20576
#define elf_backend_emit_relocs     elf_vxworks_emit_relocs
20577
20578
#undef  elf_backend_may_use_rel_p
20579
#define elf_backend_may_use_rel_p 0
20580
#undef  elf_backend_may_use_rela_p
20581
#define elf_backend_may_use_rela_p  1
20582
#undef  elf_backend_default_use_rela_p
20583
#define elf_backend_default_use_rela_p  1
20584
#undef  elf_backend_want_plt_sym
20585
#define elf_backend_want_plt_sym  1
20586
#undef  ELF_MAXPAGESIZE
20587
#define ELF_MAXPAGESIZE     0x1000
20588
#undef ELF_TARGET_OS
20589
#define ELF_TARGET_OS     is_vxworks
20590
20591
#include "elf32-target.h"
20592
20593
20594
/* Merge backend specific data from an object file to the output
20595
   object file when linking.  */
20596
20597
static bool
20598
elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20599
0
{
20600
0
  bfd *obfd = info->output_bfd;
20601
0
  flagword out_flags;
20602
0
  flagword in_flags;
20603
0
  bool flags_compatible = true;
20604
0
  asection *sec;
20605
20606
  /* Check if we have the same endianness.  */
20607
0
  if (! _bfd_generic_verify_endian_match (ibfd, info))
20608
0
    return false;
20609
20610
0
  if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20611
0
    return true;
20612
20613
0
  if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20614
0
    return false;
20615
20616
  /* The input BFD must have had its flags initialised.  */
20617
  /* The following seems bogus to me -- The flags are initialized in
20618
     the assembler but I don't think an elf_flags_init field is
20619
     written into the object.  */
20620
  /* BFD_ASSERT (elf_flags_init (ibfd)); */
20621
20622
0
  in_flags  = elf_elfheader (ibfd)->e_flags;
20623
0
  out_flags = elf_elfheader (obfd)->e_flags;
20624
20625
  /* In theory there is no reason why we couldn't handle this.  However
20626
     in practice it isn't even close to working and there is no real
20627
     reason to want it.  */
20628
0
  if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20629
0
      && !(ibfd->flags & DYNAMIC)
20630
0
      && (in_flags & EF_ARM_BE8))
20631
0
    {
20632
0
      _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20633
0
        ibfd);
20634
0
      return false;
20635
0
    }
20636
20637
0
  if (!elf_flags_init (obfd))
20638
0
    {
20639
      /* If the input has no flags set, then do not set the output flags.
20640
   This will allow future bfds to determine the desired output flags.
20641
   If no input bfds have any flags set, then neither will the output bfd.
20642
20643
   Note - we used to restrict this test to when the input architecture
20644
   variant was the default variant, but this does not allow for
20645
   linker scripts which override the default.  See PR 28910 for an
20646
   example.  */
20647
0
      if (in_flags == 0)
20648
0
  return true;
20649
      
20650
0
      elf_flags_init (obfd) = true;
20651
0
      elf_elfheader (obfd)->e_flags = in_flags;
20652
20653
0
      if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20654
0
    && bfd_get_arch_info (obfd)->the_default)
20655
0
  return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20656
20657
0
      return true;
20658
0
    }
20659
20660
  /* Determine what should happen if the input ARM architecture
20661
     does not match the output ARM architecture.  */
20662
0
  if (! bfd_arm_merge_machines (ibfd, obfd))
20663
0
    return false;
20664
20665
  /* Identical flags must be compatible.  */
20666
0
  if (in_flags == out_flags)
20667
0
    return true;
20668
20669
  /* Check to see if the input BFD actually contains any sections.  If
20670
     not, its flags may not have been initialised either, but it
20671
     cannot actually cause any incompatiblity.  Do not short-circuit
20672
     dynamic objects; their section list may be emptied by
20673
    elf_link_add_object_symbols.
20674
20675
    Also check to see if there are no code sections in the input.
20676
    In this case there is no need to check for code specific flags.
20677
    XXX - do we need to worry about floating-point format compatability
20678
    in data sections ?  */
20679
0
  if (!(ibfd->flags & DYNAMIC))
20680
0
    {
20681
0
      bool null_input_bfd = true;
20682
0
      bool only_data_sections = true;
20683
20684
0
      for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20685
0
  {
20686
    /* Ignore synthetic glue sections.  */
20687
0
    if (strcmp (sec->name, ".glue_7")
20688
0
        && strcmp (sec->name, ".glue_7t"))
20689
0
      {
20690
0
        if ((bfd_section_flags (sec)
20691
0
       & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20692
0
      == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20693
0
    only_data_sections = false;
20694
20695
0
        null_input_bfd = false;
20696
0
        break;
20697
0
      }
20698
0
  }
20699
20700
0
      if (null_input_bfd || only_data_sections)
20701
0
  return true;
20702
0
    }
20703
20704
  /* Complain about various flag mismatches.  */
20705
0
  if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20706
0
              EF_ARM_EABI_VERSION (out_flags)))
20707
0
    {
20708
0
      _bfd_error_handler
20709
0
  (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20710
0
   ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20711
0
   obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20712
0
      return false;
20713
0
    }
20714
20715
  /* Not sure what needs to be checked for EABI versions >= 1.  */
20716
  /* VxWorks libraries do not use these flags.  */
20717
0
  if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20718
0
      && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20719
0
      && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20720
0
    {
20721
0
      if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20722
0
  {
20723
0
    _bfd_error_handler
20724
0
      (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20725
0
       ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20726
0
       obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20727
0
    flags_compatible = false;
20728
0
  }
20729
20730
0
      if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20731
0
  {
20732
0
    if (in_flags & EF_ARM_APCS_FLOAT)
20733
0
      _bfd_error_handler
20734
0
        (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20735
0
         ibfd, obfd);
20736
0
    else
20737
0
      _bfd_error_handler
20738
0
        (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20739
0
         ibfd, obfd);
20740
20741
0
    flags_compatible = false;
20742
0
  }
20743
20744
0
      if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20745
0
  {
20746
0
    if (in_flags & EF_ARM_VFP_FLOAT)
20747
0
      _bfd_error_handler
20748
0
        (_("error: %pB uses %s instructions, whereas %pB does not"),
20749
0
         ibfd, "VFP", obfd);
20750
0
    else
20751
0
      _bfd_error_handler
20752
0
        (_("error: %pB uses %s instructions, whereas %pB does not"),
20753
0
         ibfd, "FPA", obfd);
20754
20755
0
    flags_compatible = false;
20756
0
  }
20757
20758
0
#ifdef EF_ARM_SOFT_FLOAT
20759
0
      if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20760
0
  {
20761
    /* We can allow interworking between code that is VFP format
20762
       layout, and uses either soft float or integer regs for
20763
       passing floating point arguments and results.  We already
20764
       know that the APCS_FLOAT flags match; similarly for VFP
20765
       flags.  */
20766
0
    if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20767
0
        || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20768
0
      {
20769
0
        if (in_flags & EF_ARM_SOFT_FLOAT)
20770
0
    _bfd_error_handler
20771
0
      (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20772
0
       ibfd, obfd);
20773
0
        else
20774
0
    _bfd_error_handler
20775
0
      (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20776
0
       ibfd, obfd);
20777
20778
0
        flags_compatible = false;
20779
0
      }
20780
0
  }
20781
0
#endif
20782
20783
      /* Interworking mismatch is only a warning.  */
20784
0
      if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20785
0
  {
20786
0
    if (in_flags & EF_ARM_INTERWORK)
20787
0
      {
20788
0
        _bfd_error_handler
20789
0
    (_("warning: %pB supports interworking, whereas %pB does not"),
20790
0
     ibfd, obfd);
20791
0
      }
20792
0
    else
20793
0
      {
20794
0
        _bfd_error_handler
20795
0
    (_("warning: %pB does not support interworking, whereas %pB does"),
20796
0
     ibfd, obfd);
20797
0
      }
20798
0
  }
20799
0
    }
20800
20801
0
  return flags_compatible;
20802
0
}