Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/avr-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* Disassemble AVR instructions.
2
   Copyright (C) 1999-2024 Free Software Foundation, Inc.
3
4
   Contributed by Denis Chertykov <denisc@overta.ru>
5
6
   This file is part of libopcodes.
7
8
   This library is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3, or (at your option)
11
   any later version.
12
13
   It is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
18
   You should have received a copy of the GNU General Public License
19
   along with this program; if not, write to the Free Software
20
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21
   MA 02110-1301, USA.  */
22
23
#include "sysdep.h"
24
#include <assert.h>
25
#include "disassemble.h"
26
#include "opintl.h"
27
#include "libiberty.h"
28
#include <stdint.h>
29
30
struct avr_opcodes_s
31
{
32
  char *name;
33
  char *constraints;
34
  char *opcode;
35
  int insn_size;    /* In words.  */
36
  int isa;
37
  unsigned int bin_opcode;
38
};
39
40
#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41
{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
43
const struct avr_opcodes_s avr_opcodes[] =
44
{
45
  #include "opcode/avr.h"
46
  {NULL, NULL, NULL, 0, 0, 0}
47
};
48
49
static const char * comment_start = "0x";
50
51
static int
52
avr_operand (unsigned int        insn,
53
       unsigned int        insn2,
54
       unsigned int        pc,
55
       int                 constraint,
56
             char *              opcode_str,
57
       char *              buf,
58
       char *              comment,
59
       enum disassembler_style *  style,
60
       int                 regs,
61
       int *               sym,
62
       bfd_vma *           sym_addr,
63
       disassemble_info *  info)
64
138k
{
65
138k
  int ok = 1;
66
138k
  *sym = 0;
67
68
138k
  switch (constraint)
69
138k
    {
70
      /* Any register operand.  */
71
46.8k
    case 'r':
72
46.8k
      if (regs)
73
14.5k
  insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register.  */
74
32.2k
      else
75
32.2k
  insn = (insn & 0x01f0) >> 4; /* Destination register.  */
76
77
46.8k
      sprintf (buf, "r%d", insn);
78
46.8k
      *style = dis_style_register;
79
46.8k
      break;
80
81
29.4k
    case 'd':
82
29.4k
      if (regs)
83
494
  sprintf (buf, "r%d", 16 + (insn & 0xf));
84
28.9k
      else
85
28.9k
  sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
86
29.4k
      *style = dis_style_register;
87
29.4k
      break;
88
89
422
    case 'w':
90
422
      sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
91
422
      *style = dis_style_register;
92
422
      break;
93
94
932
    case 'a':
95
932
      if (regs)
96
466
  sprintf (buf, "r%d", 16 + (insn & 7));
97
466
      else
98
466
  sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
99
932
      *style = dis_style_register;
100
932
      break;
101
102
2.30k
    case 'v':
103
2.30k
      if (regs)
104
1.15k
  sprintf (buf, "r%d", (insn & 0xf) * 2);
105
1.15k
      else
106
1.15k
  sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
107
2.30k
      *style = dis_style_register;
108
2.30k
      break;
109
110
2.30k
    case 'e':
111
2.30k
      {
112
2.30k
  char *xyz;
113
114
2.30k
  switch (insn & 0x100f)
115
2.30k
    {
116
557
      case 0x0000: xyz = "Z";  break;
117
265
      case 0x1001: xyz = "Z+"; break;
118
790
      case 0x1002: xyz = "-Z"; break;
119
55
      case 0x0008: xyz = "Y";  break;
120
18
      case 0x1009: xyz = "Y+"; break;
121
59
      case 0x100a: xyz = "-Y"; break;
122
9
      case 0x100c: xyz = "X";  break;
123
65
      case 0x100d: xyz = "X+"; break;
124
239
      case 0x100e: xyz = "-X"; break;
125
250
      default: xyz = "??"; ok = 0;
126
2.30k
    }
127
2.30k
  strcpy (buf, xyz);
128
129
2.30k
  if (AVR_UNDEF_P (insn))
130
102
    sprintf (comment, _("undefined"));
131
2.30k
      }
132
0
      *style = dis_style_register;
133
2.30k
      break;
134
135
315
    case 'z':
136
315
      *buf++ = 'Z';
137
138
      /* Check for post-increment. */
139
315
      char *s;
140
5.13k
      for (s = opcode_str; *s; ++s)
141
5.01k
        {
142
5.01k
          if (*s == '+')
143
195
            {
144
195
        if (insn & (1 << (15 - (s - opcode_str))))
145
87
    *buf++ = '+';
146
195
              break;
147
195
            }
148
5.01k
        }
149
150
315
      *buf = '\0';
151
315
      if (AVR_UNDEF_P (insn))
152
2
  sprintf (comment, _("undefined"));
153
315
      *style = dis_style_register;
154
315
      break;
155
156
6.69k
    case 'b':
157
6.69k
      {
158
6.69k
  unsigned int x;
159
160
6.69k
  x = (insn & 7);
161
6.69k
  x |= (insn >> 7) & (3 << 3);
162
6.69k
  x |= (insn >> 8) & (1 << 5);
163
164
6.69k
  if (insn & 0x8)
165
2.83k
    *buf++ = 'Y';
166
3.85k
  else
167
3.85k
    *buf++ = 'Z';
168
6.69k
  sprintf (buf, "+%d", x);
169
6.69k
  sprintf (comment, "0x%02x", x);
170
6.69k
  *style = dis_style_register;
171
6.69k
      }
172
6.69k
      break;
173
174
112
    case 'h':
175
112
      *sym = 1;
176
112
      *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
177
      /* See PR binutils/2454.  Ideally we would like to display the hex
178
   value of the address only once, but this would mean recoding
179
   objdump_print_address() which would affect many targets.  */
180
112
      sprintf (buf, "%#lx", (unsigned long) *sym_addr);
181
112
      strcpy (comment, comment_start);
182
112
      info->insn_info_valid = 1;
183
112
      info->insn_type = dis_jsr;
184
112
      info->target = *sym_addr;
185
112
      *style = dis_style_address;
186
112
      break;
187
188
7.29k
    case 'L':
189
7.29k
      {
190
7.29k
  int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
191
7.29k
  sprintf (buf, ".%+-8d", rel_addr);
192
7.29k
        *sym = 1;
193
7.29k
        *sym_addr = pc + 2 + rel_addr;
194
7.29k
  strcpy (comment, comment_start);
195
7.29k
        info->insn_info_valid = 1;
196
7.29k
        info->insn_type = dis_branch;
197
7.29k
        info->target = *sym_addr;
198
7.29k
  *style = dis_style_address_offset;
199
7.29k
      }
200
7.29k
      break;
201
202
1.94k
    case 'l':
203
1.94k
      {
204
1.94k
  int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
205
206
1.94k
  sprintf (buf, ".%+-8d", rel_addr);
207
1.94k
        *sym = 1;
208
1.94k
        *sym_addr = pc + 2 + rel_addr;
209
1.94k
  strcpy (comment, comment_start);
210
1.94k
        info->insn_info_valid = 1;
211
1.94k
        info->insn_type = dis_condbranch;
212
1.94k
        info->target = *sym_addr;
213
1.94k
  *style = dis_style_address_offset;
214
1.94k
      }
215
1.94k
      break;
216
217
441
    case 'i':
218
441
      {
219
441
        unsigned int val = insn2 | 0x800000;
220
441
        *sym = 1;
221
441
        *sym_addr = val;
222
441
        sprintf (buf, "0x%04X", insn2);
223
441
        strcpy (comment, comment_start);
224
441
  *style = dis_style_immediate;
225
441
      }
226
441
      break;
227
228
716
    case 'j':
229
716
      {
230
716
        unsigned int val = ((insn & 0xf) | ((insn & 0x600) >> 5)
231
716
                                         | ((insn & 0x100) >> 2));
232
716
  if ((insn & 0x100) == 0)
233
250
    val |= 0x80;
234
716
        *sym = 1;
235
716
        *sym_addr = val | 0x800000;
236
716
        sprintf (buf, "0x%02x", val);
237
716
        strcpy (comment, comment_start);
238
716
  *style = dis_style_immediate;
239
716
      }
240
716
      break;
241
242
27.7k
    case 'M':
243
27.7k
      sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
244
27.7k
      sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
245
27.7k
      *style = dis_style_immediate;
246
27.7k
      break;
247
248
0
    case 'n':
249
0
      sprintf (buf, "??");
250
      /* xgettext:c-format */
251
0
      opcodes_error_handler (_("internal disassembler error"));
252
0
      ok = 0;
253
0
      *style = dis_style_immediate;
254
0
      break;
255
256
422
    case 'K':
257
422
      {
258
422
  unsigned int x;
259
260
422
  x = (insn & 0xf) | ((insn >> 2) & 0x30);
261
422
  sprintf (buf, "0x%02x", x);
262
422
  sprintf (comment, "%d", x);
263
422
  *style = dis_style_immediate;
264
422
      }
265
422
      break;
266
267
4.14k
    case 's':
268
4.14k
      sprintf (buf, "%d", insn & 7);
269
4.14k
      *style = dis_style_immediate;
270
4.14k
      break;
271
272
0
    case 'S':
273
0
      sprintf (buf, "%d", (insn >> 4) & 7);
274
0
      *style = dis_style_immediate;
275
0
      break;
276
277
4.81k
    case 'P':
278
4.81k
      {
279
4.81k
  unsigned int x;
280
281
4.81k
  x = (insn & 0xf);
282
4.81k
  x |= (insn >> 5) & 0x30;
283
4.81k
  sprintf (buf, "0x%02x", x);
284
4.81k
  sprintf (comment, "%d", x);
285
4.81k
  *style = dis_style_address;
286
4.81k
      }
287
4.81k
      break;
288
289
1.15k
    case 'p':
290
1.15k
      {
291
1.15k
  unsigned int x;
292
293
1.15k
  x = (insn >> 3) & 0x1f;
294
1.15k
  sprintf (buf, "0x%02x", x);
295
1.15k
  sprintf (comment, "%d", x);
296
1.15k
  *style = dis_style_address;
297
1.15k
      }
298
1.15k
      break;
299
300
72
    case 'E':
301
72
      sprintf (buf, "%d", (insn >> 4) & 15);
302
72
      *style = dis_style_immediate;
303
72
      break;
304
305
0
    case '?':
306
0
      *buf = '\0';
307
0
      break;
308
309
0
    default:
310
0
      sprintf (buf, "??");
311
      /* xgettext:c-format */
312
0
      opcodes_error_handler (_("unknown constraint `%c'"), constraint);
313
0
      ok = 0;
314
138k
    }
315
316
138k
    return ok;
317
138k
}
318
319
/* Read the opcode from ADDR.  Return 0 in success and save opcode
320
   in *INSN, otherwise, return -1.  */
321
322
static int
323
avrdis_opcode (bfd_vma addr, disassemble_info *info, uint16_t *insn)
324
104k
{
325
104k
  bfd_byte buffer[2];
326
104k
  int status;
327
328
104k
  status = info->read_memory_func (addr, buffer, 2, info);
329
330
104k
  if (status == 0)
331
104k
    {
332
104k
      *insn = bfd_getl16 (buffer);
333
104k
      return 0;
334
104k
    }
335
336
54
  info->memory_error_func (status, addr, info);
337
54
  return -1;
338
104k
}
339
340
341
int
342
print_insn_avr (bfd_vma addr, disassemble_info *info)
343
103k
{
344
103k
  uint16_t insn, insn2;
345
103k
  const struct avr_opcodes_s *opcode;
346
103k
  static unsigned int *maskptr;
347
103k
  void *stream = info->stream;
348
103k
  fprintf_styled_ftype prin = info->fprintf_styled_func;
349
103k
  static unsigned int *avr_bin_masks;
350
103k
  static int initialized;
351
103k
  int cmd_len = 2;
352
103k
  int ok = 0;
353
103k
  char op1[20], op2[20], comment1[40], comment2[40];
354
103k
  enum disassembler_style style_op1, style_op2;
355
103k
  int sym_op1 = 0, sym_op2 = 0;
356
103k
  bfd_vma sym_addr1, sym_addr2;
357
358
  /* Clear instruction information field.  */
359
103k
  info->insn_info_valid = 0;
360
103k
  info->branch_delay_insns = 0;
361
103k
  info->data_size = 0;
362
103k
  info->insn_type = dis_noninsn;
363
103k
  info->target = 0;
364
103k
  info->target2 = 0;
365
366
103k
  if (!initialized)
367
1
    {
368
1
      unsigned int nopcodes;
369
370
      /* PR 4045: Try to avoid duplicating the 0x prefix that
371
   objdump_print_addr() will put on addresses when there
372
   is no symbol table available.  */
373
1
      if (info->symtab_size == 0)
374
1
  comment_start = " ";
375
376
1
      nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
377
378
1
      avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
379
380
1
      for (opcode = avr_opcodes, maskptr = avr_bin_masks;
381
126
     opcode->name;
382
125
     opcode++, maskptr++)
383
125
  {
384
125
    char * s;
385
125
    unsigned int bin = 0;
386
125
    unsigned int mask = 0;
387
388
2.12k
    for (s = opcode->opcode; *s; ++s)
389
2.00k
      {
390
2.00k
        bin <<= 1;
391
2.00k
        mask <<= 1;
392
2.00k
        bin |= (*s == '1');
393
2.00k
        mask |= (*s == '1' || *s == '0');
394
2.00k
      }
395
125
    assert (s - opcode->opcode == 16);
396
125
    assert (opcode->bin_opcode == bin);
397
125
    *maskptr = mask;
398
125
  }
399
400
1
      initialized = 1;
401
1
    }
402
403
103k
  if (avrdis_opcode (addr, info, &insn)  != 0)
404
48
    return -1;
405
406
103k
  for (opcode = avr_opcodes, maskptr = avr_bin_masks;
407
7.66M
       opcode->name;
408
7.56M
       opcode++, maskptr++)
409
7.64M
    {
410
7.64M
      if ((opcode->isa == AVR_ISA_TINY) && (info->mach != bfd_mach_avrtiny))
411
50.1k
        continue;
412
7.59M
      if ((insn & *maskptr) == opcode->bin_opcode)
413
83.9k
        break;
414
7.59M
    }
415
416
  /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
417
     `std b+0,r' as `st b,r' (next entry in the table).  */
418
419
103k
  if (AVR_DISP0_P (insn))
420
612
    opcode++;
421
422
103k
  op1[0] = 0;
423
103k
  op2[0] = 0;
424
103k
  comment1[0] = 0;
425
103k
  comment2[0] = 0;
426
103k
  style_op1 = dis_style_text;
427
103k
  style_op2 = dis_style_text;
428
429
103k
  if (opcode->name)
430
83.9k
    {
431
83.9k
      char *constraints = opcode->constraints;
432
83.9k
      char *opcode_str = opcode->opcode;
433
434
83.9k
      insn2 = 0;
435
83.9k
      ok = 1;
436
437
83.9k
      if (opcode->insn_size > 1)
438
559
  {
439
559
    if (avrdis_opcode (addr + 2, info, &insn2) != 0)
440
6
      return -1;
441
553
    cmd_len = 4;
442
553
  }
443
444
83.9k
      if (*constraints && *constraints != '?')
445
74.0k
  {
446
74.0k
    int regs = REGISTER_P (*constraints);
447
448
74.0k
    ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1,
449
74.0k
          comment1, &style_op1, 0, &sym_op1, &sym_addr1,
450
74.0k
          info);
451
452
74.0k
    if (ok && *(++constraints) == ',')
453
64.1k
      ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str,
454
64.1k
            op2, *comment1 ? comment2 : comment1,
455
64.1k
            &style_op2, regs, &sym_op2, &sym_addr2,
456
64.1k
            info);
457
74.0k
  }
458
83.9k
    }
459
460
103k
  if (!ok)
461
19.9k
    {
462
      /* Unknown opcode, or invalid combination of operands.  */
463
19.9k
      sprintf (op1, "0x%04x", insn);
464
19.9k
      op2[0] = 0;
465
19.9k
      sprintf (comment1, "????");
466
19.9k
      comment2[0] = 0;
467
19.9k
    }
468
469
103k
  (*prin) (stream, ok ? dis_style_mnemonic : dis_style_assembler_directive,
470
103k
     "%s", ok ? opcode->name : ".word");
471
  
472
103k
  if (*op1)
473
93.7k
    (*prin) (stream, style_op1, "\t%s", op1);
474
475
103k
  if (*op2)
476
64.0k
    {
477
64.0k
      (*prin) (stream, dis_style_text, ", ");
478
64.0k
      (*prin) (stream, style_op2, "%s", op2);
479
64.0k
    }
480
481
103k
  if (*comment1)
482
71.3k
    (*prin) (stream, dis_style_comment_start, "\t; %s", comment1);
483
484
103k
  if (sym_op1)
485
9.65k
    info->print_address_func (sym_addr1, info);
486
487
103k
  if (*comment2)
488
0
    (*prin) (stream, dis_style_comment_start, " %s", comment2);
489
490
103k
  if (sym_op2)
491
860
    info->print_address_func (sym_addr2, info);
492
493
103k
  return cmd_len;
494
103k
}