Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/crx-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* Disassembler code for CRX.
2
   Copyright (C) 2004-2024 Free Software Foundation, Inc.
3
   Contributed by Tomer Levi, NSC, Israel.
4
   Written by Tomer Levi.
5
6
   This file is part of the GNU opcodes library.
7
8
   This library is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3, or (at your option)
11
   any later version.
12
13
   It is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
18
   You should have received a copy of the GNU General Public License
19
   along with this program; if not, write to the Free Software
20
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21
   MA 02110-1301, USA.  */
22
23
#include "sysdep.h"
24
#include "disassemble.h"
25
#include "opcode/crx.h"
26
27
/* String to print when opcode was not matched.  */
28
36.2k
#define ILLEGAL "illegal"
29
  /* Escape to 16-bit immediate.  */
30
212
#define ESCAPE_16_BIT  0xE
31
32
/* Extract 'n_bits' from 'a' starting from offset 'offs'.  */
33
#define EXTRACT(a, offs, n_bits)      \
34
231k
  (((a) >> (offs)) & ((2ull << (n_bits - 1)) - 1))
35
36
/* Set Bit Mask - a mask to set all bits starting from offset 'offs'.  */
37
39.0M
#define SBM(offs)  ((-1u << (offs)) & 0xffffffff)
38
39
typedef unsigned long dwordU;
40
typedef unsigned short wordU;
41
42
typedef struct
43
{
44
  dwordU val;
45
  int nbits;
46
} parameter;
47
48
/* Structure to hold valid 'cinv' instruction options.  */
49
50
typedef struct
51
  {
52
    /* Cinv printed string.  */
53
    char *str;
54
    /* Value corresponding to the string.  */
55
    unsigned int value;
56
  }
57
cinv_entry;
58
59
/* CRX 'cinv' options.  */
60
static const cinv_entry crx_cinvs[] =
61
{
62
  {"[i]", 2}, {"[i,u]", 3}, {"[d]", 4}, {"[d,u]", 5},
63
  {"[d,i]", 6}, {"[d,i,u]", 7}, {"[b]", 8},
64
  {"[b,i]", 10}, {"[b,i,u]", 11}, {"[b,d]", 12},
65
  {"[b,d,u]", 13}, {"[b,d,i]", 14}, {"[b,d,i,u]", 15}
66
};
67
68
/* Enum to distinguish different registers argument types.  */
69
typedef enum REG_ARG_TYPE
70
  {
71
    /* General purpose register (r<N>).  */
72
    REG_ARG = 0,
73
    /* User register (u<N>).  */
74
    USER_REG_ARG,
75
    /* CO-Processor register (c<N>).  */
76
    COP_ARG,
77
    /* CO-Processor special register (cs<N>).  */
78
    COPS_ARG
79
  }
80
REG_ARG_TYPE;
81
82
/* Number of valid 'cinv' instruction options.  */
83
static int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0]));
84
/* Current opcode table entry we're disassembling.  */
85
static const inst *instruction;
86
/* Current instruction we're disassembling.  */
87
static ins currInsn;
88
/* The current instruction is read into 3 consecutive words.  */
89
static wordU words[3];
90
/* Contains all words in appropriate order.  */
91
static ULONGLONG allWords;
92
/* Holds the current processed argument number.  */
93
static int processing_argument_number;
94
/* Nonzero means a CST4 instruction.  */
95
static int cst4flag;
96
/* Nonzero means the instruction's original size is
97
   incremented (escape sequence is used).  */
98
static int size_changed;
99
100
101
/* Retrieve the number of operands for the current assembled instruction.  */
102
103
static int
104
get_number_of_operands (void)
105
110k
{
106
110k
  int i;
107
108
312k
  for (i = 0; i < MAX_OPERANDS && instruction->operands[i].op_type; i++)
109
202k
    ;
110
111
110k
  return i;
112
110k
}
113
114
/* Return the bit size for a given operand.  */
115
116
static int
117
getbits (operand_type op)
118
202k
{
119
202k
  if (op < MAX_OPRD)
120
202k
    return crx_optab[op].bit_size;
121
0
  else
122
0
    return 0;
123
202k
}
124
125
/* Return the argument type of a given operand.  */
126
127
static argtype
128
getargtype (operand_type op)
129
202k
{
130
202k
  if (op < MAX_OPRD)
131
202k
    return crx_optab[op].arg_type;
132
0
  else
133
0
    return nullargs;
134
202k
}
135
136
/* Given the trap index in dispatch table, return its name.
137
   This routine is used when disassembling the 'excp' instruction.  */
138
139
static char *
140
gettrapstring (unsigned int trap_index)
141
12.2k
{
142
12.2k
  const trap_entry *trap;
143
144
107k
  for (trap = crx_traps; trap < crx_traps + NUMTRAPS; trap++)
145
95.4k
    if (trap->entry == trap_index)
146
417
      return trap->name;
147
148
11.8k
  return ILLEGAL;
149
12.2k
}
150
151
/* Given a 'cinv' instruction constant operand, return its corresponding string.
152
   This routine is used when disassembling the 'cinv' instruction.  */
153
154
static char *
155
getcinvstring (unsigned int num)
156
156
{
157
156
  const cinv_entry *cinv;
158
159
1.12k
  for (cinv = crx_cinvs; cinv < (crx_cinvs + NUMCINVS); cinv++)
160
1.12k
    if (cinv->value == num)
161
151
      return cinv->str;
162
163
5
  return ILLEGAL;
164
156
}
165
166
/* Given a register enum value, retrieve its name.  */
167
168
static char *
169
getregname (reg r)
170
129k
{
171
129k
  const reg_entry * regentry = &crx_regtab[r];
172
173
129k
  if (regentry->type != CRX_R_REGTYPE)
174
0
    return ILLEGAL;
175
129k
  else
176
129k
    return regentry->name;
177
129k
}
178
179
/* Given a coprocessor register enum value, retrieve its name.  */
180
181
static char *
182
getcopregname (copreg r, reg_type type)
183
222
{
184
222
  const reg_entry * regentry;
185
186
222
  if (type == CRX_C_REGTYPE)
187
113
    regentry = &crx_copregtab[r];
188
109
  else if (type == CRX_CS_REGTYPE)
189
109
    regentry = &crx_copregtab[r+(cs0-c0)];
190
0
  else
191
0
    return ILLEGAL;
192
193
222
  return regentry->name;
194
222
}
195
196
197
/* Getting a processor register name.  */
198
199
static char *
200
getprocregname (int reg_index)
201
116
{
202
116
  const reg_entry *r;
203
204
4.48k
  for (r = crx_regtab; r < crx_regtab + NUMREGS; r++)
205
4.39k
    if (r->image == reg_index)
206
35
      return r->name;
207
208
81
  return "ILLEGAL REGISTER";
209
116
}
210
211
/* Get the power of two for a given integer.  */
212
213
static int
214
powerof2 (int x)
215
1.09k
{
216
1.09k
  int product, i;
217
218
1.70k
  for (i = 0, product = 1; i < x; i++)
219
606
    product *= 2;
220
221
1.09k
  return product;
222
1.09k
}
223
224
/* Transform a register bit mask to a register list.  */
225
226
static void
227
getregliststring (int mask, char *string, enum REG_ARG_TYPE core_cop)
228
424
{
229
424
  char temp_string[16];
230
424
  int i;
231
232
424
  string[0] = '{';
233
424
  string[1] = '\0';
234
235
236
  /* A zero mask means HI/LO registers.  */
237
424
  if (mask == 0)
238
12
    {
239
12
      if (core_cop == USER_REG_ARG)
240
5
  strcat (string, "ulo,uhi");
241
7
      else
242
7
  strcat (string, "lo,hi");
243
12
    }
244
412
  else
245
412
    {
246
7.00k
      for (i = 0; i < 16; i++)
247
6.59k
  {
248
6.59k
    if (mask & 0x1)
249
2.53k
      {
250
2.53k
        switch (core_cop)
251
2.53k
        {
252
2.23k
        case REG_ARG:
253
2.23k
    sprintf (temp_string, "r%d", i);
254
2.23k
    break;
255
71
        case USER_REG_ARG:
256
71
    sprintf (temp_string, "u%d", i);
257
71
    break;
258
40
        case COP_ARG:
259
40
    sprintf (temp_string, "c%d", i);
260
40
    break;
261
184
        case COPS_ARG:
262
184
    sprintf (temp_string, "cs%d", i);
263
184
    break;
264
0
        default:
265
0
    break;
266
2.53k
        }
267
2.53k
        strcat (string, temp_string);
268
2.53k
        if (mask & 0xfffe)
269
2.12k
    strcat (string, ",");
270
2.53k
      }
271
6.59k
    mask >>= 1;
272
6.59k
  }
273
412
    }
274
275
424
  strcat (string, "}");
276
424
}
277
278
/* START and END are relating 'allWords' struct, which is 48 bits size.
279
280
        START|--------|END
281
      +---------+---------+---------+---------+
282
      |       |    V    |     A   |   L     |
283
      +---------+---------+---------+---------+
284
              0   16    32      48
285
    words     [0]     [1]       [2] */
286
287
static parameter
288
makelongparameter (ULONGLONG val, int start, int end)
289
231k
{
290
231k
  parameter p;
291
292
231k
  p.val = (dwordU) EXTRACT(val, 48 - end, end - start);
293
231k
  p.nbits = end - start;
294
231k
  return p;
295
231k
}
296
297
/* Build a mask of the instruction's 'constant' opcode,
298
   based on the instruction's printing flags.  */
299
300
static unsigned int
301
build_mask (void)
302
52.1M
{
303
52.1M
  unsigned int print_flags;
304
52.1M
  unsigned int mask;
305
306
52.1M
  print_flags = instruction->flags & FMT_CRX;
307
52.1M
  switch (print_flags)
308
52.1M
    {
309
1.18M
      case FMT_1:
310
1.18M
  mask = 0xF0F00000;
311
1.18M
  break;
312
965k
      case FMT_2:
313
965k
  mask = 0xFFF0FF00;
314
965k
  break;
315
9.94M
      case FMT_3:
316
9.94M
  mask = 0xFFF00F00;
317
9.94M
  break;
318
483k
      case FMT_4:
319
483k
  mask = 0xFFF0F000;
320
483k
  break;
321
483k
      case FMT_5:
322
483k
  mask = 0xFFF0FFF0;
323
483k
  break;
324
39.0M
      default:
325
39.0M
  mask = SBM(instruction->match_bits);
326
39.0M
  break;
327
52.1M
    }
328
329
52.1M
  return mask;
330
52.1M
}
331
332
/* Search for a matching opcode. Return 1 for success, 0 for failure.  */
333
334
static int
335
match_opcode (void)
336
134k
{
337
134k
  unsigned int mask;
338
339
  /* The instruction 'constant' opcode doewsn't exceed 32 bits.  */
340
134k
  unsigned int doubleWord = words[1] + ((unsigned) words[0] << 16);
341
342
  /* Start searching from end of instruction table.  */
343
134k
  instruction = &crx_instruction[NUMOPCODES - 2];
344
345
  /* Loop over instruction table until a full match is found.  */
346
52.1M
  while (instruction >= crx_instruction)
347
52.1M
    {
348
52.1M
      mask = build_mask ();
349
52.1M
      if ((doubleWord & mask) == BIN(instruction->match, instruction->match_bits))
350
118k
  return 1;
351
51.9M
      else
352
51.9M
  instruction--;
353
52.1M
    }
354
16.4k
  return 0;
355
134k
}
356
357
/* Set the proper parameter value for different type of arguments.  */
358
359
static void
360
make_argument (argument * a, int start_bits)
361
202k
{
362
202k
  int inst_bit_size, total_size;
363
202k
  parameter p;
364
365
202k
  if ((instruction->size == 3) && a->size >= 16)
366
5.45k
    inst_bit_size = 48;
367
196k
  else
368
196k
    inst_bit_size = 32;
369
370
202k
  switch (a->type)
371
202k
    {
372
113
    case arg_copr:
373
222
    case arg_copsr:
374
222
      p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
375
222
           inst_bit_size - start_bits);
376
222
      a->cr = p.val;
377
222
      break;
378
379
96.5k
    case arg_r:
380
96.5k
      p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
381
96.5k
           inst_bit_size - start_bits);
382
96.5k
      a->r = p.val;
383
96.5k
      break;
384
385
60.9k
    case arg_ic:
386
60.9k
      p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
387
60.9k
           inst_bit_size - start_bits);
388
389
60.9k
      if ((p.nbits == 4) && cst4flag)
390
30.3k
  {
391
30.3k
    if (IS_INSN_TYPE (CMPBR_INS) && (p.val == ESCAPE_16_BIT))
392
32
      {
393
        /* A special case, where the value is actually stored
394
     in the last 4 bits.  */
395
32
        p = makelongparameter (allWords, 44, 48);
396
        /* The size of the instruction should be incremented.  */
397
32
        size_changed = 1;
398
32
      }
399
400
30.3k
    if (p.val == 6)
401
1.04k
      p.val = -1;
402
29.3k
    else if (p.val == 13)
403
598
      p.val = 48;
404
28.7k
    else if (p.val == 5)
405
520
      p.val = -4;
406
28.1k
    else if (p.val == 10)
407
460
      p.val = 32;
408
27.7k
    else if (p.val == 11)
409
491
      p.val = 20;
410
27.2k
    else if (p.val == 9)
411
799
      p.val = 16;
412
30.3k
  }
413
414
60.9k
      a->constant = p.val;
415
60.9k
      break;
416
417
1.09k
    case arg_idxr:
418
1.09k
      a->scale = 0;
419
1.09k
      total_size = a->size + 10;  /* sizeof(rbase + ridx + scl2) = 10.  */
420
1.09k
      p = makelongparameter (allWords, inst_bit_size - total_size,
421
1.09k
           inst_bit_size - (total_size - 4));
422
1.09k
      a->r = p.val;
423
1.09k
      p = makelongparameter (allWords, inst_bit_size - (total_size - 4),
424
1.09k
           inst_bit_size - (total_size - 8));
425
1.09k
      a->i_r = p.val;
426
1.09k
      p = makelongparameter (allWords, inst_bit_size - (total_size - 8),
427
1.09k
           inst_bit_size - (total_size - 10));
428
1.09k
      a->scale = p.val;
429
1.09k
      p = makelongparameter (allWords, inst_bit_size - (total_size - 10),
430
1.09k
           inst_bit_size);
431
1.09k
      a->constant = p.val;
432
1.09k
      break;
433
434
5.39k
    case arg_rbase:
435
5.39k
      p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
436
5.39k
           inst_bit_size - start_bits);
437
5.39k
      a->r = p.val;
438
5.39k
      break;
439
440
25.5k
    case arg_cr:
441
25.5k
      if (a->size <= 8)
442
20.5k
  {
443
20.5k
    p = makelongparameter (allWords, inst_bit_size - (start_bits + 4),
444
20.5k
         inst_bit_size - start_bits);
445
20.5k
    a->r = p.val;
446
    /* Case for opc4 r dispu rbase.  */
447
20.5k
    p = makelongparameter (allWords, inst_bit_size - (start_bits + 8),
448
20.5k
         inst_bit_size - (start_bits + 4));
449
20.5k
  }
450
4.98k
      else
451
4.98k
  {
452
    /* The 'rbase' start_bits is always relative to a 32-bit data type.  */
453
4.98k
    p = makelongparameter (allWords, 32 - (start_bits + 4),
454
4.98k
         32 - start_bits);
455
4.98k
    a->r = p.val;
456
4.98k
    p = makelongparameter (allWords, 32 - start_bits,
457
4.98k
         inst_bit_size);
458
4.98k
  }
459
25.5k
      if ((p.nbits == 4) && cst4flag)
460
20.5k
  {
461
20.5k
    if (instruction->flags & DISPUW4)
462
6.95k
      p.val *= 2;
463
13.5k
    else if (instruction->flags & DISPUD4)
464
5.28k
      p.val *= 4;
465
20.5k
  }
466
25.5k
      a->constant = p.val;
467
25.5k
      break;
468
469
12.5k
    case arg_c:
470
12.5k
      p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size),
471
12.5k
           inst_bit_size - start_bits);
472
12.5k
      a->constant = p.val;
473
12.5k
      break;
474
0
    default:
475
0
      break;
476
202k
    }
477
202k
}
478
479
/*  Print a single argument.  */
480
481
static void
482
print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info)
483
202k
{
484
202k
  ULONGLONG longdisp, mask;
485
202k
  int sign_flag = 0;
486
202k
  int relative = 0;
487
202k
  bfd_vma number;
488
202k
  int op_index = 0;
489
202k
  char string[200];
490
202k
  void *stream = info->stream;
491
202k
  fprintf_ftype func = info->fprintf_func;
492
493
202k
  switch (a->type)
494
202k
    {
495
113
    case arg_copr:
496
113
      func (stream, "%s", getcopregname (a->cr, CRX_C_REGTYPE));
497
113
      break;
498
499
109
    case arg_copsr:
500
109
      func (stream, "%s", getcopregname (a->cr, CRX_CS_REGTYPE));
501
109
      break;
502
503
96.5k
    case arg_r:
504
96.5k
      if (IS_INSN_MNEMONIC ("mtpr") || IS_INSN_MNEMONIC ("mfpr"))
505
116
  func (stream, "%s", getprocregname (a->r));
506
96.4k
      else
507
96.4k
  func (stream, "%s", getregname (a->r));
508
96.5k
      break;
509
510
60.9k
    case arg_ic:
511
60.9k
      if (IS_INSN_MNEMONIC ("excp"))
512
12.2k
  func (stream, "%s", gettrapstring (a->constant));
513
514
48.7k
      else if (IS_INSN_MNEMONIC ("cinv"))
515
156
  func (stream, "%s", getcinvstring (a->constant));
516
517
48.5k
      else if (INST_HAS_REG_LIST)
518
490
  {
519
490
    REG_ARG_TYPE reg_arg_type = IS_INSN_TYPE (COP_REG_INS) ?
520
450
      COP_ARG : IS_INSN_TYPE (COPS_REG_INS) ?
521
358
      COPS_ARG : (instruction->flags & USER_REG) ?
522
343
      USER_REG_ARG : REG_ARG;
523
524
490
    if ((reg_arg_type == COP_ARG) || (reg_arg_type == COPS_ARG))
525
132
      {
526
        /*  Check for proper argument number.  */
527
132
        if (processing_argument_number == 2)
528
66
    {
529
66
      getregliststring (a->constant, string, reg_arg_type);
530
66
      func (stream, "%s", string);
531
66
    }
532
66
        else
533
66
    func (stream, "$0x%lx", a->constant & 0xffffffff);
534
132
      }
535
358
    else
536
358
      {
537
358
        getregliststring (a->constant, string, reg_arg_type);
538
358
        func (stream, "%s", string);
539
358
      }
540
490
  }
541
48.0k
      else
542
48.0k
  func (stream, "$0x%lx", a->constant & 0xffffffff);
543
60.9k
      break;
544
545
1.09k
    case arg_idxr:
546
1.09k
      func (stream, "0x%lx(%s,%s,%d)", a->constant & 0xffffffff,
547
1.09k
      getregname (a->r), getregname (a->i_r), powerof2 (a->scale));
548
1.09k
      break;
549
550
5.39k
    case arg_rbase:
551
5.39k
      func (stream, "(%s)", getregname (a->r));
552
5.39k
      break;
553
554
25.5k
    case arg_cr:
555
25.5k
      func (stream, "0x%lx(%s)", a->constant & 0xffffffff, getregname (a->r));
556
557
25.5k
      if (IS_INSN_TYPE (LD_STOR_INS_INC))
558
106
  func (stream, "+");
559
25.5k
      break;
560
561
12.5k
    case arg_c:
562
      /* Removed the *2 part as because implicit zeros are no more required.
563
   Have to fix this as this needs a bit of extension in terms of branchins.
564
   Have to add support for cmp and branch instructions.  */
565
12.5k
      if (IS_INSN_TYPE (BRANCH_INS) || IS_INSN_MNEMONIC ("bal")
566
12.5k
    || IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (DCR_BRANCH_INS)
567
12.5k
    || IS_INSN_TYPE (COP_BRANCH_INS))
568
7.94k
  {
569
7.94k
    relative = 1;
570
7.94k
    longdisp = a->constant;
571
7.94k
    longdisp <<= 1;
572
573
7.94k
    switch (a->size)
574
7.94k
      {
575
7.08k
      case 8:
576
7.54k
      case 16:
577
7.66k
      case 24:
578
7.94k
      case 32:
579
7.94k
        mask = ((LONGLONG) 1 << a->size) - 1;
580
7.94k
        if (longdisp & ((ULONGLONG) 1 << a->size))
581
1.84k
    {
582
1.84k
      sign_flag = 1;
583
1.84k
      longdisp = ~(longdisp) + 1;
584
1.84k
    }
585
7.94k
        a->constant = (unsigned long int) (longdisp & mask);
586
7.94k
        break;
587
0
      default:
588
0
        func (stream,
589
0
        "Wrong offset used in branch/bal instruction");
590
0
        break;
591
7.94k
      }
592
593
7.94k
  }
594
      /* For branch Neq instruction it is 2*offset + 2.  */
595
4.55k
      else if (IS_INSN_TYPE (BRANCH_NEQ_INS))
596
1.47k
  a->constant = 2 * a->constant + 2;
597
3.08k
      else if (IS_INSN_TYPE (LD_STOR_INS_INC)
598
3.08k
         || IS_INSN_TYPE (LD_STOR_INS)
599
3.08k
         || IS_INSN_TYPE (STOR_IMM_INS)
600
3.08k
         || IS_INSN_TYPE (CSTBIT_INS))
601
3.08k
  {
602
3.08k
    op_index = instruction->flags & REVERSE_MATCH ? 0 : 1;
603
3.08k
    if (instruction->operands[op_index].op_type == abs16)
604
1.47k
      a->constant |= 0xFFFF0000;
605
3.08k
  }
606
12.5k
      func (stream, "%s", "0x");
607
12.5k
      number = (relative ? memaddr : 0)
608
12.5k
  + (sign_flag ? -a->constant : a->constant);
609
12.5k
      (*info->print_address_func) (number, info);
610
12.5k
      break;
611
0
    default:
612
0
      break;
613
202k
    }
614
202k
}
615
616
/* Print all the arguments of CURRINSN instruction.  */
617
618
static void
619
print_arguments (ins *currentInsn, bfd_vma memaddr, struct disassemble_info *info)
620
110k
{
621
110k
  int i;
622
623
312k
  for (i = 0; i < currentInsn->nargs; i++)
624
202k
    {
625
202k
      processing_argument_number = i;
626
627
202k
      print_arg (&currentInsn->arg[i], memaddr, info);
628
629
202k
      if (i != currentInsn->nargs - 1)
630
92.0k
  info->fprintf_func (info->stream, ", ");
631
202k
    }
632
110k
}
633
634
/* Build the instruction's arguments.  */
635
636
static void
637
make_instruction (void)
638
110k
{
639
110k
  int i;
640
110k
  unsigned int shift;
641
642
312k
  for (i = 0; i < currInsn.nargs; i++)
643
202k
    {
644
202k
      argument a;
645
646
202k
      memset (&a, 0, sizeof (a));
647
202k
      a.type = getargtype (instruction->operands[i].op_type);
648
202k
      if (instruction->operands[i].op_type == cst4
649
202k
    || instruction->operands[i].op_type == rbase_dispu4)
650
50.8k
  cst4flag = 1;
651
202k
      a.size = getbits (instruction->operands[i].op_type);
652
202k
      shift = instruction->operands[i].shift;
653
654
202k
      make_argument (&a, shift);
655
202k
      currInsn.arg[i] = a;
656
202k
    }
657
658
  /* Calculate instruction size (in bytes).  */
659
110k
  currInsn.size = instruction->size + (size_changed ? 1 : 0);
660
  /* Now in bits.  */
661
110k
  currInsn.size *= 2;
662
110k
}
663
664
/* Retrieve a single word from a given memory address.  */
665
666
static wordU
667
get_word_at_PC (bfd_vma memaddr, struct disassemble_info *info)
668
404k
{
669
404k
  bfd_byte buffer[4];
670
404k
  int status;
671
404k
  wordU insn = 0;
672
673
404k
  status = info->read_memory_func (memaddr, buffer, 2, info);
674
675
404k
  if (status == 0)
676
403k
    insn = (wordU) bfd_getl16 (buffer);
677
678
404k
  return insn;
679
404k
}
680
681
/* Retrieve multiple words (3) from a given memory address.  */
682
683
static void
684
get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
685
134k
{
686
134k
  int i;
687
134k
  bfd_vma mem;
688
689
538k
  for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
690
404k
    words[i] = get_word_at_PC (mem, info);
691
692
134k
  allWords =
693
134k
    ((ULONGLONG) words[0] << 32) + ((unsigned long) words[1] << 16) + words[2];
694
134k
}
695
696
/* Prints the instruction by calling print_arguments after proper matching.  */
697
698
int
699
print_insn_crx (bfd_vma memaddr, struct disassemble_info *info)
700
134k
{
701
134k
  int is_decoded;     /* Nonzero means instruction has a match.  */
702
703
  /* Initialize global variables.  */
704
134k
  cst4flag = 0;
705
134k
  size_changed = 0;
706
707
  /* Retrieve the encoding from current memory location.  */
708
134k
  get_words_at_PC (memaddr, info);
709
  /* Find a matching opcode in table.  */
710
134k
  is_decoded = match_opcode ();
711
  /* If found, print the instruction's mnemonic and arguments.  */
712
134k
  if (is_decoded > 0 && (words[0] != 0 || words[1] != 0))
713
110k
    {
714
110k
      info->fprintf_func (info->stream, "%s", instruction->mnemonic);
715
110k
      if ((currInsn.nargs = get_number_of_operands ()) != 0)
716
110k
  info->fprintf_func (info->stream, "\t");
717
110k
      make_instruction ();
718
110k
      print_arguments (&currInsn, memaddr, info);
719
110k
      return currInsn.size;
720
110k
    }
721
722
  /* No match found.  */
723
24.4k
  info->fprintf_func (info->stream,"%s ",ILLEGAL);
724
24.4k
  return 2;
725
134k
}