Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/d30v-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* Disassemble D30V instructions.
2
   Copyright (C) 1997-2024 Free Software Foundation, Inc.
3
4
   This file is part of the GNU opcodes library.
5
6
   This library is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3, or (at your option)
9
   any later version.
10
11
   It is distributed in the hope that it will be useful, but WITHOUT
12
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14
   License for more details.
15
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19
   MA 02110-1301, USA.  */
20
21
#include "sysdep.h"
22
#include <stdio.h>
23
#include "opcode/d30v.h"
24
#include "disassemble.h"
25
#include "opintl.h"
26
#include "libiberty.h"
27
28
1.60k
#define PC_MASK 0xFFFFFFFF
29
30
/* Return 0 if lookup fails,
31
   1 if found and only one form,
32
   2 if found and there are short and long forms.  */
33
34
static int
35
lookup_opcode (struct d30v_insn *insn, long num, int is_long)
36
60.5k
{
37
60.5k
  int i = 0, op_index;
38
60.5k
  struct d30v_format *f;
39
60.5k
  struct d30v_opcode *op = (struct d30v_opcode *) d30v_opcode_table;
40
60.5k
  int op1 = (num >> 25) & 0x7;
41
60.5k
  int op2 = (num >> 20) & 0x1f;
42
60.5k
  int mod = (num >> 18) & 0x3;
43
44
  /* Find the opcode.  */
45
60.5k
  do
46
4.84M
    {
47
4.84M
      if ((op->op1 == op1) && (op->op2 == op2))
48
36.2k
  break;
49
4.80M
      op++;
50
4.80M
    }
51
4.80M
  while (op->name);
52
53
60.5k
  if (!op || !op->name)
54
24.2k
    return 0;
55
56
46.1k
  while (op->op1 == op1 && op->op2 == op2)
57
37.5k
    {
58
      /* Scan through all the formats for the opcode.  */
59
37.5k
      op_index = op->format[i++];
60
37.5k
      do
61
45.1k
  {
62
45.1k
    f = (struct d30v_format *) &d30v_format_table[op_index];
63
76.9k
    while (f->form == op_index)
64
59.5k
      {
65
59.5k
        if ((!is_long || f->form >= LONG) && (f->modifier == mod))
66
27.7k
    {
67
27.7k
      insn->form = f;
68
27.7k
      break;
69
27.7k
    }
70
31.8k
        f++;
71
31.8k
      }
72
45.1k
    if (insn->form)
73
27.7k
      break;
74
45.1k
  }
75
37.5k
      while ((op_index = op->format[i++]) != 0);
76
37.5k
      if (insn->form)
77
27.7k
  break;
78
9.87k
      op++;
79
9.87k
      i = 0;
80
9.87k
    }
81
36.2k
  if (insn->form == NULL)
82
8.57k
    return 0;
83
84
27.7k
  insn->op = op;
85
27.7k
  insn->ecc = (num >> 28) & 0x7;
86
27.7k
  if (op->format[1])
87
22.7k
    return 2;
88
4.93k
  else
89
4.93k
    return 1;
90
27.7k
}
91
92
static int
93
extract_value (uint64_t num, const struct d30v_operand *oper, int is_long)
94
54.2k
{
95
54.2k
  unsigned int val;
96
54.2k
  int shift = 12 - oper->position;
97
54.2k
  unsigned int mask = (0xFFFFFFFF >> (32 - oper->bits));
98
99
54.2k
  if (is_long)
100
836
    {
101
836
      if (oper->bits == 32)
102
  /* Piece together 32-bit constant.  */
103
298
  val = ((num & 0x3FFFF)
104
298
         | ((num & 0xFF00000) >> 2)
105
298
         | ((num & 0x3F00000000LL) >> 6));
106
538
      else
107
538
  val = (num >> (32 + shift)) & mask;
108
836
    }
109
53.4k
  else
110
53.4k
    val = (num >> shift) & mask;
111
112
54.2k
  if (oper->flags & OPERAND_SHIFT)
113
2.25k
    val <<= 3;
114
115
54.2k
  return val;
116
54.2k
}
117
118
static void
119
print_insn (struct disassemble_info *info,
120
      bfd_vma memaddr,
121
      uint64_t num,
122
      struct d30v_insn *insn,
123
      int is_long,
124
      int show_ext)
125
27.7k
{
126
27.7k
  unsigned int val, opnum;
127
27.7k
  const struct d30v_operand *oper;
128
27.7k
  int i, match, need_comma = 0, need_paren = 0, found_control = 0;
129
27.7k
  unsigned int opind = 0;
130
131
27.7k
  (*info->fprintf_func) (info->stream, "%s", insn->op->name);
132
133
  /* Check for CMP or CMPU.  */
134
27.7k
  if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME)
135
81
    {
136
81
      opind++;
137
81
      val =
138
81
  extract_value (num,
139
81
           &d30v_operand_table[insn->form->operands[0]],
140
81
           is_long);
141
81
      (*info->fprintf_func) (info->stream, "%s", d30v_cc_names[val]);
142
81
    }
143
144
  /* Add in ".s" or ".l".  */
145
27.7k
  if (show_ext == 2)
146
22.7k
    {
147
22.7k
      if (is_long)
148
298
  (*info->fprintf_func) (info->stream, ".l");
149
22.4k
      else
150
22.4k
  (*info->fprintf_func) (info->stream, ".s");
151
22.7k
    }
152
153
27.7k
  if (insn->ecc)
154
12.7k
    (*info->fprintf_func) (info->stream, "/%s", d30v_ecc_names[insn->ecc]);
155
156
27.7k
  (*info->fprintf_func) (info->stream, "\t");
157
158
88.0k
  while (opind < ARRAY_SIZE (insn->form->operands)
159
88.0k
   && (opnum = insn->form->operands[opind++]) != 0)
160
60.3k
    {
161
60.3k
      int bits;
162
163
60.3k
      oper = &d30v_operand_table[opnum];
164
60.3k
      bits = oper->bits;
165
60.3k
      if (oper->flags & OPERAND_SHIFT)
166
2.25k
  bits += 3;
167
168
60.3k
      if (need_comma
169
60.3k
    && oper->flags != OPERAND_PLUS
170
60.3k
    && oper->flags != OPERAND_MINUS)
171
26.5k
  {
172
26.5k
    need_comma = 0;
173
26.5k
    (*info->fprintf_func) (info->stream, ", ");
174
26.5k
  }
175
176
60.3k
      if (oper->flags == OPERAND_ATMINUS)
177
0
  {
178
0
    (*info->fprintf_func) (info->stream, "@-");
179
0
    continue;
180
0
  }
181
60.3k
      if (oper->flags == OPERAND_MINUS)
182
508
  {
183
508
    (*info->fprintf_func) (info->stream, "-");
184
508
    continue;
185
508
  }
186
59.8k
      if (oper->flags == OPERAND_PLUS)
187
1.72k
  {
188
1.72k
    (*info->fprintf_func) (info->stream, "+");
189
1.72k
    continue;
190
1.72k
  }
191
58.1k
      if (oper->flags == OPERAND_ATSIGN)
192
0
  {
193
0
    (*info->fprintf_func) (info->stream, "@");
194
0
    continue;
195
0
  }
196
58.1k
      if (oper->flags == OPERAND_ATPAR)
197
3.96k
  {
198
3.96k
    (*info->fprintf_func) (info->stream, "@(");
199
3.96k
    need_paren = 1;
200
3.96k
    continue;
201
3.96k
  }
202
203
54.1k
      if (oper->flags == OPERAND_SPECIAL)
204
208
  continue;
205
206
53.9k
      val = extract_value (num, oper, is_long);
207
208
53.9k
      if (oper->flags & OPERAND_REG)
209
47.9k
  {
210
47.9k
    match = 0;
211
47.9k
    if (oper->flags & OPERAND_CONTROL)
212
208
      {
213
208
        const struct d30v_operand *oper3
214
208
    = &d30v_operand_table[insn->form->operands[2]];
215
208
        int id = extract_value (num, oper3, is_long);
216
217
208
        found_control = 1;
218
208
        switch (id)
219
208
    {
220
49
    case 0:
221
49
      val |= OPERAND_CONTROL;
222
49
      break;
223
72
    case 1:
224
113
    case 2:
225
113
      val = OPERAND_CONTROL + MAX_CONTROL_REG + id;
226
113
      break;
227
46
    case 3:
228
46
      val |= OPERAND_FLAG;
229
46
      break;
230
0
    default:
231
      /* xgettext: c-format */
232
0
      opcodes_error_handler (_("illegal id (%d)"), id);
233
0
      abort ();
234
208
    }
235
208
      }
236
47.7k
    else if (oper->flags & OPERAND_ACC)
237
143
      val |= OPERAND_ACC;
238
47.6k
    else if (oper->flags & OPERAND_FLAG)
239
1.00k
      val |= OPERAND_FLAG;
240
5.26M
    for (i = 0; i < reg_name_cnt (); i++)
241
5.26M
      {
242
5.26M
        if (val == pre_defined_registers[i].value)
243
47.9k
    {
244
47.9k
      if (pre_defined_registers[i].pname)
245
1.72k
        (*info->fprintf_func)
246
1.72k
          (info->stream, "%s", pre_defined_registers[i].pname);
247
46.1k
      else
248
46.1k
        (*info->fprintf_func)
249
46.1k
          (info->stream, "%s", pre_defined_registers[i].name);
250
47.9k
      match = 1;
251
47.9k
      break;
252
47.9k
    }
253
5.26M
      }
254
47.9k
    if (match == 0)
255
35
      {
256
        /* This would only get executed if a register was not in
257
     the register table.  */
258
35
        (*info->fprintf_func)
259
35
    (info->stream, _("<unknown register %d>"), val & 0x3F);
260
35
      }
261
47.9k
  }
262
      /* repeati has a relocation, but its first argument is a plain
263
   immediate.  OTOH instructions like djsri have a pc-relative
264
   delay target, but an absolute jump target.  Therefore, a test
265
   of insn->op->reloc_flag is not specific enough; we must test
266
   if the actual operand we are handling now is pc-relative.  */
267
6.00k
      else if (oper->flags & OPERAND_PCREL)
268
1.60k
  {
269
1.60k
    int neg = 0;
270
271
    /* IMM6S3 is unsigned.  */
272
1.60k
    if (oper->flags & OPERAND_SIGNED || bits == 32)
273
855
      {
274
855
        unsigned int sign = 1u << (bits - 1);
275
855
        if (val & sign)
276
339
    {
277
339
      val = -val & (sign + sign - 1);
278
339
      neg = 1;
279
339
    }
280
855
      }
281
1.60k
    if (neg)
282
339
      {
283
339
        (*info->fprintf_func) (info->stream, "-%x\t(", val);
284
339
        (*info->print_address_func) ((memaddr - val) & PC_MASK, info);
285
339
        (*info->fprintf_func) (info->stream, ")");
286
339
      }
287
1.27k
    else
288
1.27k
      {
289
1.27k
        (*info->fprintf_func) (info->stream, "%x\t(", val);
290
1.27k
        (*info->print_address_func) ((memaddr + val) & PC_MASK, info);
291
1.27k
        (*info->fprintf_func) (info->stream, ")");
292
1.27k
      }
293
1.60k
  }
294
4.39k
      else if (insn->op->reloc_flag == RELOC_ABS)
295
710
  {
296
710
    (*info->print_address_func) (val, info);
297
710
  }
298
3.68k
      else
299
3.68k
  {
300
3.68k
    if (oper->flags & OPERAND_SIGNED)
301
2.84k
      {
302
2.84k
        unsigned int sign = 1u << (bits - 1);
303
304
2.84k
        if (val & sign)
305
1.23k
    {
306
1.23k
      val = -val & (sign + sign - 1);
307
1.23k
      (*info->fprintf_func) (info->stream, "-");
308
1.23k
    }
309
2.84k
      }
310
3.68k
    (*info->fprintf_func) (info->stream, "0x%x", val);
311
3.68k
  }
312
      /* If there is another operand, then write a comma and space.  */
313
53.9k
      if (opind < ARRAY_SIZE (insn->form->operands)
314
53.9k
    && insn->form->operands[opind]
315
53.9k
    && !(found_control && opind == 2))
316
26.5k
  need_comma = 1;
317
53.9k
    }
318
27.7k
  if (need_paren)
319
3.96k
    (*info->fprintf_func) (info->stream, ")");
320
27.7k
}
321
322
int
323
print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info)
324
34.7k
{
325
34.7k
  int status, result;
326
34.7k
  bfd_byte buffer[12];
327
34.7k
  uint32_t in1, in2;
328
34.7k
  struct d30v_insn insn;
329
34.7k
  uint64_t num;
330
331
34.7k
  insn.form = NULL;
332
333
34.7k
  info->bytes_per_line = 8;
334
34.7k
  info->bytes_per_chunk = 4;
335
34.7k
  info->display_endian = BFD_ENDIAN_BIG;
336
337
34.7k
  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
338
34.7k
  if (status != 0)
339
95
    {
340
95
      (*info->memory_error_func) (status, memaddr, info);
341
95
      return -1;
342
95
    }
343
34.6k
  in1 = bfd_getb32 (buffer);
344
345
34.6k
  status = (*info->read_memory_func) (memaddr + 4, buffer, 4, info);
346
34.6k
  if (status != 0)
347
81
    {
348
81
      info->bytes_per_line = 8;
349
81
      if (!(result = lookup_opcode (&insn, in1, 0)))
350
28
  (*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
351
53
      else
352
53
  print_insn (info, memaddr, (uint64_t) in1, &insn, 0, result);
353
81
      return 4;
354
81
    }
355
34.5k
  in2 = bfd_getb32 (buffer);
356
357
34.5k
  if (in1 & in2 & FM01)
358
8.74k
    {
359
      /* LONG instruction.  */
360
8.74k
      if (!(result = lookup_opcode (&insn, in1, 1)))
361
8.44k
  {
362
8.44k
    (*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x", in1, in2);
363
8.44k
    return 8;
364
8.44k
  }
365
298
      num = (uint64_t) in1 << 32 | in2;
366
298
      print_insn (info, memaddr, num, &insn, 1, result);
367
298
    }
368
25.8k
  else
369
25.8k
    {
370
25.8k
      num = in1;
371
25.8k
      if (!(result = lookup_opcode (&insn, in1, 0)))
372
12.1k
  (*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
373
13.7k
      else
374
13.7k
  print_insn (info, memaddr, num, &insn, 0, result);
375
376
25.8k
      switch (((in1 >> 31) << 1) | (in2 >> 31))
377
25.8k
  {
378
16.7k
  case 0:
379
16.7k
    (*info->fprintf_func) (info->stream, "\t||\t");
380
16.7k
    break;
381
4.65k
  case 1:
382
4.65k
    (*info->fprintf_func) (info->stream, "\t->\t");
383
4.65k
    break;
384
4.47k
  case 2:
385
4.47k
    (*info->fprintf_func) (info->stream, "\t<-\t");
386
4.47k
  default:
387
4.47k
    break;
388
25.8k
  }
389
390
25.8k
      insn.form = NULL;
391
25.8k
      num = in2;
392
25.8k
      if (!(result = lookup_opcode (&insn, in2, 0)))
393
12.2k
  (*info->fprintf_func) (info->stream, ".long\t0x%x", in2);
394
13.6k
      else
395
13.6k
  print_insn (info, memaddr, num, &insn, 0, result);
396
25.8k
    }
397
26.1k
  return 8;
398
34.5k
}