Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/epiphany-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
2
/* Disassembler interface for targets using CGEN. -*- C -*-
3
   CGEN: Cpu tools GENerator
4
5
   THIS FILE IS MACHINE GENERATED WITH CGEN.
6
   - the resultant file is machine generated, cgen-dis.in isn't
7
8
   Copyright (C) 1996-2024 Free Software Foundation, Inc.
9
10
   This file is part of libopcodes.
11
12
   This library is free software; you can redistribute it and/or modify
13
   it under the terms of the GNU General Public License as published by
14
   the Free Software Foundation; either version 3, or (at your option)
15
   any later version.
16
17
   It is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
20
   License for more details.
21
22
   You should have received a copy of the GNU General Public License
23
   along with this program; if not, write to the Free Software Foundation, Inc.,
24
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
25
26
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27
   Keep that in mind.  */
28
29
#include "sysdep.h"
30
#include <stdio.h>
31
#include "ansidecl.h"
32
#include "disassemble.h"
33
#include "bfd.h"
34
#include "symcat.h"
35
#include "libiberty.h"
36
#include "epiphany-desc.h"
37
#include "epiphany-opc.h"
38
#include "opintl.h"
39
40
/* Default text to print if an instruction isn't recognized.  */
41
17.3k
#define UNKNOWN_INSN_MSG _("*unknown*")
42
43
static void print_normal
44
  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45
static void print_address
46
  (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47
static void print_keyword
48
  (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49
static void print_insn_normal
50
  (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51
static int print_insn
52
  (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
53
static int default_print_insn
54
  (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55
static int read_insn
56
  (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
57
   unsigned long *);
58

59
/* -- disassembler routines inserted here.  */
60
61
/* -- dis.c */
62
63
75.9k
#define CGEN_PRINT_INSN epiphany_print_insn
64
65
static int
66
epiphany_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
67
75.9k
{
68
75.9k
  bfd_byte buf[CGEN_MAX_INSN_SIZE];
69
75.9k
  int buflen;
70
75.9k
  int status;
71
72
75.9k
  info->bytes_per_chunk = 2;
73
75.9k
  info->bytes_per_line = 4;
74
75
  /* Attempt to read the base part of the insn.  */
76
75.9k
  buflen = cd->base_insn_bitsize / 8;
77
75.9k
  status = (*info->read_memory_func) (pc, buf, buflen, info);
78
79
  /* Try again with the minimum part, if min < base.  */
80
75.9k
  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
81
130
    {
82
130
      buflen = cd->min_insn_bitsize / 8;
83
130
      status = (*info->read_memory_func) (pc, buf, buflen, info);
84
130
    }
85
86
75.9k
  if (status != 0)
87
45
    {
88
45
      (*info->memory_error_func) (status, pc, info);
89
45
      return -1;
90
45
    }
91
92
75.8k
  return print_insn (cd, pc, info, buf, buflen);
93
75.9k
}
94
95
96
static void
97
print_postindex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
98
     void * dis_info,
99
     long value,
100
     unsigned int attrs ATTRIBUTE_UNUSED,
101
     bfd_vma pc ATTRIBUTE_UNUSED,
102
     int length ATTRIBUTE_UNUSED)
103
3.05k
{
104
3.05k
  disassemble_info *info = (disassemble_info *) dis_info;
105
3.05k
  (*info->fprintf_func) (info->stream, value ? "-" : "+");
106
3.05k
}
107
108
static void
109
print_simm_not_reg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
110
        void * dis_info,
111
        long value,
112
        unsigned int attrs ATTRIBUTE_UNUSED,
113
        bfd_vma pc ATTRIBUTE_UNUSED,
114
        int length ATTRIBUTE_UNUSED)
115
1.00k
{
116
1.00k
  print_address (cd, dis_info, value, attrs, pc, length);
117
1.00k
}
118
119
static void
120
print_uimm_not_reg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
121
        void * dis_info,
122
        unsigned long value,
123
        unsigned int attrs ATTRIBUTE_UNUSED,
124
        bfd_vma pc ATTRIBUTE_UNUSED,
125
        int length ATTRIBUTE_UNUSED)
126
2.33k
{
127
2.33k
  disassemble_info *info = (disassemble_info *)dis_info;
128
129
2.33k
  if (value & 0x800)
130
0
    (*info->fprintf_func) (info->stream, "-");
131
132
2.33k
  value &= 0x7ff;
133
2.33k
  print_address (cd, dis_info, value, attrs, pc, length);
134
2.33k
}
135
136

137
/* -- */
138
139
void epiphany_cgen_print_operand
140
  (CGEN_CPU_DESC, int, void *, CGEN_FIELDS *, void const *, bfd_vma, int);
141
142
/* Main entry point for printing operands.
143
   XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
144
   of dis-asm.h on cgen.h.
145
146
   This function is basically just a big switch statement.  Earlier versions
147
   used tables to look up the function to use, but
148
   - if the table contains both assembler and disassembler functions then
149
     the disassembler contains much of the assembler and vice-versa,
150
   - there's a lot of inlining possibilities as things grow,
151
   - using a switch statement avoids the function call overhead.
152
153
   This function could be moved into `print_insn_normal', but keeping it
154
   separate makes clear the interface between `print_insn_normal' and each of
155
   the handlers.  */
156
157
void
158
epiphany_cgen_print_operand (CGEN_CPU_DESC cd,
159
         int opindex,
160
         void * xinfo,
161
         CGEN_FIELDS *fields,
162
         void const *attrs ATTRIBUTE_UNUSED,
163
         bfd_vma pc,
164
         int length)
165
122k
{
166
122k
  disassemble_info *info = (disassemble_info *) xinfo;
167
168
122k
  switch (opindex)
169
122k
    {
170
791
    case EPIPHANY_OPERAND_DIRECTION :
171
791
      print_postindex (cd, info, fields->f_addsubx, 0, pc, length);
172
791
      break;
173
2.25k
    case EPIPHANY_OPERAND_DISP11 :
174
2.25k
      print_uimm_not_reg (cd, info, fields->f_disp11, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
175
2.25k
      break;
176
3.06k
    case EPIPHANY_OPERAND_DISP3 :
177
3.06k
      print_normal (cd, info, fields->f_disp3, 0, pc, length);
178
3.06k
      break;
179
2.25k
    case EPIPHANY_OPERAND_DPMI :
180
2.25k
      print_postindex (cd, info, fields->f_subd, 0, pc, length);
181
2.25k
      break;
182
0
    case EPIPHANY_OPERAND_FRD :
183
0
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd, 0);
184
0
      break;
185
0
    case EPIPHANY_OPERAND_FRD6 :
186
0
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
187
0
      break;
188
0
    case EPIPHANY_OPERAND_FRM :
189
0
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm, 0);
190
0
      break;
191
0
    case EPIPHANY_OPERAND_FRM6 :
192
0
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm6, 0|(1<<CGEN_OPERAND_VIRTUAL));
193
0
      break;
194
0
    case EPIPHANY_OPERAND_FRN :
195
0
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn, 0);
196
0
      break;
197
0
    case EPIPHANY_OPERAND_FRN6 :
198
0
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
199
0
      break;
200
38
    case EPIPHANY_OPERAND_IMM16 :
201
38
      print_address (cd, info, fields->f_imm16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
202
38
      break;
203
1.60k
    case EPIPHANY_OPERAND_IMM8 :
204
1.60k
      print_address (cd, info, fields->f_imm8, 0|(1<<CGEN_OPERAND_RELAX), pc, length);
205
1.60k
      break;
206
29.1k
    case EPIPHANY_OPERAND_RD :
207
29.1k
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd, 0);
208
29.1k
      break;
209
3.78k
    case EPIPHANY_OPERAND_RD6 :
210
3.78k
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
211
3.78k
      break;
212
16.2k
    case EPIPHANY_OPERAND_RM :
213
16.2k
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm, 0);
214
16.2k
      break;
215
824
    case EPIPHANY_OPERAND_RM6 :
216
824
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm6, 0|(1<<CGEN_OPERAND_VIRTUAL));
217
824
      break;
218
27.4k
    case EPIPHANY_OPERAND_RN :
219
27.4k
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn, 0);
220
27.4k
      break;
221
3.36k
    case EPIPHANY_OPERAND_RN6 :
222
3.36k
      print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
223
3.36k
      break;
224
0
    case EPIPHANY_OPERAND_SD :
225
0
      print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sd, 0);
226
0
      break;
227
0
    case EPIPHANY_OPERAND_SD6 :
228
0
      print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
229
0
      break;
230
0
    case EPIPHANY_OPERAND_SDDMA :
231
0
      print_keyword (cd, info, & epiphany_cgen_opval_crdma_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
232
0
      break;
233
0
    case EPIPHANY_OPERAND_SDMEM :
234
0
      print_keyword (cd, info, & epiphany_cgen_opval_crmem_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
235
0
      break;
236
0
    case EPIPHANY_OPERAND_SDMESH :
237
0
      print_keyword (cd, info, & epiphany_cgen_opval_crmesh_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
238
0
      break;
239
4.78k
    case EPIPHANY_OPERAND_SHIFT :
240
4.78k
      print_normal (cd, info, fields->f_shift, 0, pc, length);
241
4.78k
      break;
242
251
    case EPIPHANY_OPERAND_SIMM11 :
243
251
      print_simm_not_reg (cd, info, fields->f_sdisp11, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
244
251
      break;
245
2.97k
    case EPIPHANY_OPERAND_SIMM24 :
246
2.97k
      print_address (cd, info, fields->f_simm24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
247
2.97k
      break;
248
749
    case EPIPHANY_OPERAND_SIMM3 :
249
749
      print_simm_not_reg (cd, info, fields->f_sdisp3, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX), pc, length);
250
749
      break;
251
22.1k
    case EPIPHANY_OPERAND_SIMM8 :
252
22.1k
      print_address (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
253
22.1k
      break;
254
124
    case EPIPHANY_OPERAND_SN :
255
124
      print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sn, 0);
256
124
      break;
257
232
    case EPIPHANY_OPERAND_SN6 :
258
232
      print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
259
232
      break;
260
0
    case EPIPHANY_OPERAND_SNDMA :
261
0
      print_keyword (cd, info, & epiphany_cgen_opval_crdma_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
262
0
      break;
263
83
    case EPIPHANY_OPERAND_SNMEM :
264
83
      print_keyword (cd, info, & epiphany_cgen_opval_crmem_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
265
83
      break;
266
65
    case EPIPHANY_OPERAND_SNMESH :
267
65
      print_keyword (cd, info, & epiphany_cgen_opval_crmesh_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
268
65
      break;
269
75
    case EPIPHANY_OPERAND_SWI_NUM :
270
75
      print_uimm_not_reg (cd, info, fields->f_trap_num, 0, pc, length);
271
75
      break;
272
49
    case EPIPHANY_OPERAND_TRAPNUM6 :
273
49
      print_normal (cd, info, fields->f_trap_num, 0, pc, length);
274
49
      break;
275
276
0
    default :
277
      /* xgettext:c-format */
278
0
      opcodes_error_handler
279
0
  (_("internal error: unrecognized field %d while printing insn"),
280
0
   opindex);
281
0
      abort ();
282
122k
  }
283
122k
}
284
285
cgen_print_fn * const epiphany_cgen_print_handlers[] =
286
{
287
  print_insn_normal,
288
};
289
290
291
void
292
epiphany_cgen_init_dis (CGEN_CPU_DESC cd)
293
3
{
294
3
  epiphany_cgen_init_opcode_table (cd);
295
3
  epiphany_cgen_init_ibld_table (cd);
296
3
  cd->print_handlers = & epiphany_cgen_print_handlers[0];
297
3
  cd->print_operand = epiphany_cgen_print_operand;
298
3
}
299
300

301
/* Default print handler.  */
302
303
static void
304
print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
305
        void *dis_info,
306
        long value,
307
        unsigned int attrs,
308
        bfd_vma pc ATTRIBUTE_UNUSED,
309
        int length ATTRIBUTE_UNUSED)
310
7.90k
{
311
7.90k
  disassemble_info *info = (disassemble_info *) dis_info;
312
313
  /* Print the operand as directed by the attributes.  */
314
7.90k
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
315
0
    ; /* nothing to do */
316
7.90k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
317
0
    (*info->fprintf_func) (info->stream, "%ld", value);
318
7.90k
  else
319
7.90k
    (*info->fprintf_func) (info->stream, "0x%lx", value);
320
7.90k
}
321
322
/* Default address handler.  */
323
324
static void
325
print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
326
         void *dis_info,
327
         bfd_vma value,
328
         unsigned int attrs,
329
         bfd_vma pc ATTRIBUTE_UNUSED,
330
         int length ATTRIBUTE_UNUSED)
331
30.1k
{
332
30.1k
  disassemble_info *info = (disassemble_info *) dis_info;
333
334
  /* Print the operand as directed by the attributes.  */
335
30.1k
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
336
0
    ; /* Nothing to do.  */
337
30.1k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
338
25.1k
    (*info->print_address_func) (value, info);
339
4.97k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
340
0
    (*info->print_address_func) (value, info);
341
4.97k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
342
1.00k
    (*info->fprintf_func) (info->stream, "%ld", (long) value);
343
3.97k
  else
344
3.97k
    (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
345
30.1k
}
346
347
/* Keyword print handler.  */
348
349
static void
350
print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
351
         void *dis_info,
352
         CGEN_KEYWORD *keyword_table,
353
         long value,
354
         unsigned int attrs ATTRIBUTE_UNUSED)
355
81.3k
{
356
81.3k
  disassemble_info *info = (disassemble_info *) dis_info;
357
81.3k
  const CGEN_KEYWORD_ENTRY *ke;
358
359
81.3k
  ke = cgen_keyword_lookup_value (keyword_table, value);
360
81.3k
  if (ke != NULL)
361
81.2k
    (*info->fprintf_func) (info->stream, "%s", ke->name);
362
106
  else
363
106
    (*info->fprintf_func) (info->stream, "???");
364
81.3k
}
365

366
/* Default insn printer.
367
368
   DIS_INFO is defined as `void *' so the disassembler needn't know anything
369
   about disassemble_info.  */
370
371
static void
372
print_insn_normal (CGEN_CPU_DESC cd,
373
       void *dis_info,
374
       const CGEN_INSN *insn,
375
       CGEN_FIELDS *fields,
376
       bfd_vma pc,
377
       int length)
378
58.5k
{
379
58.5k
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
380
58.5k
  disassemble_info *info = (disassemble_info *) dis_info;
381
58.5k
  const CGEN_SYNTAX_CHAR_TYPE *syn;
382
383
58.5k
  CGEN_INIT_PRINT (cd);
384
385
397k
  for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
386
338k
    {
387
338k
      if (CGEN_SYNTAX_MNEMONIC_P (*syn))
388
58.5k
  {
389
58.5k
    (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
390
58.5k
    continue;
391
58.5k
  }
392
280k
      if (CGEN_SYNTAX_CHAR_P (*syn))
393
157k
  {
394
157k
    (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
395
157k
    continue;
396
157k
  }
397
398
      /* We have an operand.  */
399
122k
      epiphany_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
400
122k
         fields, CGEN_INSN_ATTRS (insn), pc, length);
401
122k
    }
402
58.5k
}
403

404
/* Subroutine of print_insn. Reads an insn into the given buffers and updates
405
   the extract info.
406
   Returns 0 if all is well, non-zero otherwise.  */
407
408
static int
409
read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
410
     bfd_vma pc,
411
     disassemble_info *info,
412
     bfd_byte *buf,
413
     int buflen,
414
     CGEN_EXTRACT_INFO *ex_info,
415
     unsigned long *insn_value)
416
0
{
417
0
  int status = (*info->read_memory_func) (pc, buf, buflen, info);
418
419
0
  if (status != 0)
420
0
    {
421
0
      (*info->memory_error_func) (status, pc, info);
422
0
      return -1;
423
0
    }
424
425
0
  ex_info->dis_info = info;
426
0
  ex_info->valid = (1 << buflen) - 1;
427
0
  ex_info->insn_bytes = buf;
428
429
0
  *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
430
0
  return 0;
431
0
}
432
433
/* Utility to print an insn.
434
   BUF is the base part of the insn, target byte order, BUFLEN bytes long.
435
   The result is the size of the insn in bytes or zero for an unknown insn
436
   or -1 if an error occurs fetching data (memory_error_func will have
437
   been called).  */
438
439
static int
440
print_insn (CGEN_CPU_DESC cd,
441
      bfd_vma pc,
442
      disassemble_info *info,
443
      bfd_byte *buf,
444
      unsigned int buflen)
445
75.8k
{
446
75.8k
  CGEN_INSN_INT insn_value;
447
75.8k
  const CGEN_INSN_LIST *insn_list;
448
75.8k
  CGEN_EXTRACT_INFO ex_info;
449
75.8k
  int basesize;
450
451
  /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
452
75.8k
  basesize = cd->base_insn_bitsize < buflen * 8 ?
453
75.8k
                                     cd->base_insn_bitsize : buflen * 8;
454
75.8k
  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
455
456
457
  /* Fill in ex_info fields like read_insn would.  Don't actually call
458
     read_insn, since the incoming buffer is already read (and possibly
459
     modified a la m32r).  */
460
75.8k
  ex_info.valid = (1 << buflen) - 1;
461
75.8k
  ex_info.dis_info = info;
462
75.8k
  ex_info.insn_bytes = buf;
463
464
  /* The instructions are stored in hash lists.
465
     Pick the first one and keep trying until we find the right one.  */
466
467
75.8k
  insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
468
843k
  while (insn_list != NULL)
469
825k
    {
470
825k
      const CGEN_INSN *insn = insn_list->insn;
471
825k
      CGEN_FIELDS fields;
472
825k
      int length;
473
825k
      unsigned long insn_value_cropped;
474
475
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
476
      /* Not needed as insn shouldn't be in hash lists if not supported.  */
477
      /* Supported by this cpu?  */
478
      if (! epiphany_cgen_insn_supported (cd, insn))
479
        {
480
          insn_list = CGEN_DIS_NEXT_INSN (insn_list);
481
    continue;
482
        }
483
#endif
484
485
      /* Basic bit mask must be correct.  */
486
      /* ??? May wish to allow target to defer this check until the extract
487
   handler.  */
488
489
      /* Base size may exceed this instruction's size.  Extract the
490
         relevant part from the buffer. */
491
825k
      if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
492
825k
    (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
493
303k
  insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
494
303k
             info->endian == BFD_ENDIAN_BIG);
495
522k
      else
496
522k
  insn_value_cropped = insn_value;
497
498
825k
      if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
499
825k
    == CGEN_INSN_BASE_VALUE (insn))
500
58.5k
  {
501
    /* Printing is handled in two passes.  The first pass parses the
502
       machine insn and extracts the fields.  The second pass prints
503
       them.  */
504
505
    /* Make sure the entire insn is loaded into insn_value, if it
506
       can fit.  */
507
58.5k
    if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
508
58.5k
        (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
509
0
      {
510
0
        unsigned long full_insn_value;
511
0
        int rc = read_insn (cd, pc, info, buf,
512
0
          CGEN_INSN_BITSIZE (insn) / 8,
513
0
          & ex_info, & full_insn_value);
514
0
        if (rc != 0)
515
0
    return rc;
516
0
        length = CGEN_EXTRACT_FN (cd, insn)
517
0
    (cd, insn, &ex_info, full_insn_value, &fields, pc);
518
0
      }
519
58.5k
    else
520
58.5k
      length = CGEN_EXTRACT_FN (cd, insn)
521
58.5k
        (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
522
523
    /* Length < 0 -> error.  */
524
58.5k
    if (length < 0)
525
0
      return length;
526
58.5k
    if (length > 0)
527
58.5k
      {
528
58.5k
        CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
529
        /* Length is in bits, result is in bytes.  */
530
58.5k
        return length / 8;
531
58.5k
      }
532
58.5k
  }
533
534
767k
      insn_list = CGEN_DIS_NEXT_INSN (insn_list);
535
767k
    }
536
537
17.3k
  return 0;
538
75.8k
}
539
540
/* Default value for CGEN_PRINT_INSN.
541
   The result is the size of the insn in bytes or zero for an unknown insn
542
   or -1 if an error occured fetching bytes.  */
543
544
#ifndef CGEN_PRINT_INSN
545
#define CGEN_PRINT_INSN default_print_insn
546
#endif
547
548
static int
549
default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
550
0
{
551
0
  bfd_byte buf[CGEN_MAX_INSN_SIZE];
552
0
  int buflen;
553
0
  int status;
554
0
555
0
  /* Attempt to read the base part of the insn.  */
556
0
  buflen = cd->base_insn_bitsize / 8;
557
0
  status = (*info->read_memory_func) (pc, buf, buflen, info);
558
0
559
0
  /* Try again with the minimum part, if min < base.  */
560
0
  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
561
0
    {
562
0
      buflen = cd->min_insn_bitsize / 8;
563
0
      status = (*info->read_memory_func) (pc, buf, buflen, info);
564
0
    }
565
0
566
0
  if (status != 0)
567
0
    {
568
0
      (*info->memory_error_func) (status, pc, info);
569
0
      return -1;
570
0
    }
571
0
572
0
  return print_insn (cd, pc, info, buf, buflen);
573
0
}
574
575
/* Main entry point.
576
   Print one instruction from PC on INFO->STREAM.
577
   Return the size of the instruction (in bytes).  */
578
579
typedef struct cpu_desc_list
580
{
581
  struct cpu_desc_list *next;
582
  CGEN_BITSET *isa;
583
  int mach;
584
  int endian;
585
  int insn_endian;
586
  CGEN_CPU_DESC cd;
587
} cpu_desc_list;
588
589
int
590
print_insn_epiphany (bfd_vma pc, disassemble_info *info)
591
75.9k
{
592
75.9k
  static cpu_desc_list *cd_list = 0;
593
75.9k
  cpu_desc_list *cl = 0;
594
75.9k
  static CGEN_CPU_DESC cd = 0;
595
75.9k
  static CGEN_BITSET *prev_isa;
596
75.9k
  static int prev_mach;
597
75.9k
  static int prev_endian;
598
75.9k
  static int prev_insn_endian;
599
75.9k
  int length;
600
75.9k
  CGEN_BITSET *isa;
601
75.9k
  int mach;
602
75.9k
  int endian = (info->endian == BFD_ENDIAN_BIG
603
75.9k
    ? CGEN_ENDIAN_BIG
604
75.9k
    : CGEN_ENDIAN_LITTLE);
605
75.9k
  int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
606
75.9k
                     ? CGEN_ENDIAN_BIG
607
75.9k
                     : CGEN_ENDIAN_LITTLE);
608
75.9k
  enum bfd_architecture arch;
609
610
  /* ??? gdb will set mach but leave the architecture as "unknown" */
611
75.9k
#ifndef CGEN_BFD_ARCH
612
75.9k
#define CGEN_BFD_ARCH bfd_arch_epiphany
613
75.9k
#endif
614
75.9k
  arch = info->arch;
615
75.9k
  if (arch == bfd_arch_unknown)
616
0
    arch = CGEN_BFD_ARCH;
617
618
  /* There's no standard way to compute the machine or isa number
619
     so we leave it to the target.  */
620
#ifdef CGEN_COMPUTE_MACH
621
  mach = CGEN_COMPUTE_MACH (info);
622
#else
623
75.9k
  mach = info->mach;
624
75.9k
#endif
625
626
#ifdef CGEN_COMPUTE_ISA
627
  {
628
    static CGEN_BITSET *permanent_isa;
629
630
    if (!permanent_isa)
631
      permanent_isa = cgen_bitset_create (MAX_ISAS);
632
    isa = permanent_isa;
633
    cgen_bitset_clear (isa);
634
    cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
635
  }
636
#else
637
75.9k
  isa = info->private_data;
638
75.9k
#endif
639
640
  /* If we've switched cpu's, try to find a handle we've used before */
641
75.9k
  if (cd
642
75.9k
      && (cgen_bitset_compare (isa, prev_isa) != 0
643
75.9k
    || mach != prev_mach
644
75.9k
    || endian != prev_endian))
645
70.3k
    {
646
70.3k
      cd = 0;
647
210k
      for (cl = cd_list; cl; cl = cl->next)
648
210k
  {
649
210k
    if (cgen_bitset_compare (cl->isa, isa) == 0 &&
650
210k
        cl->mach == mach &&
651
210k
        cl->endian == endian)
652
70.3k
      {
653
70.3k
        cd = cl->cd;
654
70.3k
        prev_isa = cd->isas;
655
70.3k
        break;
656
70.3k
      }
657
210k
  }
658
70.3k
    }
659
660
  /* If we haven't initialized yet, initialize the opcode table.  */
661
75.9k
  if (! cd)
662
3
    {
663
3
      const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
664
3
      const char *mach_name;
665
666
3
      if (!arch_type)
667
0
  abort ();
668
3
      mach_name = arch_type->printable_name;
669
670
3
      prev_isa = cgen_bitset_copy (isa);
671
3
      prev_mach = mach;
672
3
      prev_endian = endian;
673
3
      prev_insn_endian = insn_endian;
674
3
      cd = epiphany_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
675
3
         CGEN_CPU_OPEN_BFDMACH, mach_name,
676
3
         CGEN_CPU_OPEN_ENDIAN, prev_endian,
677
3
                                 CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
678
3
         CGEN_CPU_OPEN_END);
679
3
      if (!cd)
680
0
  abort ();
681
682
      /* Save this away for future reference.  */
683
3
      cl = xmalloc (sizeof (struct cpu_desc_list));
684
3
      cl->cd = cd;
685
3
      cl->isa = prev_isa;
686
3
      cl->mach = mach;
687
3
      cl->endian = endian;
688
3
      cl->next = cd_list;
689
3
      cd_list = cl;
690
691
3
      epiphany_cgen_init_dis (cd);
692
3
    }
693
694
  /* We try to have as much common code as possible.
695
     But at this point some targets need to take over.  */
696
  /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
697
     but if not possible try to move this hook elsewhere rather than
698
     have two hooks.  */
699
75.9k
  length = CGEN_PRINT_INSN (cd, pc, info);
700
75.9k
  if (length > 0)
701
58.5k
    return length;
702
17.3k
  if (length < 0)
703
45
    return -1;
704
705
17.3k
  (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
706
17.3k
  return cd->default_insn_bitsize / 8;
707
17.3k
}