Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/iq2000-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
2
/* Disassembler interface for targets using CGEN. -*- C -*-
3
   CGEN: Cpu tools GENerator
4
5
   THIS FILE IS MACHINE GENERATED WITH CGEN.
6
   - the resultant file is machine generated, cgen-dis.in isn't
7
8
   Copyright (C) 1996-2024 Free Software Foundation, Inc.
9
10
   This file is part of libopcodes.
11
12
   This library is free software; you can redistribute it and/or modify
13
   it under the terms of the GNU General Public License as published by
14
   the Free Software Foundation; either version 3, or (at your option)
15
   any later version.
16
17
   It is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
20
   License for more details.
21
22
   You should have received a copy of the GNU General Public License
23
   along with this program; if not, write to the Free Software Foundation, Inc.,
24
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
25
26
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27
   Keep that in mind.  */
28
29
#include "sysdep.h"
30
#include <stdio.h>
31
#include "ansidecl.h"
32
#include "disassemble.h"
33
#include "bfd.h"
34
#include "symcat.h"
35
#include "libiberty.h"
36
#include "iq2000-desc.h"
37
#include "iq2000-opc.h"
38
#include "opintl.h"
39
40
/* Default text to print if an instruction isn't recognized.  */
41
17.5k
#define UNKNOWN_INSN_MSG _("*unknown*")
42
43
static void print_normal
44
  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45
static void print_address
46
  (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47
static void print_keyword
48
  (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49
static void print_insn_normal
50
  (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51
static int print_insn
52
  (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
53
static int default_print_insn
54
  (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55
static int read_insn
56
  (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
57
   unsigned long *);
58

59
/* -- disassembler routines inserted here.  */
60
61
62
void iq2000_cgen_print_operand
63
  (CGEN_CPU_DESC, int, void *, CGEN_FIELDS *, void const *, bfd_vma, int);
64
65
/* Main entry point for printing operands.
66
   XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
67
   of dis-asm.h on cgen.h.
68
69
   This function is basically just a big switch statement.  Earlier versions
70
   used tables to look up the function to use, but
71
   - if the table contains both assembler and disassembler functions then
72
     the disassembler contains much of the assembler and vice-versa,
73
   - there's a lot of inlining possibilities as things grow,
74
   - using a switch statement avoids the function call overhead.
75
76
   This function could be moved into `print_insn_normal', but keeping it
77
   separate makes clear the interface between `print_insn_normal' and each of
78
   the handlers.  */
79
80
void
81
iq2000_cgen_print_operand (CGEN_CPU_DESC cd,
82
         int opindex,
83
         void * xinfo,
84
         CGEN_FIELDS *fields,
85
         void const *attrs ATTRIBUTE_UNUSED,
86
         bfd_vma pc,
87
         int length)
88
15.9k
{
89
15.9k
  disassemble_info *info = (disassemble_info *) xinfo;
90
91
15.9k
  switch (opindex)
92
15.9k
    {
93
101
    case IQ2000_OPERAND__INDEX :
94
101
      print_normal (cd, info, fields->f_index, 0, pc, length);
95
101
      break;
96
643
    case IQ2000_OPERAND_BASE :
97
643
      print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rs, 0);
98
643
      break;
99
0
    case IQ2000_OPERAND_BASEOFF :
100
0
      print_address (cd, info, fields->f_imm, 0, pc, length);
101
0
      break;
102
200
    case IQ2000_OPERAND_BITNUM :
103
200
      print_normal (cd, info, fields->f_rt, 0, pc, length);
104
200
      break;
105
9
    case IQ2000_OPERAND_BYTECOUNT :
106
9
      print_normal (cd, info, fields->f_bytecount, 0, pc, length);
107
9
      break;
108
0
    case IQ2000_OPERAND_CAM_Y :
109
0
      print_normal (cd, info, fields->f_cam_y, 0, pc, length);
110
0
      break;
111
0
    case IQ2000_OPERAND_CAM_Z :
112
0
      print_normal (cd, info, fields->f_cam_z, 0, pc, length);
113
0
      break;
114
0
    case IQ2000_OPERAND_CM_3FUNC :
115
0
      print_normal (cd, info, fields->f_cm_3func, 0, pc, length);
116
0
      break;
117
0
    case IQ2000_OPERAND_CM_3Z :
118
0
      print_normal (cd, info, fields->f_cm_3z, 0, pc, length);
119
0
      break;
120
0
    case IQ2000_OPERAND_CM_4FUNC :
121
0
      print_normal (cd, info, fields->f_cm_4func, 0, pc, length);
122
0
      break;
123
0
    case IQ2000_OPERAND_CM_4Z :
124
0
      print_normal (cd, info, fields->f_cm_4z, 0, pc, length);
125
0
      break;
126
101
    case IQ2000_OPERAND_COUNT :
127
101
      print_normal (cd, info, fields->f_count, 0, pc, length);
128
101
      break;
129
0
    case IQ2000_OPERAND_EXECODE :
130
0
      print_normal (cd, info, fields->f_excode, 0, pc, length);
131
0
      break;
132
796
    case IQ2000_OPERAND_HI16 :
133
796
      print_normal (cd, info, fields->f_imm, 0, pc, length);
134
796
      break;
135
335
    case IQ2000_OPERAND_IMM :
136
335
      print_normal (cd, info, fields->f_imm, 0, pc, length);
137
335
      break;
138
28
    case IQ2000_OPERAND_JMPTARG :
139
28
      print_address (cd, info, fields->f_jtarg, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
140
28
      break;
141
0
    case IQ2000_OPERAND_JMPTARGQ10 :
142
0
      print_address (cd, info, fields->f_jtargq10, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
143
0
      break;
144
1.99k
    case IQ2000_OPERAND_LO16 :
145
1.99k
      print_normal (cd, info, fields->f_imm, 0, pc, length);
146
1.99k
      break;
147
16
    case IQ2000_OPERAND_MASK :
148
16
      print_normal (cd, info, fields->f_mask, 0, pc, length);
149
16
      break;
150
24
    case IQ2000_OPERAND_MASKL :
151
24
      print_normal (cd, info, fields->f_maskl, 0, pc, length);
152
24
      break;
153
1
    case IQ2000_OPERAND_MASKQ10 :
154
1
      print_normal (cd, info, fields->f_maskq10, 0, pc, length);
155
1
      break;
156
24
    case IQ2000_OPERAND_MASKR :
157
24
      print_normal (cd, info, fields->f_rs, 0, pc, length);
158
24
      break;
159
0
    case IQ2000_OPERAND_MLO16 :
160
0
      print_normal (cd, info, fields->f_imm, 0, pc, length);
161
0
      break;
162
1.47k
    case IQ2000_OPERAND_OFFSET :
163
1.47k
      print_address (cd, info, fields->f_offset, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
164
1.47k
      break;
165
572
    case IQ2000_OPERAND_RD :
166
572
      print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd, 0);
167
572
      break;
168
0
    case IQ2000_OPERAND_RD_RS :
169
0
      print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd_rs, 0|(1<<CGEN_OPERAND_VIRTUAL));
170
0
      break;
171
0
    case IQ2000_OPERAND_RD_RT :
172
0
      print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd_rt, 0|(1<<CGEN_OPERAND_VIRTUAL));
173
0
      break;
174
4.24k
    case IQ2000_OPERAND_RS :
175
4.24k
      print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rs, 0);
176
4.24k
      break;
177
4.96k
    case IQ2000_OPERAND_RT :
178
4.96k
      print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rt, 0);
179
4.96k
      break;
180
0
    case IQ2000_OPERAND_RT_RS :
181
0
      print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rt_rs, 0|(1<<CGEN_OPERAND_VIRTUAL));
182
0
      break;
183
462
    case IQ2000_OPERAND_SHAMT :
184
462
      print_normal (cd, info, fields->f_shamt, 0, pc, length);
185
462
      break;
186
187
0
    default :
188
      /* xgettext:c-format */
189
0
      opcodes_error_handler
190
0
  (_("internal error: unrecognized field %d while printing insn"),
191
0
   opindex);
192
0
      abort ();
193
15.9k
  }
194
15.9k
}
195
196
cgen_print_fn * const iq2000_cgen_print_handlers[] =
197
{
198
  print_insn_normal,
199
};
200
201
202
void
203
iq2000_cgen_init_dis (CGEN_CPU_DESC cd)
204
3
{
205
3
  iq2000_cgen_init_opcode_table (cd);
206
3
  iq2000_cgen_init_ibld_table (cd);
207
3
  cd->print_handlers = & iq2000_cgen_print_handlers[0];
208
3
  cd->print_operand = iq2000_cgen_print_operand;
209
3
}
210
211

212
/* Default print handler.  */
213
214
static void
215
print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
216
        void *dis_info,
217
        long value,
218
        unsigned int attrs,
219
        bfd_vma pc ATTRIBUTE_UNUSED,
220
        int length ATTRIBUTE_UNUSED)
221
4.06k
{
222
4.06k
  disassemble_info *info = (disassemble_info *) dis_info;
223
224
  /* Print the operand as directed by the attributes.  */
225
4.06k
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
226
0
    ; /* nothing to do */
227
4.06k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
228
0
    (*info->fprintf_func) (info->stream, "%ld", value);
229
4.06k
  else
230
4.06k
    (*info->fprintf_func) (info->stream, "0x%lx", value);
231
4.06k
}
232
233
/* Default address handler.  */
234
235
static void
236
print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
237
         void *dis_info,
238
         bfd_vma value,
239
         unsigned int attrs,
240
         bfd_vma pc ATTRIBUTE_UNUSED,
241
         int length ATTRIBUTE_UNUSED)
242
1.50k
{
243
1.50k
  disassemble_info *info = (disassemble_info *) dis_info;
244
245
  /* Print the operand as directed by the attributes.  */
246
1.50k
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
247
0
    ; /* Nothing to do.  */
248
1.50k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
249
1.47k
    (*info->print_address_func) (value, info);
250
28
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
251
28
    (*info->print_address_func) (value, info);
252
0
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
253
0
    (*info->fprintf_func) (info->stream, "%ld", (long) value);
254
0
  else
255
0
    (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
256
1.50k
}
257
258
/* Keyword print handler.  */
259
260
static void
261
print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
262
         void *dis_info,
263
         CGEN_KEYWORD *keyword_table,
264
         long value,
265
         unsigned int attrs ATTRIBUTE_UNUSED)
266
10.4k
{
267
10.4k
  disassemble_info *info = (disassemble_info *) dis_info;
268
10.4k
  const CGEN_KEYWORD_ENTRY *ke;
269
270
10.4k
  ke = cgen_keyword_lookup_value (keyword_table, value);
271
10.4k
  if (ke != NULL)
272
10.4k
    (*info->fprintf_func) (info->stream, "%s", ke->name);
273
0
  else
274
0
    (*info->fprintf_func) (info->stream, "???");
275
10.4k
}
276

277
/* Default insn printer.
278
279
   DIS_INFO is defined as `void *' so the disassembler needn't know anything
280
   about disassemble_info.  */
281
282
static void
283
print_insn_normal (CGEN_CPU_DESC cd,
284
       void *dis_info,
285
       const CGEN_INSN *insn,
286
       CGEN_FIELDS *fields,
287
       bfd_vma pc,
288
       int length)
289
7.37k
{
290
7.37k
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
291
7.37k
  disassemble_info *info = (disassemble_info *) dis_info;
292
7.37k
  const CGEN_SYNTAX_CHAR_TYPE *syn;
293
294
7.37k
  CGEN_INIT_PRINT (cd);
295
296
47.5k
  for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
297
40.2k
    {
298
40.2k
      if (CGEN_SYNTAX_MNEMONIC_P (*syn))
299
7.37k
  {
300
7.37k
    (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
301
7.37k
    continue;
302
7.37k
  }
303
32.8k
      if (CGEN_SYNTAX_CHAR_P (*syn))
304
16.8k
  {
305
16.8k
    (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
306
16.8k
    continue;
307
16.8k
  }
308
309
      /* We have an operand.  */
310
15.9k
      iq2000_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
311
15.9k
         fields, CGEN_INSN_ATTRS (insn), pc, length);
312
15.9k
    }
313
7.37k
}
314

315
/* Subroutine of print_insn. Reads an insn into the given buffers and updates
316
   the extract info.
317
   Returns 0 if all is well, non-zero otherwise.  */
318
319
static int
320
read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
321
     bfd_vma pc,
322
     disassemble_info *info,
323
     bfd_byte *buf,
324
     int buflen,
325
     CGEN_EXTRACT_INFO *ex_info,
326
     unsigned long *insn_value)
327
0
{
328
0
  int status = (*info->read_memory_func) (pc, buf, buflen, info);
329
330
0
  if (status != 0)
331
0
    {
332
0
      (*info->memory_error_func) (status, pc, info);
333
0
      return -1;
334
0
    }
335
336
0
  ex_info->dis_info = info;
337
0
  ex_info->valid = (1 << buflen) - 1;
338
0
  ex_info->insn_bytes = buf;
339
340
0
  *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
341
0
  return 0;
342
0
}
343
344
/* Utility to print an insn.
345
   BUF is the base part of the insn, target byte order, BUFLEN bytes long.
346
   The result is the size of the insn in bytes or zero for an unknown insn
347
   or -1 if an error occurs fetching data (memory_error_func will have
348
   been called).  */
349
350
static int
351
print_insn (CGEN_CPU_DESC cd,
352
      bfd_vma pc,
353
      disassemble_info *info,
354
      bfd_byte *buf,
355
      unsigned int buflen)
356
24.9k
{
357
24.9k
  CGEN_INSN_INT insn_value;
358
24.9k
  const CGEN_INSN_LIST *insn_list;
359
24.9k
  CGEN_EXTRACT_INFO ex_info;
360
24.9k
  int basesize;
361
362
  /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
363
24.9k
  basesize = cd->base_insn_bitsize < buflen * 8 ?
364
24.9k
                                     cd->base_insn_bitsize : buflen * 8;
365
24.9k
  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
366
367
368
  /* Fill in ex_info fields like read_insn would.  Don't actually call
369
     read_insn, since the incoming buffer is already read (and possibly
370
     modified a la m32r).  */
371
24.9k
  ex_info.valid = (1 << buflen) - 1;
372
24.9k
  ex_info.dis_info = info;
373
24.9k
  ex_info.insn_bytes = buf;
374
375
  /* The instructions are stored in hash lists.
376
     Pick the first one and keep trying until we find the right one.  */
377
378
24.9k
  insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
379
1.69M
  while (insn_list != NULL)
380
1.67M
    {
381
1.67M
      const CGEN_INSN *insn = insn_list->insn;
382
1.67M
      CGEN_FIELDS fields;
383
1.67M
      int length;
384
1.67M
      unsigned long insn_value_cropped;
385
386
1.67M
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
387
      /* Not needed as insn shouldn't be in hash lists if not supported.  */
388
      /* Supported by this cpu?  */
389
1.67M
      if (! iq2000_cgen_insn_supported (cd, insn))
390
615k
        {
391
615k
          insn_list = CGEN_DIS_NEXT_INSN (insn_list);
392
615k
    continue;
393
615k
        }
394
1.06M
#endif
395
396
      /* Basic bit mask must be correct.  */
397
      /* ??? May wish to allow target to defer this check until the extract
398
   handler.  */
399
400
      /* Base size may exceed this instruction's size.  Extract the
401
         relevant part from the buffer. */
402
1.06M
      if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
403
1.06M
    (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
404
0
  insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
405
0
             info->endian == BFD_ENDIAN_BIG);
406
1.06M
      else
407
1.06M
  insn_value_cropped = insn_value;
408
409
1.06M
      if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
410
1.06M
    == CGEN_INSN_BASE_VALUE (insn))
411
7.37k
  {
412
    /* Printing is handled in two passes.  The first pass parses the
413
       machine insn and extracts the fields.  The second pass prints
414
       them.  */
415
416
    /* Make sure the entire insn is loaded into insn_value, if it
417
       can fit.  */
418
7.37k
    if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
419
7.37k
        (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
420
0
      {
421
0
        unsigned long full_insn_value;
422
0
        int rc = read_insn (cd, pc, info, buf,
423
0
          CGEN_INSN_BITSIZE (insn) / 8,
424
0
          & ex_info, & full_insn_value);
425
0
        if (rc != 0)
426
0
    return rc;
427
0
        length = CGEN_EXTRACT_FN (cd, insn)
428
0
    (cd, insn, &ex_info, full_insn_value, &fields, pc);
429
0
      }
430
7.37k
    else
431
7.37k
      length = CGEN_EXTRACT_FN (cd, insn)
432
7.37k
        (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
433
434
    /* Length < 0 -> error.  */
435
7.37k
    if (length < 0)
436
0
      return length;
437
7.37k
    if (length > 0)
438
7.37k
      {
439
7.37k
        CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
440
        /* Length is in bits, result is in bytes.  */
441
7.37k
        return length / 8;
442
7.37k
      }
443
7.37k
  }
444
445
1.05M
      insn_list = CGEN_DIS_NEXT_INSN (insn_list);
446
1.05M
    }
447
448
17.5k
  return 0;
449
24.9k
}
450
451
/* Default value for CGEN_PRINT_INSN.
452
   The result is the size of the insn in bytes or zero for an unknown insn
453
   or -1 if an error occured fetching bytes.  */
454
455
#ifndef CGEN_PRINT_INSN
456
25.0k
#define CGEN_PRINT_INSN default_print_insn
457
#endif
458
459
static int
460
default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
461
25.0k
{
462
25.0k
  bfd_byte buf[CGEN_MAX_INSN_SIZE];
463
25.0k
  int buflen;
464
25.0k
  int status;
465
466
  /* Attempt to read the base part of the insn.  */
467
25.0k
  buflen = cd->base_insn_bitsize / 8;
468
25.0k
  status = (*info->read_memory_func) (pc, buf, buflen, info);
469
470
  /* Try again with the minimum part, if min < base.  */
471
25.0k
  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
472
0
    {
473
0
      buflen = cd->min_insn_bitsize / 8;
474
0
      status = (*info->read_memory_func) (pc, buf, buflen, info);
475
0
    }
476
477
25.0k
  if (status != 0)
478
50
    {
479
50
      (*info->memory_error_func) (status, pc, info);
480
50
      return -1;
481
50
    }
482
483
24.9k
  return print_insn (cd, pc, info, buf, buflen);
484
25.0k
}
485
486
/* Main entry point.
487
   Print one instruction from PC on INFO->STREAM.
488
   Return the size of the instruction (in bytes).  */
489
490
typedef struct cpu_desc_list
491
{
492
  struct cpu_desc_list *next;
493
  CGEN_BITSET *isa;
494
  int mach;
495
  int endian;
496
  int insn_endian;
497
  CGEN_CPU_DESC cd;
498
} cpu_desc_list;
499
500
int
501
print_insn_iq2000 (bfd_vma pc, disassemble_info *info)
502
25.0k
{
503
25.0k
  static cpu_desc_list *cd_list = 0;
504
25.0k
  cpu_desc_list *cl = 0;
505
25.0k
  static CGEN_CPU_DESC cd = 0;
506
25.0k
  static CGEN_BITSET *prev_isa;
507
25.0k
  static int prev_mach;
508
25.0k
  static int prev_endian;
509
25.0k
  static int prev_insn_endian;
510
25.0k
  int length;
511
25.0k
  CGEN_BITSET *isa;
512
25.0k
  int mach;
513
25.0k
  int endian = (info->endian == BFD_ENDIAN_BIG
514
25.0k
    ? CGEN_ENDIAN_BIG
515
25.0k
    : CGEN_ENDIAN_LITTLE);
516
25.0k
  int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
517
25.0k
                     ? CGEN_ENDIAN_BIG
518
25.0k
                     : CGEN_ENDIAN_LITTLE);
519
25.0k
  enum bfd_architecture arch;
520
521
  /* ??? gdb will set mach but leave the architecture as "unknown" */
522
25.0k
#ifndef CGEN_BFD_ARCH
523
25.0k
#define CGEN_BFD_ARCH bfd_arch_iq2000
524
25.0k
#endif
525
25.0k
  arch = info->arch;
526
25.0k
  if (arch == bfd_arch_unknown)
527
0
    arch = CGEN_BFD_ARCH;
528
529
  /* There's no standard way to compute the machine or isa number
530
     so we leave it to the target.  */
531
#ifdef CGEN_COMPUTE_MACH
532
  mach = CGEN_COMPUTE_MACH (info);
533
#else
534
25.0k
  mach = info->mach;
535
25.0k
#endif
536
537
#ifdef CGEN_COMPUTE_ISA
538
  {
539
    static CGEN_BITSET *permanent_isa;
540
541
    if (!permanent_isa)
542
      permanent_isa = cgen_bitset_create (MAX_ISAS);
543
    isa = permanent_isa;
544
    cgen_bitset_clear (isa);
545
    cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
546
  }
547
#else
548
25.0k
  isa = info->private_data;
549
25.0k
#endif
550
551
  /* If we've switched cpu's, try to find a handle we've used before */
552
25.0k
  if (cd
553
25.0k
      && (cgen_bitset_compare (isa, prev_isa) != 0
554
25.0k
    || mach != prev_mach
555
25.0k
    || endian != prev_endian))
556
18.6k
    {
557
18.6k
      cd = 0;
558
52.2k
      for (cl = cd_list; cl; cl = cl->next)
559
52.2k
  {
560
52.2k
    if (cgen_bitset_compare (cl->isa, isa) == 0 &&
561
52.2k
        cl->mach == mach &&
562
52.2k
        cl->endian == endian)
563
18.6k
      {
564
18.6k
        cd = cl->cd;
565
18.6k
        prev_isa = cd->isas;
566
18.6k
        break;
567
18.6k
      }
568
52.2k
  }
569
18.6k
    }
570
571
  /* If we haven't initialized yet, initialize the opcode table.  */
572
25.0k
  if (! cd)
573
3
    {
574
3
      const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
575
3
      const char *mach_name;
576
577
3
      if (!arch_type)
578
0
  abort ();
579
3
      mach_name = arch_type->printable_name;
580
581
3
      prev_isa = cgen_bitset_copy (isa);
582
3
      prev_mach = mach;
583
3
      prev_endian = endian;
584
3
      prev_insn_endian = insn_endian;
585
3
      cd = iq2000_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
586
3
         CGEN_CPU_OPEN_BFDMACH, mach_name,
587
3
         CGEN_CPU_OPEN_ENDIAN, prev_endian,
588
3
                                 CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
589
3
         CGEN_CPU_OPEN_END);
590
3
      if (!cd)
591
0
  abort ();
592
593
      /* Save this away for future reference.  */
594
3
      cl = xmalloc (sizeof (struct cpu_desc_list));
595
3
      cl->cd = cd;
596
3
      cl->isa = prev_isa;
597
3
      cl->mach = mach;
598
3
      cl->endian = endian;
599
3
      cl->next = cd_list;
600
3
      cd_list = cl;
601
602
3
      iq2000_cgen_init_dis (cd);
603
3
    }
604
605
  /* We try to have as much common code as possible.
606
     But at this point some targets need to take over.  */
607
  /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
608
     but if not possible try to move this hook elsewhere rather than
609
     have two hooks.  */
610
25.0k
  length = CGEN_PRINT_INSN (cd, pc, info);
611
25.0k
  if (length > 0)
612
7.37k
    return length;
613
17.6k
  if (length < 0)
614
50
    return -1;
615
616
17.5k
  (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
617
17.5k
  return cd->default_insn_bitsize / 8;
618
17.6k
}