Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/m32c-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
2
/* Disassembler interface for targets using CGEN. -*- C -*-
3
   CGEN: Cpu tools GENerator
4
5
   THIS FILE IS MACHINE GENERATED WITH CGEN.
6
   - the resultant file is machine generated, cgen-dis.in isn't
7
8
   Copyright (C) 1996-2024 Free Software Foundation, Inc.
9
10
   This file is part of libopcodes.
11
12
   This library is free software; you can redistribute it and/or modify
13
   it under the terms of the GNU General Public License as published by
14
   the Free Software Foundation; either version 3, or (at your option)
15
   any later version.
16
17
   It is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
20
   License for more details.
21
22
   You should have received a copy of the GNU General Public License
23
   along with this program; if not, write to the Free Software Foundation, Inc.,
24
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
25
26
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27
   Keep that in mind.  */
28
29
#include "sysdep.h"
30
#include <stdio.h>
31
#include "ansidecl.h"
32
#include "disassemble.h"
33
#include "bfd.h"
34
#include "symcat.h"
35
#include "libiberty.h"
36
#include "m32c-desc.h"
37
#include "m32c-opc.h"
38
#include "opintl.h"
39
40
/* Default text to print if an instruction isn't recognized.  */
41
16.9k
#define UNKNOWN_INSN_MSG _("*unknown*")
42
43
static void print_normal
44
  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45
static void print_address
46
  (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47
static void print_keyword
48
  (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49
static void print_insn_normal
50
  (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51
static int print_insn
52
  (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
53
static int default_print_insn
54
  (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55
static int read_insn
56
  (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
57
   unsigned long *);
58

59
/* -- disassembler routines inserted here.  */
60
61
/* -- dis.c */
62
63
#include "elf/m32c.h"
64
#include "elf-bfd.h"
65
66
/* Always print the short insn format suffix as ':<char>'.  */
67
68
static void
69
print_suffix (void * dis_info, char suffix)
70
74.7k
{
71
74.7k
  disassemble_info *info = dis_info;
72
73
74.7k
  (*info->fprintf_func) (info->stream, ":%c", suffix);
74
74.7k
}
75
76
static void
77
print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
78
   void * dis_info,
79
   long value ATTRIBUTE_UNUSED,
80
   unsigned int attrs ATTRIBUTE_UNUSED,
81
   bfd_vma pc ATTRIBUTE_UNUSED,
82
   int length ATTRIBUTE_UNUSED)
83
46.3k
{
84
46.3k
  print_suffix (dis_info, 's');
85
46.3k
}
86
87
88
static void
89
print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
90
   void * dis_info,
91
   long value ATTRIBUTE_UNUSED,
92
   unsigned int attrs ATTRIBUTE_UNUSED,
93
   bfd_vma pc ATTRIBUTE_UNUSED,
94
   int length ATTRIBUTE_UNUSED)
95
14.1k
{
96
14.1k
  print_suffix (dis_info, 'g');
97
14.1k
}
98
99
static void
100
print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
101
   void * dis_info,
102
   long value ATTRIBUTE_UNUSED,
103
   unsigned int attrs ATTRIBUTE_UNUSED,
104
   bfd_vma pc ATTRIBUTE_UNUSED,
105
   int length ATTRIBUTE_UNUSED)
106
10.4k
{
107
10.4k
  print_suffix (dis_info, 'q');
108
10.4k
}
109
110
static void
111
print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
112
   void * dis_info,
113
   long value ATTRIBUTE_UNUSED,
114
   unsigned int attrs ATTRIBUTE_UNUSED,
115
   bfd_vma pc ATTRIBUTE_UNUSED,
116
   int length ATTRIBUTE_UNUSED)
117
3.89k
{
118
3.89k
  print_suffix (dis_info, 'z');
119
3.89k
}
120
121
/* Print the empty suffix.  */
122
123
static void
124
print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
125
   void * dis_info ATTRIBUTE_UNUSED,
126
   long value ATTRIBUTE_UNUSED,
127
   unsigned int attrs ATTRIBUTE_UNUSED,
128
   bfd_vma pc ATTRIBUTE_UNUSED,
129
   int length ATTRIBUTE_UNUSED)
130
4.23k
{
131
4.23k
  return;
132
4.23k
}
133
134
static void
135
print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
136
         void * dis_info,
137
         long value,
138
         unsigned int attrs ATTRIBUTE_UNUSED,
139
         bfd_vma pc ATTRIBUTE_UNUSED,
140
         int length ATTRIBUTE_UNUSED)
141
2.07k
{
142
2.07k
  disassemble_info *info = dis_info;
143
144
2.07k
  if (value == 0)
145
878
    (*info->fprintf_func) (info->stream, "r0h,r0l");
146
1.19k
  else
147
1.19k
    (*info->fprintf_func) (info->stream, "r0l,r0h");
148
2.07k
}
149
150
static void
151
print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
152
      void * dis_info,
153
      unsigned long value,
154
      unsigned int attrs ATTRIBUTE_UNUSED,
155
      bfd_vma pc ATTRIBUTE_UNUSED,
156
      int length ATTRIBUTE_UNUSED)
157
3.25k
{
158
3.25k
  disassemble_info *info = dis_info;
159
160
3.25k
  (*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
161
3.25k
}
162
163
static void
164
print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
165
          void * dis_info,
166
          signed long value,
167
          unsigned int attrs ATTRIBUTE_UNUSED,
168
          bfd_vma pc ATTRIBUTE_UNUSED,
169
          int length ATTRIBUTE_UNUSED)
170
194
{
171
194
  disassemble_info *info = dis_info;
172
173
194
  (*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
174
194
}
175
176
static void
177
print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
178
      void * dis_info,
179
      long value ATTRIBUTE_UNUSED,
180
      unsigned int attrs ATTRIBUTE_UNUSED,
181
      bfd_vma pc ATTRIBUTE_UNUSED,
182
      int length ATTRIBUTE_UNUSED)
183
0
{
184
  /* Always print the size as '.w'.  */
185
0
  disassemble_info *info = dis_info;
186
187
0
  (*info->fprintf_func) (info->stream, ".w");
188
0
}
189
190
228
#define POP  0
191
945
#define PUSH 1
192
193
static void print_pop_regset  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
194
static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
195
196
/* Print a set of registers, R0,R1,A0,A1,SB,FB.  */
197
198
static void
199
print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
200
        void * dis_info,
201
        long value,
202
        unsigned int attrs ATTRIBUTE_UNUSED,
203
        bfd_vma pc ATTRIBUTE_UNUSED,
204
        int length ATTRIBUTE_UNUSED,
205
        int push)
206
1.17k
{
207
1.17k
  static char * m16c_register_names [] =
208
1.17k
  {
209
1.17k
    "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
210
1.17k
  };
211
1.17k
  disassemble_info *info = dis_info;
212
1.17k
  int mask;
213
1.17k
  int reg_index = 0;
214
1.17k
  char* comma = "";
215
216
1.17k
  if (push)
217
945
    mask = 0x80;
218
228
  else
219
228
    mask = 1;
220
221
1.17k
  if (value & mask)
222
790
    {
223
790
      (*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
224
790
      comma = ",";
225
790
    }
226
227
9.38k
  for (reg_index = 1; reg_index <= 7; ++reg_index)
228
8.21k
    {
229
8.21k
      if (push)
230
6.61k
        mask >>= 1;
231
1.59k
      else
232
1.59k
        mask <<= 1;
233
234
8.21k
      if (value & mask)
235
4.36k
        {
236
4.36k
          (*info->fprintf_func) (info->stream, "%s%s", comma,
237
4.36k
         m16c_register_names [reg_index]);
238
4.36k
          comma = ",";
239
4.36k
        }
240
8.21k
    }
241
1.17k
}
242
243
static void
244
print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
245
      void * dis_info,
246
      long value,
247
      unsigned int attrs ATTRIBUTE_UNUSED,
248
      bfd_vma pc ATTRIBUTE_UNUSED,
249
      int length ATTRIBUTE_UNUSED)
250
228
{
251
228
  print_regset (cd, dis_info, value, attrs, pc, length, POP);
252
228
}
253
254
static void
255
print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
256
       void * dis_info,
257
       long value,
258
       unsigned int attrs ATTRIBUTE_UNUSED,
259
       bfd_vma pc ATTRIBUTE_UNUSED,
260
       int length ATTRIBUTE_UNUSED)
261
945
{
262
945
  print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
263
945
}
264
265
static void
266
print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
267
    void * dis_info,
268
    signed long value,
269
    unsigned int attrs ATTRIBUTE_UNUSED,
270
    bfd_vma pc ATTRIBUTE_UNUSED,
271
    int length ATTRIBUTE_UNUSED)
272
806
{
273
806
  disassemble_info *info = dis_info;
274
275
806
  (*info->fprintf_func) (info->stream, "%ld", -value);
276
806
}
277
278
void m32c_cgen_print_operand
279
  (CGEN_CPU_DESC, int, void *, CGEN_FIELDS *, void const *, bfd_vma, int);
280
281
/* Main entry point for printing operands.
282
   XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
283
   of dis-asm.h on cgen.h.
284
285
   This function is basically just a big switch statement.  Earlier versions
286
   used tables to look up the function to use, but
287
   - if the table contains both assembler and disassembler functions then
288
     the disassembler contains much of the assembler and vice-versa,
289
   - there's a lot of inlining possibilities as things grow,
290
   - using a switch statement avoids the function call overhead.
291
292
   This function could be moved into `print_insn_normal', but keeping it
293
   separate makes clear the interface between `print_insn_normal' and each of
294
   the handlers.  */
295
296
void
297
m32c_cgen_print_operand (CGEN_CPU_DESC cd,
298
         int opindex,
299
         void * xinfo,
300
         CGEN_FIELDS *fields,
301
         void const *attrs ATTRIBUTE_UNUSED,
302
         bfd_vma pc,
303
         int length)
304
243k
{
305
243k
  disassemble_info *info = (disassemble_info *) xinfo;
306
307
243k
  switch (opindex)
308
243k
    {
309
0
    case M32C_OPERAND_A0 :
310
0
      print_keyword (cd, info, & m32c_cgen_opval_h_a0, 0, 0);
311
0
      break;
312
0
    case M32C_OPERAND_A1 :
313
0
      print_keyword (cd, info, & m32c_cgen_opval_h_a1, 0, 0);
314
0
      break;
315
244
    case M32C_OPERAND_AN16_PUSH_S :
316
244
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_4_1, 0);
317
244
      break;
318
45
    case M32C_OPERAND_BIT16AN :
319
45
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
320
45
      break;
321
55
    case M32C_OPERAND_BIT16RN :
322
55
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
323
55
      break;
324
2.40k
    case M32C_OPERAND_BIT3_S :
325
2.40k
      print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
326
2.40k
      break;
327
159
    case M32C_OPERAND_BIT32ANPREFIXED :
328
159
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
329
159
      break;
330
752
    case M32C_OPERAND_BIT32ANUNPREFIXED :
331
752
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
332
752
      break;
333
18
    case M32C_OPERAND_BIT32RNPREFIXED :
334
18
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
335
18
      break;
336
215
    case M32C_OPERAND_BIT32RNUNPREFIXED :
337
215
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
338
215
      break;
339
17
    case M32C_OPERAND_BITBASE16_16_S8 :
340
17
      print_signed_bitbase (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
341
17
      break;
342
103
    case M32C_OPERAND_BITBASE16_16_U16 :
343
103
      print_unsigned_bitbase (cd, info, fields->f_dsp_16_u16, 0, pc, length);
344
103
      break;
345
8
    case M32C_OPERAND_BITBASE16_16_U8 :
346
8
      print_unsigned_bitbase (cd, info, fields->f_dsp_16_u8, 0, pc, length);
347
8
      break;
348
2.19k
    case M32C_OPERAND_BITBASE16_8_U11_S :
349
2.19k
      print_unsigned_bitbase (cd, info, fields->f_bitbase16_u11_S, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
350
2.19k
      break;
351
98
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
352
98
      print_signed_bitbase (cd, info, fields->f_bitbase32_16_s11_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
353
98
      break;
354
79
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
355
79
      print_signed_bitbase (cd, info, fields->f_bitbase32_16_s19_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
356
79
      break;
357
127
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
358
127
      print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u11_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
359
127
      break;
360
254
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
361
254
      print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u19_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
362
254
      break;
363
388
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
364
388
      print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u27_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
365
388
      break;
366
0
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
367
0
      print_signed_bitbase (cd, info, fields->f_bitbase32_24_s11_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
368
0
      break;
369
0
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
370
0
      print_signed_bitbase (cd, info, fields->f_bitbase32_24_s19_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
371
0
      break;
372
83
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
373
83
      print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u11_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
374
83
      break;
375
16
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
376
16
      print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u19_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
377
16
      break;
378
81
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
379
81
      print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u27_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
380
81
      break;
381
62
    case M32C_OPERAND_BITNO16R :
382
62
      print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
383
62
      break;
384
18
    case M32C_OPERAND_BITNO32PREFIXED :
385
18
      print_normal (cd, info, fields->f_bitno32_prefixed, 0, pc, length);
386
18
      break;
387
456
    case M32C_OPERAND_BITNO32UNPREFIXED :
388
456
      print_normal (cd, info, fields->f_bitno32_unprefixed, 0, pc, length);
389
456
      break;
390
68
    case M32C_OPERAND_DSP_10_U6 :
391
68
      print_normal (cd, info, fields->f_dsp_10_u6, 0, pc, length);
392
68
      break;
393
1.24k
    case M32C_OPERAND_DSP_16_S16 :
394
1.24k
      print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
395
1.24k
      break;
396
2.98k
    case M32C_OPERAND_DSP_16_S8 :
397
2.98k
      print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
398
2.98k
      break;
399
7.22k
    case M32C_OPERAND_DSP_16_U16 :
400
7.22k
      print_normal (cd, info, fields->f_dsp_16_u16, 0, pc, length);
401
7.22k
      break;
402
122
    case M32C_OPERAND_DSP_16_U20 :
403
122
      print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
404
122
      break;
405
2.34k
    case M32C_OPERAND_DSP_16_U24 :
406
2.34k
      print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
407
2.34k
      break;
408
5.23k
    case M32C_OPERAND_DSP_16_U8 :
409
5.23k
      print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
410
5.23k
      break;
411
155
    case M32C_OPERAND_DSP_24_S16 :
412
155
      print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
413
155
      break;
414
113
    case M32C_OPERAND_DSP_24_S8 :
415
113
      print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
416
113
      break;
417
576
    case M32C_OPERAND_DSP_24_U16 :
418
576
      print_normal (cd, info, fields->f_dsp_24_u16, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
419
576
      break;
420
55
    case M32C_OPERAND_DSP_24_U20 :
421
55
      print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
422
55
      break;
423
944
    case M32C_OPERAND_DSP_24_U24 :
424
944
      print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
425
944
      break;
426
820
    case M32C_OPERAND_DSP_24_U8 :
427
820
      print_normal (cd, info, fields->f_dsp_24_u8, 0, pc, length);
428
820
      break;
429
131
    case M32C_OPERAND_DSP_32_S16 :
430
131
      print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
431
131
      break;
432
87
    case M32C_OPERAND_DSP_32_S8 :
433
87
      print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
434
87
      break;
435
527
    case M32C_OPERAND_DSP_32_U16 :
436
527
      print_normal (cd, info, fields->f_dsp_32_u16, 0, pc, length);
437
527
      break;
438
9
    case M32C_OPERAND_DSP_32_U20 :
439
9
      print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
440
9
      break;
441
354
    case M32C_OPERAND_DSP_32_U24 :
442
354
      print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
443
354
      break;
444
1.00k
    case M32C_OPERAND_DSP_32_U8 :
445
1.00k
      print_normal (cd, info, fields->f_dsp_32_u8, 0, pc, length);
446
1.00k
      break;
447
51
    case M32C_OPERAND_DSP_40_S16 :
448
51
      print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
449
51
      break;
450
72
    case M32C_OPERAND_DSP_40_S8 :
451
72
      print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
452
72
      break;
453
107
    case M32C_OPERAND_DSP_40_U16 :
454
107
      print_normal (cd, info, fields->f_dsp_40_u16, 0, pc, length);
455
107
      break;
456
0
    case M32C_OPERAND_DSP_40_U20 :
457
0
      print_normal (cd, info, fields->f_dsp_40_u20, 0, pc, length);
458
0
      break;
459
118
    case M32C_OPERAND_DSP_40_U24 :
460
118
      print_normal (cd, info, fields->f_dsp_40_u24, 0, pc, length);
461
118
      break;
462
413
    case M32C_OPERAND_DSP_40_U8 :
463
413
      print_normal (cd, info, fields->f_dsp_40_u8, 0, pc, length);
464
413
      break;
465
380
    case M32C_OPERAND_DSP_48_S16 :
466
380
      print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
467
380
      break;
468
0
    case M32C_OPERAND_DSP_48_S8 :
469
0
      print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
470
0
      break;
471
13
    case M32C_OPERAND_DSP_48_U16 :
472
13
      print_normal (cd, info, fields->f_dsp_48_u16, 0, pc, length);
473
13
      break;
474
0
    case M32C_OPERAND_DSP_48_U20 :
475
0
      print_normal (cd, info, fields->f_dsp_48_u20, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
476
0
      break;
477
55
    case M32C_OPERAND_DSP_48_U24 :
478
55
      print_normal (cd, info, fields->f_dsp_48_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
479
55
      break;
480
16
    case M32C_OPERAND_DSP_48_U8 :
481
16
      print_normal (cd, info, fields->f_dsp_48_u8, 0, pc, length);
482
16
      break;
483
604
    case M32C_OPERAND_DSP_8_S24 :
484
604
      print_normal (cd, info, fields->f_dsp_8_s24, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
485
604
      break;
486
11.3k
    case M32C_OPERAND_DSP_8_S8 :
487
11.3k
      print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
488
11.3k
      break;
489
10.1k
    case M32C_OPERAND_DSP_8_U16 :
490
10.1k
      print_normal (cd, info, fields->f_dsp_8_u16, 0, pc, length);
491
10.1k
      break;
492
0
    case M32C_OPERAND_DSP_8_U24 :
493
0
      print_normal (cd, info, fields->f_dsp_8_u24, 0, pc, length);
494
0
      break;
495
33
    case M32C_OPERAND_DSP_8_U6 :
496
33
      print_normal (cd, info, fields->f_dsp_8_u6, 0, pc, length);
497
33
      break;
498
11.9k
    case M32C_OPERAND_DSP_8_U8 :
499
11.9k
      print_normal (cd, info, fields->f_dsp_8_u8, 0, pc, length);
500
11.9k
      break;
501
1.46k
    case M32C_OPERAND_DST16AN :
502
1.46k
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
503
1.46k
      break;
504
583
    case M32C_OPERAND_DST16AN_S :
505
583
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an_s, 0);
506
583
      break;
507
370
    case M32C_OPERAND_DST16ANHI :
508
370
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an, 0);
509
370
      break;
510
220
    case M32C_OPERAND_DST16ANQI :
511
220
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_an, 0);
512
220
      break;
513
616
    case M32C_OPERAND_DST16ANQI_S :
514
616
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_rn_QI_s, 0);
515
616
      break;
516
8
    case M32C_OPERAND_DST16ANSI :
517
8
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, fields->f_dst16_an, 0);
518
8
      break;
519
24
    case M32C_OPERAND_DST16RNEXTQI :
520
24
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst16_rn_ext, 0);
521
24
      break;
522
1.26k
    case M32C_OPERAND_DST16RNHI :
523
1.26k
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
524
1.26k
      break;
525
1.11k
    case M32C_OPERAND_DST16RNQI :
526
1.11k
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst16_rn, 0);
527
1.11k
      break;
528
5.56k
    case M32C_OPERAND_DST16RNQI_S :
529
5.56k
      print_keyword (cd, info, & m32c_cgen_opval_h_r0l_r0h, fields->f_dst16_rn_QI_s, 0);
530
5.56k
      break;
531
19
    case M32C_OPERAND_DST16RNSI :
532
19
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst16_rn, 0);
533
19
      break;
534
35
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
535
35
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
536
35
      break;
537
478
    case M32C_OPERAND_DST32ANPREFIXED :
538
478
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
539
478
      break;
540
135
    case M32C_OPERAND_DST32ANPREFIXEDHI :
541
135
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_prefixed, 0);
542
135
      break;
543
351
    case M32C_OPERAND_DST32ANPREFIXEDQI :
544
351
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_prefixed, 0);
545
351
      break;
546
0
    case M32C_OPERAND_DST32ANPREFIXEDSI :
547
0
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
548
0
      break;
549
7.39k
    case M32C_OPERAND_DST32ANUNPREFIXED :
550
7.39k
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
551
7.39k
      break;
552
756
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
553
756
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_unprefixed, 0);
554
756
      break;
555
729
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
556
729
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_unprefixed, 0);
557
729
      break;
558
1.33k
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
559
1.33k
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
560
1.33k
      break;
561
1.74k
    case M32C_OPERAND_DST32R0HI_S :
562
1.74k
      print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
563
1.74k
      break;
564
1.02k
    case M32C_OPERAND_DST32R0QI_S :
565
1.02k
      print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
566
1.02k
      break;
567
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
568
0
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_HI, fields->f_dst32_rn_ext_unprefixed, 0);
569
0
      break;
570
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
571
0
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst32_rn_ext_unprefixed, 0);
572
0
      break;
573
108
    case M32C_OPERAND_DST32RNPREFIXEDHI :
574
108
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_prefixed_HI, 0);
575
108
      break;
576
33
    case M32C_OPERAND_DST32RNPREFIXEDQI :
577
33
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
578
33
      break;
579
1
    case M32C_OPERAND_DST32RNPREFIXEDSI :
580
1
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_prefixed_SI, 0);
581
1
      break;
582
1.38k
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
583
1.38k
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_unprefixed_HI, 0);
584
1.38k
      break;
585
1.31k
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
586
1.31k
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
587
1.31k
      break;
588
1.08k
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
589
1.08k
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_unprefixed_SI, 0);
590
1.08k
      break;
591
14.1k
    case M32C_OPERAND_G :
592
14.1k
      print_G (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
593
14.1k
      break;
594
2.96k
    case M32C_OPERAND_IMM_12_S4 :
595
2.96k
      print_normal (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
596
2.96k
      break;
597
527
    case M32C_OPERAND_IMM_12_S4N :
598
527
      print_signed4n (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
599
527
      break;
600
54
    case M32C_OPERAND_IMM_13_U3 :
601
54
      print_normal (cd, info, fields->f_imm_13_u3, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
602
54
      break;
603
3.21k
    case M32C_OPERAND_IMM_16_HI :
604
3.21k
      print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
605
3.21k
      break;
606
4.71k
    case M32C_OPERAND_IMM_16_QI :
607
4.71k
      print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
608
4.71k
      break;
609
20
    case M32C_OPERAND_IMM_16_SI :
610
20
      print_normal (cd, info, fields->f_dsp_16_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
611
20
      break;
612
0
    case M32C_OPERAND_IMM_20_S4 :
613
0
      print_normal (cd, info, fields->f_imm_20_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
614
0
      break;
615
901
    case M32C_OPERAND_IMM_24_HI :
616
901
      print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
617
901
      break;
618
1.97k
    case M32C_OPERAND_IMM_24_QI :
619
1.97k
      print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
620
1.97k
      break;
621
105
    case M32C_OPERAND_IMM_24_SI :
622
105
      print_normal (cd, info, fields->f_dsp_24_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
623
105
      break;
624
92
    case M32C_OPERAND_IMM_32_HI :
625
92
      print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
626
92
      break;
627
407
    case M32C_OPERAND_IMM_32_QI :
628
407
      print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
629
407
      break;
630
16
    case M32C_OPERAND_IMM_32_SI :
631
16
      print_normal (cd, info, fields->f_dsp_32_s32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
632
16
      break;
633
45
    case M32C_OPERAND_IMM_40_HI :
634
45
      print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
635
45
      break;
636
95
    case M32C_OPERAND_IMM_40_QI :
637
95
      print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
638
95
      break;
639
4
    case M32C_OPERAND_IMM_40_SI :
640
4
      print_normal (cd, info, fields->f_dsp_40_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
641
4
      break;
642
1
    case M32C_OPERAND_IMM_48_HI :
643
1
      print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
644
1
      break;
645
7
    case M32C_OPERAND_IMM_48_QI :
646
7
      print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
647
7
      break;
648
0
    case M32C_OPERAND_IMM_48_SI :
649
0
      print_normal (cd, info, fields->f_dsp_48_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
650
0
      break;
651
18
    case M32C_OPERAND_IMM_56_HI :
652
18
      print_normal (cd, info, fields->f_dsp_56_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
653
18
      break;
654
0
    case M32C_OPERAND_IMM_56_QI :
655
0
      print_normal (cd, info, fields->f_dsp_56_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
656
0
      break;
657
0
    case M32C_OPERAND_IMM_64_HI :
658
0
      print_normal (cd, info, fields->f_dsp_64_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
659
0
      break;
660
3.00k
    case M32C_OPERAND_IMM_8_HI :
661
3.00k
      print_normal (cd, info, fields->f_dsp_8_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
662
3.00k
      break;
663
7.68k
    case M32C_OPERAND_IMM_8_QI :
664
7.68k
      print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
665
7.68k
      break;
666
998
    case M32C_OPERAND_IMM_8_S4 :
667
998
      print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
668
998
      break;
669
279
    case M32C_OPERAND_IMM_8_S4N :
670
279
      print_signed4n (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
671
279
      break;
672
2.83k
    case M32C_OPERAND_IMM_SH_12_S4 :
673
2.83k
      print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_12_s4, 0);
674
2.83k
      break;
675
0
    case M32C_OPERAND_IMM_SH_20_S4 :
676
0
      print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_20_s4, 0);
677
0
      break;
678
562
    case M32C_OPERAND_IMM_SH_8_S4 :
679
562
      print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_8_s4, 0);
680
562
      break;
681
1.13k
    case M32C_OPERAND_IMM1_S :
682
1.13k
      print_normal (cd, info, fields->f_imm1_S, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
683
1.13k
      break;
684
3.07k
    case M32C_OPERAND_IMM3_S :
685
3.07k
      print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
686
3.07k
      break;
687
218
    case M32C_OPERAND_LAB_16_8 :
688
218
      print_address (cd, info, fields->f_lab_16_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
689
218
      break;
690
302
    case M32C_OPERAND_LAB_24_8 :
691
302
      print_address (cd, info, fields->f_lab_24_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
692
302
      break;
693
95
    case M32C_OPERAND_LAB_32_8 :
694
95
      print_address (cd, info, fields->f_lab_32_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
695
95
      break;
696
191
    case M32C_OPERAND_LAB_40_8 :
697
191
      print_address (cd, info, fields->f_lab_40_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
698
191
      break;
699
1.76k
    case M32C_OPERAND_LAB_5_3 :
700
1.76k
      print_address (cd, info, fields->f_lab_5_3, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
701
1.76k
      break;
702
1.76k
    case M32C_OPERAND_LAB_8_16 :
703
1.76k
      print_address (cd, info, fields->f_lab_8_16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
704
1.76k
      break;
705
422
    case M32C_OPERAND_LAB_8_24 :
706
422
      print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
707
422
      break;
708
5.04k
    case M32C_OPERAND_LAB_8_8 :
709
5.04k
      print_address (cd, info, fields->f_lab_8_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
710
5.04k
      break;
711
2.07k
    case M32C_OPERAND_LAB32_JMP_S :
712
2.07k
      print_address (cd, info, fields->f_lab32_jmp_s, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
713
2.07k
      break;
714
10.4k
    case M32C_OPERAND_Q :
715
10.4k
      print_Q (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
716
10.4k
      break;
717
0
    case M32C_OPERAND_R0 :
718
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
719
0
      break;
720
0
    case M32C_OPERAND_R0H :
721
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r0h, 0, 0);
722
0
      break;
723
0
    case M32C_OPERAND_R0L :
724
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
725
0
      break;
726
0
    case M32C_OPERAND_R1 :
727
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r1, 0, 0);
728
0
      break;
729
0
    case M32C_OPERAND_R1R2R0 :
730
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r1r2r0, 0, 0);
731
0
      break;
732
0
    case M32C_OPERAND_R2 :
733
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r2, 0, 0);
734
0
      break;
735
0
    case M32C_OPERAND_R2R0 :
736
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r2r0, 0, 0);
737
0
      break;
738
1
    case M32C_OPERAND_R3 :
739
1
      print_keyword (cd, info, & m32c_cgen_opval_h_r3, 0, 0);
740
1
      break;
741
0
    case M32C_OPERAND_R3R1 :
742
0
      print_keyword (cd, info, & m32c_cgen_opval_h_r3r1, 0, 0);
743
0
      break;
744
228
    case M32C_OPERAND_REGSETPOP :
745
228
      print_pop_regset (cd, info, fields->f_8_8, 0, pc, length);
746
228
      break;
747
945
    case M32C_OPERAND_REGSETPUSH :
748
945
      print_push_regset (cd, info, fields->f_8_8, 0, pc, length);
749
945
      break;
750
586
    case M32C_OPERAND_RN16_PUSH_S :
751
586
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_4_1, 0);
752
586
      break;
753
46.3k
    case M32C_OPERAND_S :
754
46.3k
      print_S (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
755
46.3k
      break;
756
921
    case M32C_OPERAND_SRC16AN :
757
921
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src16_an, 0);
758
921
      break;
759
76
    case M32C_OPERAND_SRC16ANHI :
760
76
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src16_an, 0);
761
76
      break;
762
72
    case M32C_OPERAND_SRC16ANQI :
763
72
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src16_an, 0);
764
72
      break;
765
219
    case M32C_OPERAND_SRC16RNHI :
766
219
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src16_rn, 0);
767
219
      break;
768
414
    case M32C_OPERAND_SRC16RNQI :
769
414
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src16_rn, 0);
770
414
      break;
771
471
    case M32C_OPERAND_SRC32ANPREFIXED :
772
471
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
773
471
      break;
774
231
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
775
231
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_prefixed, 0);
776
231
      break;
777
29
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
778
29
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_prefixed, 0);
779
29
      break;
780
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
781
0
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
782
0
      break;
783
5.12k
    case M32C_OPERAND_SRC32ANUNPREFIXED :
784
5.12k
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
785
5.12k
      break;
786
127
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
787
127
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_unprefixed, 0);
788
127
      break;
789
323
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
790
323
      print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_unprefixed, 0);
791
323
      break;
792
136
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
793
136
      print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
794
136
      break;
795
104
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
796
104
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_prefixed_HI, 0);
797
104
      break;
798
682
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
799
682
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_prefixed_QI, 0);
800
682
      break;
801
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
802
0
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_prefixed_SI, 0);
803
0
      break;
804
320
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
805
320
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_unprefixed_HI, 0);
806
320
      break;
807
1.73k
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
808
1.73k
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_unprefixed_QI, 0);
809
1.73k
      break;
810
425
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
811
425
      print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_unprefixed_SI, 0);
812
425
      break;
813
2.07k
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
814
2.07k
      print_r0l_r0h (cd, info, fields->f_5_1, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
815
2.07k
      break;
816
4.23k
    case M32C_OPERAND_X :
817
4.23k
      print_X (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
818
4.23k
      break;
819
3.89k
    case M32C_OPERAND_Z :
820
3.89k
      print_Z (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
821
3.89k
      break;
822
12
    case M32C_OPERAND_COND16_16 :
823
12
      print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_16_u8, 0);
824
12
      break;
825
29
    case M32C_OPERAND_COND16_24 :
826
29
      print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_24_u8, 0);
827
29
      break;
828
74
    case M32C_OPERAND_COND16_32 :
829
74
      print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_32_u8, 0);
830
74
      break;
831
27
    case M32C_OPERAND_COND16C :
832
27
      print_keyword (cd, info, & m32c_cgen_opval_h_cond16c, fields->f_cond16, 0);
833
27
      break;
834
0
    case M32C_OPERAND_COND16J :
835
0
      print_keyword (cd, info, & m32c_cgen_opval_h_cond16j, fields->f_cond16, 0);
836
0
      break;
837
830
    case M32C_OPERAND_COND16J5 :
838
830
      print_keyword (cd, info, & m32c_cgen_opval_h_cond16j_5, fields->f_cond16j_5, 0);
839
830
      break;
840
2
    case M32C_OPERAND_COND32 :
841
2
      print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32, 0|(1<<CGEN_OPERAND_VIRTUAL));
842
2
      break;
843
164
    case M32C_OPERAND_COND32_16 :
844
164
      print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_16_u8, 0);
845
164
      break;
846
100
    case M32C_OPERAND_COND32_24 :
847
100
      print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_24_u8, 0);
848
100
      break;
849
89
    case M32C_OPERAND_COND32_32 :
850
89
      print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_32_u8, 0);
851
89
      break;
852
51
    case M32C_OPERAND_COND32_40 :
853
51
      print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_40_u8, 0);
854
51
      break;
855
3.82k
    case M32C_OPERAND_COND32J :
856
3.82k
      print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32j, 0|(1<<CGEN_OPERAND_VIRTUAL));
857
3.82k
      break;
858
4
    case M32C_OPERAND_CR1_PREFIXED_32 :
859
4
      print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_21_3, 0);
860
4
      break;
861
109
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
862
109
      print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_13_3, 0);
863
109
      break;
864
55
    case M32C_OPERAND_CR16 :
865
55
      print_keyword (cd, info, & m32c_cgen_opval_h_cr_16, fields->f_9_3, 0);
866
55
      break;
867
498
    case M32C_OPERAND_CR2_32 :
868
498
      print_keyword (cd, info, & m32c_cgen_opval_h_cr2_32, fields->f_13_3, 0);
869
498
      break;
870
1
    case M32C_OPERAND_CR3_PREFIXED_32 :
871
1
      print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_21_3, 0);
872
1
      break;
873
0
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
874
0
      print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_13_3, 0);
875
0
      break;
876
24
    case M32C_OPERAND_FLAGS16 :
877
24
      print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_9_3, 0);
878
24
      break;
879
11
    case M32C_OPERAND_FLAGS32 :
880
11
      print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_13_3, 0);
881
11
      break;
882
136
    case M32C_OPERAND_SCCOND32 :
883
136
      print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond16, 0);
884
136
      break;
885
0
    case M32C_OPERAND_SIZE :
886
0
      print_size (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
887
0
      break;
888
889
0
    default :
890
      /* xgettext:c-format */
891
0
      opcodes_error_handler
892
0
  (_("internal error: unrecognized field %d while printing insn"),
893
0
   opindex);
894
0
      abort ();
895
243k
  }
896
243k
}
897
898
cgen_print_fn * const m32c_cgen_print_handlers[] =
899
{
900
  print_insn_normal,
901
};
902
903
904
void
905
m32c_cgen_init_dis (CGEN_CPU_DESC cd)
906
3
{
907
3
  m32c_cgen_init_opcode_table (cd);
908
3
  m32c_cgen_init_ibld_table (cd);
909
3
  cd->print_handlers = & m32c_cgen_print_handlers[0];
910
3
  cd->print_operand = m32c_cgen_print_operand;
911
3
}
912
913

914
/* Default print handler.  */
915
916
static void
917
print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
918
        void *dis_info,
919
        long value,
920
        unsigned int attrs,
921
        bfd_vma pc ATTRIBUTE_UNUSED,
922
        int length ATTRIBUTE_UNUSED)
923
92.7k
{
924
92.7k
  disassemble_info *info = (disassemble_info *) dis_info;
925
926
  /* Print the operand as directed by the attributes.  */
927
92.7k
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
928
0
    ; /* nothing to do */
929
92.7k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
930
50.0k
    (*info->fprintf_func) (info->stream, "%ld", value);
931
42.7k
  else
932
42.7k
    (*info->fprintf_func) (info->stream, "0x%lx", value);
933
92.7k
}
934
935
/* Default address handler.  */
936
937
static void
938
print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
939
         void *dis_info,
940
         bfd_vma value,
941
         unsigned int attrs,
942
         bfd_vma pc ATTRIBUTE_UNUSED,
943
         int length ATTRIBUTE_UNUSED)
944
11.8k
{
945
11.8k
  disassemble_info *info = (disassemble_info *) dis_info;
946
947
  /* Print the operand as directed by the attributes.  */
948
11.8k
  if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
949
0
    ; /* Nothing to do.  */
950
11.8k
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
951
11.4k
    (*info->print_address_func) (value, info);
952
422
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
953
422
    (*info->print_address_func) (value, info);
954
0
  else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
955
0
    (*info->fprintf_func) (info->stream, "%ld", (long) value);
956
0
  else
957
0
    (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
958
11.8k
}
959
960
/* Keyword print handler.  */
961
962
static void
963
print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
964
         void *dis_info,
965
         CGEN_KEYWORD *keyword_table,
966
         long value,
967
         unsigned int attrs ATTRIBUTE_UNUSED)
968
52.0k
{
969
52.0k
  disassemble_info *info = (disassemble_info *) dis_info;
970
52.0k
  const CGEN_KEYWORD_ENTRY *ke;
971
972
52.0k
  ke = cgen_keyword_lookup_value (keyword_table, value);
973
52.0k
  if (ke != NULL)
974
50.4k
    (*info->fprintf_func) (info->stream, "%s", ke->name);
975
1.64k
  else
976
1.64k
    (*info->fprintf_func) (info->stream, "???");
977
52.0k
}
978

979
/* Default insn printer.
980
981
   DIS_INFO is defined as `void *' so the disassembler needn't know anything
982
   about disassemble_info.  */
983
984
static void
985
print_insn_normal (CGEN_CPU_DESC cd,
986
       void *dis_info,
987
       const CGEN_INSN *insn,
988
       CGEN_FIELDS *fields,
989
       bfd_vma pc,
990
       int length)
991
171k
{
992
171k
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
993
171k
  disassemble_info *info = (disassemble_info *) dis_info;
994
171k
  const CGEN_SYNTAX_CHAR_TYPE *syn;
995
996
171k
  CGEN_INIT_PRINT (cd);
997
998
1.05M
  for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
999
887k
    {
1000
887k
      if (CGEN_SYNTAX_MNEMONIC_P (*syn))
1001
171k
  {
1002
171k
    (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
1003
171k
    continue;
1004
171k
  }
1005
716k
      if (CGEN_SYNTAX_CHAR_P (*syn))
1006
472k
  {
1007
472k
    (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
1008
472k
    continue;
1009
472k
  }
1010
1011
      /* We have an operand.  */
1012
243k
      m32c_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
1013
243k
         fields, CGEN_INSN_ATTRS (insn), pc, length);
1014
243k
    }
1015
171k
}
1016

1017
/* Subroutine of print_insn. Reads an insn into the given buffers and updates
1018
   the extract info.
1019
   Returns 0 if all is well, non-zero otherwise.  */
1020
1021
static int
1022
read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1023
     bfd_vma pc,
1024
     disassemble_info *info,
1025
     bfd_byte *buf,
1026
     int buflen,
1027
     CGEN_EXTRACT_INFO *ex_info,
1028
     unsigned long *insn_value)
1029
8.52k
{
1030
8.52k
  int status = (*info->read_memory_func) (pc, buf, buflen, info);
1031
1032
8.52k
  if (status != 0)
1033
9
    {
1034
9
      (*info->memory_error_func) (status, pc, info);
1035
9
      return -1;
1036
9
    }
1037
1038
8.51k
  ex_info->dis_info = info;
1039
8.51k
  ex_info->valid = (1 << buflen) - 1;
1040
8.51k
  ex_info->insn_bytes = buf;
1041
1042
8.51k
  *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
1043
8.51k
  return 0;
1044
8.52k
}
1045
1046
/* Utility to print an insn.
1047
   BUF is the base part of the insn, target byte order, BUFLEN bytes long.
1048
   The result is the size of the insn in bytes or zero for an unknown insn
1049
   or -1 if an error occurs fetching data (memory_error_func will have
1050
   been called).  */
1051
1052
static int
1053
print_insn (CGEN_CPU_DESC cd,
1054
      bfd_vma pc,
1055
      disassemble_info *info,
1056
      bfd_byte *buf,
1057
      unsigned int buflen)
1058
188k
{
1059
188k
  CGEN_INSN_INT insn_value;
1060
188k
  const CGEN_INSN_LIST *insn_list;
1061
188k
  CGEN_EXTRACT_INFO ex_info;
1062
188k
  int basesize;
1063
1064
  /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
1065
188k
  basesize = cd->base_insn_bitsize < buflen * 8 ?
1066
188k
                                     cd->base_insn_bitsize : buflen * 8;
1067
188k
  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
1068
1069
1070
  /* Fill in ex_info fields like read_insn would.  Don't actually call
1071
     read_insn, since the incoming buffer is already read (and possibly
1072
     modified a la m32r).  */
1073
188k
  ex_info.valid = (1 << buflen) - 1;
1074
188k
  ex_info.dis_info = info;
1075
188k
  ex_info.insn_bytes = buf;
1076
1077
  /* The instructions are stored in hash lists.
1078
     Pick the first one and keep trying until we find the right one.  */
1079
1080
188k
  insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
1081
2.17G
  while (insn_list != NULL)
1082
2.17G
    {
1083
2.17G
      const CGEN_INSN *insn = insn_list->insn;
1084
2.17G
      CGEN_FIELDS fields;
1085
2.17G
      int length;
1086
2.17G
      unsigned long insn_value_cropped;
1087
1088
2.17G
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
1089
      /* Not needed as insn shouldn't be in hash lists if not supported.  */
1090
      /* Supported by this cpu?  */
1091
2.17G
      if (! m32c_cgen_insn_supported (cd, insn))
1092
822M
        {
1093
822M
          insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1094
822M
    continue;
1095
822M
        }
1096
1.35G
#endif
1097
1098
      /* Basic bit mask must be correct.  */
1099
      /* ??? May wish to allow target to defer this check until the extract
1100
   handler.  */
1101
1102
      /* Base size may exceed this instruction's size.  Extract the
1103
         relevant part from the buffer. */
1104
1.35G
      if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
1105
1.35G
    (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1106
283M
  insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
1107
283M
             info->endian == BFD_ENDIAN_BIG);
1108
1.06G
      else
1109
1.06G
  insn_value_cropped = insn_value;
1110
1111
1.35G
      if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
1112
1.35G
    == CGEN_INSN_BASE_VALUE (insn))
1113
171k
  {
1114
    /* Printing is handled in two passes.  The first pass parses the
1115
       machine insn and extracts the fields.  The second pass prints
1116
       them.  */
1117
1118
    /* Make sure the entire insn is loaded into insn_value, if it
1119
       can fit.  */
1120
171k
    if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
1121
171k
        (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1122
8.52k
      {
1123
8.52k
        unsigned long full_insn_value;
1124
8.52k
        int rc = read_insn (cd, pc, info, buf,
1125
8.52k
          CGEN_INSN_BITSIZE (insn) / 8,
1126
8.52k
          & ex_info, & full_insn_value);
1127
8.52k
        if (rc != 0)
1128
9
    return rc;
1129
8.51k
        length = CGEN_EXTRACT_FN (cd, insn)
1130
8.51k
    (cd, insn, &ex_info, full_insn_value, &fields, pc);
1131
8.51k
      }
1132
163k
    else
1133
163k
      length = CGEN_EXTRACT_FN (cd, insn)
1134
163k
        (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
1135
1136
    /* Length < 0 -> error.  */
1137
171k
    if (length < 0)
1138
0
      return length;
1139
171k
    if (length > 0)
1140
171k
      {
1141
171k
        CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
1142
        /* Length is in bits, result is in bytes.  */
1143
171k
        return length / 8;
1144
171k
      }
1145
171k
  }
1146
1147
1.35G
      insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1148
1.35G
    }
1149
1150
16.9k
  return 0;
1151
188k
}
1152
1153
/* Default value for CGEN_PRINT_INSN.
1154
   The result is the size of the insn in bytes or zero for an unknown insn
1155
   or -1 if an error occured fetching bytes.  */
1156
1157
#ifndef CGEN_PRINT_INSN
1158
188k
#define CGEN_PRINT_INSN default_print_insn
1159
#endif
1160
1161
static int
1162
default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
1163
188k
{
1164
188k
  bfd_byte buf[CGEN_MAX_INSN_SIZE];
1165
188k
  int buflen;
1166
188k
  int status;
1167
1168
  /* Attempt to read the base part of the insn.  */
1169
188k
  buflen = cd->base_insn_bitsize / 8;
1170
188k
  status = (*info->read_memory_func) (pc, buf, buflen, info);
1171
1172
  /* Try again with the minimum part, if min < base.  */
1173
188k
  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
1174
403
    {
1175
403
      buflen = cd->min_insn_bitsize / 8;
1176
403
      status = (*info->read_memory_func) (pc, buf, buflen, info);
1177
403
    }
1178
1179
188k
  if (status != 0)
1180
0
    {
1181
0
      (*info->memory_error_func) (status, pc, info);
1182
0
      return -1;
1183
0
    }
1184
1185
188k
  return print_insn (cd, pc, info, buf, buflen);
1186
188k
}
1187
1188
/* Main entry point.
1189
   Print one instruction from PC on INFO->STREAM.
1190
   Return the size of the instruction (in bytes).  */
1191
1192
typedef struct cpu_desc_list
1193
{
1194
  struct cpu_desc_list *next;
1195
  CGEN_BITSET *isa;
1196
  int mach;
1197
  int endian;
1198
  int insn_endian;
1199
  CGEN_CPU_DESC cd;
1200
} cpu_desc_list;
1201
1202
int
1203
print_insn_m32c (bfd_vma pc, disassemble_info *info)
1204
188k
{
1205
188k
  static cpu_desc_list *cd_list = 0;
1206
188k
  cpu_desc_list *cl = 0;
1207
188k
  static CGEN_CPU_DESC cd = 0;
1208
188k
  static CGEN_BITSET *prev_isa;
1209
188k
  static int prev_mach;
1210
188k
  static int prev_endian;
1211
188k
  static int prev_insn_endian;
1212
188k
  int length;
1213
188k
  CGEN_BITSET *isa;
1214
188k
  int mach;
1215
188k
  int endian = (info->endian == BFD_ENDIAN_BIG
1216
188k
    ? CGEN_ENDIAN_BIG
1217
188k
    : CGEN_ENDIAN_LITTLE);
1218
188k
  int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
1219
188k
                     ? CGEN_ENDIAN_BIG
1220
188k
                     : CGEN_ENDIAN_LITTLE);
1221
188k
  enum bfd_architecture arch;
1222
1223
  /* ??? gdb will set mach but leave the architecture as "unknown" */
1224
188k
#ifndef CGEN_BFD_ARCH
1225
188k
#define CGEN_BFD_ARCH bfd_arch_m32c
1226
188k
#endif
1227
188k
  arch = info->arch;
1228
188k
  if (arch == bfd_arch_unknown)
1229
0
    arch = CGEN_BFD_ARCH;
1230
1231
  /* There's no standard way to compute the machine or isa number
1232
     so we leave it to the target.  */
1233
#ifdef CGEN_COMPUTE_MACH
1234
  mach = CGEN_COMPUTE_MACH (info);
1235
#else
1236
188k
  mach = info->mach;
1237
188k
#endif
1238
1239
#ifdef CGEN_COMPUTE_ISA
1240
  {
1241
    static CGEN_BITSET *permanent_isa;
1242
1243
    if (!permanent_isa)
1244
      permanent_isa = cgen_bitset_create (MAX_ISAS);
1245
    isa = permanent_isa;
1246
    cgen_bitset_clear (isa);
1247
    cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
1248
  }
1249
#else
1250
188k
  isa = info->private_data;
1251
188k
#endif
1252
1253
  /* If we've switched cpu's, try to find a handle we've used before */
1254
188k
  if (cd
1255
188k
      && (cgen_bitset_compare (isa, prev_isa) != 0
1256
188k
    || mach != prev_mach
1257
188k
    || endian != prev_endian))
1258
182k
    {
1259
182k
      cd = 0;
1260
410k
      for (cl = cd_list; cl; cl = cl->next)
1261
410k
  {
1262
410k
    if (cgen_bitset_compare (cl->isa, isa) == 0 &&
1263
410k
        cl->mach == mach &&
1264
410k
        cl->endian == endian)
1265
182k
      {
1266
182k
        cd = cl->cd;
1267
182k
        prev_isa = cd->isas;
1268
182k
        break;
1269
182k
      }
1270
410k
  }
1271
182k
    }
1272
1273
  /* If we haven't initialized yet, initialize the opcode table.  */
1274
188k
  if (! cd)
1275
3
    {
1276
3
      const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
1277
3
      const char *mach_name;
1278
1279
3
      if (!arch_type)
1280
0
  abort ();
1281
3
      mach_name = arch_type->printable_name;
1282
1283
3
      prev_isa = cgen_bitset_copy (isa);
1284
3
      prev_mach = mach;
1285
3
      prev_endian = endian;
1286
3
      prev_insn_endian = insn_endian;
1287
3
      cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
1288
3
         CGEN_CPU_OPEN_BFDMACH, mach_name,
1289
3
         CGEN_CPU_OPEN_ENDIAN, prev_endian,
1290
3
                                 CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
1291
3
         CGEN_CPU_OPEN_END);
1292
3
      if (!cd)
1293
0
  abort ();
1294
1295
      /* Save this away for future reference.  */
1296
3
      cl = xmalloc (sizeof (struct cpu_desc_list));
1297
3
      cl->cd = cd;
1298
3
      cl->isa = prev_isa;
1299
3
      cl->mach = mach;
1300
3
      cl->endian = endian;
1301
3
      cl->next = cd_list;
1302
3
      cd_list = cl;
1303
1304
3
      m32c_cgen_init_dis (cd);
1305
3
    }
1306
1307
  /* We try to have as much common code as possible.
1308
     But at this point some targets need to take over.  */
1309
  /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
1310
     but if not possible try to move this hook elsewhere rather than
1311
     have two hooks.  */
1312
188k
  length = CGEN_PRINT_INSN (cd, pc, info);
1313
188k
  if (length > 0)
1314
171k
    return length;
1315
16.9k
  if (length < 0)
1316
9
    return -1;
1317
1318
16.9k
  (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
1319
16.9k
  return cd->default_insn_bitsize / 8;
1320
16.9k
}