Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/mt-ibld.c
Line
Count
Source (jump to first uncovered line)
1
/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
2
/* Instruction building/extraction support for mt. -*- C -*-
3
4
   THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5
   - the resultant file is machine generated, cgen-ibld.in isn't
6
7
   Copyright (C) 1996-2024 Free Software Foundation, Inc.
8
9
   This file is part of libopcodes.
10
11
   This library is free software; you can redistribute it and/or modify
12
   it under the terms of the GNU General Public License as published by
13
   the Free Software Foundation; either version 3, or (at your option)
14
   any later version.
15
16
   It is distributed in the hope that it will be useful, but WITHOUT
17
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
19
   License for more details.
20
21
   You should have received a copy of the GNU General Public License
22
   along with this program; if not, write to the Free Software Foundation, Inc.,
23
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
24
25
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26
   Keep that in mind.  */
27
28
#include "sysdep.h"
29
#include <stdio.h>
30
#include "ansidecl.h"
31
#include "dis-asm.h"
32
#include "bfd.h"
33
#include "symcat.h"
34
#include "mt-desc.h"
35
#include "mt-opc.h"
36
#include "cgen/basic-modes.h"
37
#include "opintl.h"
38
#include "safe-ctype.h"
39
40
#undef  min
41
#define min(a,b) ((a) < (b) ? (a) : (b))
42
#undef  max
43
#define max(a,b) ((a) > (b) ? (a) : (b))
44
45
/* Used by the ifield rtx function.  */
46
#define FLD(f) (fields->f)
47
48
static const char * insert_normal
49
  (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50
   unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51
static const char * insert_insn_normal
52
  (CGEN_CPU_DESC, const CGEN_INSN *,
53
   CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54
static int extract_normal
55
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56
   unsigned int, unsigned int, unsigned int, unsigned int,
57
   unsigned int, unsigned int, bfd_vma, long *);
58
static int extract_insn_normal
59
  (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60
   CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61
#if CGEN_INT_INSN_P
62
static void put_insn_int_value
63
  (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64
#endif
65
#if ! CGEN_INT_INSN_P
66
static CGEN_INLINE void insert_1
67
  (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68
static CGEN_INLINE int fill_cache
69
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *,  int, int, bfd_vma);
70
static CGEN_INLINE long extract_1
71
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72
#endif
73

74
/* Operand insertion.  */
75
76
#if ! CGEN_INT_INSN_P
77
78
/* Subroutine of insert_normal.  */
79
80
static CGEN_INLINE void
81
insert_1 (CGEN_CPU_DESC cd,
82
    unsigned long value,
83
    int start,
84
    int length,
85
    int word_length,
86
    unsigned char *bufp)
87
{
88
  unsigned long x, mask;
89
  int shift;
90
91
  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
92
93
  /* Written this way to avoid undefined behaviour.  */
94
  mask = (1UL << (length - 1) << 1) - 1;
95
  if (CGEN_INSN_LSB0_P)
96
    shift = (start + 1) - length;
97
  else
98
    shift = (word_length - (start + length));
99
  x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101
  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
102
}
103
104
#endif /* ! CGEN_INT_INSN_P */
105
106
/* Default insertion routine.
107
108
   ATTRS is a mask of the boolean attributes.
109
   WORD_OFFSET is the offset in bits from the start of the insn of the value.
110
   WORD_LENGTH is the length of the word in bits in which the value resides.
111
   START is the starting bit number in the word, architecture origin.
112
   LENGTH is the length of VALUE in bits.
113
   TOTAL_LENGTH is the total length of the insn in bits.
114
115
   The result is an error message or NULL if success.  */
116
117
/* ??? This duplicates functionality with bfd's howto table and
118
   bfd_install_relocation.  */
119
/* ??? This doesn't handle bfd_vma's.  Create another function when
120
   necessary.  */
121
122
static const char *
123
insert_normal (CGEN_CPU_DESC cd,
124
         long value,
125
         unsigned int attrs,
126
         unsigned int word_offset,
127
         unsigned int start,
128
         unsigned int length,
129
         unsigned int word_length,
130
         unsigned int total_length,
131
         CGEN_INSN_BYTES_PTR buffer)
132
0
{
133
0
  static char errbuf[100];
134
0
  unsigned long mask;
135
136
  /* If LENGTH is zero, this operand doesn't contribute to the value.  */
137
0
  if (length == 0)
138
0
    return NULL;
139
140
  /* Written this way to avoid undefined behaviour.  */
141
0
  mask = (1UL << (length - 1) << 1) - 1;
142
143
0
  if (word_length > 8 * sizeof (CGEN_INSN_INT))
144
0
    abort ();
145
146
  /* For architectures with insns smaller than the base-insn-bitsize,
147
     word_length may be too big.  */
148
0
  if (cd->min_insn_bitsize < cd->base_insn_bitsize)
149
0
    {
150
0
      if (word_offset == 0
151
0
    && word_length > total_length)
152
0
  word_length = total_length;
153
0
    }
154
155
  /* Ensure VALUE will fit.  */
156
0
  if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
157
0
    {
158
0
      long minval = - (1UL << (length - 1));
159
0
      unsigned long maxval = mask;
160
161
0
      if ((value > 0 && (unsigned long) value > maxval)
162
0
    || value < minval)
163
0
  {
164
    /* xgettext:c-format */
165
0
    sprintf (errbuf,
166
0
       _("operand out of range (%ld not between %ld and %lu)"),
167
0
       value, minval, maxval);
168
0
    return errbuf;
169
0
  }
170
0
    }
171
0
  else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
172
0
    {
173
0
      unsigned long maxval = mask;
174
0
      unsigned long val = (unsigned long) value;
175
176
      /* For hosts with a word size > 32 check to see if value has been sign
177
   extended beyond 32 bits.  If so then ignore these higher sign bits
178
   as the user is attempting to store a 32-bit signed value into an
179
   unsigned 32-bit field which is allowed.  */
180
0
      if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
181
0
  val &= 0xFFFFFFFF;
182
183
0
      if (val > maxval)
184
0
  {
185
    /* xgettext:c-format */
186
0
    sprintf (errbuf,
187
0
       _("operand out of range (0x%lx not between 0 and 0x%lx)"),
188
0
       val, maxval);
189
0
    return errbuf;
190
0
  }
191
0
    }
192
0
  else
193
0
    {
194
0
      if (! cgen_signed_overflow_ok_p (cd))
195
0
  {
196
0
    long minval = - (1UL << (length - 1));
197
0
    long maxval =   (1UL << (length - 1)) - 1;
198
199
0
    if (value < minval || value > maxval)
200
0
      {
201
0
        sprintf
202
    /* xgettext:c-format */
203
0
    (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
204
0
     value, minval, maxval);
205
0
        return errbuf;
206
0
      }
207
0
  }
208
0
    }
209
210
0
#if CGEN_INT_INSN_P
211
212
0
  {
213
0
    int shift_within_word, shift_to_word, shift;
214
215
    /* How to shift the value to BIT0 of the word.  */
216
0
    shift_to_word = total_length - (word_offset + word_length);
217
218
    /* How to shift the value to the field within the word.  */
219
0
    if (CGEN_INSN_LSB0_P)
220
0
      shift_within_word = start + 1 - length;
221
0
    else
222
0
      shift_within_word = word_length - start - length;
223
224
    /* The total SHIFT, then mask in the value.  */
225
0
    shift = shift_to_word + shift_within_word;
226
0
    *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
227
0
  }
228
229
#else /* ! CGEN_INT_INSN_P */
230
231
  {
232
    unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
233
234
    insert_1 (cd, value, start, length, word_length, bufp);
235
  }
236
237
#endif /* ! CGEN_INT_INSN_P */
238
239
0
  return NULL;
240
0
}
241
242
/* Default insn builder (insert handler).
243
   The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
244
   that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
245
   recorded in host byte order, otherwise BUFFER is an array of bytes
246
   and the value is recorded in target byte order).
247
   The result is an error message or NULL if success.  */
248
249
static const char *
250
insert_insn_normal (CGEN_CPU_DESC cd,
251
        const CGEN_INSN * insn,
252
        CGEN_FIELDS * fields,
253
        CGEN_INSN_BYTES_PTR buffer,
254
        bfd_vma pc)
255
0
{
256
0
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
257
0
  unsigned long value;
258
0
  const CGEN_SYNTAX_CHAR_TYPE * syn;
259
260
0
  CGEN_INIT_INSERT (cd);
261
0
  value = CGEN_INSN_BASE_VALUE (insn);
262
263
  /* If we're recording insns as numbers (rather than a string of bytes),
264
     target byte order handling is deferred until later.  */
265
266
0
#if CGEN_INT_INSN_P
267
268
0
  put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
269
0
          CGEN_FIELDS_BITSIZE (fields), value);
270
271
#else
272
273
  cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
274
                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
275
           value, cd->insn_endian);
276
277
#endif /* ! CGEN_INT_INSN_P */
278
279
  /* ??? It would be better to scan the format's fields.
280
     Still need to be able to insert a value based on the operand though;
281
     e.g. storing a branch displacement that got resolved later.
282
     Needs more thought first.  */
283
284
0
  for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
285
0
    {
286
0
      const char *errmsg;
287
288
0
      if (CGEN_SYNTAX_CHAR_P (* syn))
289
0
  continue;
290
291
0
      errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
292
0
               fields, buffer, pc);
293
0
      if (errmsg)
294
0
  return errmsg;
295
0
    }
296
297
0
  return NULL;
298
0
}
299
300
#if CGEN_INT_INSN_P
301
/* Cover function to store an insn value into an integral insn.  Must go here
302
   because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
303
304
static void
305
put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
306
        CGEN_INSN_BYTES_PTR buf,
307
        int length,
308
        int insn_length,
309
        CGEN_INSN_INT value)
310
0
{
311
  /* For architectures with insns smaller than the base-insn-bitsize,
312
     length may be too big.  */
313
0
  if (length > insn_length)
314
0
    *buf = value;
315
0
  else
316
0
    {
317
0
      int shift = insn_length - length;
318
      /* Written this way to avoid undefined behaviour.  */
319
0
      CGEN_INSN_INT mask = length == 0 ? 0 : (1UL << (length - 1) << 1) - 1;
320
321
0
      *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
322
0
    }
323
0
}
324
#endif
325

326
/* Operand extraction.  */
327
328
#if ! CGEN_INT_INSN_P
329
330
/* Subroutine of extract_normal.
331
   Ensure sufficient bytes are cached in EX_INFO.
332
   OFFSET is the offset in bytes from the start of the insn of the value.
333
   BYTES is the length of the needed value.
334
   Returns 1 for success, 0 for failure.  */
335
336
static CGEN_INLINE int
337
fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
338
      CGEN_EXTRACT_INFO *ex_info,
339
      int offset,
340
      int bytes,
341
      bfd_vma pc)
342
{
343
  /* It's doubtful that the middle part has already been fetched so
344
     we don't optimize that case.  kiss.  */
345
  unsigned int mask;
346
  disassemble_info *info = (disassemble_info *) ex_info->dis_info;
347
348
  /* First do a quick check.  */
349
  mask = (1 << bytes) - 1;
350
  if (((ex_info->valid >> offset) & mask) == mask)
351
    return 1;
352
353
  /* Search for the first byte we need to read.  */
354
  for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
355
    if (! (mask & ex_info->valid))
356
      break;
357
358
  if (bytes)
359
    {
360
      int status;
361
362
      pc += offset;
363
      status = (*info->read_memory_func)
364
  (pc, ex_info->insn_bytes + offset, bytes, info);
365
366
      if (status != 0)
367
  {
368
    (*info->memory_error_func) (status, pc, info);
369
    return 0;
370
  }
371
372
      ex_info->valid |= ((1 << bytes) - 1) << offset;
373
    }
374
375
  return 1;
376
}
377
378
/* Subroutine of extract_normal.  */
379
380
static CGEN_INLINE long
381
extract_1 (CGEN_CPU_DESC cd,
382
     CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
383
     int start,
384
     int length,
385
     int word_length,
386
     unsigned char *bufp,
387
     bfd_vma pc ATTRIBUTE_UNUSED)
388
{
389
  unsigned long x;
390
  int shift;
391
392
  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
393
394
  if (CGEN_INSN_LSB0_P)
395
    shift = (start + 1) - length;
396
  else
397
    shift = (word_length - (start + length));
398
  return x >> shift;
399
}
400
401
#endif /* ! CGEN_INT_INSN_P */
402
403
/* Default extraction routine.
404
405
   INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
406
   or sometimes less for cases like the m32r where the base insn size is 32
407
   but some insns are 16 bits.
408
   ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
409
   but for generality we take a bitmask of all of them.
410
   WORD_OFFSET is the offset in bits from the start of the insn of the value.
411
   WORD_LENGTH is the length of the word in bits in which the value resides.
412
   START is the starting bit number in the word, architecture origin.
413
   LENGTH is the length of VALUE in bits.
414
   TOTAL_LENGTH is the total length of the insn in bits.
415
416
   Returns 1 for success, 0 for failure.  */
417
418
/* ??? The return code isn't properly used.  wip.  */
419
420
/* ??? This doesn't handle bfd_vma's.  Create another function when
421
   necessary.  */
422
423
static int
424
extract_normal (CGEN_CPU_DESC cd,
425
#if ! CGEN_INT_INSN_P
426
    CGEN_EXTRACT_INFO *ex_info,
427
#else
428
    CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
429
#endif
430
    CGEN_INSN_INT insn_value,
431
    unsigned int attrs,
432
    unsigned int word_offset,
433
    unsigned int start,
434
    unsigned int length,
435
    unsigned int word_length,
436
    unsigned int total_length,
437
#if ! CGEN_INT_INSN_P
438
    bfd_vma pc,
439
#else
440
    bfd_vma pc ATTRIBUTE_UNUSED,
441
#endif
442
    long *valuep)
443
104k
{
444
104k
  long value, mask;
445
446
  /* If LENGTH is zero, this operand doesn't contribute to the value
447
     so give it a standard value of zero.  */
448
104k
  if (length == 0)
449
0
    {
450
0
      *valuep = 0;
451
0
      return 1;
452
0
    }
453
454
104k
  if (word_length > 8 * sizeof (CGEN_INSN_INT))
455
0
    abort ();
456
457
  /* For architectures with insns smaller than the insn-base-bitsize,
458
     word_length may be too big.  */
459
104k
  if (cd->min_insn_bitsize < cd->base_insn_bitsize)
460
0
    {
461
0
      if (word_offset + word_length > total_length)
462
0
  word_length = total_length - word_offset;
463
0
    }
464
465
  /* Does the value reside in INSN_VALUE, and at the right alignment?  */
466
467
104k
  if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
468
104k
    {
469
104k
      if (CGEN_INSN_LSB0_P)
470
104k
  value = insn_value >> ((word_offset + start + 1) - length);
471
0
      else
472
0
  value = insn_value >> (total_length - ( word_offset + start + length));
473
104k
    }
474
475
#if ! CGEN_INT_INSN_P
476
477
  else
478
    {
479
      unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
480
481
      if (word_length > 8 * sizeof (CGEN_INSN_INT))
482
  abort ();
483
484
      if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
485
  {
486
    *valuep = 0;
487
    return 0;
488
  }
489
490
      value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
491
    }
492
493
#endif /* ! CGEN_INT_INSN_P */
494
495
  /* Written this way to avoid undefined behaviour.  */
496
104k
  mask = (1UL << (length - 1) << 1) - 1;
497
498
104k
  value &= mask;
499
  /* sign extend? */
500
104k
  if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
501
104k
      && (value & (1UL << (length - 1))))
502
595
    value |= ~mask;
503
504
104k
  *valuep = value;
505
506
104k
  return 1;
507
104k
}
508
509
/* Default insn extractor.
510
511
   INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
512
   The extracted fields are stored in FIELDS.
513
   EX_INFO is used to handle reading variable length insns.
514
   Return the length of the insn in bits, or 0 if no match,
515
   or -1 if an error occurs fetching data (memory_error_func will have
516
   been called).  */
517
518
static int
519
extract_insn_normal (CGEN_CPU_DESC cd,
520
         const CGEN_INSN *insn,
521
         CGEN_EXTRACT_INFO *ex_info,
522
         CGEN_INSN_INT insn_value,
523
         CGEN_FIELDS *fields,
524
         bfd_vma pc)
525
22.4k
{
526
22.4k
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
527
22.4k
  const CGEN_SYNTAX_CHAR_TYPE *syn;
528
529
22.4k
  CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
530
531
22.4k
  CGEN_INIT_EXTRACT (cd);
532
533
310k
  for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
534
287k
    {
535
287k
      int length;
536
537
287k
      if (CGEN_SYNTAX_CHAR_P (*syn))
538
183k
  continue;
539
540
104k
      length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
541
104k
          ex_info, insn_value, fields, pc);
542
104k
      if (length <= 0)
543
0
  return length;
544
104k
    }
545
546
  /* We recognized and successfully extracted this insn.  */
547
22.4k
  return CGEN_INSN_BITSIZE (insn);
548
22.4k
}
549

550
/* Machine generated code added here.  */
551
552
const char * mt_cgen_insert_operand
553
  (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
554
555
/* Main entry point for operand insertion.
556
557
   This function is basically just a big switch statement.  Earlier versions
558
   used tables to look up the function to use, but
559
   - if the table contains both assembler and disassembler functions then
560
     the disassembler contains much of the assembler and vice-versa,
561
   - there's a lot of inlining possibilities as things grow,
562
   - using a switch statement avoids the function call overhead.
563
564
   This function could be moved into `parse_insn_normal', but keeping it
565
   separate makes clear the interface between `parse_insn_normal' and each of
566
   the handlers.  It's also needed by GAS to insert operands that couldn't be
567
   resolved during parsing.  */
568
569
const char *
570
mt_cgen_insert_operand (CGEN_CPU_DESC cd,
571
           int opindex,
572
           CGEN_FIELDS * fields,
573
           CGEN_INSN_BYTES_PTR buffer,
574
           bfd_vma pc ATTRIBUTE_UNUSED)
575
0
{
576
0
  const char * errmsg = NULL;
577
0
  unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
578
579
0
  switch (opindex)
580
0
    {
581
0
    case MT_OPERAND_A23 :
582
0
      errmsg = insert_normal (cd, fields->f_a23, 0, 0, 23, 1, 32, total_length, buffer);
583
0
      break;
584
0
    case MT_OPERAND_BALL :
585
0
      errmsg = insert_normal (cd, fields->f_ball, 0, 0, 19, 1, 32, total_length, buffer);
586
0
      break;
587
0
    case MT_OPERAND_BALL2 :
588
0
      errmsg = insert_normal (cd, fields->f_ball2, 0, 0, 15, 1, 32, total_length, buffer);
589
0
      break;
590
0
    case MT_OPERAND_BANKADDR :
591
0
      errmsg = insert_normal (cd, fields->f_bankaddr, 0, 0, 25, 13, 32, total_length, buffer);
592
0
      break;
593
0
    case MT_OPERAND_BRC :
594
0
      errmsg = insert_normal (cd, fields->f_brc, 0, 0, 18, 3, 32, total_length, buffer);
595
0
      break;
596
0
    case MT_OPERAND_BRC2 :
597
0
      errmsg = insert_normal (cd, fields->f_brc2, 0, 0, 14, 3, 32, total_length, buffer);
598
0
      break;
599
0
    case MT_OPERAND_CB1INCR :
600
0
      errmsg = insert_normal (cd, fields->f_cb1incr, 0|(1<<CGEN_IFLD_SIGNED), 0, 19, 6, 32, total_length, buffer);
601
0
      break;
602
0
    case MT_OPERAND_CB1SEL :
603
0
      errmsg = insert_normal (cd, fields->f_cb1sel, 0, 0, 25, 3, 32, total_length, buffer);
604
0
      break;
605
0
    case MT_OPERAND_CB2INCR :
606
0
      errmsg = insert_normal (cd, fields->f_cb2incr, 0|(1<<CGEN_IFLD_SIGNED), 0, 13, 6, 32, total_length, buffer);
607
0
      break;
608
0
    case MT_OPERAND_CB2SEL :
609
0
      errmsg = insert_normal (cd, fields->f_cb2sel, 0, 0, 22, 3, 32, total_length, buffer);
610
0
      break;
611
0
    case MT_OPERAND_CBRB :
612
0
      errmsg = insert_normal (cd, fields->f_cbrb, 0, 0, 10, 1, 32, total_length, buffer);
613
0
      break;
614
0
    case MT_OPERAND_CBS :
615
0
      errmsg = insert_normal (cd, fields->f_cbs, 0, 0, 19, 2, 32, total_length, buffer);
616
0
      break;
617
0
    case MT_OPERAND_CBX :
618
0
      errmsg = insert_normal (cd, fields->f_cbx, 0, 0, 14, 3, 32, total_length, buffer);
619
0
      break;
620
0
    case MT_OPERAND_CCB :
621
0
      errmsg = insert_normal (cd, fields->f_ccb, 0, 0, 11, 1, 32, total_length, buffer);
622
0
      break;
623
0
    case MT_OPERAND_CDB :
624
0
      errmsg = insert_normal (cd, fields->f_cdb, 0, 0, 10, 1, 32, total_length, buffer);
625
0
      break;
626
0
    case MT_OPERAND_CELL :
627
0
      errmsg = insert_normal (cd, fields->f_cell, 0, 0, 9, 3, 32, total_length, buffer);
628
0
      break;
629
0
    case MT_OPERAND_COLNUM :
630
0
      errmsg = insert_normal (cd, fields->f_colnum, 0, 0, 18, 3, 32, total_length, buffer);
631
0
      break;
632
0
    case MT_OPERAND_CONTNUM :
633
0
      errmsg = insert_normal (cd, fields->f_contnum, 0, 0, 8, 9, 32, total_length, buffer);
634
0
      break;
635
0
    case MT_OPERAND_CR :
636
0
      errmsg = insert_normal (cd, fields->f_cr, 0, 0, 22, 3, 32, total_length, buffer);
637
0
      break;
638
0
    case MT_OPERAND_CTXDISP :
639
0
      errmsg = insert_normal (cd, fields->f_ctxdisp, 0, 0, 5, 6, 32, total_length, buffer);
640
0
      break;
641
0
    case MT_OPERAND_DUP :
642
0
      errmsg = insert_normal (cd, fields->f_dup, 0, 0, 6, 1, 32, total_length, buffer);
643
0
      break;
644
0
    case MT_OPERAND_FBDISP :
645
0
      errmsg = insert_normal (cd, fields->f_fbdisp, 0, 0, 15, 6, 32, total_length, buffer);
646
0
      break;
647
0
    case MT_OPERAND_FBINCR :
648
0
      errmsg = insert_normal (cd, fields->f_fbincr, 0, 0, 23, 4, 32, total_length, buffer);
649
0
      break;
650
0
    case MT_OPERAND_FRDR :
651
0
      errmsg = insert_normal (cd, fields->f_dr, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, buffer);
652
0
      break;
653
0
    case MT_OPERAND_FRDRRR :
654
0
      errmsg = insert_normal (cd, fields->f_drrr, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 4, 32, total_length, buffer);
655
0
      break;
656
0
    case MT_OPERAND_FRSR1 :
657
0
      errmsg = insert_normal (cd, fields->f_sr1, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 23, 4, 32, total_length, buffer);
658
0
      break;
659
0
    case MT_OPERAND_FRSR2 :
660
0
      errmsg = insert_normal (cd, fields->f_sr2, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, buffer);
661
0
      break;
662
0
    case MT_OPERAND_ID :
663
0
      errmsg = insert_normal (cd, fields->f_id, 0, 0, 14, 1, 32, total_length, buffer);
664
0
      break;
665
0
    case MT_OPERAND_IMM16 :
666
0
      {
667
0
        long value = fields->f_imm16s;
668
0
        value = ((value) + (0));
669
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer);
670
0
      }
671
0
      break;
672
0
    case MT_OPERAND_IMM16L :
673
0
      errmsg = insert_normal (cd, fields->f_imm16l, 0, 0, 23, 16, 32, total_length, buffer);
674
0
      break;
675
0
    case MT_OPERAND_IMM16O :
676
0
      {
677
0
        long value = fields->f_imm16s;
678
0
        value = ((value) + (0));
679
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, buffer);
680
0
      }
681
0
      break;
682
0
    case MT_OPERAND_IMM16Z :
683
0
      errmsg = insert_normal (cd, fields->f_imm16u, 0, 0, 15, 16, 32, total_length, buffer);
684
0
      break;
685
0
    case MT_OPERAND_INCAMT :
686
0
      errmsg = insert_normal (cd, fields->f_incamt, 0, 0, 19, 8, 32, total_length, buffer);
687
0
      break;
688
0
    case MT_OPERAND_INCR :
689
0
      errmsg = insert_normal (cd, fields->f_incr, 0, 0, 17, 6, 32, total_length, buffer);
690
0
      break;
691
0
    case MT_OPERAND_LENGTH :
692
0
      errmsg = insert_normal (cd, fields->f_length, 0, 0, 15, 3, 32, total_length, buffer);
693
0
      break;
694
0
    case MT_OPERAND_LOOPSIZE :
695
0
      {
696
0
        long value = fields->f_loopo;
697
0
        value = ((USI) (value) >> (2));
698
0
        errmsg = insert_normal (cd, value, 0, 0, 7, 8, 32, total_length, buffer);
699
0
      }
700
0
      break;
701
0
    case MT_OPERAND_MASK :
702
0
      errmsg = insert_normal (cd, fields->f_mask, 0, 0, 25, 16, 32, total_length, buffer);
703
0
      break;
704
0
    case MT_OPERAND_MASK1 :
705
0
      errmsg = insert_normal (cd, fields->f_mask1, 0, 0, 22, 3, 32, total_length, buffer);
706
0
      break;
707
0
    case MT_OPERAND_MODE :
708
0
      errmsg = insert_normal (cd, fields->f_mode, 0, 0, 25, 2, 32, total_length, buffer);
709
0
      break;
710
0
    case MT_OPERAND_PERM :
711
0
      errmsg = insert_normal (cd, fields->f_perm, 0, 0, 25, 2, 32, total_length, buffer);
712
0
      break;
713
0
    case MT_OPERAND_RBBC :
714
0
      errmsg = insert_normal (cd, fields->f_rbbc, 0, 0, 25, 2, 32, total_length, buffer);
715
0
      break;
716
0
    case MT_OPERAND_RC :
717
0
      errmsg = insert_normal (cd, fields->f_rc, 0, 0, 15, 1, 32, total_length, buffer);
718
0
      break;
719
0
    case MT_OPERAND_RC1 :
720
0
      errmsg = insert_normal (cd, fields->f_rc1, 0, 0, 11, 1, 32, total_length, buffer);
721
0
      break;
722
0
    case MT_OPERAND_RC2 :
723
0
      errmsg = insert_normal (cd, fields->f_rc2, 0, 0, 6, 1, 32, total_length, buffer);
724
0
      break;
725
0
    case MT_OPERAND_RC3 :
726
0
      errmsg = insert_normal (cd, fields->f_rc3, 0, 0, 7, 1, 32, total_length, buffer);
727
0
      break;
728
0
    case MT_OPERAND_RCNUM :
729
0
      errmsg = insert_normal (cd, fields->f_rcnum, 0, 0, 14, 3, 32, total_length, buffer);
730
0
      break;
731
0
    case MT_OPERAND_RDA :
732
0
      errmsg = insert_normal (cd, fields->f_rda, 0, 0, 25, 1, 32, total_length, buffer);
733
0
      break;
734
0
    case MT_OPERAND_ROWNUM :
735
0
      errmsg = insert_normal (cd, fields->f_rownum, 0, 0, 14, 3, 32, total_length, buffer);
736
0
      break;
737
0
    case MT_OPERAND_ROWNUM1 :
738
0
      errmsg = insert_normal (cd, fields->f_rownum1, 0, 0, 12, 3, 32, total_length, buffer);
739
0
      break;
740
0
    case MT_OPERAND_ROWNUM2 :
741
0
      errmsg = insert_normal (cd, fields->f_rownum2, 0, 0, 9, 3, 32, total_length, buffer);
742
0
      break;
743
0
    case MT_OPERAND_SIZE :
744
0
      errmsg = insert_normal (cd, fields->f_size, 0, 0, 13, 14, 32, total_length, buffer);
745
0
      break;
746
0
    case MT_OPERAND_TYPE :
747
0
      errmsg = insert_normal (cd, fields->f_type, 0, 0, 21, 2, 32, total_length, buffer);
748
0
      break;
749
0
    case MT_OPERAND_WR :
750
0
      errmsg = insert_normal (cd, fields->f_wr, 0, 0, 24, 1, 32, total_length, buffer);
751
0
      break;
752
0
    case MT_OPERAND_XMODE :
753
0
      errmsg = insert_normal (cd, fields->f_xmode, 0, 0, 23, 1, 32, total_length, buffer);
754
0
      break;
755
756
0
    default :
757
      /* xgettext:c-format */
758
0
      opcodes_error_handler
759
0
  (_("internal error: unrecognized field %d while building insn"),
760
0
   opindex);
761
0
      abort ();
762
0
  }
763
764
0
  return errmsg;
765
0
}
766
767
int mt_cgen_extract_operand
768
  (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
769
770
/* Main entry point for operand extraction.
771
   The result is <= 0 for error, >0 for success.
772
   ??? Actual values aren't well defined right now.
773
774
   This function is basically just a big switch statement.  Earlier versions
775
   used tables to look up the function to use, but
776
   - if the table contains both assembler and disassembler functions then
777
     the disassembler contains much of the assembler and vice-versa,
778
   - there's a lot of inlining possibilities as things grow,
779
   - using a switch statement avoids the function call overhead.
780
781
   This function could be moved into `print_insn_normal', but keeping it
782
   separate makes clear the interface between `print_insn_normal' and each of
783
   the handlers.  */
784
785
int
786
mt_cgen_extract_operand (CGEN_CPU_DESC cd,
787
           int opindex,
788
           CGEN_EXTRACT_INFO *ex_info,
789
           CGEN_INSN_INT insn_value,
790
           CGEN_FIELDS * fields,
791
           bfd_vma pc)
792
104k
{
793
  /* Assume success (for those operands that are nops).  */
794
104k
  int length = 1;
795
104k
  unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
796
797
104k
  switch (opindex)
798
104k
    {
799
213
    case MT_OPERAND_A23 :
800
213
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 1, 32, total_length, pc, & fields->f_a23);
801
213
      break;
802
2.24k
    case MT_OPERAND_BALL :
803
2.24k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_ball);
804
2.24k
      break;
805
309
    case MT_OPERAND_BALL2 :
806
309
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_ball2);
807
309
      break;
808
278
    case MT_OPERAND_BANKADDR :
809
278
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 13, 32, total_length, pc, & fields->f_bankaddr);
810
278
      break;
811
1.34k
    case MT_OPERAND_BRC :
812
1.34k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 3, 32, total_length, pc, & fields->f_brc);
813
1.34k
      break;
814
309
    case MT_OPERAND_BRC2 :
815
309
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_brc2);
816
309
      break;
817
112
    case MT_OPERAND_CB1INCR :
818
112
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 19, 6, 32, total_length, pc, & fields->f_cb1incr);
819
112
      break;
820
129
    case MT_OPERAND_CB1SEL :
821
129
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 3, 32, total_length, pc, & fields->f_cb1sel);
822
129
      break;
823
112
    case MT_OPERAND_CB2INCR :
824
112
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 13, 6, 32, total_length, pc, & fields->f_cb2incr);
825
112
      break;
826
129
    case MT_OPERAND_CB2SEL :
827
129
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_cb2sel);
828
129
      break;
829
1.08k
    case MT_OPERAND_CBRB :
830
1.08k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_cbrb);
831
1.08k
      break;
832
441
    case MT_OPERAND_CBS :
833
441
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 2, 32, total_length, pc, & fields->f_cbs);
834
441
      break;
835
851
    case MT_OPERAND_CBX :
836
851
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_cbx);
837
851
      break;
838
1.29k
    case MT_OPERAND_CCB :
839
1.29k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_ccb);
840
1.29k
      break;
841
1.29k
    case MT_OPERAND_CDB :
842
1.29k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 1, 32, total_length, pc, & fields->f_cdb);
843
1.29k
      break;
844
3.85k
    case MT_OPERAND_CELL :
845
3.85k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_cell);
846
3.85k
      break;
847
997
    case MT_OPERAND_COLNUM :
848
997
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 3, 32, total_length, pc, & fields->f_colnum);
849
997
      break;
850
66
    case MT_OPERAND_CONTNUM :
851
66
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_contnum);
852
66
      break;
853
213
    case MT_OPERAND_CR :
854
213
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_cr);
855
213
      break;
856
7.23k
    case MT_OPERAND_CTXDISP :
857
7.23k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 6, 32, total_length, pc, & fields->f_ctxdisp);
858
7.23k
      break;
859
6.39k
    case MT_OPERAND_DUP :
860
6.39k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_dup);
861
6.39k
      break;
862
2.41k
    case MT_OPERAND_FBDISP :
863
2.41k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 6, 32, total_length, pc, & fields->f_fbdisp);
864
2.41k
      break;
865
962
    case MT_OPERAND_FBINCR :
866
962
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 4, 32, total_length, pc, & fields->f_fbincr);
867
962
      break;
868
3.62k
    case MT_OPERAND_FRDR :
869
3.62k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, pc, & fields->f_dr);
870
3.62k
      break;
871
10.5k
    case MT_OPERAND_FRDRRR :
872
10.5k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 4, 32, total_length, pc, & fields->f_drrr);
873
10.5k
      break;
874
19.8k
    case MT_OPERAND_FRSR1 :
875
19.8k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 23, 4, 32, total_length, pc, & fields->f_sr1);
876
19.8k
      break;
877
14.6k
    case MT_OPERAND_FRSR2 :
878
14.6k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 19, 4, 32, total_length, pc, & fields->f_sr2);
879
14.6k
      break;
880
270
    case MT_OPERAND_ID :
881
270
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_id);
882
270
      break;
883
2.11k
    case MT_OPERAND_IMM16 :
884
2.11k
      {
885
2.11k
        long value;
886
2.11k
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & value);
887
2.11k
        value = ((value) + (0));
888
2.11k
        fields->f_imm16s = value;
889
2.11k
      }
890
2.11k
      break;
891
4
    case MT_OPERAND_IMM16L :
892
4
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 16, 32, total_length, pc, & fields->f_imm16l);
893
4
      break;
894
575
    case MT_OPERAND_IMM16O :
895
575
      {
896
575
        long value;
897
575
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 15, 16, 32, total_length, pc, & value);
898
575
        value = ((value) + (0));
899
575
        fields->f_imm16s = value;
900
575
      }
901
575
      break;
902
1.66k
    case MT_OPERAND_IMM16Z :
903
1.66k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm16u);
904
1.66k
      break;
905
351
    case MT_OPERAND_INCAMT :
906
351
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 8, 32, total_length, pc, & fields->f_incamt);
907
351
      break;
908
441
    case MT_OPERAND_INCR :
909
441
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 6, 32, total_length, pc, & fields->f_incr);
910
441
      break;
911
1.59k
    case MT_OPERAND_LENGTH :
912
1.59k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 3, 32, total_length, pc, & fields->f_length);
913
1.59k
      break;
914
4
    case MT_OPERAND_LOOPSIZE :
915
4
      {
916
4
        long value;
917
4
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & value);
918
4
        value = ((((value) << (2))) + (8));
919
4
        fields->f_loopo = value;
920
4
      }
921
4
      break;
922
459
    case MT_OPERAND_MASK :
923
459
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 16, 32, total_length, pc, & fields->f_mask);
924
459
      break;
925
200
    case MT_OPERAND_MASK1 :
926
200
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 3, 32, total_length, pc, & fields->f_mask1);
927
200
      break;
928
270
    case MT_OPERAND_MODE :
929
270
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_mode);
930
270
      break;
931
1.29k
    case MT_OPERAND_PERM :
932
1.29k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_perm);
933
1.29k
      break;
934
3.24k
    case MT_OPERAND_RBBC :
935
3.24k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 2, 32, total_length, pc, & fields->f_rbbc);
936
3.24k
      break;
937
66
    case MT_OPERAND_RC :
938
66
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_rc);
939
66
      break;
940
1.08k
    case MT_OPERAND_RC1 :
941
1.08k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_rc1);
942
1.08k
      break;
943
788
    case MT_OPERAND_RC2 :
944
788
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_rc2);
945
788
      break;
946
108
    case MT_OPERAND_RC3 :
947
108
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_rc3);
948
108
      break;
949
66
    case MT_OPERAND_RCNUM :
950
66
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_rcnum);
951
66
      break;
952
1.78k
    case MT_OPERAND_RDA :
953
1.78k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 1, 32, total_length, pc, & fields->f_rda);
954
1.78k
      break;
955
170
    case MT_OPERAND_ROWNUM :
956
170
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 3, 32, total_length, pc, & fields->f_rownum);
957
170
      break;
958
1.87k
    case MT_OPERAND_ROWNUM1 :
959
1.87k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_rownum1);
960
1.87k
      break;
961
3.14k
    case MT_OPERAND_ROWNUM2 :
962
3.14k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_rownum2);
963
3.14k
      break;
964
270
    case MT_OPERAND_SIZE :
965
270
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 14, 32, total_length, pc, & fields->f_size);
966
270
      break;
967
170
    case MT_OPERAND_TYPE :
968
170
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 2, 32, total_length, pc, & fields->f_type);
969
170
      break;
970
1.78k
    case MT_OPERAND_WR :
971
1.78k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 1, 32, total_length, pc, & fields->f_wr);
972
1.78k
      break;
973
200
    case MT_OPERAND_XMODE :
974
200
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 1, 32, total_length, pc, & fields->f_xmode);
975
200
      break;
976
977
0
    default :
978
      /* xgettext:c-format */
979
0
      opcodes_error_handler
980
0
  (_("internal error: unrecognized field %d while decoding insn"),
981
0
   opindex);
982
0
      abort ();
983
104k
    }
984
985
104k
  return length;
986
104k
}
987
988
cgen_insert_fn * const mt_cgen_insert_handlers[] =
989
{
990
  insert_insn_normal,
991
};
992
993
cgen_extract_fn * const mt_cgen_extract_handlers[] =
994
{
995
  extract_insn_normal,
996
};
997
998
int mt_cgen_get_int_operand     (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
999
bfd_vma mt_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
1000
1001
/* Getting values from cgen_fields is handled by a collection of functions.
1002
   They are distinguished by the type of the VALUE argument they return.
1003
   TODO: floating point, inlining support, remove cases where result type
1004
   not appropriate.  */
1005
1006
int
1007
mt_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1008
           int opindex,
1009
           const CGEN_FIELDS * fields)
1010
0
{
1011
0
  int value;
1012
1013
0
  switch (opindex)
1014
0
    {
1015
0
    case MT_OPERAND_A23 :
1016
0
      value = fields->f_a23;
1017
0
      break;
1018
0
    case MT_OPERAND_BALL :
1019
0
      value = fields->f_ball;
1020
0
      break;
1021
0
    case MT_OPERAND_BALL2 :
1022
0
      value = fields->f_ball2;
1023
0
      break;
1024
0
    case MT_OPERAND_BANKADDR :
1025
0
      value = fields->f_bankaddr;
1026
0
      break;
1027
0
    case MT_OPERAND_BRC :
1028
0
      value = fields->f_brc;
1029
0
      break;
1030
0
    case MT_OPERAND_BRC2 :
1031
0
      value = fields->f_brc2;
1032
0
      break;
1033
0
    case MT_OPERAND_CB1INCR :
1034
0
      value = fields->f_cb1incr;
1035
0
      break;
1036
0
    case MT_OPERAND_CB1SEL :
1037
0
      value = fields->f_cb1sel;
1038
0
      break;
1039
0
    case MT_OPERAND_CB2INCR :
1040
0
      value = fields->f_cb2incr;
1041
0
      break;
1042
0
    case MT_OPERAND_CB2SEL :
1043
0
      value = fields->f_cb2sel;
1044
0
      break;
1045
0
    case MT_OPERAND_CBRB :
1046
0
      value = fields->f_cbrb;
1047
0
      break;
1048
0
    case MT_OPERAND_CBS :
1049
0
      value = fields->f_cbs;
1050
0
      break;
1051
0
    case MT_OPERAND_CBX :
1052
0
      value = fields->f_cbx;
1053
0
      break;
1054
0
    case MT_OPERAND_CCB :
1055
0
      value = fields->f_ccb;
1056
0
      break;
1057
0
    case MT_OPERAND_CDB :
1058
0
      value = fields->f_cdb;
1059
0
      break;
1060
0
    case MT_OPERAND_CELL :
1061
0
      value = fields->f_cell;
1062
0
      break;
1063
0
    case MT_OPERAND_COLNUM :
1064
0
      value = fields->f_colnum;
1065
0
      break;
1066
0
    case MT_OPERAND_CONTNUM :
1067
0
      value = fields->f_contnum;
1068
0
      break;
1069
0
    case MT_OPERAND_CR :
1070
0
      value = fields->f_cr;
1071
0
      break;
1072
0
    case MT_OPERAND_CTXDISP :
1073
0
      value = fields->f_ctxdisp;
1074
0
      break;
1075
0
    case MT_OPERAND_DUP :
1076
0
      value = fields->f_dup;
1077
0
      break;
1078
0
    case MT_OPERAND_FBDISP :
1079
0
      value = fields->f_fbdisp;
1080
0
      break;
1081
0
    case MT_OPERAND_FBINCR :
1082
0
      value = fields->f_fbincr;
1083
0
      break;
1084
0
    case MT_OPERAND_FRDR :
1085
0
      value = fields->f_dr;
1086
0
      break;
1087
0
    case MT_OPERAND_FRDRRR :
1088
0
      value = fields->f_drrr;
1089
0
      break;
1090
0
    case MT_OPERAND_FRSR1 :
1091
0
      value = fields->f_sr1;
1092
0
      break;
1093
0
    case MT_OPERAND_FRSR2 :
1094
0
      value = fields->f_sr2;
1095
0
      break;
1096
0
    case MT_OPERAND_ID :
1097
0
      value = fields->f_id;
1098
0
      break;
1099
0
    case MT_OPERAND_IMM16 :
1100
0
      value = fields->f_imm16s;
1101
0
      break;
1102
0
    case MT_OPERAND_IMM16L :
1103
0
      value = fields->f_imm16l;
1104
0
      break;
1105
0
    case MT_OPERAND_IMM16O :
1106
0
      value = fields->f_imm16s;
1107
0
      break;
1108
0
    case MT_OPERAND_IMM16Z :
1109
0
      value = fields->f_imm16u;
1110
0
      break;
1111
0
    case MT_OPERAND_INCAMT :
1112
0
      value = fields->f_incamt;
1113
0
      break;
1114
0
    case MT_OPERAND_INCR :
1115
0
      value = fields->f_incr;
1116
0
      break;
1117
0
    case MT_OPERAND_LENGTH :
1118
0
      value = fields->f_length;
1119
0
      break;
1120
0
    case MT_OPERAND_LOOPSIZE :
1121
0
      value = fields->f_loopo;
1122
0
      break;
1123
0
    case MT_OPERAND_MASK :
1124
0
      value = fields->f_mask;
1125
0
      break;
1126
0
    case MT_OPERAND_MASK1 :
1127
0
      value = fields->f_mask1;
1128
0
      break;
1129
0
    case MT_OPERAND_MODE :
1130
0
      value = fields->f_mode;
1131
0
      break;
1132
0
    case MT_OPERAND_PERM :
1133
0
      value = fields->f_perm;
1134
0
      break;
1135
0
    case MT_OPERAND_RBBC :
1136
0
      value = fields->f_rbbc;
1137
0
      break;
1138
0
    case MT_OPERAND_RC :
1139
0
      value = fields->f_rc;
1140
0
      break;
1141
0
    case MT_OPERAND_RC1 :
1142
0
      value = fields->f_rc1;
1143
0
      break;
1144
0
    case MT_OPERAND_RC2 :
1145
0
      value = fields->f_rc2;
1146
0
      break;
1147
0
    case MT_OPERAND_RC3 :
1148
0
      value = fields->f_rc3;
1149
0
      break;
1150
0
    case MT_OPERAND_RCNUM :
1151
0
      value = fields->f_rcnum;
1152
0
      break;
1153
0
    case MT_OPERAND_RDA :
1154
0
      value = fields->f_rda;
1155
0
      break;
1156
0
    case MT_OPERAND_ROWNUM :
1157
0
      value = fields->f_rownum;
1158
0
      break;
1159
0
    case MT_OPERAND_ROWNUM1 :
1160
0
      value = fields->f_rownum1;
1161
0
      break;
1162
0
    case MT_OPERAND_ROWNUM2 :
1163
0
      value = fields->f_rownum2;
1164
0
      break;
1165
0
    case MT_OPERAND_SIZE :
1166
0
      value = fields->f_size;
1167
0
      break;
1168
0
    case MT_OPERAND_TYPE :
1169
0
      value = fields->f_type;
1170
0
      break;
1171
0
    case MT_OPERAND_WR :
1172
0
      value = fields->f_wr;
1173
0
      break;
1174
0
    case MT_OPERAND_XMODE :
1175
0
      value = fields->f_xmode;
1176
0
      break;
1177
1178
0
    default :
1179
      /* xgettext:c-format */
1180
0
      opcodes_error_handler
1181
0
  (_("internal error: unrecognized field %d while getting int operand"),
1182
0
   opindex);
1183
0
      abort ();
1184
0
  }
1185
1186
0
  return value;
1187
0
}
1188
1189
bfd_vma
1190
mt_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1191
           int opindex,
1192
           const CGEN_FIELDS * fields)
1193
0
{
1194
0
  bfd_vma value;
1195
1196
0
  switch (opindex)
1197
0
    {
1198
0
    case MT_OPERAND_A23 :
1199
0
      value = fields->f_a23;
1200
0
      break;
1201
0
    case MT_OPERAND_BALL :
1202
0
      value = fields->f_ball;
1203
0
      break;
1204
0
    case MT_OPERAND_BALL2 :
1205
0
      value = fields->f_ball2;
1206
0
      break;
1207
0
    case MT_OPERAND_BANKADDR :
1208
0
      value = fields->f_bankaddr;
1209
0
      break;
1210
0
    case MT_OPERAND_BRC :
1211
0
      value = fields->f_brc;
1212
0
      break;
1213
0
    case MT_OPERAND_BRC2 :
1214
0
      value = fields->f_brc2;
1215
0
      break;
1216
0
    case MT_OPERAND_CB1INCR :
1217
0
      value = fields->f_cb1incr;
1218
0
      break;
1219
0
    case MT_OPERAND_CB1SEL :
1220
0
      value = fields->f_cb1sel;
1221
0
      break;
1222
0
    case MT_OPERAND_CB2INCR :
1223
0
      value = fields->f_cb2incr;
1224
0
      break;
1225
0
    case MT_OPERAND_CB2SEL :
1226
0
      value = fields->f_cb2sel;
1227
0
      break;
1228
0
    case MT_OPERAND_CBRB :
1229
0
      value = fields->f_cbrb;
1230
0
      break;
1231
0
    case MT_OPERAND_CBS :
1232
0
      value = fields->f_cbs;
1233
0
      break;
1234
0
    case MT_OPERAND_CBX :
1235
0
      value = fields->f_cbx;
1236
0
      break;
1237
0
    case MT_OPERAND_CCB :
1238
0
      value = fields->f_ccb;
1239
0
      break;
1240
0
    case MT_OPERAND_CDB :
1241
0
      value = fields->f_cdb;
1242
0
      break;
1243
0
    case MT_OPERAND_CELL :
1244
0
      value = fields->f_cell;
1245
0
      break;
1246
0
    case MT_OPERAND_COLNUM :
1247
0
      value = fields->f_colnum;
1248
0
      break;
1249
0
    case MT_OPERAND_CONTNUM :
1250
0
      value = fields->f_contnum;
1251
0
      break;
1252
0
    case MT_OPERAND_CR :
1253
0
      value = fields->f_cr;
1254
0
      break;
1255
0
    case MT_OPERAND_CTXDISP :
1256
0
      value = fields->f_ctxdisp;
1257
0
      break;
1258
0
    case MT_OPERAND_DUP :
1259
0
      value = fields->f_dup;
1260
0
      break;
1261
0
    case MT_OPERAND_FBDISP :
1262
0
      value = fields->f_fbdisp;
1263
0
      break;
1264
0
    case MT_OPERAND_FBINCR :
1265
0
      value = fields->f_fbincr;
1266
0
      break;
1267
0
    case MT_OPERAND_FRDR :
1268
0
      value = fields->f_dr;
1269
0
      break;
1270
0
    case MT_OPERAND_FRDRRR :
1271
0
      value = fields->f_drrr;
1272
0
      break;
1273
0
    case MT_OPERAND_FRSR1 :
1274
0
      value = fields->f_sr1;
1275
0
      break;
1276
0
    case MT_OPERAND_FRSR2 :
1277
0
      value = fields->f_sr2;
1278
0
      break;
1279
0
    case MT_OPERAND_ID :
1280
0
      value = fields->f_id;
1281
0
      break;
1282
0
    case MT_OPERAND_IMM16 :
1283
0
      value = fields->f_imm16s;
1284
0
      break;
1285
0
    case MT_OPERAND_IMM16L :
1286
0
      value = fields->f_imm16l;
1287
0
      break;
1288
0
    case MT_OPERAND_IMM16O :
1289
0
      value = fields->f_imm16s;
1290
0
      break;
1291
0
    case MT_OPERAND_IMM16Z :
1292
0
      value = fields->f_imm16u;
1293
0
      break;
1294
0
    case MT_OPERAND_INCAMT :
1295
0
      value = fields->f_incamt;
1296
0
      break;
1297
0
    case MT_OPERAND_INCR :
1298
0
      value = fields->f_incr;
1299
0
      break;
1300
0
    case MT_OPERAND_LENGTH :
1301
0
      value = fields->f_length;
1302
0
      break;
1303
0
    case MT_OPERAND_LOOPSIZE :
1304
0
      value = fields->f_loopo;
1305
0
      break;
1306
0
    case MT_OPERAND_MASK :
1307
0
      value = fields->f_mask;
1308
0
      break;
1309
0
    case MT_OPERAND_MASK1 :
1310
0
      value = fields->f_mask1;
1311
0
      break;
1312
0
    case MT_OPERAND_MODE :
1313
0
      value = fields->f_mode;
1314
0
      break;
1315
0
    case MT_OPERAND_PERM :
1316
0
      value = fields->f_perm;
1317
0
      break;
1318
0
    case MT_OPERAND_RBBC :
1319
0
      value = fields->f_rbbc;
1320
0
      break;
1321
0
    case MT_OPERAND_RC :
1322
0
      value = fields->f_rc;
1323
0
      break;
1324
0
    case MT_OPERAND_RC1 :
1325
0
      value = fields->f_rc1;
1326
0
      break;
1327
0
    case MT_OPERAND_RC2 :
1328
0
      value = fields->f_rc2;
1329
0
      break;
1330
0
    case MT_OPERAND_RC3 :
1331
0
      value = fields->f_rc3;
1332
0
      break;
1333
0
    case MT_OPERAND_RCNUM :
1334
0
      value = fields->f_rcnum;
1335
0
      break;
1336
0
    case MT_OPERAND_RDA :
1337
0
      value = fields->f_rda;
1338
0
      break;
1339
0
    case MT_OPERAND_ROWNUM :
1340
0
      value = fields->f_rownum;
1341
0
      break;
1342
0
    case MT_OPERAND_ROWNUM1 :
1343
0
      value = fields->f_rownum1;
1344
0
      break;
1345
0
    case MT_OPERAND_ROWNUM2 :
1346
0
      value = fields->f_rownum2;
1347
0
      break;
1348
0
    case MT_OPERAND_SIZE :
1349
0
      value = fields->f_size;
1350
0
      break;
1351
0
    case MT_OPERAND_TYPE :
1352
0
      value = fields->f_type;
1353
0
      break;
1354
0
    case MT_OPERAND_WR :
1355
0
      value = fields->f_wr;
1356
0
      break;
1357
0
    case MT_OPERAND_XMODE :
1358
0
      value = fields->f_xmode;
1359
0
      break;
1360
1361
0
    default :
1362
      /* xgettext:c-format */
1363
0
      opcodes_error_handler
1364
0
  (_("internal error: unrecognized field %d while getting vma operand"),
1365
0
   opindex);
1366
0
      abort ();
1367
0
  }
1368
1369
0
  return value;
1370
0
}
1371
1372
void mt_cgen_set_int_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1373
void mt_cgen_set_vma_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1374
1375
/* Stuffing values in cgen_fields is handled by a collection of functions.
1376
   They are distinguished by the type of the VALUE argument they accept.
1377
   TODO: floating point, inlining support, remove cases where argument type
1378
   not appropriate.  */
1379
1380
void
1381
mt_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1382
           int opindex,
1383
           CGEN_FIELDS * fields,
1384
           int value)
1385
0
{
1386
0
  switch (opindex)
1387
0
    {
1388
0
    case MT_OPERAND_A23 :
1389
0
      fields->f_a23 = value;
1390
0
      break;
1391
0
    case MT_OPERAND_BALL :
1392
0
      fields->f_ball = value;
1393
0
      break;
1394
0
    case MT_OPERAND_BALL2 :
1395
0
      fields->f_ball2 = value;
1396
0
      break;
1397
0
    case MT_OPERAND_BANKADDR :
1398
0
      fields->f_bankaddr = value;
1399
0
      break;
1400
0
    case MT_OPERAND_BRC :
1401
0
      fields->f_brc = value;
1402
0
      break;
1403
0
    case MT_OPERAND_BRC2 :
1404
0
      fields->f_brc2 = value;
1405
0
      break;
1406
0
    case MT_OPERAND_CB1INCR :
1407
0
      fields->f_cb1incr = value;
1408
0
      break;
1409
0
    case MT_OPERAND_CB1SEL :
1410
0
      fields->f_cb1sel = value;
1411
0
      break;
1412
0
    case MT_OPERAND_CB2INCR :
1413
0
      fields->f_cb2incr = value;
1414
0
      break;
1415
0
    case MT_OPERAND_CB2SEL :
1416
0
      fields->f_cb2sel = value;
1417
0
      break;
1418
0
    case MT_OPERAND_CBRB :
1419
0
      fields->f_cbrb = value;
1420
0
      break;
1421
0
    case MT_OPERAND_CBS :
1422
0
      fields->f_cbs = value;
1423
0
      break;
1424
0
    case MT_OPERAND_CBX :
1425
0
      fields->f_cbx = value;
1426
0
      break;
1427
0
    case MT_OPERAND_CCB :
1428
0
      fields->f_ccb = value;
1429
0
      break;
1430
0
    case MT_OPERAND_CDB :
1431
0
      fields->f_cdb = value;
1432
0
      break;
1433
0
    case MT_OPERAND_CELL :
1434
0
      fields->f_cell = value;
1435
0
      break;
1436
0
    case MT_OPERAND_COLNUM :
1437
0
      fields->f_colnum = value;
1438
0
      break;
1439
0
    case MT_OPERAND_CONTNUM :
1440
0
      fields->f_contnum = value;
1441
0
      break;
1442
0
    case MT_OPERAND_CR :
1443
0
      fields->f_cr = value;
1444
0
      break;
1445
0
    case MT_OPERAND_CTXDISP :
1446
0
      fields->f_ctxdisp = value;
1447
0
      break;
1448
0
    case MT_OPERAND_DUP :
1449
0
      fields->f_dup = value;
1450
0
      break;
1451
0
    case MT_OPERAND_FBDISP :
1452
0
      fields->f_fbdisp = value;
1453
0
      break;
1454
0
    case MT_OPERAND_FBINCR :
1455
0
      fields->f_fbincr = value;
1456
0
      break;
1457
0
    case MT_OPERAND_FRDR :
1458
0
      fields->f_dr = value;
1459
0
      break;
1460
0
    case MT_OPERAND_FRDRRR :
1461
0
      fields->f_drrr = value;
1462
0
      break;
1463
0
    case MT_OPERAND_FRSR1 :
1464
0
      fields->f_sr1 = value;
1465
0
      break;
1466
0
    case MT_OPERAND_FRSR2 :
1467
0
      fields->f_sr2 = value;
1468
0
      break;
1469
0
    case MT_OPERAND_ID :
1470
0
      fields->f_id = value;
1471
0
      break;
1472
0
    case MT_OPERAND_IMM16 :
1473
0
      fields->f_imm16s = value;
1474
0
      break;
1475
0
    case MT_OPERAND_IMM16L :
1476
0
      fields->f_imm16l = value;
1477
0
      break;
1478
0
    case MT_OPERAND_IMM16O :
1479
0
      fields->f_imm16s = value;
1480
0
      break;
1481
0
    case MT_OPERAND_IMM16Z :
1482
0
      fields->f_imm16u = value;
1483
0
      break;
1484
0
    case MT_OPERAND_INCAMT :
1485
0
      fields->f_incamt = value;
1486
0
      break;
1487
0
    case MT_OPERAND_INCR :
1488
0
      fields->f_incr = value;
1489
0
      break;
1490
0
    case MT_OPERAND_LENGTH :
1491
0
      fields->f_length = value;
1492
0
      break;
1493
0
    case MT_OPERAND_LOOPSIZE :
1494
0
      fields->f_loopo = value;
1495
0
      break;
1496
0
    case MT_OPERAND_MASK :
1497
0
      fields->f_mask = value;
1498
0
      break;
1499
0
    case MT_OPERAND_MASK1 :
1500
0
      fields->f_mask1 = value;
1501
0
      break;
1502
0
    case MT_OPERAND_MODE :
1503
0
      fields->f_mode = value;
1504
0
      break;
1505
0
    case MT_OPERAND_PERM :
1506
0
      fields->f_perm = value;
1507
0
      break;
1508
0
    case MT_OPERAND_RBBC :
1509
0
      fields->f_rbbc = value;
1510
0
      break;
1511
0
    case MT_OPERAND_RC :
1512
0
      fields->f_rc = value;
1513
0
      break;
1514
0
    case MT_OPERAND_RC1 :
1515
0
      fields->f_rc1 = value;
1516
0
      break;
1517
0
    case MT_OPERAND_RC2 :
1518
0
      fields->f_rc2 = value;
1519
0
      break;
1520
0
    case MT_OPERAND_RC3 :
1521
0
      fields->f_rc3 = value;
1522
0
      break;
1523
0
    case MT_OPERAND_RCNUM :
1524
0
      fields->f_rcnum = value;
1525
0
      break;
1526
0
    case MT_OPERAND_RDA :
1527
0
      fields->f_rda = value;
1528
0
      break;
1529
0
    case MT_OPERAND_ROWNUM :
1530
0
      fields->f_rownum = value;
1531
0
      break;
1532
0
    case MT_OPERAND_ROWNUM1 :
1533
0
      fields->f_rownum1 = value;
1534
0
      break;
1535
0
    case MT_OPERAND_ROWNUM2 :
1536
0
      fields->f_rownum2 = value;
1537
0
      break;
1538
0
    case MT_OPERAND_SIZE :
1539
0
      fields->f_size = value;
1540
0
      break;
1541
0
    case MT_OPERAND_TYPE :
1542
0
      fields->f_type = value;
1543
0
      break;
1544
0
    case MT_OPERAND_WR :
1545
0
      fields->f_wr = value;
1546
0
      break;
1547
0
    case MT_OPERAND_XMODE :
1548
0
      fields->f_xmode = value;
1549
0
      break;
1550
1551
0
    default :
1552
      /* xgettext:c-format */
1553
0
      opcodes_error_handler
1554
0
  (_("internal error: unrecognized field %d while setting int operand"),
1555
0
   opindex);
1556
0
      abort ();
1557
0
  }
1558
0
}
1559
1560
void
1561
mt_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1562
           int opindex,
1563
           CGEN_FIELDS * fields,
1564
           bfd_vma value)
1565
0
{
1566
0
  switch (opindex)
1567
0
    {
1568
0
    case MT_OPERAND_A23 :
1569
0
      fields->f_a23 = value;
1570
0
      break;
1571
0
    case MT_OPERAND_BALL :
1572
0
      fields->f_ball = value;
1573
0
      break;
1574
0
    case MT_OPERAND_BALL2 :
1575
0
      fields->f_ball2 = value;
1576
0
      break;
1577
0
    case MT_OPERAND_BANKADDR :
1578
0
      fields->f_bankaddr = value;
1579
0
      break;
1580
0
    case MT_OPERAND_BRC :
1581
0
      fields->f_brc = value;
1582
0
      break;
1583
0
    case MT_OPERAND_BRC2 :
1584
0
      fields->f_brc2 = value;
1585
0
      break;
1586
0
    case MT_OPERAND_CB1INCR :
1587
0
      fields->f_cb1incr = value;
1588
0
      break;
1589
0
    case MT_OPERAND_CB1SEL :
1590
0
      fields->f_cb1sel = value;
1591
0
      break;
1592
0
    case MT_OPERAND_CB2INCR :
1593
0
      fields->f_cb2incr = value;
1594
0
      break;
1595
0
    case MT_OPERAND_CB2SEL :
1596
0
      fields->f_cb2sel = value;
1597
0
      break;
1598
0
    case MT_OPERAND_CBRB :
1599
0
      fields->f_cbrb = value;
1600
0
      break;
1601
0
    case MT_OPERAND_CBS :
1602
0
      fields->f_cbs = value;
1603
0
      break;
1604
0
    case MT_OPERAND_CBX :
1605
0
      fields->f_cbx = value;
1606
0
      break;
1607
0
    case MT_OPERAND_CCB :
1608
0
      fields->f_ccb = value;
1609
0
      break;
1610
0
    case MT_OPERAND_CDB :
1611
0
      fields->f_cdb = value;
1612
0
      break;
1613
0
    case MT_OPERAND_CELL :
1614
0
      fields->f_cell = value;
1615
0
      break;
1616
0
    case MT_OPERAND_COLNUM :
1617
0
      fields->f_colnum = value;
1618
0
      break;
1619
0
    case MT_OPERAND_CONTNUM :
1620
0
      fields->f_contnum = value;
1621
0
      break;
1622
0
    case MT_OPERAND_CR :
1623
0
      fields->f_cr = value;
1624
0
      break;
1625
0
    case MT_OPERAND_CTXDISP :
1626
0
      fields->f_ctxdisp = value;
1627
0
      break;
1628
0
    case MT_OPERAND_DUP :
1629
0
      fields->f_dup = value;
1630
0
      break;
1631
0
    case MT_OPERAND_FBDISP :
1632
0
      fields->f_fbdisp = value;
1633
0
      break;
1634
0
    case MT_OPERAND_FBINCR :
1635
0
      fields->f_fbincr = value;
1636
0
      break;
1637
0
    case MT_OPERAND_FRDR :
1638
0
      fields->f_dr = value;
1639
0
      break;
1640
0
    case MT_OPERAND_FRDRRR :
1641
0
      fields->f_drrr = value;
1642
0
      break;
1643
0
    case MT_OPERAND_FRSR1 :
1644
0
      fields->f_sr1 = value;
1645
0
      break;
1646
0
    case MT_OPERAND_FRSR2 :
1647
0
      fields->f_sr2 = value;
1648
0
      break;
1649
0
    case MT_OPERAND_ID :
1650
0
      fields->f_id = value;
1651
0
      break;
1652
0
    case MT_OPERAND_IMM16 :
1653
0
      fields->f_imm16s = value;
1654
0
      break;
1655
0
    case MT_OPERAND_IMM16L :
1656
0
      fields->f_imm16l = value;
1657
0
      break;
1658
0
    case MT_OPERAND_IMM16O :
1659
0
      fields->f_imm16s = value;
1660
0
      break;
1661
0
    case MT_OPERAND_IMM16Z :
1662
0
      fields->f_imm16u = value;
1663
0
      break;
1664
0
    case MT_OPERAND_INCAMT :
1665
0
      fields->f_incamt = value;
1666
0
      break;
1667
0
    case MT_OPERAND_INCR :
1668
0
      fields->f_incr = value;
1669
0
      break;
1670
0
    case MT_OPERAND_LENGTH :
1671
0
      fields->f_length = value;
1672
0
      break;
1673
0
    case MT_OPERAND_LOOPSIZE :
1674
0
      fields->f_loopo = value;
1675
0
      break;
1676
0
    case MT_OPERAND_MASK :
1677
0
      fields->f_mask = value;
1678
0
      break;
1679
0
    case MT_OPERAND_MASK1 :
1680
0
      fields->f_mask1 = value;
1681
0
      break;
1682
0
    case MT_OPERAND_MODE :
1683
0
      fields->f_mode = value;
1684
0
      break;
1685
0
    case MT_OPERAND_PERM :
1686
0
      fields->f_perm = value;
1687
0
      break;
1688
0
    case MT_OPERAND_RBBC :
1689
0
      fields->f_rbbc = value;
1690
0
      break;
1691
0
    case MT_OPERAND_RC :
1692
0
      fields->f_rc = value;
1693
0
      break;
1694
0
    case MT_OPERAND_RC1 :
1695
0
      fields->f_rc1 = value;
1696
0
      break;
1697
0
    case MT_OPERAND_RC2 :
1698
0
      fields->f_rc2 = value;
1699
0
      break;
1700
0
    case MT_OPERAND_RC3 :
1701
0
      fields->f_rc3 = value;
1702
0
      break;
1703
0
    case MT_OPERAND_RCNUM :
1704
0
      fields->f_rcnum = value;
1705
0
      break;
1706
0
    case MT_OPERAND_RDA :
1707
0
      fields->f_rda = value;
1708
0
      break;
1709
0
    case MT_OPERAND_ROWNUM :
1710
0
      fields->f_rownum = value;
1711
0
      break;
1712
0
    case MT_OPERAND_ROWNUM1 :
1713
0
      fields->f_rownum1 = value;
1714
0
      break;
1715
0
    case MT_OPERAND_ROWNUM2 :
1716
0
      fields->f_rownum2 = value;
1717
0
      break;
1718
0
    case MT_OPERAND_SIZE :
1719
0
      fields->f_size = value;
1720
0
      break;
1721
0
    case MT_OPERAND_TYPE :
1722
0
      fields->f_type = value;
1723
0
      break;
1724
0
    case MT_OPERAND_WR :
1725
0
      fields->f_wr = value;
1726
0
      break;
1727
0
    case MT_OPERAND_XMODE :
1728
0
      fields->f_xmode = value;
1729
0
      break;
1730
1731
0
    default :
1732
      /* xgettext:c-format */
1733
0
      opcodes_error_handler
1734
0
  (_("internal error: unrecognized field %d while setting vma operand"),
1735
0
   opindex);
1736
0
      abort ();
1737
0
  }
1738
0
}
1739
1740
/* Function to call before using the instruction builder tables.  */
1741
1742
void
1743
mt_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1744
7
{
1745
7
  cd->insert_handlers = & mt_cgen_insert_handlers[0];
1746
7
  cd->extract_handlers = & mt_cgen_extract_handlers[0];
1747
1748
7
  cd->insert_operand = mt_cgen_insert_operand;
1749
7
  cd->extract_operand = mt_cgen_extract_operand;
1750
1751
7
  cd->get_int_operand = mt_cgen_get_int_operand;
1752
7
  cd->set_int_operand = mt_cgen_set_int_operand;
1753
7
  cd->get_vma_operand = mt_cgen_get_vma_operand;
1754
7
  cd->set_vma_operand = mt_cgen_set_vma_operand;
1755
7
}