Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/pru-dis.c
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Source (jump to first uncovered line)
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/* TI PRU disassemble routines
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   Copyright (C) 2014-2024 Free Software Foundation, Inc.
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   Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
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5
   This file is part of the GNU opcodes library.
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7
   This library is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3, or (at your option)
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   any later version.
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   It is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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   License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this file; see the file COPYING.  If not, write to the
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   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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   MA 02110-1301, USA.  */
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22
#include "sysdep.h"
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#include "disassemble.h"
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#include "opcode/pru.h"
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#include "libiberty.h"
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#include <string.h>
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#include <assert.h>
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/* No symbol table is available when this code runs out in an embedded
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   system as when it is used for disassembler support in a monitor.  */
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#if !defined (EMBEDDED_ENV)
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#define SYMTAB_AVAILABLE 1
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#include "elf-bfd.h"
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#include "elf/pru.h"
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#endif
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37
/* Length of PRU instruction in bytes.  */
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101k
#define INSNLEN 4
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40
/* Return a pointer to an pru_opcode struct for a given instruction
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   opcode, or NULL if there is an error.  */
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const struct pru_opcode *
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pru_find_opcode (unsigned long opcode)
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25.4k
{
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25.4k
  const struct pru_opcode *p;
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25.4k
  const struct pru_opcode *op = NULL;
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25.4k
  const struct pru_opcode *pseudo_op = NULL;
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49
1.34M
  for (p = pru_opcodes; p < &pru_opcodes[NUMOPCODES]; p++)
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1.32M
    {
51
1.32M
      if ((p->mask & opcode) == p->match)
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20.6k
  {
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20.6k
    if ((p->pinfo & PRU_INSN_MACRO) == PRU_INSN_MACRO)
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12
      pseudo_op = p;
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20.6k
    else if ((p->pinfo & PRU_INSN_LDI32) == PRU_INSN_LDI32)
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225
      /* ignore - should be caught with regular patterns */;
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20.4k
    else
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20.4k
      op = p;
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20.6k
  }
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1.32M
    }
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25.4k
  return pseudo_op ? pseudo_op : op;
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25.4k
}
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/* There are 32 regular registers, each with 8 possible subfield selectors.  */
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#define NUMREGNAMES (32 * 8)
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static void
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pru_print_insn_arg_reg (unsigned int r, unsigned int sel,
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      disassemble_info *info)
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42.0k
{
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42.0k
  unsigned int i = r * RSEL_NUM_ITEMS + sel;
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42.0k
  assert (i < (unsigned int)pru_num_regs);
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42.0k
  assert (i < NUMREGNAMES);
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42.0k
  (*info->fprintf_func) (info->stream, "%s", pru_regs[i].name);
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42.0k
}
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/* The function pru_print_insn_arg uses the character pointed
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   to by ARGPTR to determine how it print the next token or separator
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   character in the arguments to an instruction.  */
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static int
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pru_print_insn_arg (const char *argptr,
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          unsigned long opcode, bfd_vma address,
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          disassemble_info *info)
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106k
{
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106k
  long offs = 0;
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106k
  unsigned long i = 0;
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106k
  unsigned long io = 0;
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90
106k
  switch (*argptr)
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106k
    {
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43.1k
    case ',':
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43.1k
      (*info->fprintf_func) (info->stream, "%c ", *argptr);
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43.1k
      break;
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8.13k
    case 'd':
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8.13k
      pru_print_insn_arg_reg (GET_INSN_FIELD (RD, opcode),
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8.13k
            GET_INSN_FIELD (RDSEL, opcode),
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8.13k
            info);
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8.13k
      break;
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5.91k
    case 'D':
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      /* The first 4 values for RDB and RSEL are the same, so we
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   can reuse some code.  */
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5.91k
      pru_print_insn_arg_reg (GET_INSN_FIELD (RD, opcode),
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5.91k
            GET_INSN_FIELD (RDB, opcode),
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5.91k
            info);
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5.91k
      break;
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12.4k
    case 's':
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12.4k
      pru_print_insn_arg_reg (GET_INSN_FIELD (RS1, opcode),
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12.4k
            GET_INSN_FIELD (RS1SEL, opcode),
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12.4k
            info);
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12.4k
      break;
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4.17k
    case 'S':
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4.17k
      pru_print_insn_arg_reg (GET_INSN_FIELD (RS1, opcode),
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4.17k
            RSEL_31_0,
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4.17k
            info);
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4.17k
      break;
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18.2k
    case 'b':
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18.2k
      io = GET_INSN_FIELD (IO, opcode);
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120
18.2k
      if (io)
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7.18k
  {
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7.18k
    i = GET_INSN_FIELD (IMM8, opcode);
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7.18k
    (*info->fprintf_func) (info->stream, "%ld", i);
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7.18k
  }
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11.0k
      else
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11.0k
  {
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11.0k
  pru_print_insn_arg_reg (GET_INSN_FIELD (RS2, opcode),
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11.0k
        GET_INSN_FIELD (RS2SEL, opcode),
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11.0k
        info);
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11.0k
  }
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18.2k
      break;
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351
    case 'B':
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351
      io = GET_INSN_FIELD (IO, opcode);
134
135
351
      if (io)
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189
  {
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189
    i = GET_INSN_FIELD (IMM8, opcode) + 1;
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189
    (*info->fprintf_func) (info->stream, "%ld", i);
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189
  }
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162
      else
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162
  {
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162
  pru_print_insn_arg_reg (GET_INSN_FIELD (RS2, opcode),
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162
        GET_INSN_FIELD (RS2SEL, opcode),
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162
        info);
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162
  }
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351
      break;
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204
    case 'j':
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204
      io = GET_INSN_FIELD (IO, opcode);
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150
204
      if (io)
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77
  {
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    /* For the sake of pretty-printing, dump text addresses with
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       their "virtual" offset that we use for distinguishing
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       PMEM vs DMEM. This is needed for printing the correct text
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       labels.  */
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77
    bfd_vma text_offset = address & ~0x3fffff;
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77
    i = GET_INSN_FIELD (IMM16, opcode) * 4;
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77
    (*info->print_address_func) (i + text_offset, info);
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77
  }
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127
      else
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127
  {
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127
    pru_print_insn_arg_reg (GET_INSN_FIELD (RS2, opcode),
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127
        GET_INSN_FIELD (RS2SEL, opcode),
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127
        info);
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127
  }
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204
      break;
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225
    case 'W':
168
225
      i = GET_INSN_FIELD (IMM16, opcode);
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225
      (*info->fprintf_func) (info->stream, "%ld", i);
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225
      break;
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5.57k
    case 'o':
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5.57k
      offs = GET_BROFF_SIGNED (opcode) * 4;
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5.57k
      (*info->print_address_func) (address + offs, info);
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5.57k
      break;
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351
    case 'O':
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351
      offs = GET_INSN_FIELD (LOOP_JMPOFFS, opcode) * 4;
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351
      (*info->print_address_func) (address + offs, info);
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351
      break;
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5.74k
    case 'l':
180
5.74k
      i = GET_BURSTLEN (opcode);
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5.74k
      if (i < LSSBBO_BYTECOUNT_R0_BITS7_0)
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4.37k
  (*info->fprintf_func) (info->stream, "%ld", i + 1);
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1.37k
      else
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1.37k
  {
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1.37k
    i -= LSSBBO_BYTECOUNT_R0_BITS7_0;
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1.37k
    (*info->fprintf_func) (info->stream, "r0.b%ld", i);
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1.37k
  }
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5.74k
      break;
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168
    case 'n':
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168
      i = GET_INSN_FIELD (XFR_LENGTH, opcode);
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168
      if (i < LSSBBO_BYTECOUNT_R0_BITS7_0)
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146
  (*info->fprintf_func) (info->stream, "%ld", i + 1);
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22
      else
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22
  {
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22
    i -= LSSBBO_BYTECOUNT_R0_BITS7_0;
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22
    (*info->fprintf_func) (info->stream, "r0.b%ld", i);
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22
  }
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168
      break;
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1.57k
    case 'c':
200
1.57k
      i = GET_INSN_FIELD (CB, opcode);
201
1.57k
      (*info->fprintf_func) (info->stream, "%ld", i);
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1.57k
      break;
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144
    case 'w':
204
144
      i = GET_INSN_FIELD (WAKEONSTATUS, opcode);
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144
      (*info->fprintf_func) (info->stream, "%ld", i);
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144
      break;
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168
    case 'x':
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168
      i = GET_INSN_FIELD (XFR_WBA, opcode);
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168
      (*info->fprintf_func) (info->stream, "%ld", i);
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168
      break;
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0
    default:
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0
      (*info->fprintf_func) (info->stream, "unknown");
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0
      break;
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106k
    }
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106k
  return 0;
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106k
}
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218
/* pru_disassemble does all the work of disassembling a PRU
219
   instruction opcode.  */
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static int
221
pru_disassemble (bfd_vma address, unsigned long opcode,
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       disassemble_info *info)
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25.4k
{
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25.4k
  const struct pru_opcode *op;
225
226
25.4k
  info->bytes_per_line = INSNLEN;
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25.4k
  info->bytes_per_chunk = INSNLEN;
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25.4k
  info->display_endian = info->endian;
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25.4k
  info->insn_info_valid = 1;
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25.4k
  info->branch_delay_insns = 0;
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25.4k
  info->data_size = 0;
232
25.4k
  info->insn_type = dis_nonbranch;
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25.4k
  info->target = 0;
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25.4k
  info->target2 = 0;
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236
  /* Find the major opcode and use this to disassemble
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     the instruction and its arguments.  */
238
25.4k
  op = pru_find_opcode (opcode);
239
240
25.4k
  if (op != NULL)
241
20.4k
    {
242
20.4k
      (*info->fprintf_func) (info->stream, "%s", op->name);
243
244
20.4k
      const char *argstr = op->args;
245
20.4k
      if (argstr != NULL && *argstr != '\0')
246
20.2k
  {
247
20.2k
    (*info->fprintf_func) (info->stream, "\t");
248
126k
    while (*argstr != '\0')
249
106k
      {
250
106k
        pru_print_insn_arg (argstr, opcode, address, info);
251
106k
        ++argstr;
252
106k
      }
253
20.2k
  }
254
20.4k
    }
255
5.01k
  else
256
5.01k
    {
257
      /* Handle undefined instructions.  */
258
5.01k
      info->insn_type = dis_noninsn;
259
5.01k
      (*info->fprintf_func) (info->stream, "0x%lx", opcode);
260
5.01k
    }
261
  /* Tell the caller how far to advance the program counter.  */
262
25.4k
  return INSNLEN;
263
25.4k
}
264
265
266
/* print_insn_pru is the main disassemble function for PRU.  */
267
int
268
print_insn_pru (bfd_vma address, disassemble_info *info)
269
25.4k
{
270
25.4k
  bfd_byte buffer[INSNLEN];
271
25.4k
  int status;
272
273
25.4k
  status = (*info->read_memory_func) (address, buffer, INSNLEN, info);
274
25.4k
  if (status == 0)
275
25.4k
    {
276
25.4k
      unsigned long insn;
277
25.4k
      insn = (unsigned long) bfd_getl32 (buffer);
278
25.4k
      status = pru_disassemble (address, insn, info);
279
25.4k
    }
280
43
  else
281
43
    {
282
43
      (*info->memory_error_func) (status, address, info);
283
43
      status = -1;
284
43
    }
285
25.4k
  return status;
286
25.4k
}