Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/riscv-dis.c
Line
Count
Source (jump to first uncovered line)
1
/* RISC-V disassembler
2
   Copyright (C) 2011-2024 Free Software Foundation, Inc.
3
4
   Contributed by Andrew Waterman (andrew@sifive.com).
5
   Based on MIPS target.
6
7
   This file is part of the GNU opcodes library.
8
9
   This library is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
19
   You should have received a copy of the GNU General Public License
20
   along with this program; see the file COPYING3. If not,
21
   see <http://www.gnu.org/licenses/>.  */
22
23
#include "sysdep.h"
24
#include "disassemble.h"
25
#include "libiberty.h"
26
#include "opcode/riscv.h"
27
#include "opintl.h"
28
#include "elf-bfd.h"
29
#include "elf/riscv.h"
30
#include "elfxx-riscv.h"
31
32
#include <stdint.h>
33
#include <ctype.h>
34
35
/* Current XLEN for the disassembler.  */
36
static unsigned xlen = 0;
37
38
/* Default ISA specification version (constant as of now).  */
39
static enum riscv_spec_class default_isa_spec = ISA_SPEC_CLASS_DRAFT - 1;
40
41
/* Default privileged specification
42
   (as specified by the ELF attributes or the `priv-spec' option).  */
43
static enum riscv_spec_class default_priv_spec = PRIV_SPEC_CLASS_NONE;
44
45
static riscv_subset_list_t riscv_subsets;
46
static riscv_parse_subset_t riscv_rps_dis =
47
{
48
  &riscv_subsets, /* subset_list.  */
49
  opcodes_error_handler,/* error_handler.  */
50
  &xlen,    /* xlen.  */
51
  &default_isa_spec,  /* isa_spec.  */
52
  false,    /* check_unknown_prefixed_ext.  */
53
};
54
55
struct riscv_private_data
56
{
57
  bfd_vma gp;
58
  bfd_vma print_addr;
59
  bfd_vma hi_addr[OP_MASK_RD + 1];
60
  bool to_print_addr;
61
  bool has_gp;
62
};
63
64
/* Used for mapping symbols.  */
65
static int last_map_symbol = -1;
66
static bfd_vma last_stop_offset = 0;
67
static bfd_vma last_map_symbol_boundary = 0;
68
static enum riscv_seg_mstate last_map_state = MAP_NONE;
69
static asection *last_map_section = NULL;
70
71
/* Register names as used by the disassembler.  */
72
static const char (*riscv_gpr_names)[NRC];
73
static const char (*riscv_fpr_names)[NRC];
74
75
/* If set, disassemble as most general instruction.  */
76
static bool no_aliases = false;
77
78
79
/* Set default RISC-V disassembler options.  */
80
81
static void
82
set_default_riscv_dis_options (void)
83
2
{
84
2
  riscv_gpr_names = riscv_gpr_names_abi;
85
2
  riscv_fpr_names = riscv_fpr_names_abi;
86
2
  no_aliases = false;
87
2
}
88
89
/* Parse RISC-V disassembler option (without arguments).  */
90
91
static bool
92
parse_riscv_dis_option_without_args (const char *option)
93
0
{
94
0
  if (strcmp (option, "no-aliases") == 0)
95
0
    no_aliases = true;
96
0
  else if (strcmp (option, "numeric") == 0)
97
0
    {
98
0
      riscv_gpr_names = riscv_gpr_names_numeric;
99
0
      riscv_fpr_names = riscv_fpr_names_numeric;
100
0
    }
101
0
  else
102
0
    return false;
103
0
  return true;
104
0
}
105
106
/* Parse RISC-V disassembler option (possibly with arguments).  */
107
108
static void
109
parse_riscv_dis_option (const char *option)
110
0
{
111
0
  char *equal, *value;
112
113
0
  if (parse_riscv_dis_option_without_args (option))
114
0
    return;
115
116
0
  equal = strchr (option, '=');
117
0
  if (equal == NULL)
118
0
    {
119
      /* The option without '=' should be defined above.  */
120
0
      opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
121
0
      return;
122
0
    }
123
0
  if (equal == option
124
0
      || *(equal + 1) == '\0')
125
0
    {
126
      /* Invalid options with '=', no option name before '=',
127
       and no value after '='.  */
128
0
      opcodes_error_handler (_("unrecognized disassembler option with '=': %s"),
129
0
                            option);
130
0
      return;
131
0
    }
132
133
0
  *equal = '\0';
134
0
  value = equal + 1;
135
0
  if (strcmp (option, "priv-spec") == 0)
136
0
    {
137
0
      enum riscv_spec_class priv_spec = PRIV_SPEC_CLASS_NONE;
138
0
      const char *name = NULL;
139
140
0
      RISCV_GET_PRIV_SPEC_CLASS (value, priv_spec);
141
0
      if (priv_spec == PRIV_SPEC_CLASS_NONE)
142
0
  opcodes_error_handler (_("unknown privileged spec set by %s=%s"),
143
0
             option, value);
144
0
      else if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
145
0
  default_priv_spec = priv_spec;
146
0
      else if (default_priv_spec != priv_spec)
147
0
  {
148
0
    RISCV_GET_PRIV_SPEC_NAME (name, default_priv_spec);
149
0
    opcodes_error_handler (_("mis-matched privilege spec set by %s=%s, "
150
0
           "the elf privilege attribute is %s"),
151
0
         option, value, name);
152
0
  }
153
0
    }
154
0
  else
155
0
    {
156
      /* xgettext:c-format */
157
0
      opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
158
0
    }
159
0
}
160
161
/* Parse RISC-V disassembler options.  */
162
163
static void
164
parse_riscv_dis_options (const char *opts_in)
165
0
{
166
0
  char *opts = xstrdup (opts_in), *opt = opts, *opt_end = opts;
167
168
0
  set_default_riscv_dis_options ();
169
170
0
  for ( ; opt_end != NULL; opt = opt_end + 1)
171
0
    {
172
0
      if ((opt_end = strchr (opt, ',')) != NULL)
173
0
  *opt_end = 0;
174
0
      parse_riscv_dis_option (opt);
175
0
    }
176
177
0
  free (opts);
178
0
}
179
180
/* Print one argument from an array.  */
181
182
static void
183
arg_print (struct disassemble_info *info, unsigned long val,
184
     const char* const* array, size_t size)
185
4.92k
{
186
4.92k
  const char *s = val >= size || array[val] == NULL ? "unknown" : array[val];
187
4.92k
  (*info->fprintf_styled_func) (info->stream, dis_style_text, "%s", s);
188
4.92k
}
189
190
/* If we need to print an address, set its value and state.  */
191
192
static void
193
maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset,
194
         int wide)
195
37.1k
{
196
37.1k
  if (pd->hi_addr[base_reg] != (bfd_vma)-1)
197
4.16k
    {
198
4.16k
      pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset;
199
4.16k
      pd->hi_addr[base_reg] = -1;
200
4.16k
    }
201
32.9k
  else if (base_reg == X_GP && pd->has_gp)
202
0
    pd->print_addr = pd->gp + offset;
203
32.9k
  else if (base_reg == X_TP || base_reg == 0)
204
2.94k
    pd->print_addr = offset;
205
29.9k
  else
206
29.9k
    return;  /* Don't print the address.  */
207
7.11k
  pd->to_print_addr = true;
208
209
  /* Sign-extend a 32-bit value to a 64-bit value.  */
210
7.11k
  if (wide)
211
933
    pd->print_addr = (bfd_vma)(int32_t) pd->print_addr;
212
213
  /* Fit into a 32-bit value on RV32.  */
214
7.11k
  if (xlen == 32)
215
1.68k
    pd->print_addr = (bfd_vma)(uint32_t)pd->print_addr;
216
7.11k
}
217
218
/* Get Zcmp reg_list field.  */
219
220
static void
221
print_reg_list (disassemble_info *info, insn_t l)
222
0
{
223
0
  bool numeric = riscv_gpr_names == riscv_gpr_names_numeric;
224
0
  unsigned reg_list = (int)EXTRACT_OPERAND (REG_LIST, l);
225
0
  unsigned r_start = numeric ? X_S2 : X_S0;
226
0
  info->fprintf_func (info->stream, "%s", riscv_gpr_names[X_RA]);
227
228
0
  if (reg_list == 5)
229
0
    info->fprintf_func (info->stream, ",%s",
230
0
      riscv_gpr_names[X_S0]);
231
0
  else if (reg_list == 6 || (numeric && reg_list > 6))
232
0
    info->fprintf_func (info->stream, ",%s-%s",
233
0
      riscv_gpr_names[X_S0],
234
0
      riscv_gpr_names[X_S1]);
235
0
  if (reg_list == 15)
236
0
    info->fprintf_func (info->stream, ",%s-%s",
237
0
      riscv_gpr_names[r_start],
238
0
      riscv_gpr_names[X_S11]);
239
0
  else if (reg_list == 7 && numeric)
240
0
    info->fprintf_func (info->stream, ",%s",
241
0
      riscv_gpr_names[X_S2]);
242
0
  else if (reg_list > 6)
243
0
    info->fprintf_func (info->stream, ",%s-%s",
244
0
      riscv_gpr_names[r_start],
245
0
      riscv_gpr_names[reg_list + 11]);
246
0
}
247
248
/* Get Zcmp sp adjustment immediate.  */
249
250
static int
251
riscv_get_spimm (insn_t l)
252
0
{
253
0
  int spimm = riscv_get_sp_base(l, *riscv_rps_dis.xlen);
254
0
  spimm += EXTRACT_ZCMP_SPIMM (l);
255
0
  if (((l ^ MATCH_CM_PUSH) & MASK_CM_PUSH) == 0)
256
0
    spimm *= -1;
257
0
  return spimm;
258
0
}
259
260
/* Print insn arguments for 32/64-bit code.  */
261
262
static void
263
print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info)
264
506k
{
265
506k
  struct riscv_private_data *pd = info->private_data;
266
506k
  int rs1 = (l >> OP_SH_RS1) & OP_MASK_RS1;
267
506k
  int rd = (l >> OP_SH_RD) & OP_MASK_RD;
268
506k
  fprintf_styled_ftype print = info->fprintf_styled_func;
269
506k
  const char *opargStart;
270
271
506k
  if (*oparg != '\0')
272
414k
    print (info->stream, dis_style_text, "\t");
273
274
2.55M
  for (; *oparg != '\0'; oparg++)
275
2.05M
    {
276
2.05M
      opargStart = oparg;
277
2.05M
      switch (*oparg)
278
2.05M
  {
279
897k
  case 'C': /* RVC */
280
897k
    switch (*++oparg)
281
897k
      {
282
144k
      case 's': /* RS1 x8-x15.  */
283
150k
      case 'w': /* RS1 x8-x15.  */
284
150k
        print (info->stream, dis_style_register, "%s",
285
150k
         riscv_gpr_names[EXTRACT_OPERAND (CRS1S, l) + 8]);
286
150k
        break;
287
106k
      case 't': /* RS2 x8-x15.  */
288
106k
      case 'x': /* RS2 x8-x15.  */
289
106k
        print (info->stream, dis_style_register, "%s",
290
106k
         riscv_gpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
291
106k
        break;
292
52.6k
      case 'U': /* RS1, constrained to equal RD.  */
293
52.6k
        print (info->stream, dis_style_register,
294
52.6k
         "%s", riscv_gpr_names[rd]);
295
52.6k
        break;
296
126k
      case 'c': /* RS1, constrained to equal sp.  */
297
126k
        print (info->stream, dis_style_register, "%s",
298
126k
         riscv_gpr_names[X_SP]);
299
126k
        break;
300
34.2k
      case 'V': /* RS2 */
301
34.2k
        print (info->stream, dis_style_register, "%s",
302
34.2k
         riscv_gpr_names[EXTRACT_OPERAND (CRS2, l)]);
303
34.2k
        break;
304
23.5k
      case 'o':
305
50.3k
      case 'j':
306
50.3k
        if (((l & MASK_C_ADDI) == MATCH_C_ADDI) && rd != 0)
307
21.8k
    maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 0);
308
50.3k
        if (info->mach == bfd_mach_riscv64
309
50.3k
      && ((l & MASK_C_ADDIW) == MATCH_C_ADDIW) && rd != 0)
310
3.39k
    maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 1);
311
50.3k
        print (info->stream, dis_style_immediate, "%d",
312
50.3k
         (int)EXTRACT_CITYPE_IMM (l));
313
50.3k
        break;
314
36.1k
      case 'k':
315
36.1k
        print (info->stream, dis_style_address_offset, "%d",
316
36.1k
         (int)EXTRACT_CLTYPE_LW_IMM (l));
317
36.1k
        break;
318
77.7k
      case 'l':
319
77.7k
        print (info->stream, dis_style_address_offset, "%d",
320
77.7k
         (int)EXTRACT_CLTYPE_LD_IMM (l));
321
77.7k
        break;
322
11.8k
      case 'm':
323
11.8k
        print (info->stream, dis_style_address_offset, "%d",
324
11.8k
         (int)EXTRACT_CITYPE_LWSP_IMM (l));
325
11.8k
        break;
326
27.8k
      case 'n':
327
27.8k
        print (info->stream, dis_style_address_offset, "%d",
328
27.8k
         (int)EXTRACT_CITYPE_LDSP_IMM (l));
329
27.8k
        break;
330
41.3k
      case 'K':
331
41.3k
        print (info->stream, dis_style_immediate, "%d",
332
41.3k
         (int)EXTRACT_CIWTYPE_ADDI4SPN_IMM (l));
333
41.3k
        break;
334
3.31k
      case 'L':
335
3.31k
        print (info->stream, dis_style_immediate, "%d",
336
3.31k
         (int)EXTRACT_CITYPE_ADDI16SP_IMM (l));
337
3.31k
        break;
338
16.8k
      case 'M':
339
16.8k
        print (info->stream, dis_style_address_offset, "%d",
340
16.8k
         (int)EXTRACT_CSSTYPE_SWSP_IMM (l));
341
16.8k
        break;
342
22.2k
      case 'N':
343
22.2k
        print (info->stream, dis_style_address_offset, "%d",
344
22.2k
         (int)EXTRACT_CSSTYPE_SDSP_IMM (l));
345
22.2k
        break;
346
22.5k
      case 'p':
347
22.5k
        info->target = EXTRACT_CBTYPE_IMM (l) + pc;
348
22.5k
        (*info->print_address_func) (info->target, info);
349
22.5k
        break;
350
13.8k
      case 'a':
351
13.8k
        info->target = EXTRACT_CJTYPE_IMM (l) + pc;
352
13.8k
        (*info->print_address_func) (info->target, info);
353
13.8k
        break;
354
13.3k
      case 'u':
355
13.3k
        print (info->stream, dis_style_immediate, "0x%x",
356
13.3k
         (unsigned)(EXTRACT_CITYPE_IMM (l) & (RISCV_BIGIMM_REACH-1)));
357
13.3k
        break;
358
26.5k
      case '>':
359
26.5k
        print (info->stream, dis_style_immediate, "0x%x",
360
26.5k
         (unsigned)EXTRACT_CITYPE_IMM (l) & 0x3f);
361
26.5k
        break;
362
0
      case '<':
363
0
        print (info->stream, dis_style_immediate, "0x%x",
364
0
         (unsigned)EXTRACT_CITYPE_IMM (l) & 0x1f);
365
0
        break;
366
12.5k
      case 'T': /* Floating-point RS2.  */
367
12.5k
        print (info->stream, dis_style_register, "%s",
368
12.5k
         riscv_fpr_names[EXTRACT_OPERAND (CRS2, l)]);
369
12.5k
        break;
370
49.8k
      case 'D': /* Floating-point RS2 x8-x15.  */
371
49.8k
        print (info->stream, dis_style_register, "%s",
372
49.8k
         riscv_fpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
373
49.8k
        break;
374
897k
      }
375
897k
    break;
376
377
897k
  case 'V': /* RVV */
378
0
    switch (*++oparg)
379
0
      {
380
0
      case 'd':
381
0
      case 'f':
382
0
        print (info->stream, dis_style_register, "%s",
383
0
         riscv_vecr_names_numeric[EXTRACT_OPERAND (VD, l)]);
384
0
        break;
385
0
      case 'e':
386
0
        if (!EXTRACT_OPERAND (VWD, l))
387
0
    print (info->stream, dis_style_register, "%s",
388
0
           riscv_gpr_names[0]);
389
0
        else
390
0
    print (info->stream, dis_style_register, "%s",
391
0
           riscv_vecr_names_numeric[EXTRACT_OPERAND (VD, l)]);
392
0
        break;
393
0
      case 's':
394
0
        print (info->stream, dis_style_register, "%s",
395
0
         riscv_vecr_names_numeric[EXTRACT_OPERAND (VS1, l)]);
396
0
        break;
397
0
      case 't':
398
0
      case 'u': /* VS1 == VS2 already verified at this point.  */
399
0
      case 'v': /* VD == VS1 == VS2 already verified at this point.  */
400
0
        print (info->stream, dis_style_register, "%s",
401
0
         riscv_vecr_names_numeric[EXTRACT_OPERAND (VS2, l)]);
402
0
        break;
403
0
      case '0':
404
0
        print (info->stream, dis_style_register, "%s",
405
0
         riscv_vecr_names_numeric[0]);
406
0
        break;
407
0
      case 'b':
408
0
      case 'c':
409
0
        {
410
0
    int imm = (*oparg == 'b') ? EXTRACT_RVV_VB_IMM (l)
411
0
            : EXTRACT_RVV_VC_IMM (l);
412
0
    unsigned int imm_vlmul = EXTRACT_OPERAND (VLMUL, imm);
413
0
    unsigned int imm_vsew = EXTRACT_OPERAND (VSEW, imm);
414
0
    unsigned int imm_vta = EXTRACT_OPERAND (VTA, imm);
415
0
    unsigned int imm_vma = EXTRACT_OPERAND (VMA, imm);
416
0
    unsigned int imm_vtype_res = (imm >> 8);
417
418
0
    if (imm_vsew < ARRAY_SIZE (riscv_vsew)
419
0
        && imm_vlmul < ARRAY_SIZE (riscv_vlmul)
420
0
        && imm_vta < ARRAY_SIZE (riscv_vta)
421
0
        && imm_vma < ARRAY_SIZE (riscv_vma)
422
0
        && !imm_vtype_res
423
0
        && riscv_vsew[imm_vsew] != NULL
424
0
        && riscv_vlmul[imm_vlmul] != NULL)
425
0
      print (info->stream, dis_style_text, "%s,%s,%s,%s",
426
0
       riscv_vsew[imm_vsew],
427
0
       riscv_vlmul[imm_vlmul], riscv_vta[imm_vta],
428
0
       riscv_vma[imm_vma]);
429
0
    else
430
0
      print (info->stream, dis_style_immediate, "%d", imm);
431
0
        }
432
0
        break;
433
0
      case 'i':
434
0
        print (info->stream, dis_style_immediate, "%d",
435
0
         (int)EXTRACT_RVV_VI_IMM (l));
436
0
        break;
437
0
      case 'j':
438
0
        print (info->stream, dis_style_immediate, "%d",
439
0
         (int)EXTRACT_RVV_VI_UIMM (l));
440
0
        break;
441
0
      case 'k':
442
0
        print (info->stream, dis_style_immediate, "%d",
443
0
         (int)EXTRACT_RVV_OFFSET (l));
444
0
        break;
445
0
      case 'l':
446
0
        print (info->stream, dis_style_immediate, "%d",
447
0
         (int)EXTRACT_RVV_VI_UIMM6 (l));
448
0
        break;
449
0
      case 'm':
450
0
        if (!EXTRACT_OPERAND (VMASK, l))
451
0
    {
452
0
      print (info->stream, dis_style_text, ",");
453
0
      print (info->stream, dis_style_register, "%s",
454
0
       riscv_vecm_names_numeric[0]);
455
0
    }
456
0
        break;
457
0
      }
458
0
    break;
459
460
515k
  case ',':
461
718k
  case '(':
462
921k
  case ')':
463
921k
  case '[':
464
921k
  case ']':
465
921k
  case '{':
466
921k
  case '}':
467
921k
    print (info->stream, dis_style_text, "%c", *oparg);
468
921k
    break;
469
470
328
  case '0':
471
    /* Only print constant 0 if it is the last argument.  */
472
328
    if (!oparg[1])
473
0
      print (info->stream, dis_style_immediate, "0");
474
328
    break;
475
476
16.4k
  case 's':
477
16.4k
    if ((l & MASK_JALR) == MATCH_JALR)
478
825
      maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0);
479
16.4k
    print (info->stream, dis_style_register, "%s", riscv_gpr_names[rs1]);
480
16.4k
    break;
481
482
5.77k
  case 't':
483
5.77k
    print (info->stream, dis_style_register, "%s",
484
5.77k
     riscv_gpr_names[EXTRACT_OPERAND (RS2, l)]);
485
5.77k
    break;
486
487
5.24k
  case 'u':
488
5.24k
    print (info->stream, dis_style_immediate, "0x%x",
489
5.24k
     (unsigned)EXTRACT_UTYPE_IMM (l) >> RISCV_IMM_BITS);
490
5.24k
    break;
491
492
4.50k
  case 'm':
493
4.50k
    arg_print (info, EXTRACT_OPERAND (RM, l),
494
4.50k
         riscv_rm, ARRAY_SIZE (riscv_rm));
495
4.50k
    break;
496
497
209
  case 'P':
498
209
    arg_print (info, EXTRACT_OPERAND (PRED, l),
499
209
         riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
500
209
    break;
501
502
209
  case 'Q':
503
209
    arg_print (info, EXTRACT_OPERAND (SUCC, l),
504
209
         riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
505
209
    break;
506
507
5.78k
  case 'o':
508
5.78k
    maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0);
509
    /* Fall through.  */
510
8.46k
  case 'j':
511
8.46k
    if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0)
512
8.46k
        || (l & MASK_JALR) == MATCH_JALR)
513
933
      maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0);
514
8.46k
    if (info->mach == bfd_mach_riscv64
515
8.46k
        && ((l & MASK_ADDIW) == MATCH_ADDIW) && rs1 != 0)
516
481
      maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 1);
517
8.46k
    print (info->stream, dis_style_immediate, "%d",
518
8.46k
     (int)EXTRACT_ITYPE_IMM (l));
519
8.46k
    break;
520
521
3.89k
  case 'q':
522
3.89k
    maybe_print_address (pd, rs1, EXTRACT_STYPE_IMM (l), 0);
523
3.89k
    print (info->stream, dis_style_address_offset, "%d",
524
3.89k
     (int)EXTRACT_STYPE_IMM (l));
525
3.89k
    break;
526
527
3.66k
  case 'a':
528
3.66k
    info->target = EXTRACT_JTYPE_IMM (l) + pc;
529
3.66k
    (*info->print_address_func) (info->target, info);
530
3.66k
    break;
531
532
2.19k
  case 'p':
533
2.19k
    info->target = EXTRACT_BTYPE_IMM (l) + pc;
534
2.19k
    (*info->print_address_func) (info->target, info);
535
2.19k
    break;
536
537
133k
  case 'd':
538
133k
    if ((l & MASK_AUIPC) == MATCH_AUIPC)
539
1.96k
      pd->hi_addr[rd] = pc + EXTRACT_UTYPE_IMM (l);
540
131k
    else if ((l & MASK_LUI) == MATCH_LUI)
541
3.27k
      pd->hi_addr[rd] = EXTRACT_UTYPE_IMM (l);
542
127k
    else if ((l & MASK_C_LUI) == MATCH_C_LUI)
543
13.3k
      pd->hi_addr[rd] = EXTRACT_CITYPE_LUI_IMM (l);
544
133k
    print (info->stream, dis_style_register, "%s", riscv_gpr_names[rd]);
545
133k
    break;
546
547
0
  case 'y':
548
0
    print (info->stream, dis_style_immediate, "0x%x",
549
0
     EXTRACT_OPERAND (BS, l));
550
0
    break;
551
552
0
  case 'z':
553
0
    print (info->stream, dis_style_register, "%s", riscv_gpr_names[0]);
554
0
    break;
555
556
138
  case '>':
557
138
    print (info->stream, dis_style_immediate, "0x%x",
558
138
     EXTRACT_OPERAND (SHAMT, l));
559
138
    break;
560
561
119
  case '<':
562
119
    print (info->stream, dis_style_immediate, "0x%x",
563
119
     EXTRACT_OPERAND (SHAMTW, l));
564
119
    break;
565
566
5.26k
  case 'S':
567
5.28k
  case 'U':
568
5.28k
    print (info->stream, dis_style_register, "%s", riscv_fpr_names[rs1]);
569
5.28k
    break;
570
571
6.12k
  case 'T':
572
6.12k
    print (info->stream, dis_style_register, "%s",
573
6.12k
     riscv_fpr_names[EXTRACT_OPERAND (RS2, l)]);
574
6.12k
    break;
575
576
26.3k
  case 'D':
577
26.3k
    print (info->stream, dis_style_register, "%s", riscv_fpr_names[rd]);
578
26.3k
    break;
579
580
4.87k
  case 'R':
581
4.87k
    print (info->stream, dis_style_register, "%s",
582
4.87k
     riscv_fpr_names[EXTRACT_OPERAND (RS3, l)]);
583
4.87k
    break;
584
585
4.26k
  case 'E':
586
4.26k
    {
587
4.26k
      static const char *riscv_csr_hash[4096]; /* Total 2^12 CSRs.  */
588
4.26k
      static bool init_csr = false;
589
4.26k
      unsigned int csr = EXTRACT_OPERAND (CSR, l);
590
591
4.26k
      if (!init_csr)
592
4.26k
        {
593
4.26k
    unsigned int i;
594
17.4M
    for (i = 0; i < 4096; i++)
595
17.4M
      riscv_csr_hash[i] = NULL;
596
597
    /* Set to the newest privileged version.  */
598
4.26k
    if (default_priv_spec == PRIV_SPEC_CLASS_NONE)
599
2
      default_priv_spec = PRIV_SPEC_CLASS_DRAFT - 1;
600
601
4.26k
#define DECLARE_CSR(name, num, class, define_version, abort_version)  \
602
1.85M
    if (riscv_csr_hash[num] == NULL      \
603
1.85M
        && ((define_version == PRIV_SPEC_CLASS_NONE  \
604
1.79M
       && abort_version == PRIV_SPEC_CLASS_NONE) \
605
1.79M
      || (default_priv_spec >= define_version  \
606
1.21M
          && default_priv_spec < abort_version))) \
607
1.85M
      riscv_csr_hash[num] = #name;
608
4.26k
#define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
609
63.9k
    DECLARE_CSR (name, num, class, define_version, abort_version)
610
4.26k
#include "opcode/riscv-opc.h"
611
4.26k
#undef DECLARE_CSR
612
4.26k
        }
613
614
4.26k
      if (riscv_csr_hash[csr] != NULL)
615
562
        if (riscv_subset_supports (&riscv_rps_dis, "xtheadvector")
616
562
      && (csr == CSR_VSTART
617
0
          || csr == CSR_VXSAT
618
0
          || csr == CSR_VXRM
619
0
          || csr == CSR_VL
620
0
          || csr == CSR_VTYPE
621
0
          || csr == CSR_VLENB))
622
0
    print (info->stream, dis_style_register, "%s",
623
0
           concat ("th.", riscv_csr_hash[csr], NULL));
624
562
        else
625
562
    print (info->stream, dis_style_register, "%s",
626
562
           riscv_csr_hash[csr]);
627
3.70k
      else
628
3.70k
        print (info->stream, dis_style_immediate, "0x%x", csr);
629
4.26k
      break;
630
5.26k
    }
631
632
0
  case 'Y':
633
0
    print (info->stream, dis_style_immediate, "0x%x",
634
0
     EXTRACT_OPERAND (RNUM, l));
635
0
    break;
636
637
3.38k
  case 'Z':
638
3.38k
    print (info->stream, dis_style_immediate, "%d", rs1);
639
3.38k
    break;
640
641
0
  case 'W': /* Various operands for standard z extensions.  */
642
0
    switch (*++oparg)
643
0
      {
644
0
      case 'i':
645
0
        switch (*++oparg)
646
0
    {
647
0
    case 'f':
648
0
      print (info->stream, dis_style_address_offset, "%d",
649
0
       (int) EXTRACT_STYPE_IMM (l));
650
0
      break;
651
0
    default:
652
0
      goto undefined_modifier;
653
0
    }
654
0
        break;
655
0
      case 'f':
656
0
        switch (*++oparg)
657
0
    {
658
0
    case 'v':
659
0
      if (riscv_fli_symval[rs1])
660
0
        print (info->stream, dis_style_text, "%s",
661
0
         riscv_fli_symval[rs1]);
662
0
      else
663
0
        print (info->stream, dis_style_immediate, "%a",
664
0
         riscv_fli_numval[rs1]);
665
0
      break;
666
0
    default:
667
0
      goto undefined_modifier;
668
0
    }
669
0
        break;
670
0
      case 'c': /* Zcb extension 16 bits length instruction fields. */
671
0
        switch (*++oparg)
672
0
    {
673
0
    case 'b':
674
0
      print (info->stream, dis_style_immediate, "%d",
675
0
       (int)EXTRACT_ZCB_BYTE_UIMM (l));
676
0
      break;
677
0
    case 'h':
678
0
      print (info->stream, dis_style_immediate, "%d",
679
0
       (int)EXTRACT_ZCB_HALFWORD_UIMM (l));
680
0
      break;
681
0
    case 'r':
682
0
      print_reg_list (info, l);
683
0
      break;
684
0
    case 'p':
685
0
      print (info->stream, dis_style_immediate, "%d",
686
0
       riscv_get_spimm (l));
687
0
      break;
688
0
    default:
689
0
      goto undefined_modifier;
690
0
    }
691
0
        break;
692
0
      default:
693
0
        goto undefined_modifier;
694
0
      }
695
0
    break;
696
697
0
  case 'X': /* Vendor-specific operands.  */
698
0
    switch (*++oparg)
699
0
      {
700
0
      case 't': /* Vendor-specific (T-head) operands.  */
701
0
        {
702
0
    size_t n;
703
0
    size_t s;
704
0
    bool sign;
705
0
    switch (*++oparg)
706
0
      {
707
0
      case 'V':
708
0
       ++oparg;
709
0
       if (*oparg != 'c')
710
0
          goto undefined_modifier;
711
712
0
        int imm = (*oparg == 'b') ? EXTRACT_RVV_VB_IMM (l)
713
0
                : EXTRACT_RVV_VC_IMM (l);
714
0
        unsigned int imm_vediv = EXTRACT_OPERAND (XTHEADVEDIV, imm);
715
0
        unsigned int imm_vlmul = EXTRACT_OPERAND (XTHEADVLMUL, imm);
716
0
        unsigned int imm_vsew = EXTRACT_OPERAND (XTHEADVSEW, imm);
717
0
        unsigned int imm_vtype_res
718
0
          = EXTRACT_OPERAND (XTHEADVTYPE_RES, imm);
719
0
        if (imm_vsew < ARRAY_SIZE (riscv_vsew)
720
0
      && imm_vlmul < ARRAY_SIZE (riscv_th_vlen)
721
0
      && imm_vediv < ARRAY_SIZE (riscv_th_vediv)
722
0
      && ! imm_vtype_res)
723
0
          print (info->stream, dis_style_text, "%s,%s,%s",
724
0
           riscv_vsew[imm_vsew], riscv_th_vlen[imm_vlmul],
725
0
           riscv_th_vediv[imm_vediv]);
726
0
        else
727
0
          print (info->stream, dis_style_immediate, "%d", imm);
728
0
        break;
729
0
      case 'l': /* Integer immediate, literal.  */
730
0
        oparg++;
731
0
        while (*oparg && *oparg != ',')
732
0
          {
733
0
      print (info->stream, dis_style_immediate, "%c", *oparg);
734
0
      oparg++;
735
0
          }
736
0
        oparg--;
737
0
        break;
738
0
      case 's': /* Integer immediate, 'XsN@S' ... N-bit signed immediate at bit S.  */
739
0
        sign = true;
740
0
        goto print_imm;
741
0
      case 'u': /* Integer immediate, 'XuN@S' ... N-bit unsigned immediate at bit S.  */
742
0
        sign = false;
743
0
        goto print_imm;
744
0
      print_imm:
745
0
        n = strtol (oparg + 1, (char **)&oparg, 10);
746
0
        if (*oparg != '@')
747
0
          goto undefined_modifier;
748
0
        s = strtol (oparg + 1, (char **)&oparg, 10);
749
0
        oparg--;
750
751
0
        if (!sign)
752
0
          print (info->stream, dis_style_immediate, "%lu",
753
0
           (unsigned long)EXTRACT_U_IMM (n, s, l));
754
0
        else
755
0
          print (info->stream, dis_style_immediate, "%li",
756
0
           (signed long)EXTRACT_S_IMM (n, s, l));
757
0
        break;
758
0
      default:
759
0
        goto undefined_modifier;
760
0
      }
761
0
        }
762
0
        break;
763
0
      case 'c': /* Vendor-specific (CORE-V) operands.  */
764
0
        switch (*++oparg)
765
0
    {
766
0
      case '2':
767
0
        print (info->stream, dis_style_immediate, "%d",
768
0
      ((int) EXTRACT_CV_IS2_UIMM5 (l)));
769
0
        break;
770
0
      case '3':
771
0
        print (info->stream, dis_style_immediate, "%d",
772
0
      ((int) EXTRACT_CV_IS3_UIMM5 (l)));
773
0
        break;
774
0
      default:
775
0
        goto undefined_modifier;
776
0
    }
777
0
        break;
778
0
      case 's': /* Vendor-specific (SiFive) operands.  */
779
0
        switch (*++oparg)
780
0
    {
781
    /* SiFive vector coprocessor interface.  */
782
0
    case 'd':
783
0
      print (info->stream, dis_style_register, "0x%x",
784
0
       (unsigned) EXTRACT_OPERAND (RD, l));
785
0
      break;
786
0
    case 't':
787
0
      print (info->stream, dis_style_register, "0x%x",
788
0
       (unsigned) EXTRACT_OPERAND (RS2, l));
789
0
      break;
790
0
    case 'O':
791
0
      switch (*++oparg)
792
0
        {
793
0
        case '2':
794
0
          print (info->stream, dis_style_register, "0x%x",
795
0
           (unsigned) EXTRACT_OPERAND (XSO2, l));
796
0
          break;
797
0
        case '1':
798
0
          print (info->stream, dis_style_register, "0x%x",
799
0
           (unsigned) EXTRACT_OPERAND (XSO1, l));
800
0
          break;
801
0
        }
802
0
      break;
803
0
    }
804
0
        break;
805
0
      default:
806
0
        goto undefined_modifier;
807
0
      }
808
0
    break;
809
810
0
  default:
811
0
  undefined_modifier:
812
    /* xgettext:c-format */
813
0
    print (info->stream, dis_style_text,
814
0
     _("# internal error, undefined modifier (%c)"),
815
0
     *opargStart);
816
0
    return;
817
2.05M
  }
818
2.05M
    }
819
506k
}
820
821
/* Print the RISC-V instruction at address MEMADDR in debugged memory,
822
   on using INFO.  Returns length of the instruction, in bytes.
823
   BIGENDIAN must be 1 if this is big-endian code, 0 if
824
   this is little-endian code.  */
825
826
static int
827
riscv_disassemble_insn (bfd_vma memaddr,
828
      insn_t word,
829
      const bfd_byte *packet,
830
      disassemble_info *info)
831
645k
{
832
645k
  const struct riscv_opcode *op;
833
645k
  static bool init = false;
834
645k
  static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1];
835
645k
  struct riscv_private_data *pd = info->private_data;
836
645k
  int insnlen, i;
837
645k
  bool printed;
838
839
650k
#define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP))
840
841
  /* Build a hash table to shorten the search time.  */
842
645k
  if (! init)
843
2
    {
844
4.95k
      for (op = riscv_opcodes; op->name; op++)
845
4.95k
  if (!riscv_hash[OP_HASH_IDX (op->match)])
846
60
    riscv_hash[OP_HASH_IDX (op->match)] = op;
847
848
2
      init = true;
849
2
    }
850
851
645k
  insnlen = riscv_insn_length (word);
852
853
  /* RISC-V instructions are always little-endian.  */
854
645k
  info->endian_code = BFD_ENDIAN_LITTLE;
855
856
645k
  info->bytes_per_chunk = insnlen % 4 == 0 ? 4 : 2;
857
645k
  info->bytes_per_line = 8;
858
  /* We don't support constant pools, so this must be code.  */
859
645k
  info->display_endian = info->endian_code;
860
645k
  info->insn_info_valid = 1;
861
645k
  info->branch_delay_insns = 0;
862
645k
  info->data_size = 0;
863
645k
  info->insn_type = dis_nonbranch;
864
645k
  info->target = 0;
865
645k
  info->target2 = 0;
866
867
645k
  op = riscv_hash[OP_HASH_IDX (word)];
868
645k
  if (op != NULL)
869
623k
    {
870
      /* If XLEN is not known, get its value from the ELF class.  */
871
623k
      if (info->mach == bfd_mach_riscv64)
872
191k
  xlen = 64;
873
431k
      else if (info->mach == bfd_mach_riscv32)
874
119k
  xlen = 32;
875
311k
      else if (info->section != NULL)
876
0
  {
877
0
    Elf_Internal_Ehdr *ehdr = elf_elfheader (info->section->owner);
878
0
    xlen = ehdr->e_ident[EI_CLASS] == ELFCLASS64 ? 64 : 32;
879
0
  }
880
881
      /* If arch has the Zfinx extension, replace FPR with GPR.  */
882
623k
      if (riscv_subset_supports (&riscv_rps_dis, "zfinx"))
883
0
  riscv_fpr_names = riscv_gpr_names;
884
623k
      else
885
623k
  riscv_fpr_names = riscv_gpr_names == riscv_gpr_names_abi ?
886
623k
        riscv_fpr_names_abi : riscv_fpr_names_numeric;
887
888
342M
      for (; op->name; op++)
889
342M
  {
890
    /* Ignore macro insns.  */
891
342M
    if (op->pinfo == INSN_MACRO)
892
9.13M
      continue;
893
    /* Does the opcode match?  */
894
333M
    if (! (op->match_func) (op, word))
895
332M
      continue;
896
    /* Is this a pseudo-instruction and may we print it as such?  */
897
573k
    if (no_aliases && (op->pinfo & INSN_ALIAS))
898
0
      continue;
899
    /* Is this instruction restricted to a certain value of XLEN?  */
900
573k
    if ((op->xlen_requirement != 0) && (op->xlen_requirement != xlen))
901
34.2k
      continue;
902
    /* Is this instruction supported by the current architecture?  */
903
539k
    if (!riscv_multi_subset_supports (&riscv_rps_dis, op->insn_class))
904
33.6k
      continue;
905
906
    /* It's a match.  */
907
506k
    (*info->fprintf_styled_func) (info->stream, dis_style_mnemonic,
908
506k
          "%s", op->name);
909
506k
    print_insn_args (op->args, word, memaddr, info);
910
911
    /* Try to disassemble multi-instruction addressing sequences.  */
912
506k
    if (pd->to_print_addr)
913
6.84k
      {
914
6.84k
        info->target = pd->print_addr;
915
6.84k
        (*info->fprintf_styled_func)
916
6.84k
    (info->stream, dis_style_comment_start, " # ");
917
6.84k
        (*info->print_address_func) (info->target, info);
918
6.84k
        pd->to_print_addr = false;
919
6.84k
      }
920
921
    /* Finish filling out insn_info fields.  */
922
506k
    switch (op->pinfo & INSN_TYPE)
923
506k
      {
924
13.5k
      case INSN_BRANCH:
925
13.5k
        info->insn_type = dis_branch;
926
13.5k
        break;
927
24.7k
      case INSN_CONDBRANCH:
928
24.7k
        info->insn_type = dis_condbranch;
929
24.7k
        break;
930
5.87k
      case INSN_JSR:
931
5.87k
        info->insn_type = dis_jsr;
932
5.87k
        break;
933
202k
      case INSN_DREF:
934
202k
        info->insn_type = dis_dref;
935
202k
        break;
936
259k
      default:
937
259k
        break;
938
506k
      }
939
940
506k
    if (op->pinfo & INSN_DATA_SIZE)
941
202k
      {
942
202k
        int size = ((op->pinfo & INSN_DATA_SIZE)
943
202k
        >> INSN_DATA_SIZE_SHIFT);
944
202k
        info->data_size = 1 << (size - 1);
945
202k
      }
946
947
506k
    return insnlen;
948
506k
  }
949
623k
    }
950
951
  /* We did not find a match, so just print the instruction bits in
952
     the shape of an assembler .insn directive.  */
953
139k
  info->insn_type = dis_noninsn;
954
139k
  (*info->fprintf_styled_func)
955
139k
    (info->stream, dis_style_assembler_directive, ".insn");
956
139k
  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
957
139k
  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
958
139k
        "%d", insnlen);
959
139k
  (*info->fprintf_styled_func) (info->stream, dis_style_text, ", ");
960
139k
  (*info->fprintf_styled_func) (info->stream, dis_style_immediate, "0x");
961
427k
  for (i = insnlen, printed = false; i >= 2; )
962
287k
    {
963
287k
      i -= 2;
964
287k
      word = bfd_get_bits (packet + i, 16, false);
965
287k
      if (!word && !printed)
966
7.00k
  continue;
967
968
280k
      (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
969
280k
            "%04x", (unsigned int) word);
970
280k
      printed = true;
971
280k
    }
972
973
139k
  return insnlen;
974
645k
}
975
976
/* If we find the suitable mapping symbol update the STATE.
977
   Otherwise, do nothing.  */
978
979
static void
980
riscv_update_map_state (int n,
981
      enum riscv_seg_mstate *state,
982
      struct disassemble_info *info)
983
0
{
984
0
  const char *name;
985
986
  /* If the symbol is in a different section, ignore it.  */
987
0
  if (info->section != NULL
988
0
      && info->section != info->symtab[n]->section)
989
0
    return;
990
991
0
  name = bfd_asymbol_name(info->symtab[n]);
992
0
  if (strcmp (name, "$x") == 0)
993
0
    *state = MAP_INSN;
994
0
  else if (strcmp (name, "$d") == 0)
995
0
    *state = MAP_DATA;
996
0
  else if (strncmp (name, "$xrv", 4) == 0)
997
0
    {
998
0
      *state = MAP_INSN;
999
0
      riscv_release_subset_list (&riscv_subsets);
1000
1001
      /* ISA mapping string may be numbered, suffixed with '.n'. Do not
1002
   consider this as part of the ISA string.  */
1003
0
      char *suffix = strchr (name, '.');
1004
0
      if (suffix)
1005
0
  {
1006
0
    int suffix_index = (int)(suffix - name);
1007
0
    char *name_substr = xmalloc (suffix_index + 1);
1008
0
    strncpy (name_substr, name, suffix_index);
1009
0
    name_substr[suffix_index] = '\0';
1010
0
    riscv_parse_subset (&riscv_rps_dis, name_substr + 2);
1011
0
    free (name_substr);
1012
0
  }
1013
0
      else
1014
0
  riscv_parse_subset (&riscv_rps_dis, name + 2);
1015
0
    }
1016
0
}
1017
1018
/* Return true if we find the suitable mapping symbol.
1019
   Otherwise, return false.  */
1020
1021
static bool
1022
riscv_is_valid_mapping_symbol (int n,
1023
           struct disassemble_info *info)
1024
120k
{
1025
120k
  const char *name;
1026
1027
  /* If the symbol is in a different section, ignore it.  */
1028
120k
  if (info->section != NULL
1029
120k
      && info->section != info->symtab[n]->section)
1030
120k
    return false;
1031
1032
175
  name = bfd_asymbol_name(info->symtab[n]);
1033
175
  return riscv_elf_is_mapping_symbols (name);
1034
120k
}
1035
1036
/* Check the sorted symbol table (sorted by the symbol value), find the
1037
   suitable mapping symbols.  */
1038
1039
static enum riscv_seg_mstate
1040
riscv_search_mapping_symbol (bfd_vma memaddr,
1041
           struct disassemble_info *info)
1042
646k
{
1043
646k
  enum riscv_seg_mstate mstate;
1044
646k
  bool from_last_map_symbol;
1045
646k
  bool found = false;
1046
646k
  int symbol = -1;
1047
646k
  int n;
1048
1049
  /* Return the last map state if the address is still within the range of the
1050
     last mapping symbol.  */
1051
646k
  if (last_map_section == info->section
1052
646k
      && (memaddr < last_map_symbol_boundary))
1053
0
    return last_map_state;
1054
1055
646k
  last_map_section = info->section;
1056
1057
  /* Decide whether to print the data or instruction by default, in case
1058
     we can not find the corresponding mapping symbols.  */
1059
646k
  mstate = MAP_DATA;
1060
646k
  if ((info->section
1061
646k
       && info->section->flags & SEC_CODE)
1062
646k
      || !info->section)
1063
512k
    mstate = MAP_INSN;
1064
1065
646k
  if (info->symtab_size == 0
1066
646k
      || bfd_asymbol_flavour (*info->symtab) != bfd_target_elf_flavour)
1067
641k
    return mstate;
1068
1069
  /* Reset the last_map_symbol if we start to dump a new section.  */
1070
4.76k
  if (memaddr <= 0)
1071
43
    last_map_symbol = -1;
1072
1073
  /* If the last stop offset is different from the current one, then
1074
     don't use the last_map_symbol to search.  We usually reset the
1075
     info->stop_offset when handling a new section.  */
1076
4.76k
  from_last_map_symbol = (last_map_symbol >= 0
1077
4.76k
        && info->stop_offset == last_stop_offset);
1078
1079
  /* Start scanning from wherever we finished last time, or the start
1080
     of the function.  */
1081
4.76k
  n = from_last_map_symbol ? last_map_symbol : info->symtab_pos + 1;
1082
1083
  /* Find the suitable mapping symbol to dump.  */
1084
125k
  for (; n < info->symtab_size; n++)
1085
125k
    {
1086
125k
      bfd_vma addr = bfd_asymbol_value (info->symtab[n]);
1087
      /* We have searched all possible symbols in the range.  */
1088
125k
      if (addr > memaddr)
1089
4.76k
  break;
1090
120k
      if (riscv_is_valid_mapping_symbol (n, info))
1091
0
  {
1092
0
    symbol = n;
1093
0
    found = true;
1094
    /* Do not stop searching, in case there are some mapping
1095
       symbols have the same value, but have different names.
1096
       Use the last one.  */
1097
0
  }
1098
120k
    }
1099
1100
  /* We can not find the suitable mapping symbol above.  Therefore, we
1101
     look forwards and try to find it again, but don't go past the start
1102
     of the section.  Otherwise a data section without mapping symbols
1103
     can pick up a text mapping symbol of a preceeding section.  */
1104
4.76k
  if (!found)
1105
4.76k
    {
1106
4.76k
      n = from_last_map_symbol ? last_map_symbol : info->symtab_pos;
1107
1108
4.86k
      for (; n >= 0; n--)
1109
245
  {
1110
245
    bfd_vma addr = bfd_asymbol_value (info->symtab[n]);
1111
    /* We have searched all possible symbols in the range.  */
1112
245
    if (addr < (info->section ? info->section->vma : 0))
1113
142
      break;
1114
    /* Stop searching once we find the closed mapping symbol.  */
1115
103
    if (riscv_is_valid_mapping_symbol (n, info))
1116
0
      {
1117
0
        symbol = n;
1118
0
        found = true;
1119
0
        break;
1120
0
      }
1121
103
  }
1122
4.76k
    }
1123
1124
4.76k
  if (found)
1125
0
    {
1126
0
      riscv_update_map_state (symbol, &mstate, info);
1127
1128
      /* Find the next mapping symbol to determine the boundary of this mapping
1129
   symbol.  */
1130
1131
0
      bool found_next = false;
1132
      /* Try to found next mapping symbol.  */
1133
0
      for (n = symbol + 1; n < info->symtab_size; n++)
1134
0
  {
1135
0
    if (info->symtab[symbol]->section != info->symtab[n]->section)
1136
0
      continue;
1137
1138
0
    bfd_vma addr = bfd_asymbol_value (info->symtab[n]);
1139
0
    const char *sym_name = bfd_asymbol_name(info->symtab[n]);
1140
0
    if (sym_name[0] == '$' && (sym_name[1] == 'x' || sym_name[1] == 'd'))
1141
0
      {
1142
        /* The next mapping symbol has been found, and it represents the
1143
     boundary of this mapping symbol.  */
1144
0
        found_next = true;
1145
0
        last_map_symbol_boundary = addr;
1146
0
        break;
1147
0
      }
1148
0
  }
1149
1150
      /* No further mapping symbol has been found, indicating that the boundary
1151
   of the current mapping symbol is the end of this section.  */
1152
0
      if (!found_next)
1153
0
  last_map_symbol_boundary = info->section->vma + info->section->size;
1154
0
    }
1155
1156
  /* Save the information for next use.  */
1157
4.76k
  last_map_symbol = symbol;
1158
4.76k
  last_stop_offset = info->stop_offset;
1159
1160
4.76k
  return mstate;
1161
646k
}
1162
1163
/* Decide which data size we should print.  */
1164
1165
static bfd_vma
1166
riscv_data_length (bfd_vma memaddr,
1167
       disassemble_info *info)
1168
0
{
1169
0
  bfd_vma length;
1170
0
  bool found = false;
1171
1172
0
  length = 4;
1173
0
  if (info->symtab_size != 0
1174
0
      && bfd_asymbol_flavour (*info->symtab) == bfd_target_elf_flavour
1175
0
      && last_map_symbol >= 0)
1176
0
    {
1177
0
      int n;
1178
0
      enum riscv_seg_mstate m = MAP_NONE;
1179
0
      for (n = last_map_symbol + 1; n < info->symtab_size; n++)
1180
0
  {
1181
0
    bfd_vma addr = bfd_asymbol_value (info->symtab[n]);
1182
0
    if (addr > memaddr
1183
0
        && riscv_is_valid_mapping_symbol (n, info))
1184
0
      {
1185
0
        if (addr - memaddr < length)
1186
0
    length = addr - memaddr;
1187
0
        found = true;
1188
0
        riscv_update_map_state (n, &m, info);
1189
0
        break;
1190
0
      }
1191
0
  }
1192
0
    }
1193
0
  if (!found)
1194
0
    {
1195
      /* Do not set the length which exceeds the section size.  */
1196
0
      bfd_vma offset = info->section->vma + info->section->size;
1197
0
      offset -= memaddr;
1198
0
      length = (offset < length) ? offset : length;
1199
0
    }
1200
0
  length = length == 3 ? 2 : length;
1201
0
  return length;
1202
0
}
1203
1204
/* Dump the data contents.  */
1205
1206
static int
1207
riscv_disassemble_data (bfd_vma memaddr ATTRIBUTE_UNUSED,
1208
      insn_t data,
1209
      const bfd_byte *packet ATTRIBUTE_UNUSED,
1210
      disassemble_info *info)
1211
0
{
1212
0
  info->display_endian = info->endian;
1213
1214
0
  switch (info->bytes_per_chunk)
1215
0
    {
1216
0
    case 1:
1217
0
      info->bytes_per_line = 6;
1218
0
      (*info->fprintf_styled_func)
1219
0
  (info->stream, dis_style_assembler_directive, ".byte");
1220
0
      (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
1221
0
      (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
1222
0
            "0x%02x", (unsigned)data);
1223
0
      break;
1224
0
    case 2:
1225
0
      info->bytes_per_line = 8;
1226
0
      (*info->fprintf_styled_func)
1227
0
  (info->stream, dis_style_assembler_directive, ".short");
1228
0
      (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
1229
0
      (*info->fprintf_styled_func)
1230
0
  (info->stream, dis_style_immediate, "0x%04x", (unsigned) data);
1231
0
      break;
1232
0
    case 4:
1233
0
      info->bytes_per_line = 8;
1234
0
      (*info->fprintf_styled_func)
1235
0
  (info->stream, dis_style_assembler_directive, ".word");
1236
0
      (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
1237
0
      (*info->fprintf_styled_func)
1238
0
  (info->stream, dis_style_immediate, "0x%08lx",
1239
0
   (unsigned long) data);
1240
0
      break;
1241
0
    case 8:
1242
0
      info->bytes_per_line = 8;
1243
0
      (*info->fprintf_styled_func)
1244
0
  (info->stream, dis_style_assembler_directive, ".dword");
1245
0
      (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
1246
0
      (*info->fprintf_styled_func)
1247
0
  (info->stream, dis_style_immediate, "0x%016llx",
1248
0
   (unsigned long long) data);
1249
0
      break;
1250
0
    default:
1251
0
      abort ();
1252
0
    }
1253
0
  return info->bytes_per_chunk;
1254
0
}
1255
1256
static bool
1257
riscv_init_disasm_info (struct disassemble_info *info)
1258
532
{
1259
532
  int i;
1260
1261
532
  struct riscv_private_data *pd =
1262
532
  xcalloc (1, sizeof (struct riscv_private_data));
1263
532
  pd->gp = 0;
1264
532
  pd->print_addr = 0;
1265
17.5k
  for (i = 0; i < (int) ARRAY_SIZE (pd->hi_addr); i++)
1266
17.0k
    pd->hi_addr[i] = -1;
1267
532
  pd->to_print_addr = false;
1268
532
  pd->has_gp = false;
1269
1270
4.64k
  for (i = 0; i < info->symtab_size; i++)
1271
4.11k
    {
1272
4.11k
      asymbol *sym = info->symtab[i];
1273
4.11k
      if (strcmp (bfd_asymbol_name (sym), RISCV_GP_SYMBOL) == 0)
1274
0
  {
1275
0
    pd->gp = bfd_asymbol_value (sym);
1276
0
    pd->has_gp = true;
1277
0
  }
1278
4.11k
    }
1279
1280
532
  info->private_data = pd;
1281
532
  return true;
1282
532
}
1283
1284
int
1285
print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info)
1286
646k
{
1287
646k
  bfd_byte packet[RISCV_MAX_INSN_LEN];
1288
646k
  insn_t insn = 0;
1289
646k
  bfd_vma dump_size;
1290
646k
  int status;
1291
646k
  enum riscv_seg_mstate mstate;
1292
646k
  int (*riscv_disassembler) (bfd_vma, insn_t, const bfd_byte *,
1293
646k
           struct disassemble_info *);
1294
1295
646k
  if (info->disassembler_options != NULL)
1296
0
    {
1297
0
      parse_riscv_dis_options (info->disassembler_options);
1298
      /* Avoid repeatedly parsing the options.  */
1299
0
      info->disassembler_options = NULL;
1300
0
    }
1301
646k
  else if (riscv_gpr_names == NULL)
1302
2
    set_default_riscv_dis_options ();
1303
1304
646k
  if (info->private_data == NULL && !riscv_init_disasm_info (info))
1305
0
    return -1;
1306
1307
646k
  mstate = riscv_search_mapping_symbol (memaddr, info);
1308
  /* Save the last mapping state.  */
1309
646k
  last_map_state = mstate;
1310
1311
  /* Set the size to dump.  */
1312
646k
  if (mstate == MAP_DATA
1313
646k
      && (info->flags & DISASSEMBLE_DATA) == 0)
1314
0
    {
1315
0
      dump_size = riscv_data_length (memaddr, info);
1316
0
      info->bytes_per_chunk = dump_size;
1317
0
      riscv_disassembler = riscv_disassemble_data;
1318
0
    }
1319
646k
  else
1320
646k
    {
1321
      /* Get the first 2-bytes to check the lenghth of instruction.  */
1322
646k
      status = (*info->read_memory_func) (memaddr, packet, 2, info);
1323
646k
      if (status != 0)
1324
201
  {
1325
201
    (*info->memory_error_func) (status, memaddr, info);
1326
201
    return -1;
1327
201
  }
1328
645k
      insn = (insn_t) bfd_getl16 (packet);
1329
645k
      dump_size = riscv_insn_length (insn);
1330
645k
      riscv_disassembler = riscv_disassemble_insn;
1331
645k
    }
1332
1333
  /* Fetch the instruction to dump.  */
1334
645k
  status = (*info->read_memory_func) (memaddr, packet, dump_size, info);
1335
645k
  if (status != 0)
1336
127
    {
1337
127
      (*info->memory_error_func) (status, memaddr, info);
1338
127
      return -1;
1339
127
    }
1340
645k
  insn = (insn_t) bfd_get_bits (packet, dump_size * 8, false);
1341
1342
645k
  return (*riscv_disassembler) (memaddr, insn, packet, info);
1343
645k
}
1344
1345
disassembler_ftype
1346
riscv_get_disassembler (bfd *abfd)
1347
669
{
1348
669
  const char *default_arch = "rv64gc";
1349
1350
669
  if (abfd && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
1351
115
    {
1352
115
      const char *sec_name = get_elf_backend_data (abfd)->obj_attrs_section;
1353
115
      if (bfd_get_section_by_name (abfd, sec_name) != NULL)
1354
0
  {
1355
0
    obj_attribute *attr = elf_known_obj_attributes_proc (abfd);
1356
0
    unsigned int Tag_a = Tag_RISCV_priv_spec;
1357
0
    unsigned int Tag_b = Tag_RISCV_priv_spec_minor;
1358
0
    unsigned int Tag_c = Tag_RISCV_priv_spec_revision;
1359
0
    riscv_get_priv_spec_class_from_numbers (attr[Tag_a].i,
1360
0
              attr[Tag_b].i,
1361
0
              attr[Tag_c].i,
1362
0
              &default_priv_spec);
1363
0
    default_arch = attr[Tag_RISCV_arch].s;
1364
0
  }
1365
115
    }
1366
1367
669
  riscv_release_subset_list (&riscv_subsets);
1368
669
  riscv_parse_subset (&riscv_rps_dis, default_arch);
1369
669
  return print_insn_riscv;
1370
669
}
1371
1372
/* Prevent use of the fake labels that are generated as part of the DWARF
1373
   and for relaxable relocations in the assembler.  */
1374
1375
bool
1376
riscv_symbol_is_valid (asymbol * sym,
1377
                       struct disassemble_info * info ATTRIBUTE_UNUSED)
1378
222
{
1379
222
  const char * name;
1380
1381
222
  if (sym == NULL)
1382
0
    return false;
1383
1384
222
  name = bfd_asymbol_name (sym);
1385
1386
222
  return (strcmp (name, RISCV_FAKE_LABEL_NAME) != 0
1387
222
    && !riscv_elf_is_mapping_symbols (name));
1388
222
}
1389

1390
1391
/* Indices into option argument vector for options accepting an argument.
1392
   Use RISCV_OPTION_ARG_NONE for options accepting no argument.  */
1393
1394
typedef enum
1395
{
1396
  RISCV_OPTION_ARG_NONE = -1,
1397
  RISCV_OPTION_ARG_PRIV_SPEC,
1398
1399
  RISCV_OPTION_ARG_COUNT
1400
} riscv_option_arg_t;
1401
1402
/* Valid RISCV disassembler options.  */
1403
1404
static struct
1405
{
1406
  const char *name;
1407
  const char *description;
1408
  riscv_option_arg_t arg;
1409
} riscv_options[] =
1410
{
1411
  { "numeric",
1412
    N_("Print numeric register names, rather than ABI names."),
1413
    RISCV_OPTION_ARG_NONE },
1414
  { "no-aliases",
1415
    N_("Disassemble only into canonical instructions."),
1416
    RISCV_OPTION_ARG_NONE },
1417
  { "priv-spec=",
1418
    N_("Print the CSR according to the chosen privilege spec."),
1419
    RISCV_OPTION_ARG_PRIV_SPEC }
1420
};
1421
1422
/* Build the structure representing valid RISCV disassembler options.
1423
   This is done dynamically for maintenance ease purpose; a static
1424
   initializer would be unreadable.  */
1425
1426
const disasm_options_and_args_t *
1427
disassembler_options_riscv (void)
1428
0
{
1429
0
  static disasm_options_and_args_t *opts_and_args;
1430
1431
0
  if (opts_and_args == NULL)
1432
0
    {
1433
0
      size_t num_options = ARRAY_SIZE (riscv_options);
1434
0
      size_t num_args = RISCV_OPTION_ARG_COUNT;
1435
0
      disasm_option_arg_t *args;
1436
0
      disasm_options_t *opts;
1437
0
      size_t i, priv_spec_count;
1438
1439
0
      args = XNEWVEC (disasm_option_arg_t, num_args + 1);
1440
1441
0
      args[RISCV_OPTION_ARG_PRIV_SPEC].name = "SPEC";
1442
0
      priv_spec_count = PRIV_SPEC_CLASS_DRAFT - PRIV_SPEC_CLASS_NONE - 1;
1443
0
      args[RISCV_OPTION_ARG_PRIV_SPEC].values
1444
0
        = XNEWVEC (const char *, priv_spec_count + 1);
1445
0
      for (i = 0; i < priv_spec_count; i++)
1446
0
  args[RISCV_OPTION_ARG_PRIV_SPEC].values[i]
1447
0
          = riscv_priv_specs[i].name;
1448
      /* The array we return must be NULL terminated.  */
1449
0
      args[RISCV_OPTION_ARG_PRIV_SPEC].values[i] = NULL;
1450
1451
      /* The array we return must be NULL terminated.  */
1452
0
      args[num_args].name = NULL;
1453
0
      args[num_args].values = NULL;
1454
1455
0
      opts_and_args = XNEW (disasm_options_and_args_t);
1456
0
      opts_and_args->args = args;
1457
1458
0
      opts = &opts_and_args->options;
1459
0
      opts->name = XNEWVEC (const char *, num_options + 1);
1460
0
      opts->description = XNEWVEC (const char *, num_options + 1);
1461
0
      opts->arg = XNEWVEC (const disasm_option_arg_t *, num_options + 1);
1462
0
      for (i = 0; i < num_options; i++)
1463
0
  {
1464
0
    opts->name[i] = riscv_options[i].name;
1465
0
    opts->description[i] = _(riscv_options[i].description);
1466
0
    if (riscv_options[i].arg != RISCV_OPTION_ARG_NONE)
1467
0
      opts->arg[i] = &args[riscv_options[i].arg];
1468
0
    else
1469
0
      opts->arg[i] = NULL;
1470
0
  }
1471
      /* The array we return must be NULL terminated.  */
1472
0
      opts->name[i] = NULL;
1473
0
      opts->description[i] = NULL;
1474
0
      opts->arg[i] = NULL;
1475
0
    }
1476
1477
0
  return opts_and_args;
1478
0
}
1479
1480
void
1481
print_riscv_disassembler_options (FILE *stream)
1482
0
{
1483
0
  const disasm_options_and_args_t *opts_and_args;
1484
0
  const disasm_option_arg_t *args;
1485
0
  const disasm_options_t *opts;
1486
0
  size_t max_len = 0;
1487
0
  size_t i;
1488
0
  size_t j;
1489
1490
0
  opts_and_args = disassembler_options_riscv ();
1491
0
  opts = &opts_and_args->options;
1492
0
  args = opts_and_args->args;
1493
1494
0
  fprintf (stream, _("\n\
1495
0
The following RISC-V specific disassembler options are supported for use\n\
1496
0
with the -M switch (multiple options should be separated by commas):\n"));
1497
0
  fprintf (stream, "\n");
1498
1499
  /* Compute the length of the longest option name.  */
1500
0
  for (i = 0; opts->name[i] != NULL; i++)
1501
0
    {
1502
0
      size_t len = strlen (opts->name[i]);
1503
1504
0
      if (opts->arg[i] != NULL)
1505
0
  len += strlen (opts->arg[i]->name);
1506
0
      if (max_len < len)
1507
0
  max_len = len;
1508
0
    }
1509
1510
0
  for (i = 0, max_len++; opts->name[i] != NULL; i++)
1511
0
    {
1512
0
      fprintf (stream, "  %s", opts->name[i]);
1513
0
      if (opts->arg[i] != NULL)
1514
0
  fprintf (stream, "%s", opts->arg[i]->name);
1515
0
      if (opts->description[i] != NULL)
1516
0
  {
1517
0
    size_t len = strlen (opts->name[i]);
1518
1519
0
    if (opts->arg != NULL && opts->arg[i] != NULL)
1520
0
      len += strlen (opts->arg[i]->name);
1521
0
    fprintf (stream, "%*c %s", (int) (max_len - len), ' ',
1522
0
                   opts->description[i]);
1523
0
  }
1524
0
      fprintf (stream, "\n");
1525
0
    }
1526
1527
0
  for (i = 0; args[i].name != NULL; i++)
1528
0
    {
1529
0
      if (args[i].values == NULL)
1530
0
  continue;
1531
0
      fprintf (stream, _("\n\
1532
0
  For the options above, the following values are supported for \"%s\":\n   "),
1533
0
         args[i].name);
1534
0
      for (j = 0; args[i].values[j] != NULL; j++)
1535
0
  fprintf (stream, " %s", args[i].values[j]);
1536
0
      fprintf (stream, _("\n"));
1537
0
    }
1538
1539
0
  fprintf (stream, _("\n"));
1540
0
}
1541
1542
void disassemble_free_riscv (struct disassemble_info *info ATTRIBUTE_UNUSED)
1543
669
{
1544
669
  riscv_release_subset_list (&riscv_subsets);
1545
669
}