Coverage Report

Created: 2024-05-21 06:29

/src/binutils-gdb/opcodes/s12z-opc.c
Line
Count
Source (jump to first uncovered line)
1
/* s12z-decode.c -- Freescale S12Z disassembly
2
   Copyright (C) 2018-2024 Free Software Foundation, Inc.
3
4
   This file is part of the GNU opcodes library.
5
6
   This library is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3, or (at your option)
9
   any later version.
10
11
   It is distributed in the hope that it will be useful, but WITHOUT
12
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14
   License for more details.
15
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19
   MA 02110-1301, USA.  */
20
21
#include "sysdep.h"
22
#include <stdio.h>
23
#include <stdint.h>
24
#include <stdbool.h>
25
#include <assert.h>
26
27
#include "opcode/s12z.h"
28
29
#include "bfd.h"
30
31
#include "s12z-opc.h"
32
33
34
typedef int (*insn_bytes_f) (struct mem_read_abstraction_base *);
35
36
typedef int (*operands_f) (struct mem_read_abstraction_base *,
37
         int *n_operands, struct operand **operand);
38
39
typedef enum optr (*discriminator_f) (struct mem_read_abstraction_base *,
40
              enum optr hint);
41
42
enum OPR_MODE
43
  {
44
    OPR_IMMe4,
45
    OPR_REG,
46
    OPR_OFXYS,
47
    OPR_XY_PRE_INC,
48
    OPR_XY_POST_INC,
49
    OPR_XY_PRE_DEC,
50
    OPR_XY_POST_DEC,
51
    OPR_S_PRE_DEC,
52
    OPR_S_POST_INC,
53
    OPR_REG_DIRECT,
54
    OPR_REG_INDIRECT,
55
    OPR_IDX_DIRECT,
56
    OPR_IDX_INDIRECT,
57
    OPR_EXT1,
58
    OPR_IDX2_REG,
59
    OPR_IDX3_DIRECT,
60
    OPR_IDX3_INDIRECT,
61
62
    OPR_EXT18,
63
    OPR_IDX3_DIRECT_REG,
64
    OPR_EXT3_DIRECT,
65
    OPR_EXT3_INDIRECT
66
  };
67
68
struct opr_pb
69
{
70
  uint8_t mask;
71
  uint8_t value;
72
  int n_operands;
73
  enum OPR_MODE mode;
74
};
75
76
static const  struct opr_pb opr_pb[] = {
77
  {0xF0, 0x70, 1, OPR_IMMe4},
78
  {0xF8, 0xB8, 1, OPR_REG},
79
  {0xC0, 0x40, 1, OPR_OFXYS},
80
  {0xEF, 0xE3, 1, OPR_XY_PRE_INC},
81
  {0xEF, 0xE7, 1, OPR_XY_POST_INC},
82
  {0xEF, 0xC3, 1, OPR_XY_PRE_DEC},
83
  {0xEF, 0xC7, 1, OPR_XY_POST_DEC},
84
  {0xFF, 0xFB, 1, OPR_S_PRE_DEC},
85
  {0xFF, 0xFF, 1, OPR_S_POST_INC},
86
  {0xC8, 0x88, 1, OPR_REG_DIRECT},
87
  {0xE8, 0xC8, 1, OPR_REG_INDIRECT},
88
89
  {0xCE, 0xC0, 2, OPR_IDX_DIRECT},
90
  {0xCE, 0xC4, 2, OPR_IDX_INDIRECT},
91
  {0xC0, 0x00, 2, OPR_EXT1},
92
93
  {0xC8, 0x80, 3, OPR_IDX2_REG},
94
  {0xFA, 0xF8, 3, OPR_EXT18},
95
96
  {0xCF, 0xC2, 4, OPR_IDX3_DIRECT},
97
  {0xCF, 0xC6, 4, OPR_IDX3_INDIRECT},
98
99
  {0xF8, 0xE8, 4, OPR_IDX3_DIRECT_REG},
100
  {0xFF, 0xFA, 4, OPR_EXT3_DIRECT},
101
  {0xFF, 0xFE, 4, OPR_EXT3_INDIRECT},
102
};
103
104
/* Return the number of bytes in a OPR operand, including the XB postbyte.
105
   It does not include any preceeding opcodes. */
106
static int
107
x_opr_n_bytes (struct mem_read_abstraction_base *mra, int offset)
108
63.4k
{
109
63.4k
  bfd_byte xb;
110
63.4k
  int status = mra->read (mra, offset, 1, &xb);
111
63.4k
  if (status < 0)
112
5
    return status;
113
114
63.3k
  size_t i;
115
653k
  for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i)
116
653k
    {
117
653k
      const struct opr_pb *pb = opr_pb + i;
118
653k
      if ((xb & pb->mask) == pb->value)
119
63.3k
  {
120
63.3k
    return pb->n_operands;
121
63.3k
  }
122
653k
    }
123
124
0
  return 1;
125
63.3k
}
126
127
static int
128
opr_n_bytes_p1 (struct mem_read_abstraction_base *mra)
129
45.6k
{
130
45.6k
  int n = x_opr_n_bytes (mra, 0);
131
45.6k
  if (n < 0)
132
0
    return n;
133
45.6k
  return 1 + n;
134
45.6k
}
135
136
static int
137
opr_n_bytes2 (struct mem_read_abstraction_base *mra)
138
1.29k
{
139
1.29k
  int s = x_opr_n_bytes (mra, 0);
140
1.29k
  if (s < 0)
141
0
    return s;
142
1.29k
  int n = x_opr_n_bytes (mra, s);
143
1.29k
  if (n < 0)
144
0
    return n;
145
1.29k
  return s + n + 1;
146
1.29k
}
147
148
enum BB_MODE
149
  {
150
    BB_REG_REG_REG,
151
    BB_REG_REG_IMM,
152
    BB_REG_OPR_REG,
153
    BB_OPR_REG_REG,
154
    BB_REG_OPR_IMM,
155
    BB_OPR_REG_IMM
156
  };
157
158
struct opr_bb
159
{
160
  uint8_t mask;
161
  uint8_t value;
162
  int n_operands;
163
  bool opr;
164
  enum BB_MODE mode;
165
};
166
167
static const struct opr_bb bb_modes[] =
168
  {
169
    {0x60, 0x00, 2, false, BB_REG_REG_REG},
170
    {0x60, 0x20, 3, false, BB_REG_REG_IMM},
171
    {0x70, 0x40, 2, true,  BB_REG_OPR_REG},
172
    {0x70, 0x50, 2, true,  BB_OPR_REG_REG},
173
    {0x70, 0x60, 3, true,  BB_REG_OPR_IMM},
174
    {0x70, 0x70, 3, true,  BB_OPR_REG_IMM}
175
  };
176
177
static int
178
bfextins_n_bytes (struct mem_read_abstraction_base *mra)
179
361
{
180
361
  bfd_byte bb;
181
361
  int status = mra->read (mra, 0, 1, &bb);
182
361
  if (status < 0)
183
0
    return status;
184
185
361
  size_t i;
186
361
  const struct opr_bb *bbs = 0;
187
1.34k
  for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i)
188
1.34k
    {
189
1.34k
      bbs = bb_modes + i;
190
1.34k
      if ((bb & bbs->mask) == bbs->value)
191
361
  {
192
361
    break;
193
361
  }
194
1.34k
    }
195
196
361
  int n = bbs->n_operands;
197
361
  if (bbs->opr)
198
243
    {
199
243
      int x = x_opr_n_bytes (mra, n - 1);
200
243
      if (x < 0)
201
0
  return x;
202
243
      n += x;
203
243
    }
204
205
361
  return n;
206
361
}
207
208
static int
209
single (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
210
127k
{
211
127k
  return 1;
212
127k
}
213
214
static int
215
two (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
216
11.0k
{
217
11.0k
  return 2;
218
11.0k
}
219
220
static int
221
three (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
222
14.0k
{
223
14.0k
  return 3;
224
14.0k
}
225
226
static int
227
four (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
228
7.54k
{
229
7.54k
  return 4;
230
7.54k
}
231
232
static int
233
five (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
234
5.37k
{
235
5.37k
  return 5;
236
5.37k
}
237
238
static int
239
pcrel_15bit (struct mem_read_abstraction_base *mra)
240
11.0k
{
241
11.0k
  bfd_byte byte;
242
11.0k
  int status = mra->read (mra, 0, 1, &byte);
243
11.0k
  if (status < 0)
244
0
    return status;
245
11.0k
  return (byte & 0x80) ? 3 : 2;
246
11.0k
}
247
248
249

250
static int
251
xysp_reg_from_postbyte (uint8_t postbyte)
252
20.9k
{
253
20.9k
  int reg = -1;
254
20.9k
  switch ((postbyte & 0x30) >> 4)
255
20.9k
    {
256
7.08k
    case 0:
257
7.08k
      reg = REG_X;
258
7.08k
      break;
259
2.64k
    case 1:
260
2.64k
      reg = REG_Y;
261
2.64k
      break;
262
9.04k
    case 2:
263
9.04k
      reg = REG_S;
264
9.04k
      break;
265
2.16k
    default:
266
2.16k
      reg = REG_P;
267
20.9k
    }
268
20.9k
  return reg;
269
20.9k
}
270
271
static struct operand *
272
create_immediate_operand (int value)
273
43.1k
{
274
43.1k
  struct immediate_operand *op = malloc (sizeof (*op));
275
276
43.1k
  if (op != NULL)
277
43.1k
    {
278
43.1k
      op->parent.cl = OPND_CL_IMMEDIATE;
279
43.1k
      op->parent.osize = -1;
280
43.1k
      op->value = value;
281
43.1k
    }
282
43.1k
  return (struct operand *) op;
283
43.1k
}
284
285
static struct operand *
286
create_bitfield_operand (int width, int offset)
287
245
{
288
245
  struct bitfield_operand *op = malloc (sizeof (*op));
289
290
245
  if (op != NULL)
291
245
    {
292
245
      op->parent.cl = OPND_CL_BIT_FIELD;
293
245
      op->parent.osize = -1;
294
245
      op->width = width;
295
245
      op->offset = offset;
296
245
    }
297
245
  return (struct operand *) op;
298
245
}
299
300
static struct operand *
301
create_register_operand_with_size (int reg, short osize)
302
152k
{
303
152k
  struct register_operand *op = malloc (sizeof (*op));
304
305
152k
  if (op != NULL)
306
152k
    {
307
152k
      op->parent.cl = OPND_CL_REGISTER;
308
152k
      op->parent.osize = osize;
309
152k
      op->reg = reg;
310
152k
    }
311
152k
  return (struct operand *) op;
312
152k
}
313
314
static struct operand *
315
create_register_operand (int reg)
316
146k
{
317
146k
  return create_register_operand_with_size (reg, -1);
318
146k
}
319
320
static struct operand *
321
create_register_all_operand (void)
322
323
{
323
323
  struct register_operand *op = malloc (sizeof (*op));
324
325
323
  if (op != NULL)
326
323
    {
327
323
      op->parent.cl = OPND_CL_REGISTER_ALL;
328
323
      op->parent.osize = -1;
329
323
    }
330
323
  return (struct operand *) op;
331
323
}
332
333
static struct operand *
334
create_register_all16_operand (void)
335
1
{
336
1
  struct register_operand *op = malloc (sizeof (*op));
337
338
1
  if (op != NULL)
339
1
    {
340
1
      op->parent.cl = OPND_CL_REGISTER_ALL16;
341
1
      op->parent.osize = -1;
342
1
    }
343
1
  return (struct operand *) op;
344
1
}
345
346
347
static struct operand *
348
create_simple_memory_operand (bfd_vma addr, bfd_vma base, bool relative)
349
44.7k
{
350
44.7k
  struct simple_memory_operand *op;
351
352
44.7k
  assert (relative || base == 0);
353
44.7k
  op = malloc (sizeof (*op));
354
44.7k
  if (op != NULL)
355
44.7k
    {
356
44.7k
      op->parent.cl = OPND_CL_SIMPLE_MEMORY;
357
44.7k
      op->parent.osize = -1;
358
44.7k
      op->addr = addr;
359
44.7k
      op->base = base;
360
44.7k
      op->relative = relative;
361
44.7k
    }
362
44.7k
  return (struct operand *) op;
363
44.7k
}
364
365
static struct operand *
366
create_memory_operand (bool indirect, int base, int n_regs, int reg0, int reg1)
367
31.4k
{
368
31.4k
  struct memory_operand *op = malloc (sizeof (*op));
369
370
31.4k
  if (op != NULL)
371
31.4k
    {
372
31.4k
      op->parent.cl = OPND_CL_MEMORY;
373
31.4k
      op->parent.osize = -1;
374
31.4k
      op->indirect = indirect;
375
31.4k
      op->base_offset = base;
376
31.4k
      op->mutation = OPND_RM_NONE;
377
31.4k
      op->n_regs = n_regs;
378
31.4k
      op->regs[0] = reg0;
379
31.4k
      op->regs[1] = reg1;
380
31.4k
    }
381
31.4k
  return (struct operand *) op;
382
31.4k
}
383
384
static struct operand *
385
create_memory_auto_operand (enum op_reg_mutation mutation, int reg)
386
5.27k
{
387
5.27k
  struct memory_operand *op = malloc (sizeof (*op));
388
389
5.27k
  if (op != NULL)
390
5.27k
    {
391
5.27k
      op->parent.cl = OPND_CL_MEMORY;
392
5.27k
      op->parent.osize = -1;
393
5.27k
      op->indirect = false;
394
5.27k
      op->base_offset = 0;
395
5.27k
      op->mutation = mutation;
396
5.27k
      op->n_regs = 1;
397
5.27k
      op->regs[0] = reg;
398
5.27k
      op->regs[1] = -1;
399
5.27k
    }
400
5.27k
  return (struct operand *) op;
401
5.27k
}
402
403

404
405
static int
406
z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands,
407
    struct operand **operand)
408
6.45k
{
409
6.45k
  struct operand *op;
410
6.45k
  uint8_t buffer[3];
411
6.45k
  int status = mra->read (mra, 0, 3, buffer);
412
6.45k
  if (status < 0)
413
59
    return status;
414
415
6.39k
  int i;
416
6.39k
  uint32_t addr = 0;
417
25.5k
  for (i = 0; i < 3; ++i)
418
19.1k
    {
419
19.1k
      addr <<= 8;
420
19.1k
      addr |= buffer[i];
421
19.1k
    }
422
423
6.39k
  op = create_simple_memory_operand (addr, 0, false);
424
6.39k
  if (op == NULL)
425
0
    return -1;
426
6.39k
  operand[(*n_operands)++] = op;
427
6.39k
  return 0;
428
6.39k
}
429
430
431
static int
432
z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset,
433
           short size, uint32_t *result)
434
27.8k
{
435
27.8k
  assert (size >0);
436
27.8k
  assert (size <= 4);
437
27.8k
  bfd_byte buffer[4];
438
27.8k
  int status = mra->read (mra, offset, size, buffer);
439
27.8k
  if (status < 0)
440
70
    return status;
441
442
27.7k
  int i;
443
27.7k
  uint32_t value = 0;
444
92.0k
  for (i = 0; i < size; ++i)
445
64.3k
    value = (value << 8) | buffer[i];
446
447
27.7k
  if (buffer[0] & 0x80)
448
10.6k
    {
449
      /* Deal with negative values */
450
10.6k
      value -= 1u << (size * 4) << (size * 4);
451
10.6k
    }
452
27.7k
  *result = value;
453
27.7k
  return 0;
454
27.8k
}
455
456
static int
457
decode_signed_value (struct mem_read_abstraction_base *mra, short size,
458
         uint32_t *result)
459
26.5k
{
460
26.5k
  return z_decode_signed_value (mra, 0, size, result);
461
26.5k
}
462
463
static int
464
x_imm1 (struct mem_read_abstraction_base *mra,
465
  int offset,
466
  int *n_operands, struct operand **operand)
467
1.34k
{
468
1.34k
  struct operand *op;
469
1.34k
  bfd_byte byte;
470
1.34k
  int status = mra->read (mra, offset, 1, &byte);
471
1.34k
  if (status < 0)
472
1
    return status;
473
474
1.34k
  op = create_immediate_operand (byte);
475
1.34k
  if (op == NULL)
476
0
    return -1;
477
1.34k
  operand[(*n_operands)++] = op;
478
1.34k
  return 0;
479
1.34k
}
480
481
/* An eight bit immediate operand.  */
482
static int
483
imm1_decode (struct mem_read_abstraction_base *mra,
484
       int *n_operands, struct operand **operand)
485
1.06k
{
486
1.06k
  return x_imm1 (mra, 0, n_operands, operand);
487
1.06k
}
488
489
static int
490
trap_decode (struct mem_read_abstraction_base *mra,
491
       int *n_operands, struct operand **operand)
492
273
{
493
273
  return x_imm1 (mra, -1, n_operands, operand);
494
273
}
495
496
497
static struct operand *
498
x_opr_decode_with_size (struct mem_read_abstraction_base *mra, int offset,
499
      short osize)
500
62.9k
{
501
62.9k
  bfd_byte postbyte;
502
62.9k
  int status = mra->read (mra, offset, 1, &postbyte);
503
62.9k
  if (status < 0)
504
79
    return NULL;
505
62.8k
  offset++;
506
507
62.8k
  enum OPR_MODE mode = -1;
508
62.8k
  size_t i;
509
660k
  for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i)
510
660k
    {
511
660k
      const struct opr_pb *pb = opr_pb + i;
512
660k
      if ((postbyte & pb->mask) == pb->value)
513
62.8k
  {
514
62.8k
    mode = pb->mode;
515
62.8k
    break;
516
62.8k
  }
517
660k
    }
518
519
62.8k
  struct operand *operand = NULL;
520
62.8k
  switch (mode)
521
62.8k
    {
522
3.11k
    case OPR_IMMe4:
523
3.11k
      {
524
3.11k
  int n;
525
3.11k
  uint8_t x = (postbyte & 0x0F);
526
3.11k
  if (x == 0)
527
324
    n = -1;
528
2.79k
  else
529
2.79k
    n = x;
530
531
3.11k
  operand = create_immediate_operand (n);
532
3.11k
  break;
533
0
      }
534
1.46k
    case OPR_REG:
535
1.46k
      {
536
1.46k
  uint8_t x = (postbyte & 0x07);
537
1.46k
  operand = create_register_operand (x);
538
1.46k
  break;
539
0
      }
540
11.1k
    case OPR_OFXYS:
541
11.1k
      {
542
11.1k
  operand = create_memory_operand (false, postbyte & 0x0F, 1,
543
11.1k
           xysp_reg_from_postbyte (postbyte), -1);
544
11.1k
  break;
545
0
      }
546
4.48k
    case OPR_REG_DIRECT:
547
4.48k
      {
548
4.48k
  operand = create_memory_operand (false, 0, 2, postbyte & 0x07,
549
4.48k
           xysp_reg_from_postbyte (postbyte));
550
4.48k
  break;
551
0
      }
552
2.32k
    case OPR_REG_INDIRECT:
553
2.32k
      {
554
2.32k
  operand = create_memory_operand (true, 0, 2, postbyte & 0x07,
555
2.32k
           (postbyte & 0x10) ? REG_Y : REG_X);
556
2.32k
  break;
557
0
      }
558
559
1.69k
    case OPR_IDX_INDIRECT:
560
1.69k
      {
561
1.69k
  uint8_t x1;
562
1.69k
  status = mra->read (mra, offset, 1, &x1);
563
1.69k
  if (status < 0)
564
1
    return NULL;
565
1.69k
  int idx = x1;
566
567
1.69k
  if (postbyte & 0x01)
568
734
    {
569
      /* Deal with negative values */
570
734
      idx -= 0x1UL << 8;
571
734
    }
572
573
1.69k
  operand = create_memory_operand (true, idx, 1,
574
1.69k
           xysp_reg_from_postbyte (postbyte), -1);
575
1.69k
  break;
576
1.69k
      }
577
578
1.21k
    case OPR_IDX3_DIRECT:
579
1.21k
      {
580
1.21k
  uint8_t x[3];
581
1.21k
  status = mra->read (mra, offset, 3, x);
582
1.21k
  if (status < 0)
583
11
    return NULL;
584
1.20k
  int idx = x[0] << 16 | x[1] << 8 | x[2];
585
586
1.20k
  if (x[0] & 0x80)
587
582
    {
588
      /* Deal with negative values */
589
582
      idx -= 0x1UL << 24;
590
582
    }
591
592
1.20k
  operand = create_memory_operand (false, idx, 1,
593
1.20k
           xysp_reg_from_postbyte (postbyte), -1);
594
1.20k
  break;
595
1.21k
      }
596
597
1.20k
    case OPR_IDX3_DIRECT_REG:
598
1.20k
      {
599
1.20k
  uint8_t x[3];
600
1.20k
  status = mra->read (mra, offset, 3, x);
601
1.20k
  if (status < 0)
602
13
    return NULL;
603
1.19k
  int idx = x[0] << 16 | x[1] << 8 | x[2];
604
605
1.19k
  if (x[0] & 0x80)
606
716
    {
607
      /* Deal with negative values */
608
716
      idx -= 0x1UL << 24;
609
716
    }
610
611
1.19k
  operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
612
1.19k
  break;
613
1.20k
      }
614
615
554
    case OPR_IDX3_INDIRECT:
616
554
      {
617
554
  uint8_t x[3];
618
554
  status = mra->read (mra, offset, 3, x);
619
554
  if (status < 0)
620
2
    return NULL;
621
552
  int idx = x[0] << 16 | x[1] << 8 | x[2];
622
623
552
  if (x[0] & 0x80)
624
249
    {
625
      /* Deal with negative values */
626
249
      idx -= 0x1UL << 24;
627
249
    }
628
629
552
  operand = create_memory_operand (true, idx, 1,
630
552
           xysp_reg_from_postbyte (postbyte), -1);
631
552
  break;
632
554
      }
633
634
1.89k
    case OPR_IDX_DIRECT:
635
1.89k
      {
636
1.89k
  uint8_t x1;
637
1.89k
  status = mra->read (mra, offset, 1, &x1);
638
1.89k
  if (status < 0)
639
6
    return NULL;
640
1.89k
  int idx = x1;
641
642
1.89k
  if (postbyte & 0x01)
643
987
    {
644
      /* Deal with negative values */
645
987
      idx -= 0x1UL << 8;
646
987
    }
647
648
1.89k
  operand = create_memory_operand (false, idx, 1,
649
1.89k
           xysp_reg_from_postbyte (postbyte), -1);
650
1.89k
  break;
651
1.89k
      }
652
653
5.56k
    case OPR_IDX2_REG:
654
5.56k
      {
655
5.56k
  uint8_t x[2];
656
5.56k
  status = mra->read (mra, offset, 2, x);
657
5.56k
  if (status < 0)
658
21
    return NULL;
659
5.54k
  uint32_t idx = x[1] | x[0] << 8 ;
660
5.54k
  idx |= (postbyte & 0x30) << 12;
661
662
5.54k
  operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
663
5.54k
  break;
664
5.56k
      }
665
666
672
    case OPR_XY_PRE_INC:
667
672
      {
668
672
  operand = create_memory_auto_operand (OPND_RM_PRE_INC,
669
672
                (postbyte & 0x10) ? REG_Y: REG_X);
670
672
  break;
671
5.56k
      }
672
452
    case OPR_XY_POST_INC:
673
452
      {
674
452
  operand = create_memory_auto_operand (OPND_RM_POST_INC,
675
452
                (postbyte & 0x10) ? REG_Y: REG_X);
676
452
  break;
677
5.56k
      }
678
504
    case OPR_XY_PRE_DEC:
679
504
      {
680
504
  operand = create_memory_auto_operand (OPND_RM_PRE_DEC,
681
504
                (postbyte & 0x10) ? REG_Y: REG_X);
682
504
  break;
683
5.56k
      }
684
388
    case OPR_XY_POST_DEC:
685
388
      {
686
388
  operand = create_memory_auto_operand (OPND_RM_POST_DEC,
687
388
                (postbyte & 0x10) ? REG_Y: REG_X);
688
388
  break;
689
5.56k
      }
690
159
    case OPR_S_PRE_DEC:
691
159
      {
692
159
  operand = create_memory_auto_operand (OPND_RM_PRE_DEC, REG_S);
693
159
  break;
694
5.56k
      }
695
3.10k
    case OPR_S_POST_INC:
696
3.10k
      {
697
3.10k
  operand = create_memory_auto_operand (OPND_RM_POST_INC, REG_S);
698
3.10k
  break;
699
5.56k
      }
700
701
1.37k
    case OPR_EXT18:
702
1.37k
      {
703
1.37k
  const size_t size = 2;
704
1.37k
  bfd_byte buffer[4];
705
1.37k
  status = mra->read (mra, offset, size, buffer);
706
1.37k
  if (status < 0)
707
1
    return NULL;
708
709
1.36k
  uint32_t ext18 = 0;
710
4.10k
  for (i = 0; i < size; ++i)
711
2.73k
    {
712
2.73k
      ext18 <<= 8;
713
2.73k
      ext18 |= buffer[i];
714
2.73k
    }
715
716
1.36k
  ext18 |= (postbyte & 0x01) << 16;
717
1.36k
  ext18 |= (postbyte & 0x04) << 15;
718
719
1.36k
  operand = create_simple_memory_operand (ext18, 0, false);
720
1.36k
  break;
721
1.37k
      }
722
723
20.7k
    case OPR_EXT1:
724
20.7k
      {
725
20.7k
  uint8_t x1 = 0;
726
20.7k
  status = mra->read (mra, offset, 1, &x1);
727
20.7k
  if (status < 0)
728
30
    return NULL;
729
20.7k
  int16_t addr;
730
20.7k
  addr = x1;
731
20.7k
  addr |= (postbyte & 0x3f) << 8;
732
733
20.7k
  operand = create_simple_memory_operand (addr, 0, false);
734
20.7k
  break;
735
20.7k
      }
736
737
396
    case OPR_EXT3_DIRECT:
738
396
      {
739
396
  const size_t size = 3;
740
396
  bfd_byte buffer[4];
741
396
  status = mra->read (mra, offset, size, buffer);
742
396
  if (status < 0)
743
1
    return NULL;
744
745
395
  uint32_t ext24 = 0;
746
1.58k
  for (i = 0; i < size; ++i)
747
1.18k
    {
748
1.18k
      ext24 |= buffer[i] << (8 * (size - i - 1));
749
1.18k
    }
750
751
395
  operand = create_simple_memory_operand (ext24, 0, false);
752
395
  break;
753
396
      }
754
755
411
    case OPR_EXT3_INDIRECT:
756
411
      {
757
411
  const size_t size = 3;
758
411
  bfd_byte buffer[4];
759
411
  status = mra->read (mra, offset, size, buffer);
760
411
  if (status < 0)
761
0
    return NULL;
762
763
411
  uint32_t ext24 = 0;
764
1.64k
  for (i = 0; i < size; ++i)
765
1.23k
    {
766
1.23k
      ext24 |= buffer[i] << (8 * (size - i - 1));
767
1.23k
    }
768
769
411
  operand = create_memory_operand (true, ext24, 0, -1, -1);
770
411
  break;
771
411
      }
772
773
0
    default:
774
0
      printf ("Unknown OPR mode #0x%x (%d)", postbyte, mode);
775
0
      abort ();
776
62.8k
    }
777
778
62.7k
  if (operand != NULL)
779
62.7k
    operand->osize = osize;
780
781
62.7k
  return operand;
782
62.8k
}
783
784
static struct operand *
785
x_opr_decode (struct mem_read_abstraction_base *mra, int offset)
786
55.9k
{
787
55.9k
  return x_opr_decode_with_size (mra, offset, -1);
788
55.9k
}
789
790
static int
791
z_opr_decode (struct mem_read_abstraction_base *mra,
792
        int *n_operands, struct operand **operand)
793
43.4k
{
794
43.4k
  struct operand *op = x_opr_decode (mra, 0);
795
43.4k
  if (op == NULL)
796
54
    return -1;
797
43.3k
  operand[(*n_operands)++] = op;
798
43.3k
  return 0;
799
43.4k
}
800
801
static int
802
z_opr_decode2 (struct mem_read_abstraction_base *mra,
803
         int *n_operands, struct operand **operand)
804
1.31k
{
805
1.31k
  int n = x_opr_n_bytes (mra, 0);
806
1.31k
  if (n < 0)
807
4
    return n;
808
1.31k
  struct operand *op = x_opr_decode (mra, 0);
809
1.31k
  if (op == NULL)
810
7
    return -1;
811
1.30k
  operand[(*n_operands)++] = op;
812
1.30k
  op = x_opr_decode (mra, n);
813
1.30k
  if (op == NULL)
814
5
    return -1;
815
1.29k
  operand[(*n_operands)++] = op;
816
1.29k
  return 0;
817
1.30k
}
818
819
static int
820
imm1234 (struct mem_read_abstraction_base *mra, int base,
821
   int *n_operands, struct operand **operand)
822
23.2k
{
823
23.2k
  struct operand *op;
824
23.2k
  bfd_byte opcode;
825
23.2k
  int status = mra->read (mra, -1, 1, &opcode);
826
23.2k
  if (status < 0)
827
0
    return status;
828
829
23.2k
  opcode -= base;
830
831
23.2k
  int size = registers[opcode & 0xF].bytes;
832
833
23.2k
  uint32_t imm;
834
23.2k
  if (decode_signed_value (mra, size, &imm) < 0)
835
25
    return -1;
836
837
23.1k
  op = create_immediate_operand (imm);
838
23.1k
  if (op == NULL)
839
0
    return -1;
840
23.1k
  operand[(*n_operands)++] = op;
841
23.1k
  return 0;
842
23.1k
}
843
844
845
/* Special case of LD and CMP with register S and IMM operand */
846
static int
847
reg_s_imm (struct mem_read_abstraction_base *mra, int *n_operands,
848
     struct operand **operand)
849
103
{
850
103
  struct operand *op;
851
852
103
  op = create_register_operand (REG_S);
853
103
  if (op == NULL)
854
0
    return -1;
855
103
  operand[(*n_operands)++] = op;
856
857
103
  uint32_t imm;
858
103
  if (decode_signed_value (mra, 3, &imm) < 0)
859
2
    return -1;
860
101
  op = create_immediate_operand (imm);
861
101
  if (op == NULL)
862
0
    return -1;
863
101
  operand[(*n_operands)++] = op;
864
101
  return 0;
865
101
}
866
867
/* Special case of LD, CMP and ST with register S and OPR operand */
868
static int
869
reg_s_opr (struct mem_read_abstraction_base *mra, int *n_operands,
870
     struct operand **operand)
871
102
{
872
102
  struct operand *op;
873
874
102
  op = create_register_operand (REG_S);
875
102
  if (op == NULL)
876
0
    return -1;
877
102
  operand[(*n_operands)++] = op;
878
102
  op = x_opr_decode (mra, 0);
879
102
  if (op == NULL)
880
0
    return -1;
881
102
  operand[(*n_operands)++] = op;
882
102
  return 0;
883
102
}
884
885
static int
886
z_imm1234_8base (struct mem_read_abstraction_base *mra, int *n_operands,
887
     struct operand **operand)
888
5.74k
{
889
5.74k
  return imm1234 (mra, 8, n_operands, operand);
890
5.74k
}
891
892
static int
893
z_imm1234_0base (struct mem_read_abstraction_base *mra, int *n_operands,
894
     struct operand **operand)
895
17.4k
{
896
17.4k
  return imm1234 (mra, 0, n_operands, operand);
897
17.4k
}
898
899
900
static int
901
z_tfr (struct mem_read_abstraction_base *mra, int *n_operands,
902
       struct operand **operand)
903
502
{
904
502
  struct operand *op;
905
502
  bfd_byte byte;
906
502
  int status = mra->read (mra, 0, 1, &byte);
907
502
  if (status < 0)
908
0
    return status;
909
910
502
  op = create_register_operand (byte >> 4);
911
502
  if (op == NULL)
912
0
    return -1;
913
502
  operand[(*n_operands)++] = op;
914
502
  op = create_register_operand (byte & 0x0F);
915
502
  if (op == NULL)
916
0
    return -1;
917
502
  operand[(*n_operands)++] = op;
918
502
  return 0;
919
502
}
920
921
static int
922
z_reg (struct mem_read_abstraction_base *mra, int *n_operands,
923
       struct operand **operand)
924
86.1k
{
925
86.1k
  struct operand *op;
926
86.1k
  bfd_byte byte;
927
86.1k
  int status = mra->read (mra, -1, 1, &byte);
928
86.1k
  if (status < 0)
929
0
    return status;
930
931
86.1k
  op = create_register_operand (byte & 0x07);
932
86.1k
  if (op == NULL)
933
0
    return -1;
934
86.1k
  operand[(*n_operands)++] = op;
935
86.1k
  return 0;
936
86.1k
}
937
938
939
static int
940
reg_xy (struct mem_read_abstraction_base *mra,
941
  int *n_operands, struct operand **operand)
942
8.74k
{
943
8.74k
  struct operand *op;
944
8.74k
  bfd_byte byte;
945
8.74k
  int status = mra->read (mra, -1, 1, &byte);
946
8.74k
  if (status < 0)
947
0
    return status;
948
949
8.74k
  op = create_register_operand ((byte & 0x01) ? REG_Y : REG_X);
950
8.74k
  if (op == NULL)
951
0
    return -1;
952
8.74k
  operand[(*n_operands)++] = op;
953
8.74k
  return 0;
954
8.74k
}
955
956
static int
957
lea_reg_xys_opr (struct mem_read_abstraction_base *mra,
958
     int *n_operands, struct operand **operand)
959
2.21k
{
960
2.21k
  struct operand *op;
961
2.21k
  bfd_byte byte;
962
2.21k
  int status = mra->read (mra, -1, 1, &byte);
963
2.21k
  if (status < 0)
964
0
    return status;
965
966
2.21k
  int reg_xys = -1;
967
2.21k
  switch (byte & 0x03)
968
2.21k
    {
969
858
    case 0x00:
970
858
      reg_xys = REG_X;
971
858
      break;
972
729
    case 0x01:
973
729
      reg_xys = REG_Y;
974
729
      break;
975
627
    case 0x02:
976
627
      reg_xys = REG_S;
977
627
      break;
978
2.21k
    }
979
980
2.21k
  op = create_register_operand (reg_xys);
981
2.21k
  if (op == NULL)
982
0
    return -1;
983
2.21k
  operand[(*n_operands)++] = op;
984
2.21k
  op = x_opr_decode (mra, 0);
985
2.21k
  if (op == NULL)
986
12
    return -1;
987
2.20k
  operand[(*n_operands)++] = op;
988
2.20k
  return 0;
989
2.21k
}
990
991
static int
992
lea_reg_xys (struct mem_read_abstraction_base *mra,
993
       int *n_operands, struct operand **operand)
994
1.08k
{
995
1.08k
  struct operand *op;
996
1.08k
  bfd_byte byte;
997
1.08k
  int status = mra->read (mra, -1, 1, &byte);
998
1.08k
  if (status < 0)
999
0
    return status;
1000
1001
1.08k
  int reg_n = -1;
1002
1.08k
  switch (byte & 0x03)
1003
1.08k
    {
1004
438
    case 0x00:
1005
438
      reg_n = REG_X;
1006
438
      break;
1007
233
    case 0x01:
1008
233
      reg_n = REG_Y;
1009
233
      break;
1010
411
    case 0x02:
1011
411
      reg_n = REG_S;
1012
411
      break;
1013
1.08k
    }
1014
1015
1.08k
  status = mra->read (mra, 0, 1, &byte);
1016
1.08k
  if (status < 0)
1017
13
    return status;
1018
1019
1.06k
  op = create_register_operand (reg_n);
1020
1.06k
  if (op == NULL)
1021
0
    return -1;
1022
1.06k
  operand[(*n_operands)++] = op;
1023
1.06k
  op = create_memory_operand (false, (int8_t) byte, 1, reg_n, -1);
1024
1.06k
  if (op == NULL)
1025
0
    return -1;
1026
1.06k
  operand[(*n_operands)++] = op;
1027
1.06k
  return 0;
1028
1.06k
}
1029
1030
1031
/* PC Relative offsets of size 15 or 7 bits */
1032
static int
1033
rel_15_7 (struct mem_read_abstraction_base *mra, int offset,
1034
    int *n_operands, struct operand **operands)
1035
15.8k
{
1036
15.8k
  struct operand *op;
1037
15.8k
  bfd_byte upper;
1038
15.8k
  int status = mra->read (mra, offset - 1, 1, &upper);
1039
15.8k
  if (status < 0)
1040
18
    return status;
1041
1042
15.8k
  bool rel_size = (upper & 0x80);
1043
1044
15.8k
  int16_t addr = upper;
1045
15.8k
  if (rel_size)
1046
4.35k
    {
1047
      /* 15 bits.  Get the next byte */
1048
4.35k
      bfd_byte lower;
1049
4.35k
      status = mra->read (mra, offset, 1, &lower);
1050
4.35k
      if (status < 0)
1051
9
  return status;
1052
1053
4.34k
      addr <<= 8;
1054
4.34k
      addr |= lower;
1055
4.34k
      addr &= 0x7FFF;
1056
1057
4.34k
      bool negative = (addr & 0x4000);
1058
4.34k
      addr &= 0x3FFF;
1059
4.34k
      if (negative)
1060
2.99k
  addr = addr - 0x4000;
1061
4.34k
    }
1062
11.5k
  else
1063
11.5k
    {
1064
      /* 7 bits. */
1065
11.5k
      bool negative = (addr & 0x40);
1066
11.5k
      addr &= 0x3F;
1067
11.5k
      if (negative)
1068
2.32k
  addr = addr - 0x40;
1069
11.5k
    }
1070
1071
15.8k
  op = create_simple_memory_operand (addr, mra->posn (mra) - 1, true);
1072
15.8k
  if (op == NULL)
1073
0
    return -1;
1074
15.8k
  operands[(*n_operands)++] = op;
1075
15.8k
  return 0;
1076
15.8k
}
1077
1078
1079
/* PC Relative offsets of size 15 or 7 bits */
1080
static int
1081
decode_rel_15_7 (struct mem_read_abstraction_base *mra,
1082
     int *n_operands, struct operand **operand)
1083
11.0k
{
1084
11.0k
  return rel_15_7 (mra, 1, n_operands, operand);
1085
11.0k
}
1086
1087
static int shift_n_bytes (struct mem_read_abstraction_base *);
1088
static int mov_imm_opr_n_bytes (struct mem_read_abstraction_base *);
1089
static int loop_prim_n_bytes (struct mem_read_abstraction_base *);
1090
static int bm_rel_n_bytes (struct mem_read_abstraction_base *);
1091
static int mul_n_bytes (struct mem_read_abstraction_base *);
1092
static int bm_n_bytes (struct mem_read_abstraction_base *);
1093
1094
static int psh_pul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1095
static int shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1096
static int mul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1097
static int bm_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1098
static int bm_rel_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1099
static int mov_imm_opr (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1100
static int loop_primitive_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
1101
static int bit_field_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
1102
static int exg_sex_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
1103
1104
1105
static enum optr shift_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1106
static enum optr psh_pul_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1107
static enum optr mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1108
static enum optr loop_primitive_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1109
static enum optr bit_field_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1110
static enum optr exg_sex_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1111
1112
1113
static int
1114
cmp_xy (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
1115
  int *n_operands, struct operand **operand)
1116
1.81k
{
1117
1.81k
  struct operand *op;
1118
1119
1.81k
  op = create_register_operand (REG_X);
1120
1.81k
  if (op == NULL)
1121
0
    return -1;
1122
1.81k
  operand[(*n_operands)++] = op;
1123
1.81k
  op = create_register_operand (REG_Y);
1124
1.81k
  if (op == NULL)
1125
0
    return -1;
1126
1.81k
  operand[(*n_operands)++] = op;
1127
1.81k
  return 0;
1128
1.81k
}
1129
1130
static int
1131
sub_d6_x_y (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
1132
      int *n_operands, struct operand **operand)
1133
1.84k
{
1134
1.84k
  struct operand *op;
1135
1136
1.84k
  op = create_register_operand (REG_D6);
1137
1.84k
  if (op == NULL)
1138
0
    return -1;
1139
1.84k
  operand[(*n_operands)++] = op;
1140
1.84k
  op = create_register_operand (REG_X);
1141
1.84k
  if (op == NULL)
1142
0
    return -1;
1143
1.84k
  operand[(*n_operands)++] = op;
1144
1.84k
  op = create_register_operand (REG_Y);
1145
1.84k
  if (op == NULL)
1146
0
    return -1;
1147
1.84k
  operand[(*n_operands)++] = op;
1148
1.84k
  return 0;
1149
1.84k
}
1150
1151
static int
1152
sub_d6_y_x (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
1153
      int *n_operands, struct operand **operand)
1154
2.24k
{
1155
2.24k
  struct operand *op;
1156
1157
2.24k
  op = create_register_operand (REG_D6);
1158
2.24k
  if (op == NULL)
1159
0
    return -1;
1160
2.24k
  operand[(*n_operands)++] = op;
1161
2.24k
  op = create_register_operand (REG_Y);
1162
2.24k
  if (op == NULL)
1163
0
    return -1;
1164
2.24k
  operand[(*n_operands)++] = op;
1165
2.24k
  op = create_register_operand (REG_X);
1166
2.24k
  if (op == NULL)
1167
0
    return -1;
1168
2.24k
  operand[(*n_operands)++] = op;
1169
2.24k
  return 0;
1170
2.24k
}
1171
1172
static int
1173
ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands,
1174
     struct operand **operand);
1175
1176
static enum optr
1177
mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint)
1178
4.23k
{
1179
4.23k
  uint8_t mb;
1180
4.23k
  int status = mra->read (mra, 0, 1, &mb);
1181
4.23k
  if (status < 0)
1182
11
    return OP_INVALID;
1183
1184
4.22k
  bool signed_op = (mb & 0x80);
1185
1186
4.22k
  switch (hint)
1187
4.22k
    {
1188
3.95k
    case OPBASE_mul:
1189
3.95k
      return signed_op ? OP_muls : OP_mulu;
1190
0
      break;
1191
31
    case OPBASE_div:
1192
31
      return signed_op ? OP_divs : OP_divu;
1193
0
      break;
1194
91
    case OPBASE_mod:
1195
91
      return signed_op ? OP_mods : OP_modu;
1196
0
      break;
1197
89
    case OPBASE_mac:
1198
89
      return signed_op ? OP_macs : OP_macu;
1199
0
      break;
1200
61
    case OPBASE_qmul:
1201
61
      return signed_op ? OP_qmuls : OP_qmulu;
1202
0
      break;
1203
0
    default:
1204
0
      abort ();
1205
4.22k
    }
1206
1207
0
  return OP_INVALID;
1208
4.22k
}
1209
1210
struct opcode
1211
{
1212
  /* The operation that this opcode performs.  */
1213
  enum optr operator;
1214
1215
  /* The size of this operation.  May be -1 if it is implied
1216
     in the operands or if size is not applicable.  */
1217
  short osize;
1218
1219
  /* Some operations need this function to work out which operation
1220
   is intended.  */
1221
  discriminator_f discriminator;
1222
1223
  /* A function returning the number of bytes in this instruction.  */
1224
  insn_bytes_f insn_bytes;
1225
1226
  operands_f operands;
1227
  operands_f operands2;
1228
};
1229
1230
static const struct opcode page2[] =
1231
  {
1232
    [0x00] = {OP_ld, -1, 0,  opr_n_bytes_p1, reg_s_opr, 0},
1233
    [0x01] = {OP_st, -1, 0,  opr_n_bytes_p1, reg_s_opr, 0},
1234
    [0x02] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_s_opr, 0},
1235
    [0x03] = {OP_ld, -1, 0,  four, reg_s_imm, 0},
1236
    [0x04] = {OP_cmp, -1, 0, four, reg_s_imm, 0},
1237
    [0x05] = {OP_stop, -1, 0, single, 0, 0},
1238
    [0x06] = {OP_wai, -1, 0,  single, 0, 0},
1239
    [0x07] = {OP_sys, -1, 0,  single, 0, 0},
1240
    [0x08] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},  /* BFEXT / BFINS */
1241
    [0x09] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1242
    [0x0a] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1243
    [0x0b] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1244
    [0x0c] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1245
    [0x0d] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1246
    [0x0e] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1247
    [0x0f] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1248
    [0x10] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1249
    [0x11] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1250
    [0x12] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1251
    [0x13] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1252
    [0x14] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1253
    [0x15] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1254
    [0x16] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1255
    [0x17] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1256
    [0x18] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1257
    [0x19] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1258
    [0x1a] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1259
    [0x1b] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1260
    [0x1c] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1261
    [0x1d] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1262
    [0x1e] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1263
    [0x1f] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1264
    [0x20] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1265
    [0x21] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1266
    [0x22] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1267
    [0x23] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1268
    [0x24] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1269
    [0x25] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1270
    [0x26] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1271
    [0x27] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1272
    [0x28] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1273
    [0x29] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1274
    [0x2a] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1275
    [0x2b] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1276
    [0x2c] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1277
    [0x2d] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1278
    [0x2e] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1279
    [0x2f] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1280
    [0x30] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1281
    [0x31] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1282
    [0x32] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1283
    [0x33] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1284
    [0x34] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1285
    [0x35] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1286
    [0x36] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1287
    [0x37] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1288
    [0x38] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1289
    [0x39] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1290
    [0x3a] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1291
    [0x3b] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1292
    [0x3c] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1293
    [0x3d] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1294
    [0x3e] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1295
    [0x3f] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1296
    [0x40] = {OP_abs, -1, 0, single, z_reg, 0},
1297
    [0x41] = {OP_abs, -1, 0, single, z_reg, 0},
1298
    [0x42] = {OP_abs, -1, 0, single, z_reg, 0},
1299
    [0x43] = {OP_abs, -1, 0, single, z_reg, 0},
1300
    [0x44] = {OP_abs, -1, 0, single, z_reg, 0},
1301
    [0x45] = {OP_abs, -1, 0, single, z_reg, 0},
1302
    [0x46] = {OP_abs, -1, 0, single, z_reg, 0},
1303
    [0x47] = {OP_abs, -1, 0, single, z_reg, 0},
1304
    [0x48] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1305
    [0x49] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1306
    [0x4a] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1307
    [0x4b] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1308
    [0x4c] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1309
    [0x4d] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1310
    [0x4e] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1311
    [0x4f] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1312
    [0x50] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1313
    [0x51] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1314
    [0x52] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1315
    [0x53] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1316
    [0x54] = {OP_adc, -1, 0, two,   z_reg, z_imm1234_0base},
1317
    [0x55] = {OP_adc, -1, 0, two,   z_reg, z_imm1234_0base},
1318
    [0x56] = {OP_adc, -1, 0, five,  z_reg, z_imm1234_0base},
1319
    [0x57] = {OP_adc, -1, 0, five,  z_reg, z_imm1234_0base},
1320
    [0x58] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1321
    [0x59] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1322
    [0x5a] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1323
    [0x5b] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1324
    [0x5c] = {OP_bit, -1, 0, two,   z_reg, z_imm1234_8base},
1325
    [0x5d] = {OP_bit, -1, 0, two,   z_reg, z_imm1234_8base},
1326
    [0x5e] = {OP_bit, -1, 0, five,  z_reg, z_imm1234_8base},
1327
    [0x5f] = {OP_bit, -1, 0, five,  z_reg, z_imm1234_8base},
1328
    [0x60] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1329
    [0x61] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1330
    [0x62] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1331
    [0x63] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1332
    [0x64] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1333
    [0x65] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1334
    [0x66] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1335
    [0x67] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1336
    [0x68] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1337
    [0x69] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1338
    [0x6a] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1339
    [0x6b] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1340
    [0x6c] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1341
    [0x6d] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1342
    [0x6e] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1343
    [0x6f] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1344
    [0x70] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1345
    [0x71] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1346
    [0x72] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1347
    [0x73] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1348
    [0x74] = {OP_sbc, -1, 0, two,   z_reg, z_imm1234_0base},
1349
    [0x75] = {OP_sbc, -1, 0, two,   z_reg, z_imm1234_0base},
1350
    [0x76] = {OP_sbc, -1, 0, five,  z_reg, z_imm1234_0base},
1351
    [0x77] = {OP_sbc, -1, 0, five,  z_reg, z_imm1234_0base},
1352
    [0x78] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1353
    [0x79] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1354
    [0x7a] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1355
    [0x7b] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1356
    [0x7c] = {OP_eor, -1, 0, two,   z_reg, z_imm1234_8base},
1357
    [0x7d] = {OP_eor, -1, 0, two,   z_reg, z_imm1234_8base},
1358
    [0x7e] = {OP_eor, -1, 0, five,  z_reg, z_imm1234_8base},
1359
    [0x7f] = {OP_eor, -1, 0, five,  z_reg, z_imm1234_8base},
1360
    [0x80] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1361
    [0x81] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1362
    [0x82] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1363
    [0x83] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1364
    [0x84] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1365
    [0x85] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1366
    [0x86] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1367
    [0x87] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1368
    [0x88] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1369
    [0x89] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1370
    [0x8a] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1371
    [0x8b] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1372
    [0x8c] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1373
    [0x8d] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1374
    [0x8e] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1375
    [0x8f] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1376
    [0x90] = {OP_rti, -1, 0,  single, 0, 0},
1377
    [0x91] = {OP_clb, -1, 0,   two, z_tfr, 0},
1378
    [0x92] = {OP_trap, -1, 0,  single, trap_decode, 0},
1379
    [0x93] = {OP_trap, -1, 0,  single, trap_decode, 0},
1380
    [0x94] = {OP_trap, -1, 0,  single, trap_decode, 0},
1381
    [0x95] = {OP_trap, -1, 0,  single, trap_decode, 0},
1382
    [0x96] = {OP_trap, -1, 0,  single, trap_decode, 0},
1383
    [0x97] = {OP_trap, -1, 0,  single, trap_decode, 0},
1384
    [0x98] = {OP_trap, -1, 0,  single, trap_decode, 0},
1385
    [0x99] = {OP_trap, -1, 0,  single, trap_decode, 0},
1386
    [0x9a] = {OP_trap, -1, 0,  single, trap_decode, 0},
1387
    [0x9b] = {OP_trap, -1, 0,  single, trap_decode, 0},
1388
    [0x9c] = {OP_trap, -1, 0,  single, trap_decode, 0},
1389
    [0x9d] = {OP_trap, -1, 0,  single, trap_decode, 0},
1390
    [0x9e] = {OP_trap, -1, 0,  single, trap_decode, 0},
1391
    [0x9f] = {OP_trap, -1, 0,  single, trap_decode, 0},
1392
    [0xa0] = {OP_sat, -1, 0, single, z_reg, 0},
1393
    [0xa1] = {OP_sat, -1, 0, single, z_reg, 0},
1394
    [0xa2] = {OP_sat, -1, 0, single, z_reg, 0},
1395
    [0xa3] = {OP_sat, -1, 0, single, z_reg, 0},
1396
    [0xa4] = {OP_sat, -1, 0, single, z_reg, 0},
1397
    [0xa5] = {OP_sat, -1, 0, single, z_reg, 0},
1398
    [0xa6] = {OP_sat, -1, 0, single, z_reg, 0},
1399
    [0xa7] = {OP_sat, -1, 0, single, z_reg, 0},
1400
    [0xa8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1401
    [0xa9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1402
    [0xaa] = {OP_trap, -1, 0,  single, trap_decode, 0},
1403
    [0xab] = {OP_trap, -1, 0,  single, trap_decode, 0},
1404
    [0xac] = {OP_trap, -1, 0,  single, trap_decode, 0},
1405
    [0xad] = {OP_trap, -1, 0,  single, trap_decode, 0},
1406
    [0xae] = {OP_trap, -1, 0,  single, trap_decode, 0},
1407
    [0xaf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1408
    [0xb0] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1409
    [0xb1] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1410
    [0xb2] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1411
    [0xb3] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1412
    [0xb4] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1413
    [0xb5] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1414
    [0xb6] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1415
    [0xb7] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1416
    [0xb8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1417
    [0xb9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1418
    [0xba] = {OP_trap, -1, 0,  single, trap_decode, 0},
1419
    [0xbb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1420
    [0xbc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1421
    [0xbd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1422
    [0xbe] = {OP_trap, -1, 0,  single, trap_decode, 0},
1423
    [0xbf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1424
    [0xc0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1425
    [0xc1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1426
    [0xc2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1427
    [0xc3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1428
    [0xc4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1429
    [0xc5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1430
    [0xc6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1431
    [0xc7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1432
    [0xc8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1433
    [0xc9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1434
    [0xca] = {OP_trap, -1, 0,  single, trap_decode, 0},
1435
    [0xcb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1436
    [0xcc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1437
    [0xcd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1438
    [0xce] = {OP_trap, -1, 0,  single, trap_decode, 0},
1439
    [0xcf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1440
    [0xd0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1441
    [0xd1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1442
    [0xd2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1443
    [0xd3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1444
    [0xd4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1445
    [0xd5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1446
    [0xd6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1447
    [0xd7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1448
    [0xd8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1449
    [0xd9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1450
    [0xda] = {OP_trap, -1, 0,  single, trap_decode, 0},
1451
    [0xdb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1452
    [0xdc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1453
    [0xdd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1454
    [0xde] = {OP_trap, -1, 0,  single, trap_decode, 0},
1455
    [0xdf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1456
    [0xe0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1457
    [0xe1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1458
    [0xe2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1459
    [0xe3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1460
    [0xe4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1461
    [0xe5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1462
    [0xe6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1463
    [0xe7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1464
    [0xe8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1465
    [0xe9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1466
    [0xea] = {OP_trap, -1, 0,  single, trap_decode, 0},
1467
    [0xeb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1468
    [0xec] = {OP_trap, -1, 0,  single, trap_decode, 0},
1469
    [0xed] = {OP_trap, -1, 0,  single, trap_decode, 0},
1470
    [0xee] = {OP_trap, -1, 0,  single, trap_decode, 0},
1471
    [0xef] = {OP_trap, -1, 0,  single, trap_decode, 0},
1472
    [0xf0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1473
    [0xf1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1474
    [0xf2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1475
    [0xf3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1476
    [0xf4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1477
    [0xf5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1478
    [0xf6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1479
    [0xf7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1480
    [0xf8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1481
    [0xf9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1482
    [0xfa] = {OP_trap, -1, 0,  single, trap_decode, 0},
1483
    [0xfb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1484
    [0xfc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1485
    [0xfd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1486
    [0xfe] = {OP_trap, -1, 0,  single, trap_decode, 0},
1487
    [0xff] = {OP_trap, -1, 0,  single, trap_decode, 0},
1488
  };
1489
1490
static const struct opcode page1[] =
1491
  {
1492
    [0x00] = {OP_bgnd, -1, 0, single, 0, 0},
1493
    [0x01] = {OP_nop, -1, 0,  single, 0, 0},
1494
    [0x02] = {OP_brclr, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0},
1495
    [0x03] = {OP_brset, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0},
1496
    [0x04] = {0xFFFF, -1, psh_pul_discrim,   two, psh_pul_decode, 0}, /* psh/pul */
1497
    [0x05] = {OP_rts, -1, 0,  single, 0, 0},
1498
    [0x06] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1499
    [0x07] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1500
    [0x08] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1501
    [0x09] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1502
    [0x0a] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1503
    [0x0b] = {0xFFFF, -1, loop_primitive_discrim, loop_prim_n_bytes, loop_primitive_decode, 0}, /* Loop primitives TBcc / DBcc */
1504
    [0x0c] = {OP_mov, 0, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1505
    [0x0d] = {OP_mov, 1, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1506
    [0x0e] = {OP_mov, 2, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1507
    [0x0f] = {OP_mov, 3, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1508
    [0x10] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},  /* lsr/lsl/asl/asr/rol/ror */
1509
    [0x11] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1510
    [0x12] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1511
    [0x13] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1512
    [0x14] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1513
    [0x15] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1514
    [0x16] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1515
    [0x17] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1516
    [0x18] = {OP_lea, -1, 0,  two, lea_reg_xys, NULL},
1517
    [0x19] = {OP_lea, -1, 0,  two, lea_reg_xys, NULL},
1518
    [0x1a] = {OP_lea, -1, 0,  two, lea_reg_xys, NULL},
1519
    /* 0x1b PG2 */
1520
    [0x1c] = {OP_mov, 0, 0, opr_n_bytes2, z_opr_decode2, 0},
1521
    [0x1d] = {OP_mov, 1, 0, opr_n_bytes2, z_opr_decode2, 0},
1522
    [0x1e] = {OP_mov, 2, 0, opr_n_bytes2, z_opr_decode2, 0},
1523
    [0x1f] = {OP_mov, 3, 0, opr_n_bytes2, z_opr_decode2, 0},
1524
    [0x20] = {OP_bra, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1525
    [0x21] = {OP_bsr, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1526
    [0x22] = {OP_bhi, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1527
    [0x23] = {OP_bls, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1528
    [0x24] = {OP_bcc, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1529
    [0x25] = {OP_bcs, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1530
    [0x26] = {OP_bne, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1531
    [0x27] = {OP_beq, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1532
    [0x28] = {OP_bvc, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1533
    [0x29] = {OP_bvs, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1534
    [0x2a] = {OP_bpl, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1535
    [0x2b] = {OP_bmi, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1536
    [0x2c] = {OP_bge, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1537
    [0x2d] = {OP_blt, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1538
    [0x2e] = {OP_bgt, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1539
    [0x2f] = {OP_ble, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1540
    [0x30] = {OP_inc, -1, 0, single, z_reg, 0},
1541
    [0x31] = {OP_inc, -1, 0, single, z_reg, 0},
1542
    [0x32] = {OP_inc, -1, 0, single, z_reg, 0},
1543
    [0x33] = {OP_inc, -1, 0, single, z_reg, 0},
1544
    [0x34] = {OP_inc, -1, 0, single, z_reg, 0},
1545
    [0x35] = {OP_inc, -1, 0, single, z_reg, 0},
1546
    [0x36] = {OP_inc, -1, 0, single, z_reg, 0},
1547
    [0x37] = {OP_inc, -1, 0, single, z_reg, 0},
1548
    [0x38] = {OP_clr, -1, 0, single, z_reg, 0},
1549
    [0x39] = {OP_clr, -1, 0, single, z_reg, 0},
1550
    [0x3a] = {OP_clr, -1, 0, single, z_reg, 0},
1551
    [0x3b] = {OP_clr, -1, 0, single, z_reg, 0},
1552
    [0x3c] = {OP_clr, -1, 0, single, z_reg, 0},
1553
    [0x3d] = {OP_clr, -1, 0, single, z_reg, 0},
1554
    [0x3e] = {OP_clr, -1, 0, single, z_reg, 0},
1555
    [0x3f] = {OP_clr, -1, 0, single, z_reg, 0},
1556
    [0x40] = {OP_dec, -1, 0, single, z_reg, 0},
1557
    [0x41] = {OP_dec, -1, 0, single, z_reg, 0},
1558
    [0x42] = {OP_dec, -1, 0, single, z_reg, 0},
1559
    [0x43] = {OP_dec, -1, 0, single, z_reg, 0},
1560
    [0x44] = {OP_dec, -1, 0, single, z_reg, 0},
1561
    [0x45] = {OP_dec, -1, 0, single, z_reg, 0},
1562
    [0x46] = {OP_dec, -1, 0, single, z_reg, 0},
1563
    [0x47] = {OP_dec, -1, 0, single, z_reg, 0},
1564
    [0x48] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1565
    [0x49] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1566
    [0x4a] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1567
    [0x4b] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1568
    [0x4c] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1569
    [0x4d] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1570
    [0x4e] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1571
    [0x4f] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1572
    [0x50] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1573
    [0x51] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1574
    [0x52] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1575
    [0x53] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1576
    [0x54] = {OP_add, -1, 0, two,   z_reg, z_imm1234_0base},
1577
    [0x55] = {OP_add, -1, 0, two,   z_reg, z_imm1234_0base},
1578
    [0x56] = {OP_add, -1, 0, five,  z_reg, z_imm1234_0base},
1579
    [0x57] = {OP_add, -1, 0, five,  z_reg, z_imm1234_0base},
1580
    [0x58] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1581
    [0x59] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1582
    [0x5a] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1583
    [0x5b] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1584
    [0x5c] = {OP_and, -1, 0, two,   z_reg, z_imm1234_8base},
1585
    [0x5d] = {OP_and, -1, 0, two,   z_reg, z_imm1234_8base},
1586
    [0x5e] = {OP_and, -1, 0, five,  z_reg, z_imm1234_8base},
1587
    [0x5f] = {OP_and, -1, 0, five,  z_reg, z_imm1234_8base},
1588
    [0x60] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1589
    [0x61] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1590
    [0x62] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1591
    [0x63] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1592
    [0x64] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1593
    [0x65] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1594
    [0x66] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1595
    [0x67] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1596
    [0x68] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1597
    [0x69] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1598
    [0x6a] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1599
    [0x6b] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1600
    [0x6c] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1601
    [0x6d] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1602
    [0x6e] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1603
    [0x6f] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1604
    [0x70] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1605
    [0x71] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1606
    [0x72] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1607
    [0x73] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1608
    [0x74] = {OP_sub, -1, 0, two,   z_reg, z_imm1234_0base},
1609
    [0x75] = {OP_sub, -1, 0, two,   z_reg, z_imm1234_0base},
1610
    [0x76] = {OP_sub, -1, 0, five,  z_reg, z_imm1234_0base},
1611
    [0x77] = {OP_sub, -1, 0, five,  z_reg, z_imm1234_0base},
1612
    [0x78] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1613
    [0x79] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1614
    [0x7a] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1615
    [0x7b] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1616
    [0x7c] = {OP_or, -1, 0, two,   z_reg, z_imm1234_8base},
1617
    [0x7d] = {OP_or, -1, 0, two,   z_reg, z_imm1234_8base},
1618
    [0x7e] = {OP_or, -1, 0, five,  z_reg, z_imm1234_8base},
1619
    [0x7f] = {OP_or, -1, 0, five,  z_reg, z_imm1234_8base},
1620
    [0x80] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1621
    [0x81] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1622
    [0x82] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1623
    [0x83] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1624
    [0x84] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1625
    [0x85] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1626
    [0x86] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1627
    [0x87] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1628
    [0x88] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1629
    [0x89] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1630
    [0x8a] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1631
    [0x8b] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1632
    [0x8c] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1633
    [0x8d] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1634
    [0x8e] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1635
    [0x8f] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1636
    [0x90] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1637
    [0x91] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1638
    [0x92] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1639
    [0x93] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1640
    [0x94] = {OP_ld, -1, 0, two,    z_reg, z_imm1234_0base},
1641
    [0x95] = {OP_ld, -1, 0, two,    z_reg, z_imm1234_0base},
1642
    [0x96] = {OP_ld, -1, 0, five,   z_reg, z_imm1234_0base},
1643
    [0x97] = {OP_ld, -1, 0, five,   z_reg, z_imm1234_0base},
1644
    [0x98] = {OP_ld, -1, 0, four,   reg_xy, z_imm1234_0base},
1645
    [0x99] = {OP_ld, -1, 0, four,   reg_xy, z_imm1234_0base},
1646
    [0x9a] = {OP_clr, -1, 0, single, reg_xy, 0},
1647
    [0x9b] = {OP_clr, -1, 0, single, reg_xy, 0},
1648
    [0x9c] = {OP_inc, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1649
    [0x9d] = {OP_inc, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1650
    [0x9e] = {OP_tfr, -1, 0, two, z_tfr, NULL},
1651
    [0x9f] = {OP_inc, 3, 0, opr_n_bytes_p1, z_opr_decode, 0},
1652
    [0xa0] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1653
    [0xa1] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1654
    [0xa2] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1655
    [0xa3] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1656
    [0xa4] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1657
    [0xa5] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1658
    [0xa6] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1659
    [0xa7] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1660
    [0xa8] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1661
    [0xa9] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1662
    [0xaa] = {OP_jmp, -1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1663
    [0xab] = {OP_jsr, -1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1664
    [0xac] = {OP_dec, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1665
    [0xad] = {OP_dec, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1666
    [0xae] = {0xFFFF, -1, exg_sex_discrim,   two, exg_sex_decode, 0},  /* EXG / SEX */
1667
    [0xaf] = {OP_dec, 3, 0, opr_n_bytes_p1, 0, z_opr_decode},
1668
    [0xb0] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1669
    [0xb1] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1670
    [0xb2] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1671
    [0xb3] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1672
    [0xb4] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1673
    [0xb5] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1674
    [0xb6] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1675
    [0xb7] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1676
    [0xb8] = {OP_ld, -1, 0, four,  reg_xy, z_ext24_decode},
1677
    [0xb9] = {OP_ld, -1, 0, four,  reg_xy, z_ext24_decode},
1678
    [0xba] = {OP_jmp, -1, 0, four, z_ext24_decode, 0},
1679
    [0xbb] = {OP_jsr, -1, 0, four, z_ext24_decode, 0},
1680
    [0xbc] = {OP_clr, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1681
    [0xbd] = {OP_clr, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1682
    [0xbe] = {OP_clr, 2, 0, opr_n_bytes_p1, z_opr_decode, 0},
1683
    [0xbf] = {OP_clr, 3, 0, opr_n_bytes_p1, z_opr_decode, 0},
1684
    [0xc0] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1685
    [0xc1] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1686
    [0xc2] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1687
    [0xc3] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1688
    [0xc4] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1689
    [0xc5] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1690
    [0xc6] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1691
    [0xc7] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1692
    [0xc8] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1693
    [0xc9] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1694
    [0xca] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1695
    [0xcb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1696
    [0xcc] = {OP_com, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1697
    [0xcd] = {OP_com, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1698
    [0xce] = {OP_andcc, -1, 0, two, imm1_decode, 0},
1699
    [0xcf] = {OP_com, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1700
    [0xd0] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1701
    [0xd1] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1702
    [0xd2] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1703
    [0xd3] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1704
    [0xd4] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1705
    [0xd5] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1706
    [0xd6] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1707
    [0xd7] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1708
    [0xd8] = {OP_st, -1, 0, four,  reg_xy, z_ext24_decode},
1709
    [0xd9] = {OP_st, -1, 0, four,  reg_xy, z_ext24_decode},
1710
    [0xda] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1711
    [0xdb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1712
    [0xdc] = {OP_neg, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1713
    [0xdd] = {OP_neg, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1714
    [0xde] = {OP_orcc, -1, 0,  two,  imm1_decode, 0},
1715
    [0xdf] = {OP_neg,  3, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1716
    [0xe0] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1717
    [0xe1] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1718
    [0xe2] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1719
    [0xe3] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1720
    [0xe4] = {OP_cmp, -1, 0, two,    z_reg, z_imm1234_0base},
1721
    [0xe5] = {OP_cmp, -1, 0, two,    z_reg, z_imm1234_0base},
1722
    [0xe6] = {OP_cmp, -1, 0, five,   z_reg, z_imm1234_0base},
1723
    [0xe7] = {OP_cmp, -1, 0, five,   z_reg, z_imm1234_0base},
1724
    [0xe8] = {OP_cmp, -1, 0, four,   reg_xy, z_imm1234_0base},
1725
    [0xe9] = {OP_cmp, -1, 0, four,   reg_xy, z_imm1234_0base},
1726
    [0xea] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1727
    [0xeb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1728
    [0xec] = {OP_bclr, -1, 0, bm_n_bytes, bm_decode, 0},
1729
    [0xed] = {OP_bset, -1, 0, bm_n_bytes, bm_decode, 0},
1730
    [0xee] = {OP_btgl, -1, 0, bm_n_bytes, bm_decode, 0},
1731
    [0xef] = {OP_INVALID, -1, 0, NULL, NULL, NULL}, /* SPARE */
1732
    [0xf0] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1733
    [0xf1] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1734
    [0xf2] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1735
    [0xf3] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1736
    [0xf4] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1737
    [0xf5] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1738
    [0xf6] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1739
    [0xf7] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1740
    [0xf8] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1741
    [0xf9] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1742
    [0xfa] = {OP_ld, -1, 0,  three, reg_xy, ld_18bit_decode},
1743
    [0xfb] = {OP_ld, -1, 0,  three, reg_xy, ld_18bit_decode},
1744
    [0xfc] = {OP_cmp, -1, 0, single, cmp_xy, 0},
1745
    [0xfd] = {OP_sub, -1, 0, single, sub_d6_x_y, 0},
1746
    [0xfe] = {OP_sub, -1, 0, single, sub_d6_y_x, 0},
1747
    [0xff] = {OP_swi, -1, 0, single, 0, 0}
1748
  };
1749
1750
static const int oprregs1[] =
1751
  {
1752
    REG_D3, REG_D2, REG_D1, REG_D0, REG_CCL, REG_CCH
1753
  };
1754
1755
static const int oprregs2[] =
1756
  {
1757
    REG_Y,  REG_X,  REG_D7, REG_D6, REG_D5,  REG_D4
1758
  };
1759
1760
1761

1762
1763
enum MUL_MODE
1764
  {
1765
    MUL_REG_REG,
1766
    MUL_REG_OPR,
1767
    MUL_REG_IMM,
1768
    MUL_OPR_OPR
1769
  };
1770
1771
struct mb
1772
{
1773
  uint8_t mask;
1774
  uint8_t value;
1775
  enum MUL_MODE mode;
1776
};
1777
1778
static const struct mb mul_table[] = {
1779
  {0x40, 0x00, MUL_REG_REG},
1780
1781
  {0x47, 0x40, MUL_REG_OPR},
1782
  {0x47, 0x41, MUL_REG_OPR},
1783
  {0x47, 0x43, MUL_REG_OPR},
1784
1785
  {0x47, 0x44, MUL_REG_IMM},
1786
  {0x47, 0x45, MUL_REG_IMM},
1787
  {0x47, 0x47, MUL_REG_IMM},
1788
1789
  {0x43, 0x42, MUL_OPR_OPR},
1790
};
1791
1792
1793
static int
1794
mul_decode (struct mem_read_abstraction_base *mra,
1795
      int *n_operands, struct operand **operand)
1796
4.22k
{
1797
4.22k
  uint8_t mb;
1798
4.22k
  struct operand *op;
1799
4.22k
  int status = mra->read (mra, 0, 1, &mb);
1800
4.22k
  if (status < 0)
1801
0
    return status;
1802
1803
4.22k
  uint8_t byte;
1804
4.22k
  status = mra->read (mra, -1, 1, &byte);
1805
4.22k
  if (status < 0)
1806
0
    return status;
1807
1808
4.22k
  enum MUL_MODE mode = -1;
1809
4.22k
  size_t i;
1810
18.9k
  for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i)
1811
18.9k
    {
1812
18.9k
      const struct mb *mm = mul_table + i;
1813
18.9k
      if ((mb & mm->mask) == mm->value)
1814
4.22k
  {
1815
4.22k
    mode = mm->mode;
1816
4.22k
    break;
1817
4.22k
  }
1818
18.9k
    }
1819
4.22k
  op = create_register_operand (byte & 0x07);
1820
4.22k
  if (op == NULL)
1821
0
    return -1;
1822
4.22k
  operand[(*n_operands)++] = op;
1823
1824
4.22k
  switch (mode)
1825
4.22k
    {
1826
1.26k
    case MUL_REG_IMM:
1827
1.26k
      {
1828
1.26k
  int size = (mb & 0x3);
1829
1.26k
  op = create_register_operand_with_size ((mb & 0x38) >> 3, size);
1830
1.26k
  if (op == NULL)
1831
0
    return -1;
1832
1.26k
  operand[(*n_operands)++] = op;
1833
1834
1.26k
  uint32_t imm;
1835
1.26k
  if (z_decode_signed_value (mra, 1, size + 1, &imm) < 0)
1836
7
    return -1;
1837
1.26k
  op = create_immediate_operand (imm);
1838
1.26k
  if (op == NULL)
1839
0
    return -1;
1840
1.26k
  operand[(*n_operands)++] = op;
1841
1.26k
      }
1842
0
      break;
1843
1.28k
    case MUL_REG_REG:
1844
1.28k
      op = create_register_operand ((mb & 0x38) >> 3);
1845
1.28k
      if (op == NULL)
1846
0
  return -1;
1847
1.28k
      operand[(*n_operands)++] = op;
1848
1.28k
      op = create_register_operand (mb & 0x07);
1849
1.28k
      if (op == NULL)
1850
0
  return -1;
1851
1.28k
      operand[(*n_operands)++] = op;
1852
1.28k
      break;
1853
673
    case MUL_REG_OPR:
1854
673
      op = create_register_operand ((mb & 0x38) >> 3);
1855
673
      if (op == NULL)
1856
0
  return -1;
1857
673
      operand[(*n_operands)++] = op;
1858
673
      op = x_opr_decode_with_size (mra, 1, mb & 0x3);
1859
673
      if (op == NULL)
1860
1
  return -1;
1861
672
      operand[(*n_operands)++] = op;
1862
672
      break;
1863
996
    case MUL_OPR_OPR:
1864
996
      {
1865
996
  int first = x_opr_n_bytes (mra, 1);
1866
996
  if (first < 0)
1867
1
    return first;
1868
995
  op = x_opr_decode_with_size (mra, 1, (mb & 0x30) >> 4);
1869
995
  if (op == NULL)
1870
2
    return -1;
1871
993
  operand[(*n_operands)++] = op;
1872
993
  op = x_opr_decode_with_size (mra, first + 1, (mb & 0x0c) >> 2);
1873
993
  if (op == NULL)
1874
2
    return -1;
1875
991
  operand[(*n_operands)++] = op;
1876
991
  break;
1877
993
      }
1878
4.22k
    }
1879
4.20k
  return 0;
1880
4.22k
}
1881
1882
1883
static int
1884
mul_n_bytes (struct mem_read_abstraction_base *mra)
1885
4.20k
{
1886
4.20k
  int nx = 2;
1887
4.20k
  int first, second;
1888
4.20k
  uint8_t mb;
1889
4.20k
  int status = mra->read (mra, 0, 1, &mb);
1890
4.20k
  if (status < 0)
1891
0
    return status;
1892
1893
4.20k
  enum MUL_MODE mode = -1;
1894
4.20k
  size_t i;
1895
18.8k
  for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i)
1896
18.8k
    {
1897
18.8k
      const struct mb *mm = mul_table + i;
1898
18.8k
      if ((mb & mm->mask) == mm->value)
1899
4.20k
  {
1900
4.20k
    mode = mm->mode;
1901
4.20k
    break;
1902
4.20k
  }
1903
18.8k
    }
1904
1905
4.20k
  int size = (mb & 0x3) + 1;
1906
1907
4.20k
  switch (mode)
1908
4.20k
    {
1909
1.26k
    case MUL_REG_IMM:
1910
1.26k
      nx += size;
1911
1.26k
      break;
1912
1.28k
    case MUL_REG_REG:
1913
1.28k
      break;
1914
672
    case MUL_REG_OPR:
1915
672
      first = x_opr_n_bytes (mra, 1);
1916
672
      if (first < 0)
1917
0
  return first;
1918
672
      nx += first;
1919
672
      break;
1920
991
    case MUL_OPR_OPR:
1921
991
      first = x_opr_n_bytes (mra, nx - 1);
1922
991
      if (first < 0)
1923
0
  return first;
1924
991
      nx += first;
1925
991
      second = x_opr_n_bytes (mra, nx - 1);
1926
991
      if (second < 0)
1927
0
  return second;
1928
991
      nx += second;
1929
991
      break;
1930
4.20k
    }
1931
1932
4.20k
  return nx;
1933
4.20k
}
1934
1935

1936
/* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1,
1937
   and contains obvious typos.
1938
   However the Freescale tools and experiments with the chip itself
1939
   seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG
1940
   respectively.  */
1941
1942
enum BM_MODE
1943
{
1944
  BM_REG_IMM,
1945
  BM_RESERVED0,
1946
  BM_OPR_B,
1947
  BM_OPR_W,
1948
  BM_OPR_L,
1949
  BM_OPR_REG,
1950
  BM_RESERVED1
1951
};
1952
1953
struct bm
1954
{
1955
  uint8_t mask;
1956
  uint8_t value;
1957
  enum BM_MODE mode;
1958
};
1959
1960
static const  struct bm bm_table[] = {
1961
  { 0xC6, 0x04,     BM_REG_IMM},
1962
  { 0x84, 0x00,     BM_REG_IMM},
1963
  { 0x06, 0x06,     BM_REG_IMM},
1964
  { 0xC6, 0x44,     BM_RESERVED0},
1965
1966
  { 0x8F, 0x80,     BM_OPR_B},
1967
  { 0x8E, 0x82,     BM_OPR_W},
1968
  { 0x8C, 0x88,     BM_OPR_L},
1969
1970
  { 0x83, 0x81,     BM_OPR_REG},
1971
  { 0x87, 0x84,     BM_RESERVED1},
1972
};
1973
1974
static int
1975
bm_decode (struct mem_read_abstraction_base *mra,
1976
     int *n_operands, struct operand **operand)
1977
2.44k
{
1978
2.44k
  struct operand *op;
1979
2.44k
  uint8_t bm;
1980
2.44k
  int status = mra->read (mra, 0, 1, &bm);
1981
2.44k
  if (status < 0)
1982
7
    return status;
1983
1984
2.43k
  size_t i;
1985
2.43k
  enum BM_MODE mode = -1;
1986
12.4k
  for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
1987
12.4k
    {
1988
12.4k
      const struct bm *bme = bm_table + i;
1989
12.4k
      if ((bm & bme->mask) == bme->value)
1990
2.43k
  {
1991
2.43k
    mode = bme->mode;
1992
2.43k
    break;
1993
2.43k
  }
1994
12.4k
    }
1995
1996
2.43k
  switch (mode)
1997
2.43k
    {
1998
1.26k
    case BM_REG_IMM:
1999
1.34k
    case BM_RESERVED0:
2000
1.34k
      op = create_register_operand (bm & 0x07);
2001
1.34k
      if (op == NULL)
2002
0
  return -1;
2003
1.34k
      operand[(*n_operands)++] = op;
2004
1.34k
      break;
2005
112
    case BM_OPR_B:
2006
112
      op = x_opr_decode_with_size (mra, 1, 0);
2007
112
      if (op == NULL)
2008
0
  return -1;
2009
112
      operand[(*n_operands)++] = op;
2010
112
      break;
2011
38
    case BM_OPR_W:
2012
38
      op = x_opr_decode_with_size (mra, 1, 1);
2013
38
      if (op == NULL)
2014
5
  return -1;
2015
33
      operand[(*n_operands)++] = op;
2016
33
      break;
2017
67
    case BM_OPR_L:
2018
67
      op = x_opr_decode_with_size (mra, 1, 3);
2019
67
      if (op == NULL)
2020
3
  return -1;
2021
64
      operand[(*n_operands)++] = op;
2022
64
      break;
2023
215
    case BM_OPR_REG:
2024
878
    case BM_RESERVED1:
2025
878
      {
2026
878
  uint8_t xb;
2027
878
  status = mra->read (mra, 1, 1, &xb);
2028
878
  if (status < 0)
2029
8
    return status;
2030
  /* Don't emit a size suffix for register operands */
2031
870
  if ((xb & 0xF8) != 0xB8)
2032
549
    op = x_opr_decode_with_size (mra, 1, (bm & 0x0c) >> 2);
2033
321
  else
2034
321
    op = x_opr_decode (mra, 1);
2035
870
  if (op == NULL)
2036
13
    return -1;
2037
857
  operand[(*n_operands)++] = op;
2038
857
      }
2039
0
      break;
2040
2.43k
    }
2041
2042
2.40k
  uint8_t imm = 0;
2043
2.40k
  switch (mode)
2044
2.40k
    {
2045
1.26k
    case BM_REG_IMM:
2046
1.34k
    case BM_RESERVED0:
2047
1.34k
      imm = (bm & 0x38) >> 3;
2048
1.34k
      op = create_immediate_operand (imm);
2049
1.34k
      if (op == NULL)
2050
0
  return -1;
2051
1.34k
      operand[(*n_operands)++] = op;
2052
1.34k
      break;
2053
64
    case BM_OPR_L:
2054
64
      imm |= (bm & 0x03) << 3;
2055
      /* fallthrough */
2056
97
    case BM_OPR_W:
2057
97
      imm |= (bm & 0x01) << 3;
2058
      /* fallthrough */
2059
209
    case BM_OPR_B:
2060
209
      imm |= (bm & 0x70) >> 4;
2061
209
      op = create_immediate_operand (imm);
2062
209
      if (op == NULL)
2063
0
  return -1;
2064
209
      operand[(*n_operands)++] = op;
2065
209
      break;
2066
215
    case BM_OPR_REG:
2067
857
    case BM_RESERVED1:
2068
857
      op = create_register_operand ((bm & 0x70) >> 4);
2069
857
      if (op == NULL)
2070
0
  return -1;
2071
857
      operand[(*n_operands)++] = op;
2072
857
      break;
2073
2.40k
    }
2074
2.40k
  return 0;
2075
2.40k
}
2076
2077
2078
static int
2079
bm_rel_decode (struct mem_read_abstraction_base *mra,
2080
         int *n_operands, struct operand **operand)
2081
4.07k
{
2082
4.07k
  struct operand *op;
2083
4.07k
  uint8_t bm;
2084
4.07k
  int status = mra->read (mra, 0, 1, &bm);
2085
4.07k
  if (status < 0)
2086
1
    return status;
2087
2088
4.06k
  size_t i;
2089
4.06k
  enum BM_MODE mode = -1;
2090
14.8k
  for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
2091
14.8k
    {
2092
14.8k
      const struct bm *bme = bm_table + i;
2093
14.8k
      if ((bm & bme->mask) == bme->value)
2094
4.06k
  {
2095
4.06k
    mode = bme->mode;
2096
4.06k
    break;
2097
4.06k
  }
2098
14.8k
    }
2099
2100
4.06k
  int n = 1;
2101
4.06k
  switch (mode)
2102
4.06k
    {
2103
2.71k
    case BM_REG_IMM:
2104
2.92k
    case BM_RESERVED0:
2105
2.92k
      op = create_register_operand (bm & 0x07);
2106
2.92k
      if (op == NULL)
2107
0
  return -1;
2108
2.92k
      operand[(*n_operands)++] = op;
2109
2.92k
      break;
2110
289
    case BM_OPR_B:
2111
289
      op = x_opr_decode_with_size (mra, 1, 0);
2112
289
      if (op == NULL)
2113
0
  return -1;
2114
289
      operand[(*n_operands)++] = op;
2115
289
      n = x_opr_n_bytes (mra, 1);
2116
289
      if (n < 0)
2117
0
  return n;
2118
289
      n += 1;
2119
289
      break;
2120
73
    case BM_OPR_W:
2121
73
      op = x_opr_decode_with_size (mra, 1, 1);
2122
73
      if (op == NULL)
2123
8
  return -1;
2124
65
      operand[(*n_operands)++] = op;
2125
65
      n = x_opr_n_bytes (mra, 1);
2126
65
      if (n < 0)
2127
0
  return n;
2128
65
      n += 1;
2129
65
      break;
2130
234
    case BM_OPR_L:
2131
234
      op = x_opr_decode_with_size (mra, 1, 3);
2132
234
      if (op == NULL)
2133
5
  return -1;
2134
229
      operand[(*n_operands)++] = op;
2135
229
      n = x_opr_n_bytes (mra, 1);
2136
229
      if (n < 0)
2137
0
  return n;
2138
229
      n += 1;
2139
229
      break;
2140
350
    case BM_OPR_REG:
2141
547
    case BM_RESERVED1:
2142
547
      {
2143
547
  uint8_t xb;
2144
547
  status = mra->read (mra, +1, 1, &xb);
2145
547
  if (status < 0)
2146
0
    return status;
2147
  /* Don't emit a size suffix for register operands */
2148
547
  if ((xb & 0xF8) != 0xB8)
2149
465
    {
2150
465
      short os = (bm & 0x0c) >> 2;
2151
465
      op = x_opr_decode_with_size (mra, 1, os);
2152
465
    }
2153
82
  else
2154
82
    op = x_opr_decode (mra, 1);
2155
547
  if (op == NULL)
2156
1
    return -1;
2157
546
  operand[(*n_operands)++] = op;
2158
546
      }
2159
0
      break;
2160
4.06k
    }
2161
2162
4.05k
  int x, imm = 0;
2163
4.05k
  switch (mode)
2164
4.05k
    {
2165
229
    case BM_OPR_L:
2166
229
      imm |= (bm & 0x02) << 3;
2167
      /* fall through */
2168
294
    case BM_OPR_W:
2169
294
      imm |= (bm & 0x01) << 3;
2170
      /* fall through */
2171
583
    case BM_OPR_B:
2172
583
      imm |= (bm & 0x70) >> 4;
2173
583
      op = create_immediate_operand (imm);
2174
583
      if (op == NULL)
2175
0
  return -1;
2176
583
      operand[(*n_operands)++] = op;
2177
583
      break;
2178
210
    case BM_RESERVED0:
2179
210
      imm = (bm & 0x38) >> 3;
2180
210
      op = create_immediate_operand (imm);
2181
210
      if (op == NULL)
2182
0
  return -1;
2183
210
      operand[(*n_operands)++] = op;
2184
210
      break;
2185
2.71k
    case BM_REG_IMM:
2186
2.71k
      imm = (bm & 0xF8) >> 3;
2187
2.71k
      op = create_immediate_operand (imm);
2188
2.71k
      if (op == NULL)
2189
0
  return -1;
2190
2.71k
      operand[(*n_operands)++] = op;
2191
2.71k
      break;
2192
350
    case BM_OPR_REG:
2193
546
    case BM_RESERVED1:
2194
546
      op = create_register_operand ((bm & 0x70) >> 4);
2195
546
      if (op == NULL)
2196
0
  return -1;
2197
546
      operand[(*n_operands)++] = op;
2198
546
      x = x_opr_n_bytes (mra, 1);
2199
546
      if (x < 0)
2200
0
  return x;
2201
546
      n += x;
2202
546
      break;
2203
4.05k
    }
2204
2205
4.05k
  return rel_15_7 (mra, n + 1, n_operands, operand);
2206
4.05k
}
2207
2208
static int
2209
bm_n_bytes (struct mem_read_abstraction_base *mra)
2210
6.45k
{
2211
6.45k
  uint8_t bm;
2212
6.45k
  int status = mra->read (mra, 0, 1, &bm);
2213
6.45k
  if (status < 0)
2214
0
    return status;
2215
2216
6.45k
  size_t i;
2217
6.45k
  enum BM_MODE mode = -1;
2218
26.9k
  for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
2219
26.9k
    {
2220
26.9k
      const struct bm *bme = bm_table + i;
2221
26.9k
      if ((bm & bme->mask) == bme->value)
2222
6.45k
  {
2223
6.45k
    mode = bme->mode;
2224
6.45k
    break;
2225
6.45k
  }
2226
26.9k
    }
2227
2228
6.45k
  int n = 0;
2229
6.45k
  switch (mode)
2230
6.45k
    {
2231
3.97k
    case BM_REG_IMM:
2232
4.26k
    case BM_RESERVED0:
2233
4.26k
      break;
2234
2235
401
    case BM_OPR_B:
2236
499
    case BM_OPR_W:
2237
787
    case BM_OPR_L:
2238
1.35k
    case BM_OPR_REG:
2239
2.19k
    case BM_RESERVED1:
2240
2.19k
      n = x_opr_n_bytes (mra, 1);
2241
2.19k
      if (n < 0)
2242
0
  return n;
2243
2.19k
      break;
2244
6.45k
    }
2245
2246
6.45k
  return n + 2;
2247
6.45k
}
2248
2249
static int
2250
bm_rel_n_bytes (struct mem_read_abstraction_base *mra)
2251
4.04k
{
2252
4.04k
  int n = 1 + bm_n_bytes (mra);
2253
2254
4.04k
  bfd_byte rb;
2255
4.04k
  int status = mra->read (mra, n - 2, 1, &rb);
2256
4.04k
  if (status != 0)
2257
0
    return status;
2258
2259
4.04k
  if (rb & 0x80)
2260
1.25k
    n++;
2261
2262
4.04k
  return n;
2263
4.04k
}
2264
2265
2266

2267
2268
2269
/* shift direction */
2270
enum SB_DIR
2271
  {
2272
    SB_LEFT,
2273
    SB_RIGHT
2274
  };
2275
2276
enum SB_TYPE
2277
  {
2278
    SB_ARITHMETIC,
2279
    SB_LOGICAL
2280
  };
2281
2282
2283
enum SB_MODE
2284
  {
2285
    SB_REG_REG_N_EFF,
2286
    SB_REG_REG_N,
2287
    SB_REG_OPR_EFF,
2288
    SB_ROT,
2289
    SB_REG_OPR_OPR,
2290
    SB_OPR_N
2291
  };
2292
2293
struct sb
2294
{
2295
  uint8_t mask;
2296
  uint8_t value;
2297
  enum SB_MODE mode;
2298
};
2299
2300
static const  struct sb sb_table[] = {
2301
  {0x30, 0x00,     SB_REG_REG_N_EFF},
2302
  {0x30, 0x10,     SB_REG_REG_N},
2303
  {0x34, 0x20,     SB_REG_OPR_EFF},
2304
  {0x34, 0x24,     SB_ROT},
2305
  {0x34, 0x30,     SB_REG_OPR_OPR},
2306
  {0x34, 0x34,     SB_OPR_N},
2307
};
2308
2309
static int
2310
shift_n_bytes (struct mem_read_abstraction_base *mra)
2311
7.21k
{
2312
7.21k
  bfd_byte sb;
2313
7.21k
  int opr1, opr2;
2314
7.21k
  int status = mra->read (mra, 0, 1, &sb);
2315
7.21k
  if (status != 0)
2316
0
    return status;
2317
2318
7.21k
  size_t i;
2319
7.21k
  enum SB_MODE mode = -1;
2320
50.4k
  for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2321
43.2k
    {
2322
43.2k
      const struct sb *sbe = sb_table + i;
2323
43.2k
      if ((sb & sbe->mask) == sbe->value)
2324
7.21k
  mode = sbe->mode;
2325
43.2k
    }
2326
2327
7.21k
  switch (mode)
2328
7.21k
    {
2329
1.83k
    case SB_REG_REG_N_EFF:
2330
1.83k
      return 2;
2331
425
    case SB_REG_OPR_EFF:
2332
747
    case SB_ROT:
2333
747
      opr1 = x_opr_n_bytes (mra, 1);
2334
747
      if (opr1 < 0)
2335
0
  return opr1;
2336
747
      return 2 + opr1;
2337
782
    case SB_REG_OPR_OPR:
2338
782
      opr1 = x_opr_n_bytes (mra, 1);
2339
782
      if (opr1 < 0)
2340
0
  return opr1;
2341
782
      opr2 = 0;
2342
782
      if ((sb & 0x30) != 0x20)
2343
782
  {
2344
782
    opr2 = x_opr_n_bytes (mra, opr1 + 1);
2345
782
    if (opr2 < 0)
2346
0
      return opr2;
2347
782
  }
2348
782
      return 2 + opr1 + opr2;
2349
3.84k
    default:
2350
3.84k
      return 3;
2351
7.21k
    }
2352
2353
  /* not reached */
2354
0
  return -1;
2355
7.21k
}
2356

2357
2358
static int
2359
mov_imm_opr_n_bytes (struct mem_read_abstraction_base *mra)
2360
3.20k
{
2361
3.20k
  bfd_byte byte;
2362
3.20k
  int status = mra->read (mra, -1, 1, &byte);
2363
3.20k
  if (status < 0)
2364
0
    return status;
2365
2366
3.20k
  int size = byte - 0x0c + 1;
2367
3.20k
  int n = x_opr_n_bytes (mra, size);
2368
3.20k
  if (n < 0)
2369
0
    return n;
2370
2371
3.20k
  return size + n + 1;
2372
3.20k
}
2373
2374
static int
2375
mov_imm_opr (struct mem_read_abstraction_base *mra,
2376
       int *n_operands, struct operand **operand)
2377
3.25k
{
2378
3.25k
  struct operand *op;
2379
3.25k
  bfd_byte byte;
2380
3.25k
  int status = mra->read (mra, -1, 1, &byte);
2381
3.25k
  if (status < 0)
2382
0
    return status;
2383
2384
3.25k
  int size = byte - 0x0c + 1;
2385
3.25k
  uint32_t imm;
2386
3.25k
  if (decode_signed_value (mra, size, &imm))
2387
36
    return -1;
2388
2389
3.22k
  op = create_immediate_operand (imm);
2390
3.22k
  if (op == NULL)
2391
0
    return -1;
2392
3.22k
  operand[(*n_operands)++] = op;
2393
3.22k
  op = x_opr_decode (mra, size);
2394
3.22k
  if (op == NULL)
2395
14
    return -1;
2396
3.20k
  operand[(*n_operands)++] = op;
2397
3.20k
  return 0;
2398
3.22k
}
2399
2400

2401
2402
static int
2403
ld_18bit_decode (struct mem_read_abstraction_base *mra,
2404
     int *n_operands, struct operand **operand)
2405
2.91k
{
2406
2.91k
  struct operand *op;
2407
2.91k
  size_t size = 3;
2408
2.91k
  bfd_byte buffer[3];
2409
2.91k
  int status = mra->read (mra, 0, 2, buffer + 1);
2410
2.91k
  if (status < 0)
2411
20
    return status;
2412
2413
2.89k
  status = mra->read (mra, -1, 1, buffer);
2414
2.89k
  if (status < 0)
2415
0
    return status;
2416
2417
2.89k
  buffer[0] = (buffer[0] & 0x30) >> 4;
2418
2419
2.89k
  size_t i;
2420
2.89k
  uint32_t imm = 0;
2421
11.5k
  for (i = 0; i < size; ++i)
2422
8.67k
    {
2423
8.67k
      imm |= buffer[i] << (8 * (size - i - 1));
2424
8.67k
    }
2425
2426
2.89k
  op = create_immediate_operand (imm);
2427
2.89k
  if (op == NULL)
2428
0
    return -1;
2429
2.89k
  operand[(*n_operands)++] = op;
2430
2.89k
  return 0;
2431
2.89k
}
2432
2433

2434
2435
/* Loop Primitives */
2436
2437
enum LP_MODE {
2438
  LP_REG,
2439
  LP_XY,
2440
  LP_OPR
2441
};
2442
2443
struct lp
2444
{
2445
  uint8_t mask;
2446
  uint8_t value;
2447
  enum LP_MODE mode;
2448
};
2449
2450
static const struct lp lp_mode[] = {
2451
  {0x08, 0x00, LP_REG},
2452
  {0x0C, 0x08, LP_XY},
2453
  {0x0C, 0x0C, LP_OPR},
2454
};
2455
2456
2457
static int
2458
loop_prim_n_bytes (struct mem_read_abstraction_base *mra)
2459
777
{
2460
777
  int mx = 0;
2461
777
  uint8_t lb;
2462
777
  int status = mra->read (mra, mx++, 1, &lb);
2463
777
  if (status < 0)
2464
0
    return status;
2465
2466
777
  enum LP_MODE mode = -1;
2467
777
  size_t i;
2468
1.29k
  for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i)
2469
1.29k
    {
2470
1.29k
      const struct lp *pb = lp_mode + i;
2471
1.29k
      if ((lb & pb->mask) == pb->value)
2472
777
  {
2473
777
    mode = pb->mode;
2474
777
    break;
2475
777
  }
2476
1.29k
    }
2477
2478
777
  if (mode == LP_OPR)
2479
135
    {
2480
135
      int n = x_opr_n_bytes (mra, mx);
2481
135
      if (n < 0)
2482
0
  return n;
2483
135
      mx += n;
2484
135
    }
2485
2486
777
  uint8_t rb;
2487
777
  status = mra->read (mra, mx++, 1, &rb);
2488
777
  if (status < 0)
2489
0
    return status;
2490
777
  if (rb & 0x80)
2491
327
    mx++;
2492
2493
777
  return mx + 1;
2494
777
}
2495
2496
2497

2498
2499
static enum optr
2500
exg_sex_discrim (struct mem_read_abstraction_base *mra,
2501
     enum optr hint ATTRIBUTE_UNUSED)
2502
1.53k
{
2503
1.53k
  uint8_t eb;
2504
1.53k
  int status = mra->read (mra, 0, 1, &eb);
2505
1.53k
  enum optr operator = OP_INVALID;
2506
1.53k
  if (status < 0)
2507
13
    return operator;
2508
2509
1.51k
  struct operand *op0 = create_register_operand ((eb & 0xf0) >> 4);
2510
1.51k
  if (op0 == NULL)
2511
0
    return -1;
2512
1.51k
  struct operand *op1 = create_register_operand (eb & 0xf);
2513
1.51k
  if (op1 == NULL)
2514
0
    return -1;
2515
2516
1.51k
  int reg0 = ((struct register_operand *) op0)->reg;
2517
1.51k
  int reg1 = ((struct register_operand *) op1)->reg;
2518
1.51k
  if (reg0 >= 0 && reg0 < S12Z_N_REGISTERS
2519
1.51k
      && reg1 >= 0 && reg1 < S12Z_N_REGISTERS)
2520
1.38k
    {
2521
1.38k
      const struct reg *r0 = registers + reg0;
2522
1.38k
      const struct reg *r1 = registers + reg1;
2523
2524
1.38k
      operator = r0->bytes < r1->bytes ? OP_sex : OP_exg;
2525
1.38k
    }
2526
2527
1.51k
  free (op0);
2528
1.51k
  free (op1);
2529
2530
1.51k
  return operator;
2531
1.51k
}
2532
2533
2534
static int
2535
exg_sex_decode (struct mem_read_abstraction_base *mra,
2536
    int *n_operands, struct operand **operands)
2537
1.38k
{
2538
1.38k
  struct operand *op;
2539
1.38k
  uint8_t eb;
2540
1.38k
  int status = mra->read (mra, 0, 1, &eb);
2541
1.38k
  if (status < 0)
2542
0
    return status;
2543
2544
  /* Ship out the operands.  */
2545
1.38k
  op = create_register_operand ((eb & 0xf0) >> 4);
2546
1.38k
  if (op == NULL)
2547
0
    return -1;
2548
1.38k
  operands[(*n_operands)++] = op;
2549
1.38k
  op = create_register_operand (eb & 0xf);
2550
1.38k
  if (op == NULL)
2551
0
    return -1;
2552
1.38k
  operands[(*n_operands)++] = op;
2553
1.38k
  return 0;
2554
1.38k
}
2555
2556
static enum optr
2557
loop_primitive_discrim (struct mem_read_abstraction_base *mra,
2558
      enum optr hint ATTRIBUTE_UNUSED)
2559
789
{
2560
789
  uint8_t lb;
2561
789
  int status = mra->read (mra, 0, 1, &lb);
2562
789
  if (status < 0)
2563
8
    return OP_INVALID;
2564
2565
781
  enum optr opbase = (lb & 0x80) ? OP_dbNE : OP_tbNE;
2566
781
  return opbase + ((lb & 0x70) >> 4);
2567
789
}
2568
2569
static int
2570
loop_primitive_decode (struct mem_read_abstraction_base *mra,
2571
           int *n_operands, struct operand **operands)
2572
781
{
2573
781
  struct operand *op;
2574
781
  int n, offs = 1;
2575
781
  uint8_t lb;
2576
781
  int status = mra->read (mra, 0, 1, &lb);
2577
781
  if (status < 0)
2578
0
    return status;
2579
2580
781
  enum LP_MODE mode = -1;
2581
781
  size_t i;
2582
1.30k
  for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i)
2583
1.30k
    {
2584
1.30k
      const struct lp *pb = lp_mode + i;
2585
1.30k
      if ((lb & pb->mask) == pb->value)
2586
781
  {
2587
781
    mode = pb->mode;
2588
781
    break;
2589
781
  }
2590
1.30k
    }
2591
2592
781
  switch (mode)
2593
781
    {
2594
398
    case LP_REG:
2595
398
      op = create_register_operand (lb & 0x07);
2596
398
      if (op == NULL)
2597
0
  return -1;
2598
398
      operands[(*n_operands)++] = op;
2599
398
      break;
2600
244
    case LP_XY:
2601
244
      op = create_register_operand ((lb & 0x01) + REG_X);
2602
244
      if (op == NULL)
2603
0
  return -1;
2604
244
      operands[(*n_operands)++] = op;
2605
244
      break;
2606
139
    case LP_OPR:
2607
139
      n = x_opr_n_bytes (mra, 1);
2608
139
      if (n < 0)
2609
0
  return n;
2610
139
      offs += n;
2611
139
      op = x_opr_decode_with_size (mra, 1, lb & 0x03);
2612
139
      if (op == NULL)
2613
4
  return -1;
2614
135
      operands[(*n_operands)++] = op;
2615
135
      break;
2616
781
    }
2617
2618
777
  return rel_15_7 (mra, offs + 1, n_operands, operands);
2619
781
}
2620
2621
2622
static enum optr
2623
shift_discrim (struct mem_read_abstraction_base *mra,
2624
         enum optr hint ATTRIBUTE_UNUSED)
2625
7.23k
{
2626
7.23k
  size_t i;
2627
7.23k
  uint8_t sb;
2628
7.23k
  int status = mra->read (mra, 0, 1, &sb);
2629
7.23k
  if (status < 0)
2630
2
    return OP_INVALID;
2631
2632
7.23k
  enum SB_DIR  dir = (sb & 0x40) ? SB_LEFT : SB_RIGHT;
2633
7.23k
  enum SB_TYPE type = (sb & 0x80) ? SB_ARITHMETIC : SB_LOGICAL;
2634
7.23k
  enum SB_MODE mode = -1;
2635
50.6k
  for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2636
43.4k
    {
2637
43.4k
      const struct sb *sbe = sb_table + i;
2638
43.4k
      if ((sb & sbe->mask) == sbe->value)
2639
7.23k
  mode = sbe->mode;
2640
43.4k
    }
2641
2642
7.23k
  if (mode == SB_ROT)
2643
328
    return (dir == SB_LEFT) ? OP_rol : OP_ror;
2644
2645
6.90k
  if (type == SB_LOGICAL)
2646
5.40k
    return (dir == SB_LEFT) ? OP_lsl : OP_lsr;
2647
2648
1.50k
  return (dir == SB_LEFT) ? OP_asl : OP_asr;
2649
6.90k
}
2650
2651
2652
static int
2653
shift_decode (struct mem_read_abstraction_base *mra, int *n_operands,
2654
        struct operand **operands)
2655
7.23k
{
2656
7.23k
  struct operand *op;
2657
7.23k
  size_t i;
2658
7.23k
  uint8_t byte;
2659
7.23k
  int status = mra->read (mra, -1, 1, &byte);
2660
7.23k
  if (status < 0)
2661
0
    return status;
2662
2663
7.23k
  uint8_t sb;
2664
7.23k
  status = mra->read (mra, 0, 1, &sb);
2665
7.23k
  if (status < 0)
2666
0
    return status;
2667
2668
7.23k
  enum SB_MODE mode = -1;
2669
50.6k
  for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2670
43.4k
    {
2671
43.4k
      const struct sb *sbe = sb_table + i;
2672
43.4k
      if ((sb & sbe->mask) == sbe->value)
2673
7.23k
  mode = sbe->mode;
2674
43.4k
    }
2675
2676
7.23k
  short osize = -1;
2677
7.23k
  switch (mode)
2678
7.23k
    {
2679
425
    case SB_REG_OPR_EFF:
2680
753
    case SB_ROT:
2681
1.55k
    case SB_REG_OPR_OPR:
2682
1.55k
      osize = sb & 0x03;
2683
1.55k
      break;
2684
582
    case SB_OPR_N:
2685
582
      {
2686
582
  uint8_t xb;
2687
582
  status = mra->read (mra, 1, 1, &xb);
2688
582
  if (status < 0)
2689
0
    return status;
2690
  /* The size suffix is not printed if the OPR operand refers
2691
     directly to a register, because the size is implied by the
2692
     size of that register. */
2693
582
  if ((xb & 0xF8) != 0xB8)
2694
575
    osize = sb & 0x03;
2695
582
      }
2696
0
      break;
2697
5.10k
    default:
2698
5.10k
      break;
2699
7.23k
    };
2700
2701
  /* Destination register */
2702
7.23k
  switch (mode)
2703
7.23k
    {
2704
1.83k
    case SB_REG_REG_N_EFF:
2705
5.10k
    case SB_REG_REG_N:
2706
5.10k
      op = create_register_operand (byte & 0x07);
2707
5.10k
      if (op == NULL)
2708
0
  return -1;
2709
5.10k
      operands[(*n_operands)++] = op;
2710
5.10k
      break;
2711
425
    case SB_REG_OPR_EFF:
2712
1.22k
    case SB_REG_OPR_OPR:
2713
1.22k
      op = create_register_operand (byte & 0x07);
2714
1.22k
      if (op == NULL)
2715
0
  return -1;
2716
1.22k
      operands[(*n_operands)++] = op;
2717
1.22k
      break;
2718
2719
328
    case SB_ROT:
2720
328
      op = x_opr_decode_with_size (mra, 1, osize);
2721
328
      if (op == NULL)
2722
6
  return -1;
2723
322
      operands[(*n_operands)++] = op;
2724
322
      break;
2725
2726
582
    default:
2727
582
      break;
2728
7.23k
    }
2729
2730
  /* Source register */
2731
7.23k
  switch (mode)
2732
7.23k
    {
2733
1.83k
    case SB_REG_REG_N_EFF:
2734
5.10k
    case SB_REG_REG_N:
2735
5.10k
      op = create_register_operand_with_size (sb & 0x07, osize);
2736
5.10k
      if (op == NULL)
2737
0
  return -1;
2738
5.10k
      operands[(*n_operands)++] = op;
2739
5.10k
      break;
2740
2741
799
    case SB_REG_OPR_OPR:
2742
799
      op = x_opr_decode_with_size (mra, 1, osize);
2743
799
      if (op == NULL)
2744
13
  return -1;
2745
786
      operands[(*n_operands)++] = op;
2746
786
      break;
2747
2748
1.32k
    default:
2749
1.32k
      break;
2750
7.23k
    }
2751
2752
  /* 3rd arg */
2753
7.21k
  switch (mode)
2754
7.21k
    {
2755
425
    case SB_REG_OPR_EFF:
2756
1.00k
    case SB_OPR_N:
2757
1.00k
      op = x_opr_decode_with_size (mra, 1, osize);
2758
1.00k
      if (op == NULL)
2759
0
  return -1;
2760
1.00k
      operands[(*n_operands)++] = op;
2761
1.00k
      break;
2762
2763
3.26k
    case SB_REG_REG_N:
2764
3.26k
      {
2765
3.26k
  uint8_t xb;
2766
3.26k
  status = mra->read (mra, 1, 1, &xb);
2767
3.26k
  if (status < 0)
2768
0
    return status;
2769
2770
  /* This case is slightly unusual.
2771
     If XB matches the binary pattern 0111XXXX, then instead of
2772
     interpreting this as a general OPR postbyte in the IMMe4 mode,
2773
     the XB byte is interpreted in s special way.  */
2774
3.26k
  if ((xb & 0xF0) == 0x70)
2775
70
    {
2776
70
      if (byte & 0x10)
2777
70
        {
2778
70
    int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1);
2779
70
    op = create_immediate_operand (shift);
2780
70
    if (op == NULL)
2781
0
      return -1;
2782
70
    operands[(*n_operands)++] = op;
2783
70
        }
2784
0
      else
2785
0
        {
2786
    /* This should not happen.  */
2787
0
    abort ();
2788
0
        }
2789
70
    }
2790
3.19k
  else
2791
3.19k
    {
2792
3.19k
      op = x_opr_decode (mra, 1);
2793
3.19k
      if (op == NULL)
2794
2
        return -1;
2795
3.19k
      operands[(*n_operands)++] = op;
2796
3.19k
    }
2797
3.26k
      }
2798
3.26k
      break;
2799
3.26k
    case SB_REG_OPR_OPR:
2800
786
      {
2801
786
  uint8_t xb;
2802
786
  int n = x_opr_n_bytes (mra, 1);
2803
786
  if (n < 0)
2804
0
    return n;
2805
786
  status = mra->read (mra, 1 + n, 1, &xb);
2806
786
  if (status < 0)
2807
3
    return status;
2808
2809
783
  if ((xb & 0xF0) == 0x70)
2810
35
    {
2811
35
      int imm = xb & 0x0F;
2812
35
      imm <<= 1;
2813
35
      imm |= (sb & 0x08) >> 3;
2814
35
      op = create_immediate_operand (imm);
2815
35
      if (op == NULL)
2816
0
        return -1;
2817
35
      operands[(*n_operands)++] = op;
2818
35
    }
2819
748
  else
2820
748
    {
2821
748
      op = x_opr_decode (mra, 1 + n);
2822
748
      if (op == NULL)
2823
1
        return -1;
2824
747
      operands[(*n_operands)++] = op;
2825
747
    }
2826
783
      }
2827
782
      break;
2828
2.16k
    default:
2829
2.16k
      break;
2830
7.21k
    }
2831
2832
7.21k
  switch (mode)
2833
7.21k
    {
2834
1.83k
    case SB_REG_REG_N_EFF:
2835
2.26k
    case SB_REG_OPR_EFF:
2836
2.84k
    case SB_OPR_N:
2837
2.84k
      {
2838
2.84k
  int imm = (sb & 0x08) ? 2 : 1;
2839
2.84k
  op = create_immediate_operand (imm);
2840
2.84k
  if (op == NULL)
2841
0
    return -1;
2842
2.84k
  operands[(*n_operands)++] = op;
2843
2.84k
      }
2844
0
      break;
2845
2846
4.36k
    default:
2847
4.36k
      break;
2848
7.21k
    }
2849
7.21k
  return 0;
2850
7.21k
}
2851
2852
static enum optr
2853
psh_pul_discrim (struct mem_read_abstraction_base *mra,
2854
     enum optr hint ATTRIBUTE_UNUSED)
2855
1.40k
{
2856
1.40k
  uint8_t byte;
2857
1.40k
  int status = mra->read (mra, 0, 1, &byte);
2858
1.40k
  if (status != 0)
2859
1
    return OP_INVALID;
2860
2861
1.40k
  return (byte & 0x80) ? OP_pull: OP_push;
2862
1.40k
}
2863
2864
2865
static int
2866
psh_pul_decode (struct mem_read_abstraction_base *mra,
2867
    int *n_operands, struct operand **operand)
2868
1.40k
{
2869
1.40k
  struct operand *op;
2870
1.40k
  uint8_t byte;
2871
1.40k
  int status = mra->read (mra, 0, 1, &byte);
2872
1.40k
  if (status != 0)
2873
0
    return status;
2874
1.40k
  int bit;
2875
1.40k
  if (byte & 0x40)
2876
585
    {
2877
585
      if ((byte & 0x3F) == 0)
2878
1
  {
2879
1
    op = create_register_all16_operand ();
2880
1
    if (op == NULL)
2881
0
      return -1;
2882
1
    operand[(*n_operands)++] = op;
2883
1
  }
2884
584
      else
2885
4.08k
  for (bit = 5; bit >= 0; --bit)
2886
3.50k
    {
2887
3.50k
      if (byte & (0x1 << bit))
2888
2.06k
        {
2889
2.06k
    op = create_register_operand (oprregs2[bit]);
2890
2.06k
    if (op == NULL)
2891
0
      return -1;
2892
2.06k
    operand[(*n_operands)++] = op;
2893
2.06k
        }
2894
3.50k
    }
2895
585
    }
2896
820
  else
2897
820
    {
2898
820
      if ((byte & 0x3F) == 0)
2899
323
  {
2900
323
    op = create_register_all_operand ();
2901
323
    if (op == NULL)
2902
0
      return -1;
2903
323
    operand[(*n_operands)++] = op;
2904
323
  }
2905
497
      else
2906
3.47k
  for (bit = 5; bit >= 0; --bit)
2907
2.98k
    {
2908
2.98k
      if (byte & (0x1 << bit))
2909
1.19k
        {
2910
1.19k
    op = create_register_operand (oprregs1[bit]);
2911
1.19k
    if (op == NULL)
2912
0
      return -1;
2913
1.19k
    operand[(*n_operands)++] = op;
2914
1.19k
        }
2915
2.98k
    }
2916
820
    }
2917
1.40k
  return 0;
2918
1.40k
}
2919
2920
static enum optr
2921
bit_field_discrim (struct mem_read_abstraction_base *mra,
2922
       enum optr hint ATTRIBUTE_UNUSED)
2923
369
{
2924
369
  int status;
2925
369
  bfd_byte bb;
2926
369
  status = mra->read (mra, 0, 1, &bb);
2927
369
  if (status != 0)
2928
1
    return OP_INVALID;
2929
2930
368
  return (bb & 0x80) ? OP_bfins : OP_bfext;
2931
369
}
2932
2933
static int
2934
bit_field_decode (struct mem_read_abstraction_base *mra,
2935
      int *n_operands, struct operand **operands)
2936
368
{
2937
368
  struct operand *op;
2938
368
  int status;
2939
2940
368
  bfd_byte byte2;
2941
368
  status = mra->read (mra, -1, 1, &byte2);
2942
368
  if (status != 0)
2943
0
    return status;
2944
2945
368
  bfd_byte bb;
2946
368
  status = mra->read (mra, 0, 1, &bb);
2947
368
  if (status != 0)
2948
0
    return status;
2949
2950
368
  enum BB_MODE mode = -1;
2951
368
  size_t i;
2952
368
  const struct opr_bb *bbs = 0;
2953
1.37k
  for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i)
2954
1.37k
    {
2955
1.37k
      bbs = bb_modes + i;
2956
1.37k
      if ((bb & bbs->mask) == bbs->value)
2957
368
  {
2958
368
    mode = bbs->mode;
2959
368
    break;
2960
368
  }
2961
1.37k
    }
2962
368
  int reg1 = byte2 & 0x07;
2963
  /* First operand */
2964
368
  switch (mode)
2965
368
    {
2966
57
    case BB_REG_REG_REG:
2967
118
    case BB_REG_REG_IMM:
2968
133
    case BB_REG_OPR_REG:
2969
300
    case BB_REG_OPR_IMM:
2970
300
      op = create_register_operand (reg1);
2971
300
      if (op == NULL)
2972
0
  return -1;
2973
300
      operands[(*n_operands)++] = op;
2974
300
      break;
2975
45
    case BB_OPR_REG_REG:
2976
45
      op = x_opr_decode_with_size (mra, 1, (bb >> 2) & 0x03);
2977
45
      if (op == NULL)
2978
1
  return -1;
2979
44
      operands[(*n_operands)++] = op;
2980
44
      break;
2981
23
    case BB_OPR_REG_IMM:
2982
23
      op = x_opr_decode_with_size (mra, 2, (bb >> 2) & 0x03);
2983
23
      if (op == NULL)
2984
0
  return -1;
2985
23
      operands[(*n_operands)++] = op;
2986
23
      break;
2987
368
    }
2988
2989
  /* Second operand */
2990
367
  switch (mode)
2991
367
    {
2992
57
    case BB_REG_REG_REG:
2993
118
    case BB_REG_REG_IMM:
2994
118
      {
2995
118
  int reg_src = (bb >> 2) & 0x07;
2996
118
  op = create_register_operand (reg_src);
2997
118
  if (op == NULL)
2998
0
    return -1;
2999
118
  operands[(*n_operands)++] = op;
3000
118
      }
3001
0
      break;
3002
44
    case BB_OPR_REG_REG:
3003
67
    case BB_OPR_REG_IMM:
3004
67
      {
3005
67
  int reg_src = (byte2 & 0x07);
3006
67
  op = create_register_operand (reg_src);
3007
67
  if (op == NULL)
3008
0
    return -1;
3009
67
  operands[(*n_operands)++] = op;
3010
67
      }
3011
0
      break;
3012
15
    case BB_REG_OPR_REG:
3013
15
      op = x_opr_decode_with_size (mra, 1, (bb >> 2) & 0x03);
3014
15
      if (op == NULL)
3015
0
  return -1;
3016
15
      operands[(*n_operands)++] = op;
3017
15
      break;
3018
167
    case BB_REG_OPR_IMM:
3019
167
      op = x_opr_decode_with_size (mra, 2, (bb >> 2) & 0x03);
3020
167
      if (op == NULL)
3021
6
  return -1;
3022
161
      operands[(*n_operands)++] = op;
3023
161
      break;
3024
367
    }
3025
3026
  /* Third operand */
3027
361
  switch (mode)
3028
361
    {
3029
57
    case BB_REG_REG_REG:
3030
101
    case BB_OPR_REG_REG:
3031
116
    case BB_REG_OPR_REG:
3032
116
      {
3033
116
  int reg_parm = bb & 0x03;
3034
116
  op = create_register_operand (reg_parm);
3035
116
  if (op == NULL)
3036
0
    return -1;
3037
116
  operands[(*n_operands)++] = op;
3038
116
      }
3039
0
      break;
3040
61
    case BB_REG_REG_IMM:
3041
84
    case BB_OPR_REG_IMM:
3042
245
    case BB_REG_OPR_IMM:
3043
245
      {
3044
245
  bfd_byte i1;
3045
245
  status = mra->read (mra, 1, 1, &i1);
3046
245
  if (status < 0)
3047
0
    return status;
3048
245
  int offset = i1 & 0x1f;
3049
245
  int width = bb & 0x03;
3050
245
  width <<= 3;
3051
245
  width |= i1 >> 5;
3052
245
  op = create_bitfield_operand (width, offset);
3053
245
  if (op == NULL)
3054
0
    return -1;
3055
245
  operands[(*n_operands)++] = op;
3056
245
      }
3057
0
      break;
3058
361
    }
3059
361
  return 0;
3060
361
}
3061
3062
3063
/* Decode the next instruction at MRA, according to OPC.
3064
   The operation to be performed is returned.
3065
   The number of operands, will be placed in N_OPERANDS.
3066
   The operands themselved into OPERANDS.  */
3067
static enum optr
3068
decode_operation (const struct opcode *opc,
3069
      struct mem_read_abstraction_base *mra,
3070
      int *n_operands, struct operand **operands)
3071
247k
{
3072
247k
  enum optr op = opc->operator;
3073
247k
  if (opc->discriminator)
3074
15.5k
    {
3075
15.5k
      op = opc->discriminator (mra, opc->operator);
3076
15.5k
      if (op == OP_INVALID)
3077
175
  return op;
3078
15.5k
    }
3079
3080
247k
  if (opc->operands)
3081
148k
    if (opc->operands (mra, n_operands, operands) < 0)
3082
248
      return OP_INVALID;
3083
3084
247k
  if (opc->operands2)
3085
71.6k
    if (opc->operands2 (mra, n_operands, operands) < 0)
3086
131
      return OP_INVALID;
3087
3088
246k
  return op;
3089
247k
}
3090
3091
int
3092
decode_s12z (enum optr *myoperator, short *osize,
3093
       int *n_operands, struct operand **operands,
3094
       struct mem_read_abstraction_base *mra)
3095
247k
{
3096
247k
  int n_bytes = 0;
3097
247k
  bfd_byte byte;
3098
3099
247k
  int status = mra->read (mra, 0, 1, &byte);
3100
247k
  if (status < 0)
3101
0
    return status;
3102
3103
247k
  mra->advance (mra);
3104
3105
247k
  const struct opcode *opc = page1 + byte;
3106
247k
  if (byte == PAGE2_PREBYTE)
3107
1.69k
    {
3108
      /* Opcodes in page2 have an additional byte */
3109
1.69k
      n_bytes++;
3110
3111
1.69k
      bfd_byte byte2;
3112
1.69k
      status = mra->read (mra, 0, 1, &byte2);
3113
1.69k
      if (status < 0)
3114
1
  return status;
3115
1.69k
      mra->advance (mra);
3116
1.69k
      opc = page2 + byte2;
3117
1.69k
    }
3118
247k
  *myoperator = decode_operation (opc, mra, n_operands, operands);
3119
247k
  *osize = opc->osize;
3120
3121
  /* Return the number of bytes in the instruction.  */
3122
247k
  if (*myoperator != OP_INVALID && opc->insn_bytes)
3123
245k
    {
3124
245k
      int n = opc->insn_bytes (mra);
3125
245k
      if (n < 0)
3126
0
  return n;
3127
245k
      n_bytes += n;
3128
245k
    }
3129
1.46k
  else
3130
1.46k
    n_bytes += 1;
3131
3132
247k
  return n_bytes;
3133
247k
}
3134