/* PowerPC64-specific support for 64-bit ELF.

   Copyright (C) 1999-2025 Free Software Foundation, Inc.

   Written by Linus Nordberg, Swox AB <info@swox.com>,

   based on elf32-ppc.c by Ian Lance Taylor.

   Largely rewritten by Alan Modra.

   This file is part of BFD, the Binary File Descriptor library.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 3 of the License, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License along

   with this program; if not, write to the Free Software Foundation, Inc.,

   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */

/* The 64-bit PowerPC ELF ABI may be found at

   http://www.linuxbase.org/spec/ELF/ppc64/PPC-elf64abi.txt, and

   http://www.linuxbase.org/spec/ELF/ppc64/spec/book1.html  */

/* The assembler should generate a full set of section symbols even

   when they appear unused.  The linux kernel build tool recordmcount

   needs them.  */

#define TARGET_KEEP_UNUSED_SECTION_SYMBOLS true

#include "sysdep.h"

#include <stdarg.h>

#include "bfd.h"

#include "bfdlink.h"

#include "libbfd.h"

#include "elf-bfd.h"

#include "elf/ppc64.h"

#include "elf64-ppc.h"

#include "dwarf2.h"

/* All users of this file have bfd_octets_per_byte (abfd, sec) == 1.  */

#define OCTETS_PER_BYTE(ABFD, SEC) 1

static bfd_reloc_status_type ppc64_elf_ha_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_branch_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_brtaken_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_sectoff_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_sectoff_ha_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_toc_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_toc_ha_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_toc64_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_prefix_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_reloc_status_type ppc64_elf_unhandled_reloc

  (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);

static bfd_vma opd_entry_value

  (asection *, bfd_vma, asection **, bfd_vma *, bool);

#define TARGET_LITTLE_SYM powerpc_elf64_le_vec

#define TARGET_LITTLE_NAME  "elf64-powerpcle"

#define TARGET_BIG_SYM    powerpc_elf64_vec

#define TARGET_BIG_NAME   "elf64-powerpc"

#define ELF_ARCH    bfd_arch_powerpc

#define ELF_TARGET_ID   PPC64_ELF_DATA

#define ELF_MACHINE_CODE  EM_PPC64

#define ELF_MAXPAGESIZE   0x10000

#define ELF_COMMONPAGESIZE  0x1000

#define elf_info_to_howto ppc64_elf_info_to_howto

#define elf_backend_want_got_sym 0

#define elf_backend_want_plt_sym 0

#define elf_backend_plt_alignment 3

#define elf_backend_plt_not_loaded 1

#define elf_backend_got_header_size 8

#define elf_backend_want_dynrelro 1

#define elf_backend_can_gc_sections 1

#define elf_backend_can_refcount 1

#define elf_backend_rela_normal 1

#define elf_backend_dtrel_excludes_plt 1

#define elf_backend_default_execstack 0

#define bfd_elf64_mkobject          ppc64_elf_mkobject

#define bfd_elf64_bfd_free_cached_info        ppc64_elf_free_cached_info

#define bfd_elf64_bfd_reloc_type_lookup       ppc64_elf_reloc_type_lookup

#define bfd_elf64_bfd_reloc_name_lookup       ppc64_elf_reloc_name_lookup

#define bfd_elf64_bfd_merge_private_bfd_data  ppc64_elf_merge_private_bfd_data

#define bfd_elf64_bfd_print_private_bfd_data  ppc64_elf_print_private_bfd_data

#define bfd_elf64_new_section_hook        ppc64_elf_new_section_hook

#define bfd_elf64_bfd_link_hash_table_create  ppc64_elf_link_hash_table_create

#define bfd_elf64_get_synthetic_symtab        ppc64_elf_get_synthetic_symtab

#define bfd_elf64_bfd_link_just_syms        ppc64_elf_link_just_syms

#define bfd_elf64_bfd_gc_sections       ppc64_elf_gc_sections

#define elf_backend_object_p          ppc64_elf_object_p

#define elf_backend_grok_prstatus       ppc64_elf_grok_prstatus

#define elf_backend_grok_psinfo         ppc64_elf_grok_psinfo

#define elf_backend_write_core_note       ppc64_elf_write_core_note

#define elf_backend_create_dynamic_sections   _bfd_elf_create_dynamic_sections

#define elf_backend_copy_indirect_symbol      ppc64_elf_copy_indirect_symbol

#define elf_backend_add_symbol_hook       ppc64_elf_add_symbol_hook

#define elf_backend_check_directives        ppc64_elf_before_check_relocs

#define elf_backend_notice_as_needed        ppc64_elf_notice_as_needed

#define elf_backend_archive_symbol_lookup     ppc64_elf_archive_symbol_lookup

#define elf_backend_check_relocs        ppc64_elf_check_relocs

#define elf_backend_relocs_compatible       _bfd_elf_relocs_compatible

#define elf_backend_gc_keep         ppc64_elf_gc_keep

#define elf_backend_gc_mark_dynamic_ref       ppc64_elf_gc_mark_dynamic_ref

#define elf_backend_gc_mark_hook        ppc64_elf_gc_mark_hook

#define elf_backend_adjust_dynamic_symbol     ppc64_elf_adjust_dynamic_symbol

#define elf_backend_hide_symbol         ppc64_elf_hide_symbol

#define elf_backend_maybe_function_sym        ppc64_elf_maybe_function_sym

#define elf_backend_early_size_sections       ppc64_elf_edit

#define elf_backend_late_size_sections        ppc64_elf_late_size_sections

#define elf_backend_hash_symbol         ppc64_elf_hash_symbol

#define elf_backend_init_index_section        _bfd_elf_init_2_index_sections

#define elf_backend_action_discarded        ppc64_elf_action_discarded

#define elf_backend_relocate_section        ppc64_elf_relocate_section

#define elf_backend_finish_dynamic_symbol     ppc64_elf_finish_dynamic_symbol

#define elf_backend_reloc_type_class        ppc64_elf_reloc_type_class

#define elf_backend_finish_dynamic_sections   ppc64_elf_finish_dynamic_sections

#define elf_backend_link_output_symbol_hook   ppc64_elf_output_symbol_hook

#define elf_backend_special_sections        ppc64_elf_special_sections

#define elf_backend_section_flags       ppc64_elf_section_flags

#define elf_backend_merge_symbol_attribute    ppc64_elf_merge_symbol_attribute

#define elf_backend_merge_symbol        ppc64_elf_merge_symbol

#define elf_backend_get_reloc_section       bfd_get_section_by_name

/* The name of the dynamic interpreter.  This is put in the .interp

   section.  */

#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"

/* The size in bytes of an entry in the procedure linkage table.  */

#define PLT_ENTRY_SIZE(htab) (htab->opd_abi ? 24 : 8)

#define LOCAL_PLT_ENTRY_SIZE(htab) (htab->opd_abi ? 16 : 8)

/* The initial size of the plt reserved for the dynamic linker.  */

#define PLT_INITIAL_ENTRY_SIZE(htab) (htab->opd_abi ? 24 : 16)

/* Offsets to some stack save slots.  */

#define STK_LR 16

#define STK_TOC(htab) (htab->opd_abi ? 40 : 24)

/* This one is dodgy.  ELFv2 does not have a linker word, so use the

   CR save slot.  Used only by optimised __tls_get_addr call stub,

   relying on __tls_get_addr_opt not saving CR..  */

#define STK_LINKER(htab) (htab->opd_abi ? 32 : 8)

/* TOC base pointers offset from start of TOC.  */

#define TOC_BASE_OFF  0x8000

/* TOC base alignment.  */

#define TOC_BASE_ALIGN  256

/* Offset of tp and dtp pointers from start of TLS block.  */

#define TP_OFFSET 0x7000

#define DTP_OFFSET  0x8000

/* .plt call stub instructions.  The normal stub is like this, but

   sometimes the .plt entry crosses a 64k boundary and we need to

   insert an addi to adjust r11.  */

#define STD_R2_0R1  0xf8410000  /* std   %r2,0+40(%r1)       */

#define ADDIS_R11_R2  0x3d620000  /* addis %r11,%r2,xxx@ha     */

#define LD_R12_0R11 0xe98b0000  /* ld  %r12,xxx+0@l(%r11)  */

#define MTCTR_R12 0x7d8903a6  /* mtctr %r12        */

#define LD_R2_0R11  0xe84b0000  /* ld  %r2,xxx+8@l(%r11)   */

#define LD_R11_0R11 0xe96b0000  /* ld  %r11,xxx+16@l(%r11) */

#define BCTR    0x4e800420  /* bctr          */

#define ADDI_R11_R11  0x396b0000  /* addi %r11,%r11,off@l  */

#define ADDI_R12_R11  0x398b0000  /* addi %r12,%r11,off@l  */

#define ADDI_R12_R12  0x398c0000  /* addi %r12,%r12,off@l  */

#define ADDIS_R2_R2 0x3c420000  /* addis %r2,%r2,off@ha  */

#define ADDI_R2_R2  0x38420000  /* addi  %r2,%r2,off@l   */

#define XOR_R2_R12_R12  0x7d826278  /* xor   %r2,%r12,%r12   */

#define ADD_R11_R11_R2  0x7d6b1214  /* add   %r11,%r11,%r2   */

#define XOR_R11_R12_R12 0x7d8b6278  /* xor   %r11,%r12,%r12  */

#define ADD_R2_R2_R11 0x7c425a14  /* add   %r2,%r2,%r11  */

#define CMPLDI_R2_0 0x28220000  /* cmpldi %r2,0    */

#define BNECTR    0x4ca20420  /* bnectr+     */

#define BNECTR_P4 0x4ce20420  /* bnectr+     */

#define LD_R12_0R2  0xe9820000  /* ld  %r12,xxx+0(%r2) */

#define LD_R11_0R2  0xe9620000  /* ld  %r11,xxx+0(%r2) */

#define LD_R2_0R2 0xe8420000  /* ld  %r2,xxx+0(%r2)  */

#define LD_R2_0R1 0xe8410000  /* ld  %r2,0(%r1)  */

#define LD_R2_0R12  0xe84c0000  /* ld  %r2,0(%r12)   */

#define ADD_R2_R2_R12 0x7c426214  /* add   %r2,%r2,%r12  */

#define LI_R11_0  0x39600000  /* li    %r11,0   */

#define LIS_R2    0x3c400000  /* lis %r2,xxx@ha   */

#define LIS_R11   0x3d600000  /* lis %r11,xxx@ha    */

#define LIS_R12   0x3d800000  /* lis %r12,xxx@ha    */

#define ADDIS_R2_R12  0x3c4c0000  /* addis %r2,%r12,xxx@ha  */

#define ADDIS_R12_R2  0x3d820000  /* addis %r12,%r2,xxx@ha  */

#define ADDIS_R12_R11 0x3d8b0000  /* addis %r12,%r11,xxx@ha */

#define ADDIS_R12_R12 0x3d8c0000  /* addis %r12,%r12,xxx@ha */

#define ORIS_R12_R12_0  0x658c0000  /* oris  %r12,%r12,xxx@hi */

#define ORI_R11_R11_0 0x616b0000  /* ori   %r11,%r11,xxx@l  */

#define ORI_R12_R12_0 0x618c0000  /* ori   %r12,%r12,xxx@l  */

#define LD_R12_0R12 0xe98c0000  /* ld  %r12,xxx@l(%r12) */

#define SLDI_R11_R11_34 0x796b1746  /* sldi  %r11,%r11,34     */

#define SLDI_R12_R12_32 0x799c07c6  /* sldi  %r12,%r12,32     */

#define LDX_R12_R11_R12 0x7d8b602a  /* ldx   %r12,%r11,%r12   */

#define ADD_R12_R11_R12 0x7d8b6214  /* add   %r12,%r11,%r12   */

#define PADDI_R12_PC  0x0610000039800000ULL

#define PLD_R12_PC  0x04100000e5800000ULL

#define PNOP    0x0700000000000000ULL

/* __glink_PLTresolve stub instructions.  We enter with the index in

   R0 for ELFv1, and the address of a glink branch in R12 for ELFv2.  */

#define GLINK_PLTRESOLVE_SIZE(htab)     \

  (8u + (htab->opd_abi ? 11 * 4 : htab->has_plt_localentry0 ? 14 * 4 : 13 * 4))

          /* 0:       */

          /*  .quad plt0-1f   */

          /* __glink:     */

#define MFLR_R12  0x7d8802a6  /*  mflr %12      */

#define BCL_20_31 0x429f0005  /*  bcl 20,31,1f    */

          /* 1:       */

#define MFLR_R11  0x7d6802a6  /*  mflr %11      */

          /*  ld %2,(0b-1b)(%11)    */

#define MTLR_R12  0x7d8803a6  /*  mtlr %12      */

#define ADD_R11_R2_R11  0x7d625a14  /*  add %11,%2,%11    */

          /*  ld %12,0(%11)   */

          /*  ld %2,8(%11)    */

          /*  mtctr %12     */

          /*  ld %11,16(%11)    */

          /*  bctr      */

#define MFLR_R0   0x7c0802a6  /* mflr %r0     */

#define MTLR_R0   0x7c0803a6  /* mtlr %r0     */

#define SUB_R12_R12_R11 0x7d8b6050  /* subf %r12,%r11,%r12    */

#define ADDI_R0_R12 0x380c0000  /* addi %r0,%r12,0    */

#define SRDI_R0_R0_2  0x7800f082  /* rldicl %r0,%r0,62,2    */

#define LD_R0_0R11  0xe80b0000  /* ld %r0,0(%r11)   */

#define ADD_R11_R0_R11  0x7d605a14  /* add %r11,%r0,%r11    */

/* Pad with this.  */

#define NOP   0x60000000

/* Some other nops.  */

#define CROR_151515 0x4def7b82

#define CROR_313131 0x4ffffb82

/* .glink entries for the first 32k functions are two instructions.  */

#define LI_R0_0   0x38000000  /* li    %r0,0    */

#define B_DOT   0x48000000  /* b     .    */

/* After that, we need two instructions to load the index, followed by

   a branch.  */

#define LIS_R0_0  0x3c000000  /* lis   %r0,0    */

#define ORI_R0_R0_0 0x60000000  /* ori   %r0,%r0,0  */

/* Instructions used by the save and restore reg functions.  */

#define STD_R0_0R1  0xf8010000  /* std   %r0,0(%r1) */

#define STD_R0_0R12 0xf80c0000  /* std   %r0,0(%r12)  */

#define LD_R0_0R1 0xe8010000  /* ld    %r0,0(%r1) */

#define LD_R0_0R12  0xe80c0000  /* ld    %r0,0(%r12)  */

#define STFD_FR0_0R1  0xd8010000  /* stfd  %fr0,0(%r1)  */

#define LFD_FR0_0R1 0xc8010000  /* lfd   %fr0,0(%r1)  */

#define LI_R12_0  0x39800000  /* li    %r12,0   */

#define STVX_VR0_R12_R0 0x7c0c01ce  /* stvx  %v0,%r12,%r0 */

#define LVX_VR0_R12_R0  0x7c0c00ce  /* lvx   %v0,%r12,%r0 */

#define MTLR_R0   0x7c0803a6  /* mtlr  %r0    */

#define BLR   0x4e800020  /* blr      */

/* Since .opd is an array of descriptors and each entry will end up

   with identical R_PPC64_RELATIVE relocs, there is really no need to

   propagate .opd relocs;  The dynamic linker should be taught to

   relocate .opd without reloc entries.  */

#ifndef NO_OPD_RELOCS

#define NO_OPD_RELOCS 0

#endif

#ifndef ARRAY_SIZE

#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))

#endif

static inline int

abiversion (bfd *abfd)

{

  return elf_elfheader (abfd)->e_flags & EF_PPC64_ABI;

}

static inline void

set_abiversion (bfd *abfd, int ver)

{

  elf_elfheader (abfd)->e_flags &= ~EF_PPC64_ABI;

  elf_elfheader (abfd)->e_flags |= ver & EF_PPC64_ABI;

}

#define is_ppc64_elf(bfd) \

  (bfd_get_flavour (bfd) == bfd_target_elf_flavour \

   && elf_object_id (bfd) == PPC64_ELF_DATA)

/* Relocation HOWTO's.  */

/* Like other ELF RELA targets that don't apply multiple

   field-altering relocations to the same localation, src_mask is

   always zero and pcrel_offset is the same as pc_relative.

   PowerPC can always use a zero bitpos, even when the field is not at

   the LSB.  For example, a REL24 could use rightshift=2, bisize=24

   and bitpos=2 which matches the ABI description, or as we do here,

   rightshift=0, bitsize=26 and bitpos=0.  */

#define HOW(type, size, bitsize, mask, rightshift, pc_relative, \

      complain, special_func)       \

  HOWTO (type, rightshift, size, bitsize, pc_relative, 0, \

   complain_overflow_ ## complain, special_func,    \

   #type, false, 0, mask, pc_relative)

static reloc_howto_type *ppc64_elf_howto_table[(int) R_PPC64_max];

static reloc_howto_type ppc64_elf_howto_raw[] =

{

  /* This reloc does nothing.  */

  HOW (R_PPC64_NONE, 0, 0, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  /* A standard 32 bit relocation.  */

  HOW (R_PPC64_ADDR32, 4, 32, 0xffffffff, 0, false, bitfield,

       bfd_elf_generic_reloc),

  /* An absolute 26 bit branch; the lower two bits must be zero.

     FIXME: we don't check that, we just clear them.  */

  HOW (R_PPC64_ADDR24, 4, 26, 0x03fffffc, 0, false, bitfield,

       bfd_elf_generic_reloc),

  /* A standard 16 bit relocation.  */

  HOW (R_PPC64_ADDR16, 2, 16, 0xffff, 0, false, bitfield,

       bfd_elf_generic_reloc),

  /* A 16 bit relocation without overflow.  */

  HOW (R_PPC64_ADDR16_LO, 2, 16, 0xffff, 0, false, dont,

       bfd_elf_generic_reloc),

  /* Bits 16-31 of an address.  */

  HOW (R_PPC64_ADDR16_HI, 2, 16, 0xffff, 16, false, signed,

       bfd_elf_generic_reloc),

  /* Bits 16-31 of an address, plus 1 if the contents of the low 16

     bits, treated as a signed number, is negative.  */

  HOW (R_PPC64_ADDR16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_ha_reloc),

  /* An absolute 16 bit branch; the lower two bits must be zero.

     FIXME: we don't check that, we just clear them.  */

  HOW (R_PPC64_ADDR14, 4, 16, 0x0000fffc, 0, false, signed,

       ppc64_elf_branch_reloc),

  /* An absolute 16 bit branch, for which bit 10 should be set to

     indicate that the branch is expected to be taken.  The lower two

     bits must be zero.  */

  HOW (R_PPC64_ADDR14_BRTAKEN, 4, 16, 0x0000fffc, 0, false, signed,

       ppc64_elf_brtaken_reloc),

  /* An absolute 16 bit branch, for which bit 10 should be set to

     indicate that the branch is not expected to be taken.  The lower

     two bits must be zero.  */

  HOW (R_PPC64_ADDR14_BRNTAKEN, 4, 16, 0x0000fffc, 0, false, signed,

       ppc64_elf_brtaken_reloc),

  /* A relative 26 bit branch; the lower two bits must be zero.  */

  HOW (R_PPC64_REL24, 4, 26, 0x03fffffc, 0, true, signed,

       ppc64_elf_branch_reloc),

  /* A variant of R_PPC64_REL24, used when r2 is not the toc pointer.  */

  HOW (R_PPC64_REL24_NOTOC, 4, 26, 0x03fffffc, 0, true, signed,

       ppc64_elf_branch_reloc),

  /* Another variant, when p10 insns can't be used on stubs.  */

  HOW (R_PPC64_REL24_P9NOTOC, 4, 26, 0x03fffffc, 0, true, signed,

       ppc64_elf_branch_reloc),

  /* A relative 16 bit branch; the lower two bits must be zero.  */

  HOW (R_PPC64_REL14, 4, 16, 0x0000fffc, 0, true, signed,

       ppc64_elf_branch_reloc),

  /* A relative 16 bit branch.  Bit 10 should be set to indicate that

     the branch is expected to be taken.  The lower two bits must be

     zero.  */

  HOW (R_PPC64_REL14_BRTAKEN, 4, 16, 0x0000fffc, 0, true, signed,

       ppc64_elf_brtaken_reloc),

  /* A relative 16 bit branch.  Bit 10 should be set to indicate that

     the branch is not expected to be taken.  The lower two bits must

     be zero.  */

  HOW (R_PPC64_REL14_BRNTAKEN, 4, 16, 0x0000fffc, 0, true, signed,

       ppc64_elf_brtaken_reloc),

  /* Like R_PPC64_ADDR16, but referring to the GOT table entry for the

     symbol.  */

  HOW (R_PPC64_GOT16, 2, 16, 0xffff, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR16_LO, but referring to the GOT table entry for

     the symbol.  */

  HOW (R_PPC64_GOT16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR16_HI, but referring to the GOT table entry for

     the symbol.  */

  HOW (R_PPC64_GOT16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR16_HA, but referring to the GOT table entry for

     the symbol.  */

  HOW (R_PPC64_GOT16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* This is used only by the dynamic linker.  The symbol should exist

     both in the object being run and in some shared library.  The

     dynamic linker copies the data addressed by the symbol from the

     shared library into the object, because the object being

     run has to have the data at some particular address.  */

  HOW (R_PPC64_COPY, 0, 0, 0, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR64, but used when setting global offset table

     entries.  */

  HOW (R_PPC64_GLOB_DAT, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Created by the link editor.  Marks a procedure linkage table

     entry for a symbol.  */

  HOW (R_PPC64_JMP_SLOT, 0, 0, 0, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Used only by the dynamic linker.  When the object is run, this

     doubleword64 is set to the load address of the object, plus the

     addend.  */

  HOW (R_PPC64_RELATIVE, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       bfd_elf_generic_reloc),

  /* Like R_PPC64_ADDR32, but may be unaligned.  */

  HOW (R_PPC64_UADDR32, 4, 32, 0xffffffff, 0, false, bitfield,

       bfd_elf_generic_reloc),

  /* Like R_PPC64_ADDR16, but may be unaligned.  */

  HOW (R_PPC64_UADDR16, 2, 16, 0xffff, 0, false, bitfield,

       bfd_elf_generic_reloc),

  /* 32-bit PC relative.  */

  HOW (R_PPC64_REL32, 4, 32, 0xffffffff, 0, true, signed,

       bfd_elf_generic_reloc),

  /* 32-bit relocation to the symbol's procedure linkage table.  */

  HOW (R_PPC64_PLT32, 4, 32, 0xffffffff, 0, false, bitfield,

       ppc64_elf_unhandled_reloc),

  /* 32-bit PC relative relocation to the symbol's procedure linkage table.

     FIXME: R_PPC64_PLTREL32 not supported.  */

  HOW (R_PPC64_PLTREL32, 4, 32, 0xffffffff, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR16_LO, but referring to the PLT table entry for

     the symbol.  */

  HOW (R_PPC64_PLT16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR16_HI, but referring to the PLT table entry for

     the symbol.  */

  HOW (R_PPC64_PLT16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR16_HA, but referring to the PLT table entry for

     the symbol.  */

  HOW (R_PPC64_PLT16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* 16-bit section relative relocation.  */

  HOW (R_PPC64_SECTOFF, 2, 16, 0xffff, 0, false, signed,

       ppc64_elf_sectoff_reloc),

  /* Like R_PPC64_SECTOFF, but no overflow warning.  */

  HOW (R_PPC64_SECTOFF_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_sectoff_reloc),

  /* 16-bit upper half section relative relocation.  */

  HOW (R_PPC64_SECTOFF_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_sectoff_reloc),

  /* 16-bit upper half adjusted section relative relocation.  */

  HOW (R_PPC64_SECTOFF_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_sectoff_ha_reloc),

  /* Like R_PPC64_REL24 without touching the two least significant bits.  */

  HOW (R_PPC64_REL30, 4, 30, 0xfffffffc, 2, true, dont,

       bfd_elf_generic_reloc),

  /* Relocs in the 64-bit PowerPC ELF ABI, not in the 32-bit ABI.  */

  /* A standard 64-bit relocation.  */

  HOW (R_PPC64_ADDR64, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       bfd_elf_generic_reloc),

  /* The bits 32-47 of an address.  */

  HOW (R_PPC64_ADDR16_HIGHER, 2, 16, 0xffff, 32, false, dont,

       bfd_elf_generic_reloc),

  /* The bits 32-47 of an address, plus 1 if the contents of the low

     16 bits, treated as a signed number, is negative.  */

  HOW (R_PPC64_ADDR16_HIGHERA, 2, 16, 0xffff, 32, false, dont,

       ppc64_elf_ha_reloc),

  /* The bits 48-63 of an address.  */

  HOW (R_PPC64_ADDR16_HIGHEST, 2, 16, 0xffff, 48, false, dont,

       bfd_elf_generic_reloc),

  /* The bits 48-63 of an address, plus 1 if the contents of the low

     16 bits, treated as a signed number, is negative.  */

  HOW (R_PPC64_ADDR16_HIGHESTA, 2, 16, 0xffff, 48, false, dont,

       ppc64_elf_ha_reloc),

  /* Like ADDR64, but may be unaligned.  */

  HOW (R_PPC64_UADDR64, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       bfd_elf_generic_reloc),

  /* 64-bit relative relocation.  */

  HOW (R_PPC64_REL64, 8, 64, 0xffffffffffffffffULL, 0, true, dont,

       bfd_elf_generic_reloc),

  /* 64-bit relocation to the symbol's procedure linkage table.  */

  HOW (R_PPC64_PLT64, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* 64-bit PC relative relocation to the symbol's procedure linkage

     table.  */

  /* FIXME: R_PPC64_PLTREL64 not supported.  */

  HOW (R_PPC64_PLTREL64, 8, 64, 0xffffffffffffffffULL, 0, true, dont,

       ppc64_elf_unhandled_reloc),

  /* 16 bit TOC-relative relocation.  */

  /* R_PPC64_TOC16    47     half16*  S + A - .TOC.  */

  HOW (R_PPC64_TOC16, 2, 16, 0xffff, 0, false, signed,

       ppc64_elf_toc_reloc),

  /* 16 bit TOC-relative relocation without overflow.  */

  /* R_PPC64_TOC16_LO   48     half16  #lo (S + A - .TOC.)  */

  HOW (R_PPC64_TOC16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_toc_reloc),

  /* 16 bit TOC-relative relocation, high 16 bits.  */

  /* R_PPC64_TOC16_HI   49     half16  #hi (S + A - .TOC.)  */

  HOW (R_PPC64_TOC16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_toc_reloc),

  /* 16 bit TOC-relative relocation, high 16 bits, plus 1 if the

     contents of the low 16 bits, treated as a signed number, is

     negative.  */

  /* R_PPC64_TOC16_HA   50     half16  #ha (S + A - .TOC.)  */

  HOW (R_PPC64_TOC16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_toc_ha_reloc),

  /* 64-bit relocation; insert value of TOC base (.TOC.).  */

  /* R_PPC64_TOC      51     doubleword64  .TOC.  */

  HOW (R_PPC64_TOC, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       ppc64_elf_toc64_reloc),

  /* Like R_PPC64_GOT16, but also informs the link editor that the

     value to relocate may (!) refer to a PLT entry which the link

     editor (a) may replace with the symbol value.  If the link editor

     is unable to fully resolve the symbol, it may (b) create a PLT

     entry and store the address to the new PLT entry in the GOT.

     This permits lazy resolution of function symbols at run time.

     The link editor may also skip all of this and just (c) emit a

     R_PPC64_GLOB_DAT to tie the symbol to the GOT entry.  */

  /* FIXME: R_PPC64_PLTGOT16 not implemented.  */

    HOW (R_PPC64_PLTGOT16, 2, 16, 0xffff, 0, false,signed,

    ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_PLTGOT16, but without overflow.  */

  /* FIXME: R_PPC64_PLTGOT16_LO not implemented.  */

  HOW (R_PPC64_PLTGOT16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_PLT_GOT16, but using bits 16-31 of the address.  */

  /* FIXME: R_PPC64_PLTGOT16_HI not implemented.  */

  HOW (R_PPC64_PLTGOT16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_PLT_GOT16, but using bits 16-31 of the address, plus

     1 if the contents of the low 16 bits, treated as a signed number,

     is negative.  */

  /* FIXME: R_PPC64_PLTGOT16_HA not implemented.  */

  HOW (R_PPC64_PLTGOT16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_ADDR16, but for instructions with a DS field.  */

  HOW (R_PPC64_ADDR16_DS, 2, 16, 0xfffc, 0, false, signed,

       bfd_elf_generic_reloc),

  /* Like R_PPC64_ADDR16_LO, but for instructions with a DS field.  */

  HOW (R_PPC64_ADDR16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       bfd_elf_generic_reloc),

  /* Like R_PPC64_GOT16, but for instructions with a DS field.  */

  HOW (R_PPC64_GOT16_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_GOT16_LO, but for instructions with a DS field.  */

  HOW (R_PPC64_GOT16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_PLT16_LO, but for instructions with a DS field.  */

  HOW (R_PPC64_PLT16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_SECTOFF, but for instructions with a DS field.  */

  HOW (R_PPC64_SECTOFF_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_sectoff_reloc),

  /* Like R_PPC64_SECTOFF_LO, but for instructions with a DS field.  */

  HOW (R_PPC64_SECTOFF_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_sectoff_reloc),

  /* Like R_PPC64_TOC16, but for instructions with a DS field.  */

  HOW (R_PPC64_TOC16_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_toc_reloc),

  /* Like R_PPC64_TOC16_LO, but for instructions with a DS field.  */

  HOW (R_PPC64_TOC16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_toc_reloc),

  /* Like R_PPC64_PLTGOT16, but for instructions with a DS field.  */

  /* FIXME: R_PPC64_PLTGOT16_DS not implemented.  */

  HOW (R_PPC64_PLTGOT16_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_PLTGOT16_LO, but for instructions with a DS field.  */

  /* FIXME: R_PPC64_PLTGOT16_LO not implemented.  */

  HOW (R_PPC64_PLTGOT16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Marker relocs for TLS.  */

  HOW (R_PPC64_TLS, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_TLSGD, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_TLSLD, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  /* Marker reloc for optimizing r2 save in prologue rather than on

     each plt call stub.  */

  HOW (R_PPC64_TOCSAVE, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  /* Marker relocs on inline plt call instructions.  */

  HOW (R_PPC64_PLTSEQ, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_PLTCALL, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  /* Computes the load module index of the load module that contains the

     definition of its TLS sym.  */

  HOW (R_PPC64_DTPMOD64, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Computes a dtv-relative displacement, the difference between the value

     of sym+add and the base address of the thread-local storage block that

     contains the definition of sym, minus 0x8000.  */

  HOW (R_PPC64_DTPREL64, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* A 16 bit dtprel reloc.  */

  HOW (R_PPC64_DTPREL16, 2, 16, 0xffff, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16, but no overflow.  */

  HOW (R_PPC64_DTPREL16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16_LO, but next higher group of 16 bits.  */

  HOW (R_PPC64_DTPREL16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16_HI, but adjust for low 16 bits.  */

  HOW (R_PPC64_DTPREL16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16_HI, but next higher group of 16 bits.  */

  HOW (R_PPC64_DTPREL16_HIGHER, 2, 16, 0xffff, 32, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16_HIGHER, but adjust for low 16 bits.  */

  HOW (R_PPC64_DTPREL16_HIGHERA, 2, 16, 0xffff, 32, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16_HIGHER, but next higher group of 16 bits.  */

  HOW (R_PPC64_DTPREL16_HIGHEST, 2, 16, 0xffff, 48, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16_HIGHEST, but adjust for low 16 bits.  */

  HOW (R_PPC64_DTPREL16_HIGHESTA, 2, 16, 0xffff, 48, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16, but for insns with a DS field.  */

  HOW (R_PPC64_DTPREL16_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like DTPREL16_DS, but no overflow.  */

  HOW (R_PPC64_DTPREL16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Computes a tp-relative displacement, the difference between the value of

     sym+add and the value of the thread pointer (r13).  */

  HOW (R_PPC64_TPREL64, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* A 16 bit tprel reloc.  */

  HOW (R_PPC64_TPREL16, 2, 16, 0xffff, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16, but no overflow.  */

  HOW (R_PPC64_TPREL16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16_LO, but next higher group of 16 bits.  */

  HOW (R_PPC64_TPREL16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16_HI, but adjust for low 16 bits.  */

  HOW (R_PPC64_TPREL16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16_HI, but next higher group of 16 bits.  */

  HOW (R_PPC64_TPREL16_HIGHER, 2, 16, 0xffff, 32, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16_HIGHER, but adjust for low 16 bits.  */

  HOW (R_PPC64_TPREL16_HIGHERA, 2, 16, 0xffff, 32, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16_HIGHER, but next higher group of 16 bits.  */

  HOW (R_PPC64_TPREL16_HIGHEST, 2, 16, 0xffff, 48, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16_HIGHEST, but adjust for low 16 bits.  */

  HOW (R_PPC64_TPREL16_HIGHESTA, 2, 16, 0xffff, 48, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16, but for insns with a DS field.  */

  HOW (R_PPC64_TPREL16_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like TPREL16_DS, but no overflow.  */

  HOW (R_PPC64_TPREL16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Allocates two contiguous entries in the GOT to hold a tls_index structure,

     with values (sym+add)@dtpmod and (sym+add)@dtprel, and computes the offset

     to the first entry relative to the TOC base (r2).  */

  HOW (R_PPC64_GOT_TLSGD16, 2, 16, 0xffff, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TLSGD16, but no overflow.  */

  HOW (R_PPC64_GOT_TLSGD16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TLSGD16_LO, but next higher group of 16 bits.  */

  HOW (R_PPC64_GOT_TLSGD16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TLSGD16_HI, but adjust for low 16 bits.  */

  HOW (R_PPC64_GOT_TLSGD16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Allocates two contiguous entries in the GOT to hold a tls_index structure,

     with values (sym+add)@dtpmod and zero, and computes the offset to the

     first entry relative to the TOC base (r2).  */

  HOW (R_PPC64_GOT_TLSLD16, 2, 16, 0xffff, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TLSLD16, but no overflow.  */

  HOW (R_PPC64_GOT_TLSLD16_LO, 2, 16, 0xffff, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TLSLD16_LO, but next higher group of 16 bits.  */

  HOW (R_PPC64_GOT_TLSLD16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TLSLD16_HI, but adjust for low 16 bits.  */

  HOW (R_PPC64_GOT_TLSLD16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Allocates an entry in the GOT with value (sym+add)@dtprel, and computes

     the offset to the entry relative to the TOC base (r2).  */

  HOW (R_PPC64_GOT_DTPREL16_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_DTPREL16_DS, but no overflow.  */

  HOW (R_PPC64_GOT_DTPREL16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_DTPREL16_LO_DS, but next higher group of 16 bits.  */

  HOW (R_PPC64_GOT_DTPREL16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_DTPREL16_HI, but adjust for low 16 bits.  */

  HOW (R_PPC64_GOT_DTPREL16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Allocates an entry in the GOT with value (sym+add)@tprel, and computes the

     offset to the entry relative to the TOC base (r2).  */

  HOW (R_PPC64_GOT_TPREL16_DS, 2, 16, 0xfffc, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TPREL16_DS, but no overflow.  */

  HOW (R_PPC64_GOT_TPREL16_LO_DS, 2, 16, 0xfffc, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TPREL16_LO_DS, but next higher group of 16 bits.  */

  HOW (R_PPC64_GOT_TPREL16_HI, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  /* Like GOT_TPREL16_HI, but adjust for low 16 bits.  */

  HOW (R_PPC64_GOT_TPREL16_HA, 2, 16, 0xffff, 16, false, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_JMP_IREL, 0, 0, 0, 0, false, dont,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_IRELATIVE, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       bfd_elf_generic_reloc),

  /* A 16 bit relative relocation.  */

  HOW (R_PPC64_REL16, 2, 16, 0xffff, 0, true, signed,

       bfd_elf_generic_reloc),

  /* A 16 bit relative relocation without overflow.  */

  HOW (R_PPC64_REL16_LO, 2, 16, 0xffff, 0, true, dont,

       bfd_elf_generic_reloc),

  /* The high order 16 bits of a relative address.  */

  HOW (R_PPC64_REL16_HI, 2, 16, 0xffff, 16, true, signed,

       bfd_elf_generic_reloc),

  /* The high order 16 bits of a relative address, plus 1 if the contents of

     the low 16 bits, treated as a signed number, is negative.  */

  HOW (R_PPC64_REL16_HA, 2, 16, 0xffff, 16, true, signed,

       ppc64_elf_ha_reloc),

  HOW (R_PPC64_REL16_HIGH, 2, 16, 0xffff, 16, true, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_REL16_HIGHA, 2, 16, 0xffff, 16, true, dont,

       ppc64_elf_ha_reloc),

  HOW (R_PPC64_REL16_HIGHER, 2, 16, 0xffff, 32, true, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_REL16_HIGHERA, 2, 16, 0xffff, 32, true, dont,

       ppc64_elf_ha_reloc),

  HOW (R_PPC64_REL16_HIGHEST, 2, 16, 0xffff, 48, true, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_REL16_HIGHESTA, 2, 16, 0xffff, 48, true, dont,

       ppc64_elf_ha_reloc),

  /* Like R_PPC64_REL16_HA but for split field in addpcis.  */

  HOW (R_PPC64_REL16DX_HA, 4, 16, 0x1fffc1, 16, true, signed,

       ppc64_elf_ha_reloc),

  /* A split-field reloc for addpcis, non-relative (gas internal use only).  */

  HOW (R_PPC64_16DX_HA, 4, 16, 0x1fffc1, 16, false, signed,

       ppc64_elf_ha_reloc),

  /* Like R_PPC64_ADDR16_HI, but no overflow.  */

  HOW (R_PPC64_ADDR16_HIGH, 2, 16, 0xffff, 16, false, dont,

       bfd_elf_generic_reloc),

  /* Like R_PPC64_ADDR16_HA, but no overflow.  */

  HOW (R_PPC64_ADDR16_HIGHA, 2, 16, 0xffff, 16, false, dont,

       ppc64_elf_ha_reloc),

  /* Like R_PPC64_DTPREL16_HI, but no overflow.  */

  HOW (R_PPC64_DTPREL16_HIGH, 2, 16, 0xffff, 16, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_DTPREL16_HA, but no overflow.  */

  HOW (R_PPC64_DTPREL16_HIGHA, 2, 16, 0xffff, 16, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_TPREL16_HI, but no overflow.  */

  HOW (R_PPC64_TPREL16_HIGH, 2, 16, 0xffff, 16, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Like R_PPC64_TPREL16_HA, but no overflow.  */

  HOW (R_PPC64_TPREL16_HIGHA, 2, 16, 0xffff, 16, false, dont,

       ppc64_elf_unhandled_reloc),

  /* Marker reloc on ELFv2 large-model function entry.  */

  HOW (R_PPC64_ENTRY, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  /* Like ADDR64, but use local entry point of function.  */

  HOW (R_PPC64_ADDR64_LOCAL, 8, 64, 0xffffffffffffffffULL, 0, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_PLTSEQ_NOTOC, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_PLTCALL_NOTOC, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_PCREL_OPT, 4, 32, 0, 0, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_D34, 8, 34, 0x3ffff0000ffffULL, 0, false, signed,

       ppc64_elf_prefix_reloc),

  HOW (R_PPC64_D34_LO, 8, 34, 0x3ffff0000ffffULL, 0, false, dont,

       ppc64_elf_prefix_reloc),

  HOW (R_PPC64_D34_HI30, 8, 34, 0x3ffff0000ffffULL, 34, false, dont,

       ppc64_elf_prefix_reloc),

  HOW (R_PPC64_D34_HA30, 8, 34, 0x3ffff0000ffffULL, 34, false, dont,

       ppc64_elf_prefix_reloc),

  HOW (R_PPC64_PCREL34, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_prefix_reloc),

  HOW (R_PPC64_GOT_PCREL34, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_PLT_PCREL34, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_PLT_PCREL34_NOTOC, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_TPREL34, 8, 34, 0x3ffff0000ffffULL, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_DTPREL34, 8, 34, 0x3ffff0000ffffULL, 0, false, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_GOT_TLSGD_PCREL34, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_GOT_TLSLD_PCREL34, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_GOT_TPREL_PCREL34, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_GOT_DTPREL_PCREL34, 8, 34, 0x3ffff0000ffffULL, 0, true, signed,

       ppc64_elf_unhandled_reloc),

  HOW (R_PPC64_ADDR16_HIGHER34, 2, 16, 0xffff, 34, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_ADDR16_HIGHERA34, 2, 16, 0xffff, 34, false, dont,

       ppc64_elf_ha_reloc),

  HOW (R_PPC64_ADDR16_HIGHEST34, 2, 16, 0xffff, 50, false, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_ADDR16_HIGHESTA34, 2, 16, 0xffff, 50, false, dont,

       ppc64_elf_ha_reloc),

  HOW (R_PPC64_REL16_HIGHER34, 2, 16, 0xffff, 34, true, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_REL16_HIGHERA34, 2, 16, 0xffff, 34, true, dont,

       ppc64_elf_ha_reloc),

  HOW (R_PPC64_REL16_HIGHEST34, 2, 16, 0xffff, 50, true, dont,

       bfd_elf_generic_reloc),

  HOW (R_PPC64_REL16_HIGHESTA34, 2, 16, 0xffff, 50, true, dont,

       ppc64_elf_ha_reloc),

  HOW (R_PPC64_D28, 8, 28, 0xfff0000ffffULL, 0, false, signed,

       ppc64_elf_prefix_reloc),

  HOW (R_PPC64_PCREL28, 8, 28, 0xfff0000ffffULL, 0, true, signed,

       ppc64_elf_prefix_reloc),

  /* GNU extension to record C++ vtable hierarchy.  */

  HOW (R_PPC64_GNU_VTINHERIT, 0, 0, 0, 0, false, dont,

       NULL),

  /* GNU extension to record C++ vtable member usage.  */

  HOW (R_PPC64_GNU_VTENTRY, 0, 0, 0, 0, false, dont,

       NULL),

};

/* Initialize the ppc64_elf_howto_table, so that linear accesses can

   be done.  */

static void

ppc_howto_init (void)

{

  unsigned int i, type;

  for (i = 0; i < ARRAY_SIZE (ppc64_elf_howto_raw); i++)

    {

      type = ppc64_elf_howto_raw[i].type;

      BFD_ASSERT (type < ARRAY_SIZE (ppc64_elf_howto_table));

      ppc64_elf_howto_table[type] = &ppc64_elf_howto_raw[i];

    }

}

static reloc_howto_type *

ppc64_elf_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)

{

  enum elf_ppc64_reloc_type r = R_PPC64_NONE;

  if (!ppc64_elf_howto_table[R_PPC64_ADDR32])

    /* Initialize howto table if needed.  */

    ppc_howto_init ();

  switch (code)

    {

    default:

      /* xgettext:c-format */

      _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd,

        (int) code);

      bfd_set_error (bfd_error_bad_value);

      return NULL;

    case BFD_RELOC_NONE:      r = R_PPC64_NONE;

      break;

    case BFD_RELOC_32:        r = R_PPC64_ADDR32;

      break;

    case BFD_RELOC_PPC_BA26:      r = R_PPC64_ADDR24;

      break;

    case BFD_RELOC_16:        r = R_PPC64_ADDR16;

      break;

    case BFD_RELOC_LO16:      r = R_PPC64_ADDR16_LO;

      break;

    case BFD_RELOC_HI16:      r = R_PPC64_ADDR16_HI;

      break;

    case BFD_RELOC_PPC64_ADDR16_HIGH:   r = R_PPC64_ADDR16_HIGH;

      break;

    case BFD_RELOC_HI16_S:      r = R_PPC64_ADDR16_HA;

      break;

    case BFD_RELOC_PPC64_ADDR16_HIGHA:    r = R_PPC64_ADDR16_HIGHA;

      break;

    case BFD_RELOC_PPC_BA16:      r = R_PPC64_ADDR14;

      break;

    case BFD_RELOC_PPC_BA16_BRTAKEN:    r = R_PPC64_ADDR14_BRTAKEN;

      break;

    case BFD_RELOC_PPC_BA16_BRNTAKEN:   r = R_PPC64_ADDR14_BRNTAKEN;

      break;

    case BFD_RELOC_PPC_B26:     r = R_PPC64_REL24;

      break;

    case BFD_RELOC_PPC64_REL24_NOTOC:   r = R_PPC64_REL24_NOTOC;

      break;

    case BFD_RELOC_PPC64_REL24_P9NOTOC:   r = R_PPC64_REL24_P9NOTOC;

      break;

    case BFD_RELOC_PPC_B16:     r = R_PPC64_REL14;

      break;

    case BFD_RELOC_PPC_B16_BRTAKEN:   r = R_PPC64_REL14_BRTAKEN;

      break;

    case BFD_RELOC_PPC_B16_BRNTAKEN:    r = R_PPC64_REL14_BRNTAKEN;

      break;

    case BFD_RELOC_16_GOTOFF:     r = R_PPC64_GOT16;

      break;

    case BFD_RELOC_LO16_GOTOFF:     r = R_PPC64_GOT16_LO;

      break;

    case BFD_RELOC_HI16_GOTOFF:     r = R_PPC64_GOT16_HI;

      break;

    case BFD_RELOC_HI16_S_GOTOFF:   r = R_PPC64_GOT16_HA;

      break;

    case BFD_RELOC_PPC_COPY:      r = R_PPC64_COPY;

      break;

    case BFD_RELOC_PPC_GLOB_DAT:    r = R_PPC64_GLOB_DAT;

      break;

    case BFD_RELOC_32_PCREL:      r = R_PPC64_REL32;

      break;

    case BFD_RELOC_32_PLTOFF:     r = R_PPC64_PLT32;

      break;

    case BFD_RELOC_32_PLT_PCREL:    r = R_PPC64_PLTREL32;

      break;

    case BFD_RELOC_LO16_PLTOFF:     r = R_PPC64_PLT16_LO;

      break;

    case BFD_RELOC_HI16_PLTOFF:     r = R_PPC64_PLT16_HI;

      break;

    case BFD_RELOC_HI16_S_PLTOFF:   r = R_PPC64_PLT16_HA;

      break;

    case BFD_RELOC_16_BASEREL:      r = R_PPC64_SECTOFF;

      break;