/src/binutils-gdb/include/elf/mips.h
Line | Count | Source (jump to first uncovered line) |
1 | | /* MIPS ELF support for BFD. |
2 | | Copyright (C) 1993-2025 Free Software Foundation, Inc. |
3 | | |
4 | | By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from |
5 | | information in the System V Application Binary Interface, MIPS |
6 | | Processor Supplement. |
7 | | |
8 | | This file is part of BFD, the Binary File Descriptor library. |
9 | | |
10 | | This program is free software; you can redistribute it and/or modify |
11 | | it under the terms of the GNU General Public License as published by |
12 | | the Free Software Foundation; either version 3 of the License, or |
13 | | (at your option) any later version. |
14 | | |
15 | | This program is distributed in the hope that it will be useful, |
16 | | but WITHOUT ANY WARRANTY; without even the implied warranty of |
17 | | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
18 | | GNU General Public License for more details. |
19 | | |
20 | | You should have received a copy of the GNU General Public License |
21 | | along with this program; if not, write to the Free Software |
22 | | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
23 | | MA 02110-1301, USA. */ |
24 | | |
25 | | /* This file holds definitions specific to the MIPS ELF ABI. Note |
26 | | that most of this is not actually implemented by BFD. */ |
27 | | |
28 | | #ifndef _ELF_MIPS_H |
29 | | #define _ELF_MIPS_H |
30 | | |
31 | | #include "elf/reloc-macros.h" |
32 | | |
33 | | #ifdef __cplusplus |
34 | | extern "C" { |
35 | | #endif |
36 | | |
37 | | /* Relocation types. */ |
38 | 48.0k | START_RELOC_NUMBERS (elf_mips_reloc_type) |
39 | 48.0k | RELOC_NUMBER (R_MIPS_NONE, 0) |
40 | 908 | RELOC_NUMBER (R_MIPS_16, 1) |
41 | 795 | RELOC_NUMBER (R_MIPS_32, 2) /* In Elf 64: alias R_MIPS_ADD */ |
42 | 213 | RELOC_NUMBER (R_MIPS_REL32, 3) /* In Elf 64: alias R_MIPS_REL */ |
43 | 1.18k | RELOC_NUMBER (R_MIPS_26, 4) |
44 | 243 | RELOC_NUMBER (R_MIPS_HI16, 5) |
45 | 104 | RELOC_NUMBER (R_MIPS_LO16, 6) |
46 | 150 | RELOC_NUMBER (R_MIPS_GPREL16, 7) /* In Elf 64: alias R_MIPS_GPREL */ |
47 | 311 | RELOC_NUMBER (R_MIPS_LITERAL, 8) |
48 | 263 | RELOC_NUMBER (R_MIPS_GOT16, 9) /* In Elf 64: alias R_MIPS_GOT */ |
49 | 125 | RELOC_NUMBER (R_MIPS_PC16, 10) |
50 | 113 | RELOC_NUMBER (R_MIPS_CALL16, 11) /* In Elf 64: alias R_MIPS_CALL */ |
51 | 68 | RELOC_NUMBER (R_MIPS_GPREL32, 12) |
52 | | /* The remaining relocs are defined on Irix, although they are not |
53 | | in the MIPS ELF ABI. */ |
54 | 48 | RELOC_NUMBER (R_MIPS_UNUSED1, 13) |
55 | 97 | RELOC_NUMBER (R_MIPS_UNUSED2, 14) |
56 | 64 | RELOC_NUMBER (R_MIPS_UNUSED3, 15) |
57 | 151 | RELOC_NUMBER (R_MIPS_SHIFT5, 16) |
58 | 307 | RELOC_NUMBER (R_MIPS_SHIFT6, 17) |
59 | 45 | RELOC_NUMBER (R_MIPS_64, 18) |
60 | 86 | RELOC_NUMBER (R_MIPS_GOT_DISP, 19) |
61 | 49 | RELOC_NUMBER (R_MIPS_GOT_PAGE, 20) |
62 | 55 | RELOC_NUMBER (R_MIPS_GOT_OFST, 21) |
63 | 95 | RELOC_NUMBER (R_MIPS_GOT_HI16, 22) |
64 | 33 | RELOC_NUMBER (R_MIPS_GOT_LO16, 23) |
65 | 83 | RELOC_NUMBER (R_MIPS_SUB, 24) |
66 | 95 | RELOC_NUMBER (R_MIPS_INSERT_A, 25) |
67 | 54 | RELOC_NUMBER (R_MIPS_INSERT_B, 26) |
68 | 101 | RELOC_NUMBER (R_MIPS_DELETE, 27) |
69 | 49 | RELOC_NUMBER (R_MIPS_HIGHER, 28) |
70 | 118 | RELOC_NUMBER (R_MIPS_HIGHEST, 29) |
71 | 39 | RELOC_NUMBER (R_MIPS_CALL_HI16, 30) |
72 | 44 | RELOC_NUMBER (R_MIPS_CALL_LO16, 31) |
73 | 345 | RELOC_NUMBER (R_MIPS_SCN_DISP, 32) |
74 | 88 | RELOC_NUMBER (R_MIPS_REL16, 33) |
75 | 54 | RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34) |
76 | 69 | RELOC_NUMBER (R_MIPS_PJUMP, 35) |
77 | 110 | RELOC_NUMBER (R_MIPS_RELGOT, 36) |
78 | 38 | RELOC_NUMBER (R_MIPS_JALR, 37) |
79 | | /* TLS relocations. */ |
80 | 57 | RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38) |
81 | 226 | RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39) |
82 | 102 | RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40) |
83 | 41 | RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41) |
84 | 77 | RELOC_NUMBER (R_MIPS_TLS_GD, 42) |
85 | 99 | RELOC_NUMBER (R_MIPS_TLS_LDM, 43) |
86 | 77 | RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44) |
87 | 69 | RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45) |
88 | 103 | RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46) |
89 | 69 | RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47) |
90 | 47 | RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48) |
91 | 70 | RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49) |
92 | 39 | RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50) |
93 | 79 | RELOC_NUMBER (R_MIPS_GLOB_DAT, 51) |
94 | | /* Space to grow */ |
95 | 43 | RELOC_NUMBER (R_MIPS_PC21_S2, 60) |
96 | 95 | RELOC_NUMBER (R_MIPS_PC26_S2, 61) |
97 | 98 | RELOC_NUMBER (R_MIPS_PC18_S3, 62) |
98 | 26 | RELOC_NUMBER (R_MIPS_PC19_S2, 63) |
99 | 297 | RELOC_NUMBER (R_MIPS_PCHI16, 64) |
100 | 50 | RELOC_NUMBER (R_MIPS_PCLO16, 65) |
101 | 0 | FAKE_RELOC (R_MIPS_max, 66) |
102 | | /* These relocs are used for the mips16. */ |
103 | 0 | FAKE_RELOC (R_MIPS16_min, 100) |
104 | 117 | RELOC_NUMBER (R_MIPS16_26, 100) |
105 | 265 | RELOC_NUMBER (R_MIPS16_GPREL, 101) |
106 | 140 | RELOC_NUMBER (R_MIPS16_GOT16, 102) |
107 | 62 | RELOC_NUMBER (R_MIPS16_CALL16, 103) |
108 | 54 | RELOC_NUMBER (R_MIPS16_HI16, 104) |
109 | 106 | RELOC_NUMBER (R_MIPS16_LO16, 105) |
110 | 39 | RELOC_NUMBER (R_MIPS16_TLS_GD, 106) |
111 | 32 | RELOC_NUMBER (R_MIPS16_TLS_LDM, 107) |
112 | 82 | RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108) |
113 | 54 | RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109) |
114 | 110 | RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110) |
115 | 132 | RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111) |
116 | 344 | RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112) |
117 | 64 | RELOC_NUMBER (R_MIPS16_PC16_S1, 113) |
118 | 0 | FAKE_RELOC (R_MIPS16_max, 114) |
119 | | /* These relocations are specific to VxWorks. */ |
120 | 45 | RELOC_NUMBER (R_MIPS_COPY, 126) |
121 | 177 | RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127) |
122 | | |
123 | | /* These relocations are specific to microMIPS. */ |
124 | 0 | FAKE_RELOC (R_MICROMIPS_min, 130) |
125 | 10 | RELOC_NUMBER (R_MICROMIPS_26_S1, 133) |
126 | 20 | RELOC_NUMBER (R_MICROMIPS_HI16, 134) |
127 | 46 | RELOC_NUMBER (R_MICROMIPS_LO16, 135) |
128 | 43 | RELOC_NUMBER (R_MICROMIPS_GPREL16, 136) /* In Elf 64: |
129 | 0 | alias R_MICROMIPS_GPREL */ |
130 | 28 | RELOC_NUMBER (R_MICROMIPS_LITERAL, 137) |
131 | 62 | RELOC_NUMBER (R_MICROMIPS_GOT16, 138) /* In Elf 64: |
132 | 0 | alias R_MICROMIPS_GOT */ |
133 | 47 | RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139) |
134 | 65 | RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140) |
135 | 34 | RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141) |
136 | 16 | RELOC_NUMBER (R_MICROMIPS_CALL16, 142) /* In Elf 64: |
137 | 0 | alias R_MICROMIPS_CALL */ |
138 | 19 | RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145) |
139 | 27 | RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146) |
140 | 18 | RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147) |
141 | 19 | RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148) |
142 | 46 | RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149) |
143 | 28 | RELOC_NUMBER (R_MICROMIPS_SUB, 150) |
144 | 16 | RELOC_NUMBER (R_MICROMIPS_HIGHER, 151) |
145 | 52 | RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152) |
146 | 19 | RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153) |
147 | 8 | RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154) |
148 | 13 | RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155) |
149 | 6 | RELOC_NUMBER (R_MICROMIPS_JALR, 156) |
150 | 29 | RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157) |
151 | | /* TLS relocations. */ |
152 | 45 | RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162) |
153 | 28 | RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163) |
154 | 30 | RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164) |
155 | 28 | RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165) |
156 | 18 | RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166) |
157 | 10 | RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169) |
158 | 29 | RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170) |
159 | | /* microMIPS GP- and PC-relative relocations. */ |
160 | 26 | RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172) |
161 | 21 | RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173) |
162 | 0 | FAKE_RELOC (R_MICROMIPS_max, 174) |
163 | | |
164 | | /* This was a GNU extension used by embedded-PIC. It was co-opted by |
165 | | mips-linux for exception-handling data. GCC stopped using it in |
166 | | May, 2004, then started using it again for compact unwind tables. */ |
167 | 29 | RELOC_NUMBER (R_MIPS_PC32, 248) |
168 | 36 | RELOC_NUMBER (R_MIPS_EH, 249) |
169 | | /* FIXME: this relocation is used internally by gas. */ |
170 | 44 | RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250) |
171 | | /* These are GNU extensions to enable C++ vtable garbage collection. */ |
172 | 96 | RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253) |
173 | 80 | RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254) |
174 | 10.4k | END_RELOC_NUMBERS (R_MIPS_maxext) |
175 | | |
176 | | /* Processor specific flags for the ELF header e_flags field. */ |
177 | | |
178 | | /* At least one .noreorder directive appears in the source. */ |
179 | 13.2k | #define EF_MIPS_NOREORDER 0x00000001 |
180 | | |
181 | | /* File contains position independent code. */ |
182 | 13.2k | #define EF_MIPS_PIC 0x00000002 |
183 | | |
184 | | /* Code in file uses the standard calling sequence for calling |
185 | | position independent code. */ |
186 | 13.2k | #define EF_MIPS_CPIC 0x00000004 |
187 | | |
188 | | /* ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a. */ |
189 | 368 | #define EF_MIPS_XGOT 0x00000008 |
190 | | |
191 | | /* Code in file uses UCODE (obsolete) */ |
192 | 13.2k | #define EF_MIPS_UCODE 0x00000010 |
193 | | |
194 | | /* Code in file uses new ABI (-n32 on Irix 6). */ |
195 | 2.53M | #define EF_MIPS_ABI2 0x00000020 |
196 | | |
197 | | /* Process the .MIPS.options section first by ld */ |
198 | 12.9k | #define EF_MIPS_OPTIONS_FIRST 0x00000080 |
199 | | |
200 | | /* Indicates code compiled for a 64-bit machine in 32-bit mode |
201 | | (regs are 32-bits wide). */ |
202 | 13.2k | #define EF_MIPS_32BITMODE 0x00000100 |
203 | | |
204 | | /* 32-bit machine but FP registers are 64 bit (-mfp64). */ |
205 | 13.2k | #define EF_MIPS_FP64 0x00000200 |
206 | | |
207 | | /* Code in file uses the IEEE 754-2008 NaN encoding convention. */ |
208 | 13.2k | #define EF_MIPS_NAN2008 0x00000400 |
209 | | |
210 | | /* Architectural Extensions used by this file */ |
211 | 0 | #define EF_MIPS_ARCH_ASE 0x0f000000 |
212 | | |
213 | | /* Use MDMX multimedia extensions */ |
214 | 1.92M | #define EF_MIPS_ARCH_ASE_MDMX 0x08000000 |
215 | | |
216 | | /* Use MIPS-16 ISA extensions */ |
217 | 13.2k | #define EF_MIPS_ARCH_ASE_M16 0x04000000 |
218 | | |
219 | | /* Use MICROMIPS ISA extensions. */ |
220 | 1.92M | #define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000 |
221 | | |
222 | | /* Four bit MIPS architecture field. */ |
223 | 178k | #define EF_MIPS_ARCH 0xf0000000 |
224 | | |
225 | | /* -mips1 code. */ |
226 | 147k | #define EF_MIPS_ARCH_1 0x00000000 |
227 | | |
228 | | /* -mips2 code. */ |
229 | 1.26k | #define EF_MIPS_ARCH_2 0x10000000 |
230 | | |
231 | | /* -mips3 code. */ |
232 | 11.7k | #define EF_MIPS_ARCH_3 0x20000000 |
233 | | |
234 | | /* -mips4 code. */ |
235 | 5.22k | #define EF_MIPS_ARCH_4 0x30000000 |
236 | | |
237 | | /* -mips5 code. */ |
238 | 1.84k | #define EF_MIPS_ARCH_5 0x40000000 |
239 | | |
240 | | /* -mips32 code. */ |
241 | 356 | #define EF_MIPS_ARCH_32 0x50000000 |
242 | | |
243 | | /* -mips64 code. */ |
244 | 1.26k | #define EF_MIPS_ARCH_64 0x60000000 |
245 | | |
246 | | /* -mips32r2 code. */ |
247 | 2.17k | #define EF_MIPS_ARCH_32R2 0x70000000 |
248 | | |
249 | | /* -mips64r2 code. */ |
250 | 3.06k | #define EF_MIPS_ARCH_64R2 0x80000000 |
251 | | |
252 | | /* -mips32r6 code. */ |
253 | 1.89k | #define EF_MIPS_ARCH_32R6 0x90000000 |
254 | | |
255 | | /* -mips64r6 code. */ |
256 | 482 | #define EF_MIPS_ARCH_64R6 0xa0000000 |
257 | | |
258 | | /* The ABI of the file. Also see EF_MIPS_ABI2 above. */ |
259 | 23.7k | #define EF_MIPS_ABI 0x0000F000 |
260 | | |
261 | | /* The original o32 abi. */ |
262 | 485 | #define EF_MIPS_ABI_O32 0x00001000 |
263 | | |
264 | | /* O32 extended to work on 64 bit architectures */ |
265 | 873 | #define EF_MIPS_ABI_O64 0x00002000 |
266 | | |
267 | | /* EABI in 32 bit mode */ |
268 | 428 | #define EF_MIPS_ABI_EABI32 0x00003000 |
269 | | |
270 | | /* EABI in 64 bit mode */ |
271 | 21.6k | #define EF_MIPS_ABI_EABI64 0x00004000 |
272 | | |
273 | | /* In order to support backwards compatibility we also |
274 | | define the old versions of some of these constants. */ |
275 | | #define E_MIPS_ARCH_1 EF_MIPS_ARCH_1 |
276 | | #define E_MIPS_ARCH_2 EF_MIPS_ARCH_2 |
277 | | #define E_MIPS_ARCH_3 EF_MIPS_ARCH_3 |
278 | | #define E_MIPS_ARCH_4 EF_MIPS_ARCH_4 |
279 | | #define E_MIPS_ARCH_5 EF_MIPS_ARCH_5 |
280 | | #define E_MIPS_ARCH_32 EF_MIPS_ARCH_32 |
281 | | #define E_MIPS_ARCH_64 EF_MIPS_ARCH_64 |
282 | | #define E_MIPS_ARCH_32R2 EF_MIPS_ARCH_32R2 |
283 | | #define E_MIPS_ARCH_64R2 EF_MIPS_ARCH_64R2 |
284 | | #define E_MIPS_ARCH_32R6 EF_MIPS_ARCH_32R6 |
285 | | #define E_MIPS_ARCH_64R6 EF_MIPS_ARCH_64R6 |
286 | | #define E_MIPS_ABI_O32 EF_MIPS_ABI_O32 |
287 | | #define E_MIPS_ABI_O64 EF_MIPS_ABI_O64 |
288 | | #define E_MIPS_ABI_EABI32 EF_MIPS_ABI_EABI32 |
289 | | #define E_MIPS_ABI_EABI64 EF_MIPS_ABI_EABI64 |
290 | | |
291 | | |
292 | | /* Machine variant if we know it. This field was invented at Cygnus, |
293 | | but it is hoped that other vendors will adopt it. If some standard |
294 | | is developed, this code should be changed to follow it. */ |
295 | | |
296 | 183k | #define EF_MIPS_MACH 0x00FF0000 |
297 | | |
298 | | /* Cygnus is choosing values between 80 and 9F; |
299 | | 00 - 7F should be left for a future standard; |
300 | | the rest are open. */ |
301 | | |
302 | 13 | #define EF_MIPS_MACH_3900 0x00810000 |
303 | 1 | #define EF_MIPS_MACH_4010 0x00820000 |
304 | 18 | #define EF_MIPS_MACH_4100 0x00830000 |
305 | 325 | #define EF_MIPS_MACH_ALLEGREX 0x00840000 |
306 | 25 | #define EF_MIPS_MACH_4650 0x00850000 |
307 | 18 | #define EF_MIPS_MACH_4120 0x00870000 |
308 | 8 | #define EF_MIPS_MACH_4111 0x00880000 |
309 | 13 | #define EF_MIPS_MACH_SB1 0x008a0000 |
310 | 998 | #define EF_MIPS_MACH_OCTEON 0x008b0000 |
311 | 29 | #define EF_MIPS_MACH_XLR 0x008c0000 |
312 | 306 | #define EF_MIPS_MACH_OCTEON2 0x008d0000 |
313 | 693 | #define EF_MIPS_MACH_OCTEON3 0x008e0000 |
314 | 15 | #define EF_MIPS_MACH_5400 0x00910000 |
315 | 811 | #define EF_MIPS_MACH_5900 0x00920000 |
316 | 20 | #define EF_MIPS_MACH_IAMR2 0x00930000 |
317 | 9 | #define EF_MIPS_MACH_5500 0x00980000 |
318 | 2.24k | #define EF_MIPS_MACH_9000 0x00990000 |
319 | 22 | #define EF_MIPS_MACH_LS2E 0x00A00000 |
320 | 1.23k | #define EF_MIPS_MACH_LS2F 0x00A10000 |
321 | 30 | #define EF_MIPS_MACH_GS464 0x00A20000 |
322 | 30 | #define EF_MIPS_MACH_GS464E 0x00A30000 |
323 | 92 | #define EF_MIPS_MACH_GS264E 0x00A40000 |
324 | | |
325 | | /* In order to support backwards compatibility we also |
326 | | define the old versions of some of these constants. */ |
327 | | #define E_MIPS_MACH_3900 EF_MIPS_MACH_3900 |
328 | | #define E_MIPS_MACH_4010 EF_MIPS_MACH_4010 |
329 | | #define E_MIPS_MACH_4100 EF_MIPS_MACH_4100 |
330 | | #define E_MIPS_MACH_ALLEGREX EF_MIPS_MACH_ALLEGREX |
331 | | #define E_MIPS_MACH_4650 EF_MIPS_MACH_4650 |
332 | | #define E_MIPS_MACH_4120 EF_MIPS_MACH_4120 |
333 | | #define E_MIPS_MACH_4111 EF_MIPS_MACH_4111 |
334 | | #define E_MIPS_MACH_SB1 EF_MIPS_MACH_SB1 |
335 | | #define E_MIPS_MACH_OCTEON EF_MIPS_MACH_OCTEON |
336 | | #define E_MIPS_MACH_XLR EF_MIPS_MACH_XLR |
337 | | #define E_MIPS_MACH_OCTEON2 EF_MIPS_MACH_OCTEON2 |
338 | | #define E_MIPS_MACH_OCTEON3 EF_MIPS_MACH_OCTEON3 |
339 | | #define E_MIPS_MACH_5400 EF_MIPS_MACH_5400 |
340 | | #define E_MIPS_MACH_5900 EF_MIPS_MACH_5900 |
341 | | #define E_MIPS_MACH_IAMR2 EF_MIPS_MACH_IAMR2 |
342 | | #define E_MIPS_MACH_5500 EF_MIPS_MACH_5500 |
343 | | #define E_MIPS_MACH_9000 EF_MIPS_MACH_9000 |
344 | | #define E_MIPS_MACH_LS2E EF_MIPS_MACH_LS2E |
345 | | #define E_MIPS_MACH_LS2F EF_MIPS_MACH_LS2F |
346 | | #define E_MIPS_MACH_GS464 EF_MIPS_MACH_GS464 |
347 | | #define E_MIPS_MACH_GS464E EF_MIPS_MACH_GS464E |
348 | | #define E_MIPS_MACH_GS264E EF_MIPS_MACH_GS264E |
349 | | |
350 | | /* Processor specific section indices. These sections do not actually |
351 | | exist. Symbols with a st_shndx field corresponding to one of these |
352 | | values have a special meaning. */ |
353 | | |
354 | | /* Defined and allocated common symbol. Value is virtual address. If |
355 | | relocated, alignment must be preserved. */ |
356 | 11 | #define SHN_MIPS_ACOMMON SHN_LORESERVE |
357 | | |
358 | | /* Defined and allocated text symbol. Value is virtual address. |
359 | | Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */ |
360 | 3 | #define SHN_MIPS_TEXT (SHN_LORESERVE + 1) |
361 | | |
362 | | /* Defined and allocated data symbol. Value is virtual address. |
363 | | Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */ |
364 | 16 | #define SHN_MIPS_DATA (SHN_LORESERVE + 2) |
365 | | |
366 | | /* Small common symbol. */ |
367 | 172k | #define SHN_MIPS_SCOMMON (SHN_LORESERVE + 3) |
368 | | |
369 | | /* Small undefined symbol. */ |
370 | 172k | #define SHN_MIPS_SUNDEFINED (SHN_LORESERVE + 4) |
371 | | |
372 | | /* Processor specific section types. */ |
373 | | |
374 | | /* Section contains the set of dynamic shared objects used when |
375 | | statically linking. */ |
376 | 8.74k | #define SHT_MIPS_LIBLIST (SHT_LOPROC + 0) |
377 | | |
378 | | /* I'm not sure what this is, but it's used on Irix 5. */ |
379 | 1.13k | #define SHT_MIPS_MSYM (SHT_LOPROC + 1) |
380 | | |
381 | | /* Section contains list of symbols whose definitions conflict with |
382 | | symbols defined in shared objects. */ |
383 | 590 | #define SHT_MIPS_CONFLICT (SHT_LOPROC + 2) |
384 | | |
385 | | /* Section contains the global pointer table. */ |
386 | 509 | #define SHT_MIPS_GPTAB (SHT_LOPROC + 3) |
387 | | |
388 | | /* Section contains microcode information. The exact format is |
389 | | unspecified. */ |
390 | 512 | #define SHT_MIPS_UCODE (SHT_LOPROC + 4) |
391 | | |
392 | | /* Section contains some sort of debugging information. The exact |
393 | | format is unspecified. It's probably ECOFF symbols. */ |
394 | 652 | #define SHT_MIPS_DEBUG (SHT_LOPROC + 5) |
395 | | |
396 | | /* Section contains register usage information. */ |
397 | 567k | #define SHT_MIPS_REGINFO (SHT_LOPROC + 6) |
398 | | |
399 | | /* ??? */ |
400 | 54 | #define SHT_MIPS_PACKAGE (SHT_LOPROC + 7) |
401 | | |
402 | | /* ??? */ |
403 | 30 | #define SHT_MIPS_PACKSYM (SHT_LOPROC + 8) |
404 | | |
405 | | /* ??? */ |
406 | 59 | #define SHT_MIPS_RELD (SHT_LOPROC + 9) |
407 | | |
408 | | /* Note: SHT_LOPROC + 0xa is missing... */ |
409 | | |
410 | | /* Section contains interface information. */ |
411 | 1.88k | #define SHT_MIPS_IFACE (SHT_LOPROC + 0xb) |
412 | | |
413 | | /* Section contains description of contents of another section. */ |
414 | 1.88k | #define SHT_MIPS_CONTENT (SHT_LOPROC + 0xc) |
415 | | |
416 | | /* Section contains miscellaneous options. */ |
417 | 577k | #define SHT_MIPS_OPTIONS (SHT_LOPROC + 0xd) |
418 | | |
419 | | /* Note: SHT_LOPROC + 0xe is missing... */ |
420 | | /* Note: SHT_LOPROC + 0xf is missing... */ |
421 | | |
422 | | /* ??? */ |
423 | 25 | #define SHT_MIPS_SHDR (SHT_LOPROC + 0x10) |
424 | | |
425 | | /* ??? */ |
426 | 12 | #define SHT_MIPS_FDESC (SHT_LOPROC + 0x11) |
427 | | |
428 | | /* ??? */ |
429 | 2 | #define SHT_MIPS_EXTSYM (SHT_LOPROC + 0x12) |
430 | | |
431 | | /* ??? */ |
432 | 36 | #define SHT_MIPS_DENSE (SHT_LOPROC + 0x13) |
433 | | |
434 | | /* ??? */ |
435 | 45 | #define SHT_MIPS_PDESC (SHT_LOPROC + 0x14) |
436 | | |
437 | | /* ??? */ |
438 | 9 | #define SHT_MIPS_LOCSYM (SHT_LOPROC + 0x15) |
439 | | |
440 | | /* ??? */ |
441 | 6 | #define SHT_MIPS_AUXSYM (SHT_LOPROC + 0x16) |
442 | | |
443 | | /* ??? */ |
444 | 4 | #define SHT_MIPS_OPTSYM (SHT_LOPROC + 0x17) |
445 | | |
446 | | /* ??? */ |
447 | 4 | #define SHT_MIPS_LOCSTR (SHT_LOPROC + 0x18) |
448 | | |
449 | | /* ??? */ |
450 | 2 | #define SHT_MIPS_LINE (SHT_LOPROC + 0x19) |
451 | | |
452 | | /* ??? */ |
453 | 9 | #define SHT_MIPS_RFDESC (SHT_LOPROC + 0x1a) |
454 | | |
455 | | /* Delta C++: symbol table */ |
456 | 8 | #define SHT_MIPS_DELTASYM (SHT_LOPROC + 0x1b) |
457 | | |
458 | | /* Delta C++: instance table */ |
459 | 4 | #define SHT_MIPS_DELTAINST (SHT_LOPROC + 0x1c) |
460 | | |
461 | | /* Delta C++: class table */ |
462 | 1 | #define SHT_MIPS_DELTACLASS (SHT_LOPROC + 0x1d) |
463 | | |
464 | | /* DWARF debugging section. */ |
465 | 6.61k | #define SHT_MIPS_DWARF (SHT_LOPROC + 0x1e) |
466 | | |
467 | | /* Delta C++: declarations */ |
468 | 4 | #define SHT_MIPS_DELTADECL (SHT_LOPROC + 0x1f) |
469 | | |
470 | | /* List of libraries the binary depends on. Includes a time stamp, version |
471 | | number. */ |
472 | 485 | #define SHT_MIPS_SYMBOL_LIB (SHT_LOPROC + 0x20) |
473 | | |
474 | | /* Events section. */ |
475 | 989 | #define SHT_MIPS_EVENTS (SHT_LOPROC + 0x21) |
476 | | |
477 | | /* ??? */ |
478 | 9 | #define SHT_MIPS_TRANSLATE (SHT_LOPROC + 0x22) |
479 | | |
480 | | /* Special pixie sections */ |
481 | 9 | #define SHT_MIPS_PIXIE (SHT_LOPROC + 0x23) |
482 | | |
483 | | /* Address translation table (for debug info) */ |
484 | 3 | #define SHT_MIPS_XLATE (SHT_LOPROC + 0x24) |
485 | | |
486 | | /* SGI internal address translation table (for debug info) */ |
487 | 6 | #define SHT_MIPS_XLATE_DEBUG (SHT_LOPROC + 0x25) |
488 | | |
489 | | /* Intermediate code */ |
490 | 17 | #define SHT_MIPS_WHIRL (SHT_LOPROC + 0x26) |
491 | | |
492 | | /* C++ exception handling region info */ |
493 | 5 | #define SHT_MIPS_EH_REGION (SHT_LOPROC + 0x27) |
494 | | |
495 | | /* Obsolete address translation table (for debug info) */ |
496 | 6 | #define SHT_MIPS_XLATE_OLD (SHT_LOPROC + 0x28) |
497 | | |
498 | | /* Runtime procedure descriptor table exception information (ucode) ??? */ |
499 | 18 | #define SHT_MIPS_PDR_EXCEPTION (SHT_LOPROC + 0x29) |
500 | | |
501 | | /* ABI related flags section. */ |
502 | 567k | #define SHT_MIPS_ABIFLAGS (SHT_LOPROC + 0x2a) |
503 | | |
504 | | /* GNU style symbol hash table with xlat. */ |
505 | 489 | #define SHT_MIPS_XHASH (SHT_LOPROC + 0x2b) |
506 | | |
507 | | /* A section of type SHT_MIPS_LIBLIST contains an array of the |
508 | | following structure. The sh_link field is the section index of the |
509 | | string table. The sh_info field is the number of entries in the |
510 | | section. */ |
511 | | typedef struct |
512 | | { |
513 | | /* String table index for name of shared object. */ |
514 | | unsigned long l_name; |
515 | | /* Time stamp. */ |
516 | | unsigned long l_time_stamp; |
517 | | /* Checksum of symbol names and common sizes. */ |
518 | | unsigned long l_checksum; |
519 | | /* String table index for version. */ |
520 | | unsigned long l_version; |
521 | | /* Flags. */ |
522 | | unsigned long l_flags; |
523 | | } Elf32_Lib; |
524 | | |
525 | | /* The external version of Elf32_Lib. */ |
526 | | typedef struct |
527 | | { |
528 | | unsigned char l_name[4]; |
529 | | unsigned char l_time_stamp[4]; |
530 | | unsigned char l_checksum[4]; |
531 | | unsigned char l_version[4]; |
532 | | unsigned char l_flags[4]; |
533 | | } Elf32_External_Lib; |
534 | | |
535 | | /* The l_flags field of an Elf32_Lib structure may contain the |
536 | | following flags. */ |
537 | | |
538 | | /* Require an exact match at runtime. */ |
539 | 3.85k | #define LL_EXACT_MATCH 0x00000001 |
540 | | |
541 | | /* Ignore version incompatibilities at runtime. */ |
542 | 3.85k | #define LL_IGNORE_INT_VER 0x00000002 |
543 | | |
544 | | /* Require matching minor version number. */ |
545 | 3.85k | #define LL_REQUIRE_MINOR 0x00000004 |
546 | | |
547 | | /* ??? */ |
548 | 3.85k | #define LL_EXPORTS 0x00000008 |
549 | | |
550 | | /* Delay loading of this library until really needed. */ |
551 | 3.85k | #define LL_DELAY_LOAD 0x00000010 |
552 | | |
553 | | /* ??? Delta C++ stuff ??? */ |
554 | 3.85k | #define LL_DELTA 0x00000020 |
555 | | |
556 | | |
557 | | /* A section of type SHT_MIPS_CONFLICT is an array of indices into the |
558 | | .dynsym section. Each element has the following type. */ |
559 | | typedef unsigned long Elf32_Conflict; |
560 | | typedef unsigned char Elf32_External_Conflict[4]; |
561 | | |
562 | | typedef unsigned long Elf64_Conflict; |
563 | | typedef unsigned char Elf64_External_Conflict[8]; |
564 | | |
565 | | /* A section of type SHT_MIPS_GPTAB contains information about how |
566 | | much GP space would be required for different -G arguments. This |
567 | | information is only used so that the linker can provide informative |
568 | | suggestions as to the best -G value to use. The sh_info field is |
569 | | the index of the section for which this information applies. The |
570 | | contents of the section are an array of the following union. The |
571 | | first element uses the gt_header field. The remaining elements use |
572 | | the gt_entry field. */ |
573 | | typedef union |
574 | | { |
575 | | struct |
576 | | { |
577 | | /* -G value actually used for this object file. */ |
578 | | unsigned long gt_current_g_value; |
579 | | /* Unused. */ |
580 | | unsigned long gt_unused; |
581 | | } gt_header; |
582 | | struct |
583 | | { |
584 | | /* If this -G argument has been used... */ |
585 | | unsigned long gt_g_value; |
586 | | /* ...this many GP section bytes would be required. */ |
587 | | unsigned long gt_bytes; |
588 | | } gt_entry; |
589 | | } Elf32_gptab; |
590 | | |
591 | | /* The external version of Elf32_gptab. */ |
592 | | |
593 | | typedef union |
594 | | { |
595 | | struct |
596 | | { |
597 | | unsigned char gt_current_g_value[4]; |
598 | | unsigned char gt_unused[4]; |
599 | | } gt_header; |
600 | | struct |
601 | | { |
602 | | unsigned char gt_g_value[4]; |
603 | | unsigned char gt_bytes[4]; |
604 | | } gt_entry; |
605 | | } Elf32_External_gptab; |
606 | | |
607 | | /* A section of type SHT_MIPS_REGINFO contains the following |
608 | | structure. */ |
609 | | typedef struct |
610 | | { |
611 | | /* Mask of general purpose registers used. */ |
612 | | uint32_t ri_gprmask; |
613 | | /* Mask of co-processor registers used. */ |
614 | | uint32_t ri_cprmask[4]; |
615 | | /* GP register value for this object file. */ |
616 | | uint32_t ri_gp_value; |
617 | | } Elf32_RegInfo; |
618 | | |
619 | | /* The external version of the Elf_RegInfo structure. */ |
620 | | typedef struct |
621 | | { |
622 | | unsigned char ri_gprmask[4]; |
623 | | unsigned char ri_cprmask[4][4]; |
624 | | unsigned char ri_gp_value[4]; |
625 | | } Elf32_External_RegInfo; |
626 | | |
627 | | /* MIPS ELF .reginfo swapping routines. */ |
628 | | extern void bfd_mips_elf32_swap_reginfo_in |
629 | | (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *); |
630 | | extern void bfd_mips_elf32_swap_reginfo_out |
631 | | (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *); |
632 | | |
633 | | /* Processor specific section flags. */ |
634 | | |
635 | | /* This section must be in the global data area. */ |
636 | 567k | #define SHF_MIPS_GPREL 0x10000000 |
637 | | |
638 | | /* This section should be merged. */ |
639 | | #define SHF_MIPS_MERGE 0x20000000 |
640 | | |
641 | | /* This section contains address data of size implied by section |
642 | | element size. */ |
643 | | #define SHF_MIPS_ADDR 0x40000000 |
644 | | |
645 | | /* This section contains string data. */ |
646 | | #define SHF_MIPS_STRING 0x80000000 |
647 | | |
648 | | /* This section may not be stripped. */ |
649 | 0 | #define SHF_MIPS_NOSTRIP 0x08000000 |
650 | | |
651 | | /* This section is local to threads. */ |
652 | | #define SHF_MIPS_LOCAL 0x04000000 |
653 | | |
654 | | /* Linker should generate implicit weak names for this section. */ |
655 | | #define SHF_MIPS_NAMES 0x02000000 |
656 | | |
657 | | /* Section contais text/data which may be replicated in other sections. |
658 | | Linker should retain only one copy. */ |
659 | | #define SHF_MIPS_NODUPES 0x01000000 |
660 | | |
661 | | /* Processor specific program header types. */ |
662 | | |
663 | | /* Register usage information. Identifies one .reginfo section. */ |
664 | 336 | #define PT_MIPS_REGINFO 0x70000000 |
665 | | |
666 | | /* Runtime procedure table. */ |
667 | 286 | #define PT_MIPS_RTPROC 0x70000001 |
668 | | |
669 | | /* .MIPS.options section. */ |
670 | 134 | #define PT_MIPS_OPTIONS 0x70000002 |
671 | | |
672 | | /* Records ABI related flags. */ |
673 | 134 | #define PT_MIPS_ABIFLAGS 0x70000003 |
674 | | |
675 | | /* Processor specific dynamic array tags. */ |
676 | | |
677 | | /* 32 bit version number for runtime linker interface. */ |
678 | 674 | #define DT_MIPS_RLD_VERSION 0x70000001 |
679 | | |
680 | | /* Time stamp. */ |
681 | 252 | #define DT_MIPS_TIME_STAMP 0x70000002 |
682 | | |
683 | | /* Checksum of external strings and common sizes. */ |
684 | 151 | #define DT_MIPS_ICHECKSUM 0x70000003 |
685 | | |
686 | | /* Index of version string in string table. */ |
687 | 356 | #define DT_MIPS_IVERSION 0x70000004 |
688 | | |
689 | | /* 32 bits of flags. */ |
690 | 3.03k | #define DT_MIPS_FLAGS 0x70000005 |
691 | | |
692 | | /* Base address of the segment. */ |
693 | 48 | #define DT_MIPS_BASE_ADDRESS 0x70000006 |
694 | | |
695 | | /* ??? */ |
696 | 57 | #define DT_MIPS_MSYM 0x70000007 |
697 | | |
698 | | /* Address of .conflict section. */ |
699 | 590 | #define DT_MIPS_CONFLICT 0x70000008 |
700 | | |
701 | | /* Address of .liblist section. */ |
702 | 805 | #define DT_MIPS_LIBLIST 0x70000009 |
703 | | |
704 | | /* Number of local global offset table entries. */ |
705 | 2.81k | #define DT_MIPS_LOCAL_GOTNO 0x7000000a |
706 | | |
707 | | /* Number of entries in the .conflict section. */ |
708 | 4.27k | #define DT_MIPS_CONFLICTNO 0x7000000b |
709 | | |
710 | | /* Number of entries in the .liblist section. */ |
711 | 3.03k | #define DT_MIPS_LIBLISTNO 0x70000010 |
712 | | |
713 | | /* Number of entries in the .dynsym section. */ |
714 | 3.24k | #define DT_MIPS_SYMTABNO 0x70000011 |
715 | | |
716 | | /* Index of first external dynamic symbol not referenced locally. */ |
717 | 2.90k | #define DT_MIPS_UNREFEXTNO 0x70000012 |
718 | | |
719 | | /* Index of first dynamic symbol in global offset table. */ |
720 | 522 | #define DT_MIPS_GOTSYM 0x70000013 |
721 | | |
722 | | /* Number of page table entries in global offset table. */ |
723 | 3.22k | #define DT_MIPS_HIPAGENO 0x70000014 |
724 | | |
725 | | /* Address of run time loader map, used for debugging. */ |
726 | 31 | #define DT_MIPS_RLD_MAP 0x70000016 |
727 | | |
728 | | /* Delta C++ class definition. */ |
729 | 17 | #define DT_MIPS_DELTA_CLASS 0x70000017 |
730 | | |
731 | | /* Number of entries in DT_MIPS_DELTA_CLASS. */ |
732 | 3.08k | #define DT_MIPS_DELTA_CLASS_NO 0x70000018 |
733 | | |
734 | | /* Delta C++ class instances. */ |
735 | 10 | #define DT_MIPS_DELTA_INSTANCE 0x70000019 |
736 | | |
737 | | /* Number of entries in DT_MIPS_DELTA_INSTANCE. */ |
738 | 3.09k | #define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a |
739 | | |
740 | | /* Delta relocations. */ |
741 | 3 | #define DT_MIPS_DELTA_RELOC 0x7000001b |
742 | | |
743 | | /* Number of entries in DT_MIPS_DELTA_RELOC. */ |
744 | 3.12k | #define DT_MIPS_DELTA_RELOC_NO 0x7000001c |
745 | | |
746 | | /* Delta symbols that Delta relocations refer to. */ |
747 | 29 | #define DT_MIPS_DELTA_SYM 0x7000001d |
748 | | |
749 | | /* Number of entries in DT_MIPS_DELTA_SYM. */ |
750 | 4.43k | #define DT_MIPS_DELTA_SYM_NO 0x7000001e |
751 | | |
752 | | /* Delta symbols that hold class declarations. */ |
753 | 37 | #define DT_MIPS_DELTA_CLASSSYM 0x70000020 |
754 | | |
755 | | /* Number of entries in DT_MIPS_DELTA_CLASSSYM. */ |
756 | 3.80k | #define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 |
757 | | |
758 | | /* Flags indicating information about C++ flavor. */ |
759 | 43 | #define DT_MIPS_CXX_FLAGS 0x70000022 |
760 | | |
761 | | /* Pixie information (???). */ |
762 | 8 | #define DT_MIPS_PIXIE_INIT 0x70000023 |
763 | | |
764 | | /* Address of .MIPS.symlib */ |
765 | 11 | #define DT_MIPS_SYMBOL_LIB 0x70000024 |
766 | | |
767 | | /* The GOT index of the first PTE for a segment */ |
768 | 25 | #define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025 |
769 | | |
770 | | /* The GOT index of the first PTE for a local symbol */ |
771 | 55 | #define DT_MIPS_LOCAL_GOTIDX 0x70000026 |
772 | | |
773 | | /* The GOT index of the first PTE for a hidden symbol */ |
774 | 19 | #define DT_MIPS_HIDDEN_GOTIDX 0x70000027 |
775 | | |
776 | | /* The GOT index of the first PTE for a protected symbol */ |
777 | 10 | #define DT_MIPS_PROTECTED_GOTIDX 0x70000028 |
778 | | |
779 | | /* Address of `.MIPS.options'. */ |
780 | 792 | #define DT_MIPS_OPTIONS 0x70000029 |
781 | | |
782 | | /* Address of `.interface'. */ |
783 | 0 | #define DT_MIPS_INTERFACE 0x7000002a |
784 | | |
785 | | /* ??? */ |
786 | 7 | #define DT_MIPS_DYNSTR_ALIGN 0x7000002b |
787 | | |
788 | | /* Size of the .interface section. */ |
789 | 5 | #define DT_MIPS_INTERFACE_SIZE 0x7000002c |
790 | | |
791 | | /* Size of rld_text_resolve function stored in the GOT. */ |
792 | 16 | #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d |
793 | | |
794 | | /* Default suffix of DSO to be added by rld on dlopen() calls. */ |
795 | 12 | #define DT_MIPS_PERF_SUFFIX 0x7000002e |
796 | | |
797 | | /* Size of compact relocation section (O32). */ |
798 | 4.02k | #define DT_MIPS_COMPACT_SIZE 0x7000002f |
799 | | |
800 | | /* GP value for auxiliary GOTs. */ |
801 | 4 | #define DT_MIPS_GP_VALUE 0x70000030 |
802 | | |
803 | | /* Address of auxiliary .dynamic. */ |
804 | 11 | #define DT_MIPS_AUX_DYNAMIC 0x70000031 |
805 | | |
806 | | /* Address of the base of the PLTGOT. */ |
807 | 546 | #define DT_MIPS_PLTGOT 0x70000032 |
808 | | |
809 | | /* Points to the base of a writable PLT. */ |
810 | 61 | #define DT_MIPS_RWPLT 0x70000034 |
811 | | |
812 | | /* Relative offset of run time loader map, used for debugging. */ |
813 | 14 | #define DT_MIPS_RLD_MAP_REL 0x70000035 |
814 | | |
815 | | /* Address of .MIPS.xhash section. */ |
816 | 390k | #define DT_MIPS_XHASH 0x70000036 |
817 | | |
818 | | /* Flags which may appear in a DT_MIPS_FLAGS entry. */ |
819 | | |
820 | | /* No flags. */ |
821 | | #define RHF_NONE 0x00000000 |
822 | | |
823 | | /* Uses shortcut pointers. */ |
824 | | #define RHF_QUICKSTART 0x00000001 |
825 | | |
826 | | /* Hash size is not a power of two. */ |
827 | 0 | #define RHF_NOTPOT 0x00000002 |
828 | | |
829 | | /* Ignore LD_LIBRARY_PATH. */ |
830 | | #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004 |
831 | | |
832 | | /* DSO address may not be relocated. */ |
833 | | #define RHF_NO_MOVE 0x00000008 |
834 | | |
835 | | /* SGI specific features. */ |
836 | | #define RHF_SGI_ONLY 0x00000010 |
837 | | |
838 | | /* Guarantee that .init will finish executing before any non-init |
839 | | code in DSO is called. */ |
840 | | #define RHF_GUARANTEE_INIT 0x00000020 |
841 | | |
842 | | /* Contains Delta C++ code. */ |
843 | | #define RHF_DELTA_C_PLUS_PLUS 0x00000040 |
844 | | |
845 | | /* Guarantee that .init will start executing before any non-init |
846 | | code in DSO is called. */ |
847 | | #define RHF_GUARANTEE_START_INIT 0x00000080 |
848 | | |
849 | | /* Generated by pixie. */ |
850 | | #define RHF_PIXIE 0x00000100 |
851 | | |
852 | | /* Delay-load DSO by default. */ |
853 | | #define RHF_DEFAULT_DELAY_LOAD 0x00000200 |
854 | | |
855 | | /* Object may be requickstarted */ |
856 | | #define RHF_REQUICKSTART 0x00000400 |
857 | | |
858 | | /* Object has been requickstarted */ |
859 | | #define RHF_REQUICKSTARTED 0x00000800 |
860 | | |
861 | | /* Generated by cord. */ |
862 | | #define RHF_CORD 0x00001000 |
863 | | |
864 | | /* Object contains no unresolved undef symbols. */ |
865 | | #define RHF_NO_UNRES_UNDEF 0x00002000 |
866 | | |
867 | | /* Symbol table is in a safe order. */ |
868 | | #define RHF_RLD_ORDER_SAFE 0x00004000 |
869 | | |
870 | | /* Special values for the st_other field in the symbol table. These |
871 | | are used in an Irix 5 dynamic symbol table. */ |
872 | | |
873 | | #define STO_DEFAULT STV_DEFAULT |
874 | | #define STO_INTERNAL STV_INTERNAL |
875 | | #define STO_HIDDEN STV_HIDDEN |
876 | 0 | #define STO_PROTECTED STV_PROTECTED |
877 | | |
878 | | /* Two topmost bits denote the MIPS ISA for .text symbols: |
879 | | + 00 -- standard MIPS code, |
880 | | + 10 -- microMIPS code, |
881 | | + 11 -- MIPS16 code; requires the following two bits to be set too. |
882 | | Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC. See below |
883 | | for details. */ |
884 | 557k | #define STO_MIPS_ISA (3 << 6) |
885 | | |
886 | | /* The mask spanning the rest of MIPS psABI flags. At most one is expected |
887 | | to be set except for STO_MIPS16. */ |
888 | 0 | #define STO_MIPS_FLAGS (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1))) |
889 | | |
890 | | /* The MIPS psABI was updated in 2008 with support for PLTs and copy |
891 | | relocs. There are therefore two types of nonzero SHN_UNDEF functions: |
892 | | PLT entries and traditional MIPS lazy binding stubs. We mark the former |
893 | | with STO_MIPS_PLT to distinguish them from the latter. */ |
894 | 6.89k | #define STO_MIPS_PLT 0x8 |
895 | | #define ELF_ST_IS_MIPS_PLT(other) \ |
896 | | ((ELF_ST_IS_MIPS16 (other) \ |
897 | | ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \ |
898 | | : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT) |
899 | | #define ELF_ST_SET_MIPS_PLT(other) \ |
900 | 0 | ((ELF_ST_IS_MIPS16 (other) \ |
901 | 0 | ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \ |
902 | 0 | : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT) |
903 | | |
904 | | /* This value is used to mark PIC functions in an object that mixes |
905 | | PIC and non-PIC. Note that this bit overlaps with STO_MIPS16, |
906 | | although MIPS16 symbols are never considered to be MIPS_PIC. */ |
907 | 5.52k | #define STO_MIPS_PIC 0x20 |
908 | 0 | #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC) |
909 | | #define ELF_ST_SET_MIPS_PIC(other) \ |
910 | 0 | ((ELF_ST_IS_MIPS16 (other) \ |
911 | 0 | ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS)) \ |
912 | 0 | : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC) |
913 | | |
914 | | /* This value is used for a mips16 .text symbol. */ |
915 | 1.11M | #define STO_MIPS16 0xf0 |
916 | 557k | #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16) |
917 | 16 | #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16) |
918 | | |
919 | | /* This value is used for a microMIPS .text symbol. To distinguish from |
920 | | STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The |
921 | | mask is STO_MIPS_ISA. */ |
922 | 560k | #define STO_MICROMIPS (2 << 6) |
923 | 557k | #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS) |
924 | 3 | #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS) |
925 | | |
926 | | /* Whether code compression (either of the MIPS16 or the microMIPS ASEs) |
927 | | has been indicated for a .text symbol. */ |
928 | | #define ELF_ST_IS_COMPRESSED(other) \ |
929 | 0 | (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other)) |
930 | | |
931 | | /* This bit is used on Irix to indicate a symbol whose definition |
932 | | is optional - if, at final link time, it cannot be found, no |
933 | | error message should be produced. */ |
934 | 5.83k | #define STO_OPTIONAL (1 << 2) |
935 | | /* A macro to examine the STO_OPTIONAL bit. */ |
936 | 0 | #define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL) |
937 | | |
938 | | /* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each |
939 | | relocation entry specifies up to three actual relocations, all at |
940 | | the same address. The first relocation which required a symbol |
941 | | uses the symbol in the r_sym field. The second relocation which |
942 | | requires a symbol uses the symbol in the r_ssym field. If all |
943 | | three relocations require a symbol, the third one uses a zero |
944 | | value. */ |
945 | | |
946 | | /* An entry in a 64 bit SHT_REL section. */ |
947 | | |
948 | | typedef struct |
949 | | { |
950 | | /* Address of relocation. */ |
951 | | unsigned char r_offset[8]; |
952 | | /* Symbol index. */ |
953 | | unsigned char r_sym[4]; |
954 | | /* Special symbol. */ |
955 | | unsigned char r_ssym[1]; |
956 | | /* Third relocation. */ |
957 | | unsigned char r_type3[1]; |
958 | | /* Second relocation. */ |
959 | | unsigned char r_type2[1]; |
960 | | /* First relocation. */ |
961 | | unsigned char r_type[1]; |
962 | | } Elf64_Mips_External_Rel; |
963 | | |
964 | | typedef struct |
965 | | { |
966 | | /* Address of relocation. */ |
967 | | bfd_vma r_offset; |
968 | | /* Symbol index. */ |
969 | | unsigned long r_sym; |
970 | | /* Special symbol. */ |
971 | | unsigned char r_ssym; |
972 | | /* Third relocation. */ |
973 | | unsigned char r_type3; |
974 | | /* Second relocation. */ |
975 | | unsigned char r_type2; |
976 | | /* First relocation. */ |
977 | | unsigned char r_type; |
978 | | } Elf64_Mips_Internal_Rel; |
979 | | |
980 | | /* An entry in a 64 bit SHT_RELA section. */ |
981 | | |
982 | | typedef struct |
983 | | { |
984 | | /* Address of relocation. */ |
985 | | unsigned char r_offset[8]; |
986 | | /* Symbol index. */ |
987 | | unsigned char r_sym[4]; |
988 | | /* Special symbol. */ |
989 | | unsigned char r_ssym[1]; |
990 | | /* Third relocation. */ |
991 | | unsigned char r_type3[1]; |
992 | | /* Second relocation. */ |
993 | | unsigned char r_type2[1]; |
994 | | /* First relocation. */ |
995 | | unsigned char r_type[1]; |
996 | | /* Addend. */ |
997 | | unsigned char r_addend[8]; |
998 | | } Elf64_Mips_External_Rela; |
999 | | |
1000 | | typedef struct |
1001 | | { |
1002 | | /* Address of relocation. */ |
1003 | | bfd_vma r_offset; |
1004 | | /* Symbol index. */ |
1005 | | unsigned long r_sym; |
1006 | | /* Special symbol. */ |
1007 | | unsigned char r_ssym; |
1008 | | /* Third relocation. */ |
1009 | | unsigned char r_type3; |
1010 | | /* Second relocation. */ |
1011 | | unsigned char r_type2; |
1012 | | /* First relocation. */ |
1013 | | unsigned char r_type; |
1014 | | /* Addend. */ |
1015 | | bfd_signed_vma r_addend; |
1016 | | } Elf64_Mips_Internal_Rela; |
1017 | | |
1018 | | /* MIPS ELF 64 relocation info access macros. */ |
1019 | 0 | #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff) |
1020 | 6.17k | #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff) |
1021 | 6.17k | #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff) |
1022 | 6.93k | #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff) |
1023 | | |
1024 | | /* Values found in the r_ssym field of a relocation entry. */ |
1025 | | |
1026 | | /* No relocation. */ |
1027 | 81 | #define RSS_UNDEF 0 |
1028 | | |
1029 | | /* Value of GP. */ |
1030 | 7 | #define RSS_GP 1 |
1031 | | |
1032 | | /* Value of GP in object being relocated. */ |
1033 | 9 | #define RSS_GP0 2 |
1034 | | |
1035 | | /* Address of location being relocated. */ |
1036 | 10 | #define RSS_LOC 3 |
1037 | | |
1038 | | /* A SHT_MIPS_OPTIONS section contains a series of options, each of |
1039 | | which starts with this header. */ |
1040 | | |
1041 | | typedef struct |
1042 | | { |
1043 | | /* Type of option. */ |
1044 | | unsigned char kind[1]; |
1045 | | /* Size of option descriptor, including header. */ |
1046 | | unsigned char size[1]; |
1047 | | /* Section index of affected section, or 0 for global option. */ |
1048 | | unsigned char section[2]; |
1049 | | /* Information specific to this kind of option. */ |
1050 | | unsigned char info[4]; |
1051 | | } Elf_External_Options; |
1052 | | |
1053 | | typedef struct |
1054 | | { |
1055 | | /* Type of option. */ |
1056 | | unsigned char kind; |
1057 | | /* Size of option descriptor, including header. */ |
1058 | | unsigned char size; |
1059 | | /* Section index of affected section, or 0 for global option. */ |
1060 | | uint16_t section; |
1061 | | /* Information specific to this kind of option. */ |
1062 | | uint32_t info; |
1063 | | } Elf_Internal_Options; |
1064 | | |
1065 | | /* MIPS ELF option header swapping routines. */ |
1066 | | extern void bfd_mips_elf_swap_options_in |
1067 | | (bfd *, const Elf_External_Options *, Elf_Internal_Options *); |
1068 | | extern void bfd_mips_elf_swap_options_out |
1069 | | (bfd *, const Elf_Internal_Options *, Elf_External_Options *); |
1070 | | |
1071 | | /* Values which may appear in the kind field of an Elf_Options |
1072 | | structure. */ |
1073 | | |
1074 | | /* Undefined. */ |
1075 | 129 | #define ODK_NULL 0 |
1076 | | |
1077 | | /* Register usage and GP value. */ |
1078 | 6.35k | #define ODK_REGINFO 1 |
1079 | | |
1080 | | /* Exception processing information. */ |
1081 | 299 | #define ODK_EXCEPTIONS 2 |
1082 | | |
1083 | | /* Section padding information. */ |
1084 | 192 | #define ODK_PAD 3 |
1085 | | |
1086 | | /* Hardware workarounds performed. */ |
1087 | 138 | #define ODK_HWPATCH 4 |
1088 | | |
1089 | | /* Fill value used by the linker. */ |
1090 | 15 | #define ODK_FILL 5 |
1091 | | |
1092 | | /* Reserved space for desktop tools. */ |
1093 | 110 | #define ODK_TAGS 6 |
1094 | | |
1095 | | /* Hardware workarounds, AND bits when merging. */ |
1096 | 179 | #define ODK_HWAND 7 |
1097 | | |
1098 | | /* Hardware workarounds, OR bits when merging. */ |
1099 | 621 | #define ODK_HWOR 8 |
1100 | | |
1101 | | /* GP group to use for text/data sections. */ |
1102 | 84 | #define ODK_GP_GROUP 9 |
1103 | | |
1104 | | /* ID information. */ |
1105 | 82 | #define ODK_IDENT 10 |
1106 | | |
1107 | | /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo |
1108 | | structure. In the 64 bit ABI, it is the following structure. The |
1109 | | info field of the options header is not used. */ |
1110 | | |
1111 | | typedef struct |
1112 | | { |
1113 | | /* Mask of general purpose registers used. */ |
1114 | | unsigned char ri_gprmask[4]; |
1115 | | /* Padding. */ |
1116 | | unsigned char ri_pad[4]; |
1117 | | /* Mask of co-processor registers used. */ |
1118 | | unsigned char ri_cprmask[4][4]; |
1119 | | /* GP register value for this object file. */ |
1120 | | unsigned char ri_gp_value[8]; |
1121 | | } Elf64_External_RegInfo; |
1122 | | |
1123 | | typedef struct |
1124 | | { |
1125 | | /* Mask of general purpose registers used. */ |
1126 | | uint32_t ri_gprmask; |
1127 | | /* Padding. */ |
1128 | | uint32_t ri_pad; |
1129 | | /* Mask of co-processor registers used. */ |
1130 | | uint32_t ri_cprmask[4]; |
1131 | | /* GP register value for this object file. */ |
1132 | | uint64_t ri_gp_value; |
1133 | | } Elf64_Internal_RegInfo; |
1134 | | |
1135 | | /* ABI Flags structure version 0. */ |
1136 | | |
1137 | | typedef struct |
1138 | | { |
1139 | | /* Version of flags structure. */ |
1140 | | unsigned char version[2]; |
1141 | | /* The level of the ISA: 1-5, 32, 64. */ |
1142 | | unsigned char isa_level[1]; |
1143 | | /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ |
1144 | | unsigned char isa_rev[1]; |
1145 | | /* The size of general purpose registers. */ |
1146 | | unsigned char gpr_size[1]; |
1147 | | /* The size of co-processor 1 registers. */ |
1148 | | unsigned char cpr1_size[1]; |
1149 | | /* The size of co-processor 2 registers. */ |
1150 | | unsigned char cpr2_size[1]; |
1151 | | /* The floating-point ABI. */ |
1152 | | unsigned char fp_abi[1]; |
1153 | | /* Processor-specific extension. */ |
1154 | | unsigned char isa_ext[4]; |
1155 | | /* Mask of ASEs used. */ |
1156 | | unsigned char ases[4]; |
1157 | | /* Mask of general flags. */ |
1158 | | unsigned char flags1[4]; |
1159 | | unsigned char flags2[4]; |
1160 | | } Elf_External_ABIFlags_v0; |
1161 | | |
1162 | | typedef struct elf_internal_abiflags_v0 |
1163 | | { |
1164 | | /* Version of flags structure. */ |
1165 | | unsigned short version; |
1166 | | /* The level of the ISA: 1-5, 32, 64. */ |
1167 | | unsigned char isa_level; |
1168 | | /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ |
1169 | | unsigned char isa_rev; |
1170 | | /* The size of general purpose registers. */ |
1171 | | unsigned char gpr_size; |
1172 | | /* The size of co-processor 1 registers. */ |
1173 | | unsigned char cpr1_size; |
1174 | | /* The size of co-processor 2 registers. */ |
1175 | | unsigned char cpr2_size; |
1176 | | /* The floating-point ABI. */ |
1177 | | unsigned char fp_abi; |
1178 | | /* Processor-specific extension. */ |
1179 | | unsigned long isa_ext; |
1180 | | /* Mask of ASEs used. */ |
1181 | | unsigned long ases; |
1182 | | /* Mask of general flags. */ |
1183 | | unsigned long flags1; |
1184 | | unsigned long flags2; |
1185 | | } Elf_Internal_ABIFlags_v0; |
1186 | | |
1187 | | typedef struct |
1188 | | { |
1189 | | /* The hash value computed from the name of the corresponding |
1190 | | dynamic symbol. */ |
1191 | | unsigned char ms_hash_value[4]; |
1192 | | /* Contains both the dynamic relocation index and the symbol flags |
1193 | | field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used |
1194 | | to access the individual values. The dynamic relocation index |
1195 | | identifies the first entry in the .rel.dyn section that |
1196 | | references the dynamic symbol corresponding to this msym entry. |
1197 | | If the index is 0, no dynamic relocations are associated with the |
1198 | | symbol. The symbol flags field is reserved for future use. */ |
1199 | | unsigned char ms_info[4]; |
1200 | | } Elf32_External_Msym; |
1201 | | |
1202 | | typedef struct |
1203 | | { |
1204 | | /* The hash value computed from the name of the corresponding |
1205 | | dynamic symbol. */ |
1206 | | unsigned long ms_hash_value; |
1207 | | /* Contains both the dynamic relocation index and the symbol flags |
1208 | | field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used |
1209 | | to access the individual values. The dynamic relocation index |
1210 | | identifies the first entry in the .rel.dyn section that |
1211 | | references the dynamic symbol corresponding to this msym entry. |
1212 | | If the index is 0, no dynamic relocations are associated with the |
1213 | | symbol. The symbol flags field is reserved for future use. */ |
1214 | | unsigned long ms_info; |
1215 | | } Elf32_Internal_Msym; |
1216 | | |
1217 | | #define ELF32_MS_REL_INDEX(i) ((i) >> 8) |
1218 | | #define ELF32_MS_FLAGS(i) (i) & 0xff) |
1219 | | #define ELF32_MS_INFO(r, f) (((r) << 8) + ((f) & 0xff)) |
1220 | | |
1221 | | /* MIPS ELF reginfo swapping routines. */ |
1222 | | extern void bfd_mips_elf64_swap_reginfo_in |
1223 | | (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *); |
1224 | | extern void bfd_mips_elf64_swap_reginfo_out |
1225 | | (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *); |
1226 | | |
1227 | | /* MIPS ELF flags swapping routines. */ |
1228 | | extern void bfd_mips_elf_swap_abiflags_v0_in |
1229 | | (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *); |
1230 | | extern void bfd_mips_elf_swap_abiflags_v0_out |
1231 | | (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *); |
1232 | | |
1233 | | /* Masks for the info work of an ODK_EXCEPTIONS descriptor. */ |
1234 | 299 | #define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */ |
1235 | 299 | #define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */ |
1236 | 299 | #define OEX_PAGE0 0x10000 /* Page zero must be mapped. */ |
1237 | 299 | #define OEX_SMM 0x20000 /* Force sequential memory mode. */ |
1238 | 299 | #define OEX_FPDBUG 0x40000 /* Force precise floating-point |
1239 | | exceptions (debug mode). */ |
1240 | 299 | #define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */ |
1241 | | |
1242 | | /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */ |
1243 | 514 | #define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */ |
1244 | 514 | #define OEX_FPU_DIV0 0x08 /* Division by zero exception. */ |
1245 | 514 | #define OEX_FPU_OFLO 0x04 /* Overflow exception. */ |
1246 | 514 | #define OEX_FPU_UFLO 0x02 /* Underflow exception. */ |
1247 | 514 | #define OEX_FPU_INEX 0x01 /* Inexact exception. */ |
1248 | | |
1249 | | /* Masks for the info word of an ODK_PAD descriptor. */ |
1250 | 192 | #define OPAD_PREFIX 0x01 |
1251 | 192 | #define OPAD_POSTFIX 0x02 |
1252 | 192 | #define OPAD_SYMBOL 0x04 |
1253 | | |
1254 | | /* Masks for the info word of an ODK_HWPATCH descriptor. */ |
1255 | 138 | #define OHW_R4KEOP 0x00000001 /* R4000 end-of-page patch. */ |
1256 | 138 | #define OHW_R8KPFETCH 0x00000002 /* May need R8000 prefetch patch. */ |
1257 | 138 | #define OHW_R5KEOP 0x00000004 /* R5000 end-of-page patch. */ |
1258 | 138 | #define OHW_R5KCVTL 0x00000008 /* R5000 cvt.[ds].l bug |
1259 | | (clean == 1). */ |
1260 | | #define OHW_R10KLDL 0x00000010 /* Needs R10K misaligned |
1261 | | load patch. */ |
1262 | | |
1263 | | /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */ |
1264 | 166 | #define OGP_GROUP 0x0000ffff /* GP group number. */ |
1265 | 166 | #define OGP_SELF 0xffff0000 /* Self-contained GP groups. */ |
1266 | | |
1267 | | /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */ |
1268 | 800 | #define OHWA0_R4KEOP_CHECKED 0x00000001 |
1269 | 800 | #define OHWA0_R4KEOP_CLEAN 0x00000002 |
1270 | | |
1271 | | /* Values for the xxx_size bytes of an ABI flags structure. */ |
1272 | | |
1273 | 150 | #define AFL_REG_NONE 0x00 /* No registers. */ |
1274 | 101 | #define AFL_REG_32 0x01 /* 32-bit registers. */ |
1275 | 92 | #define AFL_REG_64 0x02 /* 64-bit registers. */ |
1276 | 88 | #define AFL_REG_128 0x03 /* 128-bit registers. */ |
1277 | | |
1278 | | /* Masks for the ases word of an ABI flags structure. */ |
1279 | | |
1280 | 50 | #define AFL_ASE_DSP 0x00000001 /* DSP ASE. */ |
1281 | 50 | #define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */ |
1282 | 50 | #define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */ |
1283 | 50 | #define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */ |
1284 | 50 | #define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */ |
1285 | 50 | #define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */ |
1286 | 50 | #define AFL_ASE_MT 0x00000040 /* MT ASE. */ |
1287 | 50 | #define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */ |
1288 | 50 | #define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */ |
1289 | 50 | #define AFL_ASE_MSA 0x00000200 /* MSA ASE. */ |
1290 | 50 | #define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */ |
1291 | 50 | #define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */ |
1292 | 50 | #define AFL_ASE_XPA 0x00001000 /* XPA ASE. */ |
1293 | 50 | #define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */ |
1294 | 50 | #define AFL_ASE_MIPS16E2 0x00004000 /* MIPS16e2 ASE. */ |
1295 | 50 | #define AFL_ASE_CRC 0x00008000 /* CRC ASE. */ |
1296 | | #define AFL_ASE_RESERVED1 0x00010000 /* Reserved by MIPS Tech for WIP. */ |
1297 | 50 | #define AFL_ASE_GINV 0x00020000 /* GINV ASE. */ |
1298 | 50 | #define AFL_ASE_LOONGSON_MMI 0x00040000 /* Loongson MMI ASE. */ |
1299 | 50 | #define AFL_ASE_LOONGSON_CAM 0x00080000 /* Loongson CAM ASE. */ |
1300 | 50 | #define AFL_ASE_LOONGSON_EXT 0x00100000 /* Loongson EXT instructions. */ |
1301 | 50 | #define AFL_ASE_LOONGSON_EXT2 0x00200000 /* Loongson EXT2 instructions. */ |
1302 | 83 | #define AFL_ASE_MASK 0x003effff /* All ASEs. */ |
1303 | | |
1304 | | /* Values for the isa_ext word of an ABI flags structure. */ |
1305 | | |
1306 | 1 | #define AFL_EXT_XLR 1 /* RMI Xlr instruction. */ |
1307 | 1 | #define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */ |
1308 | 1 | #define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */ |
1309 | 1 | #define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */ |
1310 | 1 | #define AFL_EXT_5900 6 /* MIPS R5900 instruction. */ |
1311 | 1 | #define AFL_EXT_4650 7 /* MIPS R4650 instruction. */ |
1312 | 1 | #define AFL_EXT_4010 8 /* LSI R4010 instruction. */ |
1313 | 1 | #define AFL_EXT_4100 9 /* NEC VR4100 instruction. */ |
1314 | 1 | #define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */ |
1315 | 1 | #define AFL_EXT_10000 11 /* MIPS R10000 instruction. */ |
1316 | 1 | #define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */ |
1317 | 1 | #define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */ |
1318 | 1 | #define AFL_EXT_4120 14 /* NEC VR4120 instruction. */ |
1319 | 1 | #define AFL_EXT_5400 15 /* NEC VR5400 instruction. */ |
1320 | 2 | #define AFL_EXT_5500 16 /* NEC VR5500 instruction. */ |
1321 | 1 | #define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */ |
1322 | 1 | #define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */ |
1323 | 1 | #define AFL_EXT_OCTEON3 19 /* Cavium Networks Octeon3. */ |
1324 | 1 | #define AFL_EXT_INTERAPTIV_MR2 20 /* Imagination interAptiv MR2. */ |
1325 | | |
1326 | | /* Masks for the flags1 word of an ABI flags structure. */ |
1327 | 0 | #define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */ |
1328 | | |
1329 | | extern unsigned int bfd_mips_isa_ext (bfd *); |
1330 | | |
1331 | | |
1332 | | /* Object attribute tags. */ |
1333 | | enum |
1334 | | { |
1335 | | /* 0-3 are generic. */ |
1336 | | |
1337 | | /* Floating-point ABI used by this object file. */ |
1338 | | Tag_GNU_MIPS_ABI_FP = 4, |
1339 | | |
1340 | | /* MSA ABI used by this object file. */ |
1341 | | Tag_GNU_MIPS_ABI_MSA = 8, |
1342 | | }; |
1343 | | |
1344 | | /* Object attribute values. */ |
1345 | | enum |
1346 | | { |
1347 | | /* Values defined for Tag_GNU_MIPS_ABI_FP. */ |
1348 | | |
1349 | | /* Not tagged or not using any ABIs affected by the differences. */ |
1350 | | Val_GNU_MIPS_ABI_FP_ANY = 0, |
1351 | | |
1352 | | /* Using hard-float -mdouble-float. */ |
1353 | | Val_GNU_MIPS_ABI_FP_DOUBLE = 1, |
1354 | | |
1355 | | /* Using hard-float -msingle-float. */ |
1356 | | Val_GNU_MIPS_ABI_FP_SINGLE = 2, |
1357 | | |
1358 | | /* Using soft-float. */ |
1359 | | Val_GNU_MIPS_ABI_FP_SOFT = 3, |
1360 | | |
1361 | | /* Using -mips32r2 -mfp64. */ |
1362 | | Val_GNU_MIPS_ABI_FP_OLD_64 = 4, |
1363 | | |
1364 | | /* Using -mfpxx */ |
1365 | | Val_GNU_MIPS_ABI_FP_XX = 5, |
1366 | | |
1367 | | /* Using -mips32r2 -mfp64. */ |
1368 | | Val_GNU_MIPS_ABI_FP_64 = 6, |
1369 | | |
1370 | | /* Using -mips32r2 -mfp64 -mno-odd-spreg. */ |
1371 | | Val_GNU_MIPS_ABI_FP_64A = 7, |
1372 | | |
1373 | | /* This is reserved for backward-compatibility with an earlier |
1374 | | implementation of the MIPS NaN2008 functionality. */ |
1375 | | Val_GNU_MIPS_ABI_FP_NAN2008 = 8, |
1376 | | |
1377 | | /* Values defined for Tag_GNU_MIPS_ABI_MSA. */ |
1378 | | |
1379 | | /* Not tagged or not using any ABIs affected by the differences. */ |
1380 | | Val_GNU_MIPS_ABI_MSA_ANY = 0, |
1381 | | |
1382 | | /* Using 128-bit MSA. */ |
1383 | | Val_GNU_MIPS_ABI_MSA_128 = 1, |
1384 | | }; |
1385 | | |
1386 | | #ifdef __cplusplus |
1387 | | } |
1388 | | #endif |
1389 | | |
1390 | | #endif /* _ELF_MIPS_H */ |