/* KVX assembler/disassembler support.

   Copyright (C) 2009-2025 Free Software Foundation, Inc.

   Contributed by Kalray SA.

   This file is part of GNU Binutils.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 3 of the license, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with this program; see the file COPYING3. If not,

   see <http://www.gnu.org/licenses/>.  */

#ifndef OPCODE_KVX_H

#define OPCODE_KVX_H

#define KVXMAXSYLLABLES 3

#define KVXMAXOPERANDS 7

#define KVXMAXBUNDLEISSUE 6

#define KVXMAXBUNDLEWORDS 8

#define KVXNUMCORES 3

#define KVXNUMBUNDLINGS 19

/*

 * The following macros are provided for compatibility with old

 * code.  They should not be used in new code.

 */

/***********************************************/

/*       DATA TYPES                            */

/***********************************************/

/*  Operand definition -- used in building     */

/*  format table                               */

enum kvx_rel {

  /* Absolute relocation. */

  KVX_REL_ABS,

  /* PC relative relocation. */

  KVX_REL_PC,

  /* GP relative relocation. */

  KVX_REL_GP,

  /* TP relative relocation. */

  KVX_REL_TP,

  /* GOT relative relocation. */

  KVX_REL_GOT,

  /* BASE load address relative relocation. */

  KVX_REL_BASE,

};

struct kvx_reloc {

  /* Size in bits. */

  int bitsize;

  /* Type of relative relocation. */

  enum kvx_rel relative;

  /* Number of BFD relocations. */

  int reloc_nb;

  /* List of BFD relocations. */

  unsigned int relocs[];

};

struct kvx_bitfield {

  /* Number of bits.  */

  int size;

  /* Offset in abstract value.  */

  int from_offset;

  /* Offset in encoded value.  */

  int to_offset;

};

struct kvx_operand {

  /* Operand type name.  */

  const char *tname;

  /* Type of operand.  */

  int type;

  /* Width of the operand. */

  int width;

  /* Encoded value shift. */

  int shift;

  /* Encoded value bias.  */

  int bias;

  /* Can be SIGNED|CANEXTEND|BITMASK|WRAPPED.  */

  int flags;

  /* Number of registers.  */

  int reg_nb;

  /* Valid registers for this operand (if no register get null pointer).  */

  int *regs;

  /* Number of relocations.  */

  int reloc_nb;

  /* List of relocations that can be applied to this operand.  */

  struct kvx_reloc **relocs;

  /* Number of given bitfields.  */

  int bitfields;

  /* Bitfields in most to least significant order.  */

  struct kvx_bitfield bfield[];

};

struct kvx_pseudo_relocs

{

  enum

  {

    S32_LO5_UP27,

    S37_LO10_UP27,

    S43_LO10_UP27_EX6,

    S64_LO10_UP27_EX27,

    S16,

    S32,

    S64,

  } reloc_type;

  int bitsize;

  /* Used when pseudo func should expand to different relocations

     based on the 32/64 bits mode.

     Enum values should match the kvx_arch_size var set by -m32

   */

  enum

  {

    PSEUDO_ALL = 0,

    PSEUDO_32_ONLY = 32,

    PSEUDO_64_ONLY = 64,

  } avail_modes;

  /* set to 1 when pseudo func does not take an argument */

  int has_no_arg;

  bfd_reloc_code_real_type reloc_lo5, reloc_lo10, reloc_up27, reloc_ex;

  bfd_reloc_code_real_type single;

  struct kvx_reloc *kreloc;

};

struct symbol;

struct pseudo_func

{

  const char *name;

  struct symbol *sym;

  struct kvx_pseudo_relocs pseudo_relocs;

};

/* some flags for kvx_operand                                 */

/* kvxSIGNED    : is this operand treated as signed ?         */

/* kvxCANEXTEND : can this operand have an extension          */

/* kvxBITMASK   : this operand is a bit mask */

/* kvxWRAPPED   : this operand can accept signed and unsigned integer ranges */

#define kvxSIGNED    1

#define kvxCANEXTEND 2

#define kvxBITMASK   4

#define kvxWRAPPED   8

#define kvxOPCODE_FLAG_UNDEF 0

#define kvxOPCODE_FLAG_IMMX0 1

#define kvxOPCODE_FLAG_IMMX1 2

#define kvxOPCODE_FLAG_BCU 4

#define kvxOPCODE_FLAG_ALU 8

#define kvxOPCODE_FLAG_LSU 16

#define kvxOPCODE_FLAG_MAU 32

#define kvxOPCODE_FLAG_MODE64 64

#define kvxOPCODE_FLAG_MODE32 128

/* Opcode definition.  */

struct kvx_codeword {

  /* The opcode.  */

  unsigned opcode;

  /* Disassembly mask.  */

  unsigned mask;

  /* Target dependent flags.  */

  unsigned flags;

};

struct kvxopc {

  /* asm name */

  const char  *as_op;

  /* 32 bits code words. */

  struct kvx_codeword codewords[KVXMAXSYLLABLES];

  /* Number of words in codewords[].  */

  int wordcount;

  /* coding size in case of variable length.  */

  unsigned coding_size;

  /* Bundling class.  */

  int bundling;

  /* Reservation class.  */

  int reservation;

  /* 0 terminated.  */

  struct kvx_operand *format[KVXMAXOPERANDS + 1];

  /* Resource class.  */

  const char *rclass;

  /* Formating string.  */

  const char *fmtstring;

};

struct kvx_core_info {

  struct kvxopc *optab;

  const char *name;

  const int *resources;

  int elf_core;

  struct pseudo_func *pseudo_funcs;

  int nb_pseudo_funcs;

  int **reservation_table_table;

  int reservation_table_lines;

  int resource_max;

  char **resource_names;

};

struct kvx_Register {

  int id;

  const char *name;

};

extern const int kvx_kv3_v1_reservation_table_lines;

extern const int *kvx_kv3_v1_reservation_table_table[];

extern const char *kvx_kv3_v1_resource_names[];

extern const int kvx_kv3_v1_resources[];

extern struct kvxopc kvx_kv3_v1_optab[];

extern const struct kvx_core_info kvx_kv3_v1_core_info;

extern const int kvx_kv3_v2_reservation_table_lines;

extern const int *kvx_kv3_v2_reservation_table_table[];

extern const char *kvx_kv3_v2_resource_names[];

extern const int kvx_kv3_v2_resources[];

extern struct kvxopc kvx_kv3_v2_optab[];

extern const struct kvx_core_info kvx_kv3_v2_core_info;

extern const int kvx_kv4_v1_reservation_table_lines;

extern const int *kvx_kv4_v1_reservation_table_table[];

extern const char *kvx_kv4_v1_resource_names[];

extern const int kvx_kv4_v1_resources[];

extern struct kvxopc kvx_kv4_v1_optab[];

extern const struct kvx_core_info kvx_kv4_v1_core_info;

extern const struct kvx_core_info *kvx_core_info_table[];

extern const char ***kvx_modifiers_table[];

extern const struct kvx_Register *kvx_registers_table[];

extern const int *kvx_regfiles_table[];

#define KVX_REGFILE_FIRST_GPR 0

#define KVX_REGFILE_LAST_GPR 1

#define KVX_REGFILE_DEC_GPR 2

#define KVX_REGFILE_FIRST_PGR 3

#define KVX_REGFILE_LAST_PGR 4

#define KVX_REGFILE_DEC_PGR 5

#define KVX_REGFILE_FIRST_QGR 6

#define KVX_REGFILE_LAST_QGR 7

#define KVX_REGFILE_DEC_QGR 8

#define KVX_REGFILE_FIRST_SFR 9

#define KVX_REGFILE_LAST_SFR 10

#define KVX_REGFILE_DEC_SFR 11

#define KVX_REGFILE_FIRST_X16R 12

#define KVX_REGFILE_LAST_X16R 13

#define KVX_REGFILE_DEC_X16R 14

#define KVX_REGFILE_FIRST_X2R 15

#define KVX_REGFILE_LAST_X2R 16

#define KVX_REGFILE_DEC_X2R 17

#define KVX_REGFILE_FIRST_X32R 18

#define KVX_REGFILE_LAST_X32R 19

#define KVX_REGFILE_DEC_X32R 20

#define KVX_REGFILE_FIRST_X4R 21

#define KVX_REGFILE_LAST_X4R 22

#define KVX_REGFILE_DEC_X4R 23

#define KVX_REGFILE_FIRST_X64R 24

#define KVX_REGFILE_LAST_X64R 25

#define KVX_REGFILE_DEC_X64R 26

#define KVX_REGFILE_FIRST_X8R 27

#define KVX_REGFILE_LAST_X8R 28

#define KVX_REGFILE_DEC_X8R 29

#define KVX_REGFILE_FIRST_XBR 30

#define KVX_REGFILE_LAST_XBR 31

#define KVX_REGFILE_DEC_XBR 32

#define KVX_REGFILE_FIRST_XCR 33

#define KVX_REGFILE_LAST_XCR 34

#define KVX_REGFILE_DEC_XCR 35

#define KVX_REGFILE_FIRST_XMR 36

#define KVX_REGFILE_LAST_XMR 37

#define KVX_REGFILE_DEC_XMR 38

#define KVX_REGFILE_FIRST_XTR 39

#define KVX_REGFILE_LAST_XTR 40

#define KVX_REGFILE_DEC_XTR 41

#define KVX_REGFILE_FIRST_XVR 42

#define KVX_REGFILE_LAST_XVR 43

#define KVX_REGFILE_DEC_XVR 44

#define KVX_REGFILE_REGISTERS 45

#define KVX_REGFILE_DEC_REGISTERS 46

extern int kvx_kv3_v1_regfiles[];

extern const char **kvx_kv3_v1_modifiers[];

extern struct kvx_Register kvx_kv3_v1_registers[];

extern int kvx_kv3_v1_dec_registers[];

enum Method_kvx_kv3_v1_enum {

  Immediate_kv3_v1_pcrel17 = 1,

  Immediate_kv3_v1_pcrel27 = 2,

  Immediate_kv3_v1_signed10 = 3,

  Immediate_kv3_v1_signed16 = 4,

  Immediate_kv3_v1_signed27 = 5,

  Immediate_kv3_v1_signed37 = 6,

  Immediate_kv3_v1_signed43 = 7,

  Immediate_kv3_v1_signed54 = 8,

  Immediate_kv3_v1_sysnumber = 9,

  Immediate_kv3_v1_unsigned6 = 10,

  Immediate_kv3_v1_wrapped32 = 11,

  Immediate_kv3_v1_wrapped64 = 12,

  Modifier_kv3_v1_column = 13,

  Modifier_kv3_v1_comparison = 14,

  Modifier_kv3_v1_doscale = 15,

  Modifier_kv3_v1_exunum = 16,

  Modifier_kv3_v1_floatcomp = 17,

  Modifier_kv3_v1_qindex = 18,

  Modifier_kv3_v1_rectify = 19,

  Modifier_kv3_v1_rounding = 20,

  Modifier_kv3_v1_roundint = 21,

  Modifier_kv3_v1_saturate = 22,

  Modifier_kv3_v1_scalarcond = 23,

  Modifier_kv3_v1_silent = 24,

  Modifier_kv3_v1_simplecond = 25,

  Modifier_kv3_v1_speculate = 26,

  Modifier_kv3_v1_splat32 = 27,

  Modifier_kv3_v1_variant = 28,

  RegClass_kv3_v1_aloneReg = 29,

  RegClass_kv3_v1_blockReg = 30,

  RegClass_kv3_v1_blockReg0M4 = 31,

  RegClass_kv3_v1_blockReg1M4 = 32,

  RegClass_kv3_v1_blockReg2M4 = 33,

  RegClass_kv3_v1_blockReg3M4 = 34,

  RegClass_kv3_v1_blockRegE = 35,

  RegClass_kv3_v1_blockRegO = 36,

  RegClass_kv3_v1_blockReg_0 = 37,

  RegClass_kv3_v1_blockReg_1 = 38,

  RegClass_kv3_v1_buffer16Reg = 39,

  RegClass_kv3_v1_buffer2Reg = 40,

  RegClass_kv3_v1_buffer32Reg = 41,

  RegClass_kv3_v1_buffer4Reg = 42,

  RegClass_kv3_v1_buffer64Reg = 43,

  RegClass_kv3_v1_buffer8Reg = 44,

  RegClass_kv3_v1_coproReg = 45,

  RegClass_kv3_v1_coproReg0M4 = 46,

  RegClass_kv3_v1_coproReg1M4 = 47,

  RegClass_kv3_v1_coproReg2M4 = 48,

  RegClass_kv3_v1_coproReg3M4 = 49,

  RegClass_kv3_v1_matrixReg = 50,

  RegClass_kv3_v1_matrixReg_0 = 51,

  RegClass_kv3_v1_matrixReg_1 = 52,

  RegClass_kv3_v1_matrixReg_2 = 53,

  RegClass_kv3_v1_matrixReg_3 = 54,

  RegClass_kv3_v1_onlyfxReg = 55,

  RegClass_kv3_v1_onlygetReg = 56,

  RegClass_kv3_v1_onlyraReg = 57,

  RegClass_kv3_v1_onlysetReg = 58,

  RegClass_kv3_v1_onlyswapReg = 59,

  RegClass_kv3_v1_pairedReg = 60,

  RegClass_kv3_v1_pairedReg_0 = 61,

  RegClass_kv3_v1_pairedReg_1 = 62,

  RegClass_kv3_v1_quadReg = 63,

  RegClass_kv3_v1_quadReg_0 = 64,

  RegClass_kv3_v1_quadReg_1 = 65,

  RegClass_kv3_v1_quadReg_2 = 66,

  RegClass_kv3_v1_quadReg_3 = 67,

  RegClass_kv3_v1_singleReg = 68,

  RegClass_kv3_v1_systemReg = 69,

  RegClass_kv3_v1_tileReg = 70,

  RegClass_kv3_v1_tileReg_0 = 71,

  RegClass_kv3_v1_tileReg_1 = 72,

  RegClass_kv3_v1_vectorReg = 73,

  RegClass_kv3_v1_vectorRegE = 74,

  RegClass_kv3_v1_vectorRegO = 75,

  RegClass_kv3_v1_vectorReg_0 = 76,

  RegClass_kv3_v1_vectorReg_1 = 77,

  RegClass_kv3_v1_vectorReg_2 = 78,

  RegClass_kv3_v1_vectorReg_3 = 79,

  Instruction_kv3_v1_abdd = 80,

  Instruction_kv3_v1_abdhq = 81,

  Instruction_kv3_v1_abdw = 82,

  Instruction_kv3_v1_abdwp = 83,

  Instruction_kv3_v1_absd = 84,

  Instruction_kv3_v1_abshq = 85,

  Instruction_kv3_v1_absw = 86,

  Instruction_kv3_v1_abswp = 87,

  Instruction_kv3_v1_acswapd = 88,

  Instruction_kv3_v1_acswapw = 89,

  Instruction_kv3_v1_addcd = 90,

  Instruction_kv3_v1_addcd_i = 91,

  Instruction_kv3_v1_addd = 92,

  Instruction_kv3_v1_addhcp_c = 93,

  Instruction_kv3_v1_addhq = 94,

  Instruction_kv3_v1_addsd = 95,

  Instruction_kv3_v1_addshq = 96,

  Instruction_kv3_v1_addsw = 97,

  Instruction_kv3_v1_addswp = 98,

  Instruction_kv3_v1_adduwd = 99,

  Instruction_kv3_v1_addw = 100,

  Instruction_kv3_v1_addwc_c = 101,

  Instruction_kv3_v1_addwd = 102,

  Instruction_kv3_v1_addwp = 103,

  Instruction_kv3_v1_addx16d = 104,

  Instruction_kv3_v1_addx16hq = 105,

  Instruction_kv3_v1_addx16uwd = 106,

  Instruction_kv3_v1_addx16w = 107,

  Instruction_kv3_v1_addx16wd = 108,

  Instruction_kv3_v1_addx16wp = 109,

  Instruction_kv3_v1_addx2d = 110,

  Instruction_kv3_v1_addx2hq = 111,

  Instruction_kv3_v1_addx2uwd = 112,

  Instruction_kv3_v1_addx2w = 113,

  Instruction_kv3_v1_addx2wd = 114,

  Instruction_kv3_v1_addx2wp = 115,

  Instruction_kv3_v1_addx4d = 116,

  Instruction_kv3_v1_addx4hq = 117,

  Instruction_kv3_v1_addx4uwd = 118,

  Instruction_kv3_v1_addx4w = 119,

  Instruction_kv3_v1_addx4wd = 120,

  Instruction_kv3_v1_addx4wp = 121,

  Instruction_kv3_v1_addx8d = 122,

  Instruction_kv3_v1_addx8hq = 123,

  Instruction_kv3_v1_addx8uwd = 124,

  Instruction_kv3_v1_addx8w = 125,

  Instruction_kv3_v1_addx8wd = 126,

  Instruction_kv3_v1_addx8wp = 127,

  Instruction_kv3_v1_aladdd = 128,

  Instruction_kv3_v1_aladdw = 129,

  Instruction_kv3_v1_alclrd = 130,

  Instruction_kv3_v1_alclrw = 131,

  Instruction_kv3_v1_aligno = 132,

  Instruction_kv3_v1_alignv = 133,

  Instruction_kv3_v1_andd = 134,

  Instruction_kv3_v1_andnd = 135,

  Instruction_kv3_v1_andnw = 136,

  Instruction_kv3_v1_andw = 137,

  Instruction_kv3_v1_avghq = 138,

  Instruction_kv3_v1_avgrhq = 139,

  Instruction_kv3_v1_avgruhq = 140,

  Instruction_kv3_v1_avgruw = 141,

  Instruction_kv3_v1_avgruwp = 142,

  Instruction_kv3_v1_avgrw = 143,

  Instruction_kv3_v1_avgrwp = 144,

  Instruction_kv3_v1_avguhq = 145,

  Instruction_kv3_v1_avguw = 146,

  Instruction_kv3_v1_avguwp = 147,

  Instruction_kv3_v1_avgw = 148,

  Instruction_kv3_v1_avgwp = 149,

  Instruction_kv3_v1_await = 150,

  Instruction_kv3_v1_barrier = 151,

  Instruction_kv3_v1_call = 152,

  Instruction_kv3_v1_cb = 153,

  Instruction_kv3_v1_cbsd = 154,

  Instruction_kv3_v1_cbsw = 155,

  Instruction_kv3_v1_cbswp = 156,

  Instruction_kv3_v1_clrf = 157,

  Instruction_kv3_v1_clsd = 158,

  Instruction_kv3_v1_clsw = 159,

  Instruction_kv3_v1_clswp = 160,

  Instruction_kv3_v1_clzd = 161,

  Instruction_kv3_v1_clzw = 162,

  Instruction_kv3_v1_clzwp = 163,

  Instruction_kv3_v1_cmoved = 164,

  Instruction_kv3_v1_cmovehq = 165,

  Instruction_kv3_v1_cmovewp = 166,

  Instruction_kv3_v1_cmuldt = 167,

  Instruction_kv3_v1_cmulghxdt = 168,

  Instruction_kv3_v1_cmulglxdt = 169,

  Instruction_kv3_v1_cmulgmxdt = 170,

  Instruction_kv3_v1_cmulxdt = 171,

  Instruction_kv3_v1_compd = 172,

  Instruction_kv3_v1_compnhq = 173,

  Instruction_kv3_v1_compnwp = 174,

  Instruction_kv3_v1_compuwd = 175,

  Instruction_kv3_v1_compw = 176,

  Instruction_kv3_v1_compwd = 177,

  Instruction_kv3_v1_convdhv0 = 178,

  Instruction_kv3_v1_convdhv1 = 179,

  Instruction_kv3_v1_convwbv0 = 180,

  Instruction_kv3_v1_convwbv1 = 181,

  Instruction_kv3_v1_convwbv2 = 182,

  Instruction_kv3_v1_convwbv3 = 183,

  Instruction_kv3_v1_copyd = 184,

  Instruction_kv3_v1_copyo = 185,

  Instruction_kv3_v1_copyq = 186,

  Instruction_kv3_v1_copyw = 187,

  Instruction_kv3_v1_crcbellw = 188,

  Instruction_kv3_v1_crcbelmw = 189,

  Instruction_kv3_v1_crclellw = 190,

  Instruction_kv3_v1_crclelmw = 191,

  Instruction_kv3_v1_ctzd = 192,

  Instruction_kv3_v1_ctzw = 193,

  Instruction_kv3_v1_ctzwp = 194,

  Instruction_kv3_v1_d1inval = 195,

  Instruction_kv3_v1_dinvall = 196,

  Instruction_kv3_v1_dot2suwd = 197,

  Instruction_kv3_v1_dot2suwdp = 198,

  Instruction_kv3_v1_dot2uwd = 199,

  Instruction_kv3_v1_dot2uwdp = 200,

  Instruction_kv3_v1_dot2w = 201,

  Instruction_kv3_v1_dot2wd = 202,

  Instruction_kv3_v1_dot2wdp = 203,

  Instruction_kv3_v1_dot2wzp = 204,

  Instruction_kv3_v1_dtouchl = 205,

  Instruction_kv3_v1_dzerol = 206,

  Instruction_kv3_v1_eord = 207,

  Instruction_kv3_v1_eorw = 208,

  Instruction_kv3_v1_errop = 209,

  Instruction_kv3_v1_extfs = 210,

  Instruction_kv3_v1_extfz = 211,

  Instruction_kv3_v1_fabsd = 212,

  Instruction_kv3_v1_fabshq = 213,

  Instruction_kv3_v1_fabsw = 214,

  Instruction_kv3_v1_fabswp = 215,

  Instruction_kv3_v1_faddd = 216,

  Instruction_kv3_v1_fadddc = 217,

  Instruction_kv3_v1_fadddc_c = 218,

  Instruction_kv3_v1_fadddp = 219,

  Instruction_kv3_v1_faddhq = 220,

  Instruction_kv3_v1_faddw = 221,

  Instruction_kv3_v1_faddwc = 222,

  Instruction_kv3_v1_faddwc_c = 223,

  Instruction_kv3_v1_faddwcp = 224,

  Instruction_kv3_v1_faddwcp_c = 225,

  Instruction_kv3_v1_faddwp = 226,

  Instruction_kv3_v1_faddwq = 227,

  Instruction_kv3_v1_fcdivd = 228,

  Instruction_kv3_v1_fcdivw = 229,

  Instruction_kv3_v1_fcdivwp = 230,

  Instruction_kv3_v1_fcompd = 231,

  Instruction_kv3_v1_fcompnhq = 232,

  Instruction_kv3_v1_fcompnwp = 233,

  Instruction_kv3_v1_fcompw = 234,

  Instruction_kv3_v1_fdot2w = 235,

  Instruction_kv3_v1_fdot2wd = 236,

  Instruction_kv3_v1_fdot2wdp = 237,

  Instruction_kv3_v1_fdot2wzp = 238,

  Instruction_kv3_v1_fence = 239,

  Instruction_kv3_v1_ffmad = 240,

  Instruction_kv3_v1_ffmahq = 241,

  Instruction_kv3_v1_ffmahw = 242,

  Instruction_kv3_v1_ffmahwq = 243,

  Instruction_kv3_v1_ffmaw = 244,

  Instruction_kv3_v1_ffmawd = 245,

  Instruction_kv3_v1_ffmawdp = 246,

  Instruction_kv3_v1_ffmawp = 247,

  Instruction_kv3_v1_ffmsd = 248,

  Instruction_kv3_v1_ffmshq = 249,

  Instruction_kv3_v1_ffmshw = 250,

  Instruction_kv3_v1_ffmshwq = 251,

  Instruction_kv3_v1_ffmsw = 252,

  Instruction_kv3_v1_ffmswd = 253,

  Instruction_kv3_v1_ffmswdp = 254,

  Instruction_kv3_v1_ffmswp = 255,

  Instruction_kv3_v1_fixedd = 256,

  Instruction_kv3_v1_fixedud = 257,

  Instruction_kv3_v1_fixeduw = 258,

  Instruction_kv3_v1_fixeduwp = 259,

  Instruction_kv3_v1_fixedw = 260,

  Instruction_kv3_v1_fixedwp = 261,

  Instruction_kv3_v1_floatd = 262,

  Instruction_kv3_v1_floatud = 263,

  Instruction_kv3_v1_floatuw = 264,

  Instruction_kv3_v1_floatuwp = 265,

  Instruction_kv3_v1_floatw = 266,

  Instruction_kv3_v1_floatwp = 267,

  Instruction_kv3_v1_fmaxd = 268,

  Instruction_kv3_v1_fmaxhq = 269,

  Instruction_kv3_v1_fmaxw = 270,

  Instruction_kv3_v1_fmaxwp = 271,

  Instruction_kv3_v1_fmind = 272,

  Instruction_kv3_v1_fminhq = 273,

  Instruction_kv3_v1_fminw = 274,

  Instruction_kv3_v1_fminwp = 275,

  Instruction_kv3_v1_fmm212w = 276,

  Instruction_kv3_v1_fmma212w = 277,

  Instruction_kv3_v1_fmma242hw0 = 278,

  Instruction_kv3_v1_fmma242hw1 = 279,

  Instruction_kv3_v1_fmma242hw2 = 280,

  Instruction_kv3_v1_fmma242hw3 = 281,

  Instruction_kv3_v1_fmms212w = 282,

  Instruction_kv3_v1_fmuld = 283,

  Instruction_kv3_v1_fmulhq = 284,

  Instruction_kv3_v1_fmulhw = 285,

  Instruction_kv3_v1_fmulhwq = 286,

  Instruction_kv3_v1_fmulw = 287,

  Instruction_kv3_v1_fmulwc = 288,

  Instruction_kv3_v1_fmulwc_c = 289,

  Instruction_kv3_v1_fmulwd = 290,

  Instruction_kv3_v1_fmulwdc = 291,

  Instruction_kv3_v1_fmulwdc_c = 292,

  Instruction_kv3_v1_fmulwdp = 293,

  Instruction_kv3_v1_fmulwp = 294,

  Instruction_kv3_v1_fmulwq = 295,

  Instruction_kv3_v1_fnarrow44wh = 296,

  Instruction_kv3_v1_fnarrowdw = 297,

  Instruction_kv3_v1_fnarrowdwp = 298,

  Instruction_kv3_v1_fnarrowwh = 299,

  Instruction_kv3_v1_fnarrowwhq = 300,

  Instruction_kv3_v1_fnegd = 301,

  Instruction_kv3_v1_fneghq = 302,

  Instruction_kv3_v1_fnegw = 303,

  Instruction_kv3_v1_fnegwp = 304,

  Instruction_kv3_v1_frecw = 305,

  Instruction_kv3_v1_frsrw = 306,

  Instruction_kv3_v1_fsbfd = 307,

  Instruction_kv3_v1_fsbfdc = 308,

  Instruction_kv3_v1_fsbfdc_c = 309,

  Instruction_kv3_v1_fsbfdp = 310,

  Instruction_kv3_v1_fsbfhq = 311,

  Instruction_kv3_v1_fsbfw = 312,

  Instruction_kv3_v1_fsbfwc = 313,

  Instruction_kv3_v1_fsbfwc_c = 314,

  Instruction_kv3_v1_fsbfwcp = 315,

  Instruction_kv3_v1_fsbfwcp_c = 316,

  Instruction_kv3_v1_fsbfwp = 317,

  Instruction_kv3_v1_fsbfwq = 318,

  Instruction_kv3_v1_fscalewv = 319,

  Instruction_kv3_v1_fsdivd = 320,

  Instruction_kv3_v1_fsdivw = 321,

  Instruction_kv3_v1_fsdivwp = 322,

  Instruction_kv3_v1_fsrecd = 323,

  Instruction_kv3_v1_fsrecw = 324,

  Instruction_kv3_v1_fsrecwp = 325,

  Instruction_kv3_v1_fsrsrd = 326,

  Instruction_kv3_v1_fsrsrw = 327,

  Instruction_kv3_v1_fsrsrwp = 328,

  Instruction_kv3_v1_fwidenlhw = 329,

  Instruction_kv3_v1_fwidenlhwp = 330,

  Instruction_kv3_v1_fwidenlwd = 331,

  Instruction_kv3_v1_fwidenmhw = 332,

  Instruction_kv3_v1_fwidenmhwp = 333,

  Instruction_kv3_v1_fwidenmwd = 334,

  Instruction_kv3_v1_get = 335,

  Instruction_kv3_v1_goto = 336,

  Instruction_kv3_v1_i1inval = 337,

  Instruction_kv3_v1_i1invals = 338,

  Instruction_kv3_v1_icall = 339,

  Instruction_kv3_v1_iget = 340,

  Instruction_kv3_v1_igoto = 341,

  Instruction_kv3_v1_insf = 342,

  Instruction_kv3_v1_iord = 343,

  Instruction_kv3_v1_iornd = 344,

  Instruction_kv3_v1_iornw = 345,

  Instruction_kv3_v1_iorw = 346,

  Instruction_kv3_v1_landd = 347,

  Instruction_kv3_v1_landhq = 348,

  Instruction_kv3_v1_landw = 349,

  Instruction_kv3_v1_landwp = 350,

  Instruction_kv3_v1_lbs = 351,

  Instruction_kv3_v1_lbz = 352,

  Instruction_kv3_v1_ld = 353,

  Instruction_kv3_v1_lhs = 354,

  Instruction_kv3_v1_lhz = 355,

  Instruction_kv3_v1_liord = 356,

  Instruction_kv3_v1_liorhq = 357,

  Instruction_kv3_v1_liorw = 358,

  Instruction_kv3_v1_liorwp = 359,

  Instruction_kv3_v1_lnandd = 360,

  Instruction_kv3_v1_lnandhq = 361,

  Instruction_kv3_v1_lnandw = 362,

  Instruction_kv3_v1_lnandwp = 363,

  Instruction_kv3_v1_lniord = 364,

  Instruction_kv3_v1_lniorhq = 365,

  Instruction_kv3_v1_lniorw = 366,

  Instruction_kv3_v1_lniorwp = 367,

  Instruction_kv3_v1_lnord = 368,

  Instruction_kv3_v1_lnorhq = 369,

  Instruction_kv3_v1_lnorw = 370,

  Instruction_kv3_v1_lnorwp = 371,

  Instruction_kv3_v1_lo = 372,

  Instruction_kv3_v1_loopdo = 373,

  Instruction_kv3_v1_lord = 374,

  Instruction_kv3_v1_lorhq = 375,

  Instruction_kv3_v1_lorw = 376,

  Instruction_kv3_v1_lorwp = 377,

  Instruction_kv3_v1_lq = 378,

  Instruction_kv3_v1_lws = 379,

  Instruction_kv3_v1_lwz = 380,

  Instruction_kv3_v1_maddd = 381,

  Instruction_kv3_v1_madddt = 382,

  Instruction_kv3_v1_maddhq = 383,

  Instruction_kv3_v1_maddhwq = 384,

  Instruction_kv3_v1_maddsudt = 385,

  Instruction_kv3_v1_maddsuhwq = 386,

  Instruction_kv3_v1_maddsuwd = 387,

  Instruction_kv3_v1_maddsuwdp = 388,

  Instruction_kv3_v1_maddudt = 389,

  Instruction_kv3_v1_madduhwq = 390,

  Instruction_kv3_v1_madduwd = 391,

  Instruction_kv3_v1_madduwdp = 392,

  Instruction_kv3_v1_madduzdt = 393,

  Instruction_kv3_v1_maddw = 394,

  Instruction_kv3_v1_maddwd = 395,

  Instruction_kv3_v1_maddwdp = 396,

  Instruction_kv3_v1_maddwp = 397,

  Instruction_kv3_v1_make = 398,

  Instruction_kv3_v1_maxd = 399,

  Instruction_kv3_v1_maxhq = 400,

  Instruction_kv3_v1_maxud = 401,

  Instruction_kv3_v1_maxuhq = 402,

  Instruction_kv3_v1_maxuw = 403,

  Instruction_kv3_v1_maxuwp = 404,

  Instruction_kv3_v1_maxw = 405,

  Instruction_kv3_v1_maxwp = 406,

  Instruction_kv3_v1_mind = 407,

  Instruction_kv3_v1_minhq = 408,

  Instruction_kv3_v1_minud = 409,

  Instruction_kv3_v1_minuhq = 410,

  Instruction_kv3_v1_minuw = 411,

  Instruction_kv3_v1_minuwp = 412,

  Instruction_kv3_v1_minw = 413,

  Instruction_kv3_v1_minwp = 414,

  Instruction_kv3_v1_mm212w = 415,

  Instruction_kv3_v1_mma212w = 416,

  Instruction_kv3_v1_mma444hbd0 = 417,

  Instruction_kv3_v1_mma444hbd1 = 418,

  Instruction_kv3_v1_mma444hd = 419,

  Instruction_kv3_v1_mma444suhbd0 = 420,

  Instruction_kv3_v1_mma444suhbd1 = 421,

  Instruction_kv3_v1_mma444suhd = 422,

  Instruction_kv3_v1_mma444uhbd0 = 423,

  Instruction_kv3_v1_mma444uhbd1 = 424,

  Instruction_kv3_v1_mma444uhd = 425,

  Instruction_kv3_v1_mma444ushbd0 = 426,

  Instruction_kv3_v1_mma444ushbd1 = 427,

  Instruction_kv3_v1_mma444ushd = 428,

  Instruction_kv3_v1_mms212w = 429,

  Instruction_kv3_v1_movetq = 430,

  Instruction_kv3_v1_msbfd = 431,

  Instruction_kv3_v1_msbfdt = 432,

  Instruction_kv3_v1_msbfhq = 433,

  Instruction_kv3_v1_msbfhwq = 434,

  Instruction_kv3_v1_msbfsudt = 435,

  Instruction_kv3_v1_msbfsuhwq = 436,

  Instruction_kv3_v1_msbfsuwd = 437,

  Instruction_kv3_v1_msbfsuwdp = 438,

  Instruction_kv3_v1_msbfudt = 439,

  Instruction_kv3_v1_msbfuhwq = 440,

  Instruction_kv3_v1_msbfuwd = 441,

  Instruction_kv3_v1_msbfuwdp = 442,

  Instruction_kv3_v1_msbfuzdt = 443,

  Instruction_kv3_v1_msbfw = 444,

  Instruction_kv3_v1_msbfwd = 445,

  Instruction_kv3_v1_msbfwdp = 446,

  Instruction_kv3_v1_msbfwp = 447,

  Instruction_kv3_v1_muld = 448,

  Instruction_kv3_v1_muldt = 449,

  Instruction_kv3_v1_mulhq = 450,

  Instruction_kv3_v1_mulhwq = 451,

  Instruction_kv3_v1_mulsudt = 452,

  Instruction_kv3_v1_mulsuhwq = 453,

  Instruction_kv3_v1_mulsuwd = 454,

  Instruction_kv3_v1_mulsuwdp = 455,

  Instruction_kv3_v1_muludt = 456,

  Instruction_kv3_v1_muluhwq = 457,

  Instruction_kv3_v1_muluwd = 458,

  Instruction_kv3_v1_muluwdp = 459,

  Instruction_kv3_v1_mulw = 460,

  Instruction_kv3_v1_mulwc = 461,

  Instruction_kv3_v1_mulwc_c = 462,

  Instruction_kv3_v1_mulwd = 463,

  Instruction_kv3_v1_mulwdc = 464,

  Instruction_kv3_v1_mulwdc_c = 465,

  Instruction_kv3_v1_mulwdp = 466,

  Instruction_kv3_v1_mulwp = 467,

  Instruction_kv3_v1_mulwq = 468,

  Instruction_kv3_v1_nandd = 469,

  Instruction_kv3_v1_nandw = 470,

  Instruction_kv3_v1_negd = 471,

  Instruction_kv3_v1_neghq = 472,

  Instruction_kv3_v1_negw = 473,

  Instruction_kv3_v1_negwp = 474,

  Instruction_kv3_v1_neord = 475,

  Instruction_kv3_v1_neorw = 476,

  Instruction_kv3_v1_niord = 477,

  Instruction_kv3_v1_niorw = 478,

  Instruction_kv3_v1_nop = 479,

  Instruction_kv3_v1_nord = 480,

  Instruction_kv3_v1_norw = 481,

  Instruction_kv3_v1_notd = 482,

  Instruction_kv3_v1_notw = 483,

  Instruction_kv3_v1_nxord = 484,

  Instruction_kv3_v1_nxorw = 485,

  Instruction_kv3_v1_ord = 486,

  Instruction_kv3_v1_ornd = 487,

  Instruction_kv3_v1_ornw = 488,

  Instruction_kv3_v1_orw = 489,

  Instruction_kv3_v1_pcrel = 490,

  Instruction_kv3_v1_ret = 491,

  Instruction_kv3_v1_rfe = 492,

  Instruction_kv3_v1_rolw = 493,

  Instruction_kv3_v1_rolwps = 494,

  Instruction_kv3_v1_rorw = 495,

  Instruction_kv3_v1_rorwps = 496,

  Instruction_kv3_v1_rswap = 497,

  Instruction_kv3_v1_satd = 498,

  Instruction_kv3_v1_satdh = 499,

  Instruction_kv3_v1_satdw = 500,

  Instruction_kv3_v1_sb = 501,

  Instruction_kv3_v1_sbfcd = 502,

  Instruction_kv3_v1_sbfcd_i = 503,

  Instruction_kv3_v1_sbfd = 504,

  Instruction_kv3_v1_sbfhcp_c = 505,

  Instruction_kv3_v1_sbfhq = 506,

  Instruction_kv3_v1_sbfsd = 507,

  Instruction_kv3_v1_sbfshq = 508,

  Instruction_kv3_v1_sbfsw = 509,

  Instruction_kv3_v1_sbfswp = 510,

  Instruction_kv3_v1_sbfuwd = 511,

  Instruction_kv3_v1_sbfw = 512,

  Instruction_kv3_v1_sbfwc_c = 513,

  Instruction_kv3_v1_sbfwd = 514,

  Instruction_kv3_v1_sbfwp = 515,

  Instruction_kv3_v1_sbfx16d = 516,

  Instruction_kv3_v1_sbfx16hq = 517,

  Instruction_kv3_v1_sbfx16uwd = 518,

  Instruction_kv3_v1_sbfx16w = 519,

  Instruction_kv3_v1_sbfx16wd = 520,

  Instruction_kv3_v1_sbfx16wp = 521,

  Instruction_kv3_v1_sbfx2d = 522,

  Instruction_kv3_v1_sbfx2hq = 523,

  Instruction_kv3_v1_sbfx2uwd = 524,

  Instruction_kv3_v1_sbfx2w = 525,

  Instruction_kv3_v1_sbfx2wd = 526,

  Instruction_kv3_v1_sbfx2wp = 527,

  Instruction_kv3_v1_sbfx4d = 528,

  Instruction_kv3_v1_sbfx4hq = 529,

  Instruction_kv3_v1_sbfx4uwd = 530,

  Instruction_kv3_v1_sbfx4w = 531,

  Instruction_kv3_v1_sbfx4wd = 532,

  Instruction_kv3_v1_sbfx4wp = 533,

  Instruction_kv3_v1_sbfx8d = 534,

  Instruction_kv3_v1_sbfx8hq = 535,

  Instruction_kv3_v1_sbfx8uwd = 536,

  Instruction_kv3_v1_sbfx8w = 537,

  Instruction_kv3_v1_sbfx8wd = 538,

  Instruction_kv3_v1_sbfx8wp = 539,

  Instruction_kv3_v1_sbmm8 = 540,

  Instruction_kv3_v1_sbmmt8 = 541,

  Instruction_kv3_v1_scall = 542,

  Instruction_kv3_v1_sd = 543,

  Instruction_kv3_v1_set = 544,

  Instruction_kv3_v1_sh = 545,

  Instruction_kv3_v1_sleep = 546,

  Instruction_kv3_v1_slld = 547,

  Instruction_kv3_v1_sllhqs = 548,

  Instruction_kv3_v1_sllw = 549,

  Instruction_kv3_v1_sllwps = 550,

  Instruction_kv3_v1_slsd = 551,

  Instruction_kv3_v1_slshqs = 552,

  Instruction_kv3_v1_slsw = 553,

  Instruction_kv3_v1_slswps = 554,

  Instruction_kv3_v1_so = 555,

  Instruction_kv3_v1_sq = 556,

  Instruction_kv3_v1_srad = 557,

  Instruction_kv3_v1_srahqs = 558,

  Instruction_kv3_v1_sraw = 559,

  Instruction_kv3_v1_srawps = 560,

  Instruction_kv3_v1_srld = 561,

  Instruction_kv3_v1_srlhqs = 562,

  Instruction_kv3_v1_srlw = 563,

  Instruction_kv3_v1_srlwps = 564,

  Instruction_kv3_v1_srsd = 565,

  Instruction_kv3_v1_srshqs = 566,

  Instruction_kv3_v1_srsw = 567,

  Instruction_kv3_v1_srswps = 568,

  Instruction_kv3_v1_stop = 569,

  Instruction_kv3_v1_stsud = 570,

  Instruction_kv3_v1_stsuw = 571,

  Instruction_kv3_v1_sw = 572,

  Instruction_kv3_v1_sxbd = 573,

  Instruction_kv3_v1_sxhd = 574,

  Instruction_kv3_v1_sxlbhq = 575,

  Instruction_kv3_v1_sxlhwp = 576,

  Instruction_kv3_v1_sxmbhq = 577,

  Instruction_kv3_v1_sxmhwp = 578,

  Instruction_kv3_v1_sxwd = 579,

  Instruction_kv3_v1_syncgroup = 580,

  Instruction_kv3_v1_tlbdinval = 581,

  Instruction_kv3_v1_tlbiinval = 582,

  Instruction_kv3_v1_tlbprobe = 583,

  Instruction_kv3_v1_tlbread = 584,

  Instruction_kv3_v1_tlbwrite = 585,

  Instruction_kv3_v1_waitit = 586,

  Instruction_kv3_v1_wfxl = 587,

  Instruction_kv3_v1_wfxm = 588,

  Instruction_kv3_v1_xcopyo = 589,

  Instruction_kv3_v1_xlo = 590,

  Instruction_kv3_v1_xmma484bw = 591,

  Instruction_kv3_v1_xmma484subw = 592,

  Instruction_kv3_v1_xmma484ubw = 593,

  Instruction_kv3_v1_xmma484usbw = 594,

  Instruction_kv3_v1_xmovefo = 595,

  Instruction_kv3_v1_xmovetq = 596,

  Instruction_kv3_v1_xmt44d = 597,

  Instruction_kv3_v1_xord = 598,

  Instruction_kv3_v1_xorw = 599,

  Instruction_kv3_v1_xso = 600,

  Instruction_kv3_v1_zxbd = 601,

  Instruction_kv3_v1_zxhd = 602,

  Instruction_kv3_v1_zxwd = 603,

  Separator_kv3_v1_comma = 604,

  Separator_kv3_v1_equal = 605,

  Separator_kv3_v1_qmark = 606,

  Separator_kv3_v1_rsbracket = 607,

  Separator_kv3_v1_lsbracket = 608

};

enum Modifier_kv3_v1_exunum_enum {

  Modifier_kv3_v1_exunum_ALU0=0,

  Modifier_kv3_v1_exunum_ALU1=1,

  Modifier_kv3_v1_exunum_MAU=2,

  Modifier_kv3_v1_exunum_LSU=3,

};

extern const char *mod_kv3_v1_exunum[];

extern const char *mod_kv3_v1_scalarcond[];

extern const char *mod_kv3_v1_simplecond[];

extern const char *mod_kv3_v1_comparison[];

extern const char *mod_kv3_v1_floatcomp[];

extern const char *mod_kv3_v1_rounding[];

extern const char *mod_kv3_v1_silent[];

extern const char *mod_kv3_v1_roundint[];

extern const char *mod_kv3_v1_saturate[];

extern const char *mod_kv3_v1_rectify[];

extern const char *mod_kv3_v1_variant[];

extern const char *mod_kv3_v1_speculate[];

extern const char *mod_kv3_v1_column[];

extern const char *mod_kv3_v1_doscale[];

extern const char *mod_kv3_v1_qindex[];

extern const char *mod_kv3_v1_splat32[];

typedef enum {

  Bundling_kv3_v1_ALL,

  Bundling_kv3_v1_BCU,

  Bundling_kv3_v1_TCA,

  Bundling_kv3_v1_FULL,

  Bundling_kv3_v1_FULL_X,

  Bundling_kv3_v1_FULL_Y,

  Bundling_kv3_v1_LITE,

  Bundling_kv3_v1_LITE_X,

  Bundling_kv3_v1_LITE_Y,

  Bundling_kv3_v1_MAU,

  Bundling_kv3_v1_MAU_X,

  Bundling_kv3_v1_MAU_Y,

  Bundling_kv3_v1_LSU,

  Bundling_kv3_v1_LSU_X,

  Bundling_kv3_v1_LSU_Y,

  Bundling_kv3_v1_TINY,

  Bundling_kv3_v1_TINY_X,

  Bundling_kv3_v1_TINY_Y,

  Bundling_kv3_v1_NOP,

} Bundling_kv3_v1;

static const char *bundling_kv3_v1_names(Bundling_kv3_v1 bundling) __attribute__((unused));

static const char *bundling_kv3_v1_names(Bundling_kv3_v1 bundling) {

  switch(bundling) {

  case Bundling_kv3_v1_ALL: return "Bundling_kv3_v1_ALL";

  case Bundling_kv3_v1_BCU: return "Bundling_kv3_v1_BCU";

  case Bundling_kv3_v1_TCA: return "Bundling_kv3_v1_TCA";

  case Bundling_kv3_v1_FULL: return "Bundling_kv3_v1_FULL";

  case Bundling_kv3_v1_FULL_X: return "Bundling_kv3_v1_FULL_X";

  case Bundling_kv3_v1_FULL_Y: return "Bundling_kv3_v1_FULL_Y";

  case Bundling_kv3_v1_LITE: return "Bundling_kv3_v1_LITE";

  case Bundling_kv3_v1_LITE_X: return "Bundling_kv3_v1_LITE_X";

  case Bundling_kv3_v1_LITE_Y: return "Bundling_kv3_v1_LITE_Y";

  case Bundling_kv3_v1_MAU: return "Bundling_kv3_v1_MAU";

  case Bundling_kv3_v1_MAU_X: return "Bundling_kv3_v1_MAU_X";

  case Bundling_kv3_v1_MAU_Y: return "Bundling_kv3_v1_MAU_Y";

  case Bundling_kv3_v1_LSU: return "Bundling_kv3_v1_LSU";

  case Bundling_kv3_v1_LSU_X: return "Bundling_kv3_v1_LSU_X";

  case Bundling_kv3_v1_LSU_Y: return "Bundling_kv3_v1_LSU_Y";

  case Bundling_kv3_v1_TINY: return "Bundling_kv3_v1_TINY";

  case Bundling_kv3_v1_TINY_X: return "Bundling_kv3_v1_TINY_X";

  case Bundling_kv3_v1_TINY_Y: return "Bundling_kv3_v1_TINY_Y";

  case Bundling_kv3_v1_NOP: return "Bundling_kv3_v1_NOP";

  };

  return "unknown bundling";

};

Unexecuted instantiation: kvx-dis.c:bundling_kv3_v1_names

Unexecuted instantiation: kvx-opc.c:bundling_kv3_v1_names

/* Resources list */

#define Resource_kv3_v1_ISSUE 0

#define Resource_kv3_v1_TINY 1

#define Resource_kv3_v1_LITE 2

#define Resource_kv3_v1_FULL 3

#define Resource_kv3_v1_LSU 4

#define Resource_kv3_v1_MAU 5

#define Resource_kv3_v1_BCU 6

#define Resource_kv3_v1_TCA 7

#define Resource_kv3_v1_AUXR 8

#define Resource_kv3_v1_AUXW 9

#define Resource_kv3_v1_CRRP 10

#define Resource_kv3_v1_CRWL 11

#define Resource_kv3_v1_CRWH 12

#define Resource_kv3_v1_NOP 13

#define kvx_kv3_v1_RESOURCE_MAX 14

/* Reservations list */

#define Reservation_kv3_v1_ALL 0

#define Reservation_kv3_v1_ALU_NOP 1

#define Reservation_kv3_v1_ALU_TINY 2

#define Reservation_kv3_v1_ALU_TINY_X 3

#define Reservation_kv3_v1_ALU_TINY_Y 4

#define Reservation_kv3_v1_ALU_LITE 5

#define Reservation_kv3_v1_ALU_LITE_X 6

#define Reservation_kv3_v1_ALU_LITE_Y 7

#define Reservation_kv3_v1_ALU_LITE_CRWL 8

#define Reservation_kv3_v1_ALU_LITE_CRWH 9

#define Reservation_kv3_v1_ALU_FULL 10

#define Reservation_kv3_v1_ALU_FULL_X 11

#define Reservation_kv3_v1_ALU_FULL_Y 12

#define Reservation_kv3_v1_BCU 13

#define Reservation_kv3_v1_BCU_CRRP_CRWL_CRWH 14

#define Reservation_kv3_v1_BCU_TINY_AUXW_CRRP 15

#define Reservation_kv3_v1_BCU_TINY_TINY_MAU_XNOP 16

#define Reservation_kv3_v1_TCA 17

#define Reservation_kv3_v1_LSU 18

#define Reservation_kv3_v1_LSU_X 19

#define Reservation_kv3_v1_LSU_Y 20

#define Reservation_kv3_v1_LSU_CRRP 21

#define Reservation_kv3_v1_LSU_CRRP_X 22

#define Reservation_kv3_v1_LSU_CRRP_Y 23

#define Reservation_kv3_v1_LSU_AUXR 24

#define Reservation_kv3_v1_LSU_AUXR_X 25

#define Reservation_kv3_v1_LSU_AUXR_Y 26

#define Reservation_kv3_v1_LSU_AUXW 27

#define Reservation_kv3_v1_LSU_AUXW_X 28

#define Reservation_kv3_v1_LSU_AUXW_Y 29

#define Reservation_kv3_v1_LSU_AUXR_AUXW 30

#define Reservation_kv3_v1_LSU_AUXR_AUXW_X 31

#define Reservation_kv3_v1_LSU_AUXR_AUXW_Y 32

#define Reservation_kv3_v1_MAU 33

#define Reservation_kv3_v1_MAU_X 34

#define Reservation_kv3_v1_MAU_Y 35

#define Reservation_kv3_v1_MAU_AUXR 36

#define Reservation_kv3_v1_MAU_AUXR_X 37

#define Reservation_kv3_v1_MAU_AUXR_Y 38

extern struct kvx_reloc kv3_v1_rel16_reloc;

extern struct kvx_reloc kv3_v1_rel32_reloc;

extern struct kvx_reloc kv3_v1_rel64_reloc;

extern struct kvx_reloc kv3_v1_pcrel_signed16_reloc;

extern struct kvx_reloc kv3_v1_pcrel17_reloc;

extern struct kvx_reloc kv3_v1_pcrel27_reloc;

extern struct kvx_reloc kv3_v1_pcrel32_reloc;

extern struct kvx_reloc kv3_v1_pcrel_signed37_reloc;

extern struct kvx_reloc kv3_v1_pcrel_signed43_reloc;

extern struct kvx_reloc kv3_v1_pcrel_signed64_reloc;

extern struct kvx_reloc kv3_v1_pcrel64_reloc;

extern struct kvx_reloc kv3_v1_signed16_reloc;

extern struct kvx_reloc kv3_v1_signed32_reloc;

extern struct kvx_reloc kv3_v1_signed37_reloc;

extern struct kvx_reloc kv3_v1_gotoff_signed37_reloc;

extern struct kvx_reloc kv3_v1_gotoff_signed43_reloc;

extern struct kvx_reloc kv3_v1_gotoff_32_reloc;

extern struct kvx_reloc kv3_v1_gotoff_64_reloc;

extern struct kvx_reloc kv3_v1_got_32_reloc;

extern struct kvx_reloc kv3_v1_got_signed37_reloc;

extern struct kvx_reloc kv3_v1_got_signed43_reloc;

extern struct kvx_reloc kv3_v1_got_64_reloc;

extern struct kvx_reloc kv3_v1_glob_dat_reloc;

extern struct kvx_reloc kv3_v1_copy_reloc;

extern struct kvx_reloc kv3_v1_jump_slot_reloc;

extern struct kvx_reloc kv3_v1_relative_reloc;

extern struct kvx_reloc kv3_v1_signed43_reloc;

extern struct kvx_reloc kv3_v1_signed64_reloc;

extern struct kvx_reloc kv3_v1_gotaddr_signed37_reloc;

extern struct kvx_reloc kv3_v1_gotaddr_signed43_reloc;

extern struct kvx_reloc kv3_v1_gotaddr_signed64_reloc;

extern struct kvx_reloc kv3_v1_dtpmod64_reloc;

extern struct kvx_reloc kv3_v1_dtpoff64_reloc;

extern struct kvx_reloc kv3_v1_dtpoff_signed37_reloc;

extern struct kvx_reloc kv3_v1_dtpoff_signed43_reloc;

extern struct kvx_reloc kv3_v1_tlsgd_signed37_reloc;

extern struct kvx_reloc kv3_v1_tlsgd_signed43_reloc;

extern struct kvx_reloc kv3_v1_tlsld_signed37_reloc;

extern struct kvx_reloc kv3_v1_tlsld_signed43_reloc;

extern struct kvx_reloc kv3_v1_tpoff64_reloc;

extern struct kvx_reloc kv3_v1_tlsie_signed37_reloc;

extern struct kvx_reloc kv3_v1_tlsie_signed43_reloc;

extern struct kvx_reloc kv3_v1_tlsle_signed37_reloc;

extern struct kvx_reloc kv3_v1_tlsle_signed43_reloc;

extern struct kvx_reloc kv3_v1_rel8_reloc;

#define KVX_REGFILE_FIRST_GPR 0

#define KVX_REGFILE_LAST_GPR 1

#define KVX_REGFILE_DEC_GPR 2

#define KVX_REGFILE_FIRST_PGR 3

#define KVX_REGFILE_LAST_PGR 4

#define KVX_REGFILE_DEC_PGR 5

#define KVX_REGFILE_FIRST_QGR 6

#define KVX_REGFILE_LAST_QGR 7

#define KVX_REGFILE_DEC_QGR 8

#define KVX_REGFILE_FIRST_SFR 9

#define KVX_REGFILE_LAST_SFR 10

#define KVX_REGFILE_DEC_SFR 11

#define KVX_REGFILE_FIRST_X16R 12

#define KVX_REGFILE_LAST_X16R 13

#define KVX_REGFILE_DEC_X16R 14

#define KVX_REGFILE_FIRST_X2R 15

#define KVX_REGFILE_LAST_X2R 16

#define KVX_REGFILE_DEC_X2R 17

#define KVX_REGFILE_FIRST_X32R 18

#define KVX_REGFILE_LAST_X32R 19

#define KVX_REGFILE_DEC_X32R 20

#define KVX_REGFILE_FIRST_X4R 21

#define KVX_REGFILE_LAST_X4R 22

#define KVX_REGFILE_DEC_X4R 23

#define KVX_REGFILE_FIRST_X64R 24

#define KVX_REGFILE_LAST_X64R 25

#define KVX_REGFILE_DEC_X64R 26

#define KVX_REGFILE_FIRST_X8R 27

#define KVX_REGFILE_LAST_X8R 28

#define KVX_REGFILE_DEC_X8R 29

#define KVX_REGFILE_FIRST_XBR 30

#define KVX_REGFILE_LAST_XBR 31

#define KVX_REGFILE_DEC_XBR 32

#define KVX_REGFILE_FIRST_XCR 33

#define KVX_REGFILE_LAST_XCR 34

#define KVX_REGFILE_DEC_XCR 35

#define KVX_REGFILE_FIRST_XMR 36

#define KVX_REGFILE_LAST_XMR 37