/src/binutils-gdb/opcodes/disassemble.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* Select disassembly routine for specified architecture. |
2 | | Copyright (C) 1994-2025 Free Software Foundation, Inc. |
3 | | |
4 | | This file is part of the GNU opcodes library. |
5 | | |
6 | | This library is free software; you can redistribute it and/or modify |
7 | | it under the terms of the GNU General Public License as published by |
8 | | the Free Software Foundation; either version 3 of the License, or |
9 | | (at your option) any later version. |
10 | | |
11 | | This program is distributed in the hope that it will be useful, |
12 | | but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 | | GNU General Public License for more details. |
15 | | |
16 | | You should have received a copy of the GNU General Public License |
17 | | along with this program; if not, write to the Free Software |
18 | | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
19 | | MA 02110-1301, USA. */ |
20 | | |
21 | | #include "sysdep.h" |
22 | | #include "disassemble.h" |
23 | | #include "safe-ctype.h" |
24 | | #include "opintl.h" |
25 | | |
26 | | #ifdef ARCH_all |
27 | | #ifdef BFD64 |
28 | | #define ARCH_aarch64 |
29 | | #define ARCH_alpha |
30 | | #define ARCH_bpf |
31 | | #define ARCH_ia64 |
32 | | #define ARCH_loongarch |
33 | | #define ARCH_mips |
34 | | #define ARCH_mmix |
35 | | #define ARCH_nfp |
36 | | #define ARCH_riscv |
37 | | #define ARCH_score |
38 | | #define ARCH_tilegx |
39 | | #endif |
40 | | #define ARCH_arc |
41 | | #define ARCH_arm |
42 | | #define ARCH_avr |
43 | | #define ARCH_bfin |
44 | | #define ARCH_cr16 |
45 | | #define ARCH_cris |
46 | | #define ARCH_crx |
47 | | #define ARCH_csky |
48 | | #define ARCH_d10v |
49 | | #define ARCH_d30v |
50 | | #define ARCH_dlx |
51 | | #define ARCH_epiphany |
52 | | #define ARCH_fr30 |
53 | | #define ARCH_frv |
54 | | #define ARCH_ft32 |
55 | | #define ARCH_h8300 |
56 | | #define ARCH_hppa |
57 | | #define ARCH_i386 |
58 | | #define ARCH_ip2k |
59 | | #define ARCH_iq2000 |
60 | | #define ARCH_kvx |
61 | | #define ARCH_lm32 |
62 | | #define ARCH_m32c |
63 | | #define ARCH_m32r |
64 | | #define ARCH_m68hc11 |
65 | | #define ARCH_m68hc12 |
66 | | #define ARCH_m68k |
67 | | #define ARCH_mcore |
68 | | #define ARCH_mep |
69 | | #define ARCH_metag |
70 | | #define ARCH_microblaze |
71 | | #define ARCH_mn10200 |
72 | | #define ARCH_mn10300 |
73 | | #define ARCH_moxie |
74 | | #define ARCH_mt |
75 | | #define ARCH_msp430 |
76 | | #define ARCH_nds32 |
77 | | #define ARCH_ns32k |
78 | | #define ARCH_or1k |
79 | | #define ARCH_pdp11 |
80 | | #define ARCH_pj |
81 | | #define ARCH_powerpc |
82 | | #define ARCH_pru |
83 | | #define ARCH_rs6000 |
84 | | #define ARCH_rl78 |
85 | | #define ARCH_rx |
86 | | #define ARCH_s12z |
87 | | #define ARCH_s390 |
88 | | #define ARCH_sh |
89 | | #define ARCH_sparc |
90 | | #define ARCH_spu |
91 | | #define ARCH_tic30 |
92 | | #define ARCH_tic4x |
93 | | #define ARCH_tic54x |
94 | | #define ARCH_tic6x |
95 | | #define ARCH_tilepro |
96 | | #define ARCH_v850 |
97 | | #define ARCH_vax |
98 | | #define ARCH_visium |
99 | | #define ARCH_wasm32 |
100 | | #define ARCH_xstormy16 |
101 | | #define ARCH_xgate |
102 | | #define ARCH_xtensa |
103 | | #define ARCH_z80 |
104 | | #define ARCH_z8k |
105 | | #endif |
106 | | |
107 | | #ifdef ARCH_m32c |
108 | | #include "m32c-desc.h" |
109 | | #endif |
110 | | |
111 | | disassembler_ftype |
112 | | disassembler (enum bfd_architecture a, |
113 | | bool big ATTRIBUTE_UNUSED, |
114 | | unsigned long mach ATTRIBUTE_UNUSED, |
115 | | bfd *abfd ATTRIBUTE_UNUSED) |
116 | 125k | { |
117 | 125k | disassembler_ftype disassemble; |
118 | | |
119 | 125k | switch (a) |
120 | 125k | { |
121 | | /* If you add a case to this table, also add it to the |
122 | | ARCH_all definition right above this function. */ |
123 | 0 | #ifdef ARCH_aarch64 |
124 | 20.0k | case bfd_arch_aarch64: |
125 | 20.0k | disassemble = print_insn_aarch64; |
126 | 20.0k | break; |
127 | 0 | #endif |
128 | 0 | #ifdef ARCH_alpha |
129 | 242 | case bfd_arch_alpha: |
130 | 242 | disassemble = print_insn_alpha; |
131 | 242 | break; |
132 | 0 | #endif |
133 | 0 | #ifdef ARCH_arc |
134 | 3.15k | case bfd_arch_arc: |
135 | 3.15k | disassemble = arc_get_disassembler (abfd); |
136 | 3.15k | break; |
137 | 0 | #endif |
138 | 0 | #ifdef ARCH_arm |
139 | 18.7k | case bfd_arch_arm: |
140 | 18.7k | if (big) |
141 | 7.42k | disassemble = print_insn_big_arm; |
142 | 11.2k | else |
143 | 11.2k | disassemble = print_insn_little_arm; |
144 | 18.7k | break; |
145 | 0 | #endif |
146 | 0 | #ifdef ARCH_avr |
147 | 284 | case bfd_arch_avr: |
148 | 284 | disassemble = print_insn_avr; |
149 | 284 | break; |
150 | 0 | #endif |
151 | 0 | #ifdef ARCH_bfin |
152 | 3.44k | case bfd_arch_bfin: |
153 | 3.44k | disassemble = print_insn_bfin; |
154 | 3.44k | break; |
155 | 0 | #endif |
156 | 0 | #ifdef ARCH_cr16 |
157 | 351 | case bfd_arch_cr16: |
158 | 351 | disassemble = print_insn_cr16; |
159 | 351 | break; |
160 | 0 | #endif |
161 | 0 | #ifdef ARCH_cris |
162 | 684 | case bfd_arch_cris: |
163 | 684 | disassemble = cris_get_disassembler (abfd); |
164 | 684 | break; |
165 | 0 | #endif |
166 | 0 | #ifdef ARCH_crx |
167 | 349 | case bfd_arch_crx: |
168 | 349 | disassemble = print_insn_crx; |
169 | 349 | break; |
170 | 0 | #endif |
171 | 0 | #ifdef ARCH_csky |
172 | 977 | case bfd_arch_csky: |
173 | 977 | disassemble = csky_get_disassembler (abfd); |
174 | 977 | break; |
175 | 0 | #endif |
176 | | |
177 | 0 | #ifdef ARCH_d10v |
178 | 178 | case bfd_arch_d10v: |
179 | 178 | disassemble = print_insn_d10v; |
180 | 178 | break; |
181 | 0 | #endif |
182 | 0 | #ifdef ARCH_d30v |
183 | 325 | case bfd_arch_d30v: |
184 | 325 | disassemble = print_insn_d30v; |
185 | 325 | break; |
186 | 0 | #endif |
187 | 0 | #ifdef ARCH_dlx |
188 | 127 | case bfd_arch_dlx: |
189 | | /* As far as I know we only handle big-endian DLX objects. */ |
190 | 127 | disassemble = print_insn_dlx; |
191 | 127 | break; |
192 | 0 | #endif |
193 | 0 | #ifdef ARCH_h8300 |
194 | 556 | case bfd_arch_h8300: |
195 | 556 | if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn) |
196 | 30 | disassemble = print_insn_h8300h; |
197 | 526 | else if (mach == bfd_mach_h8300s |
198 | 526 | || mach == bfd_mach_h8300sn |
199 | 526 | || mach == bfd_mach_h8300sx |
200 | 526 | || mach == bfd_mach_h8300sxn) |
201 | 85 | disassemble = print_insn_h8300s; |
202 | 441 | else |
203 | 441 | disassemble = print_insn_h8300; |
204 | 556 | break; |
205 | 0 | #endif |
206 | 0 | #ifdef ARCH_hppa |
207 | 834 | case bfd_arch_hppa: |
208 | 834 | disassemble = print_insn_hppa; |
209 | 834 | break; |
210 | 0 | #endif |
211 | 0 | #ifdef ARCH_i386 |
212 | 16.0k | case bfd_arch_i386: |
213 | 16.4k | case bfd_arch_iamcu: |
214 | 16.4k | disassemble = print_insn_i386; |
215 | 16.4k | break; |
216 | 0 | #endif |
217 | 0 | #ifdef ARCH_ia64 |
218 | 198 | case bfd_arch_ia64: |
219 | 198 | disassemble = print_insn_ia64; |
220 | 198 | break; |
221 | 0 | #endif |
222 | 0 | #ifdef ARCH_ip2k |
223 | 113 | case bfd_arch_ip2k: |
224 | 113 | disassemble = print_insn_ip2k; |
225 | 113 | break; |
226 | 0 | #endif |
227 | 0 | #ifdef ARCH_bpf |
228 | 23 | case bfd_arch_bpf: |
229 | 23 | disassemble = print_insn_bpf; |
230 | 23 | break; |
231 | 0 | #endif |
232 | 0 | #ifdef ARCH_epiphany |
233 | 213 | case bfd_arch_epiphany: |
234 | 213 | disassemble = print_insn_epiphany; |
235 | 213 | break; |
236 | 0 | #endif |
237 | 0 | #ifdef ARCH_fr30 |
238 | 271 | case bfd_arch_fr30: |
239 | 271 | disassemble = print_insn_fr30; |
240 | 271 | break; |
241 | 0 | #endif |
242 | 0 | #ifdef ARCH_kvx |
243 | 659 | case bfd_arch_kvx: |
244 | 659 | disassemble = print_insn_kvx; |
245 | 659 | break; |
246 | 0 | #endif |
247 | 0 | #ifdef ARCH_lm32 |
248 | 174 | case bfd_arch_lm32: |
249 | 174 | disassemble = print_insn_lm32; |
250 | 174 | break; |
251 | 0 | #endif |
252 | 0 | #ifdef ARCH_m32r |
253 | 334 | case bfd_arch_m32r: |
254 | 334 | disassemble = print_insn_m32r; |
255 | 334 | break; |
256 | 0 | #endif |
257 | 0 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \ |
258 | 0 | || defined(ARCH_9s12x) || defined(ARCH_m9s12xg) |
259 | 70 | case bfd_arch_m68hc11: |
260 | 70 | disassemble = print_insn_m68hc11; |
261 | 70 | break; |
262 | 250 | case bfd_arch_m68hc12: |
263 | 250 | disassemble = print_insn_m68hc12; |
264 | 250 | break; |
265 | 175 | case bfd_arch_m9s12x: |
266 | 175 | disassemble = print_insn_m9s12x; |
267 | 175 | break; |
268 | 127 | case bfd_arch_m9s12xg: |
269 | 127 | disassemble = print_insn_m9s12xg; |
270 | 127 | break; |
271 | 0 | #endif |
272 | 0 | #if defined(ARCH_s12z) |
273 | 758 | case bfd_arch_s12z: |
274 | 758 | disassemble = print_insn_s12z; |
275 | 758 | break; |
276 | 0 | #endif |
277 | 0 | #ifdef ARCH_m68k |
278 | 1.15k | case bfd_arch_m68k: |
279 | 1.15k | disassemble = print_insn_m68k; |
280 | 1.15k | break; |
281 | 0 | #endif |
282 | 0 | #ifdef ARCH_mt |
283 | 230 | case bfd_arch_mt: |
284 | 230 | disassemble = print_insn_mt; |
285 | 230 | break; |
286 | 0 | #endif |
287 | 0 | #ifdef ARCH_microblaze |
288 | 291 | case bfd_arch_microblaze: |
289 | 291 | disassemble = print_insn_microblaze; |
290 | 291 | break; |
291 | 0 | #endif |
292 | 0 | #ifdef ARCH_msp430 |
293 | 1.02k | case bfd_arch_msp430: |
294 | 1.02k | disassemble = print_insn_msp430; |
295 | 1.02k | break; |
296 | 0 | #endif |
297 | 0 | #ifdef ARCH_nds32 |
298 | 1.32k | case bfd_arch_nds32: |
299 | 1.32k | disassemble = print_insn_nds32; |
300 | 1.32k | break; |
301 | 0 | #endif |
302 | 0 | #ifdef ARCH_nfp |
303 | 1.16k | case bfd_arch_nfp: |
304 | 1.16k | disassemble = print_insn_nfp; |
305 | 1.16k | break; |
306 | 0 | #endif |
307 | 0 | #ifdef ARCH_ns32k |
308 | 733 | case bfd_arch_ns32k: |
309 | 733 | disassemble = print_insn_ns32k; |
310 | 733 | break; |
311 | 0 | #endif |
312 | 0 | #ifdef ARCH_mcore |
313 | 340 | case bfd_arch_mcore: |
314 | 340 | disassemble = print_insn_mcore; |
315 | 340 | break; |
316 | 0 | #endif |
317 | 0 | #ifdef ARCH_mep |
318 | 256 | case bfd_arch_mep: |
319 | 256 | disassemble = print_insn_mep; |
320 | 256 | break; |
321 | 0 | #endif |
322 | 0 | #ifdef ARCH_metag |
323 | 3.11k | case bfd_arch_metag: |
324 | 3.11k | disassemble = print_insn_metag; |
325 | 3.11k | break; |
326 | 0 | #endif |
327 | 0 | #ifdef ARCH_mips |
328 | 7.78k | case bfd_arch_mips: |
329 | 7.78k | if (big) |
330 | 2.99k | disassemble = print_insn_big_mips; |
331 | 4.79k | else |
332 | 4.79k | disassemble = print_insn_little_mips; |
333 | 7.78k | break; |
334 | 0 | #endif |
335 | 0 | #ifdef ARCH_mmix |
336 | 359 | case bfd_arch_mmix: |
337 | 359 | disassemble = print_insn_mmix; |
338 | 359 | break; |
339 | 0 | #endif |
340 | 0 | #ifdef ARCH_mn10200 |
341 | 311 | case bfd_arch_mn10200: |
342 | 311 | disassemble = print_insn_mn10200; |
343 | 311 | break; |
344 | 0 | #endif |
345 | 0 | #ifdef ARCH_mn10300 |
346 | 611 | case bfd_arch_mn10300: |
347 | 611 | disassemble = print_insn_mn10300; |
348 | 611 | break; |
349 | 0 | #endif |
350 | 0 | #ifdef ARCH_or1k |
351 | 154 | case bfd_arch_or1k: |
352 | 154 | disassemble = print_insn_or1k; |
353 | 154 | break; |
354 | 0 | #endif |
355 | 0 | #ifdef ARCH_pdp11 |
356 | 445 | case bfd_arch_pdp11: |
357 | 445 | disassemble = print_insn_pdp11; |
358 | 445 | break; |
359 | 0 | #endif |
360 | 0 | #ifdef ARCH_pj |
361 | 0 | case bfd_arch_pj: |
362 | 0 | disassemble = print_insn_pj; |
363 | 0 | break; |
364 | 0 | #endif |
365 | 0 | #ifdef ARCH_powerpc |
366 | 1.04k | case bfd_arch_powerpc: |
367 | 1.04k | #endif |
368 | 1.04k | #ifdef ARCH_rs6000 |
369 | 1.14k | case bfd_arch_rs6000: |
370 | 1.14k | #endif |
371 | 1.14k | #if defined ARCH_powerpc || defined ARCH_rs6000 |
372 | 1.14k | if (big) |
373 | 301 | disassemble = print_insn_big_powerpc; |
374 | 839 | else |
375 | 839 | disassemble = print_insn_little_powerpc; |
376 | 1.14k | break; |
377 | 0 | #endif |
378 | 0 | #ifdef ARCH_pru |
379 | 147 | case bfd_arch_pru: |
380 | 147 | disassemble = print_insn_pru; |
381 | 147 | break; |
382 | 0 | #endif |
383 | 0 | #ifdef ARCH_riscv |
384 | 1.58k | case bfd_arch_riscv: |
385 | 1.58k | disassemble = print_insn_riscv; |
386 | 1.58k | break; |
387 | 0 | #endif |
388 | 0 | #ifdef ARCH_rl78 |
389 | 4.64k | case bfd_arch_rl78: |
390 | 4.64k | disassemble = rl78_get_disassembler (abfd); |
391 | 4.64k | break; |
392 | 0 | #endif |
393 | 0 | #ifdef ARCH_rx |
394 | 13.5k | case bfd_arch_rx: |
395 | 13.5k | disassemble = print_insn_rx; |
396 | 13.5k | break; |
397 | 0 | #endif |
398 | 0 | #ifdef ARCH_s390 |
399 | 243 | case bfd_arch_s390: |
400 | 243 | disassemble = print_insn_s390; |
401 | 243 | break; |
402 | 0 | #endif |
403 | 0 | #ifdef ARCH_score |
404 | 517 | case bfd_arch_score: |
405 | 517 | if (big) |
406 | 44 | disassemble = print_insn_big_score; |
407 | 473 | else |
408 | 473 | disassemble = print_insn_little_score; |
409 | 517 | break; |
410 | 0 | #endif |
411 | 0 | #ifdef ARCH_sh |
412 | 1.25k | case bfd_arch_sh: |
413 | 1.25k | disassemble = print_insn_sh; |
414 | 1.25k | break; |
415 | 0 | #endif |
416 | 0 | #ifdef ARCH_sparc |
417 | 588 | case bfd_arch_sparc: |
418 | 588 | disassemble = print_insn_sparc; |
419 | 588 | break; |
420 | 0 | #endif |
421 | 0 | #ifdef ARCH_spu |
422 | 345 | case bfd_arch_spu: |
423 | 345 | disassemble = print_insn_spu; |
424 | 345 | break; |
425 | 0 | #endif |
426 | 0 | #ifdef ARCH_tic30 |
427 | 546 | case bfd_arch_tic30: |
428 | 546 | disassemble = print_insn_tic30; |
429 | 546 | break; |
430 | 0 | #endif |
431 | 0 | #ifdef ARCH_tic4x |
432 | 542 | case bfd_arch_tic4x: |
433 | 542 | disassemble = print_insn_tic4x; |
434 | 542 | break; |
435 | 0 | #endif |
436 | 0 | #ifdef ARCH_tic54x |
437 | 559 | case bfd_arch_tic54x: |
438 | 559 | disassemble = print_insn_tic54x; |
439 | 559 | break; |
440 | 0 | #endif |
441 | 0 | #ifdef ARCH_tic6x |
442 | 140 | case bfd_arch_tic6x: |
443 | 140 | disassemble = print_insn_tic6x; |
444 | 140 | break; |
445 | 0 | #endif |
446 | 0 | #ifdef ARCH_ft32 |
447 | 252 | case bfd_arch_ft32: |
448 | 252 | disassemble = print_insn_ft32; |
449 | 252 | break; |
450 | 0 | #endif |
451 | 0 | #ifdef ARCH_v850 |
452 | 461 | case bfd_arch_v850: |
453 | 529 | case bfd_arch_v850_rh850: |
454 | 529 | disassemble = print_insn_v850; |
455 | 529 | break; |
456 | 0 | #endif |
457 | 0 | #ifdef ARCH_wasm32 |
458 | 753 | case bfd_arch_wasm32: |
459 | 753 | disassemble = print_insn_wasm32; |
460 | 753 | break; |
461 | 0 | #endif |
462 | 0 | #ifdef ARCH_xgate |
463 | 181 | case bfd_arch_xgate: |
464 | 181 | disassemble = print_insn_xgate; |
465 | 181 | break; |
466 | 0 | #endif |
467 | 0 | #ifdef ARCH_xstormy16 |
468 | 178 | case bfd_arch_xstormy16: |
469 | 178 | disassemble = print_insn_xstormy16; |
470 | 178 | break; |
471 | 0 | #endif |
472 | 0 | #ifdef ARCH_xtensa |
473 | 4.01k | case bfd_arch_xtensa: |
474 | 4.01k | disassemble = print_insn_xtensa; |
475 | 4.01k | break; |
476 | 0 | #endif |
477 | 0 | #ifdef ARCH_z80 |
478 | 533 | case bfd_arch_z80: |
479 | 533 | disassemble = print_insn_z80; |
480 | 533 | break; |
481 | 0 | #endif |
482 | 0 | #ifdef ARCH_z8k |
483 | 441 | case bfd_arch_z8k: |
484 | 441 | if (mach == bfd_mach_z8001) |
485 | 118 | disassemble = print_insn_z8001; |
486 | 323 | else |
487 | 323 | disassemble = print_insn_z8002; |
488 | 441 | break; |
489 | 0 | #endif |
490 | 0 | #ifdef ARCH_vax |
491 | 404 | case bfd_arch_vax: |
492 | 404 | disassemble = print_insn_vax; |
493 | 404 | break; |
494 | 0 | #endif |
495 | 0 | #ifdef ARCH_visium |
496 | 651 | case bfd_arch_visium: |
497 | 651 | disassemble = print_insn_visium; |
498 | 651 | break; |
499 | 0 | #endif |
500 | 0 | #ifdef ARCH_frv |
501 | 426 | case bfd_arch_frv: |
502 | 426 | disassemble = print_insn_frv; |
503 | 426 | break; |
504 | 0 | #endif |
505 | 0 | #ifdef ARCH_moxie |
506 | 120 | case bfd_arch_moxie: |
507 | 120 | disassemble = print_insn_moxie; |
508 | 120 | break; |
509 | 0 | #endif |
510 | 0 | #ifdef ARCH_iq2000 |
511 | 148 | case bfd_arch_iq2000: |
512 | 148 | disassemble = print_insn_iq2000; |
513 | 148 | break; |
514 | 0 | #endif |
515 | 0 | #ifdef ARCH_m32c |
516 | 906 | case bfd_arch_m32c: |
517 | 906 | disassemble = print_insn_m32c; |
518 | 906 | break; |
519 | 0 | #endif |
520 | 0 | #ifdef ARCH_tilegx |
521 | 218 | case bfd_arch_tilegx: |
522 | 218 | disassemble = print_insn_tilegx; |
523 | 218 | break; |
524 | 0 | #endif |
525 | 0 | #ifdef ARCH_tilepro |
526 | 227 | case bfd_arch_tilepro: |
527 | 227 | disassemble = print_insn_tilepro; |
528 | 227 | break; |
529 | 0 | #endif |
530 | 0 | #ifdef ARCH_loongarch |
531 | 216 | case bfd_arch_loongarch: |
532 | 216 | disassemble = print_insn_loongarch; |
533 | 216 | break; |
534 | 0 | #endif |
535 | 208 | default: |
536 | 208 | return 0; |
537 | 125k | } |
538 | 125k | return disassemble; |
539 | 125k | } |
540 | | |
541 | | void |
542 | | disassembler_usage (FILE *stream ATTRIBUTE_UNUSED) |
543 | 0 | { |
544 | 0 | #ifdef ARCH_aarch64 |
545 | 0 | print_aarch64_disassembler_options (stream); |
546 | 0 | #endif |
547 | 0 | #ifdef ARCH_arc |
548 | 0 | print_arc_disassembler_options (stream); |
549 | 0 | #endif |
550 | 0 | #ifdef ARCH_arm |
551 | 0 | print_arm_disassembler_options (stream); |
552 | 0 | #endif |
553 | 0 | #ifdef ARCH_mips |
554 | 0 | print_mips_disassembler_options (stream); |
555 | 0 | #endif |
556 | 0 | #ifdef ARCH_nfp |
557 | 0 | print_nfp_disassembler_options (stream); |
558 | 0 | #endif |
559 | 0 | #ifdef ARCH_powerpc |
560 | 0 | print_ppc_disassembler_options (stream); |
561 | 0 | #endif |
562 | 0 | #ifdef ARCH_riscv |
563 | 0 | print_riscv_disassembler_options (stream); |
564 | 0 | #endif |
565 | 0 | #ifdef ARCH_i386 |
566 | 0 | print_i386_disassembler_options (stream); |
567 | 0 | #endif |
568 | 0 | #ifdef ARCH_kvx |
569 | 0 | print_kvx_disassembler_options (stream); |
570 | 0 | #endif |
571 | 0 | #ifdef ARCH_s390 |
572 | 0 | print_s390_disassembler_options (stream); |
573 | 0 | #endif |
574 | 0 | #ifdef ARCH_wasm32 |
575 | 0 | print_wasm32_disassembler_options (stream); |
576 | 0 | #endif |
577 | 0 | #ifdef ARCH_loongarch |
578 | 0 | print_loongarch_disassembler_options (stream); |
579 | 0 | #endif |
580 | 0 | #ifdef ARCH_bpf |
581 | 0 | print_bpf_disassembler_options (stream); |
582 | 0 | #endif |
583 | 0 | return; |
584 | 0 | } |
585 | | |
586 | | void |
587 | | disassemble_init_for_target (struct disassemble_info * info) |
588 | 125k | { |
589 | 125k | if (info == NULL) |
590 | 0 | return; |
591 | | |
592 | 125k | switch (info->arch) |
593 | 125k | { |
594 | 0 | #ifdef ARCH_aarch64 |
595 | 20.0k | case bfd_arch_aarch64: |
596 | 20.0k | info->symbol_is_valid = aarch64_symbol_is_valid; |
597 | 20.0k | info->disassembler_needs_relocs = true; |
598 | 20.0k | info->created_styled_output = true; |
599 | 20.0k | break; |
600 | 0 | #endif |
601 | 0 | #ifdef ARCH_arc |
602 | 3.15k | case bfd_arch_arc: |
603 | 3.15k | info->created_styled_output = true; |
604 | 3.15k | break; |
605 | 0 | #endif |
606 | 0 | #ifdef ARCH_arm |
607 | 18.7k | case bfd_arch_arm: |
608 | 18.7k | info->symbol_is_valid = arm_symbol_is_valid; |
609 | 18.7k | info->disassembler_needs_relocs = true; |
610 | 18.7k | info->created_styled_output = true; |
611 | 18.7k | break; |
612 | 0 | #endif |
613 | 0 | #ifdef ARCH_avr |
614 | 284 | case bfd_arch_avr: |
615 | 284 | info->created_styled_output = true; |
616 | 284 | break; |
617 | 0 | #endif |
618 | 0 | #ifdef ARCH_csky |
619 | 977 | case bfd_arch_csky: |
620 | 977 | info->symbol_is_valid = csky_symbol_is_valid; |
621 | 977 | info->disassembler_needs_relocs = true; |
622 | 977 | break; |
623 | 0 | #endif |
624 | 0 | #ifdef ARCH_i386 |
625 | 16.0k | case bfd_arch_i386: |
626 | 16.4k | case bfd_arch_iamcu: |
627 | 16.4k | info->created_styled_output = true; |
628 | 16.4k | break; |
629 | 0 | #endif |
630 | 0 | #ifdef ARCH_ia64 |
631 | 198 | case bfd_arch_ia64: |
632 | 198 | info->skip_zeroes = 16; |
633 | 198 | break; |
634 | 0 | #endif |
635 | 0 | #ifdef ARCH_loongarch |
636 | 216 | case bfd_arch_loongarch: |
637 | 216 | info->created_styled_output = true; |
638 | 216 | break; |
639 | 0 | #endif |
640 | 0 | #ifdef ARCH_tic4x |
641 | 542 | case bfd_arch_tic4x: |
642 | 542 | info->skip_zeroes = 32; |
643 | 542 | break; |
644 | 0 | #endif |
645 | 0 | #ifdef ARCH_m68k |
646 | 1.15k | case bfd_arch_m68k: |
647 | 1.15k | info->created_styled_output = true; |
648 | 1.15k | break; |
649 | 0 | #endif |
650 | 0 | #ifdef ARCH_mep |
651 | 256 | case bfd_arch_mep: |
652 | 256 | info->skip_zeroes = 256; |
653 | 256 | info->skip_zeroes_at_end = 0; |
654 | 256 | break; |
655 | 0 | #endif |
656 | 0 | #ifdef ARCH_metag |
657 | 3.11k | case bfd_arch_metag: |
658 | 3.11k | info->disassembler_needs_relocs = true; |
659 | 3.11k | break; |
660 | 0 | #endif |
661 | 0 | #ifdef ARCH_mips |
662 | 7.78k | case bfd_arch_mips: |
663 | 7.78k | info->created_styled_output = true; |
664 | 7.78k | break; |
665 | 0 | #endif |
666 | 0 | #ifdef ARCH_m32c |
667 | 906 | case bfd_arch_m32c: |
668 | | /* This processor in fact is little endian. The value set here |
669 | | reflects the way opcodes are written in the cgen description. */ |
670 | 906 | info->endian = BFD_ENDIAN_BIG; |
671 | 906 | if (!info->private_data) |
672 | 906 | { |
673 | 906 | info->private_data = cgen_bitset_create (ISA_MAX); |
674 | 906 | if (info->mach == bfd_mach_m16c) |
675 | 227 | cgen_bitset_set (info->private_data, ISA_M16C); |
676 | 679 | else |
677 | 679 | cgen_bitset_set (info->private_data, ISA_M32C); |
678 | 906 | } |
679 | 906 | break; |
680 | 0 | #endif |
681 | 0 | #ifdef ARCH_bpf |
682 | 23 | case bfd_arch_bpf: |
683 | 23 | info->created_styled_output = true; |
684 | 23 | break; |
685 | 0 | #endif |
686 | 0 | #ifdef ARCH_pru |
687 | 147 | case bfd_arch_pru: |
688 | 147 | info->disassembler_needs_relocs = true; |
689 | 147 | break; |
690 | 0 | #endif |
691 | 0 | #ifdef ARCH_powerpc |
692 | 1.04k | case bfd_arch_powerpc: |
693 | 1.04k | #endif |
694 | 1.04k | #ifdef ARCH_rs6000 |
695 | 1.14k | case bfd_arch_rs6000: |
696 | 1.14k | #endif |
697 | 1.14k | #if defined (ARCH_powerpc) || defined (ARCH_rs6000) |
698 | 1.14k | disassemble_init_powerpc (info); |
699 | 1.14k | info->created_styled_output = true; |
700 | 1.14k | break; |
701 | 0 | #endif |
702 | 0 | #ifdef ARCH_riscv |
703 | 1.58k | case bfd_arch_riscv: |
704 | 1.58k | info->symbol_is_valid = riscv_symbol_is_valid; |
705 | 1.58k | info->created_styled_output = true; |
706 | 1.58k | break; |
707 | 0 | #endif |
708 | 0 | #ifdef ARCH_wasm32 |
709 | 753 | case bfd_arch_wasm32: |
710 | 753 | disassemble_init_wasm32 (info); |
711 | 753 | break; |
712 | 0 | #endif |
713 | 0 | #ifdef ARCH_s390 |
714 | 243 | case bfd_arch_s390: |
715 | 243 | disassemble_init_s390 (info); |
716 | 243 | info->created_styled_output = true; |
717 | 243 | break; |
718 | 0 | #endif |
719 | 0 | #ifdef ARCH_nds32 |
720 | 1.32k | case bfd_arch_nds32: |
721 | 1.32k | disassemble_init_nds32 (info); |
722 | 1.32k | break; |
723 | 0 | #endif |
724 | 46.3k | default: |
725 | 46.3k | break; |
726 | 125k | } |
727 | 125k | } |
728 | | |
729 | | void |
730 | | disassemble_free_target (struct disassemble_info *info) |
731 | 125k | { |
732 | 125k | if (info == NULL) |
733 | 0 | return; |
734 | | |
735 | 125k | switch (info->arch) |
736 | 125k | { |
737 | 116k | default: |
738 | 116k | return; |
739 | | |
740 | 116k | #ifdef ARCH_m32c |
741 | 116k | case bfd_arch_m32c: |
742 | 906 | #endif |
743 | 906 | #if defined ARCH_m32c |
744 | 906 | if (info->private_data) |
745 | 906 | { |
746 | 906 | CGEN_BITSET *mask = info->private_data; |
747 | 906 | free (mask->bits); |
748 | 906 | } |
749 | 906 | break; |
750 | 0 | #endif |
751 | | |
752 | 0 | #ifdef ARCH_arc |
753 | 3.15k | case bfd_arch_arc: |
754 | 3.15k | break; |
755 | 0 | #endif |
756 | 0 | #ifdef ARCH_cris |
757 | 684 | case bfd_arch_cris: |
758 | 684 | break; |
759 | 0 | #endif |
760 | 0 | #ifdef ARCH_mmix |
761 | 359 | case bfd_arch_mmix: |
762 | 359 | break; |
763 | 0 | #endif |
764 | 0 | #ifdef ARCH_nfp |
765 | 1.16k | case bfd_arch_nfp: |
766 | 1.16k | break; |
767 | 0 | #endif |
768 | 0 | #ifdef ARCH_powerpc |
769 | 1.04k | case bfd_arch_powerpc: |
770 | 1.04k | disassemble_free_powerpc (info); |
771 | 1.04k | break; |
772 | 0 | #endif |
773 | 0 | #ifdef ARCH_riscv |
774 | 1.58k | case bfd_arch_riscv: |
775 | 1.58k | disassemble_free_riscv (info); |
776 | 1.58k | break; |
777 | 0 | #endif |
778 | 0 | #ifdef ARCH_rs6000 |
779 | 100 | case bfd_arch_rs6000: |
780 | 100 | break; |
781 | 125k | #endif |
782 | 125k | } |
783 | | |
784 | 8.99k | free (info->private_data); |
785 | 8.99k | } |
786 | | |
787 | | /* Remove whitespace and consecutive commas from OPTIONS. */ |
788 | | |
789 | | char * |
790 | | remove_whitespace_and_extra_commas (char *options) |
791 | 0 | { |
792 | 0 | char *str; |
793 | 0 | size_t i, len; |
794 | |
|
795 | 0 | if (options == NULL) |
796 | 0 | return NULL; |
797 | | |
798 | | /* Strip off all trailing whitespace and commas. */ |
799 | 0 | for (len = strlen (options); len > 0; len--) |
800 | 0 | { |
801 | 0 | if (!ISSPACE (options[len - 1]) && options[len - 1] != ',') |
802 | 0 | break; |
803 | 0 | options[len - 1] = '\0'; |
804 | 0 | } |
805 | | |
806 | | /* Convert all remaining whitespace to commas. */ |
807 | 0 | for (i = 0; options[i] != '\0'; i++) |
808 | 0 | if (ISSPACE (options[i])) |
809 | 0 | options[i] = ','; |
810 | | |
811 | | /* Remove consecutive commas. */ |
812 | 0 | for (str = options; *str != '\0'; str++) |
813 | 0 | if (*str == ',' && (*(str + 1) == ',' || str == options)) |
814 | 0 | { |
815 | 0 | char *next = str + 1; |
816 | 0 | while (*next == ',') |
817 | 0 | next++; |
818 | 0 | len = strlen (next); |
819 | 0 | if (str != options) |
820 | 0 | str++; |
821 | 0 | memmove (str, next, len); |
822 | 0 | next[len - (size_t)(next - str)] = '\0'; |
823 | 0 | } |
824 | 0 | return (strlen (options) != 0) ? options : NULL; |
825 | 0 | } |
826 | | |
827 | | /* Like STRCMP, but treat ',' the same as '\0' so that we match |
828 | | strings like "foobar" against "foobar,xxyyzz,...". */ |
829 | | |
830 | | int |
831 | | disassembler_options_cmp (const char *s1, const char *s2) |
832 | 130k | { |
833 | 130k | unsigned char c1, c2; |
834 | | |
835 | 130k | do |
836 | 197k | { |
837 | 197k | c1 = (unsigned char) *s1++; |
838 | 197k | if (c1 == ',') |
839 | 13.5k | c1 = '\0'; |
840 | 197k | c2 = (unsigned char) *s2++; |
841 | 197k | if (c2 == ',') |
842 | 2.87k | c2 = '\0'; |
843 | 197k | if (c1 == '\0') |
844 | 16.9k | return c1 - c2; |
845 | 197k | } |
846 | 181k | while (c1 == c2); |
847 | | |
848 | 113k | return c1 - c2; |
849 | 130k | } |
850 | | |
851 | | void |
852 | | opcodes_assert (const char *file, int line) |
853 | 0 | { |
854 | 0 | opcodes_error_handler (_("assertion fail %s:%d"), file, line); |
855 | 0 | opcodes_error_handler (_("Please report this bug")); |
856 | 0 | abort (); |
857 | 0 | } |
858 | | |
859 | | /* Set the stream, and the styled and unstyled printf functions within |
860 | | INFO. */ |
861 | | |
862 | | void |
863 | | disassemble_set_printf (struct disassemble_info *info, void *stream, |
864 | | fprintf_ftype unstyled_printf, |
865 | | fprintf_styled_ftype styled_printf) |
866 | 432M | { |
867 | 432M | info->stream = stream; |
868 | 432M | info->fprintf_func = unstyled_printf; |
869 | 432M | info->fprintf_styled_func = styled_printf; |
870 | 432M | } |