/src/binutils-gdb/opcodes/iq2000-asm.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
2 | | /* Assembler interface for targets using CGEN. -*- C -*- |
3 | | CGEN: Cpu tools GENerator |
4 | | |
5 | | THIS FILE IS MACHINE GENERATED WITH CGEN. |
6 | | - the resultant file is machine generated, cgen-asm.in isn't |
7 | | |
8 | | Copyright (C) 1996-2025 Free Software Foundation, Inc. |
9 | | |
10 | | This file is part of libopcodes. |
11 | | |
12 | | This library is free software; you can redistribute it and/or modify |
13 | | it under the terms of the GNU General Public License as published by |
14 | | the Free Software Foundation; either version 3, or (at your option) |
15 | | any later version. |
16 | | |
17 | | It is distributed in the hope that it will be useful, but WITHOUT |
18 | | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
19 | | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
20 | | License for more details. |
21 | | |
22 | | You should have received a copy of the GNU General Public License |
23 | | along with this program; if not, write to the Free Software Foundation, Inc., |
24 | | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
25 | | |
26 | | |
27 | | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
28 | | Keep that in mind. */ |
29 | | |
30 | | #include "sysdep.h" |
31 | | #include <stdio.h> |
32 | | #include "ansidecl.h" |
33 | | #include "bfd.h" |
34 | | #include "symcat.h" |
35 | | #include "iq2000-desc.h" |
36 | | #include "iq2000-opc.h" |
37 | | #include "opintl.h" |
38 | | #include "xregex.h" |
39 | | #include "libiberty.h" |
40 | | #include "safe-ctype.h" |
41 | | |
42 | | #undef min |
43 | | #define min(a,b) ((a) < (b) ? (a) : (b)) |
44 | | #undef max |
45 | | #define max(a,b) ((a) > (b) ? (a) : (b)) |
46 | | |
47 | | static const char * parse_insn_normal |
48 | | (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); |
49 | | |
50 | | /* -- assembler routines inserted here. */ |
51 | | |
52 | | /* -- asm.c */ |
53 | | |
54 | | #include "safe-ctype.h" |
55 | | |
56 | | static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'"); |
57 | | |
58 | | /* Special check to ensure that instruction exists for given machine. */ |
59 | | |
60 | | int |
61 | | iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) |
62 | 2.64M | { |
63 | 2.64M | int machs = cd->machs; |
64 | | |
65 | 2.64M | return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0; |
66 | 2.64M | } |
67 | | |
68 | | static int |
69 | | iq2000_cgen_isa_register (const char **strp) |
70 | 0 | { |
71 | 0 | int len; |
72 | 0 | int ch1, ch2; |
73 | |
|
74 | 0 | if (**strp == 'r' || **strp == 'R') |
75 | 0 | { |
76 | 0 | len = strlen (*strp); |
77 | 0 | if (len == 2) |
78 | 0 | { |
79 | 0 | ch1 = (*strp)[1]; |
80 | 0 | if ('0' <= ch1 && ch1 <= '9') |
81 | 0 | return 1; |
82 | 0 | } |
83 | 0 | else if (len == 3) |
84 | 0 | { |
85 | 0 | ch1 = (*strp)[1]; |
86 | 0 | ch2 = (*strp)[2]; |
87 | 0 | if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9')) |
88 | 0 | return 1; |
89 | 0 | if ('3' == ch1 && (ch2 == '0' || ch2 == '1')) |
90 | 0 | return 1; |
91 | 0 | } |
92 | 0 | } |
93 | 0 | if (**strp == '%' |
94 | 0 | && TOLOWER ((*strp)[1]) != 'l' |
95 | 0 | && TOLOWER ((*strp)[1]) != 'h') |
96 | 0 | return 1; |
97 | 0 | return 0; |
98 | 0 | } |
99 | | |
100 | | /* Handle negated literal. */ |
101 | | |
102 | | static const char * |
103 | | parse_mimm (CGEN_CPU_DESC cd, |
104 | | const char **strp, |
105 | | int opindex, |
106 | | unsigned long *valuep) |
107 | 0 | { |
108 | 0 | const char *errmsg; |
109 | | |
110 | | /* Verify this isn't a register. */ |
111 | 0 | if (iq2000_cgen_isa_register (strp)) |
112 | 0 | errmsg = _("immediate value cannot be register"); |
113 | 0 | else |
114 | 0 | { |
115 | 0 | long value; |
116 | |
|
117 | 0 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); |
118 | 0 | if (errmsg == NULL) |
119 | 0 | { |
120 | 0 | long x = (-value) & 0xFFFF0000; |
121 | |
|
122 | 0 | if (x != 0 && x != (long) 0xFFFF0000) |
123 | 0 | errmsg = _("immediate value out of range"); |
124 | 0 | else |
125 | 0 | *valuep = (-value & 0xFFFF); |
126 | 0 | } |
127 | 0 | } |
128 | 0 | return errmsg; |
129 | 0 | } |
130 | | |
131 | | /* Handle signed/unsigned literal. */ |
132 | | |
133 | | static const char * |
134 | | parse_imm (CGEN_CPU_DESC cd, |
135 | | const char **strp, |
136 | | int opindex, |
137 | | unsigned long *valuep) |
138 | 0 | { |
139 | 0 | const char *errmsg; |
140 | |
|
141 | 0 | if (iq2000_cgen_isa_register (strp)) |
142 | 0 | errmsg = _("immediate value cannot be register"); |
143 | 0 | else |
144 | 0 | { |
145 | 0 | long value; |
146 | |
|
147 | 0 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); |
148 | 0 | if (errmsg == NULL) |
149 | 0 | { |
150 | 0 | long x = value & 0xFFFF0000; |
151 | |
|
152 | 0 | if (x != 0 && x != (long) 0xFFFF0000) |
153 | 0 | errmsg = _("immediate value out of range"); |
154 | 0 | else |
155 | 0 | *valuep = (value & 0xFFFF); |
156 | 0 | } |
157 | 0 | } |
158 | 0 | return errmsg; |
159 | 0 | } |
160 | | |
161 | | /* Handle iq10 21-bit jmp offset. */ |
162 | | |
163 | | static const char * |
164 | | parse_jtargq10 (CGEN_CPU_DESC cd, |
165 | | const char **strp, |
166 | | int opindex, |
167 | | int reloc ATTRIBUTE_UNUSED, |
168 | | enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, |
169 | | bfd_vma *valuep) |
170 | 0 | { |
171 | 0 | const char *errmsg; |
172 | 0 | bfd_vma value; |
173 | 0 | enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER; |
174 | |
|
175 | 0 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21, |
176 | 0 | & result_type, & value); |
177 | 0 | if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
178 | 0 | { |
179 | | /* Check value is within 23-bits |
180 | | (remembering that 2-bit shift right will occur). */ |
181 | 0 | if (value > 0x7fffff) |
182 | 0 | return _("21-bit offset out of range"); |
183 | 0 | } |
184 | 0 | *valuep = (value & 0x7FFFFF); |
185 | 0 | return errmsg; |
186 | 0 | } |
187 | | |
188 | | /* Handle high(). */ |
189 | | |
190 | | static const char * |
191 | | parse_hi16 (CGEN_CPU_DESC cd, |
192 | | const char **strp, |
193 | | int opindex, |
194 | | unsigned long *valuep) |
195 | 0 | { |
196 | 0 | if (strncasecmp (*strp, "%hi(", 4) == 0) |
197 | 0 | { |
198 | 0 | enum cgen_parse_operand_result result_type; |
199 | 0 | bfd_vma value; |
200 | 0 | const char *errmsg; |
201 | |
|
202 | 0 | *strp += 4; |
203 | 0 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, |
204 | 0 | & result_type, & value); |
205 | 0 | if (**strp != ')') |
206 | 0 | return MISSING_CLOSING_PARENTHESIS; |
207 | | |
208 | 0 | ++*strp; |
209 | 0 | if (errmsg == NULL |
210 | 0 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
211 | 0 | { |
212 | | /* If value has top-bit of %lo on, then it will |
213 | | sign-propagate and so we compensate by adding |
214 | | 1 to the resultant %hi value. */ |
215 | 0 | if (value & 0x8000) |
216 | 0 | value += 0x10000; |
217 | 0 | value >>= 16; |
218 | 0 | value &= 0xffff; |
219 | 0 | } |
220 | 0 | *valuep = value; |
221 | |
|
222 | 0 | return errmsg; |
223 | 0 | } |
224 | | |
225 | | /* We add %uhi in case a user just wants the high 16-bits or is using |
226 | | an insn like ori for %lo which does not sign-propagate. */ |
227 | 0 | if (strncasecmp (*strp, "%uhi(", 5) == 0) |
228 | 0 | { |
229 | 0 | enum cgen_parse_operand_result result_type; |
230 | 0 | bfd_vma value; |
231 | 0 | const char *errmsg; |
232 | |
|
233 | 0 | *strp += 5; |
234 | 0 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16, |
235 | 0 | & result_type, & value); |
236 | 0 | if (**strp != ')') |
237 | 0 | return MISSING_CLOSING_PARENTHESIS; |
238 | | |
239 | 0 | ++*strp; |
240 | 0 | if (errmsg == NULL |
241 | 0 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
242 | 0 | value >>= 16; |
243 | |
|
244 | 0 | value &= 0xffff; |
245 | 0 | *valuep = value; |
246 | |
|
247 | 0 | return errmsg; |
248 | 0 | } |
249 | | |
250 | 0 | return parse_imm (cd, strp, opindex, valuep); |
251 | 0 | } |
252 | | |
253 | | /* Handle %lo in a signed context. |
254 | | The signedness of the value doesn't matter to %lo(), but this also |
255 | | handles the case where %lo() isn't present. */ |
256 | | |
257 | | static const char * |
258 | | parse_lo16 (CGEN_CPU_DESC cd, |
259 | | const char **strp, |
260 | | int opindex, |
261 | | unsigned long *valuep) |
262 | 0 | { |
263 | 0 | if (strncasecmp (*strp, "%lo(", 4) == 0) |
264 | 0 | { |
265 | 0 | const char *errmsg; |
266 | 0 | enum cgen_parse_operand_result result_type; |
267 | 0 | bfd_vma value; |
268 | |
|
269 | 0 | *strp += 4; |
270 | 0 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, |
271 | 0 | & result_type, & value); |
272 | 0 | if (**strp != ')') |
273 | 0 | return MISSING_CLOSING_PARENTHESIS; |
274 | 0 | ++*strp; |
275 | 0 | if (errmsg == NULL |
276 | 0 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
277 | 0 | value &= 0xffff; |
278 | 0 | *valuep = value; |
279 | 0 | return errmsg; |
280 | 0 | } |
281 | | |
282 | 0 | return parse_imm (cd, strp, opindex, valuep); |
283 | 0 | } |
284 | | |
285 | | /* Handle %lo in a negated signed context. |
286 | | The signedness of the value doesn't matter to %lo(), but this also |
287 | | handles the case where %lo() isn't present. */ |
288 | | |
289 | | static const char * |
290 | | parse_mlo16 (CGEN_CPU_DESC cd, |
291 | | const char **strp, |
292 | | int opindex, |
293 | | unsigned long *valuep) |
294 | 0 | { |
295 | 0 | if (strncasecmp (*strp, "%lo(", 4) == 0) |
296 | 0 | { |
297 | 0 | const char *errmsg; |
298 | 0 | enum cgen_parse_operand_result result_type; |
299 | 0 | bfd_vma value; |
300 | |
|
301 | 0 | *strp += 4; |
302 | 0 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, |
303 | 0 | & result_type, & value); |
304 | 0 | if (**strp != ')') |
305 | 0 | return MISSING_CLOSING_PARENTHESIS; |
306 | 0 | ++*strp; |
307 | 0 | if (errmsg == NULL |
308 | 0 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
309 | 0 | value = (-value) & 0xffff; |
310 | 0 | *valuep = value; |
311 | 0 | return errmsg; |
312 | 0 | } |
313 | | |
314 | 0 | return parse_mimm (cd, strp, opindex, valuep); |
315 | 0 | } |
316 | | |
317 | | /* -- */ |
318 | | |
319 | | const char * iq2000_cgen_parse_operand |
320 | | (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); |
321 | | |
322 | | /* Main entry point for operand parsing. |
323 | | |
324 | | This function is basically just a big switch statement. Earlier versions |
325 | | used tables to look up the function to use, but |
326 | | - if the table contains both assembler and disassembler functions then |
327 | | the disassembler contains much of the assembler and vice-versa, |
328 | | - there's a lot of inlining possibilities as things grow, |
329 | | - using a switch statement avoids the function call overhead. |
330 | | |
331 | | This function could be moved into `parse_insn_normal', but keeping it |
332 | | separate makes clear the interface between `parse_insn_normal' and each of |
333 | | the handlers. */ |
334 | | |
335 | | const char * |
336 | | iq2000_cgen_parse_operand (CGEN_CPU_DESC cd, |
337 | | int opindex, |
338 | | const char ** strp, |
339 | | CGEN_FIELDS * fields) |
340 | 0 | { |
341 | 0 | const char * errmsg = NULL; |
342 | | /* Used by scalar operands that still need to be parsed. */ |
343 | 0 | long junk ATTRIBUTE_UNUSED; |
344 | |
|
345 | 0 | switch (opindex) |
346 | 0 | { |
347 | 0 | case IQ2000_OPERAND__INDEX : |
348 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index)); |
349 | 0 | break; |
350 | 0 | case IQ2000_OPERAND_BASE : |
351 | 0 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); |
352 | 0 | break; |
353 | 0 | case IQ2000_OPERAND_BASEOFF : |
354 | 0 | { |
355 | 0 | bfd_vma value = 0; |
356 | 0 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value); |
357 | 0 | fields->f_imm = value; |
358 | 0 | } |
359 | 0 | break; |
360 | 0 | case IQ2000_OPERAND_BITNUM : |
361 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt)); |
362 | 0 | break; |
363 | 0 | case IQ2000_OPERAND_BYTECOUNT : |
364 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount)); |
365 | 0 | break; |
366 | 0 | case IQ2000_OPERAND_CAM_Y : |
367 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y)); |
368 | 0 | break; |
369 | 0 | case IQ2000_OPERAND_CAM_Z : |
370 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z)); |
371 | 0 | break; |
372 | 0 | case IQ2000_OPERAND_CM_3FUNC : |
373 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func)); |
374 | 0 | break; |
375 | 0 | case IQ2000_OPERAND_CM_3Z : |
376 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z)); |
377 | 0 | break; |
378 | 0 | case IQ2000_OPERAND_CM_4FUNC : |
379 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func)); |
380 | 0 | break; |
381 | 0 | case IQ2000_OPERAND_CM_4Z : |
382 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z)); |
383 | 0 | break; |
384 | 0 | case IQ2000_OPERAND_COUNT : |
385 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count)); |
386 | 0 | break; |
387 | 0 | case IQ2000_OPERAND_EXECODE : |
388 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode)); |
389 | 0 | break; |
390 | 0 | case IQ2000_OPERAND_HI16 : |
391 | 0 | errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm)); |
392 | 0 | break; |
393 | 0 | case IQ2000_OPERAND_IMM : |
394 | 0 | errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm)); |
395 | 0 | break; |
396 | 0 | case IQ2000_OPERAND_JMPTARG : |
397 | 0 | { |
398 | 0 | bfd_vma value = 0; |
399 | 0 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value); |
400 | 0 | fields->f_jtarg = value; |
401 | 0 | } |
402 | 0 | break; |
403 | 0 | case IQ2000_OPERAND_JMPTARGQ10 : |
404 | 0 | { |
405 | 0 | bfd_vma value = 0; |
406 | 0 | errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value); |
407 | 0 | fields->f_jtargq10 = value; |
408 | 0 | } |
409 | 0 | break; |
410 | 0 | case IQ2000_OPERAND_LO16 : |
411 | 0 | errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm)); |
412 | 0 | break; |
413 | 0 | case IQ2000_OPERAND_MASK : |
414 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask)); |
415 | 0 | break; |
416 | 0 | case IQ2000_OPERAND_MASKL : |
417 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl)); |
418 | 0 | break; |
419 | 0 | case IQ2000_OPERAND_MASKQ10 : |
420 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10)); |
421 | 0 | break; |
422 | 0 | case IQ2000_OPERAND_MASKR : |
423 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs)); |
424 | 0 | break; |
425 | 0 | case IQ2000_OPERAND_MLO16 : |
426 | 0 | errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm)); |
427 | 0 | break; |
428 | 0 | case IQ2000_OPERAND_OFFSET : |
429 | 0 | { |
430 | 0 | bfd_vma value = 0; |
431 | 0 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value); |
432 | 0 | fields->f_offset = value; |
433 | 0 | } |
434 | 0 | break; |
435 | 0 | case IQ2000_OPERAND_RD : |
436 | 0 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd); |
437 | 0 | break; |
438 | 0 | case IQ2000_OPERAND_RD_RS : |
439 | 0 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs); |
440 | 0 | break; |
441 | 0 | case IQ2000_OPERAND_RD_RT : |
442 | 0 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt); |
443 | 0 | break; |
444 | 0 | case IQ2000_OPERAND_RS : |
445 | 0 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); |
446 | 0 | break; |
447 | 0 | case IQ2000_OPERAND_RT : |
448 | 0 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt); |
449 | 0 | break; |
450 | 0 | case IQ2000_OPERAND_RT_RS : |
451 | 0 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs); |
452 | 0 | break; |
453 | 0 | case IQ2000_OPERAND_SHAMT : |
454 | 0 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt)); |
455 | 0 | break; |
456 | | |
457 | 0 | default : |
458 | | /* xgettext:c-format */ |
459 | 0 | opcodes_error_handler |
460 | 0 | (_("internal error: unrecognized field %d while parsing"), |
461 | 0 | opindex); |
462 | 0 | abort (); |
463 | 0 | } |
464 | | |
465 | 0 | return errmsg; |
466 | 0 | } |
467 | | |
468 | | cgen_parse_fn * const iq2000_cgen_parse_handlers[] = |
469 | | { |
470 | | parse_insn_normal, |
471 | | }; |
472 | | |
473 | | void |
474 | | iq2000_cgen_init_asm (CGEN_CPU_DESC cd) |
475 | 0 | { |
476 | 0 | iq2000_cgen_init_opcode_table (cd); |
477 | 0 | iq2000_cgen_init_ibld_table (cd); |
478 | 0 | cd->parse_handlers = & iq2000_cgen_parse_handlers[0]; |
479 | 0 | cd->parse_operand = iq2000_cgen_parse_operand; |
480 | | #ifdef CGEN_ASM_INIT_HOOK |
481 | | CGEN_ASM_INIT_HOOK |
482 | | #endif |
483 | 0 | } |
484 | | |
485 | | |
486 | | |
487 | | /* Regex construction routine. |
488 | | |
489 | | This translates an opcode syntax string into a regex string, |
490 | | by replacing any non-character syntax element (such as an |
491 | | opcode) with the pattern '.*' |
492 | | |
493 | | It then compiles the regex and stores it in the opcode, for |
494 | | later use by iq2000_cgen_assemble_insn |
495 | | |
496 | | Returns NULL for success, an error message for failure. */ |
497 | | |
498 | | char * |
499 | | iq2000_cgen_build_insn_regex (CGEN_INSN *insn) |
500 | 1.48k | { |
501 | 1.48k | CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); |
502 | 1.48k | const char *mnem = CGEN_INSN_MNEMONIC (insn); |
503 | 1.48k | char rxbuf[CGEN_MAX_RX_ELEMENTS]; |
504 | 1.48k | char *rx = rxbuf; |
505 | 1.48k | const CGEN_SYNTAX_CHAR_TYPE *syn; |
506 | 1.48k | int reg_err; |
507 | | |
508 | 1.48k | syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); |
509 | | |
510 | | /* Mnemonics come first in the syntax string. */ |
511 | 1.48k | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) |
512 | 4 | return _("missing mnemonic in syntax string"); |
513 | 1.47k | ++syn; |
514 | | |
515 | | /* Generate a case sensitive regular expression that emulates case |
516 | | insensitive matching in the "C" locale. We cannot generate a case |
517 | | insensitive regular expression because in Turkish locales, 'i' and 'I' |
518 | | are not equal modulo case conversion. */ |
519 | | |
520 | | /* Copy the literal mnemonic out of the insn. */ |
521 | 8.28k | for (; *mnem; mnem++) |
522 | 6.80k | { |
523 | 6.80k | char c = *mnem; |
524 | | |
525 | 6.80k | if (ISALPHA (c)) |
526 | 5.81k | { |
527 | 5.81k | *rx++ = '['; |
528 | 5.81k | *rx++ = TOLOWER (c); |
529 | 5.81k | *rx++ = TOUPPER (c); |
530 | 5.81k | *rx++ = ']'; |
531 | 5.81k | } |
532 | 988 | else |
533 | 988 | *rx++ = c; |
534 | 6.80k | } |
535 | | |
536 | | /* Copy any remaining literals from the syntax string into the rx. */ |
537 | 8.45k | for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) |
538 | 6.97k | { |
539 | 6.97k | if (CGEN_SYNTAX_CHAR_P (* syn)) |
540 | 3.51k | { |
541 | 3.51k | char c = CGEN_SYNTAX_CHAR (* syn); |
542 | | |
543 | 3.51k | switch (c) |
544 | 3.51k | { |
545 | | /* Escape any regex metacharacters in the syntax. */ |
546 | 0 | case '.': case '[': case '\\': |
547 | 0 | case '*': case '^': case '$': |
548 | |
|
549 | | #ifdef CGEN_ESCAPE_EXTENDED_REGEX |
550 | | case '?': case '{': case '}': |
551 | | case '(': case ')': case '*': |
552 | | case '|': case '+': case ']': |
553 | | #endif |
554 | 0 | *rx++ = '\\'; |
555 | 0 | *rx++ = c; |
556 | 0 | break; |
557 | | |
558 | 3.51k | default: |
559 | 3.51k | if (ISALPHA (c)) |
560 | 0 | { |
561 | 0 | *rx++ = '['; |
562 | 0 | *rx++ = TOLOWER (c); |
563 | 0 | *rx++ = TOUPPER (c); |
564 | 0 | *rx++ = ']'; |
565 | 0 | } |
566 | 3.51k | else |
567 | 3.51k | *rx++ = c; |
568 | 3.51k | break; |
569 | 3.51k | } |
570 | 3.51k | } |
571 | 3.46k | else |
572 | 3.46k | { |
573 | | /* Replace non-syntax fields with globs. */ |
574 | 3.46k | *rx++ = '.'; |
575 | 3.46k | *rx++ = '*'; |
576 | 3.46k | } |
577 | 6.97k | } |
578 | | |
579 | | /* Trailing whitespace ok. */ |
580 | 1.47k | * rx++ = '['; |
581 | 1.47k | * rx++ = ' '; |
582 | 1.47k | * rx++ = '\t'; |
583 | 1.47k | * rx++ = ']'; |
584 | 1.47k | * rx++ = '*'; |
585 | | |
586 | | /* But anchor it after that. */ |
587 | 1.47k | * rx++ = '$'; |
588 | 1.47k | * rx = '\0'; |
589 | | |
590 | 1.47k | CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); |
591 | 1.47k | reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); |
592 | | |
593 | 1.47k | if (reg_err == 0) |
594 | 1.47k | return NULL; |
595 | 0 | else |
596 | 0 | { |
597 | 0 | static char msg[80]; |
598 | |
|
599 | 0 | regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); |
600 | 0 | regfree ((regex_t *) CGEN_INSN_RX (insn)); |
601 | 0 | free (CGEN_INSN_RX (insn)); |
602 | 0 | (CGEN_INSN_RX (insn)) = NULL; |
603 | 0 | return msg; |
604 | 0 | } |
605 | 1.47k | } |
606 | | |
607 | | |
608 | | /* Default insn parser. |
609 | | |
610 | | The syntax string is scanned and operands are parsed and stored in FIELDS. |
611 | | Relocs are queued as we go via other callbacks. |
612 | | |
613 | | ??? Note that this is currently an all-or-nothing parser. If we fail to |
614 | | parse the instruction, we return 0 and the caller will start over from |
615 | | the beginning. Backtracking will be necessary in parsing subexpressions, |
616 | | but that can be handled there. Not handling backtracking here may get |
617 | | expensive in the case of the m68k. Deal with later. |
618 | | |
619 | | Returns NULL for success, an error message for failure. */ |
620 | | |
621 | | static const char * |
622 | | parse_insn_normal (CGEN_CPU_DESC cd, |
623 | | const CGEN_INSN *insn, |
624 | | const char **strp, |
625 | | CGEN_FIELDS *fields) |
626 | 0 | { |
627 | | /* ??? Runtime added insns not handled yet. */ |
628 | 0 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
629 | 0 | const char *str = *strp; |
630 | 0 | const char *errmsg; |
631 | 0 | const char *p; |
632 | 0 | const CGEN_SYNTAX_CHAR_TYPE * syn; |
633 | 0 | #ifdef CGEN_MNEMONIC_OPERANDS |
634 | | /* FIXME: wip */ |
635 | 0 | int past_opcode_p; |
636 | 0 | #endif |
637 | | |
638 | | /* For now we assume the mnemonic is first (there are no leading operands). |
639 | | We can parse it without needing to set up operand parsing. |
640 | | GAS's input scrubber will ensure mnemonics are lowercase, but we may |
641 | | not be called from GAS. */ |
642 | 0 | p = CGEN_INSN_MNEMONIC (insn); |
643 | 0 | while (*p && TOLOWER (*p) == TOLOWER (*str)) |
644 | 0 | ++p, ++str; |
645 | |
|
646 | 0 | if (* p) |
647 | 0 | return _("unrecognized instruction"); |
648 | | |
649 | | #ifndef CGEN_MNEMONIC_OPERANDS |
650 | | if (* str && ! ISSPACE (* str)) |
651 | | return _("unrecognized instruction"); |
652 | | #endif |
653 | | |
654 | 0 | CGEN_INIT_PARSE (cd); |
655 | 0 | cgen_init_parse_operand (cd); |
656 | 0 | #ifdef CGEN_MNEMONIC_OPERANDS |
657 | 0 | past_opcode_p = 0; |
658 | 0 | #endif |
659 | | |
660 | | /* We don't check for (*str != '\0') here because we want to parse |
661 | | any trailing fake arguments in the syntax string. */ |
662 | 0 | syn = CGEN_SYNTAX_STRING (syntax); |
663 | | |
664 | | /* Mnemonics come first for now, ensure valid string. */ |
665 | 0 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) |
666 | 0 | abort (); |
667 | | |
668 | 0 | ++syn; |
669 | |
|
670 | 0 | while (* syn != 0) |
671 | 0 | { |
672 | | /* Non operand chars must match exactly. */ |
673 | 0 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
674 | 0 | { |
675 | | /* FIXME: While we allow for non-GAS callers above, we assume the |
676 | | first char after the mnemonic part is a space. */ |
677 | | /* FIXME: We also take inappropriate advantage of the fact that |
678 | | GAS's input scrubber will remove extraneous blanks. */ |
679 | 0 | if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) |
680 | 0 | { |
681 | 0 | #ifdef CGEN_MNEMONIC_OPERANDS |
682 | 0 | if (CGEN_SYNTAX_CHAR(* syn) == ' ') |
683 | 0 | past_opcode_p = 1; |
684 | 0 | #endif |
685 | 0 | ++ syn; |
686 | 0 | ++ str; |
687 | 0 | } |
688 | 0 | else if (*str) |
689 | 0 | { |
690 | | /* Syntax char didn't match. Can't be this insn. */ |
691 | 0 | static char msg [80]; |
692 | | |
693 | | /* xgettext:c-format */ |
694 | 0 | sprintf (msg, _("syntax error (expected char `%c', found `%c')"), |
695 | 0 | CGEN_SYNTAX_CHAR(*syn), *str); |
696 | 0 | return msg; |
697 | 0 | } |
698 | 0 | else |
699 | 0 | { |
700 | | /* Ran out of input. */ |
701 | 0 | static char msg [80]; |
702 | | |
703 | | /* xgettext:c-format */ |
704 | 0 | sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), |
705 | 0 | CGEN_SYNTAX_CHAR(*syn)); |
706 | 0 | return msg; |
707 | 0 | } |
708 | 0 | continue; |
709 | 0 | } |
710 | | |
711 | 0 | #ifdef CGEN_MNEMONIC_OPERANDS |
712 | 0 | (void) past_opcode_p; |
713 | 0 | #endif |
714 | | /* We have an operand of some sort. */ |
715 | 0 | errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); |
716 | 0 | if (errmsg) |
717 | 0 | return errmsg; |
718 | | |
719 | | /* Done with this operand, continue with next one. */ |
720 | 0 | ++ syn; |
721 | 0 | } |
722 | | |
723 | | /* If we're at the end of the syntax string, we're done. */ |
724 | 0 | if (* syn == 0) |
725 | 0 | { |
726 | | /* FIXME: For the moment we assume a valid `str' can only contain |
727 | | blanks now. IE: We needn't try again with a longer version of |
728 | | the insn and it is assumed that longer versions of insns appear |
729 | | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ |
730 | 0 | while (ISSPACE (* str)) |
731 | 0 | ++ str; |
732 | |
|
733 | 0 | if (* str != '\0') |
734 | 0 | return _("junk at end of line"); /* FIXME: would like to include `str' */ |
735 | | |
736 | 0 | return NULL; |
737 | 0 | } |
738 | | |
739 | | /* We couldn't parse it. */ |
740 | 0 | return _("unrecognized instruction"); |
741 | 0 | } |
742 | | |
743 | | /* Main entry point. |
744 | | This routine is called for each instruction to be assembled. |
745 | | STR points to the insn to be assembled. |
746 | | We assume all necessary tables have been initialized. |
747 | | The assembled instruction, less any fixups, is stored in BUF. |
748 | | Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value |
749 | | still needs to be converted to target byte order, otherwise BUF is an array |
750 | | of bytes in target byte order. |
751 | | The result is a pointer to the insn's entry in the opcode table, |
752 | | or NULL if an error occured (an error message will have already been |
753 | | printed). |
754 | | |
755 | | Note that when processing (non-alias) macro-insns, |
756 | | this function recurses. |
757 | | |
758 | | ??? It's possible to make this cpu-independent. |
759 | | One would have to deal with a few minor things. |
760 | | At this point in time doing so would be more of a curiosity than useful |
761 | | [for example this file isn't _that_ big], but keeping the possibility in |
762 | | mind helps keep the design clean. */ |
763 | | |
764 | | const CGEN_INSN * |
765 | | iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd, |
766 | | const char *str, |
767 | | CGEN_FIELDS *fields, |
768 | | CGEN_INSN_BYTES_PTR buf, |
769 | | char **errmsg) |
770 | 0 | { |
771 | 0 | const char *start; |
772 | 0 | CGEN_INSN_LIST *ilist; |
773 | 0 | const char *parse_errmsg = NULL; |
774 | 0 | const char *insert_errmsg = NULL; |
775 | 0 | int recognized_mnemonic = 0; |
776 | | |
777 | | /* Skip leading white space. */ |
778 | 0 | while (ISSPACE (* str)) |
779 | 0 | ++ str; |
780 | | |
781 | | /* The instructions are stored in hashed lists. |
782 | | Get the first in the list. */ |
783 | 0 | ilist = CGEN_ASM_LOOKUP_INSN (cd, str); |
784 | | |
785 | | /* Keep looking until we find a match. */ |
786 | 0 | start = str; |
787 | 0 | for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) |
788 | 0 | { |
789 | 0 | const CGEN_INSN *insn = ilist->insn; |
790 | 0 | recognized_mnemonic = 1; |
791 | |
|
792 | 0 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED |
793 | | /* Not usually needed as unsupported opcodes |
794 | | shouldn't be in the hash lists. */ |
795 | | /* Is this insn supported by the selected cpu? */ |
796 | 0 | if (! iq2000_cgen_insn_supported (cd, insn)) |
797 | 0 | continue; |
798 | 0 | #endif |
799 | | /* If the RELAXED attribute is set, this is an insn that shouldn't be |
800 | | chosen immediately. Instead, it is used during assembler/linker |
801 | | relaxation if possible. */ |
802 | 0 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) |
803 | 0 | continue; |
804 | | |
805 | 0 | str = start; |
806 | | |
807 | | /* Skip this insn if str doesn't look right lexically. */ |
808 | 0 | if (CGEN_INSN_RX (insn) != NULL && |
809 | 0 | regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) |
810 | 0 | continue; |
811 | | |
812 | | /* Allow parse/insert handlers to obtain length of insn. */ |
813 | 0 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); |
814 | |
|
815 | 0 | parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); |
816 | 0 | if (parse_errmsg != NULL) |
817 | 0 | continue; |
818 | | |
819 | | /* ??? 0 is passed for `pc'. */ |
820 | 0 | insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, |
821 | 0 | (bfd_vma) 0); |
822 | 0 | if (insert_errmsg != NULL) |
823 | 0 | continue; |
824 | | |
825 | | /* It is up to the caller to actually output the insn and any |
826 | | queued relocs. */ |
827 | 0 | return insn; |
828 | 0 | } |
829 | | |
830 | 0 | { |
831 | 0 | static char errbuf[150]; |
832 | 0 | const char *tmp_errmsg; |
833 | 0 | #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS |
834 | 0 | #define be_verbose 1 |
835 | | #else |
836 | | #define be_verbose 0 |
837 | | #endif |
838 | |
|
839 | 0 | if (be_verbose) |
840 | 0 | { |
841 | | /* If requesting verbose error messages, use insert_errmsg. |
842 | | Failing that, use parse_errmsg. */ |
843 | 0 | tmp_errmsg = (insert_errmsg ? insert_errmsg : |
844 | 0 | parse_errmsg ? parse_errmsg : |
845 | 0 | recognized_mnemonic ? |
846 | 0 | _("unrecognized form of instruction") : |
847 | 0 | _("unrecognized instruction")); |
848 | |
|
849 | 0 | if (strlen (start) > 50) |
850 | | /* xgettext:c-format */ |
851 | 0 | sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); |
852 | 0 | else |
853 | | /* xgettext:c-format */ |
854 | 0 | sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); |
855 | 0 | } |
856 | 0 | else |
857 | 0 | { |
858 | 0 | if (strlen (start) > 50) |
859 | | /* xgettext:c-format */ |
860 | 0 | sprintf (errbuf, _("bad instruction `%.50s...'"), start); |
861 | 0 | else |
862 | | /* xgettext:c-format */ |
863 | 0 | sprintf (errbuf, _("bad instruction `%.50s'"), start); |
864 | 0 | } |
865 | |
|
866 | 0 | *errmsg = errbuf; |
867 | 0 | return NULL; |
868 | 0 | } |
869 | 0 | } |