Coverage Report

Created: 2025-06-24 06:45

/src/binutils-gdb/opcodes/lm32-opc.c
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/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
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/* Instruction opcode table for lm32.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996-2025 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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   This file is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3, or (at your option)
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   any later version.
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   It is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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   License for more details.
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   You should have received a copy of the GNU General Public License along
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   with this program; if not, write to the Free Software Foundation, Inc.,
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   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include "sysdep.h"
27
#include "ansidecl.h"
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#include "bfd.h"
29
#include "symcat.h"
30
#include "lm32-desc.h"
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#include "lm32-opc.h"
32
#include "libiberty.h"
33
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/* The hash functions are recorded here to help keep assembler code out of
35
   the disassembler and vice versa.  */
36
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static int asm_hash_insn_p        (const CGEN_INSN *);
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static unsigned int asm_hash_insn (const char *);
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static int dis_hash_insn_p        (const CGEN_INSN *);
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static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
41
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/* Instruction formats.  */
43
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#define F(f) & lm32_cgen_ifld_table[LM32_##f]
45
static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
46
  0, 0, 0x0, { { 0 } }
47
};
48
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static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
50
  32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
51
};
52
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static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
54
  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
55
};
56
57
static const CGEN_IFMT ifmt_andi ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
59
};
60
61
static const CGEN_IFMT ifmt_andhii ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
63
};
64
65
static const CGEN_IFMT ifmt_b ATTRIBUTE_UNUSED = {
66
  32, 32, 0xfc1fffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
67
};
68
69
static const CGEN_IFMT ifmt_bi ATTRIBUTE_UNUSED = {
70
  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_CALL) }, { 0 } }
71
};
72
73
static const CGEN_IFMT ifmt_be ATTRIBUTE_UNUSED = {
74
  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_BRANCH) }, { 0 } }
75
};
76
77
static const CGEN_IFMT ifmt_ori ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
79
};
80
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static const CGEN_IFMT ifmt_rcsr ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc1f07ff, { { F (F_OPCODE) }, { F (F_CSR) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
83
};
84
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static const CGEN_IFMT ifmt_sextb ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc1f07ff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
87
};
88
89
static const CGEN_IFMT ifmt_user ATTRIBUTE_UNUSED = {
90
  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_USER) }, { 0 } }
91
};
92
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static const CGEN_IFMT ifmt_wcsr ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_CSR) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
95
};
96
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static const CGEN_IFMT ifmt_break ATTRIBUTE_UNUSED = {
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  32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_EXCEPTION) }, { 0 } }
99
};
100
101
static const CGEN_IFMT ifmt_bret ATTRIBUTE_UNUSED = {
102
  32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
103
};
104
105
static const CGEN_IFMT ifmt_mvi ATTRIBUTE_UNUSED = {
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  32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
107
};
108
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static const CGEN_IFMT ifmt_mvui ATTRIBUTE_UNUSED = {
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  32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
111
};
112
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static const CGEN_IFMT ifmt_mvhi ATTRIBUTE_UNUSED = {
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  32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
115
};
116
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static const CGEN_IFMT ifmt_mva ATTRIBUTE_UNUSED = {
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  32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
119
};
120
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static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
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  32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
123
};
124
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static const CGEN_IFMT ifmt_lwgotrel ATTRIBUTE_UNUSED = {
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  32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
127
};
128
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static const CGEN_IFMT ifmt_orhigotoffi ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
131
};
132
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static const CGEN_IFMT ifmt_addgotoff ATTRIBUTE_UNUSED = {
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  32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
135
};
136
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#undef F
138
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#define A(a) (1 << CGEN_INSN_##a)
140
#define OPERAND(op) LM32_OPERAND_##op
141
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
142
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
143
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/* The instruction table.  */
145
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static const CGEN_OPCODE lm32_cgen_insn_opcode_table[MAX_INSNS] =
147
{
148
  /* Special null first entry.
149
     A `num' value of zero is thus invalid.
150
     Also, the special `invalid' insn resides here.  */
151
  { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
152
/* add $r2,$r0,$r1 */
153
  {
154
    { 0, 0, 0, 0 },
155
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
156
    & ifmt_add, { 0xb4000000 }
157
  },
158
/* addi $r1,$r0,$imm */
159
  {
160
    { 0, 0, 0, 0 },
161
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
162
    & ifmt_addi, { 0x34000000 }
163
  },
164
/* and $r2,$r0,$r1 */
165
  {
166
    { 0, 0, 0, 0 },
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    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
168
    & ifmt_add, { 0xa0000000 }
169
  },
170
/* andi $r1,$r0,$uimm */
171
  {
172
    { 0, 0, 0, 0 },
173
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
174
    & ifmt_andi, { 0x20000000 }
175
  },
176
/* andhi $r1,$r0,$hi16 */
177
  {
178
    { 0, 0, 0, 0 },
179
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
180
    & ifmt_andhii, { 0x60000000 }
181
  },
182
/* b $r0 */
183
  {
184
    { 0, 0, 0, 0 },
185
    { { MNEM, ' ', OP (R0), 0 } },
186
    & ifmt_b, { 0xc0000000 }
187
  },
188
/* bi $call */
189
  {
190
    { 0, 0, 0, 0 },
191
    { { MNEM, ' ', OP (CALL), 0 } },
192
    & ifmt_bi, { 0xe0000000 }
193
  },
194
/* be $r0,$r1,$branch */
195
  {
196
    { 0, 0, 0, 0 },
197
    { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
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    & ifmt_be, { 0x44000000 }
199
  },
200
/* bg $r0,$r1,$branch */
201
  {
202
    { 0, 0, 0, 0 },
203
    { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
204
    & ifmt_be, { 0x48000000 }
205
  },
206
/* bge $r0,$r1,$branch */
207
  {
208
    { 0, 0, 0, 0 },
209
    { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
210
    & ifmt_be, { 0x4c000000 }
211
  },
212
/* bgeu $r0,$r1,$branch */
213
  {
214
    { 0, 0, 0, 0 },
215
    { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
216
    & ifmt_be, { 0x50000000 }
217
  },
218
/* bgu $r0,$r1,$branch */
219
  {
220
    { 0, 0, 0, 0 },
221
    { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
222
    & ifmt_be, { 0x54000000 }
223
  },
224
/* bne $r0,$r1,$branch */
225
  {
226
    { 0, 0, 0, 0 },
227
    { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
228
    & ifmt_be, { 0x5c000000 }
229
  },
230
/* call $r0 */
231
  {
232
    { 0, 0, 0, 0 },
233
    { { MNEM, ' ', OP (R0), 0 } },
234
    & ifmt_b, { 0xd8000000 }
235
  },
236
/* calli $call */
237
  {
238
    { 0, 0, 0, 0 },
239
    { { MNEM, ' ', OP (CALL), 0 } },
240
    & ifmt_bi, { 0xf8000000 }
241
  },
242
/* cmpe $r2,$r0,$r1 */
243
  {
244
    { 0, 0, 0, 0 },
245
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
246
    & ifmt_add, { 0xe4000000 }
247
  },
248
/* cmpei $r1,$r0,$imm */
249
  {
250
    { 0, 0, 0, 0 },
251
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
252
    & ifmt_addi, { 0x64000000 }
253
  },
254
/* cmpg $r2,$r0,$r1 */
255
  {
256
    { 0, 0, 0, 0 },
257
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
258
    & ifmt_add, { 0xe8000000 }
259
  },
260
/* cmpgi $r1,$r0,$imm */
261
  {
262
    { 0, 0, 0, 0 },
263
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
264
    & ifmt_addi, { 0x68000000 }
265
  },
266
/* cmpge $r2,$r0,$r1 */
267
  {
268
    { 0, 0, 0, 0 },
269
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
270
    & ifmt_add, { 0xec000000 }
271
  },
272
/* cmpgei $r1,$r0,$imm */
273
  {
274
    { 0, 0, 0, 0 },
275
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
276
    & ifmt_addi, { 0x6c000000 }
277
  },
278
/* cmpgeu $r2,$r0,$r1 */
279
  {
280
    { 0, 0, 0, 0 },
281
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
282
    & ifmt_add, { 0xf0000000 }
283
  },
284
/* cmpgeui $r1,$r0,$uimm */
285
  {
286
    { 0, 0, 0, 0 },
287
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
288
    & ifmt_andi, { 0x70000000 }
289
  },
290
/* cmpgu $r2,$r0,$r1 */
291
  {
292
    { 0, 0, 0, 0 },
293
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
294
    & ifmt_add, { 0xf4000000 }
295
  },
296
/* cmpgui $r1,$r0,$uimm */
297
  {
298
    { 0, 0, 0, 0 },
299
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
300
    & ifmt_andi, { 0x74000000 }
301
  },
302
/* cmpne $r2,$r0,$r1 */
303
  {
304
    { 0, 0, 0, 0 },
305
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
306
    & ifmt_add, { 0xfc000000 }
307
  },
308
/* cmpnei $r1,$r0,$imm */
309
  {
310
    { 0, 0, 0, 0 },
311
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
312
    & ifmt_addi, { 0x7c000000 }
313
  },
314
/* divu $r2,$r0,$r1 */
315
  {
316
    { 0, 0, 0, 0 },
317
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
318
    & ifmt_add, { 0x8c000000 }
319
  },
320
/* lb $r1,($r0+$imm) */
321
  {
322
    { 0, 0, 0, 0 },
323
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
324
    & ifmt_addi, { 0x10000000 }
325
  },
326
/* lbu $r1,($r0+$imm) */
327
  {
328
    { 0, 0, 0, 0 },
329
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
330
    & ifmt_addi, { 0x40000000 }
331
  },
332
/* lh $r1,($r0+$imm) */
333
  {
334
    { 0, 0, 0, 0 },
335
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
336
    & ifmt_addi, { 0x1c000000 }
337
  },
338
/* lhu $r1,($r0+$imm) */
339
  {
340
    { 0, 0, 0, 0 },
341
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
342
    & ifmt_addi, { 0x2c000000 }
343
  },
344
/* lw $r1,($r0+$imm) */
345
  {
346
    { 0, 0, 0, 0 },
347
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
348
    & ifmt_addi, { 0x28000000 }
349
  },
350
/* modu $r2,$r0,$r1 */
351
  {
352
    { 0, 0, 0, 0 },
353
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
354
    & ifmt_add, { 0xc4000000 }
355
  },
356
/* mul $r2,$r0,$r1 */
357
  {
358
    { 0, 0, 0, 0 },
359
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
360
    & ifmt_add, { 0x88000000 }
361
  },
362
/* muli $r1,$r0,$imm */
363
  {
364
    { 0, 0, 0, 0 },
365
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
366
    & ifmt_addi, { 0x8000000 }
367
  },
368
/* nor $r2,$r0,$r1 */
369
  {
370
    { 0, 0, 0, 0 },
371
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
372
    & ifmt_add, { 0x84000000 }
373
  },
374
/* nori $r1,$r0,$uimm */
375
  {
376
    { 0, 0, 0, 0 },
377
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
378
    & ifmt_andi, { 0x4000000 }
379
  },
380
/* or $r2,$r0,$r1 */
381
  {
382
    { 0, 0, 0, 0 },
383
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
384
    & ifmt_add, { 0xb8000000 }
385
  },
386
/* ori $r1,$r0,$lo16 */
387
  {
388
    { 0, 0, 0, 0 },
389
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
390
    & ifmt_ori, { 0x38000000 }
391
  },
392
/* orhi $r1,$r0,$hi16 */
393
  {
394
    { 0, 0, 0, 0 },
395
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
396
    & ifmt_andhii, { 0x78000000 }
397
  },
398
/* rcsr $r2,$csr */
399
  {
400
    { 0, 0, 0, 0 },
401
    { { MNEM, ' ', OP (R2), ',', OP (CSR), 0 } },
402
    & ifmt_rcsr, { 0x90000000 }
403
  },
404
/* sb ($r0+$imm),$r1 */
405
  {
406
    { 0, 0, 0, 0 },
407
    { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
408
    & ifmt_addi, { 0x30000000 }
409
  },
410
/* sextb $r2,$r0 */
411
  {
412
    { 0, 0, 0, 0 },
413
    { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
414
    & ifmt_sextb, { 0xb0000000 }
415
  },
416
/* sexth $r2,$r0 */
417
  {
418
    { 0, 0, 0, 0 },
419
    { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
420
    & ifmt_sextb, { 0xdc000000 }
421
  },
422
/* sh ($r0+$imm),$r1 */
423
  {
424
    { 0, 0, 0, 0 },
425
    { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
426
    & ifmt_addi, { 0xc000000 }
427
  },
428
/* sl $r2,$r0,$r1 */
429
  {
430
    { 0, 0, 0, 0 },
431
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
432
    & ifmt_add, { 0xbc000000 }
433
  },
434
/* sli $r1,$r0,$imm */
435
  {
436
    { 0, 0, 0, 0 },
437
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
438
    & ifmt_addi, { 0x3c000000 }
439
  },
440
/* sr $r2,$r0,$r1 */
441
  {
442
    { 0, 0, 0, 0 },
443
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
444
    & ifmt_add, { 0x94000000 }
445
  },
446
/* sri $r1,$r0,$imm */
447
  {
448
    { 0, 0, 0, 0 },
449
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
450
    & ifmt_addi, { 0x14000000 }
451
  },
452
/* sru $r2,$r0,$r1 */
453
  {
454
    { 0, 0, 0, 0 },
455
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
456
    & ifmt_add, { 0x80000000 }
457
  },
458
/* srui $r1,$r0,$imm */
459
  {
460
    { 0, 0, 0, 0 },
461
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
462
    & ifmt_addi, { 0x0 }
463
  },
464
/* sub $r2,$r0,$r1 */
465
  {
466
    { 0, 0, 0, 0 },
467
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
468
    & ifmt_add, { 0xc8000000 }
469
  },
470
/* sw ($r0+$imm),$r1 */
471
  {
472
    { 0, 0, 0, 0 },
473
    { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
474
    & ifmt_addi, { 0x58000000 }
475
  },
476
/* user $r2,$r0,$r1,$user */
477
  {
478
    { 0, 0, 0, 0 },
479
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), ',', OP (USER), 0 } },
480
    & ifmt_user, { 0xcc000000 }
481
  },
482
/* wcsr $csr,$r1 */
483
  {
484
    { 0, 0, 0, 0 },
485
    { { MNEM, ' ', OP (CSR), ',', OP (R1), 0 } },
486
    & ifmt_wcsr, { 0xd0000000 }
487
  },
488
/* xor $r2,$r0,$r1 */
489
  {
490
    { 0, 0, 0, 0 },
491
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
492
    & ifmt_add, { 0x98000000 }
493
  },
494
/* xori $r1,$r0,$uimm */
495
  {
496
    { 0, 0, 0, 0 },
497
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
498
    & ifmt_andi, { 0x18000000 }
499
  },
500
/* xnor $r2,$r0,$r1 */
501
  {
502
    { 0, 0, 0, 0 },
503
    { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
504
    & ifmt_add, { 0xa4000000 }
505
  },
506
/* xnori $r1,$r0,$uimm */
507
  {
508
    { 0, 0, 0, 0 },
509
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
510
    & ifmt_andi, { 0x24000000 }
511
  },
512
/* break */
513
  {
514
    { 0, 0, 0, 0 },
515
    { { MNEM, 0 } },
516
    & ifmt_break, { 0xac000002 }
517
  },
518
/* scall */
519
  {
520
    { 0, 0, 0, 0 },
521
    { { MNEM, 0 } },
522
    & ifmt_break, { 0xac000007 }
523
  },
524
/* bret */
525
  {
526
    { 0, 0, 0, 0 },
527
    { { MNEM, 0 } },
528
    & ifmt_bret, { 0xc3e00000 }
529
  },
530
/* eret */
531
  {
532
    { 0, 0, 0, 0 },
533
    { { MNEM, 0 } },
534
    & ifmt_bret, { 0xc3c00000 }
535
  },
536
/* ret */
537
  {
538
    { 0, 0, 0, 0 },
539
    { { MNEM, 0 } },
540
    & ifmt_bret, { 0xc3a00000 }
541
  },
542
/* mv $r2,$r0 */
543
  {
544
    { 0, 0, 0, 0 },
545
    { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
546
    & ifmt_sextb, { 0xb8000000 }
547
  },
548
/* mvi $r1,$imm */
549
  {
550
    { 0, 0, 0, 0 },
551
    { { MNEM, ' ', OP (R1), ',', OP (IMM), 0 } },
552
    & ifmt_mvi, { 0x34000000 }
553
  },
554
/* mvu $r1,$lo16 */
555
  {
556
    { 0, 0, 0, 0 },
557
    { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
558
    & ifmt_mvui, { 0x38000000 }
559
  },
560
/* mvhi $r1,$hi16 */
561
  {
562
    { 0, 0, 0, 0 },
563
    { { MNEM, ' ', OP (R1), ',', OP (HI16), 0 } },
564
    & ifmt_mvhi, { 0x78000000 }
565
  },
566
/* mva $r1,$gp16 */
567
  {
568
    { 0, 0, 0, 0 },
569
    { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
570
    & ifmt_mva, { 0x37400000 }
571
  },
572
/* not $r2,$r0 */
573
  {
574
    { 0, 0, 0, 0 },
575
    { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
576
    & ifmt_sextb, { 0xa4000000 }
577
  },
578
/* nop */
579
  {
580
    { 0, 0, 0, 0 },
581
    { { MNEM, 0 } },
582
    & ifmt_nop, { 0x34000000 }
583
  },
584
/* lb $r1,$gp16 */
585
  {
586
    { 0, 0, 0, 0 },
587
    { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
588
    & ifmt_mva, { 0x13400000 }
589
  },
590
/* lbu $r1,$gp16 */
591
  {
592
    { 0, 0, 0, 0 },
593
    { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
594
    & ifmt_mva, { 0x43400000 }
595
  },
596
/* lh $r1,$gp16 */
597
  {
598
    { 0, 0, 0, 0 },
599
    { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
600
    & ifmt_mva, { 0x1f400000 }
601
  },
602
/* lhu $r1,$gp16 */
603
  {
604
    { 0, 0, 0, 0 },
605
    { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
606
    & ifmt_mva, { 0x2f400000 }
607
  },
608
/* lw $r1,$gp16 */
609
  {
610
    { 0, 0, 0, 0 },
611
    { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
612
    & ifmt_mva, { 0x2b400000 }
613
  },
614
/* sb $gp16,$r1 */
615
  {
616
    { 0, 0, 0, 0 },
617
    { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
618
    & ifmt_mva, { 0x33400000 }
619
  },
620
/* sh $gp16,$r1 */
621
  {
622
    { 0, 0, 0, 0 },
623
    { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
624
    & ifmt_mva, { 0xf400000 }
625
  },
626
/* sw $gp16,$r1 */
627
  {
628
    { 0, 0, 0, 0 },
629
    { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
630
    & ifmt_mva, { 0x5b400000 }
631
  },
632
/* lw $r1,(gp+$got16) */
633
  {
634
    { 0, 0, 0, 0 },
635
    { { MNEM, ' ', OP (R1), ',', '(', 'g', 'p', '+', OP (GOT16), ')', 0 } },
636
    & ifmt_lwgotrel, { 0x2b400000 }
637
  },
638
/* orhi $r1,$r0,$gotoffhi16 */
639
  {
640
    { 0, 0, 0, 0 },
641
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (GOTOFFHI16), 0 } },
642
    & ifmt_orhigotoffi, { 0x78000000 }
643
  },
644
/* addi $r1,$r0,$gotofflo16 */
645
  {
646
    { 0, 0, 0, 0 },
647
    { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (GOTOFFLO16), 0 } },
648
    & ifmt_addgotoff, { 0x34000000 }
649
  },
650
/* sw ($r0+$gotofflo16),$r1 */
651
  {
652
    { 0, 0, 0, 0 },
653
    { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
654
    & ifmt_addgotoff, { 0x58000000 }
655
  },
656
/* lw $r1,($r0+$gotofflo16) */
657
  {
658
    { 0, 0, 0, 0 },
659
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
660
    & ifmt_addgotoff, { 0x28000000 }
661
  },
662
/* sh ($r0+$gotofflo16),$r1 */
663
  {
664
    { 0, 0, 0, 0 },
665
    { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
666
    & ifmt_addgotoff, { 0xc000000 }
667
  },
668
/* lh $r1,($r0+$gotofflo16) */
669
  {
670
    { 0, 0, 0, 0 },
671
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
672
    & ifmt_addgotoff, { 0x1c000000 }
673
  },
674
/* lhu $r1,($r0+$gotofflo16) */
675
  {
676
    { 0, 0, 0, 0 },
677
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
678
    & ifmt_addgotoff, { 0x2c000000 }
679
  },
680
/* sb ($r0+$gotofflo16),$r1 */
681
  {
682
    { 0, 0, 0, 0 },
683
    { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
684
    & ifmt_addgotoff, { 0x30000000 }
685
  },
686
/* lb $r1,($r0+$gotofflo16) */
687
  {
688
    { 0, 0, 0, 0 },
689
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
690
    & ifmt_addgotoff, { 0x10000000 }
691
  },
692
/* lbu $r1,($r0+$gotofflo16) */
693
  {
694
    { 0, 0, 0, 0 },
695
    { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
696
    & ifmt_addgotoff, { 0x40000000 }
697
  },
698
};
699
700
#undef A
701
#undef OPERAND
702
#undef MNEM
703
#undef OP
704
705
/* Formats for ALIAS macro-insns.  */
706
707
#define F(f) & lm32_cgen_ifld_table[LM32_##f]
708
#undef F
709
710
/* Each non-simple macro entry points to an array of expansion possibilities.  */
711
712
#define A(a) (1 << CGEN_INSN_##a)
713
#define OPERAND(op) LM32_OPERAND_##op
714
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
715
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
716
717
/* The macro instruction table.  */
718
719
static const CGEN_IBASE lm32_cgen_macro_insn_table[] =
720
{
721
};
722
723
/* The macro instruction opcode table.  */
724
725
static const CGEN_OPCODE lm32_cgen_macro_insn_opcode_table[] =
726
{
727
};
728
729
#undef A
730
#undef OPERAND
731
#undef MNEM
732
#undef OP
733
734
#ifndef CGEN_ASM_HASH_P
735
0
#define CGEN_ASM_HASH_P(insn) 1
736
#endif
737
738
#ifndef CGEN_DIS_HASH_P
739
273
#define CGEN_DIS_HASH_P(insn) 1
740
#endif
741
742
/* Return non-zero if INSN is to be added to the hash table.
743
   Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */
744
745
static int
746
asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED)
747
0
{
748
0
  return CGEN_ASM_HASH_P (insn);
749
0
}
750
751
static int
752
dis_hash_insn_p (const CGEN_INSN *insn)
753
273
{
754
  /* If building the hash table and the NO-DIS attribute is present,
755
     ignore.  */
756
273
  if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
757
0
    return 0;
758
273
  return CGEN_DIS_HASH_P (insn);
759
273
}
760
761
#ifndef CGEN_ASM_HASH
762
3
#define CGEN_ASM_HASH_SIZE 127
763
#ifdef CGEN_MNEMONIC_OPERANDS
764
0
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
765
#else
766
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
767
#endif
768
#endif
769
770
/* It doesn't make much sense to provide a default here,
771
   but while this is under development we do.
772
   BUFFER is a pointer to the bytes of the insn, target order.
773
   VALUE is the first base_insn_bitsize bits as an int in host order.  */
774
775
#ifndef CGEN_DIS_HASH
776
#define CGEN_DIS_HASH_SIZE 256
777
#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
778
#endif
779
780
/* The result is the hash value of the insn.
781
   Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */
782
783
static unsigned int
784
asm_hash_insn (const char *mnem)
785
0
{
786
0
  return CGEN_ASM_HASH (mnem);
787
0
}
788
789
/* BUF is a pointer to the bytes of the insn, target order.
790
   VALUE is the first base_insn_bitsize bits as an int in host order.  */
791
792
static unsigned int
793
dis_hash_insn (const char *buf ATTRIBUTE_UNUSED,
794
         CGEN_INSN_INT value ATTRIBUTE_UNUSED)
795
56.4k
{
796
56.4k
  return CGEN_DIS_HASH (buf, value);
797
56.4k
}
798
799
/* Set the recorded length of the insn in the CGEN_FIELDS struct.  */
800
801
static void
802
set_fields_bitsize (CGEN_FIELDS *fields, int size)
803
0
{
804
0
  CGEN_FIELDS_BITSIZE (fields) = size;
805
0
}
806
807
/* Function to call before using the operand instance table.
808
   This plugs the opcode entries and macro instructions into the cpu table.  */
809
810
void
811
lm32_cgen_init_opcode_table (CGEN_CPU_DESC cd)
812
3
{
813
3
  int i;
814
3
  int num_macros = (sizeof (lm32_cgen_macro_insn_table) /
815
3
        sizeof (lm32_cgen_macro_insn_table[0]));
816
3
  const CGEN_IBASE *ib = & lm32_cgen_macro_insn_table[0];
817
3
  const CGEN_OPCODE *oc = & lm32_cgen_macro_insn_opcode_table[0];
818
3
  CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
819
820
  /* This test has been added to avoid a warning generated
821
     if memset is called with a third argument of value zero.  */
822
3
  if (num_macros >= 1)
823
0
    memset (insns, 0, num_macros * sizeof (CGEN_INSN));
824
3
  for (i = 0; i < num_macros; ++i)
825
0
    {
826
0
      insns[i].base = &ib[i];
827
0
      insns[i].opcode = &oc[i];
828
0
      lm32_cgen_build_insn_regex (& insns[i]);
829
0
    }
830
3
  cd->macro_insn_table.init_entries = insns;
831
3
  cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
832
3
  cd->macro_insn_table.num_init_entries = num_macros;
833
834
3
  oc = & lm32_cgen_insn_opcode_table[0];
835
3
  insns = (CGEN_INSN *) cd->insn_table.init_entries;
836
279
  for (i = 0; i < MAX_INSNS; ++i)
837
276
    {
838
276
      insns[i].opcode = &oc[i];
839
276
      lm32_cgen_build_insn_regex (& insns[i]);
840
276
    }
841
842
3
  cd->sizeof_fields = sizeof (CGEN_FIELDS);
843
3
  cd->set_fields_bitsize = set_fields_bitsize;
844
845
3
  cd->asm_hash_p = asm_hash_insn_p;
846
3
  cd->asm_hash = asm_hash_insn;
847
3
  cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
848
849
3
  cd->dis_hash_p = dis_hash_insn_p;
850
3
  cd->dis_hash = dis_hash_insn;
851
3
  cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
852
3
}