Coverage Report

Created: 2025-06-24 06:45

/src/binutils-gdb/opcodes/m32c-asm.c
Line
Count
Source (jump to first uncovered line)
1
/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
2
/* Assembler interface for targets using CGEN. -*- C -*-
3
   CGEN: Cpu tools GENerator
4
5
   THIS FILE IS MACHINE GENERATED WITH CGEN.
6
   - the resultant file is machine generated, cgen-asm.in isn't
7
8
   Copyright (C) 1996-2025 Free Software Foundation, Inc.
9
10
   This file is part of libopcodes.
11
12
   This library is free software; you can redistribute it and/or modify
13
   it under the terms of the GNU General Public License as published by
14
   the Free Software Foundation; either version 3, or (at your option)
15
   any later version.
16
17
   It is distributed in the hope that it will be useful, but WITHOUT
18
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
20
   License for more details.
21
22
   You should have received a copy of the GNU General Public License
23
   along with this program; if not, write to the Free Software Foundation, Inc.,
24
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
25
26
27
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
28
   Keep that in mind.  */
29
30
#include "sysdep.h"
31
#include <stdio.h>
32
#include "ansidecl.h"
33
#include "bfd.h"
34
#include "symcat.h"
35
#include "m32c-desc.h"
36
#include "m32c-opc.h"
37
#include "opintl.h"
38
#include "xregex.h"
39
#include "libiberty.h"
40
#include "safe-ctype.h"
41
42
#undef  min
43
#define min(a,b) ((a) < (b) ? (a) : (b))
44
#undef  max
45
#define max(a,b) ((a) > (b) ? (a) : (b))
46
47
static const char * parse_insn_normal
48
  (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
49

50
/* -- assembler routines inserted here.  */
51
52
/* -- asm.c */
53
#include "safe-ctype.h"
54
55
0
#define MACH_M32C 5    /* Must match md_begin.  */
56
57
static int
58
m32c_cgen_isa_register (const char **strp)
59
0
 {
60
0
   int u;
61
0
   const char *s = *strp;
62
0
   static char * m32c_register_names [] =
63
0
     {
64
0
       "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
65
0
       "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
66
0
       "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
67
0
       "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
68
0
     };
69
70
0
   for (u = 0; m32c_register_names[u]; u++)
71
0
     {
72
0
       int len = strlen (m32c_register_names[u]);
73
74
0
       if (memcmp (m32c_register_names[u], s, len) == 0
75
0
     && (s[len] == 0 || ! ISALNUM (s[len])))
76
0
        return 1;
77
0
     }
78
0
   return 0;
79
0
}
80
81
#define PARSE_UNSIGNED              \
82
0
  do                  \
83
0
    {                 \
84
0
      /* Don't successfully parse literals beginning with '['.  */  \
85
0
      if (**strp == '[')           \
86
0
  return "Invalid literal"; /* Anything -- will not be seen.  */  \
87
0
                  \
88
0
      errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
89
0
      if (errmsg)             \
90
0
  return errmsg;             \
91
0
    }                 \
92
0
  while (0)
93
94
#define PARSE_SIGNED              \
95
0
  do                  \
96
0
    {                 \
97
0
      /* Don't successfully parse literals beginning with '['.  */  \
98
0
      if (**strp == '[')           \
99
0
  return "Invalid literal"; /* Anything -- will not be seen.  */  \
100
0
                  \
101
0
      errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);  \
102
0
      if (errmsg)             \
103
0
  return errmsg;             \
104
0
    }                 \
105
0
  while (0)
106
107
static const char *
108
parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
109
     int opindex, unsigned long *valuep)
110
0
{
111
0
  const char *errmsg = 0;
112
0
  unsigned long value;
113
114
0
  PARSE_UNSIGNED;
115
116
0
  if (value > 0x3f)
117
0
    return _("imm:6 immediate is out of range");
118
119
0
  *valuep = value;
120
0
  return 0;
121
0
}
122
123
static const char *
124
parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
125
     int opindex, unsigned long *valuep)
126
0
{
127
0
  const char *errmsg = 0;
128
0
  unsigned long value = 0;
129
0
  long have_zero = 0;
130
131
0
  if (strncasecmp (*strp, "%dsp8(", 6) == 0)
132
0
    {
133
0
      enum cgen_parse_operand_result result_type;
134
0
      bfd_vma val;
135
136
0
      *strp += 6;
137
0
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
138
0
           & result_type, & val);
139
0
      if (**strp != ')')
140
0
  return _("missing `)'");
141
0
      (*strp) ++;
142
143
0
      if (errmsg == NULL
144
0
      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
145
0
  return _("%dsp8() takes a symbolic address, not a number");
146
147
0
      value = val;
148
0
      *valuep = value;
149
0
      return errmsg;
150
0
    }
151
152
0
  if (strncmp (*strp, "0x0", 3) == 0
153
0
      || (**strp == '0' && *(*strp + 1) != 'x'))
154
0
    have_zero = 1;
155
156
0
  PARSE_UNSIGNED;
157
158
0
  if (value > 0xff)
159
0
    return _("dsp:8 immediate is out of range");
160
161
  /* If this field may require a relocation then use larger dsp16.  */
162
0
  if (! have_zero && value == 0)
163
0
    return _("dsp:8 immediate is out of range");
164
165
0
  *valuep = value;
166
0
  return 0;
167
0
}
168
169
static const char *
170
parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
171
         int opindex, signed long *valuep)
172
0
{
173
0
  const char *errmsg = 0;
174
0
  signed long value;
175
0
  long have_zero = 0;
176
177
0
  if (strncmp (*strp, "0x0", 3) == 0
178
0
      || (**strp == '0' && *(*strp + 1) != 'x'))
179
0
    have_zero = 1;
180
181
0
  PARSE_SIGNED;
182
183
0
  if (value < -8 || value > 7)
184
0
    return _("Immediate is out of range -8 to 7");
185
186
  /* If this field may require a relocation then use larger dsp16.  */
187
0
  if (! have_zero && value == 0)
188
0
    return _("Immediate is out of range -8 to 7");
189
190
0
  *valuep = value;
191
0
  return 0;
192
0
}
193
194
static const char *
195
parse_signed4n (CGEN_CPU_DESC cd, const char **strp,
196
    int opindex, signed long *valuep)
197
0
{
198
0
  const char *errmsg = 0;
199
0
  signed long value;
200
0
  long have_zero = 0;
201
202
0
  if (strncmp (*strp, "0x0", 3) == 0
203
0
      || (**strp == '0' && *(*strp + 1) != 'x'))
204
0
    have_zero = 1;
205
206
0
  PARSE_SIGNED;
207
208
0
  if (value < -7 || value > 8)
209
0
    return _("Immediate is out of range -7 to 8");
210
211
  /* If this field may require a relocation then use larger dsp16.  */
212
0
  if (! have_zero && value == 0)
213
0
    return _("Immediate is out of range -7 to 8");
214
215
0
  *valuep = -value;
216
0
  return 0;
217
0
}
218
219
static const char *
220
parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
221
         int opindex, signed long *valuep)
222
0
{
223
0
  const char *errmsg = 0;
224
0
  signed long value = 0;
225
226
0
  if (strncasecmp (*strp, "%hi8(", 5) == 0)
227
0
    {
228
0
      enum cgen_parse_operand_result result_type;
229
0
      bfd_vma val;
230
231
0
      *strp += 5;
232
0
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
233
0
           & result_type, & val);
234
0
      if (**strp != ')')
235
0
  return _("missing `)'");
236
0
      (*strp) ++;
237
238
0
      if (errmsg == NULL
239
0
      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
240
0
  val >>= 16;
241
242
0
      value = val;
243
0
      *valuep = value;
244
0
      return errmsg;
245
0
    }
246
247
0
  PARSE_SIGNED;
248
249
0
  if (value <= 255 && value > 127)
250
0
    value -= 0x100;
251
252
0
  if (value < -128 || value > 127)
253
0
    return _("dsp:8 immediate is out of range");
254
255
0
  *valuep = value;
256
0
  return 0;
257
0
}
258
259
static const char *
260
parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
261
     int opindex, unsigned long *valuep)
262
0
{
263
0
  const char *errmsg = 0;
264
0
  unsigned long value = 0;
265
0
  long have_zero = 0;
266
267
0
  if (strncasecmp (*strp, "%dsp16(", 7) == 0)
268
0
    {
269
0
      enum cgen_parse_operand_result result_type;
270
0
      bfd_vma val;
271
272
0
      *strp += 7;
273
0
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
274
0
           & result_type, & val);
275
0
      if (**strp != ')')
276
0
  return _("missing `)'");
277
0
      (*strp) ++;
278
279
0
      if (errmsg == NULL
280
0
      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
281
0
  return _("%dsp16() takes a symbolic address, not a number");
282
283
0
      value = val;
284
0
      *valuep = value;
285
0
      return errmsg;
286
0
    }
287
288
  /* Don't successfully parse literals beginning with '['.  */
289
0
  if (**strp == '[')
290
0
    return "Invalid literal"; /* Anything -- will not be seen.  */
291
292
  /* Don't successfully parse register names.  */
293
0
  if (m32c_cgen_isa_register (strp))
294
0
    return "Invalid literal"; /* Anything -- will not be seen.  */
295
296
0
  if (strncmp (*strp, "0x0", 3) == 0
297
0
      || (**strp == '0' && *(*strp + 1) != 'x'))
298
0
    have_zero = 1;
299
300
0
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
301
0
  if (errmsg)
302
0
    return errmsg;
303
304
0
  if (value > 0xffff)
305
0
    return _("dsp:16 immediate is out of range");
306
307
  /* If this field may require a relocation then use larger dsp24.  */
308
0
  if (cd->machs == MACH_M32C && ! have_zero && value == 0
309
0
      && (strncmp (*strp, "[a", 2) == 0
310
0
    || **strp == ','
311
0
    || **strp == 0))
312
0
    return _("dsp:16 immediate is out of range");
313
314
0
  *valuep = value;
315
0
  return 0;
316
0
}
317
318
static const char *
319
parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
320
         int opindex, signed long *valuep)
321
0
{
322
0
  const char *errmsg = 0;
323
0
  signed long value = 0;
324
325
0
  if (strncasecmp (*strp, "%lo16(", 6) == 0)
326
0
    {
327
0
      enum cgen_parse_operand_result result_type;
328
0
      bfd_vma val;
329
330
0
      *strp += 6;
331
0
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
332
0
           & result_type, & val);
333
0
      if (**strp != ')')
334
0
  return _("missing `)'");
335
0
      (*strp) ++;
336
337
0
      if (errmsg == NULL
338
0
      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
339
0
  val &= 0xffff;
340
341
0
      value = val;
342
0
      *valuep = value;
343
0
      return errmsg;
344
0
    }
345
346
0
  if (strncasecmp (*strp, "%hi16(", 6) == 0)
347
0
    {
348
0
      enum cgen_parse_operand_result result_type;
349
0
      bfd_vma val;
350
351
0
      *strp += 6;
352
0
      errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
353
0
           & result_type, & val);
354
0
      if (**strp != ')')
355
0
  return _("missing `)'");
356
0
      (*strp) ++;
357
358
0
      if (errmsg == NULL
359
0
      && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
360
0
  val >>= 16;
361
362
0
      value = val;
363
0
      *valuep = value;
364
0
      return errmsg;
365
0
    }
366
367
0
  PARSE_SIGNED;
368
369
0
  if (value <= 65535 && value > 32767)
370
0
    value -= 0x10000;
371
372
0
  if (value < -32768 || value > 32767)
373
0
    return _("dsp:16 immediate is out of range");
374
375
0
  *valuep = value;
376
0
  return 0;
377
0
}
378
379
static const char *
380
parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
381
     int opindex, unsigned long *valuep)
382
0
{
383
0
  const char *errmsg = 0;
384
0
  unsigned long value;
385
386
  /* Don't successfully parse literals beginning with '['.  */
387
0
  if (**strp == '[')
388
0
    return "Invalid literal"; /* Anything -- will not be seen.  */
389
390
  /* Don't successfully parse register names.  */
391
0
  if (m32c_cgen_isa_register (strp))
392
0
    return "Invalid literal"; /* Anything -- will not be seen.  */
393
394
0
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
395
0
  if (errmsg)
396
0
    return errmsg;
397
398
0
  if (value > 0xfffff)
399
0
    return _("dsp:20 immediate is out of range");
400
401
0
  *valuep = value;
402
0
  return 0;
403
0
}
404
405
static const char *
406
parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
407
     int opindex, unsigned long *valuep)
408
0
{
409
0
  const char *errmsg = 0;
410
0
  unsigned long value;
411
412
  /* Don't successfully parse literals beginning with '['.  */
413
0
  if (**strp == '[')
414
0
    return "Invalid literal"; /* Anything -- will not be seen.  */
415
416
  /* Don't successfully parse register names.  */
417
0
  if (m32c_cgen_isa_register (strp))
418
0
    return "Invalid literal"; /* Anything -- will not be seen.  */
419
420
0
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
421
0
  if (errmsg)
422
0
    return errmsg;
423
424
0
  if (value > 0xffffff)
425
0
    return _("dsp:24 immediate is out of range");
426
427
0
  *valuep = value;
428
0
  return 0;
429
0
}
430
431
/* This should only be used for #imm->reg.  */
432
static const char *
433
parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
434
     int opindex, signed long *valuep)
435
0
{
436
0
  const char *errmsg = 0;
437
0
  signed long value;
438
439
0
  PARSE_SIGNED;
440
441
0
  if (value <= 0xffffff && value > 0x7fffff)
442
0
    value -= 0x1000000;
443
444
0
  if (value > 0xffffff)
445
0
    return _("dsp:24 immediate is out of range");
446
447
0
  *valuep = value;
448
0
  return 0;
449
0
}
450
451
static const char *
452
parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
453
    int opindex, signed long *valuep)
454
0
{
455
0
  const char *errmsg = 0;
456
0
  signed long value;
457
458
0
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
459
0
  if (errmsg)
460
0
    return errmsg;
461
462
0
  *valuep = value;
463
0
  return 0;
464
0
}
465
466
static const char *
467
parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
468
       int opindex, signed long *valuep)
469
0
{
470
0
  const char *errmsg = 0;
471
0
  signed long value;
472
473
0
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
474
0
  if (errmsg)
475
0
    return errmsg;
476
477
0
  if (value < 1 || value > 2)
478
0
    return _("immediate is out of range 1-2");
479
480
0
  *valuep = value;
481
0
  return 0;
482
0
}
483
484
static const char *
485
parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
486
       int opindex, signed long *valuep)
487
0
{
488
0
  const char *errmsg = 0;
489
0
  signed long value;
490
491
0
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
492
0
  if (errmsg)
493
0
    return errmsg;
494
495
0
  if (value < 1 || value > 8)
496
0
    return _("immediate is out of range 1-8");
497
498
0
  *valuep = value;
499
0
  return 0;
500
0
}
501
502
static const char *
503
parse_bit3_S (CGEN_CPU_DESC cd, const char **strp,
504
       int opindex, signed long *valuep)
505
0
{
506
0
  const char *errmsg = 0;
507
0
  signed long value;
508
509
0
  errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
510
0
  if (errmsg)
511
0
    return errmsg;
512
513
0
  if (value < 0 || value > 7)
514
0
    return _("immediate is out of range 0-7");
515
516
0
  *valuep = value;
517
0
  return 0;
518
0
}
519
520
static const char *
521
parse_lab_5_3 (CGEN_CPU_DESC cd,
522
         const char **strp,
523
         int opindex ATTRIBUTE_UNUSED,
524
         int opinfo,
525
         enum cgen_parse_operand_result *type_addr,
526
         bfd_vma *valuep)
527
0
{
528
0
  const char *errmsg = 0;
529
0
  bfd_vma value;
530
0
  enum cgen_parse_operand_result op_res;
531
532
0
  errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
533
0
             opinfo, & op_res, & value);
534
535
0
  if (type_addr)
536
0
    *type_addr = op_res;
537
538
0
  if (op_res == CGEN_PARSE_OPERAND_RESULT_QUEUED)
539
0
    {
540
      /* This is a hack; the field cannot handle near-zero signed
541
   offsets that CGEN wants to put in to indicate an "empty"
542
   operand at first.  */
543
0
      *valuep = 2;
544
0
      return 0;
545
0
    }
546
0
  if (errmsg)
547
0
    return errmsg;
548
549
0
  if (value < 2 || value > 9)
550
0
    return _("immediate is out of range 2-9");
551
552
0
  *valuep = value;
553
0
  return 0;
554
0
}
555
556
static const char *
557
parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
558
    int opindex, unsigned long *valuep)
559
0
{
560
0
  const char *errmsg = 0;
561
0
  unsigned long value;
562
563
0
  errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
564
0
  if (errmsg)
565
0
    return errmsg;
566
567
0
  if (value > 15)
568
0
    return _("Bit number for indexing general register is out of range 0-15");
569
570
0
  *valuep = value;
571
0
  return 0;
572
0
}
573
574
static const char *
575
parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
576
      int opindex, unsigned long *valuep,
577
      unsigned bits, int allow_syms)
578
0
{
579
0
  const char *errmsg = 0;
580
0
  unsigned long bit;
581
0
  unsigned long base;
582
0
  const char *newp = *strp;
583
0
  unsigned long long bitbase;
584
0
  long have_zero = 0;
585
586
0
  errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
587
0
  if (errmsg)
588
0
    return errmsg;
589
590
0
  if (*newp != ',')
591
0
    return "Missing base for bit,base:8";
592
593
0
  ++newp;
594
595
0
  if (strncmp (newp, "0x0", 3) == 0
596
0
      || (newp[0] == '0' && newp[1] != 'x'))
597
0
    have_zero = 1;
598
599
0
  errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
600
0
  if (errmsg)
601
0
    return errmsg;
602
603
0
  bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
604
605
0
  if (bitbase >= (1ull << bits))
606
0
    return _("bit,base is out of range");
607
608
  /* If this field may require a relocation then use larger displacement.  */
609
0
  if (! have_zero && base == 0)
610
0
    {
611
0
      switch (allow_syms) {
612
0
      case 0:
613
0
  return _("bit,base out of range for symbol");
614
0
      case 1:
615
0
  break;
616
0
      case 2:
617
0
  if (strncmp (newp, "[sb]", 4) != 0)
618
0
    return _("bit,base out of range for symbol");
619
0
  break;
620
0
      }
621
0
    }
622
623
0
  *valuep = bitbase;
624
0
  *strp = newp;
625
0
  return 0;
626
0
}
627
628
static const char *
629
parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
630
          int opindex, signed long *valuep,
631
          unsigned bits, int allow_syms)
632
0
{
633
0
  const char *errmsg = 0;
634
0
  unsigned long bit;
635
0
  signed long base;
636
0
  const char *newp = *strp;
637
0
  long long bitbase;
638
0
  long long limit;
639
0
  long have_zero = 0;
640
641
0
  errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
642
0
  if (errmsg)
643
0
    return errmsg;
644
645
0
  if (*newp != ',')
646
0
    return "Missing base for bit,base:8";
647
648
0
  ++newp;
649
650
0
  if (strncmp (newp, "0x0", 3) == 0
651
0
      || (newp[0] == '0' && newp[1] != 'x'))
652
0
    have_zero = 1;
653
654
0
  errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
655
0
  if (errmsg)
656
0
    return errmsg;
657
658
0
  bitbase = (long long)bit + ((long long)base * 8);
659
660
0
  limit = 1ll << (bits - 1);
661
0
  if (bitbase < -limit || bitbase >= limit)
662
0
    return _("bit,base is out of range");
663
664
  /* If this field may require a relocation then use larger displacement.  */
665
0
  if (! have_zero && base == 0 && ! allow_syms)
666
0
    return _("bit,base out of range for symbol");
667
668
0
  *valuep = bitbase;
669
0
  *strp = newp;
670
0
  return 0;
671
0
}
672
673
static const char *
674
parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
675
       int opindex, unsigned long *valuep)
676
0
{
677
0
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0);
678
0
}
679
680
static const char *
681
parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
682
       int opindex, unsigned long *valuep)
683
0
{
684
0
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0);
685
0
}
686
687
static const char *
688
parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
689
        int opindex, unsigned long *valuep)
690
0
{
691
0
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1);
692
0
}
693
694
static const char *
695
parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
696
       int opindex, unsigned long *valuep)
697
0
{
698
0
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2);
699
0
}
700
701
static const char *
702
parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
703
       int opindex, unsigned long *valuep)
704
0
{
705
0
  return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1);
706
0
}
707
708
static const char *
709
parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
710
           int opindex, signed long *valuep)
711
0
{
712
0
  return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1);
713
0
}
714
715
static const char *
716
parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
717
           int opindex, signed long *valuep)
718
0
{
719
0
  return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0);
720
0
}
721
722
static const char *
723
parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
724
           int opindex, signed long *valuep)
725
0
{
726
0
  return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1);
727
0
}
728
729
/* Parse the suffix as :<char> or as nothing followed by a whitespace.  */
730
731
static const char *
732
parse_suffix (const char **strp, char suffix)
733
0
{
734
0
  const char *newp = *strp;
735
736
0
  if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
737
0
    newp = *strp + 2;
738
739
0
  if (ISSPACE (*newp))
740
0
    {
741
0
      *strp = newp;
742
0
      return 0;
743
0
    }
744
745
0
  return "Invalid suffix"; /* Anything -- will not be seen.  */
746
0
}
747
748
static const char *
749
parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
750
   int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
751
0
{
752
0
  return parse_suffix (strp, 's');
753
0
}
754
755
static const char *
756
parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
757
   int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
758
0
{
759
0
  return parse_suffix (strp, 'g');
760
0
}
761
762
static const char *
763
parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
764
   int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
765
0
{
766
0
  return parse_suffix (strp, 'q');
767
0
}
768
769
static const char *
770
parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
771
   int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
772
0
{
773
0
  return parse_suffix (strp, 'z');
774
0
}
775
776
/* Parse an empty suffix. Fail if the next char is ':'.  */
777
778
static const char *
779
parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
780
   int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
781
0
{
782
0
  if (**strp == ':')
783
0
    return "Unexpected suffix";
784
0
  return 0;
785
0
}
786
787
static const char *
788
parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
789
         int opindex ATTRIBUTE_UNUSED, signed long *valuep)
790
0
{
791
0
  const char *errmsg;
792
0
  signed long value;
793
0
  signed long junk;
794
0
  const char *newp = *strp;
795
796
  /* Parse r0[hl].  */
797
0
  errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
798
0
  if (errmsg)
799
0
    return errmsg;
800
801
0
  if (*newp != ',')
802
0
    return _("not a valid r0l/r0h pair");
803
0
  ++newp;
804
805
  /* Parse the second register in the pair.  */
806
0
  if (value == 0) /* r0l */
807
0
    errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
808
0
  else
809
0
    errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
810
0
  if (errmsg)
811
0
    return errmsg;
812
813
0
  *strp = newp;
814
0
  *valuep = ! value;
815
0
  return 0;
816
0
}
817
818
/* Accept .b or .w in any case.  */
819
820
static const char *
821
parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
822
      int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
823
0
{
824
0
  if (**strp == '.'
825
0
      && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
826
0
    || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
827
0
    {
828
0
      *strp += 2;
829
0
      return NULL;
830
0
    }
831
832
0
  return _("Invalid size specifier");
833
0
}
834
835
/* Special check to ensure that instruction exists for given machine.  */
836
837
int
838
m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
839
        const CGEN_INSN *insn)
840
3.95G
{
841
3.95G
  int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
842
3.95G
  CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
843
844
  /* If attributes are absent, assume no restriction.  */
845
3.95G
  if (machs == 0)
846
0
    machs = ~0;
847
848
3.95G
  return ((machs & cd->machs)
849
3.95G
          && cgen_bitset_intersect_p (& isas, cd->isas));
850
3.95G
}
851
852
/* Parse a set of registers, R0,R1,A0,A1,SB,FB.  */
853
854
static const char *
855
parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
856
        const char **strp,
857
        int opindex ATTRIBUTE_UNUSED,
858
        unsigned long *valuep,
859
        int push)
860
0
{
861
0
  const char *errmsg = 0;
862
0
  int regno = 0;
863
864
0
  *valuep = 0;
865
0
  while (**strp && **strp != ')')
866
0
    {
867
0
      if (**strp == 'r' || **strp == 'R')
868
0
  {
869
0
    ++*strp;
870
0
    regno = **strp - '0';
871
0
    if (regno > 4)
872
0
      errmsg = _("Register number is not valid");
873
0
  }
874
0
      else if (**strp == 'a' || **strp == 'A')
875
0
  {
876
0
    ++*strp;
877
0
    regno = **strp - '0';
878
0
    if (regno > 2)
879
0
      errmsg = _("Register number is not valid");
880
0
    regno = **strp - '0' + 4;
881
0
  }
882
883
0
      else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
884
0
  {
885
0
    regno = 6;
886
0
    ++*strp;
887
0
  }
888
889
0
      else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
890
0
  {
891
0
    regno = 7;
892
0
    ++*strp;
893
0
  }
894
895
0
      if (push) /* Mask is reversed for push.  */
896
0
  *valuep |= 0x80 >> regno;
897
0
      else
898
0
  *valuep |= 1 << regno;
899
900
0
      ++*strp;
901
0
      if (**strp == ',')
902
0
        {
903
0
          if (*(*strp + 1) == ')')
904
0
            break;
905
0
          ++*strp;
906
0
        }
907
0
    }
908
909
0
  if (!*strp)
910
0
    errmsg = _("Register list is not valid");
911
912
0
  return errmsg;
913
0
}
914
915
0
#define POP  0
916
0
#define PUSH 1
917
918
static const char *
919
parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
920
      const char **strp,
921
      int opindex ATTRIBUTE_UNUSED,
922
      unsigned long *valuep)
923
0
{
924
0
  return parse_regset (cd, strp, opindex, valuep, POP);
925
0
}
926
927
static const char *
928
parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
929
       const char **strp,
930
       int opindex ATTRIBUTE_UNUSED,
931
       unsigned long *valuep)
932
0
{
933
0
  return parse_regset (cd, strp, opindex, valuep, PUSH);
934
0
}
935
936
/* -- dis.c */
937
938
const char * m32c_cgen_parse_operand
939
  (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
940
941
/* Main entry point for operand parsing.
942
943
   This function is basically just a big switch statement.  Earlier versions
944
   used tables to look up the function to use, but
945
   - if the table contains both assembler and disassembler functions then
946
     the disassembler contains much of the assembler and vice-versa,
947
   - there's a lot of inlining possibilities as things grow,
948
   - using a switch statement avoids the function call overhead.
949
950
   This function could be moved into `parse_insn_normal', but keeping it
951
   separate makes clear the interface between `parse_insn_normal' and each of
952
   the handlers.  */
953
954
const char *
955
m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
956
         int opindex,
957
         const char ** strp,
958
         CGEN_FIELDS * fields)
959
0
{
960
0
  const char * errmsg = NULL;
961
  /* Used by scalar operands that still need to be parsed.  */
962
0
  long junk ATTRIBUTE_UNUSED;
963
964
0
  switch (opindex)
965
0
    {
966
0
    case M32C_OPERAND_A0 :
967
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk);
968
0
      break;
969
0
    case M32C_OPERAND_A1 :
970
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk);
971
0
      break;
972
0
    case M32C_OPERAND_AN16_PUSH_S :
973
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1);
974
0
      break;
975
0
    case M32C_OPERAND_BIT16AN :
976
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
977
0
      break;
978
0
    case M32C_OPERAND_BIT16RN :
979
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
980
0
      break;
981
0
    case M32C_OPERAND_BIT3_S :
982
0
      errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S));
983
0
      break;
984
0
    case M32C_OPERAND_BIT32ANPREFIXED :
985
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
986
0
      break;
987
0
    case M32C_OPERAND_BIT32ANUNPREFIXED :
988
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
989
0
      break;
990
0
    case M32C_OPERAND_BIT32RNPREFIXED :
991
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
992
0
      break;
993
0
    case M32C_OPERAND_BIT32RNUNPREFIXED :
994
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
995
0
      break;
996
0
    case M32C_OPERAND_BITBASE16_16_S8 :
997
0
      errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8));
998
0
      break;
999
0
    case M32C_OPERAND_BITBASE16_16_U16 :
1000
0
      errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1001
0
      break;
1002
0
    case M32C_OPERAND_BITBASE16_16_U8 :
1003
0
      errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1004
0
      break;
1005
0
    case M32C_OPERAND_BITBASE16_8_U11_S :
1006
0
      errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S));
1007
0
      break;
1008
0
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1009
0
      errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed));
1010
0
      break;
1011
0
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1012
0
      errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed));
1013
0
      break;
1014
0
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1015
0
      errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed));
1016
0
      break;
1017
0
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1018
0
      errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed));
1019
0
      break;
1020
0
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1021
0
      errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed));
1022
0
      break;
1023
0
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1024
0
      errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed));
1025
0
      break;
1026
0
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1027
0
      errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed));
1028
0
      break;
1029
0
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1030
0
      errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed));
1031
0
      break;
1032
0
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1033
0
      errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed));
1034
0
      break;
1035
0
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1036
0
      errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed));
1037
0
      break;
1038
0
    case M32C_OPERAND_BITNO16R :
1039
0
      errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8));
1040
0
      break;
1041
0
    case M32C_OPERAND_BITNO32PREFIXED :
1042
0
      errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed));
1043
0
      break;
1044
0
    case M32C_OPERAND_BITNO32UNPREFIXED :
1045
0
      errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed));
1046
0
      break;
1047
0
    case M32C_OPERAND_DSP_10_U6 :
1048
0
      errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6));
1049
0
      break;
1050
0
    case M32C_OPERAND_DSP_16_S16 :
1051
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16));
1052
0
      break;
1053
0
    case M32C_OPERAND_DSP_16_S8 :
1054
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8));
1055
0
      break;
1056
0
    case M32C_OPERAND_DSP_16_U16 :
1057
0
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16));
1058
0
      break;
1059
0
    case M32C_OPERAND_DSP_16_U20 :
1060
0
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24));
1061
0
      break;
1062
0
    case M32C_OPERAND_DSP_16_U24 :
1063
0
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24));
1064
0
      break;
1065
0
    case M32C_OPERAND_DSP_16_U8 :
1066
0
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8));
1067
0
      break;
1068
0
    case M32C_OPERAND_DSP_24_S16 :
1069
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16));
1070
0
      break;
1071
0
    case M32C_OPERAND_DSP_24_S8 :
1072
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8));
1073
0
      break;
1074
0
    case M32C_OPERAND_DSP_24_U16 :
1075
0
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16));
1076
0
      break;
1077
0
    case M32C_OPERAND_DSP_24_U20 :
1078
0
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24));
1079
0
      break;
1080
0
    case M32C_OPERAND_DSP_24_U24 :
1081
0
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24));
1082
0
      break;
1083
0
    case M32C_OPERAND_DSP_24_U8 :
1084
0
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8));
1085
0
      break;
1086
0
    case M32C_OPERAND_DSP_32_S16 :
1087
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16));
1088
0
      break;
1089
0
    case M32C_OPERAND_DSP_32_S8 :
1090
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8));
1091
0
      break;
1092
0
    case M32C_OPERAND_DSP_32_U16 :
1093
0
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16));
1094
0
      break;
1095
0
    case M32C_OPERAND_DSP_32_U20 :
1096
0
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24));
1097
0
      break;
1098
0
    case M32C_OPERAND_DSP_32_U24 :
1099
0
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24));
1100
0
      break;
1101
0
    case M32C_OPERAND_DSP_32_U8 :
1102
0
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8));
1103
0
      break;
1104
0
    case M32C_OPERAND_DSP_40_S16 :
1105
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16));
1106
0
      break;
1107
0
    case M32C_OPERAND_DSP_40_S8 :
1108
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8));
1109
0
      break;
1110
0
    case M32C_OPERAND_DSP_40_U16 :
1111
0
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16));
1112
0
      break;
1113
0
    case M32C_OPERAND_DSP_40_U20 :
1114
0
      errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20));
1115
0
      break;
1116
0
    case M32C_OPERAND_DSP_40_U24 :
1117
0
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24));
1118
0
      break;
1119
0
    case M32C_OPERAND_DSP_40_U8 :
1120
0
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8));
1121
0
      break;
1122
0
    case M32C_OPERAND_DSP_48_S16 :
1123
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16));
1124
0
      break;
1125
0
    case M32C_OPERAND_DSP_48_S8 :
1126
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8));
1127
0
      break;
1128
0
    case M32C_OPERAND_DSP_48_U16 :
1129
0
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16));
1130
0
      break;
1131
0
    case M32C_OPERAND_DSP_48_U20 :
1132
0
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20));
1133
0
      break;
1134
0
    case M32C_OPERAND_DSP_48_U24 :
1135
0
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24));
1136
0
      break;
1137
0
    case M32C_OPERAND_DSP_48_U8 :
1138
0
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8));
1139
0
      break;
1140
0
    case M32C_OPERAND_DSP_8_S24 :
1141
0
      errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24));
1142
0
      break;
1143
0
    case M32C_OPERAND_DSP_8_S8 :
1144
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8));
1145
0
      break;
1146
0
    case M32C_OPERAND_DSP_8_U16 :
1147
0
      errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16));
1148
0
      break;
1149
0
    case M32C_OPERAND_DSP_8_U24 :
1150
0
      errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24));
1151
0
      break;
1152
0
    case M32C_OPERAND_DSP_8_U6 :
1153
0
      errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6));
1154
0
      break;
1155
0
    case M32C_OPERAND_DSP_8_U8 :
1156
0
      errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8));
1157
0
      break;
1158
0
    case M32C_OPERAND_DST16AN :
1159
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an);
1160
0
      break;
1161
0
    case M32C_OPERAND_DST16AN_S :
1162
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s);
1163
0
      break;
1164
0
    case M32C_OPERAND_DST16ANHI :
1165
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an);
1166
0
      break;
1167
0
    case M32C_OPERAND_DST16ANQI :
1168
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an);
1169
0
      break;
1170
0
    case M32C_OPERAND_DST16ANQI_S :
1171
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s);
1172
0
      break;
1173
0
    case M32C_OPERAND_DST16ANSI :
1174
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an);
1175
0
      break;
1176
0
    case M32C_OPERAND_DST16RNEXTQI :
1177
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext);
1178
0
      break;
1179
0
    case M32C_OPERAND_DST16RNHI :
1180
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn);
1181
0
      break;
1182
0
    case M32C_OPERAND_DST16RNQI :
1183
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn);
1184
0
      break;
1185
0
    case M32C_OPERAND_DST16RNQI_S :
1186
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s);
1187
0
      break;
1188
0
    case M32C_OPERAND_DST16RNSI :
1189
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn);
1190
0
      break;
1191
0
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1192
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1193
0
      break;
1194
0
    case M32C_OPERAND_DST32ANPREFIXED :
1195
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1196
0
      break;
1197
0
    case M32C_OPERAND_DST32ANPREFIXEDHI :
1198
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed);
1199
0
      break;
1200
0
    case M32C_OPERAND_DST32ANPREFIXEDQI :
1201
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed);
1202
0
      break;
1203
0
    case M32C_OPERAND_DST32ANPREFIXEDSI :
1204
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed);
1205
0
      break;
1206
0
    case M32C_OPERAND_DST32ANUNPREFIXED :
1207
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1208
0
      break;
1209
0
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1210
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed);
1211
0
      break;
1212
0
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1213
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed);
1214
0
      break;
1215
0
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1216
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed);
1217
0
      break;
1218
0
    case M32C_OPERAND_DST32R0HI_S :
1219
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1220
0
      break;
1221
0
    case M32C_OPERAND_DST32R0QI_S :
1222
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1223
0
      break;
1224
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1225
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed);
1226
0
      break;
1227
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1228
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed);
1229
0
      break;
1230
0
    case M32C_OPERAND_DST32RNPREFIXEDHI :
1231
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI);
1232
0
      break;
1233
0
    case M32C_OPERAND_DST32RNPREFIXEDQI :
1234
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI);
1235
0
      break;
1236
0
    case M32C_OPERAND_DST32RNPREFIXEDSI :
1237
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI);
1238
0
      break;
1239
0
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1240
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI);
1241
0
      break;
1242
0
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1243
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI);
1244
0
      break;
1245
0
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1246
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI);
1247
0
      break;
1248
0
    case M32C_OPERAND_G :
1249
0
      errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk));
1250
0
      break;
1251
0
    case M32C_OPERAND_IMM_12_S4 :
1252
0
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4));
1253
0
      break;
1254
0
    case M32C_OPERAND_IMM_12_S4N :
1255
0
      errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4));
1256
0
      break;
1257
0
    case M32C_OPERAND_IMM_13_U3 :
1258
0
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3));
1259
0
      break;
1260
0
    case M32C_OPERAND_IMM_16_HI :
1261
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16));
1262
0
      break;
1263
0
    case M32C_OPERAND_IMM_16_QI :
1264
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8));
1265
0
      break;
1266
0
    case M32C_OPERAND_IMM_16_SI :
1267
0
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32));
1268
0
      break;
1269
0
    case M32C_OPERAND_IMM_20_S4 :
1270
0
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4));
1271
0
      break;
1272
0
    case M32C_OPERAND_IMM_24_HI :
1273
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16));
1274
0
      break;
1275
0
    case M32C_OPERAND_IMM_24_QI :
1276
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8));
1277
0
      break;
1278
0
    case M32C_OPERAND_IMM_24_SI :
1279
0
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32));
1280
0
      break;
1281
0
    case M32C_OPERAND_IMM_32_HI :
1282
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16));
1283
0
      break;
1284
0
    case M32C_OPERAND_IMM_32_QI :
1285
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8));
1286
0
      break;
1287
0
    case M32C_OPERAND_IMM_32_SI :
1288
0
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32));
1289
0
      break;
1290
0
    case M32C_OPERAND_IMM_40_HI :
1291
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16));
1292
0
      break;
1293
0
    case M32C_OPERAND_IMM_40_QI :
1294
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8));
1295
0
      break;
1296
0
    case M32C_OPERAND_IMM_40_SI :
1297
0
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32));
1298
0
      break;
1299
0
    case M32C_OPERAND_IMM_48_HI :
1300
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16));
1301
0
      break;
1302
0
    case M32C_OPERAND_IMM_48_QI :
1303
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8));
1304
0
      break;
1305
0
    case M32C_OPERAND_IMM_48_SI :
1306
0
      errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32));
1307
0
      break;
1308
0
    case M32C_OPERAND_IMM_56_HI :
1309
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16));
1310
0
      break;
1311
0
    case M32C_OPERAND_IMM_56_QI :
1312
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8));
1313
0
      break;
1314
0
    case M32C_OPERAND_IMM_64_HI :
1315
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16));
1316
0
      break;
1317
0
    case M32C_OPERAND_IMM_8_HI :
1318
0
      errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16));
1319
0
      break;
1320
0
    case M32C_OPERAND_IMM_8_QI :
1321
0
      errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8));
1322
0
      break;
1323
0
    case M32C_OPERAND_IMM_8_S4 :
1324
0
      errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4));
1325
0
      break;
1326
0
    case M32C_OPERAND_IMM_8_S4N :
1327
0
      errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4));
1328
0
      break;
1329
0
    case M32C_OPERAND_IMM_SH_12_S4 :
1330
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4);
1331
0
      break;
1332
0
    case M32C_OPERAND_IMM_SH_20_S4 :
1333
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4);
1334
0
      break;
1335
0
    case M32C_OPERAND_IMM_SH_8_S4 :
1336
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4);
1337
0
      break;
1338
0
    case M32C_OPERAND_IMM1_S :
1339
0
      errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S));
1340
0
      break;
1341
0
    case M32C_OPERAND_IMM3_S :
1342
0
      errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S));
1343
0
      break;
1344
0
    case M32C_OPERAND_LAB_16_8 :
1345
0
      {
1346
0
        bfd_vma value = 0;
1347
0
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL,  & value);
1348
0
        fields->f_lab_16_8 = value;
1349
0
      }
1350
0
      break;
1351
0
    case M32C_OPERAND_LAB_24_8 :
1352
0
      {
1353
0
        bfd_vma value = 0;
1354
0
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL,  & value);
1355
0
        fields->f_lab_24_8 = value;
1356
0
      }
1357
0
      break;
1358
0
    case M32C_OPERAND_LAB_32_8 :
1359
0
      {
1360
0
        bfd_vma value = 0;
1361
0
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL,  & value);
1362
0
        fields->f_lab_32_8 = value;
1363
0
      }
1364
0
      break;
1365
0
    case M32C_OPERAND_LAB_40_8 :
1366
0
      {
1367
0
        bfd_vma value = 0;
1368
0
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL,  & value);
1369
0
        fields->f_lab_40_8 = value;
1370
0
      }
1371
0
      break;
1372
0
    case M32C_OPERAND_LAB_5_3 :
1373
0
      {
1374
0
        bfd_vma value = 0;
1375
0
        errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL,  & value);
1376
0
        fields->f_lab_5_3 = value;
1377
0
      }
1378
0
      break;
1379
0
    case M32C_OPERAND_LAB_8_16 :
1380
0
      {
1381
0
        bfd_vma value = 0;
1382
0
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL,  & value);
1383
0
        fields->f_lab_8_16 = value;
1384
0
      }
1385
0
      break;
1386
0
    case M32C_OPERAND_LAB_8_24 :
1387
0
      {
1388
0
        bfd_vma value = 0;
1389
0
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL,  & value);
1390
0
        fields->f_lab_8_24 = value;
1391
0
      }
1392
0
      break;
1393
0
    case M32C_OPERAND_LAB_8_8 :
1394
0
      {
1395
0
        bfd_vma value = 0;
1396
0
        errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL,  & value);
1397
0
        fields->f_lab_8_8 = value;
1398
0
      }
1399
0
      break;
1400
0
    case M32C_OPERAND_LAB32_JMP_S :
1401
0
      {
1402
0
        bfd_vma value = 0;
1403
0
        errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL,  & value);
1404
0
        fields->f_lab32_jmp_s = value;
1405
0
      }
1406
0
      break;
1407
0
    case M32C_OPERAND_Q :
1408
0
      errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk));
1409
0
      break;
1410
0
    case M32C_OPERAND_R0 :
1411
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk);
1412
0
      break;
1413
0
    case M32C_OPERAND_R0H :
1414
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk);
1415
0
      break;
1416
0
    case M32C_OPERAND_R0L :
1417
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk);
1418
0
      break;
1419
0
    case M32C_OPERAND_R1 :
1420
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk);
1421
0
      break;
1422
0
    case M32C_OPERAND_R1R2R0 :
1423
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk);
1424
0
      break;
1425
0
    case M32C_OPERAND_R2 :
1426
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk);
1427
0
      break;
1428
0
    case M32C_OPERAND_R2R0 :
1429
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk);
1430
0
      break;
1431
0
    case M32C_OPERAND_R3 :
1432
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk);
1433
0
      break;
1434
0
    case M32C_OPERAND_R3R1 :
1435
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk);
1436
0
      break;
1437
0
    case M32C_OPERAND_REGSETPOP :
1438
0
      errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8));
1439
0
      break;
1440
0
    case M32C_OPERAND_REGSETPUSH :
1441
0
      errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8));
1442
0
      break;
1443
0
    case M32C_OPERAND_RN16_PUSH_S :
1444
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1);
1445
0
      break;
1446
0
    case M32C_OPERAND_S :
1447
0
      errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk));
1448
0
      break;
1449
0
    case M32C_OPERAND_SRC16AN :
1450
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an);
1451
0
      break;
1452
0
    case M32C_OPERAND_SRC16ANHI :
1453
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an);
1454
0
      break;
1455
0
    case M32C_OPERAND_SRC16ANQI :
1456
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an);
1457
0
      break;
1458
0
    case M32C_OPERAND_SRC16RNHI :
1459
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn);
1460
0
      break;
1461
0
    case M32C_OPERAND_SRC16RNQI :
1462
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn);
1463
0
      break;
1464
0
    case M32C_OPERAND_SRC32ANPREFIXED :
1465
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1466
0
      break;
1467
0
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
1468
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed);
1469
0
      break;
1470
0
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
1471
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed);
1472
0
      break;
1473
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
1474
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed);
1475
0
      break;
1476
0
    case M32C_OPERAND_SRC32ANUNPREFIXED :
1477
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1478
0
      break;
1479
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1480
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed);
1481
0
      break;
1482
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1483
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed);
1484
0
      break;
1485
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1486
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed);
1487
0
      break;
1488
0
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
1489
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI);
1490
0
      break;
1491
0
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
1492
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI);
1493
0
      break;
1494
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
1495
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI);
1496
0
      break;
1497
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1498
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI);
1499
0
      break;
1500
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1501
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI);
1502
0
      break;
1503
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1504
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI);
1505
0
      break;
1506
0
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1507
0
      errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1));
1508
0
      break;
1509
0
    case M32C_OPERAND_X :
1510
0
      errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk));
1511
0
      break;
1512
0
    case M32C_OPERAND_Z :
1513
0
      errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk));
1514
0
      break;
1515
0
    case M32C_OPERAND_COND16_16 :
1516
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8);
1517
0
      break;
1518
0
    case M32C_OPERAND_COND16_24 :
1519
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8);
1520
0
      break;
1521
0
    case M32C_OPERAND_COND16_32 :
1522
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8);
1523
0
      break;
1524
0
    case M32C_OPERAND_COND16C :
1525
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16);
1526
0
      break;
1527
0
    case M32C_OPERAND_COND16J :
1528
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16);
1529
0
      break;
1530
0
    case M32C_OPERAND_COND16J5 :
1531
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5);
1532
0
      break;
1533
0
    case M32C_OPERAND_COND32 :
1534
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32);
1535
0
      break;
1536
0
    case M32C_OPERAND_COND32_16 :
1537
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8);
1538
0
      break;
1539
0
    case M32C_OPERAND_COND32_24 :
1540
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8);
1541
0
      break;
1542
0
    case M32C_OPERAND_COND32_32 :
1543
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8);
1544
0
      break;
1545
0
    case M32C_OPERAND_COND32_40 :
1546
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8);
1547
0
      break;
1548
0
    case M32C_OPERAND_COND32J :
1549
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j);
1550
0
      break;
1551
0
    case M32C_OPERAND_CR1_PREFIXED_32 :
1552
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3);
1553
0
      break;
1554
0
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
1555
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3);
1556
0
      break;
1557
0
    case M32C_OPERAND_CR16 :
1558
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3);
1559
0
      break;
1560
0
    case M32C_OPERAND_CR2_32 :
1561
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3);
1562
0
      break;
1563
0
    case M32C_OPERAND_CR3_PREFIXED_32 :
1564
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3);
1565
0
      break;
1566
0
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
1567
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3);
1568
0
      break;
1569
0
    case M32C_OPERAND_FLAGS16 :
1570
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3);
1571
0
      break;
1572
0
    case M32C_OPERAND_FLAGS32 :
1573
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3);
1574
0
      break;
1575
0
    case M32C_OPERAND_SCCOND32 :
1576
0
      errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16);
1577
0
      break;
1578
0
    case M32C_OPERAND_SIZE :
1579
0
      errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk));
1580
0
      break;
1581
1582
0
    default :
1583
      /* xgettext:c-format */
1584
0
      opcodes_error_handler
1585
0
  (_("internal error: unrecognized field %d while parsing"),
1586
0
   opindex);
1587
0
      abort ();
1588
0
  }
1589
1590
0
  return errmsg;
1591
0
}
1592
1593
cgen_parse_fn * const m32c_cgen_parse_handlers[] =
1594
{
1595
  parse_insn_normal,
1596
};
1597
1598
void
1599
m32c_cgen_init_asm (CGEN_CPU_DESC cd)
1600
0
{
1601
0
  m32c_cgen_init_opcode_table (cd);
1602
0
  m32c_cgen_init_ibld_table (cd);
1603
0
  cd->parse_handlers = & m32c_cgen_parse_handlers[0];
1604
0
  cd->parse_operand = m32c_cgen_parse_operand;
1605
#ifdef CGEN_ASM_INIT_HOOK
1606
CGEN_ASM_INIT_HOOK
1607
#endif
1608
0
}
1609
1610

1611
1612
/* Regex construction routine.
1613
1614
   This translates an opcode syntax string into a regex string,
1615
   by replacing any non-character syntax element (such as an
1616
   opcode) with the pattern '.*'
1617
1618
   It then compiles the regex and stores it in the opcode, for
1619
   later use by m32c_cgen_assemble_insn
1620
1621
   Returns NULL for success, an error message for failure.  */
1622
1623
char *
1624
m32c_cgen_build_insn_regex (CGEN_INSN *insn)
1625
36.0k
{
1626
36.0k
  CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
1627
36.0k
  const char *mnem = CGEN_INSN_MNEMONIC (insn);
1628
36.0k
  char rxbuf[CGEN_MAX_RX_ELEMENTS];
1629
36.0k
  char *rx = rxbuf;
1630
36.0k
  const CGEN_SYNTAX_CHAR_TYPE *syn;
1631
36.0k
  int reg_err;
1632
1633
36.0k
  syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
1634
1635
  /* Mnemonics come first in the syntax string.  */
1636
36.0k
  if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1637
3
    return _("missing mnemonic in syntax string");
1638
36.0k
  ++syn;
1639
1640
  /* Generate a case sensitive regular expression that emulates case
1641
     insensitive matching in the "C" locale.  We cannot generate a case
1642
     insensitive regular expression because in Turkish locales, 'i' and 'I'
1643
     are not equal modulo case conversion.  */
1644
1645
  /* Copy the literal mnemonic out of the insn.  */
1646
223k
  for (; *mnem; mnem++)
1647
186k
    {
1648
186k
      char c = *mnem;
1649
1650
186k
      if (ISALPHA (c))
1651
154k
  {
1652
154k
    *rx++ = '[';
1653
154k
    *rx++ = TOLOWER (c);
1654
154k
    *rx++ = TOUPPER (c);
1655
154k
    *rx++ = ']';
1656
154k
  }
1657
32.4k
      else
1658
32.4k
  *rx++ = c;
1659
186k
    }
1660
1661
  /* Copy any remaining literals from the syntax string into the rx.  */
1662
348k
  for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
1663
312k
    {
1664
312k
      if (CGEN_SYNTAX_CHAR_P (* syn))
1665
202k
  {
1666
202k
    char c = CGEN_SYNTAX_CHAR (* syn);
1667
1668
202k
    switch (c)
1669
202k
      {
1670
        /* Escape any regex metacharacters in the syntax.  */
1671
40.7k
      case '.': case '[': case '\\':
1672
40.7k
      case '*': case '^': case '$':
1673
1674
#ifdef CGEN_ESCAPE_EXTENDED_REGEX
1675
      case '?': case '{': case '}':
1676
      case '(': case ')': case '*':
1677
      case '|': case '+': case ']':
1678
#endif
1679
40.7k
        *rx++ = '\\';
1680
40.7k
        *rx++ = c;
1681
40.7k
        break;
1682
1683
161k
      default:
1684
161k
        if (ISALPHA (c))
1685
45.3k
    {
1686
45.3k
      *rx++ = '[';
1687
45.3k
      *rx++ = TOLOWER (c);
1688
45.3k
      *rx++ = TOUPPER (c);
1689
45.3k
      *rx++ = ']';
1690
45.3k
    }
1691
116k
        else
1692
116k
    *rx++ = c;
1693
161k
        break;
1694
202k
      }
1695
202k
  }
1696
109k
      else
1697
109k
  {
1698
    /* Replace non-syntax fields with globs.  */
1699
109k
    *rx++ = '.';
1700
109k
    *rx++ = '*';
1701
109k
  }
1702
312k
    }
1703
1704
  /* Trailing whitespace ok.  */
1705
36.0k
  * rx++ = '[';
1706
36.0k
  * rx++ = ' ';
1707
36.0k
  * rx++ = '\t';
1708
36.0k
  * rx++ = ']';
1709
36.0k
  * rx++ = '*';
1710
1711
  /* But anchor it after that.  */
1712
36.0k
  * rx++ = '$';
1713
36.0k
  * rx = '\0';
1714
1715
36.0k
  CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
1716
36.0k
  reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
1717
1718
36.0k
  if (reg_err == 0)
1719
36.0k
    return NULL;
1720
0
  else
1721
0
    {
1722
0
      static char msg[80];
1723
1724
0
      regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
1725
0
      regfree ((regex_t *) CGEN_INSN_RX (insn));
1726
0
      free (CGEN_INSN_RX (insn));
1727
0
      (CGEN_INSN_RX (insn)) = NULL;
1728
0
      return msg;
1729
0
    }
1730
36.0k
}
1731
1732

1733
/* Default insn parser.
1734
1735
   The syntax string is scanned and operands are parsed and stored in FIELDS.
1736
   Relocs are queued as we go via other callbacks.
1737
1738
   ??? Note that this is currently an all-or-nothing parser.  If we fail to
1739
   parse the instruction, we return 0 and the caller will start over from
1740
   the beginning.  Backtracking will be necessary in parsing subexpressions,
1741
   but that can be handled there.  Not handling backtracking here may get
1742
   expensive in the case of the m68k.  Deal with later.
1743
1744
   Returns NULL for success, an error message for failure.  */
1745
1746
static const char *
1747
parse_insn_normal (CGEN_CPU_DESC cd,
1748
       const CGEN_INSN *insn,
1749
       const char **strp,
1750
       CGEN_FIELDS *fields)
1751
0
{
1752
  /* ??? Runtime added insns not handled yet.  */
1753
0
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
1754
0
  const char *str = *strp;
1755
0
  const char *errmsg;
1756
0
  const char *p;
1757
0
  const CGEN_SYNTAX_CHAR_TYPE * syn;
1758
0
#ifdef CGEN_MNEMONIC_OPERANDS
1759
  /* FIXME: wip */
1760
0
  int past_opcode_p;
1761
0
#endif
1762
1763
  /* For now we assume the mnemonic is first (there are no leading operands).
1764
     We can parse it without needing to set up operand parsing.
1765
     GAS's input scrubber will ensure mnemonics are lowercase, but we may
1766
     not be called from GAS.  */
1767
0
  p = CGEN_INSN_MNEMONIC (insn);
1768
0
  while (*p && TOLOWER (*p) == TOLOWER (*str))
1769
0
    ++p, ++str;
1770
1771
0
  if (* p)
1772
0
    return _("unrecognized instruction");
1773
1774
#ifndef CGEN_MNEMONIC_OPERANDS
1775
  if (* str && ! ISSPACE (* str))
1776
    return _("unrecognized instruction");
1777
#endif
1778
1779
0
  CGEN_INIT_PARSE (cd);
1780
0
  cgen_init_parse_operand (cd);
1781
0
#ifdef CGEN_MNEMONIC_OPERANDS
1782
0
  past_opcode_p = 0;
1783
0
#endif
1784
1785
  /* We don't check for (*str != '\0') here because we want to parse
1786
     any trailing fake arguments in the syntax string.  */
1787
0
  syn = CGEN_SYNTAX_STRING (syntax);
1788
1789
  /* Mnemonics come first for now, ensure valid string.  */
1790
0
  if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
1791
0
    abort ();
1792
1793
0
  ++syn;
1794
1795
0
  while (* syn != 0)
1796
0
    {
1797
      /* Non operand chars must match exactly.  */
1798
0
      if (CGEN_SYNTAX_CHAR_P (* syn))
1799
0
  {
1800
    /* FIXME: While we allow for non-GAS callers above, we assume the
1801
       first char after the mnemonic part is a space.  */
1802
    /* FIXME: We also take inappropriate advantage of the fact that
1803
       GAS's input scrubber will remove extraneous blanks.  */
1804
0
    if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
1805
0
      {
1806
0
#ifdef CGEN_MNEMONIC_OPERANDS
1807
0
        if (CGEN_SYNTAX_CHAR(* syn) == ' ')
1808
0
    past_opcode_p = 1;
1809
0
#endif
1810
0
        ++ syn;
1811
0
        ++ str;
1812
0
      }
1813
0
    else if (*str)
1814
0
      {
1815
        /* Syntax char didn't match.  Can't be this insn.  */
1816
0
        static char msg [80];
1817
1818
        /* xgettext:c-format */
1819
0
        sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
1820
0
           CGEN_SYNTAX_CHAR(*syn), *str);
1821
0
        return msg;
1822
0
      }
1823
0
    else
1824
0
      {
1825
        /* Ran out of input.  */
1826
0
        static char msg [80];
1827
1828
        /* xgettext:c-format */
1829
0
        sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
1830
0
           CGEN_SYNTAX_CHAR(*syn));
1831
0
        return msg;
1832
0
      }
1833
0
    continue;
1834
0
  }
1835
1836
0
#ifdef CGEN_MNEMONIC_OPERANDS
1837
0
      (void) past_opcode_p;
1838
0
#endif
1839
      /* We have an operand of some sort.  */
1840
0
      errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields);
1841
0
      if (errmsg)
1842
0
  return errmsg;
1843
1844
      /* Done with this operand, continue with next one.  */
1845
0
      ++ syn;
1846
0
    }
1847
1848
  /* If we're at the end of the syntax string, we're done.  */
1849
0
  if (* syn == 0)
1850
0
    {
1851
      /* FIXME: For the moment we assume a valid `str' can only contain
1852
   blanks now.  IE: We needn't try again with a longer version of
1853
   the insn and it is assumed that longer versions of insns appear
1854
   before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
1855
0
      while (ISSPACE (* str))
1856
0
  ++ str;
1857
1858
0
      if (* str != '\0')
1859
0
  return _("junk at end of line"); /* FIXME: would like to include `str' */
1860
1861
0
      return NULL;
1862
0
    }
1863
1864
  /* We couldn't parse it.  */
1865
0
  return _("unrecognized instruction");
1866
0
}
1867

1868
/* Main entry point.
1869
   This routine is called for each instruction to be assembled.
1870
   STR points to the insn to be assembled.
1871
   We assume all necessary tables have been initialized.
1872
   The assembled instruction, less any fixups, is stored in BUF.
1873
   Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
1874
   still needs to be converted to target byte order, otherwise BUF is an array
1875
   of bytes in target byte order.
1876
   The result is a pointer to the insn's entry in the opcode table,
1877
   or NULL if an error occured (an error message will have already been
1878
   printed).
1879
1880
   Note that when processing (non-alias) macro-insns,
1881
   this function recurses.
1882
1883
   ??? It's possible to make this cpu-independent.
1884
   One would have to deal with a few minor things.
1885
   At this point in time doing so would be more of a curiosity than useful
1886
   [for example this file isn't _that_ big], but keeping the possibility in
1887
   mind helps keep the design clean.  */
1888
1889
const CGEN_INSN *
1890
m32c_cgen_assemble_insn (CGEN_CPU_DESC cd,
1891
         const char *str,
1892
         CGEN_FIELDS *fields,
1893
         CGEN_INSN_BYTES_PTR buf,
1894
         char **errmsg)
1895
0
{
1896
0
  const char *start;
1897
0
  CGEN_INSN_LIST *ilist;
1898
0
  const char *parse_errmsg = NULL;
1899
0
  const char *insert_errmsg = NULL;
1900
0
  int recognized_mnemonic = 0;
1901
1902
  /* Skip leading white space.  */
1903
0
  while (ISSPACE (* str))
1904
0
    ++ str;
1905
1906
  /* The instructions are stored in hashed lists.
1907
     Get the first in the list.  */
1908
0
  ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
1909
1910
  /* Keep looking until we find a match.  */
1911
0
  start = str;
1912
0
  for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
1913
0
    {
1914
0
      const CGEN_INSN *insn = ilist->insn;
1915
0
      recognized_mnemonic = 1;
1916
1917
0
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
1918
      /* Not usually needed as unsupported opcodes
1919
   shouldn't be in the hash lists.  */
1920
      /* Is this insn supported by the selected cpu?  */
1921
0
      if (! m32c_cgen_insn_supported (cd, insn))
1922
0
  continue;
1923
0
#endif
1924
      /* If the RELAXED attribute is set, this is an insn that shouldn't be
1925
   chosen immediately.  Instead, it is used during assembler/linker
1926
   relaxation if possible.  */
1927
0
      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
1928
0
  continue;
1929
1930
0
      str = start;
1931
1932
      /* Skip this insn if str doesn't look right lexically.  */
1933
0
      if (CGEN_INSN_RX (insn) != NULL &&
1934
0
    regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
1935
0
  continue;
1936
1937
      /* Allow parse/insert handlers to obtain length of insn.  */
1938
0
      CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
1939
1940
0
      parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
1941
0
      if (parse_errmsg != NULL)
1942
0
  continue;
1943
1944
      /* ??? 0 is passed for `pc'.  */
1945
0
      insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
1946
0
             (bfd_vma) 0);
1947
0
      if (insert_errmsg != NULL)
1948
0
        continue;
1949
1950
      /* It is up to the caller to actually output the insn and any
1951
         queued relocs.  */
1952
0
      return insn;
1953
0
    }
1954
1955
0
  {
1956
0
    static char errbuf[150];
1957
0
    const char *tmp_errmsg;
1958
0
#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
1959
0
#define be_verbose 1
1960
#else
1961
#define be_verbose 0
1962
#endif
1963
1964
0
    if (be_verbose)
1965
0
      {
1966
  /* If requesting verbose error messages, use insert_errmsg.
1967
     Failing that, use parse_errmsg.  */
1968
0
  tmp_errmsg = (insert_errmsg ? insert_errmsg :
1969
0
          parse_errmsg ? parse_errmsg :
1970
0
          recognized_mnemonic ?
1971
0
          _("unrecognized form of instruction") :
1972
0
          _("unrecognized instruction"));
1973
1974
0
  if (strlen (start) > 50)
1975
    /* xgettext:c-format */
1976
0
    sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
1977
0
  else
1978
    /* xgettext:c-format */
1979
0
    sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
1980
0
      }
1981
0
    else
1982
0
      {
1983
0
  if (strlen (start) > 50)
1984
    /* xgettext:c-format */
1985
0
    sprintf (errbuf, _("bad instruction `%.50s...'"), start);
1986
0
  else
1987
    /* xgettext:c-format */
1988
0
    sprintf (errbuf, _("bad instruction `%.50s'"), start);
1989
0
      }
1990
1991
0
    *errmsg = errbuf;
1992
0
    return NULL;
1993
0
  }
1994
0
}