/src/binutils-gdb/opcodes/micromips-opc.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* micromips-opc.c. microMIPS opcode table. |
2 | | Copyright (C) 2008-2025 Free Software Foundation, Inc. |
3 | | Contributed by Chao-ying Fu, MIPS Technologies, Inc. |
4 | | |
5 | | This file is part of the GNU opcodes library. |
6 | | |
7 | | This library is free software; you can redistribute it and/or modify |
8 | | it under the terms of the GNU General Public License as published by |
9 | | the Free Software Foundation; either version 3, or (at your option) |
10 | | any later version. |
11 | | |
12 | | It is distributed in the hope that it will be useful, but WITHOUT |
13 | | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
14 | | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
15 | | License for more details. |
16 | | |
17 | | You should have received a copy of the GNU General Public License |
18 | | along with this file; see the file COPYING. If not, write to the |
19 | | Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
20 | | MA 02110-1301, USA. */ |
21 | | |
22 | | #include "sysdep.h" |
23 | | #include "opcode/mips.h" |
24 | | #include "mips-formats.h" |
25 | | |
26 | | static unsigned char reg_0_map[] = { 0 }; |
27 | | static unsigned char reg_28_map[] = { 28 }; |
28 | | static unsigned char reg_29_map[] = { 29 }; |
29 | | static unsigned char reg_31_map[] = { 31 }; |
30 | | static unsigned char reg_m16_map[] = { 16, 17, 2, 3, 4, 5, 6, 7 }; |
31 | | static unsigned char reg_mn_map[] = { 0, 17, 2, 3, 16, 18, 19, 20 }; |
32 | | static unsigned char reg_q_map[] = { 0, 17, 2, 3, 4, 5, 6, 7 }; |
33 | | |
34 | | static unsigned char reg_h_map1[] = { 5, 5, 6, 4, 4, 4, 4, 4 }; |
35 | | static unsigned char reg_h_map2[] = { 6, 7, 7, 21, 22, 5, 6, 7 }; |
36 | | |
37 | | static int int_b_map[] = { |
38 | | 1, 4, 8, 12, 16, 20, 24, -1 |
39 | | }; |
40 | | static int int_c_map[] = { |
41 | | 128, 1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, 255, 32768, 65535 |
42 | | }; |
43 | | |
44 | | /* Return the mips_operand structure for the operand at the beginning of P. */ |
45 | | |
46 | | const struct mips_operand * |
47 | | decode_micromips_operand (const char *p) |
48 | 2.53M | { |
49 | 2.53M | switch (p[0]) |
50 | 2.53M | { |
51 | 1.03M | case 'm': |
52 | 1.03M | switch (p[1]) |
53 | 1.03M | { |
54 | 43.2k | case 'a': MAPPED_REG (0, 0, GP, reg_28_map); |
55 | 10.6k | case 'b': MAPPED_REG (3, 23, GP, reg_m16_map); |
56 | 57.2k | case 'c': OPTIONAL_MAPPED_REG (3, 4, GP, reg_m16_map); |
57 | 211k | case 'd': MAPPED_REG (3, 7, GP, reg_m16_map); |
58 | 21.5k | case 'e': OPTIONAL_MAPPED_REG (3, 1, GP, reg_m16_map); |
59 | 3.07k | case 'f': MAPPED_REG (3, 3, GP, reg_m16_map); |
60 | 3.07k | case 'g': MAPPED_REG (3, 0, GP, reg_m16_map); |
61 | 7.75k | case 'h': REG_PAIR (3, 7, GP, reg_h_map); |
62 | 20.5k | case 'j': REG (5, 0, GP); |
63 | 101k | case 'l': MAPPED_REG (3, 4, GP, reg_m16_map); |
64 | 7.75k | case 'm': MAPPED_REG (3, 1, GP, reg_mn_map); |
65 | 7.75k | case 'n': MAPPED_REG (3, 4, GP, reg_mn_map); |
66 | 36.5k | case 'p': REG (5, 5, GP); |
67 | 35.7k | case 'q': MAPPED_REG (3, 7, GP, reg_q_map); |
68 | 10.6k | case 'r': SPECIAL (0, 0, PC); |
69 | 86.0k | case 's': MAPPED_REG (0, 0, GP, reg_29_map); |
70 | 51.5k | case 't': SPECIAL (0, 0, REPEAT_PREV_REG); |
71 | 0 | case 'x': SPECIAL (0, 0, REPEAT_DEST_REG); |
72 | 0 | case 'y': MAPPED_REG (0, 0, GP, reg_31_map); |
73 | 0 | case 'z': MAPPED_REG (0, 0, GP, reg_0_map); |
74 | |
|
75 | 43.2k | case 'A': INT_ADJ (7, 0, 63, 2, false); /* (-64 .. 63) << 2 */ |
76 | 18.4k | case 'B': MAPPED_INT (3, 1, int_b_map, false); |
77 | 21.9k | case 'C': MAPPED_INT (4, 0, int_c_map, true); |
78 | 10.7k | case 'D': BRANCH (10, 0, 1); |
79 | 16.6k | case 'E': BRANCH (7, 0, 1); |
80 | 36 | case 'F': HINT (4, 0); |
81 | 15.5k | case 'G': INT_ADJ (4, 0, 14, 0, false); /* (-1 .. 14) */ |
82 | 23.5k | case 'H': INT_ADJ (4, 0, 15, 1, false); /* (0 .. 15) << 1 */ |
83 | 7.32k | case 'I': INT_ADJ (7, 0, 126, 0, false); /* (-1 .. 126) */ |
84 | 37.2k | case 'J': INT_ADJ (4, 0, 15, 2, false); /* (0 .. 15) << 2 */ |
85 | 8.54k | case 'L': INT_ADJ (4, 0, 15, 0, false); /* (0 .. 15) */ |
86 | 16.7k | case 'M': INT_ADJ (3, 1, 8, 0, false); /* (1 .. 8) */ |
87 | 5.31k | case 'N': SPECIAL (2, 4, LWM_SWM_LIST); |
88 | 40 | case 'O': HINT (4, 0); |
89 | 160 | case 'P': INT_ADJ (5, 0, 31, 2, false); /* (0 .. 31) << 2 */ |
90 | 10.6k | case 'Q': INT_ADJ (23, 0, 4194303, 2, false); |
91 | | /* (-4194304 .. 4194303) */ |
92 | 16.1k | case 'U': INT_ADJ (5, 0, 31, 2, false); /* (0 .. 31) << 2 */ |
93 | 21.4k | case 'W': INT_ADJ (6, 1, 63, 2, false); /* (0 .. 63) << 2 */ |
94 | 5.95k | case 'X': SINT (4, 1); |
95 | 43.1k | case 'Y': SPECIAL (9, 1, ADDIUSP_INT); |
96 | 0 | case 'Z': UINT (0, 0); /* 0 only */ |
97 | 1.03M | } |
98 | 0 | break; |
99 | | |
100 | 81.1k | case '+': |
101 | 81.1k | switch (p[1]) |
102 | 81.1k | { |
103 | 6.63k | case 'A': BIT (5, 6, 0); /* (0 .. 31) */ |
104 | 2.91k | case 'B': MSB (5, 11, 1, true, 32); /* (1 .. 32), 32-bit op */ |
105 | 2.24k | case 'C': MSB (5, 11, 1, false, 32); /* (1 .. 32), 32-bit op */ |
106 | 696 | case 'E': BIT (5, 6, 32); /* (32 .. 63) */ |
107 | 1.37k | case 'F': MSB (5, 11, 33, true, 64); /* (33 .. 64), 64-bit op */ |
108 | 294 | case 'G': MSB (5, 11, 33, false, 64); /* (33 .. 64), 64-bit op */ |
109 | 498 | case 'H': MSB (5, 11, 1, false, 64); /* (1 .. 32), 64-bit op */ |
110 | 448 | case 'J': HINT (10, 16); |
111 | 366 | case 'T': INT_ADJ (10, 16, 511, 0, false); /* (-512 .. 511) << 0 */ |
112 | 338 | case 'U': INT_ADJ (10, 16, 511, 1, false); /* (-512 .. 511) << 1 */ |
113 | 986 | case 'V': INT_ADJ (10, 16, 511, 2, false); /* (-512 .. 511) << 2 */ |
114 | 860 | case 'W': INT_ADJ (10, 16, 511, 3, false); /* (-512 .. 511) << 3 */ |
115 | |
|
116 | 12.8k | case 'd': REG (5, 6, MSA); |
117 | 10.3k | case 'e': REG (5, 11, MSA); |
118 | 6.83k | case 'h': REG (5, 16, MSA); |
119 | 10.6k | case 'i': JALX (26, 0, 2); |
120 | 11.8k | case 'j': SINT (9, 0); |
121 | 588 | case 'k': REG (5, 6, GP); |
122 | 564 | case 'l': REG (5, 6, MSA_CTRL); |
123 | 218 | case 'n': REG (5, 11, MSA_CTRL); |
124 | 620 | case 'o': SPECIAL (4, 16, IMM_INDEX); |
125 | 538 | case 'u': SPECIAL (3, 16, IMM_INDEX); |
126 | 264 | case 'v': SPECIAL (2, 16, IMM_INDEX); |
127 | 258 | case 'w': SPECIAL (1, 16, IMM_INDEX); |
128 | 468 | case 'x': BIT (5, 16, 0); /* (0 .. 31) */ |
129 | |
|
130 | 3.40k | case '~': BIT (2, 6, 1); /* (1 .. 4) */ |
131 | 274 | case '!': BIT (3, 16, 0); /* (0 .. 7) */ |
132 | 528 | case '@': BIT (4, 16, 0); /* (0 .. 15) */ |
133 | 412 | case '#': BIT (6, 16, 0); /* (0 .. 63) */ |
134 | 324 | case '$': UINT (5, 16); /* (0 .. 31) */ |
135 | 522 | case '%': SINT (5, 16); /* (-16 .. 15) */ |
136 | 272 | case '^': SINT (10, 11); /* (-512 .. 511) */ |
137 | 616 | case '&': SPECIAL (0, 0, IMM_INDEX); |
138 | 584 | case '*': SPECIAL (5, 16, REG_INDEX); |
139 | 584 | case '|': BIT (8, 16, 0); /* (0 .. 255) */ |
140 | 81.1k | } |
141 | 0 | break; |
142 | | |
143 | 364 | case '.': SINT (10, 6); |
144 | 50.1k | case '<': BIT (5, 11, 0); /* (0 .. 31) */ |
145 | 0 | case '>': BIT (5, 11, 32); /* (32 .. 63) */ |
146 | 996 | case '\\': BIT (3, 21, 0); /* (0 .. 7) */ |
147 | 334 | case '|': HINT (4, 12); |
148 | 40.7k | case '~': SINT (12, 0); |
149 | 518 | case '@': SINT (10, 16); |
150 | 462 | case '^': HINT (5, 11); |
151 | 444 | case '*': REG (2, 23, ACC); |
152 | 648 | case '!': UINT (1, 10); |
153 | 648 | case '$': UINT (1, 9); |
154 | 210 | case '&': REG (2, 18, ACC); |
155 | |
|
156 | 406 | case '0': SINT (6, 16); |
157 | 188 | case '1': HINT (5, 16); |
158 | 230 | case '2': HINT (2, 14); |
159 | 286 | case '3': HINT (3, 13); |
160 | 428 | case '4': HINT (4, 12); |
161 | 296 | case '5': HINT (8, 13); |
162 | 798 | case '6': HINT (5, 16); |
163 | 1.71k | case '7': REG (2, 14, ACC); |
164 | 254 | case '8': HINT (6, 14); |
165 | |
|
166 | 14.7k | case 'C': HINT (23, 3); |
167 | 3.93k | case 'D': REG (5, 11, FP); |
168 | 12.3k | case 'E': REG (5, 21, COPRO); |
169 | 3.73k | case 'G': REG (5, 16, COPRO); |
170 | 252 | case 'K': REG (5, 16, HW); |
171 | 1.15k | case 'H': UINT (3, 11); |
172 | 3.00k | case 'J': UINT (3, 4); |
173 | 230 | case 'M': REG (3, 13, CCC); |
174 | 640 | case 'N': REG (3, 18, CCC); |
175 | 3.27k | case 'R': REG (5, 6, FP); |
176 | 3.51k | case 'S': REG (5, 16, FP); |
177 | 35.0k | case 'T': REG (5, 21, FP); |
178 | 608 | case 'V': OPTIONAL_REG (5, 16, FP); |
179 | |
|
180 | 32.4k | case 'a': JUMP (26, 0, 1); |
181 | 260k | case 'b': REG (5, 16, GP); |
182 | 2.57k | case 'c': HINT (10, 16); |
183 | 16.8k | case 'd': REG (5, 11, GP); |
184 | 874 | case 'g': REG (5, 16, CONTROL); |
185 | 378 | case 'h': HINT (5, 11); |
186 | 41.8k | case 'i': HINT (16, 0); |
187 | 56.3k | case 'j': SINT (16, 0); |
188 | 3.42k | case 'k': HINT (5, 21); |
189 | 9.37k | case 'n': SPECIAL (5, 21, LWM_SWM_LIST); |
190 | 207k | case 'o': SINT (16, 0); |
191 | 17.9k | case 'p': BRANCH (16, 0, 1); |
192 | 2.33k | case 'q': HINT (10, 6); |
193 | 150k | case 'r': OPTIONAL_REG (5, 16, GP); |
194 | 30.0k | case 's': REG (5, 16, GP); |
195 | 390k | case 't': REG (5, 21, GP); |
196 | 540 | case 'u': HINT (16, 0); |
197 | 6.78k | case 'v': OPTIONAL_REG (5, 16, GP); |
198 | 378 | case 'w': OPTIONAL_REG (5, 21, GP); |
199 | 580 | case 'x': REG (5, 6, GP); |
200 | 204 | case 'y': REG (5, 21, CONTROL); |
201 | 188 | case 'z': MAPPED_REG (0, 0, GP, reg_0_map); |
202 | 2.53M | } |
203 | 0 | return 0; |
204 | 2.53M | } |
205 | | |
206 | | #define AL INSN2_ALIAS |
207 | | |
208 | | #define UBD INSN_UNCOND_BRANCH_DELAY |
209 | | #define CBD INSN_COND_BRANCH_DELAY |
210 | | #define NODS INSN_NO_DELAY_SLOT |
211 | | #define TRAP INSN_NO_DELAY_SLOT |
212 | | #define LM INSN_LOAD_MEMORY |
213 | | #define SM INSN_STORE_MEMORY |
214 | | #define CM INSN_COPROC_MOVE |
215 | | #define LC INSN_LOAD_COPROC |
216 | | #define BD16 INSN2_BRANCH_DELAY_16BIT /* Used in pinfo2. */ |
217 | | #define BD32 INSN2_BRANCH_DELAY_32BIT /* Used in pinfo2. */ |
218 | | |
219 | | #define WR_1 INSN_WRITE_1 |
220 | | #define WR_2 INSN_WRITE_2 |
221 | | #define RD_1 INSN_READ_1 |
222 | | #define RD_2 INSN_READ_2 |
223 | | #define RD_3 INSN_READ_3 |
224 | | #define RD_4 INSN_READ_4 |
225 | | #define MOD_1 (WR_1|RD_1) |
226 | | #define MOD_2 (WR_2|RD_2) |
227 | | |
228 | | /* For 16-bit/32-bit microMIPS instructions. They are used in pinfo2. */ |
229 | | #define UBR INSN2_UNCOND_BRANCH |
230 | | #define CBR INSN2_COND_BRANCH |
231 | | #define RD_sp INSN2_READ_SP |
232 | | #define WR_sp INSN2_WRITE_SP |
233 | | #define RD_31 INSN2_READ_GPR_31 |
234 | | #define RD_pc INSN2_READ_PC |
235 | | |
236 | | /* For 32-bit microMIPS instructions. */ |
237 | | #define WR_31 INSN_WRITE_GPR_31 |
238 | | #define WR_CC INSN_WRITE_COND_CODE |
239 | | |
240 | | #define RD_CC INSN_READ_COND_CODE |
241 | | #define RD_C0 INSN_COP |
242 | | #define RD_C1 INSN_COP |
243 | | #define RD_C2 INSN_COP |
244 | | #define WR_C0 INSN_COP |
245 | | #define WR_C1 INSN_COP |
246 | | #define WR_C2 INSN_COP |
247 | | #define CP INSN_COP |
248 | | |
249 | | #define WR_HI INSN_WRITE_HI |
250 | | #define RD_HI INSN_READ_HI |
251 | | |
252 | | #define WR_LO INSN_WRITE_LO |
253 | | #define RD_LO INSN_READ_LO |
254 | | |
255 | | #define WR_HILO WR_HI|WR_LO |
256 | | #define RD_HILO RD_HI|RD_LO |
257 | | #define MOD_HILO WR_HILO|RD_HILO |
258 | | |
259 | | /* Reuse INSN_ISA1 for 32-bit microMIPS ISA. All instructions in I1 |
260 | | are accepted as 32-bit microMIPS ISA. |
261 | | Reuse INSN_ISA3 for 64-bit microMIPS ISA. All instructions in I3 |
262 | | are accepted as 64-bit microMIPS ISA. */ |
263 | | #define I1 INSN_ISA1 |
264 | | #define I3 INSN_ISA3 |
265 | | #define I36 INSN_ISA32R5 |
266 | | |
267 | | /* MIPS DSP ASE support. */ |
268 | | #define WR_a WR_HILO /* Write DSP accumulators (reuse WR_HILO). */ |
269 | | #define RD_a RD_HILO /* Read DSP accumulators (reuse RD_HILO). */ |
270 | | #define MOD_a WR_a|RD_a |
271 | | #define DSP_VOLA INSN_NO_DELAY_SLOT |
272 | | #define D32 ASE_DSP |
273 | | #define D33 ASE_DSPR2 |
274 | | |
275 | | /* MIPS MT ASE support. */ |
276 | | #define MT32 ASE_MT |
277 | | |
278 | | /* MIPS MCU (MicroController) ASE support. */ |
279 | | #define MC ASE_MCU |
280 | | |
281 | | /* MIPS Enhanced VA Scheme. */ |
282 | | #define EVA ASE_EVA |
283 | | |
284 | | /* TLB invalidate instruction support. */ |
285 | | #define TLBINV ASE_EVA |
286 | | |
287 | | /* MIPS Virtualization ASE. */ |
288 | | #define IVIRT ASE_VIRT |
289 | | #define IVIRT64 ASE_VIRT64 |
290 | | |
291 | | /* MSA support. */ |
292 | | #define MSA ASE_MSA |
293 | | #define MSA64 ASE_MSA64 |
294 | | |
295 | | /* eXtended Physical Address (XPA) support. */ |
296 | | #define XPA ASE_XPA |
297 | | #define XPAVZ ASE_XPA_VIRT |
298 | | |
299 | | const struct mips_opcode micromips_opcodes[] = |
300 | | { |
301 | | /* These instructions appear first so that the disassembler will find |
302 | | them first. The assemblers uses a hash table based on the |
303 | | instruction name anyhow. */ |
304 | | /* name, args, match, mask, pinfo, pinfo2, membership, ase, exclusions */ |
305 | | {"pref", "k,~(b)", 0x60002000, 0xfc00f000, RD_3|LM, 0, I1, 0, 0 }, |
306 | | {"pref", "k,A(b)", 0, (int) M_PREF_AB, INSN_MACRO, 0, I1, 0, 0 }, |
307 | | {"prefx", "h,t(b)", 0x540001a0, 0xfc0007ff, RD_2|RD_3|FP_S|LM, 0, I1, 0, 0 }, |
308 | | {"nop", "", 0x0c00, 0xffff, 0, AL, I1, 0, 0 }, |
309 | | {"nop", "", 0x00000000, 0xffffffff, 0, AL, I1, 0, 0 }, /* sll */ |
310 | | {"ssnop", "", 0x00000800, 0xffffffff, 0, AL, I1, 0, 0 }, /* sll */ |
311 | | {"ehb", "", 0x00001800, 0xffffffff, 0, AL, I1, 0, 0 }, /* sll */ |
312 | | {"pause", "", 0x00002800, 0xffffffff, 0, AL, I1, 0, 0 }, /* sll */ |
313 | | {"li", "md,mI", 0xec00, 0xfc00, WR_1, 0, I1, 0, 0 }, |
314 | | {"li", "t,j", 0x30000000, 0xfc1f0000, WR_1, AL, I1, 0, 0 }, /* addiu */ |
315 | | {"li", "t,i", 0x50000000, 0xfc1f0000, WR_1, AL, I1, 0, 0 }, /* ori */ |
316 | | {"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1, 0, 0 }, |
317 | | {"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, 0, I1, 0, 0 }, |
318 | | {"move", "mp,mj", 0x0c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 }, |
319 | | {"move", "d,s", 0x00000290, 0xffe007ff, WR_1|RD_2, AL, I1, 0, 0 }, /* or */ |
320 | | {"move", "d,s", 0x58000150, 0xffe007ff, WR_1|RD_2, AL, I3, 0, 0 }, /* daddu */ |
321 | | {"move", "d,s", 0x00000150, 0xffe007ff, WR_1|RD_2, AL, I1, 0, 0 }, /* addu */ |
322 | | {"b", "mD", 0xcc00, 0xfc00, UBD, 0, I1, 0, 0 }, |
323 | | {"b", "p", 0x94000000, 0xffff0000, UBD, AL, I1, 0, 0 }, /* beq 0, 0 */ |
324 | | {"b", "p", 0x40400000, 0xffff0000, UBD, AL, I1, 0, 0 }, /* bgez 0 */ |
325 | | /* BC is next to B so that we easily find it when converting a normal |
326 | | branch to a compact one. */ |
327 | | {"bc", "p", 0x40e00000, 0xffff0000, NODS, UBR|AL, I1, 0, 0 }, /* beqzc 0 */ |
328 | | {"bal", "p", 0x40600000, 0xffff0000, WR_31|UBD, BD32|AL, I1, 0, 0 }, /* bgezal 0 */ |
329 | | {"bals", "p", 0x42600000, 0xffff0000, WR_31|UBD, BD16|AL, I1, 0, 0 }, /* bgezals 0 */ |
330 | | {"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, 0, I1, 0, 0 }, |
331 | | {"abs.d", "T,V", 0x5400237b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
332 | | {"abs.s", "T,V", 0x5400037b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
333 | | {"abs.ps", "T,V", 0x5400437b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
334 | | {"aclr", "\\,~(b)", 0x2000b000, 0xff00f000, RD_3|LM|SM|NODS, 0, 0, MC, 0 }, |
335 | | {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB, INSN_MACRO, 0, 0, MC, 0 }, |
336 | | {"add", "d,v,t", 0x00000110, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
337 | | {"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1, 0, 0 }, |
338 | | {"add.d", "D,V,T", 0x54000130, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
339 | | {"add.s", "D,V,T", 0x54000030, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 }, |
340 | | {"add.ps", "D,V,T", 0x54000230, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
341 | | {"addi", "t,r,j", 0x10000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 }, |
342 | | {"addiu", "mp,mj,mZ", 0x0c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 }, /* move */ |
343 | | {"addiu", "md,ms,mW", 0x6c01, 0xfc01, WR_1|RD_2, 0, I1, 0, 0 }, /* addiur1sp */ |
344 | | {"addiu", "md,mc,mB", 0x6c00, 0xfc01, WR_1|RD_2, 0, I1, 0, 0 }, /* addiur2 */ |
345 | | {"addiu", "ms,mt,mY", 0x4c01, 0xfc01, MOD_1, 0, I1, 0, 0 }, /* addiusp */ |
346 | | {"addiu", "mp,mt,mX", 0x4c00, 0xfc01, MOD_1, 0, I1, 0, 0 }, /* addius5 */ |
347 | | {"addiu", "mb,mr,mQ", 0x78000000, 0xfc000000, WR_1, RD_pc, I1, 0, 0 }, /* addiupc */ |
348 | | {"addiu", "t,r,j", 0x30000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 }, |
349 | | {"addiupc", "mb,mQ", 0x78000000, 0xfc000000, WR_1, RD_pc, I1, 0, 0 }, |
350 | | {"addiur1sp", "md,mW", 0x6c01, 0xfc01, WR_1, RD_sp, I1, 0, 0 }, |
351 | | {"addiur2", "md,mc,mB", 0x6c00, 0xfc01, WR_1|RD_2, 0, I1, 0, 0 }, |
352 | | {"addiusp", "mY", 0x4c01, 0xfc01, 0, WR_sp|RD_sp, I1, 0, 0 }, |
353 | | {"addius5", "mp,mX", 0x4c00, 0xfc01, MOD_1, 0, I1, 0, 0 }, |
354 | | {"addu", "mp,mj,mz", 0x0c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 }, /* move */ |
355 | | {"addu", "mp,mz,mj", 0x0c00, 0xfc00, WR_1|RD_3, 0, I1, 0, 0 }, /* move */ |
356 | | {"addu", "md,me,ml", 0x0400, 0xfc01, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
357 | | {"addu", "d,v,t", 0x00000150, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
358 | | {"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, 0, I1, 0, 0 }, |
359 | | {"alnv.ps", "D,V,T,x", 0x54000019, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
360 | | {"and", "mf,mt,mg", 0x4480, 0xffc0, MOD_1|RD_3, 0, I1, 0, 0 }, |
361 | | {"and", "mf,mg,mx", 0x4480, 0xffc0, MOD_1|RD_2, 0, I1, 0, 0 }, |
362 | | {"and", "d,v,t", 0x00000250, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
363 | | {"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, 0, I1, 0, 0 }, |
364 | | {"andi", "md,mc,mC", 0x2c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 }, |
365 | | {"andi", "t,r,i", 0xd0000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 }, |
366 | | {"aset", "\\,~(b)", 0x20003000, 0xff00f000, RD_3|LM|SM|NODS, 0, 0, MC, 0 }, |
367 | | {"aset", "\\,A(b)", 0, (int) M_ASET_AB, INSN_MACRO, 0, 0, MC, 0 }, |
368 | | /* b is at the top of the table. */ |
369 | | /* bal is at the top of the table. */ |
370 | | {"bc1f", "p", 0x43800000, 0xffff0000, RD_CC|CBD|FP_S, 0, I1, 0, 0 }, |
371 | | {"bc1f", "N,p", 0x43800000, 0xffe30000, RD_CC|CBD|FP_S, 0, I1, 0, 0 }, |
372 | | {"bc1fl", "p", 0, (int) M_BC1FL, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
373 | | {"bc1fl", "N,p", 0, (int) M_BC1FL, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
374 | | {"bc2f", "p", 0x42800000, 0xffff0000, RD_CC|CBD, 0, I1, 0, 0 }, |
375 | | {"bc2f", "N,p", 0x42800000, 0xffe30000, RD_CC|CBD, 0, I1, 0, 0 }, |
376 | | {"bc2fl", "p", 0, (int) M_BC2FL, INSN_MACRO, 0, I1, 0, 0 }, |
377 | | {"bc2fl", "N,p", 0, (int) M_BC2FL, INSN_MACRO, 0, I1, 0, 0 }, |
378 | | {"bc1t", "p", 0x43a00000, 0xffff0000, RD_CC|CBD|FP_S, 0, I1, 0, 0 }, |
379 | | {"bc1t", "N,p", 0x43a00000, 0xffe30000, RD_CC|CBD|FP_S, 0, I1, 0, 0 }, |
380 | | {"bc1tl", "p", 0, (int) M_BC1TL, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
381 | | {"bc1tl", "N,p", 0, (int) M_BC1TL, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
382 | | {"bc2t", "p", 0x42a00000, 0xffff0000, RD_CC|CBD, 0, I1, 0, 0 }, |
383 | | {"bc2t", "N,p", 0x42a00000, 0xffe30000, RD_CC|CBD, 0, I1, 0, 0 }, |
384 | | {"bc2tl", "p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1, 0, 0 }, |
385 | | {"bc2tl", "N,p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1, 0, 0 }, |
386 | | {"beqz", "md,mE", 0x8c00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, |
387 | | {"beqz", "s,p", 0x94000000, 0xffe00000, RD_1|CBD, AL, I1, 0, 0 }, |
388 | | {"beqzl", "s,p", 0, (int) M_BEQL, INSN_MACRO, 0, I1, 0, 0 }, |
389 | | {"beq", "md,mz,mE", 0x8c00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, /* beqz */ |
390 | | {"beq", "mz,md,mE", 0x8c00, 0xfc00, RD_2|CBD, 0, I1, 0, 0 }, /* beqz */ |
391 | | {"beq", "s,t,p", 0x94000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 }, |
392 | | {"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, I1, 0, 0 }, |
393 | | /* BEQZC is next to BEQ so that we easily find it when converting a normal |
394 | | branch to a compact one. */ |
395 | | {"beqzc", "s,p", 0x40e00000, 0xffe00000, RD_1|NODS, CBR, I1, 0, 0 }, |
396 | | {"beql", "s,t,p", 0, (int) M_BEQL, INSN_MACRO, 0, I1, 0, 0 }, |
397 | | {"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, 0, I1, 0, 0 }, |
398 | | {"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, 0, I1, 0, 0 }, |
399 | | {"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, 0, I1, 0, 0 }, |
400 | | {"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, 0, I1, 0, 0 }, |
401 | | {"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, 0, I1, 0, 0 }, |
402 | | {"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, 0, I1, 0, 0 }, |
403 | | {"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, 0, I1, 0, 0 }, |
404 | | {"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, 0, I1, 0, 0 }, |
405 | | {"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, 0, I1, 0, 0 }, |
406 | | {"bgez", "s,p", 0x40400000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 }, |
407 | | {"bgezl", "s,p", 0, (int) M_BGEZL, INSN_MACRO, 0, I1, 0, 0 }, |
408 | | {"bgezal", "s,p", 0x40600000, 0xffe00000, RD_1|WR_31|CBD, BD32, I1, 0, 0 }, |
409 | | {"bgezals", "s,p", 0x42600000, 0xffe00000, RD_1|WR_31|CBD, BD16, I1, 0, 0 }, |
410 | | {"bgezall", "s,p", 0, (int) M_BGEZALL, INSN_MACRO, 0, I1, 0, 0 }, |
411 | | {"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, 0, I1, 0, 0 }, |
412 | | {"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, 0, I1, 0, 0 }, |
413 | | {"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, 0, I1, 0, 0 }, |
414 | | {"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, 0, I1, 0, 0 }, |
415 | | {"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, 0, I1, 0, 0 }, |
416 | | {"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, 0, I1, 0, 0 }, |
417 | | {"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, 0, I1, 0, 0 }, |
418 | | {"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, 0, I1, 0, 0 }, |
419 | | {"bgtz", "s,p", 0x40c00000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 }, |
420 | | {"bgtzl", "s,p", 0, (int) M_BGTZL, INSN_MACRO, 0, I1, 0, 0 }, |
421 | | {"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, 0, I1, 0, 0 }, |
422 | | {"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, 0, I1, 0, 0 }, |
423 | | {"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, 0, I1, 0, 0 }, |
424 | | {"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, 0, I1, 0, 0 }, |
425 | | {"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, 0, I1, 0, 0 }, |
426 | | {"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, 0, I1, 0, 0 }, |
427 | | {"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, 0, I1, 0, 0 }, |
428 | | {"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, 0, I1, 0, 0 }, |
429 | | {"blez", "s,p", 0x40800000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 }, |
430 | | {"blezl", "s,p", 0, (int) M_BLEZL, INSN_MACRO, 0, I1, 0, 0 }, |
431 | | {"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, 0, I1, 0, 0 }, |
432 | | {"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, 0, I1, 0, 0 }, |
433 | | {"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, 0, I1, 0, 0 }, |
434 | | {"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, 0, I1, 0, 0 }, |
435 | | {"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, 0, I1, 0, 0 }, |
436 | | {"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, 0, I1, 0, 0 }, |
437 | | {"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, 0, I1, 0, 0 }, |
438 | | {"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, 0, I1, 0, 0 }, |
439 | | {"bltz", "s,p", 0x40000000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 }, |
440 | | {"bltzl", "s,p", 0, (int) M_BLTZL, INSN_MACRO, 0, I1, 0, 0 }, |
441 | | {"bltzal", "s,p", 0x40200000, 0xffe00000, RD_1|WR_31|CBD, BD32, I1, 0, 0 }, |
442 | | {"bltzals", "s,p", 0x42200000, 0xffe00000, RD_1|WR_31|CBD, BD16, I1, 0, 0 }, |
443 | | {"bltzall", "s,p", 0, (int) M_BLTZALL, INSN_MACRO, 0, I1, 0, 0 }, |
444 | | {"bnez", "md,mE", 0xac00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, |
445 | | {"bnez", "s,p", 0xb4000000, 0xffe00000, RD_1|CBD, AL, I1, 0, 0 }, |
446 | | {"bnezl", "s,p", 0, (int) M_BNEL, INSN_MACRO, 0, I1, 0, 0 }, |
447 | | {"bne", "md,mz,mE", 0xac00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, /* bnez */ |
448 | | {"bne", "mz,md,mE", 0xac00, 0xfc00, RD_2|CBD, 0, I1, 0, 0 }, /* bnez */ |
449 | | {"bne", "s,t,p", 0xb4000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 }, |
450 | | {"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, 0, I1, 0, 0 }, |
451 | | /* BNEZC is next to BNE so that we easily find it when converting a normal |
452 | | branch to a compact one. */ |
453 | | {"bnezc", "s,p", 0x40a00000, 0xffe00000, RD_1|NODS, CBR, I1, 0, 0 }, |
454 | | {"bnel", "s,t,p", 0, (int) M_BNEL, INSN_MACRO, 0, I1, 0, 0 }, |
455 | | {"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, 0, I1, 0, 0 }, |
456 | | {"break", "", 0x4680, 0xffff, TRAP, 0, I1, 0, 0 }, |
457 | | {"break", "", 0x00000007, 0xffffffff, TRAP, 0, I1, 0, 0 }, |
458 | | {"break", "mF", 0x4680, 0xfff0, TRAP, 0, I1, 0, 0 }, |
459 | | {"break", "c", 0x00000007, 0xfc00ffff, TRAP, 0, I1, 0, 0 }, |
460 | | {"break", "c,q", 0x00000007, 0xfc00003f, TRAP, 0, I1, 0, 0 }, |
461 | | {"c.f.d", "S,T", 0x5400043c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
462 | | {"c.f.d", "M,S,T", 0x5400043c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
463 | | {"c.f.s", "S,T", 0x5400003c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
464 | | {"c.f.s", "M,S,T", 0x5400003c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
465 | | {"c.f.ps", "S,T", 0x5400083c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
466 | | {"c.f.ps", "M,S,T", 0x5400083c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
467 | | {"c.un.d", "S,T", 0x5400047c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
468 | | {"c.un.d", "M,S,T", 0x5400047c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
469 | | {"c.un.s", "S,T", 0x5400007c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
470 | | {"c.un.s", "M,S,T", 0x5400007c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
471 | | {"c.un.ps", "S,T", 0x5400087c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
472 | | {"c.un.ps", "M,S,T", 0x5400087c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
473 | | {"c.eq.d", "S,T", 0x540004bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
474 | | {"c.eq.d", "M,S,T", 0x540004bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
475 | | {"c.eq.s", "S,T", 0x540000bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
476 | | {"c.eq.s", "M,S,T", 0x540000bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
477 | | {"c.eq.ps", "S,T", 0x540008bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
478 | | {"c.eq.ps", "M,S,T", 0x540008bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
479 | | {"c.ueq.d", "S,T", 0x540004fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
480 | | {"c.ueq.d", "M,S,T", 0x540004fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
481 | | {"c.ueq.s", "S,T", 0x540000fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
482 | | {"c.ueq.s", "M,S,T", 0x540000fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
483 | | {"c.ueq.ps", "S,T", 0x540008fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
484 | | {"c.ueq.ps", "M,S,T", 0x540008fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
485 | | {"c.olt.d", "S,T", 0x5400053c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
486 | | {"c.olt.d", "M,S,T", 0x5400053c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
487 | | {"c.olt.s", "S,T", 0x5400013c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
488 | | {"c.olt.s", "M,S,T", 0x5400013c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
489 | | {"c.olt.ps", "S,T", 0x5400093c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
490 | | {"c.olt.ps", "M,S,T", 0x5400093c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
491 | | {"c.ult.d", "S,T", 0x5400057c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
492 | | {"c.ult.d", "M,S,T", 0x5400057c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
493 | | {"c.ult.s", "S,T", 0x5400017c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
494 | | {"c.ult.s", "M,S,T", 0x5400017c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
495 | | {"c.ult.ps", "S,T", 0x5400097c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
496 | | {"c.ult.ps", "M,S,T", 0x5400097c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
497 | | {"c.ole.d", "S,T", 0x540005bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
498 | | {"c.ole.d", "M,S,T", 0x540005bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
499 | | {"c.ole.s", "S,T", 0x540001bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
500 | | {"c.ole.s", "M,S,T", 0x540001bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
501 | | {"c.ole.ps", "S,T", 0x540009bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
502 | | {"c.ole.ps", "M,S,T", 0x540009bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
503 | | {"c.ule.d", "S,T", 0x540005fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
504 | | {"c.ule.d", "M,S,T", 0x540005fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
505 | | {"c.ule.s", "S,T", 0x540001fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
506 | | {"c.ule.s", "M,S,T", 0x540001fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
507 | | {"c.ule.ps", "S,T", 0x540009fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
508 | | {"c.ule.ps", "M,S,T", 0x540009fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
509 | | {"c.sf.d", "S,T", 0x5400063c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
510 | | {"c.sf.d", "M,S,T", 0x5400063c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
511 | | {"c.sf.s", "S,T", 0x5400023c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
512 | | {"c.sf.s", "M,S,T", 0x5400023c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
513 | | {"c.sf.ps", "S,T", 0x54000a3c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
514 | | {"c.sf.ps", "M,S,T", 0x54000a3c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
515 | | {"c.ngle.d", "S,T", 0x5400067c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
516 | | {"c.ngle.d", "M,S,T", 0x5400067c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
517 | | {"c.ngle.s", "S,T", 0x5400027c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
518 | | {"c.ngle.s", "M,S,T", 0x5400027c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
519 | | {"c.ngle.ps", "S,T", 0x54000a7c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
520 | | {"c.ngle.ps", "M,S,T", 0x54000a7c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
521 | | {"c.seq.d", "S,T", 0x540006bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
522 | | {"c.seq.d", "M,S,T", 0x540006bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
523 | | {"c.seq.s", "S,T", 0x540002bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
524 | | {"c.seq.s", "M,S,T", 0x540002bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
525 | | {"c.seq.ps", "S,T", 0x54000abc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
526 | | {"c.seq.ps", "M,S,T", 0x54000abc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
527 | | {"c.ngl.d", "S,T", 0x540006fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
528 | | {"c.ngl.d", "M,S,T", 0x540006fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
529 | | {"c.ngl.s", "S,T", 0x540002fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
530 | | {"c.ngl.s", "M,S,T", 0x540002fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
531 | | {"c.ngl.ps", "S,T", 0x54000afc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
532 | | {"c.ngl.ps", "M,S,T", 0x54000afc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
533 | | {"c.lt.d", "S,T", 0x5400073c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
534 | | {"c.lt.d", "M,S,T", 0x5400073c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
535 | | {"c.lt.s", "S,T", 0x5400033c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
536 | | {"c.lt.s", "M,S,T", 0x5400033c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
537 | | {"c.lt.ps", "S,T", 0x54000b3c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
538 | | {"c.lt.ps", "M,S,T", 0x54000b3c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
539 | | {"c.nge.d", "S,T", 0x5400077c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
540 | | {"c.nge.d", "M,S,T", 0x5400077c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
541 | | {"c.nge.s", "S,T", 0x5400037c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
542 | | {"c.nge.s", "M,S,T", 0x5400037c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
543 | | {"c.nge.ps", "S,T", 0x54000b7c, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
544 | | {"c.nge.ps", "M,S,T", 0x54000b7c, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
545 | | {"c.le.d", "S,T", 0x540007bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
546 | | {"c.le.d", "M,S,T", 0x540007bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
547 | | {"c.le.s", "S,T", 0x540003bc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
548 | | {"c.le.s", "M,S,T", 0x540003bc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
549 | | {"c.le.ps", "S,T", 0x54000bbc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
550 | | {"c.le.ps", "M,S,T", 0x54000bbc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
551 | | {"c.ngt.d", "S,T", 0x540007fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
552 | | {"c.ngt.d", "M,S,T", 0x540007fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
553 | | {"c.ngt.s", "S,T", 0x540003fc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 }, |
554 | | {"c.ngt.s", "M,S,T", 0x540003fc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_S, 0, I1, 0, 0 }, |
555 | | {"c.ngt.ps", "S,T", 0x54000bfc, 0xfc00ffff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, 0 }, |
556 | | {"c.ngt.ps", "M,S,T", 0x54000bfc, 0xfc001fff, RD_2|RD_3|WR_CC|FP_D, 0, I1, 0, 0 }, |
557 | | {"cache", "k,~(b)", 0x20006000, 0xfc00f000, RD_3, 0, I1, 0, 0 }, |
558 | | {"cache", "k,A(b)", 0, (int) M_CACHE_AB, INSN_MACRO, 0, I1, 0, 0 }, |
559 | | {"ceil.l.d", "T,S", 0x5400533b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
560 | | {"ceil.l.s", "T,S", 0x5400133b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
561 | | {"ceil.w.d", "T,S", 0x54005b3b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
562 | | {"ceil.w.s", "T,S", 0x54001b3b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
563 | | {"cfc1", "t,g", 0x5400103b, 0xfc00ffff, WR_1|RD_C1, 0, I1, 0, 0 }, |
564 | | {"cfc1", "t,S", 0x5400103b, 0xfc00ffff, WR_1|RD_C1, 0, I1, 0, 0 }, |
565 | | {"cfc2", "t,g", 0x0000cd3c, 0xfc00ffff, WR_1|RD_C2, 0, I1, 0, 0 }, |
566 | | {"cftc1", "s,y", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 }, |
567 | | {"cftc1", "s,T", 0x0000043e, 0xfc00ffff, WR_1|RD_C1|TRAP|LC, AL, 0, MT32, 0 }, |
568 | | {"cftc2", "s,y", 0x0000045e, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 }, |
569 | | {"clo", "t,s", 0x00004b3c, 0xfc00ffff, WR_1|RD_2, 0, I1, 0, 0 }, |
570 | | {"clz", "t,s", 0x00005b3c, 0xfc00ffff, WR_1|RD_2, 0, I1, 0, 0 }, |
571 | | {"cop2", "C", 0x00000002, 0xfc000007, CP, 0, I1, 0, 0 }, |
572 | | {"ctc1", "t,g", 0x5400183b, 0xfc00ffff, RD_1|WR_CC, 0, I1, 0, 0 }, |
573 | | {"ctc1", "t,S", 0x5400183b, 0xfc00ffff, RD_1|WR_CC, 0, I1, 0, 0 }, |
574 | | {"ctc2", "t,g", 0x0000dd3c, 0xfc00ffff, RD_1|WR_C2|WR_CC, 0, I1, 0, 0 }, |
575 | | {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 }, |
576 | | {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 }, |
577 | | {"cttc2", "t,G", 0x00000456, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 }, |
578 | | {"cvt.d.l", "T,S", 0x5400537b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
579 | | {"cvt.d.s", "T,S", 0x5400137b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
580 | | {"cvt.d.w", "T,S", 0x5400337b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
581 | | {"cvt.l.d", "T,S", 0x5400413b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
582 | | {"cvt.l.s", "T,S", 0x5400013b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
583 | | {"cvt.s.l", "T,S", 0x54005b7b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
584 | | {"cvt.s.d", "T,S", 0x54001b7b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
585 | | {"cvt.s.w", "T,S", 0x54003b7b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
586 | | {"cvt.s.pl", "T,S", 0x5400213b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
587 | | {"cvt.s.pu", "T,S", 0x5400293b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
588 | | {"cvt.w.d", "T,S", 0x5400493b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
589 | | {"cvt.w.s", "T,S", 0x5400093b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
590 | | {"cvt.ps.s", "D,V,T", 0x54000180, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S|FP_D, 0, I1, 0, 0 }, |
591 | | {"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, 0, I3, 0, 0 }, |
592 | | {"dadd", "d,v,t", 0x58000110, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
593 | | {"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3, 0, 0 }, |
594 | | {"daddi", "t,r,.", 0x5800001c, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, |
595 | | {"daddi", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3, 0, 0 }, |
596 | | {"daddiu", "t,r,j", 0x5c000000, 0xfc000000, WR_1|RD_2, 0, I3, 0, 0 }, |
597 | | {"daddu", "d,v,t", 0x58000150, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
598 | | {"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, 0, I3, 0, 0 }, |
599 | | {"dclo", "t,s", 0x58004b3c, 0xfc00ffff, WR_1|RD_2, 0, I3, 0, 0 }, |
600 | | {"dclz", "t,s", 0x58005b3c, 0xfc00ffff, WR_1|RD_2, 0, I3, 0, 0 }, |
601 | | {"deret", "", 0x0000e37c, 0xffffffff, NODS, 0, I1, 0, 0 }, |
602 | | {"dext", "t,r,+A,+H", 0x5800002c, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, |
603 | | {"dext", "t,r,+A,+G", 0x58000024, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, /* dextm */ |
604 | | {"dext", "t,r,+E,+H", 0x58000014, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, /* dextu */ |
605 | | {"dextm", "t,r,+A,+G", 0x58000024, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, |
606 | | {"dextu", "t,r,+E,+H", 0x58000014, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, |
607 | | /* For ddiv, see the comments about div. */ |
608 | | {"ddiv", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, 0 }, |
609 | | {"ddiv", "z,t", 0x5800ab3c, 0xfc1fffff, RD_2|WR_HILO, 0, I3, 0, 0 }, |
610 | | {"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, 0, I3, 0, 0 }, |
611 | | {"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, 0, I3, 0, 0 }, |
612 | | /* For ddivu, see the comments about div. */ |
613 | | {"ddivu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, 0 }, |
614 | | {"ddivu", "z,t", 0x5800bb3c, 0xfc1fffff, RD_2|WR_HILO, 0, I3, 0, 0 }, |
615 | | {"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, 0, I3, 0, 0 }, |
616 | | {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, 0, I3, 0, 0 }, |
617 | | {"di", "", 0x0000477c, 0xffffffff, RD_C0, 0, I1, 0, 0 }, |
618 | | {"di", "s", 0x0000477c, 0xffe0ffff, WR_1|RD_C0, 0, I1, 0, 0 }, |
619 | | {"dins", "t,r,+A,+B", 0x5800000c, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, |
620 | | {"dins", "t,r,+A,+F", 0x58000004, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, /* dinsm */ |
621 | | {"dins", "t,r,+E,+F", 0x58000034, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, /* dinsu */ |
622 | | {"dinsm", "t,r,+A,+F", 0x58000004, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, |
623 | | {"dinsu", "t,r,+E,+F", 0x58000034, 0xfc00003f, WR_1|RD_2, 0, I3, 0, 0 }, |
624 | | /* The MIPS assembler treats the div opcode with two operands as |
625 | | though the first operand appeared twice (the first operand is both |
626 | | a source and a destination). To get the div machine instruction, |
627 | | you must use an explicit destination of $0. */ |
628 | | {"div", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 }, |
629 | | {"div", "z,t", 0x0000ab3c, 0xfc1fffff, RD_2|WR_HILO, 0, I1, 0, 0 }, |
630 | | {"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, 0, I1, 0, 0 }, |
631 | | {"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, 0, I1, 0, 0 }, |
632 | | {"div.d", "D,V,T", 0x540001f0, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
633 | | {"div.s", "D,V,T", 0x540000f0, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 }, |
634 | | /* For divu, see the comments about div. */ |
635 | | {"divu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 }, |
636 | | {"divu", "z,t", 0x0000bb3c, 0xfc1fffff, RD_2|WR_HILO, 0, I1, 0, 0 }, |
637 | | {"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, 0, I1, 0, 0 }, |
638 | | {"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, 0, I1, 0, 0 }, |
639 | | {"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, 0, I3, 0, 0 }, |
640 | | {"dlca", "t,A(b)", 0, (int) M_DLCA_AB, INSN_MACRO, 0, I3, 0, 0 }, |
641 | | {"dli", "t,j", 0x30000000, 0xfc1f0000, WR_1, 0, I3, 0, 0 }, /* addiu */ |
642 | | {"dli", "t,i", 0x50000000, 0xfc1f0000, WR_1, 0, I3, 0, 0 }, /* ori */ |
643 | | {"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, 0, I3, 0, 0 }, |
644 | | {"dmfc0", "t,G", 0x580000fc, 0xfc00ffff, WR_1|RD_C0, 0, I3, 0, 0 }, |
645 | | {"dmfc0", "t,G,H", 0x580000fc, 0xfc00c7ff, WR_1|RD_C0, 0, I3, 0, 0 }, |
646 | | {"dmfc1", "t,S", 0x5400243b, 0xfc00ffff, WR_1|RD_2|FP_S|LC, 0, I3, 0, 0 }, |
647 | | {"dmfc1", "t,G", 0x5400243b, 0xfc00ffff, WR_1|RD_2|FP_S|LC, 0, I3, 0, 0 }, |
648 | | {"dmfc2", "t,G", 0x00006d3c, 0xfc00ffff, WR_1|RD_C2, 0, I3, 0, 0 }, |
649 | | /*{"dmfc2", "t,G,H", 0x58000283, 0xfc001fff, WR_1|RD_C2, 0, I3, 0, 0 },*/ |
650 | | {"dmfgc0", "t,G", 0x580004fc, 0xfc00ffff, WR_1|RD_C0, 0, 0, IVIRT64, 0 }, |
651 | | {"dmfgc0", "t,G,H", 0x580004fc, 0xfc00c7ff, WR_1|RD_C0, 0, 0, IVIRT64, 0 }, |
652 | | {"dmt", "", 0x0000057c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, |
653 | | {"dmt", "t", 0x0000057c, 0xfc1fffff, WR_1|TRAP, 0, 0, MT32, 0 }, |
654 | | {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 }, |
655 | | {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 }, |
656 | | {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 }, |
657 | | {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 }, |
658 | | {"dmtc2", "t,G", 0x00007d3c, 0xfc00ffff, RD_1|WR_C2|WR_CC, 0, I3, 0, 0 }, |
659 | | /*{"dmtc2", "t,G,H", 0x58000683, 0xfc001fff, RD_1|WR_C2|WR_CC, 0, I3, 0, 0 },*/ |
660 | | {"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 }, |
661 | | {"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 }, |
662 | | {"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, 0, I3, 0, 0 }, |
663 | | {"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, 0, I3, 0, 0 }, |
664 | | {"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, 0, I3, 0, 0 }, |
665 | | {"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, 0, I3, 0, 0 }, |
666 | | {"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, 0, I3, 0, 0 }, |
667 | | {"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, 0, I3, 0, 0 }, |
668 | | {"dmult", "s,t", 0x58008b3c, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, I3, 0, 0 }, |
669 | | {"dmultu", "s,t", 0x58009b3c, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, I3, 0, 0 }, |
670 | | {"dneg", "d,w", 0x58000190, 0xfc1f07ff, WR_1|RD_2, 0, I3, 0, 0 }, /* dsub 0 */ |
671 | | {"dnegu", "d,w", 0x580001d0, 0xfc1f07ff, WR_1|RD_2, 0, I3, 0, 0 }, /* dsubu 0 */ |
672 | | {"drem", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, 0 }, |
673 | | {"drem", "d,v,t", 0, (int) M_DREM_3, INSN_MACRO, 0, I3, 0, 0 }, |
674 | | {"drem", "d,v,I", 0, (int) M_DREM_3I, INSN_MACRO, 0, I3, 0, 0 }, |
675 | | {"dremu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, 0 }, |
676 | | {"dremu", "d,v,t", 0, (int) M_DREMU_3, INSN_MACRO, 0, I3, 0, 0 }, |
677 | | {"dremu", "d,v,I", 0, (int) M_DREMU_3I, INSN_MACRO, 0, I3, 0, 0 }, |
678 | | {"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I3, 0, 0 }, |
679 | | {"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I3, 0, 0 }, |
680 | | {"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, 0, I3, 0, 0 }, |
681 | | {"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, 0, I3, 0, 0 }, |
682 | | {"dror", "t,r,<", 0x580000c0, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
683 | | {"drorv", "d,t,s", 0x580000d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
684 | | {"dror32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
685 | | {"drotl", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I3, 0, 0 }, |
686 | | {"drotl", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I3, 0, 0 }, |
687 | | {"drotr", "d,v,t", 0, (int) M_DROR, INSN_MACRO, 0, I3, 0, 0 }, |
688 | | {"drotr", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, 0, I3, 0, 0 }, |
689 | | {"drotrv", "d,t,s", 0x580000d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
690 | | {"drotr32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
691 | | {"dsbh", "t,r", 0x58007b3c, 0xfc00ffff, WR_1|RD_2, 0, I3, 0, 0 }, |
692 | | {"dshd", "t,r", 0x5800fb3c, 0xfc00ffff, WR_1|RD_2, 0, I3, 0, 0 }, |
693 | | {"dsllv", "d,t,s", 0x58000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
694 | | {"dsll32", "t,r,<", 0x58000008, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
695 | | {"dsll", "d,t,s", 0x58000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, /* dsllv */ |
696 | | {"dsll", "t,r,>", 0x58000008, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, /* dsll32 */ |
697 | | {"dsll", "t,r,<", 0x58000000, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
698 | | {"dsrav", "d,t,s", 0x58000090, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
699 | | {"dsra32", "t,r,<", 0x58000088, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
700 | | {"dsra", "d,t,s", 0x58000090, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, /* dsrav */ |
701 | | {"dsra", "t,r,>", 0x58000088, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, /* dsra32 */ |
702 | | {"dsra", "t,r,<", 0x58000080, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
703 | | {"dsrlv", "d,t,s", 0x58000050, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
704 | | {"dsrl32", "t,r,<", 0x58000048, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
705 | | {"dsrl", "d,t,s", 0x58000050, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, /* dsrlv */ |
706 | | {"dsrl", "t,r,>", 0x58000048, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, /* dsrl32 */ |
707 | | {"dsrl", "t,r,<", 0x58000040, 0xfc0007ff, WR_1|RD_2, 0, I3, 0, 0 }, |
708 | | {"dsub", "d,v,t", 0x58000190, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
709 | | {"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, 0, I3, 0, 0 }, |
710 | | {"dsubu", "d,v,t", 0x580001d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, |
711 | | {"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, 0, I3, 0, 0 }, |
712 | | {"dvpe", "", 0x0000157c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, |
713 | | {"dvpe", "t", 0x0000157c, 0xfc1fffff, WR_1|TRAP, 0, 0, MT32, 0 }, |
714 | | {"ei", "", 0x0000577c, 0xffffffff, WR_C0, 0, I1, 0, 0 }, |
715 | | {"ei", "s", 0x0000577c, 0xffe0ffff, WR_1|WR_C0, 0, I1, 0, 0 }, |
716 | | {"emt", "", 0x0000257c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, |
717 | | {"emt", "t", 0x0000257c, 0xfc1fffff, WR_1|TRAP, 0, 0, MT32, 0 }, |
718 | | {"eret", "", 0x0000f37c, 0xffffffff, NODS, 0, I1, 0, 0 }, |
719 | | {"eretnc", "", 0x0001f37c, 0xffffffff, NODS, 0, I36, 0, 0 }, |
720 | | {"evpe", "", 0x0000357c, 0xffffffff, TRAP, 0, 0, MT32, 0 }, |
721 | | {"evpe", "t", 0x0000357c, 0xfc1fffff, WR_1|TRAP, 0, 0, MT32, 0 }, |
722 | | {"ext", "t,r,+A,+C", 0x0000002c, 0xfc00003f, WR_1|RD_2, 0, I1, 0, 0 }, |
723 | | {"floor.l.d", "T,V", 0x5400433b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
724 | | {"floor.l.s", "T,V", 0x5400033b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
725 | | {"floor.w.d", "T,V", 0x54004b3b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
726 | | {"floor.w.s", "T,V", 0x54000b3b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
727 | | {"fork", "d,s,t", 0x00000027, 0xfc0007ff, WR_1|RD_2|RD_3|TRAP, 0, 0, MT32, 0 }, |
728 | | {"hypcall", "", 0x0000c37c, 0xffffffff, TRAP, 0, 0, IVIRT, 0 }, |
729 | | {"hypcall", "+J", 0x0000c37c, 0xfc00ffff, TRAP, 0, 0, IVIRT, 0 }, |
730 | | {"ins", "t,r,+A,+B", 0x0000000c, 0xfc00003f, WR_1|RD_2, 0, I1, 0, 0 }, |
731 | | {"iret", "", 0x0000d37c, 0xffffffff, NODS, 0, 0, MC, 0 }, |
732 | | {"jr", "mj", 0x4580, 0xffe0, RD_1|UBD, 0, I1, 0, 0 }, |
733 | | {"jr", "s", 0x00000f3c, 0xffe0ffff, RD_1|UBD, BD32, I1, 0, 0 }, /* jalr */ |
734 | | {"jrs", "s", 0x00004f3c, 0xffe0ffff, RD_1|UBD, BD16, I1, 0, 0 }, /* jalrs */ |
735 | | {"jraddiusp", "mP", 0x4700, 0xffe0, NODS, WR_sp|RD_31|RD_sp|UBR, I1, 0, 0 }, |
736 | | /* This macro is after the real instruction so that it only matches with |
737 | | -minsn32. */ |
738 | | {"jraddiusp", "mP", 0, (int) M_JRADDIUSP, INSN_MACRO, 0, I1, 0, 0 }, |
739 | | {"jr.hb", "s", 0x00001f3c, 0xffe0ffff, RD_1|UBD, BD32, I1, 0, 0 }, /* jalr.hb */ |
740 | | {"jrs.hb", "s", 0x00005f3c, 0xffe0ffff, RD_1|UBD, BD16, I1, 0, 0 }, /* jalrs.hb */ |
741 | | {"j", "mj", 0x4580, 0xffe0, RD_1|UBD, 0, I1, 0, 0 }, /* jr */ |
742 | | {"j", "s", 0x00000f3c, 0xffe0ffff, RD_1|UBD, BD32, I1, 0, 0 }, /* jr */ |
743 | | /* SVR4 PIC code requires special handling for j, so it must be a |
744 | | macro. */ |
745 | | {"j", "a", 0, (int) M_J_A, INSN_MACRO, 0, I1, 0, 0 }, |
746 | | /* This form of j is used by the disassembler and internally by the |
747 | | assembler, but will never match user input (because the line above |
748 | | will match first). */ |
749 | | {"j", "a", 0xd4000000, 0xfc000000, UBD, 0, I1, 0, 0 }, |
750 | | /* JRC is close to JR and J so that we easily find it when converting |
751 | | a normal jump to a compact one. */ |
752 | | {"jrc", "mj", 0x45a0, 0xffe0, RD_1|NODS, UBR, I1, 0, 0 }, |
753 | | /* This macro is after the real instruction so that it only matches with |
754 | | -minsn32. */ |
755 | | {"jrc", "s", 0, (int) M_JRC, INSN_MACRO, 0, I1, 0, 0 }, |
756 | | {"jalr", "mj", 0x45c0, 0xffe0, RD_1|WR_31|UBD, BD32, I1, 0, 0 }, |
757 | | {"jalr", "my,mj", 0x45c0, 0xffe0, RD_2|WR_31|UBD, BD32, I1, 0, 0 }, |
758 | | {"jalr", "s", 0x03e00f3c, 0xffe0ffff, RD_1|WR_31|UBD, BD32, I1, 0, 0 }, |
759 | | {"jalr", "t,s", 0x00000f3c, 0xfc00ffff, WR_1|RD_2|UBD, BD32, I1, 0, 0 }, |
760 | | {"jalr.hb", "s", 0x03e01f3c, 0xffe0ffff, RD_1|WR_31|UBD, BD32, I1, 0, 0 }, |
761 | | {"jalr.hb", "t,s", 0x00001f3c, 0xfc00ffff, WR_1|RD_2|UBD, BD32, I1, 0, 0 }, |
762 | | {"jalrs", "mj", 0x45e0, 0xffe0, RD_1|WR_31|UBD, BD16, I1, 0, 0 }, |
763 | | {"jalrs", "my,mj", 0x45e0, 0xffe0, RD_2|WR_31|UBD, BD16, I1, 0, 0 }, |
764 | | {"jalrs", "s", 0x03e04f3c, 0xffe0ffff, RD_1|WR_31|UBD, BD16, I1, 0, 0 }, |
765 | | {"jalrs", "t,s", 0x00004f3c, 0xfc00ffff, WR_1|RD_2|UBD, BD16, I1, 0, 0 }, |
766 | | {"jalrs.hb", "s", 0x03e05f3c, 0xffe0ffff, RD_1|WR_31|UBD, BD16, I1, 0, 0 }, |
767 | | {"jalrs.hb", "t,s", 0x00005f3c, 0xfc00ffff, WR_1|RD_2|UBD, BD16, I1, 0, 0 }, |
768 | | /* SVR4 PIC code requires special handling for jal, so it must be a |
769 | | macro. */ |
770 | | {"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, 0, I1, 0, 0 }, |
771 | | {"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, 0, I1, 0, 0 }, |
772 | | {"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, 0, I1, 0, 0 }, |
773 | | /* This form of jal is used by the disassembler and internally by the |
774 | | assembler, but will never match user input (because the line above |
775 | | will match first). */ |
776 | | {"jal", "a", 0xf4000000, 0xfc000000, WR_31|UBD, BD32, I1, 0, 0 }, |
777 | | {"jals", "d,s", 0, (int) M_JALS_2, INSN_MACRO, 0, I1, 0, 0 }, |
778 | | {"jals", "s", 0, (int) M_JALS_1, INSN_MACRO, 0, I1, 0, 0 }, |
779 | | {"jals", "a", 0, (int) M_JALS_A, INSN_MACRO, 0, I1, 0, 0 }, |
780 | | {"jals", "a", 0x74000000, 0xfc000000, WR_31|UBD, BD16, I1, 0, 0 }, |
781 | | {"jalx", "+i", 0xf0000000, 0xfc000000, WR_31|UBD, BD32, I1, 0, 0 }, |
782 | | {"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, 0, I1, 0, 0 }, |
783 | | {"lb", "t,o(b)", 0x1c000000, 0xfc000000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
784 | | {"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, 0, I1, 0, 0 }, |
785 | | {"lbu", "md,mG(ml)", 0x0800, 0xfc00, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
786 | | {"lbu", "t,o(b)", 0x14000000, 0xfc000000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
787 | | {"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, 0, I1, 0, 0 }, |
788 | | {"lca", "t,A(b)", 0, (int) M_LCA_AB, INSN_MACRO, 0, I1, 0, 0 }, |
789 | | /* The macro has to be first to handle o32 correctly. */ |
790 | | {"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1, 0, 0 }, |
791 | | {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_1|RD_3|LM, 0, I3, 0, 0 }, |
792 | | {"ldc1", "T,o(b)", 0xbc000000, 0xfc000000, WR_1|RD_3|FP_D|LM, 0, I1, 0, 0 }, |
793 | | {"ldc1", "E,o(b)", 0xbc000000, 0xfc000000, WR_1|RD_3|FP_D|LM, 0, I1, 0, 0 }, |
794 | | {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
795 | | {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
796 | | {"ldc2", "E,~(b)", 0x20002000, 0xfc00f000, RD_3|WR_CC|LM, 0, I1, 0, 0 }, |
797 | | {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, 0, I1, 0, 0 }, |
798 | | {"l.d", "T,o(b)", 0xbc000000, 0xfc000000, WR_1|RD_3|FP_D|LM, 0, I1, 0, 0 }, /* ldc1 */ |
799 | | {"l.d", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
800 | | {"ldl", "t,~(b)", 0x60004000, 0xfc00f000, WR_1|RD_3|LM, 0, I3, 0, 0 }, |
801 | | {"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, 0, I3, 0, 0 }, |
802 | | {"ldm", "n,~(b)", 0x20007000, 0xfc00f000, RD_3|LM, 0, I3, 0, 0 }, |
803 | | {"ldm", "n,A(b)", 0, (int) M_LDM_AB, INSN_MACRO, 0, I3, 0, 0 }, |
804 | | {"ldp", "t,~(b)", 0x20004000, 0xfc00f000, WR_1|RD_3|LM, 0, I3, 0, 0 }, |
805 | | {"ldp", "t,A(b)", 0, (int) M_LDP_AB, INSN_MACRO, 0, I3, 0, 0 }, |
806 | | {"ldr", "t,~(b)", 0x60005000, 0xfc00f000, WR_1|RD_3|LM, 0, I3, 0, 0 }, |
807 | | {"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, 0, I3, 0, 0 }, |
808 | | {"ldxc1", "D,t(b)", 0x540000c8, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D|LM, 0, I1, 0, 0 }, |
809 | | {"lh", "t,o(b)", 0x3c000000, 0xfc000000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
810 | | {"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, 0, I1, 0, 0 }, |
811 | | {"lhu", "md,mH(ml)", 0x2800, 0xfc00, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
812 | | {"lhu", "t,o(b)", 0x34000000, 0xfc000000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
813 | | {"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, 0, I1, 0, 0 }, |
814 | | /* li is at the start of the table. */ |
815 | | {"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
816 | | {"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
817 | | {"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
818 | | {"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
819 | | {"ll", "t,~(b)", 0x60003000, 0xfc00f000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
820 | | {"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, 0, I1, 0, 0 }, |
821 | | {"lld", "t,~(b)", 0x60007000, 0xfc00f000, WR_1|RD_3|LM, 0, I3, 0, 0 }, |
822 | | {"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, 0, I3, 0, 0 }, |
823 | | {"lui", "s,u", 0x41a00000, 0xffe00000, WR_1, 0, I1, 0, 0 }, |
824 | | {"luxc1", "D,t(b)", 0x54000148, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D|LM, 0, I1, 0, 0 }, |
825 | | {"lw", "md,mJ(ml)", 0x6800, 0xfc00, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
826 | | {"lw", "mp,mU(ms)", 0x4800, 0xfc00, WR_1|RD_3|LM, 0, I1, 0, 0 }, /* lwsp */ |
827 | | {"lw", "md,mA(ma)", 0x6400, 0xfc00, WR_1|RD_3|LM, 0, I1, 0, 0 }, /* lwgp */ |
828 | | {"lw", "t,o(b)", 0xfc000000, 0xfc000000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
829 | | {"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, 0, I1, 0, 0 }, |
830 | | {"lwc1", "T,o(b)", 0x9c000000, 0xfc000000, WR_1|RD_3|FP_S|LM, 0, I1, 0, 0 }, |
831 | | {"lwc1", "E,o(b)", 0x9c000000, 0xfc000000, WR_1|RD_3|FP_S|LM, 0, I1, 0, 0 }, |
832 | | {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
833 | | {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
834 | | {"lwc2", "E,~(b)", 0x20000000, 0xfc00f000, RD_3|WR_CC|LM, 0, I1, 0, 0 }, |
835 | | {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, 0, I1, 0, 0 }, |
836 | | {"l.s", "T,o(b)", 0x9c000000, 0xfc000000, WR_1|RD_3|FP_S|LM, 0, I1, 0, 0 }, /* lwc1 */ |
837 | | {"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
838 | | {"lwl", "t,~(b)", 0x60000000, 0xfc00f000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
839 | | {"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1, 0, 0 }, |
840 | | {"lcache", "t,~(b)", 0x60000000, 0xfc00f000, WR_1|RD_3|LM, 0, I1, 0, 0 }, /* same */ |
841 | | {"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1, 0, 0 }, |
842 | | {"lwm", "mN,mJ(ms)", 0x4500, 0xffc0, RD_3|NODS|LM, 0, I1, 0, 0 }, |
843 | | {"lwm", "n,~(b)", 0x20005000, 0xfc00f000, RD_3|NODS|LM, 0, I1, 0, 0 }, |
844 | | {"lwm", "n,A(b)", 0, (int) M_LWM_AB, INSN_MACRO, 0, I1, 0, 0 }, |
845 | | {"lwp", "t,~(b)", 0x20001000, 0xfc00f000, WR_1|RD_3|NODS|LM, 0, I1, 0, 0 }, |
846 | | {"lwp", "t,A(b)", 0, (int) M_LWP_AB, INSN_MACRO, 0, I1, 0, 0 }, |
847 | | {"lwr", "t,~(b)", 0x60001000, 0xfc00f000, WR_1|RD_3|LM, 0, I1, 0, 0 }, |
848 | | {"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I1, 0, 0 }, |
849 | | {"lwu", "t,~(b)", 0x6000e000, 0xfc00f000, WR_1|RD_3|LM, 0, I3, 0, 0 }, |
850 | | {"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, 0, I3, 0, 0 }, |
851 | | {"lwxc1", "D,t(b)", 0x54000048, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S|LM, 0, I1, 0, 0 }, |
852 | | {"flush", "t,~(b)", 0x60001000, 0xfc00f000, WR_1|RD_3, 0, I1, 0, 0 }, /* same */ |
853 | | {"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I1, 0, 0 }, |
854 | | {"lwxs", "d,t(b)", 0x00000118, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, I1, 0, 0 }, |
855 | | {"madd", "s,t", 0x0000cb3c, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I1, 0, 0 }, |
856 | | {"madd", "7,s,t", 0x00000abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
857 | | {"madd.d", "D,R,S,T", 0x54000009, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
858 | | {"madd.s", "D,R,S,T", 0x54000001, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I1, 0, 0 }, |
859 | | {"madd.ps", "D,R,S,T", 0x54000011, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
860 | | {"maddu", "s,t", 0x0000db3c, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I1, 0, 0 }, |
861 | | {"maddu", "7,s,t", 0x00001abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
862 | | {"mfc0", "t,G", 0x000000fc, 0xfc00ffff, WR_1|RD_C0, 0, I1, 0, 0 }, |
863 | | {"mfc0", "t,G,H", 0x000000fc, 0xfc00c7ff, WR_1|RD_C0, 0, I1, 0, 0 }, |
864 | | {"mfc1", "t,S", 0x5400203b, 0xfc00ffff, WR_1|RD_2|FP_S|LC, 0, I1, 0, 0 }, |
865 | | {"mfc1", "t,G", 0x5400203b, 0xfc00ffff, WR_1|RD_2|FP_S|LC, 0, I1, 0, 0 }, |
866 | | {"mfc2", "t,G", 0x00004d3c, 0xfc00ffff, WR_1|RD_C2, 0, I1, 0, 0 }, |
867 | | {"mfgc0", "t,G", 0x000004fc, 0xfc00ffff, WR_1|RD_C0, 0, 0, IVIRT, 0 }, |
868 | | {"mfgc0", "t,G,H", 0x000004fc, 0xfc00c7ff, WR_1|RD_C0, 0, 0, IVIRT, 0 }, |
869 | | {"mfhc0", "t,G", 0x000000f4, 0xfc00ffff, WR_1|RD_C0, 0, 0, XPA, 0 }, |
870 | | {"mfhc0", "t,G,H", 0x000000f4, 0xfc00c7ff, WR_1|RD_C0, 0, 0, XPA, 0 }, |
871 | | {"mfhc1", "t,S", 0x5400303b, 0xfc00ffff, WR_1|RD_2|FP_D|LC, 0, I1, 0, 0 }, |
872 | | {"mfhc1", "t,G", 0x5400303b, 0xfc00ffff, WR_1|RD_2|FP_D|LC, 0, I1, 0, 0 }, |
873 | | {"mfhc2", "t,G", 0x00008d3c, 0xfc00ffff, WR_1|RD_C2, 0, I1, 0, 0 }, |
874 | | {"mfhgc0", "t,G", 0x000004f4, 0xfc00ffff, WR_1|RD_C0, 0, 0, XPAVZ, 0 }, |
875 | | {"mfhgc0", "t,G,H", 0x000004f4, 0xfc00c7ff, WR_1|RD_C0, 0, 0, XPAVZ, 0 }, |
876 | | {"mfhi", "mj", 0x4600, 0xffe0, WR_1|RD_HI, 0, I1, 0, 0 }, |
877 | | {"mfhi", "s", 0x00000d7c, 0xffe0ffff, WR_1|RD_HI, 0, I1, 0, 0 }, |
878 | | {"mfhi", "s,7", 0x0000007c, 0xffe03fff, WR_1|RD_HI, 0, 0, D32, 0 }, |
879 | | {"mflo", "mj", 0x4640, 0xffe0, WR_1|RD_LO, 0, I1, 0, 0 }, |
880 | | {"mflo", "s", 0x00001d7c, 0xffe0ffff, WR_1|RD_LO, 0, I1, 0, 0 }, |
881 | | {"mflo", "s,7", 0x0000107c, 0xffe03fff, WR_1|RD_LO, 0, 0, D32, 0 }, |
882 | | {"mftacx", "s", 0x0040041e, 0xffe0ffff, WR_1|RD_a|TRAP, AL, 0, MT32, 0 }, |
883 | | {"mftacx", "s,*", 0x0040041e, 0xfe60ffff, WR_1|RD_a|TRAP, AL, 0, MT32, 0 }, |
884 | | {"mftc0", "s,E", 0x0000000e, 0xfc00ffff, WR_1|RD_C0|TRAP|LC, AL, 0, MT32, 0 }, |
885 | | {"mftc0", "s,E,J", 0x0000000e, 0xfc00ff8f, WR_1|RD_C0|TRAP|LC, AL, 0, MT32, 0 }, |
886 | | {"mftc1", "s,T", 0x0000042e, 0xfc00ffff, WR_1|RD_2|TRAP|LC|FP_S, AL, 0, MT32, 0 }, |
887 | | {"mftc1", "s,E", 0x0000042e, 0xfc00ffff, WR_1|RD_2|TRAP|LC|FP_S, AL, 0, MT32, 0 }, |
888 | | {"mftc2", "s,E", 0x0000044e, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 }, |
889 | | {"mftdsp", "s", 0x0200041e, 0xffe0ffff, WR_1|TRAP, AL, 0, MT32, 0 }, |
890 | | {"mftgpr", "s,t", 0x0000040e, 0xfc00ffff, WR_1|RD_2|TRAP, AL, 0, MT32, 0 }, |
891 | | {"mfthc1", "s,T", 0x0000062e, 0xfc00ffff, WR_1|RD_2|TRAP|LC|FP_D, AL, 0, MT32, 0 }, |
892 | | {"mfthc1", "s,E", 0x0000062e, 0xfc00ffff, WR_1|RD_2|TRAP|LC|FP_D, AL, 0, MT32, 0 }, |
893 | | {"mfthc2", "s,E", 0x0000064e, 0xfc00ffff, WR_1|RD_C2|TRAP|LC, AL, 0, MT32, 0 }, |
894 | | {"mfthi", "s", 0x0020041e, 0xffe0ffff, WR_1|RD_a|TRAP, AL, 0, MT32, 0 }, |
895 | | {"mfthi", "s,*", 0x0020041e, 0xfe60ffff, WR_1|RD_a|TRAP, AL, 0, MT32, 0 }, |
896 | | {"mftlo", "s", 0x0000041e, 0xffe0ffff, WR_1|RD_a|TRAP, AL, 0, MT32, 0 }, |
897 | | {"mftlo", "s,*", 0x0000041e, 0xfe60ffff, WR_1|RD_a|TRAP, AL, 0, MT32, 0 }, |
898 | | {"mftr", "s,E,!,J,$", 0x0000000e, 0xfc00f98f, WR_1|TRAP, 0, 0, MT32, 0 }, |
899 | | {"mov.d", "T,S", 0x5400207b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
900 | | {"mov.s", "T,S", 0x5400007b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
901 | | {"mov.ps", "T,S", 0x5400407b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
902 | | {"movep", "mh,mm,mn", 0x8400, 0xfc01, WR_1|RD_2|RD_3|NODS, 0, I1, 0, 0 }, |
903 | | /* This macro is after the real instruction so that it only matches with |
904 | | -minsn32. */ |
905 | | {"movep", "mh,mm,mn", 0, (int) M_MOVEP, INSN_MACRO, 0, I1, 0, 0 }, |
906 | | {"movf", "t,s,M", 0x5400017b, 0xfc001fff, WR_1|RD_2|RD_CC|FP_S|FP_D, 0, I1, 0, 0 }, |
907 | | {"movf.d", "T,S,M", 0x54000220, 0xfc001fff, WR_1|RD_2|RD_CC|FP_D, 0, I1, 0, 0 }, |
908 | | {"movf.s", "T,S,M", 0x54000020, 0xfc001fff, WR_1|RD_2|RD_CC|FP_S, 0, I1, 0, 0 }, |
909 | | {"movf.ps", "T,S,M", 0x54000420, 0xfc001fff, WR_1|RD_2|RD_CC|FP_D, 0, I1, 0, 0 }, |
910 | | {"movn", "d,v,t", 0x00000018, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
911 | | {"movn.d", "D,S,t", 0x54000138, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
912 | | {"movn.s", "D,S,t", 0x54000038, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 }, |
913 | | {"movn.ps", "D,S,t", 0x54000238, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
914 | | {"movt", "t,s,M", 0x5400097b, 0xfc001fff, WR_1|RD_2|RD_CC|FP_S|FP_D, 0, I1, 0, 0 }, |
915 | | {"movt.d", "T,S,M", 0x54000260, 0xfc001fff, WR_1|RD_2|RD_CC|FP_D, 0, I1, 0, 0 }, |
916 | | {"movt.s", "T,S,M", 0x54000060, 0xfc001fff, WR_1|RD_2|RD_CC|FP_S, 0, I1, 0, 0 }, |
917 | | {"movt.ps", "T,S,M", 0x54000460, 0xfc001fff, WR_1|RD_2|RD_CC|FP_D, 0, I1, 0, 0 }, |
918 | | {"movz", "d,v,t", 0x00000058, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
919 | | {"movz.d", "D,S,t", 0x54000178, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
920 | | {"movz.s", "D,S,t", 0x54000078, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 }, |
921 | | {"movz.ps", "D,S,t", 0x54000278, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
922 | | {"msub", "s,t", 0x0000eb3c, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I1, 0, 0 }, |
923 | | {"msub", "7,s,t", 0x00002abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
924 | | {"msub.d", "D,R,S,T", 0x54000029, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
925 | | {"msub.s", "D,R,S,T", 0x54000021, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I1, 0, 0 }, |
926 | | {"msub.ps", "D,R,S,T", 0x54000031, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
927 | | {"msubu", "s,t", 0x0000fb3c, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I1, 0, 0 }, |
928 | | {"msubu", "7,s,t", 0x00003abc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
929 | | {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 }, |
930 | | {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 }, |
931 | | {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 }, |
932 | | {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 }, |
933 | | {"mtc2", "t,G", 0x00005d3c, 0xfc00ffff, RD_1|WR_C2|WR_CC, 0, I1, 0, 0 }, |
934 | | {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT, 0 }, |
935 | | {"mtgc0", "t,G,H", 0x000006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT, 0 }, |
936 | | {"mthc0", "t,G", 0x000002f4, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, XPA, 0 }, |
937 | | {"mthc0", "t,G,H", 0x000002f4, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, XPA, 0 }, |
938 | | {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 }, |
939 | | {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 }, |
940 | | {"mthc2", "t,G", 0x00009d3c, 0xfc00ffff, RD_1|WR_C2|WR_CC, 0, I1, 0, 0 }, |
941 | | {"mthgc0", "t,G", 0x000006f4, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, XPAVZ, 0 }, |
942 | | {"mthgc0", "t,G,H", 0x000006f4, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, XPAVZ, 0 }, |
943 | | {"mthi", "s", 0x00002d7c, 0xffe0ffff, RD_1|WR_HI, 0, I1, 0, 0 }, |
944 | | {"mthi", "s,7", 0x0000207c, 0xffe03fff, RD_1|WR_HI, 0, 0, D32, 0 }, |
945 | | {"mtlo", "s", 0x00003d7c, 0xffe0ffff, RD_1|WR_LO, 0, I1, 0, 0 }, |
946 | | {"mtlo", "s,7", 0x0000307c, 0xffe03fff, RD_1|WR_LO, 0, 0, D32, 0 }, |
947 | | {"mttacx", "t", 0x00020416, 0xfc1fffff, RD_1|WR_a|TRAP, AL, 0, MT32, 0 }, |
948 | | {"mttacx", "t,&", 0x00020416, 0xfc13ffff, RD_1|WR_a|TRAP, AL, 0, MT32, 0 }, |
949 | | {"mttc0", "t,G", 0x00000006, 0xfc00ffff, RD_1|WR_C0|WR_CC|TRAP|CM, AL, 0, MT32, 0 }, |
950 | | {"mttc0", "t,G,J", 0x00000006, 0xfc00ff8f, RD_1|WR_C0|WR_CC|TRAP|CM, AL, 0, MT32, 0 }, |
951 | | {"mttc1", "t,S", 0x00000426, 0xfc00ffff, RD_1|WR_2|TRAP|CM|FP_S, AL, 0, MT32, 0 }, |
952 | | {"mttc1", "t,G", 0x00000426, 0xfc00ffff, RD_1|WR_2|TRAP|CM|FP_S, AL, 0, MT32, 0 }, |
953 | | {"mttc2", "t,G", 0x00000446, 0xfc00ffff, RD_1|WR_C2|WR_CC|TRAP|CM, AL, 0, MT32, 0 }, |
954 | | {"mttdsp", "t", 0x00100416, 0xfc1fffff, RD_1|TRAP, AL, 0, MT32, 0 }, |
955 | | {"mttgpr", "t,s", 0x00000406, 0xfc00ffff, RD_1|WR_2|TRAP, AL, 0, MT32, 0 }, |
956 | | {"mtthc1", "t,S", 0x00000626, 0xfc00ffff, RD_1|WR_2|TRAP|CM|FP_D, AL, 0, MT32, 0 }, |
957 | | {"mtthc1", "t,G", 0x00000626, 0xfc00ffff, RD_1|WR_2|TRAP|CM|FP_D, AL, 0, MT32, 0 }, |
958 | | {"mtthc2", "t,G", 0x00000646, 0xfc00ffff, RD_1|WR_C2|WR_CC|TRAP|CM, AL, 0, MT32, 0 }, |
959 | | {"mtthi", "t", 0x00010416, 0xfc1fffff, RD_1|WR_a|TRAP, AL, 0, MT32, 0 }, |
960 | | {"mtthi", "t,&", 0x00010416, 0xfc13ffff, RD_1|WR_a|TRAP, AL, 0, MT32, 0 }, |
961 | | {"mttlo", "t", 0x00000416, 0xfc1fffff, RD_1|WR_a|TRAP, AL, 0, MT32, 0 }, |
962 | | {"mttlo", "t,&", 0x00000416, 0xfc13ffff, RD_1|WR_a|TRAP, AL, 0, MT32, 0 }, |
963 | | {"mttr", "t,G,!,J,$", 0x00000006, 0xfc00f98f, RD_1|TRAP, 0, 0, MT32, 0 }, |
964 | | {"mul", "d,v,t", 0x00000210, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, I1, 0, 0 }, |
965 | | {"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, 0, I1, 0, 0 }, |
966 | | {"mul.d", "D,V,T", 0x540001b0, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
967 | | {"mul.s", "D,V,T", 0x540000b0, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 }, |
968 | | {"mul.ps", "D,V,T", 0x540002b0, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
969 | | {"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, 0, I1, 0, 0 }, |
970 | | {"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, 0, I1, 0, 0 }, |
971 | | {"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, 0, I1, 0, 0 }, |
972 | | {"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, 0, I1, 0, 0 }, |
973 | | {"mult", "s,t", 0x00008b3c, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, I1, 0, 0 }, |
974 | | {"mult", "7,s,t", 0x00000cbc, 0xfc003fff, RD_2|RD_3|WR_a, 0, 0, D32, 0 }, |
975 | | {"multu", "s,t", 0x00009b3c, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, I1, 0, 0 }, |
976 | | {"multu", "7,s,t", 0x00001cbc, 0xfc003fff, RD_2|RD_3|WR_a, 0, 0, D32, 0 }, |
977 | | {"neg", "d,w", 0x00000190, 0xfc1f07ff, WR_1|RD_2, 0, I1, 0, 0 }, /* sub 0 */ |
978 | | {"negu", "d,w", 0x000001d0, 0xfc1f07ff, WR_1|RD_2, 0, I1, 0, 0 }, /* subu 0 */ |
979 | | {"neg.d", "T,V", 0x54002b7b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
980 | | {"neg.s", "T,V", 0x54000b7b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
981 | | {"neg.ps", "T,V", 0x54004b7b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
982 | | {"nmadd.d", "D,R,S,T", 0x5400000a, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
983 | | {"nmadd.s", "D,R,S,T", 0x54000002, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I1, 0, 0 }, |
984 | | {"nmadd.ps", "D,R,S,T", 0x54000012, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
985 | | {"nmsub.d", "D,R,S,T", 0x5400002a, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
986 | | {"nmsub.s", "D,R,S,T", 0x54000022, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I1, 0, 0 }, |
987 | | {"nmsub.ps", "D,R,S,T", 0x54000032, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I1, 0, 0 }, |
988 | | /* nop is at the start of the table. */ |
989 | | {"not", "mf,mg", 0x4400, 0xffc0, WR_1|RD_2, 0, I1, 0, 0 }, /* put not before nor */ |
990 | | {"not", "d,v", 0x000002d0, 0xffe007ff, WR_1|RD_2, 0, I1, 0, 0 }, /* nor d,s,0 */ |
991 | | {"nor", "mf,mz,mg", 0x4400, 0xffc0, WR_1|RD_3, 0, I1, 0, 0 }, /* not */ |
992 | | {"nor", "mf,mg,mz", 0x4400, 0xffc0, WR_1|RD_2, 0, I1, 0, 0 }, /* not */ |
993 | | {"nor", "d,v,t", 0x000002d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
994 | | {"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, 0, I1, 0, 0 }, |
995 | | {"or", "mp,mj,mz", 0x0c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 }, /* move */ |
996 | | {"or", "mp,mz,mj", 0x0c00, 0xfc00, WR_1|RD_3, 0, I1, 0, 0 }, /* move */ |
997 | | {"or", "mf,mt,mg", 0x44c0, 0xffc0, MOD_1|RD_3, 0, I1, 0, 0 }, |
998 | | {"or", "mf,mg,mx", 0x44c0, 0xffc0, MOD_1|RD_2, 0, I1, 0, 0 }, |
999 | | {"or", "d,v,t", 0x00000290, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1000 | | {"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, 0, I1, 0, 0 }, |
1001 | | {"ori", "mp,mj,mZ", 0x0c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 }, /* move */ |
1002 | | {"ori", "t,r,i", 0x50000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 }, |
1003 | | {"pll.ps", "D,V,T", 0x54000080, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
1004 | | {"plu.ps", "D,V,T", 0x540000c0, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
1005 | | {"pul.ps", "D,V,T", 0x54000100, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
1006 | | {"puu.ps", "D,V,T", 0x54000140, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
1007 | | /* pref is at the start of the table. */ |
1008 | | {"recip.d", "T,S", 0x5400523b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
1009 | | {"recip.s", "T,S", 0x5400123b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
1010 | | {"rem", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 }, |
1011 | | {"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, 0, I1, 0, 0 }, |
1012 | | {"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, 0, I1, 0, 0 }, |
1013 | | {"remu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 }, |
1014 | | {"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, 0, I1, 0, 0 }, |
1015 | | {"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, 0, I1, 0, 0 }, |
1016 | | {"rdhwr", "t,K", 0x00006b3c, 0xfc00ffff, WR_1, 0, I1, 0, 0 }, |
1017 | | {"rdpgpr", "t,r", 0x0000e17c, 0xfc00ffff, WR_1, 0, I1, 0, 0 }, |
1018 | | {"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I1, 0, 0 }, |
1019 | | {"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I1, 0, 0 }, |
1020 | | {"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I1, 0, 0 }, |
1021 | | {"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I1, 0, 0 }, |
1022 | | {"ror", "t,r,<", 0x000000c0, 0xfc0007ff, WR_1|RD_2, 0, I1, 0, 0 }, |
1023 | | {"rorv", "d,t,s", 0x000000d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1024 | | {"rotl", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I1, 0, 0 }, |
1025 | | {"rotl", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I1, 0, 0 }, |
1026 | | {"rotr", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I1, 0, 0 }, |
1027 | | {"rotr", "t,r,<", 0x000000c0, 0xfc0007ff, WR_1|RD_2, 0, I1, 0, 0 }, |
1028 | | {"rotrv", "d,t,s", 0x000000d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1029 | | {"round.l.d", "T,S", 0x5400733b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
1030 | | {"round.l.s", "T,S", 0x5400333b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
1031 | | {"round.w.d", "T,S", 0x54007b3b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
1032 | | {"round.w.s", "T,S", 0x54003b3b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
1033 | | {"rsqrt.d", "T,S", 0x5400423b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
1034 | | {"rsqrt.s", "T,S", 0x5400023b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
1035 | | {"sb", "mq,mL(ml)", 0x8800, 0xfc00, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1036 | | {"sb", "t,o(b)", 0x18000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1037 | | {"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1038 | | {"sc", "t,~(b)", 0x6000b000, 0xfc00f000, MOD_1|RD_3|SM, 0, I1, 0, 0 }, |
1039 | | {"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1040 | | {"scd", "t,~(b)", 0x6000f000, 0xfc00f000, MOD_1|RD_3|SM, 0, I3, 0, 0 }, |
1041 | | {"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, 0, I3, 0, 0 }, |
1042 | | /* The macro has to be first to handle o32 correctly. */ |
1043 | | {"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1044 | | {"sd", "t,o(b)", 0xd8000000, 0xfc000000, RD_1|RD_3|SM, 0, I3, 0, 0 }, |
1045 | | {"sdbbp", "", 0x46c0, 0xffff, TRAP, 0, I1, 0, 0 }, |
1046 | | {"sdbbp", "", 0x0000db7c, 0xffffffff, TRAP, 0, I1, 0, 0 }, |
1047 | | {"sdbbp", "mO", 0x46c0, 0xfff0, TRAP, 0, I1, 0, 0 }, |
1048 | | {"sdbbp", "+J", 0x0000db7c, 0xfc00ffff, TRAP, 0, I1, 0, 0 }, |
1049 | | {"sdc1", "T,o(b)", 0xb8000000, 0xfc000000, RD_1|RD_3|SM|FP_D, 0, I1, 0, 0 }, |
1050 | | {"sdc1", "E,o(b)", 0xb8000000, 0xfc000000, RD_1|RD_3|SM|FP_D, 0, I1, 0, 0 }, |
1051 | | {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
1052 | | {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
1053 | | {"sdc2", "E,~(b)", 0x2000a000, 0xfc00f000, RD_3|RD_C2|SM, 0, I1, 0, 0 }, |
1054 | | {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1055 | | {"s.d", "T,o(b)", 0xb8000000, 0xfc000000, RD_1|RD_3|SM|FP_D, 0, I1, 0, 0 }, /* sdc1 */ |
1056 | | {"s.d", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 }, |
1057 | | {"sdl", "t,~(b)", 0x6000c000, 0xfc00f000, RD_1|RD_3|SM, 0, I3, 0, 0 }, |
1058 | | {"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, 0, I3, 0, 0 }, |
1059 | | {"sdm", "n,~(b)", 0x2000f000, 0xfc00f000, RD_3|SM, 0, I3, 0, 0 }, |
1060 | | {"sdm", "n,A(b)", 0, (int) M_SDM_AB, INSN_MACRO, 0, I3, 0, 0 }, |
1061 | | {"sdp", "t,~(b)", 0x2000c000, 0xfc00f000, RD_1|RD_3|SM, 0, I3, 0, 0 }, |
1062 | | {"sdp", "t,A(b)", 0, (int) M_SDP_AB, INSN_MACRO, 0, I3, 0, 0 }, |
1063 | | {"sdr", "t,~(b)", 0x6000d000, 0xfc00f000, RD_1|RD_3|SM, 0, I3, 0, 0 }, |
1064 | | {"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, 0, I3, 0, 0 }, |
1065 | | {"sdxc1", "D,t(b)", 0x54000108, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_D, 0, I1, 0, 0 }, |
1066 | | {"seb", "t,r", 0x00002b3c, 0xfc00ffff, WR_1|RD_2, 0, I1, 0, 0 }, |
1067 | | {"seh", "t,r", 0x00003b3c, 0xfc00ffff, WR_1|RD_2, 0, I1, 0, 0 }, |
1068 | | {"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, 0, I1, 0, 0 }, |
1069 | | {"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, 0, I1, 0, 0 }, |
1070 | | {"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, 0, I1, 0, 0 }, |
1071 | | {"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, 0, I1, 0, 0 }, |
1072 | | {"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, 0, I1, 0, 0 }, |
1073 | | {"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, 0, I1, 0, 0 }, |
1074 | | {"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, 0, I1, 0, 0 }, |
1075 | | {"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, 0, I1, 0, 0 }, |
1076 | | {"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, 0, I1, 0, 0 }, |
1077 | | {"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, 0, I1, 0, 0 }, |
1078 | | {"sh", "mq,mH(ml)", 0xa800, 0xfc00, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1079 | | {"sh", "t,o(b)", 0x38000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1080 | | {"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1081 | | {"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, 0, I1, 0, 0 }, |
1082 | | {"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, 0, I1, 0, 0 }, |
1083 | | {"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, 0, I1, 0, 0 }, |
1084 | | {"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, 0, I1, 0, 0 }, |
1085 | | {"sllv", "d,t,s", 0x00000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1086 | | {"sll", "md,mc,mM", 0x2400, 0xfc01, WR_1|RD_2, 0, I1, 0, 0 }, |
1087 | | {"sll", "d,w,s", 0x00000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, /* sllv */ |
1088 | | {"sll", "t,r,<", 0x00000000, 0xfc0007ff, WR_1|RD_2, 0, I1, 0, 0 }, |
1089 | | {"slt", "d,v,t", 0x00000350, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1090 | | {"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, 0, I1, 0, 0 }, |
1091 | | {"slti", "t,r,j", 0x90000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 }, |
1092 | | {"sltiu", "t,r,j", 0xb0000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 }, |
1093 | | {"sltu", "d,v,t", 0x00000390, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1094 | | {"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, 0, I1, 0, 0 }, |
1095 | | {"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, 0, I1, 0, 0 }, |
1096 | | {"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, 0, I1, 0, 0 }, |
1097 | | {"sqrt.d", "T,S", 0x54004a3b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
1098 | | {"sqrt.s", "T,S", 0x54000a3b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
1099 | | {"srav", "d,t,s", 0x00000090, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1100 | | {"sra", "d,w,s", 0x00000090, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, /* srav */ |
1101 | | {"sra", "t,r,<", 0x00000080, 0xfc0007ff, WR_1|RD_2, 0, I1, 0, 0 }, |
1102 | | {"srlv", "d,t,s", 0x00000050, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1103 | | {"srl", "md,mc,mM", 0x2401, 0xfc01, WR_1|RD_2, 0, I1, 0, 0 }, |
1104 | | {"srl", "d,w,s", 0x00000050, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, /* srlv */ |
1105 | | {"srl", "t,r,<", 0x00000040, 0xfc0007ff, WR_1|RD_2, 0, I1, 0, 0 }, |
1106 | | /* ssnop is at the start of the table. */ |
1107 | | {"sub", "d,v,t", 0x00000190, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1108 | | {"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, 0, I1, 0, 0 }, |
1109 | | {"sub.d", "D,V,T", 0x54000170, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
1110 | | {"sub.s", "D,V,T", 0x54000070, 0xfc0007ff, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 }, |
1111 | | {"sub.ps", "D,V,T", 0x54000270, 0xfc0007ff, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, 0 }, |
1112 | | {"subu", "md,me,ml", 0x0401, 0xfc01, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1113 | | {"subu", "d,v,t", 0x000001d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1114 | | {"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, 0, I1, 0, 0 }, |
1115 | | {"suxc1", "D,t(b)", 0x54000188, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_D, 0, I1, 0, 0 }, |
1116 | | {"sw", "mq,mJ(ml)", 0xe800, 0xfc00, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1117 | | {"sw", "mp,mU(ms)", 0xc800, 0xfc00, RD_1|RD_3|SM, 0, I1, 0, 0 }, /* swsp */ |
1118 | | {"sw", "t,o(b)", 0xf8000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1119 | | {"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1120 | | {"swc1", "T,o(b)", 0x98000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 }, |
1121 | | {"swc1", "E,o(b)", 0x98000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 }, |
1122 | | {"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
1123 | | {"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
1124 | | {"swc2", "E,~(b)", 0x20008000, 0xfc00f000, RD_3|RD_C2|SM, 0, I1, 0, 0 }, |
1125 | | {"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1126 | | {"s.s", "T,o(b)", 0x98000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 }, /* swc1 */ |
1127 | | {"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, |
1128 | | {"swl", "t,~(b)", 0x60008000, 0xfc00f000, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1129 | | {"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1130 | | {"scache", "t,~(b)", 0x60008000, 0xfc00f000, RD_1|RD_3|SM, 0, I1, 0, 0 }, /* same */ |
1131 | | {"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1132 | | {"swm", "mN,mJ(ms)", 0x4540, 0xffc0, RD_3|NODS, 0, I1, 0, 0 }, |
1133 | | {"swm", "n,~(b)", 0x2000d000, 0xfc00f000, RD_3|SM|NODS, 0, I1, 0, 0 }, |
1134 | | {"swm", "n,A(b)", 0, (int) M_SWM_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1135 | | {"swp", "t,~(b)", 0x20009000, 0xfc00f000, RD_1|RD_3|SM|NODS, 0, I1, 0, 0 }, |
1136 | | {"swp", "t,A(b)", 0, (int) M_SWP_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1137 | | {"swr", "t,~(b)", 0x60009000, 0xfc00f000, RD_1|RD_3|SM, 0, I1, 0, 0 }, |
1138 | | {"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1139 | | {"invalidate", "t,~(b)", 0x60009000, 0xfc00f000, RD_1|RD_3|SM, 0, I1, 0, 0 }, /* same */ |
1140 | | {"invalidate", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1141 | | {"swxc1", "D,t(b)", 0x54000088, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_S, 0, I1, 0, 0 }, |
1142 | | {"sync_acquire", "", 0x00116b7c, 0xffffffff, NODS, AL, I1, 0, 0 }, |
1143 | | {"sync_mb", "", 0x00106b7c, 0xffffffff, NODS, AL, I1, 0, 0 }, |
1144 | | {"sync_release", "", 0x00126b7c, 0xffffffff, NODS, AL, I1, 0, 0 }, |
1145 | | {"sync_rmb", "", 0x00136b7c, 0xffffffff, NODS, AL, I1, 0, 0 }, |
1146 | | {"sync_wmb", "", 0x00046b7c, 0xffffffff, NODS, AL, I1, 0, 0 }, |
1147 | | {"sync", "", 0x00006b7c, 0xffffffff, NODS, 0, I1, 0, 0 }, |
1148 | | {"sync", "1", 0x00006b7c, 0xffe0ffff, NODS, 0, I1, 0, 0 }, |
1149 | | {"synci", "o(b)", 0x42000000, 0xffe00000, RD_2|SM, 0, I1, 0, 0 }, |
1150 | | {"syscall", "", 0x00008b7c, 0xffffffff, TRAP, 0, I1, 0, 0 }, |
1151 | | {"syscall", "+J", 0x00008b7c, 0xfc00ffff, TRAP, 0, I1, 0, 0 }, |
1152 | | {"teqi", "s,j", 0x41c00000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, |
1153 | | {"teq", "s,t", 0x0000003c, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1154 | | {"teq", "s,t,|", 0x0000003c, 0xfc000fff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1155 | | {"teq", "s,j", 0x41c00000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, /* teqi */ |
1156 | | {"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, 0, I1, 0, 0 }, |
1157 | | {"tgei", "s,j", 0x41200000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, |
1158 | | {"tge", "s,t", 0x0000023c, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1159 | | {"tge", "s,t,|", 0x0000023c, 0xfc000fff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1160 | | {"tge", "s,j", 0x41200000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, /* tgei */ |
1161 | | {"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, 0, I1, 0, 0 }, |
1162 | | {"tgeiu", "s,j", 0x41600000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, |
1163 | | {"tgeu", "s,t", 0x0000043c, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1164 | | {"tgeu", "s,t,|", 0x0000043c, 0xfc000fff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1165 | | {"tgeu", "s,j", 0x41600000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, /* tgeiu */ |
1166 | | {"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, 0, I1, 0, 0 }, |
1167 | | {"tlbinv", "", 0x0000437c, 0xffffffff, INSN_TLB, 0, 0, TLBINV, 0 }, |
1168 | | {"tlbinvf", "", 0x0000537c, 0xffffffff, INSN_TLB, 0, 0, TLBINV, 0 }, |
1169 | | {"tlbginv", "", 0x0000417c, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 }, |
1170 | | {"tlbginvf", "", 0x0000517c, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 }, |
1171 | | {"tlbgp", "", 0x0000017c, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 }, |
1172 | | {"tlbgr", "", 0x0000117c, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 }, |
1173 | | {"tlbgwi", "", 0x0000217c, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 }, |
1174 | | {"tlbgwr", "", 0x0000317c, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 }, |
1175 | | {"tlbp", "", 0x0000037c, 0xffffffff, INSN_TLB, 0, I1, 0, 0 }, |
1176 | | {"tlbr", "", 0x0000137c, 0xffffffff, INSN_TLB, 0, I1, 0, 0 }, |
1177 | | {"tlbwi", "", 0x0000237c, 0xffffffff, INSN_TLB, 0, I1, 0, 0 }, |
1178 | | {"tlbwr", "", 0x0000337c, 0xffffffff, INSN_TLB, 0, I1, 0, 0 }, |
1179 | | {"tlti", "s,j", 0x41000000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, |
1180 | | {"tlt", "s,t", 0x0000083c, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1181 | | {"tlt", "s,t,|", 0x0000083c, 0xfc000fff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1182 | | {"tlt", "s,j", 0x41000000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, /* tlti */ |
1183 | | {"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, 0, I1, 0, 0 }, |
1184 | | {"tltiu", "s,j", 0x41400000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, |
1185 | | {"tltu", "s,t", 0x00000a3c, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1186 | | {"tltu", "s,t,|", 0x00000a3c, 0xfc000fff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1187 | | {"tltu", "s,j", 0x41400000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, /* tltiu */ |
1188 | | {"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, 0, I1, 0, 0 }, |
1189 | | {"tnei", "s,j", 0x41800000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, |
1190 | | {"tne", "s,t", 0x00000c3c, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1191 | | {"tne", "s,t,|", 0x00000c3c, 0xfc000fff, RD_1|RD_2|TRAP, 0, I1, 0, 0 }, |
1192 | | {"tne", "s,j", 0x41800000, 0xffe00000, RD_1|TRAP, 0, I1, 0, 0 }, /* tnei */ |
1193 | | {"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, 0, I1, 0, 0 }, |
1194 | | {"trunc.l.d", "T,S", 0x5400633b, 0xfc00ffff, WR_1|RD_2|FP_D, 0, I1, 0, 0 }, |
1195 | | {"trunc.l.s", "T,S", 0x5400233b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
1196 | | {"trunc.w.d", "T,S", 0x54006b3b, 0xfc00ffff, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, 0 }, |
1197 | | {"trunc.w.s", "T,S", 0x54002b3b, 0xfc00ffff, WR_1|RD_2|FP_S, 0, I1, 0, 0 }, |
1198 | | {"uld", "t,A(b)", 0, (int) M_ULD_AB, INSN_MACRO, 0, I3, 0, 0 }, |
1199 | | {"ulh", "t,A(b)", 0, (int) M_ULH_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1200 | | {"ulhu", "t,A(b)", 0, (int) M_ULHU_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1201 | | {"ulw", "t,A(b)", 0, (int) M_ULW_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1202 | | {"usd", "t,A(b)", 0, (int) M_USD_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1203 | | {"ush", "t,A(b)", 0, (int) M_USH_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1204 | | {"usw", "t,A(b)", 0, (int) M_USW_AB, INSN_MACRO, 0, I1, 0, 0 }, |
1205 | | {"wait", "", 0x0000937c, 0xffffffff, NODS, 0, I1, 0, 0 }, |
1206 | | {"wait", "+J", 0x0000937c, 0xfc00ffff, NODS, 0, I1, 0, 0 }, |
1207 | | {"wrpgpr", "t,r", 0x0000f17c, 0xfc00ffff, RD_2, 0, I1, 0, 0 }, |
1208 | | {"wsbh", "t,r", 0x00007b3c, 0xfc00ffff, WR_1|RD_2, 0, I1, 0, 0 }, |
1209 | | {"xor", "mf,mt,mg", 0x4440, 0xffc0, MOD_1|RD_3, 0, I1, 0, 0 }, |
1210 | | {"xor", "mf,mg,mx", 0x4440, 0xffc0, MOD_1|RD_2, 0, I1, 0, 0 }, |
1211 | | {"xor", "d,v,t", 0x00000310, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, |
1212 | | {"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, 0, I1, 0, 0 }, |
1213 | | {"xori", "t,r,i", 0x70000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 }, |
1214 | | {"yield", "t", 0x000009bc, 0xfc1fffff, RD_1|NODS, 0, 0, MT32, 0 }, |
1215 | | {"yield", "s,t", 0x000009bc, 0xfc00ffff, WR_1|RD_2|NODS, 0, 0, MT32, 0 }, |
1216 | | /* microMIPS Enhanced VA Scheme */ |
1217 | | {"lbue", "t,+j(b)", 0x60006000, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1218 | | {"lbue", "t,A(b)", 0, (int) M_LBUE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1219 | | {"lhue", "t,+j(b)", 0x60006200, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1220 | | {"lhue", "t,A(b)", 0, (int) M_LHUE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1221 | | {"lbe", "t,+j(b)", 0x60006800, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1222 | | {"lbe", "t,A(b)", 0, (int) M_LBE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1223 | | {"lhe", "t,+j(b)", 0x60006a00, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1224 | | {"lhe", "t,A(b)", 0, (int) M_LHE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1225 | | {"lle", "t,+j(b)", 0x60006c00, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1226 | | {"lle", "t,A(b)", 0, (int) M_LLE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1227 | | {"lwe", "t,+j(b)", 0x60006e00, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1228 | | {"lwe", "t,A(b)", 0, (int) M_LWE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1229 | | {"lwle", "t,+j(b)", 0x60006400, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1230 | | {"lwle", "t,A(b)", 0, (int) M_LWLE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1231 | | {"lwre", "t,+j(b)", 0x60006600, 0xfc00fe00, WR_1|RD_3|LM, 0, 0, EVA, 0 }, |
1232 | | {"lwre", "t,A(b)", 0, (int) M_LWRE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1233 | | {"sbe", "t,+j(b)", 0x6000a800, 0xfc00fe00, WR_1|RD_3|SM, 0, 0, EVA, 0 }, |
1234 | | {"sbe", "t,A(b)", 0, (int) M_SBE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1235 | | {"sce", "t,+j(b)", 0x6000ac00, 0xfc00fe00, MOD_1|RD_3|SM, 0, 0, EVA, 0 }, |
1236 | | {"sce", "t,A(b)", 0, (int) M_SCE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1237 | | {"she", "t,+j(b)", 0x6000aa00, 0xfc00fe00, WR_1|RD_3|SM, 0, 0, EVA, 0 }, |
1238 | | {"she", "t,A(b)", 0, (int) M_SHE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1239 | | {"swe", "t,+j(b)", 0x6000ae00, 0xfc00fe00, WR_1|RD_3|SM, 0, 0, EVA, 0 }, |
1240 | | {"swe", "t,A(b)", 0, (int) M_SWE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1241 | | {"swle", "t,+j(b)", 0x6000a000, 0xfc00fe00, WR_1|RD_3|SM, 0, 0, EVA, 0 }, |
1242 | | {"swle", "t,A(b)", 0, (int) M_SWLE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1243 | | {"swre", "t,+j(b)", 0x6000a200, 0xfc00fe00, WR_1|RD_3|SM, 0, 0, EVA, 0 }, |
1244 | | {"swre", "t,A(b)", 0, (int) M_SWRE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1245 | | {"cachee", "k,+j(b)", 0x6000a600, 0xfc00fe00, RD_3, 0, 0, EVA, 0 }, |
1246 | | {"cachee", "k,A(b)", 0, (int) M_CACHEE_AB,INSN_MACRO, 0, 0, EVA, 0 }, |
1247 | | {"prefe", "k,+j(b)", 0x6000a400, 0xfc00fe00, RD_3|LM, 0, 0, EVA, 0 }, |
1248 | | {"prefe", "k,A(b)", 0, (int) M_PREFE_AB, INSN_MACRO, 0, 0, EVA, 0 }, |
1249 | | /* MIPS DSP ASE. */ |
1250 | | {"absq_s.ph", "t,s", 0x0000113c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1251 | | {"absq_s.w", "t,s", 0x0000213c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1252 | | {"addq.ph", "d,s,t", 0x0000000d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1253 | | {"addq_s.ph", "d,s,t", 0x0000040d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1254 | | {"addq_s.w", "d,s,t", 0x00000305, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1255 | | {"addsc", "d,s,t", 0x00000385, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1256 | | {"addu.qb", "d,s,t", 0x000000cd, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1257 | | {"addu_s.qb", "d,s,t", 0x000004cd, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1258 | | {"addwc", "d,s,t", 0x000003c5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1259 | | {"bitrev", "t,s", 0x0000313c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1260 | | {"bposge32", "p", 0x43600000, 0xffff0000, CBD, 0, 0, D32, 0 }, |
1261 | | {"cmp.eq.ph", "s,t", 0x00000005, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 }, |
1262 | | {"cmpgu.eq.qb", "d,s,t", 0x000000c5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1263 | | {"cmp.le.ph", "s,t", 0x00000085, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 }, |
1264 | | {"cmpgu.le.qb", "d,s,t", 0x00000145, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1265 | | {"cmp.lt.ph", "s,t", 0x00000045, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 }, |
1266 | | {"cmpgu.lt.qb", "d,s,t", 0x00000105, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1267 | | {"cmpu.eq.qb", "s,t", 0x00000245, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 }, |
1268 | | {"cmpu.le.qb", "s,t", 0x000002c5, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 }, |
1269 | | {"cmpu.lt.qb", "s,t", 0x00000285, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 }, |
1270 | | {"dpaq_sa.l.w", "7,s,t", 0x000012bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1271 | | {"dpaq_s.w.ph", "7,s,t", 0x000002bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1272 | | {"dpau.h.qbl", "7,s,t", 0x000020bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1273 | | {"dpau.h.qbr", "7,s,t", 0x000030bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1274 | | {"dpsq_sa.l.w", "7,s,t", 0x000016bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1275 | | {"dpsq_s.w.ph", "7,s,t", 0x000006bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1276 | | {"dpsu.h.qbl", "7,s,t", 0x000024bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1277 | | {"dpsu.h.qbr", "7,s,t", 0x000034bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1278 | | {"extpdp", "t,7,6", 0x0000367c, 0xfc003fff, WR_1|RD_a|DSP_VOLA, 0, 0, D32, 0 }, |
1279 | | {"extpdpv", "t,7,s", 0x000038bc, 0xfc003fff, WR_1|RD_3|RD_a|DSP_VOLA, 0, 0, D32, 0 }, |
1280 | | {"extp", "t,7,6", 0x0000267c, 0xfc003fff, WR_1|RD_a, 0, 0, D32, 0 }, |
1281 | | {"extpv", "t,7,s", 0x000028bc, 0xfc003fff, WR_1|RD_3|RD_a, 0, 0, D32, 0 }, |
1282 | | {"extr_rs.w", "t,7,6", 0x00002e7c, 0xfc003fff, WR_1|RD_a, 0, 0, D32, 0 }, |
1283 | | {"extr_r.w", "t,7,6", 0x00001e7c, 0xfc003fff, WR_1|RD_a, 0, 0, D32, 0 }, |
1284 | | {"extr_s.h", "t,7,6", 0x00003e7c, 0xfc003fff, WR_1|RD_a, 0, 0, D32, 0 }, |
1285 | | {"extrv_rs.w", "t,7,s", 0x00002ebc, 0xfc003fff, WR_1|RD_3|RD_a, 0, 0, D32, 0 }, |
1286 | | {"extrv_r.w", "t,7,s", 0x00001ebc, 0xfc003fff, WR_1|RD_3|RD_a, 0, 0, D32, 0 }, |
1287 | | {"extrv_s.h", "t,7,s", 0x00003ebc, 0xfc003fff, WR_1|RD_3|RD_a, 0, 0, D32, 0 }, |
1288 | | {"extrv.w", "t,7,s", 0x00000ebc, 0xfc003fff, WR_1|RD_3|RD_a, 0, 0, D32, 0 }, |
1289 | | {"extr.w", "t,7,6", 0x00000e7c, 0xfc003fff, WR_1|RD_a, 0, 0, D32, 0 }, |
1290 | | {"insv", "t,s", 0x0000413c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1291 | | {"lbux", "d,t(b)", 0x00000225, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, 0, D32, 0 }, |
1292 | | {"lhx", "d,t(b)", 0x00000165, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, 0, D32, 0 }, |
1293 | | {"lwx", "d,t(b)", 0x000001a5, 0xfc0007ff, WR_1|RD_2|RD_3|LM, 0, 0, D32, 0 }, |
1294 | | {"maq_sa.w.phl", "7,s,t", 0x00003a7c, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1295 | | {"maq_sa.w.phr", "7,s,t", 0x00002a7c, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1296 | | {"maq_s.w.phl", "7,s,t", 0x00001a7c, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1297 | | {"maq_s.w.phr", "7,s,t", 0x00000a7c, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1298 | | {"modsub", "d,s,t", 0x00000295, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1299 | | {"mthlip", "s,7", 0x0000027c, 0xffe03fff, RD_1|MOD_a|DSP_VOLA, 0, 0, D32, 0 }, |
1300 | | {"muleq_s.w.phl", "d,s,t", 0x00000025, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 }, |
1301 | | {"muleq_s.w.phr", "d,s,t", 0x00000065, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 }, |
1302 | | {"muleu_s.ph.qbl", "d,s,t", 0x00000095, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 }, |
1303 | | {"muleu_s.ph.qbr", "d,s,t", 0x000000d5, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 }, |
1304 | | {"mulq_rs.ph", "d,s,t", 0x00000115, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 }, |
1305 | | {"mulsaq_s.w.ph", "7,s,t", 0x00003cbc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 }, |
1306 | | {"packrl.ph", "d,s,t", 0x000001ad, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1307 | | {"pick.ph", "d,s,t", 0x0000022d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1308 | | {"pick.qb", "d,s,t", 0x000001ed, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1309 | | {"precequ.ph.qbla", "t,s", 0x0000733c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1310 | | {"precequ.ph.qbl", "t,s", 0x0000713c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1311 | | {"precequ.ph.qbra", "t,s", 0x0000933c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1312 | | {"precequ.ph.qbr", "t,s", 0x0000913c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1313 | | {"preceq.w.phl", "t,s", 0x0000513c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1314 | | {"preceq.w.phr", "t,s", 0x0000613c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1315 | | {"preceu.ph.qbla", "t,s", 0x0000b33c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1316 | | {"preceu.ph.qbl", "t,s", 0x0000b13c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1317 | | {"preceu.ph.qbra", "t,s", 0x0000d33c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1318 | | {"preceu.ph.qbr", "t,s", 0x0000d13c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1319 | | {"precrq.ph.w", "d,s,t", 0x000000ed, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1320 | | {"precrq.qb.ph", "d,s,t", 0x000000ad, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1321 | | {"precrq_rs.ph.w", "d,s,t", 0x0000012d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1322 | | {"precrqu_s.qb.ph", "d,s,t", 0x0000016d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1323 | | {"raddu.w.qb", "t,s", 0x0000f13c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1324 | | {"rddsp", "t", 0x000fc67c, 0xfc1fffff, WR_1, 0, 0, D32, 0 }, |
1325 | | {"rddsp", "t,8", 0x0000067c, 0xfc103fff, WR_1, 0, 0, D32, 0 }, |
1326 | | {"repl.ph", "d,@", 0x0000003d, 0xfc0007ff, WR_1, 0, 0, D32, 0 }, |
1327 | | {"repl.qb", "t,5", 0x000005fc, 0xfc001fff, WR_1, 0, 0, D32, 0 }, |
1328 | | {"replv.ph", "t,s", 0x0000033c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1329 | | {"replv.qb", "t,s", 0x0000133c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 }, |
1330 | | {"shilo", "7,0", 0x0000001d, 0xffc03fff, MOD_a, 0, 0, D32, 0 }, |
1331 | | {"shilov", "7,s", 0x0000127c, 0xffe03fff, RD_2|MOD_a, 0, 0, D32, 0 }, |
1332 | | {"shll.ph", "t,s,4", 0x000003b5, 0xfc000fff, WR_1|RD_2, 0, 0, D32, 0 }, |
1333 | | {"shll.qb", "t,s,3", 0x0000087c, 0xfc001fff, WR_1|RD_2, 0, 0, D32, 0 }, |
1334 | | {"shll_s.ph", "t,s,4", 0x00000bb5, 0xfc000fff, WR_1|RD_2, 0, 0, D32, 0 }, |
1335 | | {"shll_s.w", "t,s,^", 0x000003f5, 0xfc0007ff, WR_1|RD_2, 0, 0, D32, 0 }, |
1336 | | {"shllv.ph", "d,t,s", 0x0000038d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1337 | | {"shllv.qb", "d,t,s", 0x00000395, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1338 | | {"shllv_s.ph", "d,t,s", 0x0000078d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1339 | | {"shllv_s.w", "d,t,s", 0x000003d5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1340 | | {"shra.ph", "t,s,4", 0x00000335, 0xfc000fff, WR_1|RD_2, 0, 0, D32, 0 }, |
1341 | | {"shra_r.ph", "t,s,4", 0x00000735, 0xfc000fff, WR_1|RD_2, 0, 0, D32, 0 }, |
1342 | | {"shra_r.w", "t,s,^", 0x000002f5, 0xfc0007ff, WR_1|RD_2, 0, 0, D32, 0 }, |
1343 | | {"shrav.ph", "d,t,s", 0x0000018d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1344 | | {"shrav_r.ph", "d,t,s", 0x0000058d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1345 | | {"shrav_r.w", "d,t,s", 0x000002d5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1346 | | {"shrl.qb", "t,s,3", 0x0000187c, 0xfc001fff, WR_1|RD_2, 0, 0, D32, 0 }, |
1347 | | {"shrlv.qb", "d,t,s", 0x00000355, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1348 | | {"subq.ph", "d,s,t", 0x0000020d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1349 | | {"subq_s.ph", "d,s,t", 0x0000060d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1350 | | {"subq_s.w", "d,s,t", 0x00000345, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1351 | | {"subu.qb", "d,s,t", 0x000002cd, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1352 | | {"subu_s.qb", "d,s,t", 0x000006cd, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 }, |
1353 | | {"wrdsp", "t", 0x000fd67c, 0xfc1fffff, RD_1|DSP_VOLA, 0, 0, D32, 0 }, |
1354 | | {"wrdsp", "t,8", 0x0000167c, 0xfc103fff, RD_1|DSP_VOLA, 0, 0, D32, 0 }, |
1355 | | /* MIPS DSP ASE Rev2. */ |
1356 | | {"absq_s.qb", "t,s", 0x0000013c, 0xfc00ffff, WR_1|RD_2, 0, 0, D33, 0 }, |
1357 | | {"addqh.ph", "d,s,t", 0x0000004d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1358 | | {"addqh_r.ph", "d,s,t", 0x0000044d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1359 | | {"addqh.w", "d,s,t", 0x0000008d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1360 | | {"addqh_r.w", "d,s,t", 0x0000048d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1361 | | {"addu.ph", "d,s,t", 0x0000010d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1362 | | {"addu_s.ph", "d,s,t", 0x0000050d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1363 | | {"adduh.qb", "d,s,t", 0x0000014d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1364 | | {"adduh_r.qb", "d,s,t", 0x0000054d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1365 | | {"append", "t,s,h", 0x00000215, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 }, |
1366 | | {"balign", "t,s,I", 0, (int) M_BALIGN, INSN_MACRO, 0, 0, D33, 0 }, |
1367 | | {"balign", "t,s,2", 0x000008bc, 0xfc003fff, MOD_1|RD_2, 0, 0, D33, 0 }, |
1368 | | {"cmpgdu.eq.qb", "d,s,t", 0x00000185, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1369 | | {"cmpgdu.lt.qb", "d,s,t", 0x000001c5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1370 | | {"cmpgdu.le.qb", "d,s,t", 0x00000205, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1371 | | {"dpa.w.ph", "7,s,t", 0x000000bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1372 | | {"dpaqx_s.w.ph", "7,s,t", 0x000022bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1373 | | {"dpaqx_sa.w.ph", "7,s,t", 0x000032bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1374 | | {"dpax.w.ph", "7,s,t", 0x000010bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1375 | | {"dps.w.ph", "7,s,t", 0x000004bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1376 | | {"dpsqx_s.w.ph", "7,s,t", 0x000026bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1377 | | {"dpsqx_sa.w.ph", "7,s,t", 0x000036bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1378 | | {"dpsx.w.ph", "7,s,t", 0x000014bc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1379 | | {"mul.ph", "d,s,t", 0x0000002d, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 }, |
1380 | | {"mul_s.ph", "d,s,t", 0x0000042d, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 }, |
1381 | | {"mulq_rs.w", "d,s,t", 0x00000195, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 }, |
1382 | | {"mulq_s.ph", "d,s,t", 0x00000155, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 }, |
1383 | | {"mulq_s.w", "d,s,t", 0x000001d5, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 }, |
1384 | | {"mulsa.w.ph", "7,s,t", 0x00002cbc, 0xfc003fff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 }, |
1385 | | {"precr.qb.ph", "d,s,t", 0x0000006d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1386 | | {"precr_sra.ph.w", "t,s,h", 0x000003cd, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 }, |
1387 | | {"precr_sra_r.ph.w", "t,s,h", 0x000007cd, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 }, |
1388 | | {"prepend", "t,s,h", 0x00000255, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 }, |
1389 | | {"shra.qb", "t,s,3", 0x000001fc, 0xfc001fff, WR_1|RD_2, 0, 0, D33, 0 }, |
1390 | | {"shra_r.qb", "t,s,3", 0x000011fc, 0xfc001fff, WR_1|RD_2, 0, 0, D33, 0 }, |
1391 | | {"shrav.qb", "d,t,s", 0x000001cd, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1392 | | {"shrav_r.qb", "d,t,s", 0x000005cd, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1393 | | {"shrl.ph", "t,s,4", 0x000003fc, 0xfc000fff, WR_1|RD_2, 0, 0, D33, 0 }, |
1394 | | {"shrlv.ph", "d,t,s", 0x00000315, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1395 | | {"subu.ph", "d,s,t", 0x0000030d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1396 | | {"subu_s.ph", "d,s,t", 0x0000070d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1397 | | {"subuh.qb", "d,s,t", 0x0000034d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1398 | | {"subuh_r.qb", "d,s,t", 0x0000074d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1399 | | {"subqh.ph", "d,s,t", 0x0000024d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1400 | | {"subqh_r.ph", "d,s,t", 0x0000064d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1401 | | {"subqh.w", "d,s,t", 0x0000028d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1402 | | {"subqh_r.w", "d,s,t", 0x0000068d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 }, |
1403 | | /* MSA Extension. */ |
1404 | | {"sll.b", "+d,+e,+h", 0x5800001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1405 | | {"sll.h", "+d,+e,+h", 0x5820001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1406 | | {"sll.w", "+d,+e,+h", 0x5840001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1407 | | {"sll.d", "+d,+e,+h", 0x5860001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1408 | | {"slli.b", "+d,+e,+!", 0x58700012, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1409 | | {"slli.h", "+d,+e,+@", 0x58600012, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1410 | | {"slli.w", "+d,+e,+x", 0x58400012, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1411 | | {"slli.d", "+d,+e,+#", 0x58000012, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1412 | | {"sra.b", "+d,+e,+h", 0x5880001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1413 | | {"sra.h", "+d,+e,+h", 0x58a0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1414 | | {"sra.w", "+d,+e,+h", 0x58c0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1415 | | {"sra.d", "+d,+e,+h", 0x58e0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1416 | | {"srai.b", "+d,+e,+!", 0x58f00012, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1417 | | {"srai.h", "+d,+e,+@", 0x58e00012, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1418 | | {"srai.w", "+d,+e,+x", 0x58c00012, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1419 | | {"srai.d", "+d,+e,+#", 0x58800012, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1420 | | {"srl.b", "+d,+e,+h", 0x5900001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1421 | | {"srl.h", "+d,+e,+h", 0x5920001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1422 | | {"srl.w", "+d,+e,+h", 0x5940001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1423 | | {"srl.d", "+d,+e,+h", 0x5960001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1424 | | {"srli.b", "+d,+e,+!", 0x59700012, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1425 | | {"srli.h", "+d,+e,+@", 0x59600012, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1426 | | {"srli.w", "+d,+e,+x", 0x59400012, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1427 | | {"srli.d", "+d,+e,+#", 0x59000012, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1428 | | {"bclr.b", "+d,+e,+h", 0x5980001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1429 | | {"bclr.h", "+d,+e,+h", 0x59a0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1430 | | {"bclr.w", "+d,+e,+h", 0x59c0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1431 | | {"bclr.d", "+d,+e,+h", 0x59e0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1432 | | {"bclri.b", "+d,+e,+!", 0x59f00012, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1433 | | {"bclri.h", "+d,+e,+@", 0x59e00012, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1434 | | {"bclri.w", "+d,+e,+x", 0x59c00012, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1435 | | {"bclri.d", "+d,+e,+#", 0x59800012, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1436 | | {"bset.b", "+d,+e,+h", 0x5a00001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1437 | | {"bset.h", "+d,+e,+h", 0x5a20001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1438 | | {"bset.w", "+d,+e,+h", 0x5a40001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1439 | | {"bset.d", "+d,+e,+h", 0x5a60001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1440 | | {"bseti.b", "+d,+e,+!", 0x5a700012, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1441 | | {"bseti.h", "+d,+e,+@", 0x5a600012, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1442 | | {"bseti.w", "+d,+e,+x", 0x5a400012, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1443 | | {"bseti.d", "+d,+e,+#", 0x5a000012, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1444 | | {"bneg.b", "+d,+e,+h", 0x5a80001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1445 | | {"bneg.h", "+d,+e,+h", 0x5aa0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1446 | | {"bneg.w", "+d,+e,+h", 0x5ac0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1447 | | {"bneg.d", "+d,+e,+h", 0x5ae0001a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1448 | | {"bnegi.b", "+d,+e,+!", 0x5af00012, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1449 | | {"bnegi.h", "+d,+e,+@", 0x5ae00012, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1450 | | {"bnegi.w", "+d,+e,+x", 0x5ac00012, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1451 | | {"bnegi.d", "+d,+e,+#", 0x5a800012, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1452 | | {"binsl.b", "+d,+e,+h", 0x5b00001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1453 | | {"binsl.h", "+d,+e,+h", 0x5b20001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1454 | | {"binsl.w", "+d,+e,+h", 0x5b40001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1455 | | {"binsl.d", "+d,+e,+h", 0x5b60001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1456 | | {"binsli.b", "+d,+e,+!", 0x5b700012, 0xfff8003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1457 | | {"binsli.h", "+d,+e,+@", 0x5b600012, 0xfff0003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1458 | | {"binsli.w", "+d,+e,+x", 0x5b400012, 0xffe0003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1459 | | {"binsli.d", "+d,+e,+#", 0x5b000012, 0xffc0003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1460 | | {"binsr.b", "+d,+e,+h", 0x5b80001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1461 | | {"binsr.h", "+d,+e,+h", 0x5ba0001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1462 | | {"binsr.w", "+d,+e,+h", 0x5bc0001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1463 | | {"binsr.d", "+d,+e,+h", 0x5be0001a, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1464 | | {"binsri.b", "+d,+e,+!", 0x5bf00012, 0xfff8003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1465 | | {"binsri.h", "+d,+e,+@", 0x5be00012, 0xfff0003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1466 | | {"binsri.w", "+d,+e,+x", 0x5bc00012, 0xffe0003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1467 | | {"binsri.d", "+d,+e,+#", 0x5b800012, 0xffc0003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1468 | | {"addv.b", "+d,+e,+h", 0x5800002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1469 | | {"addv.h", "+d,+e,+h", 0x5820002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1470 | | {"addv.w", "+d,+e,+h", 0x5840002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1471 | | {"addv.d", "+d,+e,+h", 0x5860002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1472 | | {"addvi.b", "+d,+e,+$", 0x58000029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1473 | | {"addvi.h", "+d,+e,+$", 0x58200029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1474 | | {"addvi.w", "+d,+e,+$", 0x58400029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1475 | | {"addvi.d", "+d,+e,+$", 0x58600029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1476 | | {"subv.b", "+d,+e,+h", 0x5880002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1477 | | {"subv.h", "+d,+e,+h", 0x58a0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1478 | | {"subv.w", "+d,+e,+h", 0x58c0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1479 | | {"subv.d", "+d,+e,+h", 0x58e0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1480 | | {"subvi.b", "+d,+e,+$", 0x58800029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1481 | | {"subvi.h", "+d,+e,+$", 0x58a00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1482 | | {"subvi.w", "+d,+e,+$", 0x58c00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1483 | | {"subvi.d", "+d,+e,+$", 0x58e00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1484 | | {"max_s.b", "+d,+e,+h", 0x5900002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1485 | | {"max_s.h", "+d,+e,+h", 0x5920002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1486 | | {"max_s.w", "+d,+e,+h", 0x5940002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1487 | | {"max_s.d", "+d,+e,+h", 0x5960002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1488 | | {"maxi_s.b", "+d,+e,+%", 0x59000029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1489 | | {"maxi_s.h", "+d,+e,+%", 0x59200029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1490 | | {"maxi_s.w", "+d,+e,+%", 0x59400029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1491 | | {"maxi_s.d", "+d,+e,+%", 0x59600029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1492 | | {"max_u.b", "+d,+e,+h", 0x5980002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1493 | | {"max_u.h", "+d,+e,+h", 0x59a0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1494 | | {"max_u.w", "+d,+e,+h", 0x59c0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1495 | | {"max_u.d", "+d,+e,+h", 0x59e0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1496 | | {"maxi_u.b", "+d,+e,+$", 0x59800029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1497 | | {"maxi_u.h", "+d,+e,+$", 0x59a00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1498 | | {"maxi_u.w", "+d,+e,+$", 0x59c00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1499 | | {"maxi_u.d", "+d,+e,+$", 0x59e00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1500 | | {"min_s.b", "+d,+e,+h", 0x5a00002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1501 | | {"min_s.h", "+d,+e,+h", 0x5a20002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1502 | | {"min_s.w", "+d,+e,+h", 0x5a40002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1503 | | {"min_s.d", "+d,+e,+h", 0x5a60002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1504 | | {"mini_s.b", "+d,+e,+%", 0x5a000029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1505 | | {"mini_s.h", "+d,+e,+%", 0x5a200029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1506 | | {"mini_s.w", "+d,+e,+%", 0x5a400029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1507 | | {"mini_s.d", "+d,+e,+%", 0x5a600029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1508 | | {"min_u.b", "+d,+e,+h", 0x5a80002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1509 | | {"min_u.h", "+d,+e,+h", 0x5aa0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1510 | | {"min_u.w", "+d,+e,+h", 0x5ac0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1511 | | {"min_u.d", "+d,+e,+h", 0x5ae0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1512 | | {"mini_u.b", "+d,+e,+$", 0x5a800029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1513 | | {"mini_u.h", "+d,+e,+$", 0x5aa00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1514 | | {"mini_u.w", "+d,+e,+$", 0x5ac00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1515 | | {"mini_u.d", "+d,+e,+$", 0x5ae00029, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1516 | | {"max_a.b", "+d,+e,+h", 0x5b00002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1517 | | {"max_a.h", "+d,+e,+h", 0x5b20002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1518 | | {"max_a.w", "+d,+e,+h", 0x5b40002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1519 | | {"max_a.d", "+d,+e,+h", 0x5b60002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1520 | | {"min_a.b", "+d,+e,+h", 0x5b80002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1521 | | {"min_a.h", "+d,+e,+h", 0x5ba0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1522 | | {"min_a.w", "+d,+e,+h", 0x5bc0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1523 | | {"min_a.d", "+d,+e,+h", 0x5be0002a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1524 | | {"ceq.b", "+d,+e,+h", 0x5800003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1525 | | {"ceq.h", "+d,+e,+h", 0x5820003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1526 | | {"ceq.w", "+d,+e,+h", 0x5840003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1527 | | {"ceq.d", "+d,+e,+h", 0x5860003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1528 | | {"ceqi.b", "+d,+e,+%", 0x58000039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1529 | | {"ceqi.h", "+d,+e,+%", 0x58200039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1530 | | {"ceqi.w", "+d,+e,+%", 0x58400039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1531 | | {"ceqi.d", "+d,+e,+%", 0x58600039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1532 | | {"clt_s.b", "+d,+e,+h", 0x5900003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1533 | | {"clt_s.h", "+d,+e,+h", 0x5920003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1534 | | {"clt_s.w", "+d,+e,+h", 0x5940003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1535 | | {"clt_s.d", "+d,+e,+h", 0x5960003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1536 | | {"clti_s.b", "+d,+e,+%", 0x59000039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1537 | | {"clti_s.h", "+d,+e,+%", 0x59200039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1538 | | {"clti_s.w", "+d,+e,+%", 0x59400039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1539 | | {"clti_s.d", "+d,+e,+%", 0x59600039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1540 | | {"clt_u.b", "+d,+e,+h", 0x5980003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1541 | | {"clt_u.h", "+d,+e,+h", 0x59a0003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1542 | | {"clt_u.w", "+d,+e,+h", 0x59c0003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1543 | | {"clt_u.d", "+d,+e,+h", 0x59e0003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1544 | | {"clti_u.b", "+d,+e,+$", 0x59800039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1545 | | {"clti_u.h", "+d,+e,+$", 0x59a00039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1546 | | {"clti_u.w", "+d,+e,+$", 0x59c00039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1547 | | {"clti_u.d", "+d,+e,+$", 0x59e00039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1548 | | {"cle_s.b", "+d,+e,+h", 0x5a00003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1549 | | {"cle_s.h", "+d,+e,+h", 0x5a20003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1550 | | {"cle_s.w", "+d,+e,+h", 0x5a40003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1551 | | {"cle_s.d", "+d,+e,+h", 0x5a60003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1552 | | {"clei_s.b", "+d,+e,+%", 0x5a000039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1553 | | {"clei_s.h", "+d,+e,+%", 0x5a200039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1554 | | {"clei_s.w", "+d,+e,+%", 0x5a400039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1555 | | {"clei_s.d", "+d,+e,+%", 0x5a600039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1556 | | {"cle_u.b", "+d,+e,+h", 0x5a80003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1557 | | {"cle_u.h", "+d,+e,+h", 0x5aa0003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1558 | | {"cle_u.w", "+d,+e,+h", 0x5ac0003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1559 | | {"cle_u.d", "+d,+e,+h", 0x5ae0003a, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1560 | | {"clei_u.b", "+d,+e,+$", 0x5a800039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1561 | | {"clei_u.h", "+d,+e,+$", 0x5aa00039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1562 | | {"clei_u.w", "+d,+e,+$", 0x5ac00039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1563 | | {"clei_u.d", "+d,+e,+$", 0x5ae00039, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1564 | | {"ld.b", "+d,+T(d)", 0x58000007, 0xfc00003f, WR_1|RD_3|LM, 0, 0, MSA, 0 }, |
1565 | | {"ld.h", "+d,+U(d)", 0x58000017, 0xfc00003f, WR_1|RD_3|LM, 0, 0, MSA, 0 }, |
1566 | | {"ld.w", "+d,+V(d)", 0x58000027, 0xfc00003f, WR_1|RD_3|LM, 0, 0, MSA, 0 }, |
1567 | | {"ld.d", "+d,+W(d)", 0x58000037, 0xfc00003f, WR_1|RD_3|LM, 0, 0, MSA, 0 }, |
1568 | | {"st.b", "+d,+T(d)", 0x5800000f, 0xfc00003f, RD_1|RD_3|SM, 0, 0, MSA, 0 }, |
1569 | | {"st.h", "+d,+U(d)", 0x5800001f, 0xfc00003f, RD_1|RD_3|SM, 0, 0, MSA, 0 }, |
1570 | | {"st.w", "+d,+V(d)", 0x5800002f, 0xfc00003f, RD_1|RD_3|SM, 0, 0, MSA, 0 }, |
1571 | | {"st.d", "+d,+W(d)", 0x5800003f, 0xfc00003f, RD_1|RD_3|SM, 0, 0, MSA, 0 }, |
1572 | | {"sat_s.b", "+d,+e,+!", 0x58700022, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1573 | | {"sat_s.h", "+d,+e,+@", 0x58600022, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1574 | | {"sat_s.w", "+d,+e,+x", 0x58400022, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1575 | | {"sat_s.d", "+d,+e,+#", 0x58000022, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1576 | | {"sat_u.b", "+d,+e,+!", 0x58f00022, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1577 | | {"sat_u.h", "+d,+e,+@", 0x58e00022, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1578 | | {"sat_u.w", "+d,+e,+x", 0x58c00022, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1579 | | {"sat_u.d", "+d,+e,+#", 0x58800022, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1580 | | {"add_a.b", "+d,+e,+h", 0x58000003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1581 | | {"add_a.h", "+d,+e,+h", 0x58200003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1582 | | {"add_a.w", "+d,+e,+h", 0x58400003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1583 | | {"add_a.d", "+d,+e,+h", 0x58600003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1584 | | {"adds_a.b", "+d,+e,+h", 0x58800003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1585 | | {"adds_a.h", "+d,+e,+h", 0x58a00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1586 | | {"adds_a.w", "+d,+e,+h", 0x58c00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1587 | | {"adds_a.d", "+d,+e,+h", 0x58e00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1588 | | {"adds_s.b", "+d,+e,+h", 0x59000003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1589 | | {"adds_s.h", "+d,+e,+h", 0x59200003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1590 | | {"adds_s.w", "+d,+e,+h", 0x59400003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1591 | | {"adds_s.d", "+d,+e,+h", 0x59600003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1592 | | {"adds_u.b", "+d,+e,+h", 0x59800003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1593 | | {"adds_u.h", "+d,+e,+h", 0x59a00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1594 | | {"adds_u.w", "+d,+e,+h", 0x59c00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1595 | | {"adds_u.d", "+d,+e,+h", 0x59e00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1596 | | {"ave_s.b", "+d,+e,+h", 0x5a000003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1597 | | {"ave_s.h", "+d,+e,+h", 0x5a200003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1598 | | {"ave_s.w", "+d,+e,+h", 0x5a400003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1599 | | {"ave_s.d", "+d,+e,+h", 0x5a600003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1600 | | {"ave_u.b", "+d,+e,+h", 0x5a800003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1601 | | {"ave_u.h", "+d,+e,+h", 0x5aa00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1602 | | {"ave_u.w", "+d,+e,+h", 0x5ac00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1603 | | {"ave_u.d", "+d,+e,+h", 0x5ae00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1604 | | {"aver_s.b", "+d,+e,+h", 0x5b000003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1605 | | {"aver_s.h", "+d,+e,+h", 0x5b200003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1606 | | {"aver_s.w", "+d,+e,+h", 0x5b400003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1607 | | {"aver_s.d", "+d,+e,+h", 0x5b600003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1608 | | {"aver_u.b", "+d,+e,+h", 0x5b800003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1609 | | {"aver_u.h", "+d,+e,+h", 0x5ba00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1610 | | {"aver_u.w", "+d,+e,+h", 0x5bc00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1611 | | {"aver_u.d", "+d,+e,+h", 0x5be00003, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1612 | | {"subs_s.b", "+d,+e,+h", 0x58000013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1613 | | {"subs_s.h", "+d,+e,+h", 0x58200013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1614 | | {"subs_s.w", "+d,+e,+h", 0x58400013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1615 | | {"subs_s.d", "+d,+e,+h", 0x58600013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1616 | | {"subs_u.b", "+d,+e,+h", 0x58800013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1617 | | {"subs_u.h", "+d,+e,+h", 0x58a00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1618 | | {"subs_u.w", "+d,+e,+h", 0x58c00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1619 | | {"subs_u.d", "+d,+e,+h", 0x58e00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1620 | | {"subsus_u.b", "+d,+e,+h", 0x59000013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1621 | | {"subsus_u.h", "+d,+e,+h", 0x59200013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1622 | | {"subsus_u.w", "+d,+e,+h", 0x59400013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1623 | | {"subsus_u.d", "+d,+e,+h", 0x59600013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1624 | | {"subsuu_s.b", "+d,+e,+h", 0x59800013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1625 | | {"subsuu_s.h", "+d,+e,+h", 0x59a00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1626 | | {"subsuu_s.w", "+d,+e,+h", 0x59c00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1627 | | {"subsuu_s.d", "+d,+e,+h", 0x59e00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1628 | | {"asub_s.b", "+d,+e,+h", 0x5a000013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1629 | | {"asub_s.h", "+d,+e,+h", 0x5a200013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1630 | | {"asub_s.w", "+d,+e,+h", 0x5a400013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1631 | | {"asub_s.d", "+d,+e,+h", 0x5a600013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1632 | | {"asub_u.b", "+d,+e,+h", 0x5a800013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1633 | | {"asub_u.h", "+d,+e,+h", 0x5aa00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1634 | | {"asub_u.w", "+d,+e,+h", 0x5ac00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1635 | | {"asub_u.d", "+d,+e,+h", 0x5ae00013, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1636 | | {"mulv.b", "+d,+e,+h", 0x58000023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1637 | | {"mulv.h", "+d,+e,+h", 0x58200023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1638 | | {"mulv.w", "+d,+e,+h", 0x58400023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1639 | | {"mulv.d", "+d,+e,+h", 0x58600023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1640 | | {"maddv.b", "+d,+e,+h", 0x58800023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1641 | | {"maddv.h", "+d,+e,+h", 0x58a00023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1642 | | {"maddv.w", "+d,+e,+h", 0x58c00023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1643 | | {"maddv.d", "+d,+e,+h", 0x58e00023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1644 | | {"msubv.b", "+d,+e,+h", 0x59000023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1645 | | {"msubv.h", "+d,+e,+h", 0x59200023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1646 | | {"msubv.w", "+d,+e,+h", 0x59400023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1647 | | {"msubv.d", "+d,+e,+h", 0x59600023, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1648 | | {"div_s.b", "+d,+e,+h", 0x5a000023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1649 | | {"div_s.h", "+d,+e,+h", 0x5a200023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1650 | | {"div_s.w", "+d,+e,+h", 0x5a400023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1651 | | {"div_s.d", "+d,+e,+h", 0x5a600023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1652 | | {"div_u.b", "+d,+e,+h", 0x5a800023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1653 | | {"div_u.h", "+d,+e,+h", 0x5aa00023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1654 | | {"div_u.w", "+d,+e,+h", 0x5ac00023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1655 | | {"div_u.d", "+d,+e,+h", 0x5ae00023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1656 | | {"mod_s.b", "+d,+e,+h", 0x5b000023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1657 | | {"mod_s.h", "+d,+e,+h", 0x5b200023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1658 | | {"mod_s.w", "+d,+e,+h", 0x5b400023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1659 | | {"mod_s.d", "+d,+e,+h", 0x5b600023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1660 | | {"mod_u.b", "+d,+e,+h", 0x5b800023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1661 | | {"mod_u.h", "+d,+e,+h", 0x5ba00023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1662 | | {"mod_u.w", "+d,+e,+h", 0x5bc00023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1663 | | {"mod_u.d", "+d,+e,+h", 0x5be00023, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1664 | | {"dotp_s.h", "+d,+e,+h", 0x58200033, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1665 | | {"dotp_s.w", "+d,+e,+h", 0x58400033, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1666 | | {"dotp_s.d", "+d,+e,+h", 0x58600033, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1667 | | {"dotp_u.h", "+d,+e,+h", 0x58a00033, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1668 | | {"dotp_u.w", "+d,+e,+h", 0x58c00033, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1669 | | {"dotp_u.d", "+d,+e,+h", 0x58e00033, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1670 | | {"dpadd_s.h", "+d,+e,+h", 0x59200033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1671 | | {"dpadd_s.w", "+d,+e,+h", 0x59400033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1672 | | {"dpadd_s.d", "+d,+e,+h", 0x59600033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1673 | | {"dpadd_u.h", "+d,+e,+h", 0x59a00033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1674 | | {"dpadd_u.w", "+d,+e,+h", 0x59c00033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1675 | | {"dpadd_u.d", "+d,+e,+h", 0x59e00033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1676 | | {"dpsub_s.h", "+d,+e,+h", 0x5a200033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1677 | | {"dpsub_s.w", "+d,+e,+h", 0x5a400033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1678 | | {"dpsub_s.d", "+d,+e,+h", 0x5a600033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1679 | | {"dpsub_u.h", "+d,+e,+h", 0x5aa00033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1680 | | {"dpsub_u.w", "+d,+e,+h", 0x5ac00033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1681 | | {"dpsub_u.d", "+d,+e,+h", 0x5ae00033, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1682 | | {"sld.b", "+d,+e+*", 0x5800000b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1683 | | {"sld.h", "+d,+e+*", 0x5820000b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1684 | | {"sld.w", "+d,+e+*", 0x5840000b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1685 | | {"sld.d", "+d,+e+*", 0x5860000b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1686 | | {"sldi.b", "+d,+e+o", 0x58000016, 0xfff0003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1687 | | {"sldi.h", "+d,+e+u", 0x58200016, 0xfff8003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1688 | | {"sldi.w", "+d,+e+v", 0x58300016, 0xfffc003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1689 | | {"sldi.d", "+d,+e+w", 0x58380016, 0xfffe003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1690 | | {"splat.b", "+d,+e+*", 0x5880000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1691 | | {"splat.h", "+d,+e+*", 0x58a0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1692 | | {"splat.w", "+d,+e+*", 0x58c0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1693 | | {"splat.d", "+d,+e+*", 0x58e0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1694 | | {"splati.b", "+d,+e+o", 0x58400016, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1695 | | {"splati.h", "+d,+e+u", 0x58600016, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1696 | | {"splati.w", "+d,+e+v", 0x58700016, 0xfffc003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1697 | | {"splati.d", "+d,+e+w", 0x58780016, 0xfffe003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1698 | | {"pckev.b", "+d,+e,+h", 0x5900000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1699 | | {"pckev.h", "+d,+e,+h", 0x5920000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1700 | | {"pckev.w", "+d,+e,+h", 0x5940000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1701 | | {"pckev.d", "+d,+e,+h", 0x5960000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1702 | | {"pckod.b", "+d,+e,+h", 0x5980000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1703 | | {"pckod.h", "+d,+e,+h", 0x59a0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1704 | | {"pckod.w", "+d,+e,+h", 0x59c0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1705 | | {"pckod.d", "+d,+e,+h", 0x59e0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1706 | | {"ilvl.b", "+d,+e,+h", 0x5a00000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1707 | | {"ilvl.h", "+d,+e,+h", 0x5a20000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1708 | | {"ilvl.w", "+d,+e,+h", 0x5a40000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1709 | | {"ilvl.d", "+d,+e,+h", 0x5a60000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1710 | | {"ilvr.b", "+d,+e,+h", 0x5a80000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1711 | | {"ilvr.h", "+d,+e,+h", 0x5aa0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1712 | | {"ilvr.w", "+d,+e,+h", 0x5ac0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1713 | | {"ilvr.d", "+d,+e,+h", 0x5ae0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1714 | | {"ilvev.b", "+d,+e,+h", 0x5b00000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1715 | | {"ilvev.h", "+d,+e,+h", 0x5b20000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1716 | | {"ilvev.w", "+d,+e,+h", 0x5b40000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1717 | | {"ilvev.d", "+d,+e,+h", 0x5b60000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1718 | | {"ilvod.b", "+d,+e,+h", 0x5b80000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1719 | | {"ilvod.h", "+d,+e,+h", 0x5ba0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1720 | | {"ilvod.w", "+d,+e,+h", 0x5bc0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1721 | | {"ilvod.d", "+d,+e,+h", 0x5be0000b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1722 | | {"vshf.b", "+d,+e,+h", 0x5800001b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1723 | | {"vshf.h", "+d,+e,+h", 0x5820001b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1724 | | {"vshf.w", "+d,+e,+h", 0x5840001b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1725 | | {"vshf.d", "+d,+e,+h", 0x5860001b, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1726 | | {"srar.b", "+d,+e,+h", 0x5880001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1727 | | {"srar.h", "+d,+e,+h", 0x58a0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1728 | | {"srar.w", "+d,+e,+h", 0x58c0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1729 | | {"srar.d", "+d,+e,+h", 0x58e0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1730 | | {"srari.b", "+d,+e,+!", 0x59700022, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1731 | | {"srari.h", "+d,+e,+@", 0x59600022, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1732 | | {"srari.w", "+d,+e,+x", 0x59400022, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1733 | | {"srari.d", "+d,+e,+#", 0x59000022, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1734 | | {"srlr.b", "+d,+e,+h", 0x5900001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1735 | | {"srlr.h", "+d,+e,+h", 0x5920001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1736 | | {"srlr.w", "+d,+e,+h", 0x5940001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1737 | | {"srlr.d", "+d,+e,+h", 0x5960001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1738 | | {"srlri.b", "+d,+e,+!", 0x59f00022, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1739 | | {"srlri.h", "+d,+e,+@", 0x59e00022, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1740 | | {"srlri.w", "+d,+e,+x", 0x59c00022, 0xffe0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1741 | | {"srlri.d", "+d,+e,+#", 0x59800022, 0xffc0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1742 | | {"hadd_s.h", "+d,+e,+h", 0x5a20001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1743 | | {"hadd_s.w", "+d,+e,+h", 0x5a40001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1744 | | {"hadd_s.d", "+d,+e,+h", 0x5a60001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1745 | | {"hadd_u.h", "+d,+e,+h", 0x5aa0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1746 | | {"hadd_u.w", "+d,+e,+h", 0x5ac0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1747 | | {"hadd_u.d", "+d,+e,+h", 0x5ae0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1748 | | {"hsub_s.h", "+d,+e,+h", 0x5b20001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1749 | | {"hsub_s.w", "+d,+e,+h", 0x5b40001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1750 | | {"hsub_s.d", "+d,+e,+h", 0x5b60001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1751 | | {"hsub_u.h", "+d,+e,+h", 0x5ba0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1752 | | {"hsub_u.w", "+d,+e,+h", 0x5bc0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1753 | | {"hsub_u.d", "+d,+e,+h", 0x5be0001b, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1754 | | {"and.v", "+d,+e,+h", 0x5800002e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1755 | | {"andi.b", "+d,+e,+|", 0x58000001, 0xff00003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1756 | | {"or.v", "+d,+e,+h", 0x5820002e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1757 | | {"ori.b", "+d,+e,+|", 0x59000001, 0xff00003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1758 | | {"nor.v", "+d,+e,+h", 0x5840002e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1759 | | {"nori.b", "+d,+e,+|", 0x5a000001, 0xff00003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1760 | | {"xor.v", "+d,+e,+h", 0x5860002e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1761 | | {"xori.b", "+d,+e,+|", 0x5b000001, 0xff00003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1762 | | {"bmnz.v", "+d,+e,+h", 0x5880002e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1763 | | {"bmnzi.b", "+d,+e,+|", 0x58000011, 0xff00003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1764 | | {"bmz.v", "+d,+e,+h", 0x58a0002e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1765 | | {"bmzi.b", "+d,+e,+|", 0x59000011, 0xff00003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1766 | | {"bsel.v", "+d,+e,+h", 0x58c0002e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1767 | | {"bseli.b", "+d,+e,+|", 0x5a000011, 0xff00003f, MOD_1|RD_2, 0, 0, MSA, 0 }, |
1768 | | {"shf.b", "+d,+e,+|", 0x58000021, 0xff00003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1769 | | {"shf.h", "+d,+e,+|", 0x59000021, 0xff00003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1770 | | {"shf.w", "+d,+e,+|", 0x5a000021, 0xff00003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1771 | | {"bnz.v", "+h,p", 0x81e00000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1772 | | {"bz.v", "+h,p", 0x81600000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1773 | | {"fill.b", "+d,d", 0x5b00002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1774 | | {"fill.h", "+d,d", 0x5b01002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1775 | | {"fill.w", "+d,d", 0x5b02002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1776 | | {"fill.d", "+d,d", 0x5b03002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA64, 0 }, |
1777 | | {"pcnt.b", "+d,+e", 0x5b04002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1778 | | {"pcnt.h", "+d,+e", 0x5b05002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1779 | | {"pcnt.w", "+d,+e", 0x5b06002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1780 | | {"pcnt.d", "+d,+e", 0x5b07002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1781 | | {"nloc.b", "+d,+e", 0x5b08002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1782 | | {"nloc.h", "+d,+e", 0x5b09002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1783 | | {"nloc.w", "+d,+e", 0x5b0a002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1784 | | {"nloc.d", "+d,+e", 0x5b0b002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1785 | | {"nlzc.b", "+d,+e", 0x5b0c002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1786 | | {"nlzc.h", "+d,+e", 0x5b0d002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1787 | | {"nlzc.w", "+d,+e", 0x5b0e002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1788 | | {"nlzc.d", "+d,+e", 0x5b0f002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1789 | | {"copy_s.b", "+k,+e+o", 0x58800016, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1790 | | {"copy_s.h", "+k,+e+u", 0x58a00016, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1791 | | {"copy_s.w", "+k,+e+v", 0x58b00016, 0xfffc003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1792 | | {"copy_s.d", "+k,+e+w", 0x58b80016, 0xfffe003f, WR_1|RD_2, 0, 0, MSA64, 0 }, |
1793 | | {"copy_u.b", "+k,+e+o", 0x58c00016, 0xfff0003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1794 | | {"copy_u.h", "+k,+e+u", 0x58e00016, 0xfff8003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1795 | | {"copy_u.w", "+k,+e+v", 0x58f00016, 0xfffc003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1796 | | {"copy_u.d", "+k,+e+w", 0x58f80016, 0xfffe003f, WR_1|RD_2, 0, 0, MSA64, 0 }, |
1797 | | {"insert.b", "+d+o,d", 0x59000016, 0xfff0003f, MOD_1|RD_3, 0, 0, MSA, 0 }, |
1798 | | {"insert.h", "+d+u,d", 0x59200016, 0xfff8003f, MOD_1|RD_3, 0, 0, MSA, 0 }, |
1799 | | {"insert.w", "+d+v,d", 0x59300016, 0xfffc003f, MOD_1|RD_3, 0, 0, MSA, 0 }, |
1800 | | {"insert.d", "+d+w,d", 0x59380016, 0xfffe003f, MOD_1|RD_3, 0, 0, MSA64, 0 }, |
1801 | | {"insve.b", "+d+o,+e+&", 0x59400016, 0xfff0003f, MOD_1|RD_3, 0, 0, MSA, 0 }, |
1802 | | {"insve.h", "+d+u,+e+&", 0x59600016, 0xfff8003f, MOD_1|RD_3, 0, 0, MSA, 0 }, |
1803 | | {"insve.w", "+d+v,+e+&", 0x59700016, 0xfffc003f, MOD_1|RD_3, 0, 0, MSA, 0 }, |
1804 | | {"insve.d", "+d+w,+e+&", 0x59780016, 0xfffe003f, MOD_1|RD_3, 0, 0, MSA, 0 }, |
1805 | | {"bnz.b", "+h,p", 0x83800000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1806 | | {"bnz.h", "+h,p", 0x83a00000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1807 | | {"bnz.w", "+h,p", 0x83c00000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1808 | | {"bnz.d", "+h,p", 0x83e00000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1809 | | {"bz.b", "+h,p", 0x83000000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1810 | | {"bz.h", "+h,p", 0x83200000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1811 | | {"bz.w", "+h,p", 0x83400000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1812 | | {"bz.d", "+h,p", 0x83600000, 0xffe00000, RD_1|CBD, 0, 0, MSA, 0 }, |
1813 | | {"ldi.b", "+d,+^", 0x5b000039, 0xffe0003f, WR_1, 0, 0, MSA, 0 }, |
1814 | | {"ldi.h", "+d,+^", 0x5b200039, 0xffe0003f, WR_1, 0, 0, MSA, 0 }, |
1815 | | {"ldi.w", "+d,+^", 0x5b400039, 0xffe0003f, WR_1, 0, 0, MSA, 0 }, |
1816 | | {"ldi.d", "+d,+^", 0x5b600039, 0xffe0003f, WR_1, 0, 0, MSA, 0 }, |
1817 | | {"fcaf.w", "+d,+e,+h", 0x58000026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1818 | | {"fcaf.d", "+d,+e,+h", 0x58200026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1819 | | {"fcun.w", "+d,+e,+h", 0x58400026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1820 | | {"fcun.d", "+d,+e,+h", 0x58600026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1821 | | {"fceq.w", "+d,+e,+h", 0x58800026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1822 | | {"fceq.d", "+d,+e,+h", 0x58a00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1823 | | {"fcueq.w", "+d,+e,+h", 0x58c00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1824 | | {"fcueq.d", "+d,+e,+h", 0x58e00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1825 | | {"fclt.w", "+d,+e,+h", 0x59000026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1826 | | {"fclt.d", "+d,+e,+h", 0x59200026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1827 | | {"fcult.w", "+d,+e,+h", 0x59400026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1828 | | {"fcult.d", "+d,+e,+h", 0x59600026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1829 | | {"fcle.w", "+d,+e,+h", 0x59800026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1830 | | {"fcle.d", "+d,+e,+h", 0x59a00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1831 | | {"fcule.w", "+d,+e,+h", 0x59c00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1832 | | {"fcule.d", "+d,+e,+h", 0x59e00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1833 | | {"fsaf.w", "+d,+e,+h", 0x5a000026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1834 | | {"fsaf.d", "+d,+e,+h", 0x5a200026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1835 | | {"fsun.w", "+d,+e,+h", 0x5a400026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1836 | | {"fsun.d", "+d,+e,+h", 0x5a600026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1837 | | {"fseq.w", "+d,+e,+h", 0x5a800026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1838 | | {"fseq.d", "+d,+e,+h", 0x5aa00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1839 | | {"fsueq.w", "+d,+e,+h", 0x5ac00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1840 | | {"fsueq.d", "+d,+e,+h", 0x5ae00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1841 | | {"fslt.w", "+d,+e,+h", 0x5b000026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1842 | | {"fslt.d", "+d,+e,+h", 0x5b200026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1843 | | {"fsult.w", "+d,+e,+h", 0x5b400026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1844 | | {"fsult.d", "+d,+e,+h", 0x5b600026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1845 | | {"fsle.w", "+d,+e,+h", 0x5b800026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1846 | | {"fsle.d", "+d,+e,+h", 0x5ba00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1847 | | {"fsule.w", "+d,+e,+h", 0x5bc00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1848 | | {"fsule.d", "+d,+e,+h", 0x5be00026, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1849 | | {"fadd.w", "+d,+e,+h", 0x58000036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1850 | | {"fadd.d", "+d,+e,+h", 0x58200036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1851 | | {"fsub.w", "+d,+e,+h", 0x58400036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1852 | | {"fsub.d", "+d,+e,+h", 0x58600036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1853 | | {"fmul.w", "+d,+e,+h", 0x58800036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1854 | | {"fmul.d", "+d,+e,+h", 0x58a00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1855 | | {"fdiv.w", "+d,+e,+h", 0x58c00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1856 | | {"fdiv.d", "+d,+e,+h", 0x58e00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1857 | | {"fmadd.w", "+d,+e,+h", 0x59000036, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1858 | | {"fmadd.d", "+d,+e,+h", 0x59200036, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1859 | | {"fmsub.w", "+d,+e,+h", 0x59400036, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1860 | | {"fmsub.d", "+d,+e,+h", 0x59600036, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1861 | | {"fexp2.w", "+d,+e,+h", 0x59c00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1862 | | {"fexp2.d", "+d,+e,+h", 0x59e00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1863 | | {"fexdo.h", "+d,+e,+h", 0x5a000036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1864 | | {"fexdo.w", "+d,+e,+h", 0x5a200036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1865 | | {"ftq.h", "+d,+e,+h", 0x5a800036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1866 | | {"ftq.w", "+d,+e,+h", 0x5aa00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1867 | | {"fmin.w", "+d,+e,+h", 0x5b000036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1868 | | {"fmin.d", "+d,+e,+h", 0x5b200036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1869 | | {"fmin_a.w", "+d,+e,+h", 0x5b400036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1870 | | {"fmin_a.d", "+d,+e,+h", 0x5b600036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1871 | | {"fmax.w", "+d,+e,+h", 0x5b800036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1872 | | {"fmax.d", "+d,+e,+h", 0x5ba00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1873 | | {"fmax_a.w", "+d,+e,+h", 0x5bc00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1874 | | {"fmax_a.d", "+d,+e,+h", 0x5be00036, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1875 | | {"fcor.w", "+d,+e,+h", 0x5840000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1876 | | {"fcor.d", "+d,+e,+h", 0x5860000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1877 | | {"fcune.w", "+d,+e,+h", 0x5880000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1878 | | {"fcune.d", "+d,+e,+h", 0x58a0000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1879 | | {"fcne.w", "+d,+e,+h", 0x58c0000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1880 | | {"fcne.d", "+d,+e,+h", 0x58e0000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1881 | | {"mul_q.h", "+d,+e,+h", 0x5900000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1882 | | {"mul_q.w", "+d,+e,+h", 0x5920000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1883 | | {"madd_q.h", "+d,+e,+h", 0x5940000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1884 | | {"madd_q.w", "+d,+e,+h", 0x5960000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1885 | | {"msub_q.h", "+d,+e,+h", 0x5980000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1886 | | {"msub_q.w", "+d,+e,+h", 0x59a0000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1887 | | {"fsor.w", "+d,+e,+h", 0x5a40000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1888 | | {"fsor.d", "+d,+e,+h", 0x5a60000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1889 | | {"fsune.w", "+d,+e,+h", 0x5a80000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1890 | | {"fsune.d", "+d,+e,+h", 0x5aa0000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1891 | | {"fsne.w", "+d,+e,+h", 0x5ac0000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1892 | | {"fsne.d", "+d,+e,+h", 0x5ae0000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1893 | | {"mulr_q.h", "+d,+e,+h", 0x5b00000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1894 | | {"mulr_q.w", "+d,+e,+h", 0x5b20000e, 0xffe0003f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1895 | | {"maddr_q.h", "+d,+e,+h", 0x5b40000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1896 | | {"maddr_q.w", "+d,+e,+h", 0x5b60000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1897 | | {"msubr_q.h", "+d,+e,+h", 0x5b80000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1898 | | {"msubr_q.w", "+d,+e,+h", 0x5ba0000e, 0xffe0003f, MOD_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1899 | | {"fclass.w", "+d,+e", 0x5b20002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1900 | | {"fclass.d", "+d,+e", 0x5b21002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1901 | | {"ftrunc_s.w", "+d,+e", 0x5b22002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1902 | | {"ftrunc_s.d", "+d,+e", 0x5b23002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1903 | | {"ftrunc_u.w", "+d,+e", 0x5b24002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1904 | | {"ftrunc_u.d", "+d,+e", 0x5b25002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1905 | | {"fsqrt.w", "+d,+e", 0x5b26002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1906 | | {"fsqrt.d", "+d,+e", 0x5b27002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1907 | | {"frsqrt.w", "+d,+e", 0x5b28002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1908 | | {"frsqrt.d", "+d,+e", 0x5b29002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1909 | | {"frcp.w", "+d,+e", 0x5b2a002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1910 | | {"frcp.d", "+d,+e", 0x5b2b002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1911 | | {"frint.w", "+d,+e", 0x5b2c002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1912 | | {"frint.d", "+d,+e", 0x5b2d002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1913 | | {"flog2.w", "+d,+e", 0x5b2e002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1914 | | {"flog2.d", "+d,+e", 0x5b2f002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1915 | | {"fexupl.w", "+d,+e", 0x5b30002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1916 | | {"fexupl.d", "+d,+e", 0x5b31002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1917 | | {"fexupr.w", "+d,+e", 0x5b32002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1918 | | {"fexupr.d", "+d,+e", 0x5b33002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1919 | | {"ffql.w", "+d,+e", 0x5b34002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1920 | | {"ffql.d", "+d,+e", 0x5b35002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1921 | | {"ffqr.w", "+d,+e", 0x5b36002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1922 | | {"ffqr.d", "+d,+e", 0x5b37002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1923 | | {"ftint_s.w", "+d,+e", 0x5b38002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1924 | | {"ftint_s.d", "+d,+e", 0x5b39002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1925 | | {"ftint_u.w", "+d,+e", 0x5b3a002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1926 | | {"ftint_u.d", "+d,+e", 0x5b3b002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1927 | | {"ffint_s.w", "+d,+e", 0x5b3c002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1928 | | {"ffint_s.d", "+d,+e", 0x5b3d002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1929 | | {"ffint_u.w", "+d,+e", 0x5b3e002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1930 | | {"ffint_u.d", "+d,+e", 0x5b3f002e, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1931 | | {"ctcmsa", "+l,d", 0x583e0016, 0xffff003f, RD_2, 0, 0, MSA, 0 }, |
1932 | | {"cfcmsa", "+k,+n", 0x587e0016, 0xffff003f, WR_1, 0, 0, MSA, 0 }, |
1933 | | {"move.v", "+d,+e", 0x58be0016, 0xffff003f, WR_1|RD_2, 0, 0, MSA, 0 }, |
1934 | | {"lsa", "d,v,t,+~", 0x00000020, 0xfc00073f, WR_1|RD_2|RD_3, 0, 0, MSA, 0 }, |
1935 | | {"dlsa", "d,v,t,+~", 0x58000020, 0xfc00073f, WR_1|RD_2|RD_3, 0, 0, MSA64, 0 }, |
1936 | | }; |
1937 | | |
1938 | | const int bfd_micromips_num_opcodes = |
1939 | | ((sizeof micromips_opcodes) / (sizeof (micromips_opcodes[0]))); |