Coverage Report

Created: 2025-07-08 11:15

/src/binutils-gdb/opcodes/s12z-opc.c
Line
Count
Source (jump to first uncovered line)
1
/* s12z-decode.c -- Freescale S12Z disassembly
2
   Copyright (C) 2018-2025 Free Software Foundation, Inc.
3
4
   This file is part of the GNU opcodes library.
5
6
   This library is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3, or (at your option)
9
   any later version.
10
11
   It is distributed in the hope that it will be useful, but WITHOUT
12
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14
   License for more details.
15
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19
   MA 02110-1301, USA.  */
20
21
#include "sysdep.h"
22
#include <stdio.h>
23
#include <stdint.h>
24
#include <stdbool.h>
25
#include <assert.h>
26
27
#include "opcode/s12z.h"
28
29
#include "bfd.h"
30
31
#include "s12z-opc.h"
32
33
34
typedef int (*insn_bytes_f) (struct mem_read_abstraction_base *);
35
36
typedef int (*operands_f) (struct mem_read_abstraction_base *,
37
         int *n_operands, struct operand **operand);
38
39
typedef enum optr (*discriminator_f) (struct mem_read_abstraction_base *,
40
              enum optr hint);
41
42
enum OPR_MODE
43
  {
44
    OPR_IMMe4,
45
    OPR_REG,
46
    OPR_OFXYS,
47
    OPR_XY_PRE_INC,
48
    OPR_XY_POST_INC,
49
    OPR_XY_PRE_DEC,
50
    OPR_XY_POST_DEC,
51
    OPR_S_PRE_DEC,
52
    OPR_S_POST_INC,
53
    OPR_REG_DIRECT,
54
    OPR_REG_INDIRECT,
55
    OPR_IDX_DIRECT,
56
    OPR_IDX_INDIRECT,
57
    OPR_EXT1,
58
    OPR_IDX2_REG,
59
    OPR_IDX3_DIRECT,
60
    OPR_IDX3_INDIRECT,
61
62
    OPR_EXT18,
63
    OPR_IDX3_DIRECT_REG,
64
    OPR_EXT3_DIRECT,
65
    OPR_EXT3_INDIRECT
66
  };
67
68
struct opr_pb
69
{
70
  uint8_t mask;
71
  uint8_t value;
72
  int n_operands;
73
  enum OPR_MODE mode;
74
};
75
76
static const  struct opr_pb opr_pb[] = {
77
  {0xF0, 0x70, 1, OPR_IMMe4},
78
  {0xF8, 0xB8, 1, OPR_REG},
79
  {0xC0, 0x40, 1, OPR_OFXYS},
80
  {0xEF, 0xE3, 1, OPR_XY_PRE_INC},
81
  {0xEF, 0xE7, 1, OPR_XY_POST_INC},
82
  {0xEF, 0xC3, 1, OPR_XY_PRE_DEC},
83
  {0xEF, 0xC7, 1, OPR_XY_POST_DEC},
84
  {0xFF, 0xFB, 1, OPR_S_PRE_DEC},
85
  {0xFF, 0xFF, 1, OPR_S_POST_INC},
86
  {0xC8, 0x88, 1, OPR_REG_DIRECT},
87
  {0xE8, 0xC8, 1, OPR_REG_INDIRECT},
88
89
  {0xCE, 0xC0, 2, OPR_IDX_DIRECT},
90
  {0xCE, 0xC4, 2, OPR_IDX_INDIRECT},
91
  {0xC0, 0x00, 2, OPR_EXT1},
92
93
  {0xC8, 0x80, 3, OPR_IDX2_REG},
94
  {0xFA, 0xF8, 3, OPR_EXT18},
95
96
  {0xCF, 0xC2, 4, OPR_IDX3_DIRECT},
97
  {0xCF, 0xC6, 4, OPR_IDX3_INDIRECT},
98
99
  {0xF8, 0xE8, 4, OPR_IDX3_DIRECT_REG},
100
  {0xFF, 0xFA, 4, OPR_EXT3_DIRECT},
101
  {0xFF, 0xFE, 4, OPR_EXT3_INDIRECT},
102
};
103
104
/* Return the number of bytes in a OPR operand, including the XB postbyte.
105
   It does not include any preceeding opcodes. */
106
static int
107
x_opr_n_bytes (struct mem_read_abstraction_base *mra, int offset)
108
86.0k
{
109
86.0k
  bfd_byte xb;
110
86.0k
  int status = mra->read (mra, offset, 1, &xb);
111
86.0k
  if (status < 0)
112
16
    return status;
113
114
86.0k
  size_t i;
115
907k
  for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i)
116
907k
    {
117
907k
      const struct opr_pb *pb = opr_pb + i;
118
907k
      if ((xb & pb->mask) == pb->value)
119
86.0k
  {
120
86.0k
    return pb->n_operands;
121
86.0k
  }
122
907k
    }
123
124
0
  return 1;
125
86.0k
}
126
127
static int
128
opr_n_bytes_p1 (struct mem_read_abstraction_base *mra)
129
57.4k
{
130
57.4k
  int n = x_opr_n_bytes (mra, 0);
131
57.4k
  if (n < 0)
132
0
    return n;
133
57.4k
  return 1 + n;
134
57.4k
}
135
136
static int
137
opr_n_bytes2 (struct mem_read_abstraction_base *mra)
138
1.55k
{
139
1.55k
  int s = x_opr_n_bytes (mra, 0);
140
1.55k
  if (s < 0)
141
0
    return s;
142
1.55k
  int n = x_opr_n_bytes (mra, s);
143
1.55k
  if (n < 0)
144
0
    return n;
145
1.55k
  return s + n + 1;
146
1.55k
}
147
148
enum BB_MODE
149
  {
150
    BB_REG_REG_REG,
151
    BB_REG_REG_IMM,
152
    BB_REG_OPR_REG,
153
    BB_OPR_REG_REG,
154
    BB_REG_OPR_IMM,
155
    BB_OPR_REG_IMM
156
  };
157
158
struct opr_bb
159
{
160
  uint8_t mask;
161
  uint8_t value;
162
  int n_operands;
163
  bool opr;
164
  enum BB_MODE mode;
165
};
166
167
static const struct opr_bb bb_modes[] =
168
  {
169
    {0x60, 0x00, 2, false, BB_REG_REG_REG},
170
    {0x60, 0x20, 3, false, BB_REG_REG_IMM},
171
    {0x70, 0x40, 2, true,  BB_REG_OPR_REG},
172
    {0x70, 0x50, 2, true,  BB_OPR_REG_REG},
173
    {0x70, 0x60, 3, true,  BB_REG_OPR_IMM},
174
    {0x70, 0x70, 3, true,  BB_OPR_REG_IMM}
175
  };
176
177
static int
178
bfextins_n_bytes (struct mem_read_abstraction_base *mra)
179
1.33k
{
180
1.33k
  bfd_byte bb;
181
1.33k
  int status = mra->read (mra, 0, 1, &bb);
182
1.33k
  if (status < 0)
183
0
    return status;
184
185
1.33k
  size_t i;
186
1.33k
  const struct opr_bb *bbs = 0;
187
6.58k
  for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i)
188
6.58k
    {
189
6.58k
      bbs = bb_modes + i;
190
6.58k
      if ((bb & bbs->mask) == bbs->value)
191
1.33k
  {
192
1.33k
    break;
193
1.33k
  }
194
6.58k
    }
195
196
1.33k
  int n = bbs->n_operands;
197
1.33k
  if (bbs->opr)
198
1.26k
    {
199
1.26k
      int x = x_opr_n_bytes (mra, n - 1);
200
1.26k
      if (x < 0)
201
0
  return x;
202
1.26k
      n += x;
203
1.26k
    }
204
205
1.33k
  return n;
206
1.33k
}
207
208
static int
209
single (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
210
144k
{
211
144k
  return 1;
212
144k
}
213
214
static int
215
two (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
216
12.5k
{
217
12.5k
  return 2;
218
12.5k
}
219
220
static int
221
three (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
222
15.9k
{
223
15.9k
  return 3;
224
15.9k
}
225
226
static int
227
four (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
228
7.93k
{
229
7.93k
  return 4;
230
7.93k
}
231
232
static int
233
five (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
234
6.49k
{
235
6.49k
  return 5;
236
6.49k
}
237
238
static int
239
pcrel_15bit (struct mem_read_abstraction_base *mra)
240
11.9k
{
241
11.9k
  bfd_byte byte;
242
11.9k
  int status = mra->read (mra, 0, 1, &byte);
243
11.9k
  if (status < 0)
244
0
    return status;
245
11.9k
  return (byte & 0x80) ? 3 : 2;
246
11.9k
}
247
248
249

250
static int
251
xysp_reg_from_postbyte (uint8_t postbyte)
252
26.1k
{
253
26.1k
  int reg = -1;
254
26.1k
  switch ((postbyte & 0x30) >> 4)
255
26.1k
    {
256
10.1k
    case 0:
257
10.1k
      reg = REG_X;
258
10.1k
      break;
259
2.81k
    case 1:
260
2.81k
      reg = REG_Y;
261
2.81k
      break;
262
10.0k
    case 2:
263
10.0k
      reg = REG_S;
264
10.0k
      break;
265
3.06k
    default:
266
3.06k
      reg = REG_P;
267
26.1k
    }
268
26.1k
  return reg;
269
26.1k
}
270
271
static struct operand *
272
create_immediate_operand (int value)
273
53.9k
{
274
53.9k
  struct immediate_operand *op = malloc (sizeof (*op));
275
276
53.9k
  if (op != NULL)
277
53.9k
    {
278
53.9k
      op->parent.cl = OPND_CL_IMMEDIATE;
279
53.9k
      op->parent.osize = -1;
280
53.9k
      op->value = value;
281
53.9k
    }
282
53.9k
  return (struct operand *) op;
283
53.9k
}
284
285
static struct operand *
286
create_bitfield_operand (int width, int offset)
287
1.16k
{
288
1.16k
  struct bitfield_operand *op = malloc (sizeof (*op));
289
290
1.16k
  if (op != NULL)
291
1.16k
    {
292
1.16k
      op->parent.cl = OPND_CL_BIT_FIELD;
293
1.16k
      op->parent.osize = -1;
294
1.16k
      op->width = width;
295
1.16k
      op->offset = offset;
296
1.16k
    }
297
1.16k
  return (struct operand *) op;
298
1.16k
}
299
300
static struct operand *
301
create_register_operand_with_size (int reg, short osize)
302
175k
{
303
175k
  struct register_operand *op = malloc (sizeof (*op));
304
305
175k
  if (op != NULL)
306
175k
    {
307
175k
      op->parent.cl = OPND_CL_REGISTER;
308
175k
      op->parent.osize = osize;
309
175k
      op->reg = reg;
310
175k
    }
311
175k
  return (struct operand *) op;
312
175k
}
313
314
static struct operand *
315
create_register_operand (int reg)
316
167k
{
317
167k
  return create_register_operand_with_size (reg, -1);
318
167k
}
319
320
static struct operand *
321
create_register_all_operand (void)
322
512
{
323
512
  struct register_operand *op = malloc (sizeof (*op));
324
325
512
  if (op != NULL)
326
512
    {
327
512
      op->parent.cl = OPND_CL_REGISTER_ALL;
328
512
      op->parent.osize = -1;
329
512
    }
330
512
  return (struct operand *) op;
331
512
}
332
333
static struct operand *
334
create_register_all16_operand (void)
335
1.38k
{
336
1.38k
  struct register_operand *op = malloc (sizeof (*op));
337
338
1.38k
  if (op != NULL)
339
1.38k
    {
340
1.38k
      op->parent.cl = OPND_CL_REGISTER_ALL16;
341
1.38k
      op->parent.osize = -1;
342
1.38k
    }
343
1.38k
  return (struct operand *) op;
344
1.38k
}
345
346
347
static struct operand *
348
create_simple_memory_operand (bfd_vma addr, bfd_vma base, bool relative)
349
57.4k
{
350
57.4k
  struct simple_memory_operand *op;
351
352
57.4k
  assert (relative || base == 0);
353
57.4k
  op = malloc (sizeof (*op));
354
57.4k
  if (op != NULL)
355
57.4k
    {
356
57.4k
      op->parent.cl = OPND_CL_SIMPLE_MEMORY;
357
57.4k
      op->parent.osize = -1;
358
57.4k
      op->addr = addr;
359
57.4k
      op->base = base;
360
57.4k
      op->relative = relative;
361
57.4k
    }
362
57.4k
  return (struct operand *) op;
363
57.4k
}
364
365
static struct operand *
366
create_memory_operand (bool indirect, int base, int n_regs, int reg0, int reg1)
367
41.1k
{
368
41.1k
  struct memory_operand *op = malloc (sizeof (*op));
369
370
41.1k
  if (op != NULL)
371
41.1k
    {
372
41.1k
      op->parent.cl = OPND_CL_MEMORY;
373
41.1k
      op->parent.osize = -1;
374
41.1k
      op->indirect = indirect;
375
41.1k
      op->base_offset = base;
376
41.1k
      op->mutation = OPND_RM_NONE;
377
41.1k
      op->n_regs = n_regs;
378
41.1k
      op->regs[0] = reg0;
379
41.1k
      op->regs[1] = reg1;
380
41.1k
    }
381
41.1k
  return (struct operand *) op;
382
41.1k
}
383
384
static struct operand *
385
create_memory_auto_operand (enum op_reg_mutation mutation, int reg)
386
8.89k
{
387
8.89k
  struct memory_operand *op = malloc (sizeof (*op));
388
389
8.89k
  if (op != NULL)
390
8.89k
    {
391
8.89k
      op->parent.cl = OPND_CL_MEMORY;
392
8.89k
      op->parent.osize = -1;
393
8.89k
      op->indirect = false;
394
8.89k
      op->base_offset = 0;
395
8.89k
      op->mutation = mutation;
396
8.89k
      op->n_regs = 1;
397
8.89k
      op->regs[0] = reg;
398
8.89k
      op->regs[1] = -1;
399
8.89k
    }
400
8.89k
  return (struct operand *) op;
401
8.89k
}
402
403

404
405
static int
406
z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands,
407
    struct operand **operand)
408
6.80k
{
409
6.80k
  struct operand *op;
410
6.80k
  uint8_t buffer[3];
411
6.80k
  int status = mra->read (mra, 0, 3, buffer);
412
6.80k
  if (status < 0)
413
29
    return status;
414
415
6.77k
  int i;
416
6.77k
  uint32_t addr = 0;
417
27.0k
  for (i = 0; i < 3; ++i)
418
20.3k
    {
419
20.3k
      addr <<= 8;
420
20.3k
      addr |= buffer[i];
421
20.3k
    }
422
423
6.77k
  op = create_simple_memory_operand (addr, 0, false);
424
6.77k
  if (op == NULL)
425
0
    return -1;
426
6.77k
  operand[(*n_operands)++] = op;
427
6.77k
  return 0;
428
6.77k
}
429
430
431
static int
432
z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset,
433
           short size, uint32_t *result)
434
30.2k
{
435
30.2k
  assert (size >0);
436
30.2k
  assert (size <= 4);
437
30.2k
  bfd_byte buffer[4];
438
30.2k
  int status = mra->read (mra, offset, size, buffer);
439
30.2k
  if (status < 0)
440
135
    return status;
441
442
30.1k
  int i;
443
30.1k
  uint32_t value = 0;
444
102k
  for (i = 0; i < size; ++i)
445
72.8k
    value = (value << 8) | buffer[i];
446
447
30.1k
  if (buffer[0] & 0x80)
448
10.5k
    {
449
      /* Deal with negative values */
450
10.5k
      value -= 1u << (size * 4) << (size * 4);
451
10.5k
    }
452
30.1k
  *result = value;
453
30.1k
  return 0;
454
30.2k
}
455
456
static int
457
decode_signed_value (struct mem_read_abstraction_base *mra, short size,
458
         uint32_t *result)
459
29.2k
{
460
29.2k
  return z_decode_signed_value (mra, 0, size, result);
461
29.2k
}
462
463
static int
464
x_imm1 (struct mem_read_abstraction_base *mra,
465
  int offset,
466
  int *n_operands, struct operand **operand)
467
1.46k
{
468
1.46k
  struct operand *op;
469
1.46k
  bfd_byte byte;
470
1.46k
  int status = mra->read (mra, offset, 1, &byte);
471
1.46k
  if (status < 0)
472
1
    return status;
473
474
1.46k
  op = create_immediate_operand (byte);
475
1.46k
  if (op == NULL)
476
0
    return -1;
477
1.46k
  operand[(*n_operands)++] = op;
478
1.46k
  return 0;
479
1.46k
}
480
481
/* An eight bit immediate operand.  */
482
static int
483
imm1_decode (struct mem_read_abstraction_base *mra,
484
       int *n_operands, struct operand **operand)
485
1.18k
{
486
1.18k
  return x_imm1 (mra, 0, n_operands, operand);
487
1.18k
}
488
489
static int
490
trap_decode (struct mem_read_abstraction_base *mra,
491
       int *n_operands, struct operand **operand)
492
289
{
493
289
  return x_imm1 (mra, -1, n_operands, operand);
494
289
}
495
496
497
static struct operand *
498
x_opr_decode_with_size (struct mem_read_abstraction_base *mra, int offset,
499
      short osize)
500
84.7k
{
501
84.7k
  bfd_byte postbyte;
502
84.7k
  int status = mra->read (mra, offset, 1, &postbyte);
503
84.7k
  if (status < 0)
504
131
    return NULL;
505
84.6k
  offset++;
506
507
84.6k
  enum OPR_MODE mode = -1;
508
84.6k
  size_t i;
509
906k
  for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i)
510
906k
    {
511
906k
      const struct opr_pb *pb = opr_pb + i;
512
906k
      if ((postbyte & pb->mask) == pb->value)
513
84.6k
  {
514
84.6k
    mode = pb->mode;
515
84.6k
    break;
516
84.6k
  }
517
906k
    }
518
519
84.6k
  struct operand *operand = NULL;
520
84.6k
  switch (mode)
521
84.6k
    {
522
2.93k
    case OPR_IMMe4:
523
2.93k
      {
524
2.93k
  int n;
525
2.93k
  uint8_t x = (postbyte & 0x0F);
526
2.93k
  if (x == 0)
527
194
    n = -1;
528
2.74k
  else
529
2.74k
    n = x;
530
531
2.93k
  operand = create_immediate_operand (n);
532
2.93k
  break;
533
0
      }
534
2.94k
    case OPR_REG:
535
2.94k
      {
536
2.94k
  uint8_t x = (postbyte & 0x07);
537
2.94k
  operand = create_register_operand (x);
538
2.94k
  break;
539
0
      }
540
12.9k
    case OPR_OFXYS:
541
12.9k
      {
542
12.9k
  operand = create_memory_operand (false, postbyte & 0x0F, 1,
543
12.9k
           xysp_reg_from_postbyte (postbyte), -1);
544
12.9k
  break;
545
0
      }
546
4.02k
    case OPR_REG_DIRECT:
547
4.02k
      {
548
4.02k
  operand = create_memory_operand (false, 0, 2, postbyte & 0x07,
549
4.02k
           xysp_reg_from_postbyte (postbyte));
550
4.02k
  break;
551
0
      }
552
3.49k
    case OPR_REG_INDIRECT:
553
3.49k
      {
554
3.49k
  operand = create_memory_operand (true, 0, 2, postbyte & 0x07,
555
3.49k
           (postbyte & 0x10) ? REG_Y : REG_X);
556
3.49k
  break;
557
0
      }
558
559
3.68k
    case OPR_IDX_INDIRECT:
560
3.68k
      {
561
3.68k
  uint8_t x1;
562
3.68k
  status = mra->read (mra, offset, 1, &x1);
563
3.68k
  if (status < 0)
564
7
    return NULL;
565
3.68k
  int idx = x1;
566
567
3.68k
  if (postbyte & 0x01)
568
1.41k
    {
569
      /* Deal with negative values */
570
1.41k
      idx -= 0x1UL << 8;
571
1.41k
    }
572
573
3.68k
  operand = create_memory_operand (true, idx, 1,
574
3.68k
           xysp_reg_from_postbyte (postbyte), -1);
575
3.68k
  break;
576
3.68k
      }
577
578
1.24k
    case OPR_IDX3_DIRECT:
579
1.24k
      {
580
1.24k
  uint8_t x[3];
581
1.24k
  status = mra->read (mra, offset, 3, x);
582
1.24k
  if (status < 0)
583
24
    return NULL;
584
1.21k
  int idx = x[0] << 16 | x[1] << 8 | x[2];
585
586
1.21k
  if (x[0] & 0x80)
587
747
    {
588
      /* Deal with negative values */
589
747
      idx -= 0x1UL << 24;
590
747
    }
591
592
1.21k
  operand = create_memory_operand (false, idx, 1,
593
1.21k
           xysp_reg_from_postbyte (postbyte), -1);
594
1.21k
  break;
595
1.24k
      }
596
597
2.03k
    case OPR_IDX3_DIRECT_REG:
598
2.03k
      {
599
2.03k
  uint8_t x[3];
600
2.03k
  status = mra->read (mra, offset, 3, x);
601
2.03k
  if (status < 0)
602
35
    return NULL;
603
1.99k
  int idx = x[0] << 16 | x[1] << 8 | x[2];
604
605
1.99k
  if (x[0] & 0x80)
606
1.53k
    {
607
      /* Deal with negative values */
608
1.53k
      idx -= 0x1UL << 24;
609
1.53k
    }
610
611
1.99k
  operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
612
1.99k
  break;
613
2.03k
      }
614
615
1.24k
    case OPR_IDX3_INDIRECT:
616
1.24k
      {
617
1.24k
  uint8_t x[3];
618
1.24k
  status = mra->read (mra, offset, 3, x);
619
1.24k
  if (status < 0)
620
6
    return NULL;
621
1.23k
  int idx = x[0] << 16 | x[1] << 8 | x[2];
622
623
1.23k
  if (x[0] & 0x80)
624
807
    {
625
      /* Deal with negative values */
626
807
      idx -= 0x1UL << 24;
627
807
    }
628
629
1.23k
  operand = create_memory_operand (true, idx, 1,
630
1.23k
           xysp_reg_from_postbyte (postbyte), -1);
631
1.23k
  break;
632
1.24k
      }
633
634
3.06k
    case OPR_IDX_DIRECT:
635
3.06k
      {
636
3.06k
  uint8_t x1;
637
3.06k
  status = mra->read (mra, offset, 1, &x1);
638
3.06k
  if (status < 0)
639
5
    return NULL;
640
3.06k
  int idx = x1;
641
642
3.06k
  if (postbyte & 0x01)
643
1.62k
    {
644
      /* Deal with negative values */
645
1.62k
      idx -= 0x1UL << 8;
646
1.62k
    }
647
648
3.06k
  operand = create_memory_operand (false, idx, 1,
649
3.06k
           xysp_reg_from_postbyte (postbyte), -1);
650
3.06k
  break;
651
3.06k
      }
652
653
7.47k
    case OPR_IDX2_REG:
654
7.47k
      {
655
7.47k
  uint8_t x[2];
656
7.47k
  status = mra->read (mra, offset, 2, x);
657
7.47k
  if (status < 0)
658
21
    return NULL;
659
7.45k
  uint32_t idx = x[1] | x[0] << 8 ;
660
7.45k
  idx |= (postbyte & 0x30) << 12;
661
662
7.45k
  operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
663
7.45k
  break;
664
7.47k
      }
665
666
2.28k
    case OPR_XY_PRE_INC:
667
2.28k
      {
668
2.28k
  operand = create_memory_auto_operand (OPND_RM_PRE_INC,
669
2.28k
                (postbyte & 0x10) ? REG_Y: REG_X);
670
2.28k
  break;
671
7.47k
      }
672
1.18k
    case OPR_XY_POST_INC:
673
1.18k
      {
674
1.18k
  operand = create_memory_auto_operand (OPND_RM_POST_INC,
675
1.18k
                (postbyte & 0x10) ? REG_Y: REG_X);
676
1.18k
  break;
677
7.47k
      }
678
647
    case OPR_XY_PRE_DEC:
679
647
      {
680
647
  operand = create_memory_auto_operand (OPND_RM_PRE_DEC,
681
647
                (postbyte & 0x10) ? REG_Y: REG_X);
682
647
  break;
683
7.47k
      }
684
976
    case OPR_XY_POST_DEC:
685
976
      {
686
976
  operand = create_memory_auto_operand (OPND_RM_POST_DEC,
687
976
                (postbyte & 0x10) ? REG_Y: REG_X);
688
976
  break;
689
7.47k
      }
690
295
    case OPR_S_PRE_DEC:
691
295
      {
692
295
  operand = create_memory_auto_operand (OPND_RM_PRE_DEC, REG_S);
693
295
  break;
694
7.47k
      }
695
3.51k
    case OPR_S_POST_INC:
696
3.51k
      {
697
3.51k
  operand = create_memory_auto_operand (OPND_RM_POST_INC, REG_S);
698
3.51k
  break;
699
7.47k
      }
700
701
1.47k
    case OPR_EXT18:
702
1.47k
      {
703
1.47k
  const size_t size = 2;
704
1.47k
  bfd_byte buffer[4];
705
1.47k
  status = mra->read (mra, offset, size, buffer);
706
1.47k
  if (status < 0)
707
4
    return NULL;
708
709
1.47k
  uint32_t ext18 = 0;
710
4.42k
  for (i = 0; i < size; ++i)
711
2.95k
    {
712
2.95k
      ext18 <<= 8;
713
2.95k
      ext18 |= buffer[i];
714
2.95k
    }
715
716
1.47k
  ext18 |= (postbyte & 0x01) << 16;
717
1.47k
  ext18 |= (postbyte & 0x04) << 15;
718
719
1.47k
  operand = create_simple_memory_operand (ext18, 0, false);
720
1.47k
  break;
721
1.47k
      }
722
723
27.7k
    case OPR_EXT1:
724
27.7k
      {
725
27.7k
  uint8_t x1 = 0;
726
27.7k
  status = mra->read (mra, offset, 1, &x1);
727
27.7k
  if (status < 0)
728
69
    return NULL;
729
27.7k
  int16_t addr;
730
27.7k
  addr = x1;
731
27.7k
  addr |= (postbyte & 0x3f) << 8;
732
733
27.7k
  operand = create_simple_memory_operand (addr, 0, false);
734
27.7k
  break;
735
27.7k
      }
736
737
572
    case OPR_EXT3_DIRECT:
738
572
      {
739
572
  const size_t size = 3;
740
572
  bfd_byte buffer[4];
741
572
  status = mra->read (mra, offset, size, buffer);
742
572
  if (status < 0)
743
8
    return NULL;
744
745
564
  uint32_t ext24 = 0;
746
2.25k
  for (i = 0; i < size; ++i)
747
1.69k
    {
748
1.69k
      ext24 |= buffer[i] << (8 * (size - i - 1));
749
1.69k
    }
750
751
564
  operand = create_simple_memory_operand (ext24, 0, false);
752
564
  break;
753
572
      }
754
755
844
    case OPR_EXT3_INDIRECT:
756
844
      {
757
844
  const size_t size = 3;
758
844
  bfd_byte buffer[4];
759
844
  status = mra->read (mra, offset, size, buffer);
760
844
  if (status < 0)
761
12
    return NULL;
762
763
832
  uint32_t ext24 = 0;
764
3.32k
  for (i = 0; i < size; ++i)
765
2.49k
    {
766
2.49k
      ext24 |= buffer[i] << (8 * (size - i - 1));
767
2.49k
    }
768
769
832
  operand = create_memory_operand (true, ext24, 0, -1, -1);
770
832
  break;
771
844
      }
772
773
0
    default:
774
0
      printf ("Unknown OPR mode #0x%x (%d)", postbyte, mode);
775
0
      abort ();
776
84.6k
    }
777
778
84.4k
  if (operand != NULL)
779
84.4k
    operand->osize = osize;
780
781
84.4k
  return operand;
782
84.6k
}
783
784
static struct operand *
785
x_opr_decode (struct mem_read_abstraction_base *mra, int offset)
786
68.9k
{
787
68.9k
  return x_opr_decode_with_size (mra, offset, -1);
788
68.9k
}
789
790
static int
791
z_opr_decode (struct mem_read_abstraction_base *mra,
792
        int *n_operands, struct operand **operand)
793
55.3k
{
794
55.3k
  struct operand *op = x_opr_decode (mra, 0);
795
55.3k
  if (op == NULL)
796
152
    return -1;
797
55.1k
  operand[(*n_operands)++] = op;
798
55.1k
  return 0;
799
55.3k
}
800
801
static int
802
z_opr_decode2 (struct mem_read_abstraction_base *mra,
803
         int *n_operands, struct operand **operand)
804
1.60k
{
805
1.60k
  int n = x_opr_n_bytes (mra, 0);
806
1.60k
  if (n < 0)
807
14
    return n;
808
1.59k
  struct operand *op = x_opr_decode (mra, 0);
809
1.59k
  if (op == NULL)
810
13
    return -1;
811
1.58k
  operand[(*n_operands)++] = op;
812
1.58k
  op = x_opr_decode (mra, n);
813
1.58k
  if (op == NULL)
814
22
    return -1;
815
1.55k
  operand[(*n_operands)++] = op;
816
1.55k
  return 0;
817
1.58k
}
818
819
static int
820
imm1234 (struct mem_read_abstraction_base *mra, int base,
821
   int *n_operands, struct operand **operand)
822
25.7k
{
823
25.7k
  struct operand *op;
824
25.7k
  bfd_byte opcode;
825
25.7k
  int status = mra->read (mra, -1, 1, &opcode);
826
25.7k
  if (status < 0)
827
0
    return status;
828
829
25.7k
  opcode -= base;
830
831
25.7k
  int size = registers[opcode & 0xF].bytes;
832
833
25.7k
  uint32_t imm;
834
25.7k
  if (decode_signed_value (mra, size, &imm) < 0)
835
78
    return -1;
836
837
25.6k
  op = create_immediate_operand (imm);
838
25.6k
  if (op == NULL)
839
0
    return -1;
840
25.6k
  operand[(*n_operands)++] = op;
841
25.6k
  return 0;
842
25.6k
}
843
844
845
/* Special case of LD and CMP with register S and IMM operand */
846
static int
847
reg_s_imm (struct mem_read_abstraction_base *mra, int *n_operands,
848
     struct operand **operand)
849
373
{
850
373
  struct operand *op;
851
852
373
  op = create_register_operand (REG_S);
853
373
  if (op == NULL)
854
0
    return -1;
855
373
  operand[(*n_operands)++] = op;
856
857
373
  uint32_t imm;
858
373
  if (decode_signed_value (mra, 3, &imm) < 0)
859
6
    return -1;
860
367
  op = create_immediate_operand (imm);
861
367
  if (op == NULL)
862
0
    return -1;
863
367
  operand[(*n_operands)++] = op;
864
367
  return 0;
865
367
}
866
867
/* Special case of LD, CMP and ST with register S and OPR operand */
868
static int
869
reg_s_opr (struct mem_read_abstraction_base *mra, int *n_operands,
870
     struct operand **operand)
871
299
{
872
299
  struct operand *op;
873
874
299
  op = create_register_operand (REG_S);
875
299
  if (op == NULL)
876
0
    return -1;
877
299
  operand[(*n_operands)++] = op;
878
299
  op = x_opr_decode (mra, 0);
879
299
  if (op == NULL)
880
1
    return -1;
881
298
  operand[(*n_operands)++] = op;
882
298
  return 0;
883
299
}
884
885
static int
886
z_imm1234_8base (struct mem_read_abstraction_base *mra, int *n_operands,
887
     struct operand **operand)
888
7.33k
{
889
7.33k
  return imm1234 (mra, 8, n_operands, operand);
890
7.33k
}
891
892
static int
893
z_imm1234_0base (struct mem_read_abstraction_base *mra, int *n_operands,
894
     struct operand **operand)
895
18.3k
{
896
18.3k
  return imm1234 (mra, 0, n_operands, operand);
897
18.3k
}
898
899
900
static int
901
z_tfr (struct mem_read_abstraction_base *mra, int *n_operands,
902
       struct operand **operand)
903
307
{
904
307
  struct operand *op;
905
307
  bfd_byte byte;
906
307
  int status = mra->read (mra, 0, 1, &byte);
907
307
  if (status < 0)
908
1
    return status;
909
910
306
  op = create_register_operand (byte >> 4);
911
306
  if (op == NULL)
912
0
    return -1;
913
306
  operand[(*n_operands)++] = op;
914
306
  op = create_register_operand (byte & 0x0F);
915
306
  if (op == NULL)
916
0
    return -1;
917
306
  operand[(*n_operands)++] = op;
918
306
  return 0;
919
306
}
920
921
static int
922
z_reg (struct mem_read_abstraction_base *mra, int *n_operands,
923
       struct operand **operand)
924
97.1k
{
925
97.1k
  struct operand *op;
926
97.1k
  bfd_byte byte;
927
97.1k
  int status = mra->read (mra, -1, 1, &byte);
928
97.1k
  if (status < 0)
929
0
    return status;
930
931
97.1k
  op = create_register_operand (byte & 0x07);
932
97.1k
  if (op == NULL)
933
0
    return -1;
934
97.1k
  operand[(*n_operands)++] = op;
935
97.1k
  return 0;
936
97.1k
}
937
938
939
static int
940
reg_xy (struct mem_read_abstraction_base *mra,
941
  int *n_operands, struct operand **operand)
942
8.90k
{
943
8.90k
  struct operand *op;
944
8.90k
  bfd_byte byte;
945
8.90k
  int status = mra->read (mra, -1, 1, &byte);
946
8.90k
  if (status < 0)
947
0
    return status;
948
949
8.90k
  op = create_register_operand ((byte & 0x01) ? REG_Y : REG_X);
950
8.90k
  if (op == NULL)
951
0
    return -1;
952
8.90k
  operand[(*n_operands)++] = op;
953
8.90k
  return 0;
954
8.90k
}
955
956
static int
957
lea_reg_xys_opr (struct mem_read_abstraction_base *mra,
958
     int *n_operands, struct operand **operand)
959
1.99k
{
960
1.99k
  struct operand *op;
961
1.99k
  bfd_byte byte;
962
1.99k
  int status = mra->read (mra, -1, 1, &byte);
963
1.99k
  if (status < 0)
964
0
    return status;
965
966
1.99k
  int reg_xys = -1;
967
1.99k
  switch (byte & 0x03)
968
1.99k
    {
969
800
    case 0x00:
970
800
      reg_xys = REG_X;
971
800
      break;
972
651
    case 0x01:
973
651
      reg_xys = REG_Y;
974
651
      break;
975
547
    case 0x02:
976
547
      reg_xys = REG_S;
977
547
      break;
978
1.99k
    }
979
980
1.99k
  op = create_register_operand (reg_xys);
981
1.99k
  if (op == NULL)
982
0
    return -1;
983
1.99k
  operand[(*n_operands)++] = op;
984
1.99k
  op = x_opr_decode (mra, 0);
985
1.99k
  if (op == NULL)
986
15
    return -1;
987
1.98k
  operand[(*n_operands)++] = op;
988
1.98k
  return 0;
989
1.99k
}
990
991
static int
992
lea_reg_xys (struct mem_read_abstraction_base *mra,
993
       int *n_operands, struct operand **operand)
994
1.31k
{
995
1.31k
  struct operand *op;
996
1.31k
  bfd_byte byte;
997
1.31k
  int status = mra->read (mra, -1, 1, &byte);
998
1.31k
  if (status < 0)
999
0
    return status;
1000
1001
1.31k
  int reg_n = -1;
1002
1.31k
  switch (byte & 0x03)
1003
1.31k
    {
1004
462
    case 0x00:
1005
462
      reg_n = REG_X;
1006
462
      break;
1007
296
    case 0x01:
1008
296
      reg_n = REG_Y;
1009
296
      break;
1010
553
    case 0x02:
1011
553
      reg_n = REG_S;
1012
553
      break;
1013
1.31k
    }
1014
1015
1.31k
  status = mra->read (mra, 0, 1, &byte);
1016
1.31k
  if (status < 0)
1017
19
    return status;
1018
1019
1.29k
  op = create_register_operand (reg_n);
1020
1.29k
  if (op == NULL)
1021
0
    return -1;
1022
1.29k
  operand[(*n_operands)++] = op;
1023
1.29k
  op = create_memory_operand (false, (int8_t) byte, 1, reg_n, -1);
1024
1.29k
  if (op == NULL)
1025
0
    return -1;
1026
1.29k
  operand[(*n_operands)++] = op;
1027
1.29k
  return 0;
1028
1.29k
}
1029
1030
1031
/* PC Relative offsets of size 15 or 7 bits */
1032
static int
1033
rel_15_7 (struct mem_read_abstraction_base *mra, int offset,
1034
    int *n_operands, struct operand **operands)
1035
20.9k
{
1036
20.9k
  struct operand *op;
1037
20.9k
  bfd_byte upper;
1038
20.9k
  int status = mra->read (mra, offset - 1, 1, &upper);
1039
20.9k
  if (status < 0)
1040
19
    return status;
1041
1042
20.9k
  bool rel_size = (upper & 0x80);
1043
1044
20.9k
  int16_t addr = upper;
1045
20.9k
  if (rel_size)
1046
7.38k
    {
1047
      /* 15 bits.  Get the next byte */
1048
7.38k
      bfd_byte lower;
1049
7.38k
      status = mra->read (mra, offset, 1, &lower);
1050
7.38k
      if (status < 0)
1051
11
  return status;
1052
1053
7.37k
      addr <<= 8;
1054
7.37k
      addr |= lower;
1055
7.37k
      addr &= 0x7FFF;
1056
1057
7.37k
      bool negative = (addr & 0x4000);
1058
7.37k
      addr &= 0x3FFF;
1059
7.37k
      if (negative)
1060
5.56k
  addr = addr - 0x4000;
1061
7.37k
    }
1062
13.5k
  else
1063
13.5k
    {
1064
      /* 7 bits. */
1065
13.5k
      bool negative = (addr & 0x40);
1066
13.5k
      addr &= 0x3F;
1067
13.5k
      if (negative)
1068
3.87k
  addr = addr - 0x40;
1069
13.5k
    }
1070
1071
20.9k
  op = create_simple_memory_operand (addr, mra->posn (mra) - 1, true);
1072
20.9k
  if (op == NULL)
1073
0
    return -1;
1074
20.9k
  operands[(*n_operands)++] = op;
1075
20.9k
  return 0;
1076
20.9k
}
1077
1078
1079
/* PC Relative offsets of size 15 or 7 bits */
1080
static int
1081
decode_rel_15_7 (struct mem_read_abstraction_base *mra,
1082
     int *n_operands, struct operand **operand)
1083
11.9k
{
1084
11.9k
  return rel_15_7 (mra, 1, n_operands, operand);
1085
11.9k
}
1086
1087
static int shift_n_bytes (struct mem_read_abstraction_base *);
1088
static int mov_imm_opr_n_bytes (struct mem_read_abstraction_base *);
1089
static int loop_prim_n_bytes (struct mem_read_abstraction_base *);
1090
static int bm_rel_n_bytes (struct mem_read_abstraction_base *);
1091
static int mul_n_bytes (struct mem_read_abstraction_base *);
1092
static int bm_n_bytes (struct mem_read_abstraction_base *);
1093
1094
static int psh_pul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1095
static int shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1096
static int mul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1097
static int bm_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1098
static int bm_rel_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1099
static int mov_imm_opr (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1100
static int loop_primitive_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
1101
static int bit_field_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
1102
static int exg_sex_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
1103
1104
1105
static enum optr shift_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1106
static enum optr psh_pul_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1107
static enum optr mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1108
static enum optr loop_primitive_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1109
static enum optr bit_field_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1110
static enum optr exg_sex_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
1111
1112
1113
static int
1114
cmp_xy (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
1115
  int *n_operands, struct operand **operand)
1116
2.90k
{
1117
2.90k
  struct operand *op;
1118
1119
2.90k
  op = create_register_operand (REG_X);
1120
2.90k
  if (op == NULL)
1121
0
    return -1;
1122
2.90k
  operand[(*n_operands)++] = op;
1123
2.90k
  op = create_register_operand (REG_Y);
1124
2.90k
  if (op == NULL)
1125
0
    return -1;
1126
2.90k
  operand[(*n_operands)++] = op;
1127
2.90k
  return 0;
1128
2.90k
}
1129
1130
static int
1131
sub_d6_x_y (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
1132
      int *n_operands, struct operand **operand)
1133
2.36k
{
1134
2.36k
  struct operand *op;
1135
1136
2.36k
  op = create_register_operand (REG_D6);
1137
2.36k
  if (op == NULL)
1138
0
    return -1;
1139
2.36k
  operand[(*n_operands)++] = op;
1140
2.36k
  op = create_register_operand (REG_X);
1141
2.36k
  if (op == NULL)
1142
0
    return -1;
1143
2.36k
  operand[(*n_operands)++] = op;
1144
2.36k
  op = create_register_operand (REG_Y);
1145
2.36k
  if (op == NULL)
1146
0
    return -1;
1147
2.36k
  operand[(*n_operands)++] = op;
1148
2.36k
  return 0;
1149
2.36k
}
1150
1151
static int
1152
sub_d6_y_x (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
1153
      int *n_operands, struct operand **operand)
1154
1.41k
{
1155
1.41k
  struct operand *op;
1156
1157
1.41k
  op = create_register_operand (REG_D6);
1158
1.41k
  if (op == NULL)
1159
0
    return -1;
1160
1.41k
  operand[(*n_operands)++] = op;
1161
1.41k
  op = create_register_operand (REG_Y);
1162
1.41k
  if (op == NULL)
1163
0
    return -1;
1164
1.41k
  operand[(*n_operands)++] = op;
1165
1.41k
  op = create_register_operand (REG_X);
1166
1.41k
  if (op == NULL)
1167
0
    return -1;
1168
1.41k
  operand[(*n_operands)++] = op;
1169
1.41k
  return 0;
1170
1.41k
}
1171
1172
static int
1173
ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands,
1174
     struct operand **operand);
1175
1176
static enum optr
1177
mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint)
1178
4.67k
{
1179
4.67k
  uint8_t mb;
1180
4.67k
  int status = mra->read (mra, 0, 1, &mb);
1181
4.67k
  if (status < 0)
1182
12
    return OP_INVALID;
1183
1184
4.66k
  bool signed_op = (mb & 0x80);
1185
1186
4.66k
  switch (hint)
1187
4.66k
    {
1188
3.81k
    case OPBASE_mul:
1189
3.81k
      return signed_op ? OP_muls : OP_mulu;
1190
0
      break;
1191
99
    case OPBASE_div:
1192
99
      return signed_op ? OP_divs : OP_divu;
1193
0
      break;
1194
207
    case OPBASE_mod:
1195
207
      return signed_op ? OP_mods : OP_modu;
1196
0
      break;
1197
353
    case OPBASE_mac:
1198
353
      return signed_op ? OP_macs : OP_macu;
1199
0
      break;
1200
188
    case OPBASE_qmul:
1201
188
      return signed_op ? OP_qmuls : OP_qmulu;
1202
0
      break;
1203
0
    default:
1204
0
      abort ();
1205
4.66k
    }
1206
1207
0
  return OP_INVALID;
1208
4.66k
}
1209
1210
struct opcode
1211
{
1212
  /* The operation that this opcode performs.  */
1213
  enum optr operator;
1214
1215
  /* The size of this operation.  May be -1 if it is implied
1216
     in the operands or if size is not applicable.  */
1217
  short osize;
1218
1219
  /* Some operations need this function to work out which operation
1220
   is intended.  */
1221
  discriminator_f discriminator;
1222
1223
  /* A function returning the number of bytes in this instruction.  */
1224
  insn_bytes_f insn_bytes;
1225
1226
  operands_f operands;
1227
  operands_f operands2;
1228
};
1229
1230
static const struct opcode page2[] =
1231
  {
1232
    [0x00] = {OP_ld, -1, 0,  opr_n_bytes_p1, reg_s_opr, 0},
1233
    [0x01] = {OP_st, -1, 0,  opr_n_bytes_p1, reg_s_opr, 0},
1234
    [0x02] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_s_opr, 0},
1235
    [0x03] = {OP_ld, -1, 0,  four, reg_s_imm, 0},
1236
    [0x04] = {OP_cmp, -1, 0, four, reg_s_imm, 0},
1237
    [0x05] = {OP_stop, -1, 0, single, 0, 0},
1238
    [0x06] = {OP_wai, -1, 0,  single, 0, 0},
1239
    [0x07] = {OP_sys, -1, 0,  single, 0, 0},
1240
    [0x08] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},  /* BFEXT / BFINS */
1241
    [0x09] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1242
    [0x0a] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1243
    [0x0b] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1244
    [0x0c] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1245
    [0x0d] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1246
    [0x0e] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1247
    [0x0f] = {0xFFFF, -1, bit_field_discrim,  bfextins_n_bytes, bit_field_decode, 0},
1248
    [0x10] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1249
    [0x11] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1250
    [0x12] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1251
    [0x13] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1252
    [0x14] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1253
    [0x15] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1254
    [0x16] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1255
    [0x17] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1256
    [0x18] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1257
    [0x19] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1258
    [0x1a] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1259
    [0x1b] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1260
    [0x1c] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1261
    [0x1d] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1262
    [0x1e] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1263
    [0x1f] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1264
    [0x20] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1265
    [0x21] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1266
    [0x22] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1267
    [0x23] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1268
    [0x24] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1269
    [0x25] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1270
    [0x26] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1271
    [0x27] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1272
    [0x28] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1273
    [0x29] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1274
    [0x2a] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1275
    [0x2b] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1276
    [0x2c] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1277
    [0x2d] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1278
    [0x2e] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1279
    [0x2f] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1280
    [0x30] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1281
    [0x31] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1282
    [0x32] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1283
    [0x33] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1284
    [0x34] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1285
    [0x35] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1286
    [0x36] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1287
    [0x37] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1288
    [0x38] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1289
    [0x39] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1290
    [0x3a] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1291
    [0x3b] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1292
    [0x3c] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1293
    [0x3d] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1294
    [0x3e] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1295
    [0x3f] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1296
    [0x40] = {OP_abs, -1, 0, single, z_reg, 0},
1297
    [0x41] = {OP_abs, -1, 0, single, z_reg, 0},
1298
    [0x42] = {OP_abs, -1, 0, single, z_reg, 0},
1299
    [0x43] = {OP_abs, -1, 0, single, z_reg, 0},
1300
    [0x44] = {OP_abs, -1, 0, single, z_reg, 0},
1301
    [0x45] = {OP_abs, -1, 0, single, z_reg, 0},
1302
    [0x46] = {OP_abs, -1, 0, single, z_reg, 0},
1303
    [0x47] = {OP_abs, -1, 0, single, z_reg, 0},
1304
    [0x48] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1305
    [0x49] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1306
    [0x4a] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1307
    [0x4b] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1308
    [0x4c] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1309
    [0x4d] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1310
    [0x4e] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1311
    [0x4f] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1312
    [0x50] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1313
    [0x51] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1314
    [0x52] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1315
    [0x53] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1316
    [0x54] = {OP_adc, -1, 0, two,   z_reg, z_imm1234_0base},
1317
    [0x55] = {OP_adc, -1, 0, two,   z_reg, z_imm1234_0base},
1318
    [0x56] = {OP_adc, -1, 0, five,  z_reg, z_imm1234_0base},
1319
    [0x57] = {OP_adc, -1, 0, five,  z_reg, z_imm1234_0base},
1320
    [0x58] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1321
    [0x59] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1322
    [0x5a] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1323
    [0x5b] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1324
    [0x5c] = {OP_bit, -1, 0, two,   z_reg, z_imm1234_8base},
1325
    [0x5d] = {OP_bit, -1, 0, two,   z_reg, z_imm1234_8base},
1326
    [0x5e] = {OP_bit, -1, 0, five,  z_reg, z_imm1234_8base},
1327
    [0x5f] = {OP_bit, -1, 0, five,  z_reg, z_imm1234_8base},
1328
    [0x60] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1329
    [0x61] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1330
    [0x62] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1331
    [0x63] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1332
    [0x64] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1333
    [0x65] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1334
    [0x66] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1335
    [0x67] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1336
    [0x68] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1337
    [0x69] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1338
    [0x6a] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1339
    [0x6b] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1340
    [0x6c] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1341
    [0x6d] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1342
    [0x6e] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1343
    [0x6f] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1344
    [0x70] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1345
    [0x71] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1346
    [0x72] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1347
    [0x73] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1348
    [0x74] = {OP_sbc, -1, 0, two,   z_reg, z_imm1234_0base},
1349
    [0x75] = {OP_sbc, -1, 0, two,   z_reg, z_imm1234_0base},
1350
    [0x76] = {OP_sbc, -1, 0, five,  z_reg, z_imm1234_0base},
1351
    [0x77] = {OP_sbc, -1, 0, five,  z_reg, z_imm1234_0base},
1352
    [0x78] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1353
    [0x79] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1354
    [0x7a] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1355
    [0x7b] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1356
    [0x7c] = {OP_eor, -1, 0, two,   z_reg, z_imm1234_8base},
1357
    [0x7d] = {OP_eor, -1, 0, two,   z_reg, z_imm1234_8base},
1358
    [0x7e] = {OP_eor, -1, 0, five,  z_reg, z_imm1234_8base},
1359
    [0x7f] = {OP_eor, -1, 0, five,  z_reg, z_imm1234_8base},
1360
    [0x80] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1361
    [0x81] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1362
    [0x82] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1363
    [0x83] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1364
    [0x84] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1365
    [0x85] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1366
    [0x86] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1367
    [0x87] = {OP_sbc, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1368
    [0x88] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1369
    [0x89] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1370
    [0x8a] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1371
    [0x8b] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1372
    [0x8c] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1373
    [0x8d] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1374
    [0x8e] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1375
    [0x8f] = {OP_eor, -1, 0,  opr_n_bytes_p1, z_reg, z_opr_decode},
1376
    [0x90] = {OP_rti, -1, 0,  single, 0, 0},
1377
    [0x91] = {OP_clb, -1, 0,   two, z_tfr, 0},
1378
    [0x92] = {OP_trap, -1, 0,  single, trap_decode, 0},
1379
    [0x93] = {OP_trap, -1, 0,  single, trap_decode, 0},
1380
    [0x94] = {OP_trap, -1, 0,  single, trap_decode, 0},
1381
    [0x95] = {OP_trap, -1, 0,  single, trap_decode, 0},
1382
    [0x96] = {OP_trap, -1, 0,  single, trap_decode, 0},
1383
    [0x97] = {OP_trap, -1, 0,  single, trap_decode, 0},
1384
    [0x98] = {OP_trap, -1, 0,  single, trap_decode, 0},
1385
    [0x99] = {OP_trap, -1, 0,  single, trap_decode, 0},
1386
    [0x9a] = {OP_trap, -1, 0,  single, trap_decode, 0},
1387
    [0x9b] = {OP_trap, -1, 0,  single, trap_decode, 0},
1388
    [0x9c] = {OP_trap, -1, 0,  single, trap_decode, 0},
1389
    [0x9d] = {OP_trap, -1, 0,  single, trap_decode, 0},
1390
    [0x9e] = {OP_trap, -1, 0,  single, trap_decode, 0},
1391
    [0x9f] = {OP_trap, -1, 0,  single, trap_decode, 0},
1392
    [0xa0] = {OP_sat, -1, 0, single, z_reg, 0},
1393
    [0xa1] = {OP_sat, -1, 0, single, z_reg, 0},
1394
    [0xa2] = {OP_sat, -1, 0, single, z_reg, 0},
1395
    [0xa3] = {OP_sat, -1, 0, single, z_reg, 0},
1396
    [0xa4] = {OP_sat, -1, 0, single, z_reg, 0},
1397
    [0xa5] = {OP_sat, -1, 0, single, z_reg, 0},
1398
    [0xa6] = {OP_sat, -1, 0, single, z_reg, 0},
1399
    [0xa7] = {OP_sat, -1, 0, single, z_reg, 0},
1400
    [0xa8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1401
    [0xa9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1402
    [0xaa] = {OP_trap, -1, 0,  single, trap_decode, 0},
1403
    [0xab] = {OP_trap, -1, 0,  single, trap_decode, 0},
1404
    [0xac] = {OP_trap, -1, 0,  single, trap_decode, 0},
1405
    [0xad] = {OP_trap, -1, 0,  single, trap_decode, 0},
1406
    [0xae] = {OP_trap, -1, 0,  single, trap_decode, 0},
1407
    [0xaf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1408
    [0xb0] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1409
    [0xb1] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1410
    [0xb2] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1411
    [0xb3] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1412
    [0xb4] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1413
    [0xb5] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1414
    [0xb6] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1415
    [0xb7] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1416
    [0xb8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1417
    [0xb9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1418
    [0xba] = {OP_trap, -1, 0,  single, trap_decode, 0},
1419
    [0xbb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1420
    [0xbc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1421
    [0xbd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1422
    [0xbe] = {OP_trap, -1, 0,  single, trap_decode, 0},
1423
    [0xbf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1424
    [0xc0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1425
    [0xc1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1426
    [0xc2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1427
    [0xc3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1428
    [0xc4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1429
    [0xc5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1430
    [0xc6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1431
    [0xc7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1432
    [0xc8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1433
    [0xc9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1434
    [0xca] = {OP_trap, -1, 0,  single, trap_decode, 0},
1435
    [0xcb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1436
    [0xcc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1437
    [0xcd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1438
    [0xce] = {OP_trap, -1, 0,  single, trap_decode, 0},
1439
    [0xcf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1440
    [0xd0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1441
    [0xd1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1442
    [0xd2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1443
    [0xd3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1444
    [0xd4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1445
    [0xd5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1446
    [0xd6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1447
    [0xd7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1448
    [0xd8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1449
    [0xd9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1450
    [0xda] = {OP_trap, -1, 0,  single, trap_decode, 0},
1451
    [0xdb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1452
    [0xdc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1453
    [0xdd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1454
    [0xde] = {OP_trap, -1, 0,  single, trap_decode, 0},
1455
    [0xdf] = {OP_trap, -1, 0,  single, trap_decode, 0},
1456
    [0xe0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1457
    [0xe1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1458
    [0xe2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1459
    [0xe3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1460
    [0xe4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1461
    [0xe5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1462
    [0xe6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1463
    [0xe7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1464
    [0xe8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1465
    [0xe9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1466
    [0xea] = {OP_trap, -1, 0,  single, trap_decode, 0},
1467
    [0xeb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1468
    [0xec] = {OP_trap, -1, 0,  single, trap_decode, 0},
1469
    [0xed] = {OP_trap, -1, 0,  single, trap_decode, 0},
1470
    [0xee] = {OP_trap, -1, 0,  single, trap_decode, 0},
1471
    [0xef] = {OP_trap, -1, 0,  single, trap_decode, 0},
1472
    [0xf0] = {OP_trap, -1, 0,  single, trap_decode, 0},
1473
    [0xf1] = {OP_trap, -1, 0,  single, trap_decode, 0},
1474
    [0xf2] = {OP_trap, -1, 0,  single, trap_decode, 0},
1475
    [0xf3] = {OP_trap, -1, 0,  single, trap_decode, 0},
1476
    [0xf4] = {OP_trap, -1, 0,  single, trap_decode, 0},
1477
    [0xf5] = {OP_trap, -1, 0,  single, trap_decode, 0},
1478
    [0xf6] = {OP_trap, -1, 0,  single, trap_decode, 0},
1479
    [0xf7] = {OP_trap, -1, 0,  single, trap_decode, 0},
1480
    [0xf8] = {OP_trap, -1, 0,  single, trap_decode, 0},
1481
    [0xf9] = {OP_trap, -1, 0,  single, trap_decode, 0},
1482
    [0xfa] = {OP_trap, -1, 0,  single, trap_decode, 0},
1483
    [0xfb] = {OP_trap, -1, 0,  single, trap_decode, 0},
1484
    [0xfc] = {OP_trap, -1, 0,  single, trap_decode, 0},
1485
    [0xfd] = {OP_trap, -1, 0,  single, trap_decode, 0},
1486
    [0xfe] = {OP_trap, -1, 0,  single, trap_decode, 0},
1487
    [0xff] = {OP_trap, -1, 0,  single, trap_decode, 0},
1488
  };
1489
1490
static const struct opcode page1[] =
1491
  {
1492
    [0x00] = {OP_bgnd, -1, 0, single, 0, 0},
1493
    [0x01] = {OP_nop, -1, 0,  single, 0, 0},
1494
    [0x02] = {OP_brclr, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0},
1495
    [0x03] = {OP_brset, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0},
1496
    [0x04] = {0xFFFF, -1, psh_pul_discrim,   two, psh_pul_decode, 0}, /* psh/pul */
1497
    [0x05] = {OP_rts, -1, 0,  single, 0, 0},
1498
    [0x06] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1499
    [0x07] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1500
    [0x08] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1501
    [0x09] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1502
    [0x0a] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1503
    [0x0b] = {0xFFFF, -1, loop_primitive_discrim, loop_prim_n_bytes, loop_primitive_decode, 0}, /* Loop primitives TBcc / DBcc */
1504
    [0x0c] = {OP_mov, 0, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1505
    [0x0d] = {OP_mov, 1, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1506
    [0x0e] = {OP_mov, 2, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1507
    [0x0f] = {OP_mov, 3, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1508
    [0x10] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},  /* lsr/lsl/asl/asr/rol/ror */
1509
    [0x11] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1510
    [0x12] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1511
    [0x13] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1512
    [0x14] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1513
    [0x15] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1514
    [0x16] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1515
    [0x17] = {0xFFFF, -1, shift_discrim,  shift_n_bytes, shift_decode, 0},
1516
    [0x18] = {OP_lea, -1, 0,  two, lea_reg_xys, NULL},
1517
    [0x19] = {OP_lea, -1, 0,  two, lea_reg_xys, NULL},
1518
    [0x1a] = {OP_lea, -1, 0,  two, lea_reg_xys, NULL},
1519
    /* 0x1b PG2 */
1520
    [0x1c] = {OP_mov, 0, 0, opr_n_bytes2, z_opr_decode2, 0},
1521
    [0x1d] = {OP_mov, 1, 0, opr_n_bytes2, z_opr_decode2, 0},
1522
    [0x1e] = {OP_mov, 2, 0, opr_n_bytes2, z_opr_decode2, 0},
1523
    [0x1f] = {OP_mov, 3, 0, opr_n_bytes2, z_opr_decode2, 0},
1524
    [0x20] = {OP_bra, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1525
    [0x21] = {OP_bsr, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1526
    [0x22] = {OP_bhi, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1527
    [0x23] = {OP_bls, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1528
    [0x24] = {OP_bcc, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1529
    [0x25] = {OP_bcs, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1530
    [0x26] = {OP_bne, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1531
    [0x27] = {OP_beq, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1532
    [0x28] = {OP_bvc, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1533
    [0x29] = {OP_bvs, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1534
    [0x2a] = {OP_bpl, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1535
    [0x2b] = {OP_bmi, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1536
    [0x2c] = {OP_bge, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1537
    [0x2d] = {OP_blt, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1538
    [0x2e] = {OP_bgt, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1539
    [0x2f] = {OP_ble, -1, 0,  pcrel_15bit, decode_rel_15_7, 0},
1540
    [0x30] = {OP_inc, -1, 0, single, z_reg, 0},
1541
    [0x31] = {OP_inc, -1, 0, single, z_reg, 0},
1542
    [0x32] = {OP_inc, -1, 0, single, z_reg, 0},
1543
    [0x33] = {OP_inc, -1, 0, single, z_reg, 0},
1544
    [0x34] = {OP_inc, -1, 0, single, z_reg, 0},
1545
    [0x35] = {OP_inc, -1, 0, single, z_reg, 0},
1546
    [0x36] = {OP_inc, -1, 0, single, z_reg, 0},
1547
    [0x37] = {OP_inc, -1, 0, single, z_reg, 0},
1548
    [0x38] = {OP_clr, -1, 0, single, z_reg, 0},
1549
    [0x39] = {OP_clr, -1, 0, single, z_reg, 0},
1550
    [0x3a] = {OP_clr, -1, 0, single, z_reg, 0},
1551
    [0x3b] = {OP_clr, -1, 0, single, z_reg, 0},
1552
    [0x3c] = {OP_clr, -1, 0, single, z_reg, 0},
1553
    [0x3d] = {OP_clr, -1, 0, single, z_reg, 0},
1554
    [0x3e] = {OP_clr, -1, 0, single, z_reg, 0},
1555
    [0x3f] = {OP_clr, -1, 0, single, z_reg, 0},
1556
    [0x40] = {OP_dec, -1, 0, single, z_reg, 0},
1557
    [0x41] = {OP_dec, -1, 0, single, z_reg, 0},
1558
    [0x42] = {OP_dec, -1, 0, single, z_reg, 0},
1559
    [0x43] = {OP_dec, -1, 0, single, z_reg, 0},
1560
    [0x44] = {OP_dec, -1, 0, single, z_reg, 0},
1561
    [0x45] = {OP_dec, -1, 0, single, z_reg, 0},
1562
    [0x46] = {OP_dec, -1, 0, single, z_reg, 0},
1563
    [0x47] = {OP_dec, -1, 0, single, z_reg, 0},
1564
    [0x48] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1565
    [0x49] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1566
    [0x4a] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1567
    [0x4b] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1568
    [0x4c] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1569
    [0x4d] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1570
    [0x4e] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1571
    [0x4f] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1572
    [0x50] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1573
    [0x51] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1574
    [0x52] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1575
    [0x53] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1576
    [0x54] = {OP_add, -1, 0, two,   z_reg, z_imm1234_0base},
1577
    [0x55] = {OP_add, -1, 0, two,   z_reg, z_imm1234_0base},
1578
    [0x56] = {OP_add, -1, 0, five,  z_reg, z_imm1234_0base},
1579
    [0x57] = {OP_add, -1, 0, five,  z_reg, z_imm1234_0base},
1580
    [0x58] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1581
    [0x59] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1582
    [0x5a] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1583
    [0x5b] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1584
    [0x5c] = {OP_and, -1, 0, two,   z_reg, z_imm1234_8base},
1585
    [0x5d] = {OP_and, -1, 0, two,   z_reg, z_imm1234_8base},
1586
    [0x5e] = {OP_and, -1, 0, five,  z_reg, z_imm1234_8base},
1587
    [0x5f] = {OP_and, -1, 0, five,  z_reg, z_imm1234_8base},
1588
    [0x60] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1589
    [0x61] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1590
    [0x62] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1591
    [0x63] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1592
    [0x64] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1593
    [0x65] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1594
    [0x66] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1595
    [0x67] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1596
    [0x68] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1597
    [0x69] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1598
    [0x6a] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1599
    [0x6b] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1600
    [0x6c] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1601
    [0x6d] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1602
    [0x6e] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1603
    [0x6f] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1604
    [0x70] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1605
    [0x71] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1606
    [0x72] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1607
    [0x73] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1608
    [0x74] = {OP_sub, -1, 0, two,   z_reg, z_imm1234_0base},
1609
    [0x75] = {OP_sub, -1, 0, two,   z_reg, z_imm1234_0base},
1610
    [0x76] = {OP_sub, -1, 0, five,  z_reg, z_imm1234_0base},
1611
    [0x77] = {OP_sub, -1, 0, five,  z_reg, z_imm1234_0base},
1612
    [0x78] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1613
    [0x79] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1614
    [0x7a] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1615
    [0x7b] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1616
    [0x7c] = {OP_or, -1, 0, two,   z_reg, z_imm1234_8base},
1617
    [0x7d] = {OP_or, -1, 0, two,   z_reg, z_imm1234_8base},
1618
    [0x7e] = {OP_or, -1, 0, five,  z_reg, z_imm1234_8base},
1619
    [0x7f] = {OP_or, -1, 0, five,  z_reg, z_imm1234_8base},
1620
    [0x80] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1621
    [0x81] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1622
    [0x82] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1623
    [0x83] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1624
    [0x84] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1625
    [0x85] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1626
    [0x86] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1627
    [0x87] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1628
    [0x88] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1629
    [0x89] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1630
    [0x8a] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1631
    [0x8b] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1632
    [0x8c] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1633
    [0x8d] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1634
    [0x8e] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1635
    [0x8f] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1636
    [0x90] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1637
    [0x91] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1638
    [0x92] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1639
    [0x93] = {OP_ld, -1, 0, three,  z_reg, z_imm1234_0base},
1640
    [0x94] = {OP_ld, -1, 0, two,    z_reg, z_imm1234_0base},
1641
    [0x95] = {OP_ld, -1, 0, two,    z_reg, z_imm1234_0base},
1642
    [0x96] = {OP_ld, -1, 0, five,   z_reg, z_imm1234_0base},
1643
    [0x97] = {OP_ld, -1, 0, five,   z_reg, z_imm1234_0base},
1644
    [0x98] = {OP_ld, -1, 0, four,   reg_xy, z_imm1234_0base},
1645
    [0x99] = {OP_ld, -1, 0, four,   reg_xy, z_imm1234_0base},
1646
    [0x9a] = {OP_clr, -1, 0, single, reg_xy, 0},
1647
    [0x9b] = {OP_clr, -1, 0, single, reg_xy, 0},
1648
    [0x9c] = {OP_inc, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1649
    [0x9d] = {OP_inc, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1650
    [0x9e] = {OP_tfr, -1, 0, two, z_tfr, NULL},
1651
    [0x9f] = {OP_inc, 3, 0, opr_n_bytes_p1, z_opr_decode, 0},
1652
    [0xa0] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1653
    [0xa1] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1654
    [0xa2] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1655
    [0xa3] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1656
    [0xa4] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1657
    [0xa5] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1658
    [0xa6] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1659
    [0xa7] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1660
    [0xa8] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1661
    [0xa9] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1662
    [0xaa] = {OP_jmp, -1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1663
    [0xab] = {OP_jsr, -1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1664
    [0xac] = {OP_dec, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1665
    [0xad] = {OP_dec, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1666
    [0xae] = {0xFFFF, -1, exg_sex_discrim,   two, exg_sex_decode, 0},  /* EXG / SEX */
1667
    [0xaf] = {OP_dec, 3, 0, opr_n_bytes_p1, 0, z_opr_decode},
1668
    [0xb0] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1669
    [0xb1] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1670
    [0xb2] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1671
    [0xb3] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1672
    [0xb4] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1673
    [0xb5] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1674
    [0xb6] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1675
    [0xb7] = {OP_ld, -1, 0, four,  z_reg, z_ext24_decode},
1676
    [0xb8] = {OP_ld, -1, 0, four,  reg_xy, z_ext24_decode},
1677
    [0xb9] = {OP_ld, -1, 0, four,  reg_xy, z_ext24_decode},
1678
    [0xba] = {OP_jmp, -1, 0, four, z_ext24_decode, 0},
1679
    [0xbb] = {OP_jsr, -1, 0, four, z_ext24_decode, 0},
1680
    [0xbc] = {OP_clr, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1681
    [0xbd] = {OP_clr, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1682
    [0xbe] = {OP_clr, 2, 0, opr_n_bytes_p1, z_opr_decode, 0},
1683
    [0xbf] = {OP_clr, 3, 0, opr_n_bytes_p1, z_opr_decode, 0},
1684
    [0xc0] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1685
    [0xc1] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1686
    [0xc2] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1687
    [0xc3] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1688
    [0xc4] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1689
    [0xc5] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1690
    [0xc6] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1691
    [0xc7] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1692
    [0xc8] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1693
    [0xc9] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1694
    [0xca] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1695
    [0xcb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1696
    [0xcc] = {OP_com, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1697
    [0xcd] = {OP_com, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1698
    [0xce] = {OP_andcc, -1, 0, two, imm1_decode, 0},
1699
    [0xcf] = {OP_com, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1700
    [0xd0] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1701
    [0xd1] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1702
    [0xd2] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1703
    [0xd3] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1704
    [0xd4] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1705
    [0xd5] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1706
    [0xd6] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1707
    [0xd7] = {OP_st, -1, 0, four,  z_reg, z_ext24_decode},
1708
    [0xd8] = {OP_st, -1, 0, four,  reg_xy, z_ext24_decode},
1709
    [0xd9] = {OP_st, -1, 0, four,  reg_xy, z_ext24_decode},
1710
    [0xda] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1711
    [0xdb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1712
    [0xdc] = {OP_neg, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1713
    [0xdd] = {OP_neg, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1714
    [0xde] = {OP_orcc, -1, 0,  two,  imm1_decode, 0},
1715
    [0xdf] = {OP_neg,  3, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1716
    [0xe0] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1717
    [0xe1] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1718
    [0xe2] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1719
    [0xe3] = {OP_cmp, -1, 0, three,  z_reg, z_imm1234_0base},
1720
    [0xe4] = {OP_cmp, -1, 0, two,    z_reg, z_imm1234_0base},
1721
    [0xe5] = {OP_cmp, -1, 0, two,    z_reg, z_imm1234_0base},
1722
    [0xe6] = {OP_cmp, -1, 0, five,   z_reg, z_imm1234_0base},
1723
    [0xe7] = {OP_cmp, -1, 0, five,   z_reg, z_imm1234_0base},
1724
    [0xe8] = {OP_cmp, -1, 0, four,   reg_xy, z_imm1234_0base},
1725
    [0xe9] = {OP_cmp, -1, 0, four,   reg_xy, z_imm1234_0base},
1726
    [0xea] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1727
    [0xeb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1728
    [0xec] = {OP_bclr, -1, 0, bm_n_bytes, bm_decode, 0},
1729
    [0xed] = {OP_bset, -1, 0, bm_n_bytes, bm_decode, 0},
1730
    [0xee] = {OP_btgl, -1, 0, bm_n_bytes, bm_decode, 0},
1731
    [0xef] = {OP_INVALID, -1, 0, NULL, NULL, NULL}, /* SPARE */
1732
    [0xf0] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1733
    [0xf1] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1734
    [0xf2] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1735
    [0xf3] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1736
    [0xf4] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1737
    [0xf5] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1738
    [0xf6] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1739
    [0xf7] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg,    z_opr_decode},
1740
    [0xf8] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1741
    [0xf9] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1742
    [0xfa] = {OP_ld, -1, 0,  three, reg_xy, ld_18bit_decode},
1743
    [0xfb] = {OP_ld, -1, 0,  three, reg_xy, ld_18bit_decode},
1744
    [0xfc] = {OP_cmp, -1, 0, single, cmp_xy, 0},
1745
    [0xfd] = {OP_sub, -1, 0, single, sub_d6_x_y, 0},
1746
    [0xfe] = {OP_sub, -1, 0, single, sub_d6_y_x, 0},
1747
    [0xff] = {OP_swi, -1, 0, single, 0, 0}
1748
  };
1749
1750
static const int oprregs1[] =
1751
  {
1752
    REG_D3, REG_D2, REG_D1, REG_D0, REG_CCL, REG_CCH
1753
  };
1754
1755
static const int oprregs2[] =
1756
  {
1757
    REG_Y,  REG_X,  REG_D7, REG_D6, REG_D5,  REG_D4
1758
  };
1759
1760
1761

1762
1763
enum MUL_MODE
1764
  {
1765
    MUL_REG_REG,
1766
    MUL_REG_OPR,
1767
    MUL_REG_IMM,
1768
    MUL_OPR_OPR
1769
  };
1770
1771
struct mb
1772
{
1773
  uint8_t mask;
1774
  uint8_t value;
1775
  enum MUL_MODE mode;
1776
};
1777
1778
static const struct mb mul_table[] = {
1779
  {0x40, 0x00, MUL_REG_REG},
1780
1781
  {0x47, 0x40, MUL_REG_OPR},
1782
  {0x47, 0x41, MUL_REG_OPR},
1783
  {0x47, 0x43, MUL_REG_OPR},
1784
1785
  {0x47, 0x44, MUL_REG_IMM},
1786
  {0x47, 0x45, MUL_REG_IMM},
1787
  {0x47, 0x47, MUL_REG_IMM},
1788
1789
  {0x43, 0x42, MUL_OPR_OPR},
1790
};
1791
1792
1793
static int
1794
mul_decode (struct mem_read_abstraction_base *mra,
1795
      int *n_operands, struct operand **operand)
1796
4.66k
{
1797
4.66k
  uint8_t mb;
1798
4.66k
  struct operand *op;
1799
4.66k
  int status = mra->read (mra, 0, 1, &mb);
1800
4.66k
  if (status < 0)
1801
0
    return status;
1802
1803
4.66k
  uint8_t byte;
1804
4.66k
  status = mra->read (mra, -1, 1, &byte);
1805
4.66k
  if (status < 0)
1806
0
    return status;
1807
1808
4.66k
  enum MUL_MODE mode = -1;
1809
4.66k
  size_t i;
1810
19.5k
  for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i)
1811
19.5k
    {
1812
19.5k
      const struct mb *mm = mul_table + i;
1813
19.5k
      if ((mb & mm->mask) == mm->value)
1814
4.66k
  {
1815
4.66k
    mode = mm->mode;
1816
4.66k
    break;
1817
4.66k
  }
1818
19.5k
    }
1819
4.66k
  op = create_register_operand (byte & 0x07);
1820
4.66k
  if (op == NULL)
1821
0
    return -1;
1822
4.66k
  operand[(*n_operands)++] = op;
1823
1824
4.66k
  switch (mode)
1825
4.66k
    {
1826
1.01k
    case MUL_REG_IMM:
1827
1.01k
      {
1828
1.01k
  int size = (mb & 0x3);
1829
1.01k
  op = create_register_operand_with_size ((mb & 0x38) >> 3, size);
1830
1.01k
  if (op == NULL)
1831
0
    return -1;
1832
1.01k
  operand[(*n_operands)++] = op;
1833
1834
1.01k
  uint32_t imm;
1835
1.01k
  if (z_decode_signed_value (mra, 1, size + 1, &imm) < 0)
1836
10
    return -1;
1837
1.00k
  op = create_immediate_operand (imm);
1838
1.00k
  if (op == NULL)
1839
0
    return -1;
1840
1.00k
  operand[(*n_operands)++] = op;
1841
1.00k
      }
1842
0
      break;
1843
1.55k
    case MUL_REG_REG:
1844
1.55k
      op = create_register_operand ((mb & 0x38) >> 3);
1845
1.55k
      if (op == NULL)
1846
0
  return -1;
1847
1.55k
      operand[(*n_operands)++] = op;
1848
1.55k
      op = create_register_operand (mb & 0x07);
1849
1.55k
      if (op == NULL)
1850
0
  return -1;
1851
1.55k
      operand[(*n_operands)++] = op;
1852
1.55k
      break;
1853
1.02k
    case MUL_REG_OPR:
1854
1.02k
      op = create_register_operand ((mb & 0x38) >> 3);
1855
1.02k
      if (op == NULL)
1856
0
  return -1;
1857
1.02k
      operand[(*n_operands)++] = op;
1858
1.02k
      op = x_opr_decode_with_size (mra, 1, mb & 0x3);
1859
1.02k
      if (op == NULL)
1860
8
  return -1;
1861
1.01k
      operand[(*n_operands)++] = op;
1862
1.01k
      break;
1863
1.07k
    case MUL_OPR_OPR:
1864
1.07k
      {
1865
1.07k
  int first = x_opr_n_bytes (mra, 1);
1866
1.07k
  if (first < 0)
1867
1
    return first;
1868
1.07k
  op = x_opr_decode_with_size (mra, 1, (mb & 0x30) >> 4);
1869
1.07k
  if (op == NULL)
1870
4
    return -1;
1871
1.06k
  operand[(*n_operands)++] = op;
1872
1.06k
  op = x_opr_decode_with_size (mra, first + 1, (mb & 0x0c) >> 2);
1873
1.06k
  if (op == NULL)
1874
6
    return -1;
1875
1.06k
  operand[(*n_operands)++] = op;
1876
1.06k
  break;
1877
1.06k
      }
1878
4.66k
    }
1879
4.63k
  return 0;
1880
4.66k
}
1881
1882
1883
static int
1884
mul_n_bytes (struct mem_read_abstraction_base *mra)
1885
4.63k
{
1886
4.63k
  int nx = 2;
1887
4.63k
  int first, second;
1888
4.63k
  uint8_t mb;
1889
4.63k
  int status = mra->read (mra, 0, 1, &mb);
1890
4.63k
  if (status < 0)
1891
0
    return status;
1892
1893
4.63k
  enum MUL_MODE mode = -1;
1894
4.63k
  size_t i;
1895
19.3k
  for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i)
1896
19.3k
    {
1897
19.3k
      const struct mb *mm = mul_table + i;
1898
19.3k
      if ((mb & mm->mask) == mm->value)
1899
4.63k
  {
1900
4.63k
    mode = mm->mode;
1901
4.63k
    break;
1902
4.63k
  }
1903
19.3k
    }
1904
1905
4.63k
  int size = (mb & 0x3) + 1;
1906
1907
4.63k
  switch (mode)
1908
4.63k
    {
1909
1.00k
    case MUL_REG_IMM:
1910
1.00k
      nx += size;
1911
1.00k
      break;
1912
1.55k
    case MUL_REG_REG:
1913
1.55k
      break;
1914
1.01k
    case MUL_REG_OPR:
1915
1.01k
      first = x_opr_n_bytes (mra, 1);
1916
1.01k
      if (first < 0)
1917
0
  return first;
1918
1.01k
      nx += first;
1919
1.01k
      break;
1920
1.06k
    case MUL_OPR_OPR:
1921
1.06k
      first = x_opr_n_bytes (mra, nx - 1);
1922
1.06k
      if (first < 0)
1923
0
  return first;
1924
1.06k
      nx += first;
1925
1.06k
      second = x_opr_n_bytes (mra, nx - 1);
1926
1.06k
      if (second < 0)
1927
0
  return second;
1928
1.06k
      nx += second;
1929
1.06k
      break;
1930
4.63k
    }
1931
1932
4.63k
  return nx;
1933
4.63k
}
1934
1935

1936
/* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1,
1937
   and contains obvious typos.
1938
   However the Freescale tools and experiments with the chip itself
1939
   seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG
1940
   respectively.  */
1941
1942
enum BM_MODE
1943
{
1944
  BM_REG_IMM,
1945
  BM_RESERVED0,
1946
  BM_OPR_B,
1947
  BM_OPR_W,
1948
  BM_OPR_L,
1949
  BM_OPR_REG,
1950
  BM_RESERVED1
1951
};
1952
1953
struct bm
1954
{
1955
  uint8_t mask;
1956
  uint8_t value;
1957
  enum BM_MODE mode;
1958
};
1959
1960
static const  struct bm bm_table[] = {
1961
  { 0xC6, 0x04,     BM_REG_IMM},
1962
  { 0x84, 0x00,     BM_REG_IMM},
1963
  { 0x06, 0x06,     BM_REG_IMM},
1964
  { 0xC6, 0x44,     BM_RESERVED0},
1965
1966
  { 0x8F, 0x80,     BM_OPR_B},
1967
  { 0x8E, 0x82,     BM_OPR_W},
1968
  { 0x8C, 0x88,     BM_OPR_L},
1969
1970
  { 0x83, 0x81,     BM_OPR_REG},
1971
  { 0x87, 0x84,     BM_RESERVED1},
1972
};
1973
1974
static int
1975
bm_decode (struct mem_read_abstraction_base *mra,
1976
     int *n_operands, struct operand **operand)
1977
5.89k
{
1978
5.89k
  struct operand *op;
1979
5.89k
  uint8_t bm;
1980
5.89k
  int status = mra->read (mra, 0, 1, &bm);
1981
5.89k
  if (status < 0)
1982
13
    return status;
1983
1984
5.88k
  size_t i;
1985
5.88k
  enum BM_MODE mode = -1;
1986
34.1k
  for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
1987
34.1k
    {
1988
34.1k
      const struct bm *bme = bm_table + i;
1989
34.1k
      if ((bm & bme->mask) == bme->value)
1990
5.88k
  {
1991
5.88k
    mode = bme->mode;
1992
5.88k
    break;
1993
5.88k
  }
1994
34.1k
    }
1995
1996
5.88k
  switch (mode)
1997
5.88k
    {
1998
2.39k
    case BM_REG_IMM:
1999
2.46k
    case BM_RESERVED0:
2000
2.46k
      op = create_register_operand (bm & 0x07);
2001
2.46k
      if (op == NULL)
2002
0
  return -1;
2003
2.46k
      operand[(*n_operands)++] = op;
2004
2.46k
      break;
2005
180
    case BM_OPR_B:
2006
180
      op = x_opr_decode_with_size (mra, 1, 0);
2007
180
      if (op == NULL)
2008
5
  return -1;
2009
175
      operand[(*n_operands)++] = op;
2010
175
      break;
2011
211
    case BM_OPR_W:
2012
211
      op = x_opr_decode_with_size (mra, 1, 1);
2013
211
      if (op == NULL)
2014
3
  return -1;
2015
208
      operand[(*n_operands)++] = op;
2016
208
      break;
2017
693
    case BM_OPR_L:
2018
693
      op = x_opr_decode_with_size (mra, 1, 3);
2019
693
      if (op == NULL)
2020
3
  return -1;
2021
690
      operand[(*n_operands)++] = op;
2022
690
      break;
2023
654
    case BM_OPR_REG:
2024
2.32k
    case BM_RESERVED1:
2025
2.32k
      {
2026
2.32k
  uint8_t xb;
2027
2.32k
  status = mra->read (mra, 1, 1, &xb);
2028
2.32k
  if (status < 0)
2029
8
    return status;
2030
  /* Don't emit a size suffix for register operands */
2031
2.32k
  if ((xb & 0xF8) != 0xB8)
2032
1.45k
    op = x_opr_decode_with_size (mra, 1, (bm & 0x0c) >> 2);
2033
867
  else
2034
867
    op = x_opr_decode (mra, 1);
2035
2.32k
  if (op == NULL)
2036
12
    return -1;
2037
2.30k
  operand[(*n_operands)++] = op;
2038
2.30k
      }
2039
0
      break;
2040
5.88k
    }
2041
2042
5.85k
  uint8_t imm = 0;
2043
5.85k
  switch (mode)
2044
5.85k
    {
2045
2.39k
    case BM_REG_IMM:
2046
2.46k
    case BM_RESERVED0:
2047
2.46k
      imm = (bm & 0x38) >> 3;
2048
2.46k
      op = create_immediate_operand (imm);
2049
2.46k
      if (op == NULL)
2050
0
  return -1;
2051
2.46k
      operand[(*n_operands)++] = op;
2052
2.46k
      break;
2053
690
    case BM_OPR_L:
2054
690
      imm |= (bm & 0x03) << 3;
2055
      /* fallthrough */
2056
898
    case BM_OPR_W:
2057
898
      imm |= (bm & 0x01) << 3;
2058
      /* fallthrough */
2059
1.07k
    case BM_OPR_B:
2060
1.07k
      imm |= (bm & 0x70) >> 4;
2061
1.07k
      op = create_immediate_operand (imm);
2062
1.07k
      if (op == NULL)
2063
0
  return -1;
2064
1.07k
      operand[(*n_operands)++] = op;
2065
1.07k
      break;
2066
652
    case BM_OPR_REG:
2067
2.30k
    case BM_RESERVED1:
2068
2.30k
      op = create_register_operand ((bm & 0x70) >> 4);
2069
2.30k
      if (op == NULL)
2070
0
  return -1;
2071
2.30k
      operand[(*n_operands)++] = op;
2072
2.30k
      break;
2073
5.85k
    }
2074
5.85k
  return 0;
2075
5.85k
}
2076
2077
2078
static int
2079
bm_rel_decode (struct mem_read_abstraction_base *mra,
2080
         int *n_operands, struct operand **operand)
2081
6.53k
{
2082
6.53k
  struct operand *op;
2083
6.53k
  uint8_t bm;
2084
6.53k
  int status = mra->read (mra, 0, 1, &bm);
2085
6.53k
  if (status < 0)
2086
4
    return status;
2087
2088
6.52k
  size_t i;
2089
6.52k
  enum BM_MODE mode = -1;
2090
28.5k
  for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
2091
28.5k
    {
2092
28.5k
      const struct bm *bme = bm_table + i;
2093
28.5k
      if ((bm & bme->mask) == bme->value)
2094
6.52k
  {
2095
6.52k
    mode = bme->mode;
2096
6.52k
    break;
2097
6.52k
  }
2098
28.5k
    }
2099
2100
6.52k
  int n = 1;
2101
6.52k
  switch (mode)
2102
6.52k
    {
2103
3.06k
    case BM_REG_IMM:
2104
3.31k
    case BM_RESERVED0:
2105
3.31k
      op = create_register_operand (bm & 0x07);
2106
3.31k
      if (op == NULL)
2107
0
  return -1;
2108
3.31k
      operand[(*n_operands)++] = op;
2109
3.31k
      break;
2110
673
    case BM_OPR_B:
2111
673
      op = x_opr_decode_with_size (mra, 1, 0);
2112
673
      if (op == NULL)
2113
0
  return -1;
2114
673
      operand[(*n_operands)++] = op;
2115
673
      n = x_opr_n_bytes (mra, 1);
2116
673
      if (n < 0)
2117
0
  return n;
2118
673
      n += 1;
2119
673
      break;
2120
1.40k
    case BM_OPR_W:
2121
1.40k
      op = x_opr_decode_with_size (mra, 1, 1);
2122
1.40k
      if (op == NULL)
2123
7
  return -1;
2124
1.40k
      operand[(*n_operands)++] = op;
2125
1.40k
      n = x_opr_n_bytes (mra, 1);
2126
1.40k
      if (n < 0)
2127
0
  return n;
2128
1.40k
      n += 1;
2129
1.40k
      break;
2130
337
    case BM_OPR_L:
2131
337
      op = x_opr_decode_with_size (mra, 1, 3);
2132
337
      if (op == NULL)
2133
1
  return -1;
2134
336
      operand[(*n_operands)++] = op;
2135
336
      n = x_opr_n_bytes (mra, 1);
2136
336
      if (n < 0)
2137
0
  return n;
2138
336
      n += 1;
2139
336
      break;
2140
585
    case BM_OPR_REG:
2141
798
    case BM_RESERVED1:
2142
798
      {
2143
798
  uint8_t xb;
2144
798
  status = mra->read (mra, +1, 1, &xb);
2145
798
  if (status < 0)
2146
1
    return status;
2147
  /* Don't emit a size suffix for register operands */
2148
797
  if ((xb & 0xF8) != 0xB8)
2149
663
    {
2150
663
      short os = (bm & 0x0c) >> 2;
2151
663
      op = x_opr_decode_with_size (mra, 1, os);
2152
663
    }
2153
134
  else
2154
134
    op = x_opr_decode (mra, 1);
2155
797
  if (op == NULL)
2156
1
    return -1;
2157
796
  operand[(*n_operands)++] = op;
2158
796
      }
2159
0
      break;
2160
6.52k
    }
2161
2162
6.51k
  int x, imm = 0;
2163
6.51k
  switch (mode)
2164
6.51k
    {
2165
336
    case BM_OPR_L:
2166
336
      imm |= (bm & 0x02) << 3;
2167
      /* fall through */
2168
1.73k
    case BM_OPR_W:
2169
1.73k
      imm |= (bm & 0x01) << 3;
2170
      /* fall through */
2171
2.41k
    case BM_OPR_B:
2172
2.41k
      imm |= (bm & 0x70) >> 4;
2173
2.41k
      op = create_immediate_operand (imm);
2174
2.41k
      if (op == NULL)
2175
0
  return -1;
2176
2.41k
      operand[(*n_operands)++] = op;
2177
2.41k
      break;
2178
249
    case BM_RESERVED0:
2179
249
      imm = (bm & 0x38) >> 3;
2180
249
      op = create_immediate_operand (imm);
2181
249
      if (op == NULL)
2182
0
  return -1;
2183
249
      operand[(*n_operands)++] = op;
2184
249
      break;
2185
3.06k
    case BM_REG_IMM:
2186
3.06k
      imm = (bm & 0xF8) >> 3;
2187
3.06k
      op = create_immediate_operand (imm);
2188
3.06k
      if (op == NULL)
2189
0
  return -1;
2190
3.06k
      operand[(*n_operands)++] = op;
2191
3.06k
      break;
2192
584
    case BM_OPR_REG:
2193
796
    case BM_RESERVED1:
2194
796
      op = create_register_operand ((bm & 0x70) >> 4);
2195
796
      if (op == NULL)
2196
0
  return -1;
2197
796
      operand[(*n_operands)++] = op;
2198
796
      x = x_opr_n_bytes (mra, 1);
2199
796
      if (x < 0)
2200
0
  return x;
2201
796
      n += x;
2202
796
      break;
2203
6.51k
    }
2204
2205
6.51k
  return rel_15_7 (mra, n + 1, n_operands, operand);
2206
6.51k
}
2207
2208
static int
2209
bm_n_bytes (struct mem_read_abstraction_base *mra)
2210
12.3k
{
2211
12.3k
  uint8_t bm;
2212
12.3k
  int status = mra->read (mra, 0, 1, &bm);
2213
12.3k
  if (status < 0)
2214
0
    return status;
2215
2216
12.3k
  size_t i;
2217
12.3k
  enum BM_MODE mode = -1;
2218
62.3k
  for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
2219
62.3k
    {
2220
62.3k
      const struct bm *bme = bm_table + i;
2221
62.3k
      if ((bm & bme->mask) == bme->value)
2222
12.3k
  {
2223
12.3k
    mode = bme->mode;
2224
12.3k
    break;
2225
12.3k
  }
2226
62.3k
    }
2227
2228
12.3k
  int n = 0;
2229
12.3k
  switch (mode)
2230
12.3k
    {
2231
5.45k
    case BM_REG_IMM:
2232
5.77k
    case BM_RESERVED0:
2233
5.77k
      break;
2234
2235
848
    case BM_OPR_B:
2236
2.45k
    case BM_OPR_W:
2237
3.48k
    case BM_OPR_L:
2238
4.71k
    case BM_OPR_REG:
2239
6.58k
    case BM_RESERVED1:
2240
6.58k
      n = x_opr_n_bytes (mra, 1);
2241
6.58k
      if (n < 0)
2242
0
  return n;
2243
6.58k
      break;
2244
12.3k
    }
2245
2246
12.3k
  return n + 2;
2247
12.3k
}
2248
2249
static int
2250
bm_rel_n_bytes (struct mem_read_abstraction_base *mra)
2251
6.51k
{
2252
6.51k
  int n = 1 + bm_n_bytes (mra);
2253
2254
6.51k
  bfd_byte rb;
2255
6.51k
  int status = mra->read (mra, n - 2, 1, &rb);
2256
6.51k
  if (status != 0)
2257
0
    return status;
2258
2259
6.51k
  if (rb & 0x80)
2260
2.59k
    n++;
2261
2262
6.51k
  return n;
2263
6.51k
}
2264
2265
2266

2267
2268
2269
/* shift direction */
2270
enum SB_DIR
2271
  {
2272
    SB_LEFT,
2273
    SB_RIGHT
2274
  };
2275
2276
enum SB_TYPE
2277
  {
2278
    SB_ARITHMETIC,
2279
    SB_LOGICAL
2280
  };
2281
2282
2283
enum SB_MODE
2284
  {
2285
    SB_REG_REG_N_EFF,
2286
    SB_REG_REG_N,
2287
    SB_REG_OPR_EFF,
2288
    SB_ROT,
2289
    SB_REG_OPR_OPR,
2290
    SB_OPR_N
2291
  };
2292
2293
struct sb
2294
{
2295
  uint8_t mask;
2296
  uint8_t value;
2297
  enum SB_MODE mode;
2298
};
2299
2300
static const  struct sb sb_table[] = {
2301
  {0x30, 0x00,     SB_REG_REG_N_EFF},
2302
  {0x30, 0x10,     SB_REG_REG_N},
2303
  {0x34, 0x20,     SB_REG_OPR_EFF},
2304
  {0x34, 0x24,     SB_ROT},
2305
  {0x34, 0x30,     SB_REG_OPR_OPR},
2306
  {0x34, 0x34,     SB_OPR_N},
2307
};
2308
2309
static int
2310
shift_n_bytes (struct mem_read_abstraction_base *mra)
2311
12.3k
{
2312
12.3k
  bfd_byte sb;
2313
12.3k
  int opr1, opr2;
2314
12.3k
  int status = mra->read (mra, 0, 1, &sb);
2315
12.3k
  if (status != 0)
2316
0
    return status;
2317
2318
12.3k
  size_t i;
2319
12.3k
  enum SB_MODE mode = -1;
2320
86.1k
  for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2321
73.8k
    {
2322
73.8k
      const struct sb *sbe = sb_table + i;
2323
73.8k
      if ((sb & sbe->mask) == sbe->value)
2324
12.3k
  mode = sbe->mode;
2325
73.8k
    }
2326
2327
12.3k
  switch (mode)
2328
12.3k
    {
2329
3.33k
    case SB_REG_REG_N_EFF:
2330
3.33k
      return 2;
2331
975
    case SB_REG_OPR_EFF:
2332
1.92k
    case SB_ROT:
2333
1.92k
      opr1 = x_opr_n_bytes (mra, 1);
2334
1.92k
      if (opr1 < 0)
2335
0
  return opr1;
2336
1.92k
      return 2 + opr1;
2337
953
    case SB_REG_OPR_OPR:
2338
953
      opr1 = x_opr_n_bytes (mra, 1);
2339
953
      if (opr1 < 0)
2340
0
  return opr1;
2341
953
      opr2 = 0;
2342
953
      if ((sb & 0x30) != 0x20)
2343
953
  {
2344
953
    opr2 = x_opr_n_bytes (mra, opr1 + 1);
2345
953
    if (opr2 < 0)
2346
0
      return opr2;
2347
953
  }
2348
953
      return 2 + opr1 + opr2;
2349
6.10k
    default:
2350
6.10k
      return 3;
2351
12.3k
    }
2352
2353
  /* not reached */
2354
0
  return -1;
2355
12.3k
}
2356

2357
2358
static int
2359
mov_imm_opr_n_bytes (struct mem_read_abstraction_base *mra)
2360
3.07k
{
2361
3.07k
  bfd_byte byte;
2362
3.07k
  int status = mra->read (mra, -1, 1, &byte);
2363
3.07k
  if (status < 0)
2364
0
    return status;
2365
2366
3.07k
  int size = byte - 0x0c + 1;
2367
3.07k
  int n = x_opr_n_bytes (mra, size);
2368
3.07k
  if (n < 0)
2369
0
    return n;
2370
2371
3.07k
  return size + n + 1;
2372
3.07k
}
2373
2374
static int
2375
mov_imm_opr (struct mem_read_abstraction_base *mra,
2376
       int *n_operands, struct operand **operand)
2377
3.15k
{
2378
3.15k
  struct operand *op;
2379
3.15k
  bfd_byte byte;
2380
3.15k
  int status = mra->read (mra, -1, 1, &byte);
2381
3.15k
  if (status < 0)
2382
0
    return status;
2383
2384
3.15k
  int size = byte - 0x0c + 1;
2385
3.15k
  uint32_t imm;
2386
3.15k
  if (decode_signed_value (mra, size, &imm))
2387
41
    return -1;
2388
2389
3.11k
  op = create_immediate_operand (imm);
2390
3.11k
  if (op == NULL)
2391
0
    return -1;
2392
3.11k
  operand[(*n_operands)++] = op;
2393
3.11k
  op = x_opr_decode (mra, size);
2394
3.11k
  if (op == NULL)
2395
34
    return -1;
2396
3.07k
  operand[(*n_operands)++] = op;
2397
3.07k
  return 0;
2398
3.11k
}
2399
2400

2401
2402
static int
2403
ld_18bit_decode (struct mem_read_abstraction_base *mra,
2404
     int *n_operands, struct operand **operand)
2405
2.92k
{
2406
2.92k
  struct operand *op;
2407
2.92k
  size_t size = 3;
2408
2.92k
  bfd_byte buffer[3];
2409
2.92k
  int status = mra->read (mra, 0, 2, buffer + 1);
2410
2.92k
  if (status < 0)
2411
30
    return status;
2412
2413
2.89k
  status = mra->read (mra, -1, 1, buffer);
2414
2.89k
  if (status < 0)
2415
0
    return status;
2416
2417
2.89k
  buffer[0] = (buffer[0] & 0x30) >> 4;
2418
2419
2.89k
  size_t i;
2420
2.89k
  uint32_t imm = 0;
2421
11.5k
  for (i = 0; i < size; ++i)
2422
8.69k
    {
2423
8.69k
      imm |= buffer[i] << (8 * (size - i - 1));
2424
8.69k
    }
2425
2426
2.89k
  op = create_immediate_operand (imm);
2427
2.89k
  if (op == NULL)
2428
0
    return -1;
2429
2.89k
  operand[(*n_operands)++] = op;
2430
2.89k
  return 0;
2431
2.89k
}
2432
2433

2434
2435
/* Loop Primitives */
2436
2437
enum LP_MODE {
2438
  LP_REG,
2439
  LP_XY,
2440
  LP_OPR
2441
};
2442
2443
struct lp
2444
{
2445
  uint8_t mask;
2446
  uint8_t value;
2447
  enum LP_MODE mode;
2448
};
2449
2450
static const struct lp lp_mode[] = {
2451
  {0x08, 0x00, LP_REG},
2452
  {0x0C, 0x08, LP_XY},
2453
  {0x0C, 0x0C, LP_OPR},
2454
};
2455
2456
2457
static int
2458
loop_prim_n_bytes (struct mem_read_abstraction_base *mra)
2459
2.45k
{
2460
2.45k
  int mx = 0;
2461
2.45k
  uint8_t lb;
2462
2.45k
  int status = mra->read (mra, mx++, 1, &lb);
2463
2.45k
  if (status < 0)
2464
0
    return status;
2465
2466
2.45k
  enum LP_MODE mode = -1;
2467
2.45k
  size_t i;
2468
4.45k
  for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i)
2469
4.45k
    {
2470
4.45k
      const struct lp *pb = lp_mode + i;
2471
4.45k
      if ((lb & pb->mask) == pb->value)
2472
2.45k
  {
2473
2.45k
    mode = pb->mode;
2474
2.45k
    break;
2475
2.45k
  }
2476
4.45k
    }
2477
2478
2.45k
  if (mode == LP_OPR)
2479
371
    {
2480
371
      int n = x_opr_n_bytes (mra, mx);
2481
371
      if (n < 0)
2482
0
  return n;
2483
371
      mx += n;
2484
371
    }
2485
2486
2.45k
  uint8_t rb;
2487
2.45k
  status = mra->read (mra, mx++, 1, &rb);
2488
2.45k
  if (status < 0)
2489
0
    return status;
2490
2.45k
  if (rb & 0x80)
2491
961
    mx++;
2492
2493
2.45k
  return mx + 1;
2494
2.45k
}
2495
2496
2497

2498
2499
static enum optr
2500
exg_sex_discrim (struct mem_read_abstraction_base *mra,
2501
     enum optr hint ATTRIBUTE_UNUSED)
2502
619
{
2503
619
  uint8_t eb;
2504
619
  int status = mra->read (mra, 0, 1, &eb);
2505
619
  enum optr operator = OP_INVALID;
2506
619
  if (status < 0)
2507
3
    return operator;
2508
2509
616
  struct operand *op0 = create_register_operand ((eb & 0xf0) >> 4);
2510
616
  if (op0 == NULL)
2511
0
    return -1;
2512
616
  struct operand *op1 = create_register_operand (eb & 0xf);
2513
616
  if (op1 == NULL)
2514
0
    return -1;
2515
2516
616
  int reg0 = ((struct register_operand *) op0)->reg;
2517
616
  int reg1 = ((struct register_operand *) op1)->reg;
2518
616
  if (reg0 >= 0 && reg0 < S12Z_N_REGISTERS
2519
616
      && reg1 >= 0 && reg1 < S12Z_N_REGISTERS)
2520
486
    {
2521
486
      const struct reg *r0 = registers + reg0;
2522
486
      const struct reg *r1 = registers + reg1;
2523
2524
486
      operator = r0->bytes < r1->bytes ? OP_sex : OP_exg;
2525
486
    }
2526
2527
616
  free (op0);
2528
616
  free (op1);
2529
2530
616
  return operator;
2531
616
}
2532
2533
2534
static int
2535
exg_sex_decode (struct mem_read_abstraction_base *mra,
2536
    int *n_operands, struct operand **operands)
2537
486
{
2538
486
  struct operand *op;
2539
486
  uint8_t eb;
2540
486
  int status = mra->read (mra, 0, 1, &eb);
2541
486
  if (status < 0)
2542
0
    return status;
2543
2544
  /* Ship out the operands.  */
2545
486
  op = create_register_operand ((eb & 0xf0) >> 4);
2546
486
  if (op == NULL)
2547
0
    return -1;
2548
486
  operands[(*n_operands)++] = op;
2549
486
  op = create_register_operand (eb & 0xf);
2550
486
  if (op == NULL)
2551
0
    return -1;
2552
486
  operands[(*n_operands)++] = op;
2553
486
  return 0;
2554
486
}
2555
2556
static enum optr
2557
loop_primitive_discrim (struct mem_read_abstraction_base *mra,
2558
      enum optr hint ATTRIBUTE_UNUSED)
2559
2.46k
{
2560
2.46k
  uint8_t lb;
2561
2.46k
  int status = mra->read (mra, 0, 1, &lb);
2562
2.46k
  if (status < 0)
2563
1
    return OP_INVALID;
2564
2565
2.46k
  enum optr opbase = (lb & 0x80) ? OP_dbNE : OP_tbNE;
2566
2.46k
  return opbase + ((lb & 0x70) >> 4);
2567
2.46k
}
2568
2569
static int
2570
loop_primitive_decode (struct mem_read_abstraction_base *mra,
2571
           int *n_operands, struct operand **operands)
2572
2.46k
{
2573
2.46k
  struct operand *op;
2574
2.46k
  int n, offs = 1;
2575
2.46k
  uint8_t lb;
2576
2.46k
  int status = mra->read (mra, 0, 1, &lb);
2577
2.46k
  if (status < 0)
2578
0
    return status;
2579
2580
2.46k
  enum LP_MODE mode = -1;
2581
2.46k
  size_t i;
2582
4.47k
  for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i)
2583
4.47k
    {
2584
4.47k
      const struct lp *pb = lp_mode + i;
2585
4.47k
      if ((lb & pb->mask) == pb->value)
2586
2.46k
  {
2587
2.46k
    mode = pb->mode;
2588
2.46k
    break;
2589
2.46k
  }
2590
4.47k
    }
2591
2592
2.46k
  switch (mode)
2593
2.46k
    {
2594
823
    case LP_REG:
2595
823
      op = create_register_operand (lb & 0x07);
2596
823
      if (op == NULL)
2597
0
  return -1;
2598
823
      operands[(*n_operands)++] = op;
2599
823
      break;
2600
1.26k
    case LP_XY:
2601
1.26k
      op = create_register_operand ((lb & 0x01) + REG_X);
2602
1.26k
      if (op == NULL)
2603
0
  return -1;
2604
1.26k
      operands[(*n_operands)++] = op;
2605
1.26k
      break;
2606
376
    case LP_OPR:
2607
376
      n = x_opr_n_bytes (mra, 1);
2608
376
      if (n < 0)
2609
1
  return n;
2610
375
      offs += n;
2611
375
      op = x_opr_decode_with_size (mra, 1, lb & 0x03);
2612
375
      if (op == NULL)
2613
2
  return -1;
2614
373
      operands[(*n_operands)++] = op;
2615
373
      break;
2616
2.46k
    }
2617
2618
2.45k
  return rel_15_7 (mra, offs + 1, n_operands, operands);
2619
2.46k
}
2620
2621
2622
static enum optr
2623
shift_discrim (struct mem_read_abstraction_base *mra,
2624
         enum optr hint ATTRIBUTE_UNUSED)
2625
12.3k
{
2626
12.3k
  size_t i;
2627
12.3k
  uint8_t sb;
2628
12.3k
  int status = mra->read (mra, 0, 1, &sb);
2629
12.3k
  if (status < 0)
2630
6
    return OP_INVALID;
2631
2632
12.3k
  enum SB_DIR  dir = (sb & 0x40) ? SB_LEFT : SB_RIGHT;
2633
12.3k
  enum SB_TYPE type = (sb & 0x80) ? SB_ARITHMETIC : SB_LOGICAL;
2634
12.3k
  enum SB_MODE mode = -1;
2635
86.4k
  for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2636
74.0k
    {
2637
74.0k
      const struct sb *sbe = sb_table + i;
2638
74.0k
      if ((sb & sbe->mask) == sbe->value)
2639
12.3k
  mode = sbe->mode;
2640
74.0k
    }
2641
2642
12.3k
  if (mode == SB_ROT)
2643
950
    return (dir == SB_LEFT) ? OP_rol : OP_ror;
2644
2645
11.3k
  if (type == SB_LOGICAL)
2646
8.08k
    return (dir == SB_LEFT) ? OP_lsl : OP_lsr;
2647
2648
3.31k
  return (dir == SB_LEFT) ? OP_asl : OP_asr;
2649
11.3k
}
2650
2651
2652
static int
2653
shift_decode (struct mem_read_abstraction_base *mra, int *n_operands,
2654
        struct operand **operands)
2655
12.3k
{
2656
12.3k
  struct operand *op;
2657
12.3k
  size_t i;
2658
12.3k
  uint8_t byte;
2659
12.3k
  int status = mra->read (mra, -1, 1, &byte);
2660
12.3k
  if (status < 0)
2661
0
    return status;
2662
2663
12.3k
  uint8_t sb;
2664
12.3k
  status = mra->read (mra, 0, 1, &sb);
2665
12.3k
  if (status < 0)
2666
0
    return status;
2667
2668
12.3k
  enum SB_MODE mode = -1;
2669
86.4k
  for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2670
74.0k
    {
2671
74.0k
      const struct sb *sbe = sb_table + i;
2672
74.0k
      if ((sb & sbe->mask) == sbe->value)
2673
12.3k
  mode = sbe->mode;
2674
74.0k
    }
2675
2676
12.3k
  short osize = -1;
2677
12.3k
  switch (mode)
2678
12.3k
    {
2679
975
    case SB_REG_OPR_EFF:
2680
1.92k
    case SB_ROT:
2681
2.89k
    case SB_REG_OPR_OPR:
2682
2.89k
      osize = sb & 0x03;
2683
2.89k
      break;
2684
2.43k
    case SB_OPR_N:
2685
2.43k
      {
2686
2.43k
  uint8_t xb;
2687
2.43k
  status = mra->read (mra, 1, 1, &xb);
2688
2.43k
  if (status < 0)
2689
7
    return status;
2690
  /* The size suffix is not printed if the OPR operand refers
2691
     directly to a register, because the size is implied by the
2692
     size of that register. */
2693
2.42k
  if ((xb & 0xF8) != 0xB8)
2694
2.35k
    osize = sb & 0x03;
2695
2.42k
      }
2696
0
      break;
2697
7.02k
    default:
2698
7.02k
      break;
2699
12.3k
    };
2700
2701
  /* Destination register */
2702
12.3k
  switch (mode)
2703
12.3k
    {
2704
3.33k
    case SB_REG_REG_N_EFF:
2705
7.02k
    case SB_REG_REG_N:
2706
7.02k
      op = create_register_operand (byte & 0x07);
2707
7.02k
      if (op == NULL)
2708
0
  return -1;
2709
7.02k
      operands[(*n_operands)++] = op;
2710
7.02k
      break;
2711
975
    case SB_REG_OPR_EFF:
2712
1.94k
    case SB_REG_OPR_OPR:
2713
1.94k
      op = create_register_operand (byte & 0x07);
2714
1.94k
      if (op == NULL)
2715
0
  return -1;
2716
1.94k
      operands[(*n_operands)++] = op;
2717
1.94k
      break;
2718
2719
950
    case SB_ROT:
2720
950
      op = x_opr_decode_with_size (mra, 1, osize);
2721
950
      if (op == NULL)
2722
2
  return -1;
2723
948
      operands[(*n_operands)++] = op;
2724
948
      break;
2725
2726
2.42k
    default:
2727
2.42k
      break;
2728
12.3k
    }
2729
2730
  /* Source register */
2731
12.3k
  switch (mode)
2732
12.3k
    {
2733
3.33k
    case SB_REG_REG_N_EFF:
2734
7.02k
    case SB_REG_REG_N:
2735
7.02k
      op = create_register_operand_with_size (sb & 0x07, osize);
2736
7.02k
      if (op == NULL)
2737
0
  return -1;
2738
7.02k
      operands[(*n_operands)++] = op;
2739
7.02k
      break;
2740
2741
965
    case SB_REG_OPR_OPR:
2742
965
      op = x_opr_decode_with_size (mra, 1, osize);
2743
965
      if (op == NULL)
2744
10
  return -1;
2745
955
      operands[(*n_operands)++] = op;
2746
955
      break;
2747
2748
4.35k
    default:
2749
4.35k
      break;
2750
12.3k
    }
2751
2752
  /* 3rd arg */
2753
12.3k
  switch (mode)
2754
12.3k
    {
2755
975
    case SB_REG_OPR_EFF:
2756
3.40k
    case SB_OPR_N:
2757
3.40k
      op = x_opr_decode_with_size (mra, 1, osize);
2758
3.40k
      if (op == NULL)
2759
3
  return -1;
2760
3.40k
      operands[(*n_operands)++] = op;
2761
3.40k
      break;
2762
2763
3.68k
    case SB_REG_REG_N:
2764
3.68k
      {
2765
3.68k
  uint8_t xb;
2766
3.68k
  status = mra->read (mra, 1, 1, &xb);
2767
3.68k
  if (status < 0)
2768
2
    return status;
2769
2770
  /* This case is slightly unusual.
2771
     If XB matches the binary pattern 0111XXXX, then instead of
2772
     interpreting this as a general OPR postbyte in the IMMe4 mode,
2773
     the XB byte is interpreted in s special way.  */
2774
3.68k
  if ((xb & 0xF0) == 0x70)
2775
440
    {
2776
440
      if (byte & 0x10)
2777
440
        {
2778
440
    int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1);
2779
440
    op = create_immediate_operand (shift);
2780
440
    if (op == NULL)
2781
0
      return -1;
2782
440
    operands[(*n_operands)++] = op;
2783
440
        }
2784
0
      else
2785
0
        {
2786
    /* This should not happen.  */
2787
0
    abort ();
2788
0
        }
2789
440
    }
2790
3.24k
  else
2791
3.24k
    {
2792
3.24k
      op = x_opr_decode (mra, 1);
2793
3.24k
      if (op == NULL)
2794
6
        return -1;
2795
3.23k
      operands[(*n_operands)++] = op;
2796
3.23k
    }
2797
3.68k
      }
2798
3.67k
      break;
2799
3.67k
    case SB_REG_OPR_OPR:
2800
955
      {
2801
955
  uint8_t xb;
2802
955
  int n = x_opr_n_bytes (mra, 1);
2803
955
  if (n < 0)
2804
0
    return n;
2805
955
  status = mra->read (mra, 1 + n, 1, &xb);
2806
955
  if (status < 0)
2807
1
    return status;
2808
2809
954
  if ((xb & 0xF0) == 0x70)
2810
109
    {
2811
109
      int imm = xb & 0x0F;
2812
109
      imm <<= 1;
2813
109
      imm |= (sb & 0x08) >> 3;
2814
109
      op = create_immediate_operand (imm);
2815
109
      if (op == NULL)
2816
0
        return -1;
2817
109
      operands[(*n_operands)++] = op;
2818
109
    }
2819
845
  else
2820
845
    {
2821
845
      op = x_opr_decode (mra, 1 + n);
2822
845
      if (op == NULL)
2823
1
        return -1;
2824
844
      operands[(*n_operands)++] = op;
2825
844
    }
2826
954
      }
2827
953
      break;
2828
4.28k
    default:
2829
4.28k
      break;
2830
12.3k
    }
2831
2832
12.3k
  switch (mode)
2833
12.3k
    {
2834
3.33k
    case SB_REG_REG_N_EFF:
2835
4.30k
    case SB_REG_OPR_EFF:
2836
6.73k
    case SB_OPR_N:
2837
6.73k
      {
2838
6.73k
  int imm = (sb & 0x08) ? 2 : 1;
2839
6.73k
  op = create_immediate_operand (imm);
2840
6.73k
  if (op == NULL)
2841
0
    return -1;
2842
6.73k
  operands[(*n_operands)++] = op;
2843
6.73k
      }
2844
0
      break;
2845
2846
5.58k
    default:
2847
5.58k
      break;
2848
12.3k
    }
2849
12.3k
  return 0;
2850
12.3k
}
2851
2852
static enum optr
2853
psh_pul_discrim (struct mem_read_abstraction_base *mra,
2854
     enum optr hint ATTRIBUTE_UNUSED)
2855
4.02k
{
2856
4.02k
  uint8_t byte;
2857
4.02k
  int status = mra->read (mra, 0, 1, &byte);
2858
4.02k
  if (status != 0)
2859
4
    return OP_INVALID;
2860
2861
4.02k
  return (byte & 0x80) ? OP_pull: OP_push;
2862
4.02k
}
2863
2864
2865
static int
2866
psh_pul_decode (struct mem_read_abstraction_base *mra,
2867
    int *n_operands, struct operand **operand)
2868
4.02k
{
2869
4.02k
  struct operand *op;
2870
4.02k
  uint8_t byte;
2871
4.02k
  int status = mra->read (mra, 0, 1, &byte);
2872
4.02k
  if (status != 0)
2873
0
    return status;
2874
4.02k
  int bit;
2875
4.02k
  if (byte & 0x40)
2876
2.61k
    {
2877
2.61k
      if ((byte & 0x3F) == 0)
2878
1.38k
  {
2879
1.38k
    op = create_register_all16_operand ();
2880
1.38k
    if (op == NULL)
2881
0
      return -1;
2882
1.38k
    operand[(*n_operands)++] = op;
2883
1.38k
  }
2884
1.23k
      else
2885
8.62k
  for (bit = 5; bit >= 0; --bit)
2886
7.39k
    {
2887
7.39k
      if (byte & (0x1 << bit))
2888
3.25k
        {
2889
3.25k
    op = create_register_operand (oprregs2[bit]);
2890
3.25k
    if (op == NULL)
2891
0
      return -1;
2892
3.25k
    operand[(*n_operands)++] = op;
2893
3.25k
        }
2894
7.39k
    }
2895
2.61k
    }
2896
1.40k
  else
2897
1.40k
    {
2898
1.40k
      if ((byte & 0x3F) == 0)
2899
512
  {
2900
512
    op = create_register_all_operand ();
2901
512
    if (op == NULL)
2902
0
      return -1;
2903
512
    operand[(*n_operands)++] = op;
2904
512
  }
2905
891
      else
2906
6.23k
  for (bit = 5; bit >= 0; --bit)
2907
5.34k
    {
2908
5.34k
      if (byte & (0x1 << bit))
2909
1.50k
        {
2910
1.50k
    op = create_register_operand (oprregs1[bit]);
2911
1.50k
    if (op == NULL)
2912
0
      return -1;
2913
1.50k
    operand[(*n_operands)++] = op;
2914
1.50k
        }
2915
5.34k
    }
2916
1.40k
    }
2917
4.02k
  return 0;
2918
4.02k
}
2919
2920
static enum optr
2921
bit_field_discrim (struct mem_read_abstraction_base *mra,
2922
       enum optr hint ATTRIBUTE_UNUSED)
2923
1.34k
{
2924
1.34k
  int status;
2925
1.34k
  bfd_byte bb;
2926
1.34k
  status = mra->read (mra, 0, 1, &bb);
2927
1.34k
  if (status != 0)
2928
1
    return OP_INVALID;
2929
2930
1.34k
  return (bb & 0x80) ? OP_bfins : OP_bfext;
2931
1.34k
}
2932
2933
static int
2934
bit_field_decode (struct mem_read_abstraction_base *mra,
2935
      int *n_operands, struct operand **operands)
2936
1.34k
{
2937
1.34k
  struct operand *op;
2938
1.34k
  int status;
2939
2940
1.34k
  bfd_byte byte2;
2941
1.34k
  status = mra->read (mra, -1, 1, &byte2);
2942
1.34k
  if (status != 0)
2943
0
    return status;
2944
2945
1.34k
  bfd_byte bb;
2946
1.34k
  status = mra->read (mra, 0, 1, &bb);
2947
1.34k
  if (status != 0)
2948
0
    return status;
2949
2950
1.34k
  enum BB_MODE mode = -1;
2951
1.34k
  size_t i;
2952
1.34k
  const struct opr_bb *bbs = 0;
2953
6.64k
  for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i)
2954
6.64k
    {
2955
6.64k
      bbs = bb_modes + i;
2956
6.64k
      if ((bb & bbs->mask) == bbs->value)
2957
1.34k
  {
2958
1.34k
    mode = bbs->mode;
2959
1.34k
    break;
2960
1.34k
  }
2961
6.64k
    }
2962
1.34k
  int reg1 = byte2 & 0x07;
2963
  /* First operand */
2964
1.34k
  switch (mode)
2965
1.34k
    {
2966
36
    case BB_REG_REG_REG:
2967
68
    case BB_REG_REG_IMM:
2968
82
    case BB_REG_OPR_REG:
2969
915
    case BB_REG_OPR_IMM:
2970
915
      op = create_register_operand (reg1);
2971
915
      if (op == NULL)
2972
0
  return -1;
2973
915
      operands[(*n_operands)++] = op;
2974
915
      break;
2975
120
    case BB_OPR_REG_REG:
2976
120
      op = x_opr_decode_with_size (mra, 1, (bb >> 2) & 0x03);
2977
120
      if (op == NULL)
2978
2
  return -1;
2979
118
      operands[(*n_operands)++] = op;
2980
118
      break;
2981
309
    case BB_OPR_REG_IMM:
2982
309
      op = x_opr_decode_with_size (mra, 2, (bb >> 2) & 0x03);
2983
309
      if (op == NULL)
2984
1
  return -1;
2985
308
      operands[(*n_operands)++] = op;
2986
308
      break;
2987
1.34k
    }
2988
2989
  /* Second operand */
2990
1.34k
  switch (mode)
2991
1.34k
    {
2992
36
    case BB_REG_REG_REG:
2993
68
    case BB_REG_REG_IMM:
2994
68
      {
2995
68
  int reg_src = (bb >> 2) & 0x07;
2996
68
  op = create_register_operand (reg_src);
2997
68
  if (op == NULL)
2998
0
    return -1;
2999
68
  operands[(*n_operands)++] = op;
3000
68
      }
3001
0
      break;
3002
118
    case BB_OPR_REG_REG:
3003
426
    case BB_OPR_REG_IMM:
3004
426
      {
3005
426
  int reg_src = (byte2 & 0x07);
3006
426
  op = create_register_operand (reg_src);
3007
426
  if (op == NULL)
3008
0
    return -1;
3009
426
  operands[(*n_operands)++] = op;
3010
426
      }
3011
0
      break;
3012
14
    case BB_REG_OPR_REG:
3013
14
      op = x_opr_decode_with_size (mra, 1, (bb >> 2) & 0x03);
3014
14
      if (op == NULL)
3015
0
  return -1;
3016
14
      operands[(*n_operands)++] = op;
3017
14
      break;
3018
833
    case BB_REG_OPR_IMM:
3019
833
      op = x_opr_decode_with_size (mra, 2, (bb >> 2) & 0x03);
3020
833
      if (op == NULL)
3021
8
  return -1;
3022
825
      operands[(*n_operands)++] = op;
3023
825
      break;
3024
1.34k
    }
3025
3026
  /* Third operand */
3027
1.33k
  switch (mode)
3028
1.33k
    {
3029
36
    case BB_REG_REG_REG:
3030
154
    case BB_OPR_REG_REG:
3031
168
    case BB_REG_OPR_REG:
3032
168
      {
3033
168
  int reg_parm = bb & 0x03;
3034
168
  op = create_register_operand (reg_parm);
3035
168
  if (op == NULL)
3036
0
    return -1;
3037
168
  operands[(*n_operands)++] = op;
3038
168
      }
3039
0
      break;
3040
32
    case BB_REG_REG_IMM:
3041
340
    case BB_OPR_REG_IMM:
3042
1.16k
    case BB_REG_OPR_IMM:
3043
1.16k
      {
3044
1.16k
  bfd_byte i1;
3045
1.16k
  status = mra->read (mra, 1, 1, &i1);
3046
1.16k
  if (status < 0)
3047
1
    return status;
3048
1.16k
  int offset = i1 & 0x1f;
3049
1.16k
  int width = bb & 0x03;
3050
1.16k
  width <<= 3;
3051
1.16k
  width |= i1 >> 5;
3052
1.16k
  op = create_bitfield_operand (width, offset);
3053
1.16k
  if (op == NULL)
3054
0
    return -1;
3055
1.16k
  operands[(*n_operands)++] = op;
3056
1.16k
      }
3057
0
      break;
3058
1.33k
    }
3059
1.33k
  return 0;
3060
1.33k
}
3061
3062
3063
/* Decode the next instruction at MRA, according to OPC.
3064
   The operation to be performed is returned.
3065
   The number of operands, will be placed in N_OPERANDS.
3066
   The operands themselved into OPERANDS.  */
3067
static enum optr
3068
decode_operation (const struct opcode *opc,
3069
      struct mem_read_abstraction_base *mra,
3070
      int *n_operands, struct operand **operands)
3071
295k
{
3072
295k
  enum optr op = opc->operator;
3073
295k
  if (opc->discriminator)
3074
25.4k
    {
3075
25.4k
      op = opc->discriminator (mra, opc->operator);
3076
25.4k
      if (op == OP_INVALID)
3077
157
  return op;
3078
25.4k
    }
3079
3080
295k
  if (opc->operands)
3081
177k
    if (opc->operands (mra, n_operands, operands) < 0)
3082
337
      return OP_INVALID;
3083
3084
295k
  if (opc->operands2)
3085
86.7k
    if (opc->operands2 (mra, n_operands, operands) < 0)
3086
283
      return OP_INVALID;
3087
3088
295k
  return op;
3089
295k
}
3090
3091
int
3092
decode_s12z (enum optr *myoperator, short *osize,
3093
       int *n_operands, struct operand **operands,
3094
       struct mem_read_abstraction_base *mra)
3095
295k
{
3096
295k
  int n_bytes = 0;
3097
295k
  bfd_byte byte;
3098
3099
295k
  int status = mra->read (mra, 0, 1, &byte);
3100
295k
  if (status < 0)
3101
1
    return status;
3102
3103
295k
  mra->advance (mra);
3104
3105
295k
  const struct opcode *opc = page1 + byte;
3106
295k
  if (byte == PAGE2_PREBYTE)
3107
3.77k
    {
3108
      /* Opcodes in page2 have an additional byte */
3109
3.77k
      n_bytes++;
3110
3111
3.77k
      bfd_byte byte2;
3112
3.77k
      status = mra->read (mra, 0, 1, &byte2);
3113
3.77k
      if (status < 0)
3114
3
  return status;
3115
3.77k
      mra->advance (mra);
3116
3.77k
      opc = page2 + byte2;
3117
3.77k
    }
3118
295k
  *myoperator = decode_operation (opc, mra, n_operands, operands);
3119
295k
  *osize = opc->osize;
3120
3121
  /* Return the number of bytes in the instruction.  */
3122
295k
  if (*myoperator != OP_INVALID && opc->insn_bytes)
3123
294k
    {
3124
294k
      int n = opc->insn_bytes (mra);
3125
294k
      if (n < 0)
3126
0
  return n;
3127
294k
      n_bytes += n;
3128
294k
    }
3129
1.79k
  else
3130
1.79k
    n_bytes += 1;
3131
3132
295k
  return n_bytes;
3133
295k
}
3134