Coverage Report

Created: 2026-04-04 08:16

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/binutils-gdb/opcodes/m32c-ibld.c
Line
Count
Source
1
/* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
2
/* Instruction building/extraction support for m32c. -*- C -*-
3
4
   THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5
   - the resultant file is machine generated, cgen-ibld.in isn't
6
7
   Copyright (C) 1996-2026 Free Software Foundation, Inc.
8
9
   This file is part of libopcodes.
10
11
   This library is free software; you can redistribute it and/or modify
12
   it under the terms of the GNU General Public License as published by
13
   the Free Software Foundation; either version 3, or (at your option)
14
   any later version.
15
16
   It is distributed in the hope that it will be useful, but WITHOUT
17
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
19
   License for more details.
20
21
   You should have received a copy of the GNU General Public License
22
   along with this program; if not, write to the Free Software Foundation, Inc.,
23
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
24
25
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26
   Keep that in mind.  */
27
28
#include "sysdep.h"
29
#include <stdio.h>
30
#include "ansidecl.h"
31
#include "dis-asm.h"
32
#include "bfd.h"
33
#include "symcat.h"
34
#include "m32c-desc.h"
35
#include "m32c-opc.h"
36
#include "cgen/basic-modes.h"
37
#include "opintl.h"
38
#include "safe-ctype.h"
39
40
#undef  min
41
0
#define min(a,b) ((a) < (b) ? (a) : (b))
42
#undef  max
43
#define max(a,b) ((a) > (b) ? (a) : (b))
44
45
/* Used by the ifield rtx function.  */
46
82.9k
#define FLD(f) (fields->f)
47
48
static const char * insert_normal
49
  (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50
   unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51
static const char * insert_insn_normal
52
  (CGEN_CPU_DESC, const CGEN_INSN *,
53
   CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54
static int extract_normal
55
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56
   unsigned int, unsigned int, unsigned int, unsigned int,
57
   unsigned int, unsigned int, bfd_vma, long *);
58
static int extract_insn_normal
59
  (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60
   CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61
#if CGEN_INT_INSN_P
62
static void put_insn_int_value
63
  (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64
#endif
65
#if ! CGEN_INT_INSN_P
66
static CGEN_INLINE void insert_1
67
  (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68
static CGEN_INLINE int fill_cache
69
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *,  int, int, bfd_vma);
70
static CGEN_INLINE long extract_1
71
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72
#endif
73

74
/* Operand insertion.  */
75
76
#if ! CGEN_INT_INSN_P
77
78
/* Subroutine of insert_normal.  */
79
80
static CGEN_INLINE void
81
insert_1 (CGEN_CPU_DESC cd,
82
    unsigned long value,
83
    int start,
84
    int length,
85
    int word_length,
86
    unsigned char *bufp)
87
0
{
88
0
  unsigned long x, mask;
89
0
  int shift;
90
91
0
  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
92
93
  /* Written this way to avoid undefined behaviour.  */
94
0
  mask = (1UL << (length - 1) << 1) - 1;
95
0
  if (CGEN_INSN_LSB0_P)
96
0
    shift = (start + 1) - length;
97
0
  else
98
0
    shift = (word_length - (start + length));
99
0
  x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101
0
  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
102
0
}
103
104
#endif /* ! CGEN_INT_INSN_P */
105
106
/* Default insertion routine.
107
108
   ATTRS is a mask of the boolean attributes.
109
   WORD_OFFSET is the offset in bits from the start of the insn of the value.
110
   WORD_LENGTH is the length of the word in bits in which the value resides.
111
   START is the starting bit number in the word, architecture origin.
112
   LENGTH is the length of VALUE in bits.
113
   TOTAL_LENGTH is the total length of the insn in bits.
114
115
   The result is an error message or NULL if success.  */
116
117
/* ??? This duplicates functionality with bfd's howto table and
118
   bfd_install_relocation.  */
119
/* ??? This doesn't handle bfd_vma's.  Create another function when
120
   necessary.  */
121
122
static const char *
123
insert_normal (CGEN_CPU_DESC cd,
124
         long value,
125
         unsigned int attrs,
126
         unsigned int word_offset,
127
         unsigned int start,
128
         unsigned int length,
129
         unsigned int word_length,
130
         unsigned int total_length,
131
         CGEN_INSN_BYTES_PTR buffer)
132
0
{
133
0
  static char errbuf[100];
134
0
  unsigned long mask;
135
136
  /* If LENGTH is zero, this operand doesn't contribute to the value.  */
137
0
  if (length == 0)
138
0
    return NULL;
139
140
  /* Written this way to avoid undefined behaviour.  */
141
0
  mask = (1UL << (length - 1) << 1) - 1;
142
143
0
  if (word_length > 8 * sizeof (CGEN_INSN_INT))
144
0
    abort ();
145
146
  /* For architectures with insns smaller than the base-insn-bitsize,
147
     word_length may be too big.  */
148
0
  if (cd->min_insn_bitsize < cd->base_insn_bitsize)
149
0
    {
150
0
      if (word_offset == 0
151
0
    && word_length > total_length)
152
0
  word_length = total_length;
153
0
    }
154
155
  /* Ensure VALUE will fit.  */
156
0
  if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
157
0
    {
158
0
      long minval = - (1UL << (length - 1));
159
0
      unsigned long maxval = mask;
160
161
0
      if ((value > 0 && (unsigned long) value > maxval)
162
0
    || value < minval)
163
0
  {
164
    /* xgettext:c-format */
165
0
    sprintf (errbuf,
166
0
       _("operand out of range (%ld not between %ld and %lu)"),
167
0
       value, minval, maxval);
168
0
    return errbuf;
169
0
  }
170
0
    }
171
0
  else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
172
0
    {
173
0
      unsigned long maxval = mask;
174
0
      unsigned long val = (unsigned long) value;
175
176
      /* For hosts with a word size > 32 check to see if value has been sign
177
   extended beyond 32 bits.  If so then ignore these higher sign bits
178
   as the user is attempting to store a 32-bit signed value into an
179
   unsigned 32-bit field which is allowed.  */
180
0
      if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
181
0
  val &= 0xFFFFFFFF;
182
183
0
      if (val > maxval)
184
0
  {
185
    /* xgettext:c-format */
186
0
    sprintf (errbuf,
187
0
       _("operand out of range (0x%lx not between 0 and 0x%lx)"),
188
0
       val, maxval);
189
0
    return errbuf;
190
0
  }
191
0
    }
192
0
  else
193
0
    {
194
0
      if (! cgen_signed_overflow_ok_p (cd))
195
0
  {
196
0
    long minval = - (1UL << (length - 1));
197
0
    long maxval =   (1UL << (length - 1)) - 1;
198
199
0
    if (value < minval || value > maxval)
200
0
      {
201
0
        sprintf
202
    /* xgettext:c-format */
203
0
    (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
204
0
     value, minval, maxval);
205
0
        return errbuf;
206
0
      }
207
0
  }
208
0
    }
209
210
#if CGEN_INT_INSN_P
211
212
  {
213
    int shift_within_word, shift_to_word, shift;
214
215
    /* How to shift the value to BIT0 of the word.  */
216
    shift_to_word = total_length - (word_offset + word_length);
217
218
    /* How to shift the value to the field within the word.  */
219
    if (CGEN_INSN_LSB0_P)
220
      shift_within_word = start + 1 - length;
221
    else
222
      shift_within_word = word_length - start - length;
223
224
    /* The total SHIFT, then mask in the value.  */
225
    shift = shift_to_word + shift_within_word;
226
    *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
227
  }
228
229
#else /* ! CGEN_INT_INSN_P */
230
231
0
  {
232
0
    unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
233
234
0
    insert_1 (cd, value, start, length, word_length, bufp);
235
0
  }
236
237
0
#endif /* ! CGEN_INT_INSN_P */
238
239
0
  return NULL;
240
0
}
241
242
/* Default insn builder (insert handler).
243
   The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
244
   that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
245
   recorded in host byte order, otherwise BUFFER is an array of bytes
246
   and the value is recorded in target byte order).
247
   The result is an error message or NULL if success.  */
248
249
static const char *
250
insert_insn_normal (CGEN_CPU_DESC cd,
251
        const CGEN_INSN * insn,
252
        CGEN_FIELDS * fields,
253
        CGEN_INSN_BYTES_PTR buffer,
254
        bfd_vma pc)
255
0
{
256
0
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
257
0
  unsigned long value;
258
0
  const CGEN_SYNTAX_CHAR_TYPE * syn;
259
260
0
  CGEN_INIT_INSERT (cd);
261
0
  value = CGEN_INSN_BASE_VALUE (insn);
262
263
  /* If we're recording insns as numbers (rather than a string of bytes),
264
     target byte order handling is deferred until later.  */
265
266
#if CGEN_INT_INSN_P
267
268
  put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
269
          CGEN_FIELDS_BITSIZE (fields), value);
270
271
#else
272
273
0
  cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
274
0
                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
275
0
           value, cd->insn_endian);
276
277
0
#endif /* ! CGEN_INT_INSN_P */
278
279
  /* ??? It would be better to scan the format's fields.
280
     Still need to be able to insert a value based on the operand though;
281
     e.g. storing a branch displacement that got resolved later.
282
     Needs more thought first.  */
283
284
0
  for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
285
0
    {
286
0
      const char *errmsg;
287
288
0
      if (CGEN_SYNTAX_CHAR_P (* syn))
289
0
  continue;
290
291
0
      errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
292
0
               fields, buffer, pc);
293
0
      if (errmsg)
294
0
  return errmsg;
295
0
    }
296
297
0
  return NULL;
298
0
}
299
300
#if CGEN_INT_INSN_P
301
/* Cover function to store an insn value into an integral insn.  Must go here
302
   because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
303
304
static void
305
put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
306
        CGEN_INSN_BYTES_PTR buf,
307
        int length,
308
        int insn_length,
309
        CGEN_INSN_INT value)
310
{
311
  /* For architectures with insns smaller than the base-insn-bitsize,
312
     length may be too big.  */
313
  if (length > insn_length)
314
    *buf = value;
315
  else
316
    {
317
      int shift = insn_length - length;
318
      /* Written this way to avoid undefined behaviour.  */
319
      CGEN_INSN_INT mask = length == 0 ? 0 : (1UL << (length - 1) << 1) - 1;
320
321
      *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
322
    }
323
}
324
#endif
325

326
/* Operand extraction.  */
327
328
#if ! CGEN_INT_INSN_P
329
330
/* Subroutine of extract_normal.
331
   Ensure sufficient bytes are cached in EX_INFO.
332
   OFFSET is the offset in bytes from the start of the insn of the value.
333
   BYTES is the length of the needed value.
334
   Returns 1 for success, 0 for failure.  */
335
336
static CGEN_INLINE int
337
fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
338
      CGEN_EXTRACT_INFO *ex_info,
339
      int offset,
340
      int bytes,
341
      bfd_vma pc)
342
43.4k
{
343
  /* It's doubtful that the middle part has already been fetched so
344
     we don't optimize that case.  kiss.  */
345
43.4k
  unsigned int mask;
346
43.4k
  disassemble_info *info = (disassemble_info *) ex_info->dis_info;
347
348
  /* First do a quick check.  */
349
43.4k
  mask = (1 << bytes) - 1;
350
43.4k
  if (((ex_info->valid >> offset) & mask) == mask)
351
42.5k
    return 1;
352
353
  /* Search for the first byte we need to read.  */
354
870
  for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
355
870
    if (! (mask & ex_info->valid))
356
870
      break;
357
358
870
  if (bytes)
359
870
    {
360
870
      int status;
361
362
870
      pc += offset;
363
870
      status = (*info->read_memory_func)
364
870
  (pc, ex_info->insn_bytes + offset, bytes, info);
365
366
870
      if (status != 0)
367
6
  {
368
6
    (*info->memory_error_func) (status, pc, info);
369
6
    return 0;
370
6
  }
371
372
864
      ex_info->valid |= ((1 << bytes) - 1) << offset;
373
864
    }
374
375
864
  return 1;
376
870
}
377
378
/* Subroutine of extract_normal.  */
379
380
static CGEN_INLINE long
381
extract_1 (CGEN_CPU_DESC cd,
382
     CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
383
     int start,
384
     int length,
385
     int word_length,
386
     unsigned char *bufp,
387
     bfd_vma pc ATTRIBUTE_UNUSED)
388
43.4k
{
389
43.4k
  unsigned long x;
390
43.4k
  int shift;
391
392
43.4k
  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
393
394
43.4k
  if (CGEN_INSN_LSB0_P)
395
0
    shift = (start + 1) - length;
396
43.4k
  else
397
43.4k
    shift = (word_length - (start + length));
398
43.4k
  return x >> shift;
399
43.4k
}
400
401
#endif /* ! CGEN_INT_INSN_P */
402
403
/* Default extraction routine.
404
405
   INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
406
   or sometimes less for cases like the m32r where the base insn size is 32
407
   but some insns are 16 bits.
408
   ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
409
   but for generality we take a bitmask of all of them.
410
   WORD_OFFSET is the offset in bits from the start of the insn of the value.
411
   WORD_LENGTH is the length of the word in bits in which the value resides.
412
   START is the starting bit number in the word, architecture origin.
413
   LENGTH is the length of VALUE in bits.
414
   TOTAL_LENGTH is the total length of the insn in bits.
415
416
   Returns 1 for success, 0 for failure.  */
417
418
/* ??? The return code isn't properly used.  wip.  */
419
420
/* ??? This doesn't handle bfd_vma's.  Create another function when
421
   necessary.  */
422
423
static int
424
extract_normal (CGEN_CPU_DESC cd,
425
#if ! CGEN_INT_INSN_P
426
    CGEN_EXTRACT_INFO *ex_info,
427
#else
428
    CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
429
#endif
430
    CGEN_INSN_INT insn_value,
431
    unsigned int attrs,
432
    unsigned int word_offset,
433
    unsigned int start,
434
    unsigned int length,
435
    unsigned int word_length,
436
    unsigned int total_length,
437
#if ! CGEN_INT_INSN_P
438
    bfd_vma pc,
439
#else
440
    bfd_vma pc ATTRIBUTE_UNUSED,
441
#endif
442
    long *valuep)
443
277k
{
444
277k
  long value, mask;
445
446
  /* If LENGTH is zero, this operand doesn't contribute to the value
447
     so give it a standard value of zero.  */
448
277k
  if (length == 0)
449
0
    {
450
0
      *valuep = 0;
451
0
      return 1;
452
0
    }
453
454
277k
  if (word_length > 8 * sizeof (CGEN_INSN_INT))
455
0
    abort ();
456
457
  /* For architectures with insns smaller than the insn-base-bitsize,
458
     word_length may be too big.  */
459
277k
  if (cd->min_insn_bitsize < cd->base_insn_bitsize)
460
277k
    {
461
277k
      if (word_offset + word_length > total_length)
462
213k
  word_length = total_length - word_offset;
463
277k
    }
464
465
  /* Does the value reside in INSN_VALUE, and at the right alignment?  */
466
467
277k
  if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
468
233k
    {
469
233k
      if (CGEN_INSN_LSB0_P)
470
0
  value = insn_value >> ((word_offset + start + 1) - length);
471
233k
      else
472
233k
  value = insn_value >> (total_length - ( word_offset + start + length));
473
233k
    }
474
475
43.4k
#if ! CGEN_INT_INSN_P
476
477
43.4k
  else
478
43.4k
    {
479
43.4k
      unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
480
481
43.4k
      if (word_length > 8 * sizeof (CGEN_INSN_INT))
482
0
  abort ();
483
484
43.4k
      if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
485
6
  {
486
6
    *valuep = 0;
487
6
    return 0;
488
6
  }
489
490
43.4k
      value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
491
43.4k
    }
492
493
277k
#endif /* ! CGEN_INT_INSN_P */
494
495
  /* Written this way to avoid undefined behaviour.  */
496
277k
  mask = (1UL << (length - 1) << 1) - 1;
497
498
277k
  value &= mask;
499
  /* sign extend? */
500
277k
  if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
501
64.7k
      && (value & (1UL << (length - 1))))
502
26.4k
    value |= ~mask;
503
504
277k
  *valuep = value;
505
506
277k
  return 1;
507
277k
}
508
509
/* Default insn extractor.
510
511
   INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
512
   The extracted fields are stored in FIELDS.
513
   EX_INFO is used to handle reading variable length insns.
514
   Return the length of the insn in bits, or 0 if no match,
515
   or -1 if an error occurs fetching data (memory_error_func will have
516
   been called).  */
517
518
static int
519
extract_insn_normal (CGEN_CPU_DESC cd,
520
         const CGEN_INSN *insn,
521
         CGEN_EXTRACT_INFO *ex_info,
522
         CGEN_INSN_INT insn_value,
523
         CGEN_FIELDS *fields,
524
         bfd_vma pc)
525
271k
{
526
271k
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
527
271k
  const CGEN_SYNTAX_CHAR_TYPE *syn;
528
529
271k
  CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
530
531
271k
  CGEN_INIT_EXTRACT (cd);
532
533
1.58M
  for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
534
1.31M
    {
535
1.31M
      int length;
536
537
1.31M
      if (CGEN_SYNTAX_CHAR_P (*syn))
538
939k
  continue;
539
540
370k
      length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
541
370k
          ex_info, insn_value, fields, pc);
542
370k
      if (length <= 0)
543
6
  return length;
544
370k
    }
545
546
  /* We recognized and successfully extracted this insn.  */
547
271k
  return CGEN_INSN_BITSIZE (insn);
548
271k
}
549

550
/* Machine generated code added here.  */
551
552
const char * m32c_cgen_insert_operand
553
  (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
554
555
/* Main entry point for operand insertion.
556
557
   This function is basically just a big switch statement.  Earlier versions
558
   used tables to look up the function to use, but
559
   - if the table contains both assembler and disassembler functions then
560
     the disassembler contains much of the assembler and vice-versa,
561
   - there's a lot of inlining possibilities as things grow,
562
   - using a switch statement avoids the function call overhead.
563
564
   This function could be moved into `parse_insn_normal', but keeping it
565
   separate makes clear the interface between `parse_insn_normal' and each of
566
   the handlers.  It's also needed by GAS to insert operands that couldn't be
567
   resolved during parsing.  */
568
569
const char *
570
m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
571
           int opindex,
572
           CGEN_FIELDS * fields,
573
           CGEN_INSN_BYTES_PTR buffer,
574
           bfd_vma pc ATTRIBUTE_UNUSED)
575
0
{
576
0
  const char * errmsg = NULL;
577
0
  unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
578
579
0
  switch (opindex)
580
0
    {
581
0
    case M32C_OPERAND_A0 :
582
0
      break;
583
0
    case M32C_OPERAND_A1 :
584
0
      break;
585
0
    case M32C_OPERAND_AN16_PUSH_S :
586
0
      errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
587
0
      break;
588
0
    case M32C_OPERAND_BIT16AN :
589
0
      errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
590
0
      break;
591
0
    case M32C_OPERAND_BIT16RN :
592
0
      errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
593
0
      break;
594
0
    case M32C_OPERAND_BIT3_S :
595
0
      {
596
0
{
597
0
  FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
598
0
  FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
599
0
}
600
0
        errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
601
0
        if (errmsg)
602
0
          break;
603
0
        errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
604
0
        if (errmsg)
605
0
          break;
606
0
      }
607
0
      break;
608
0
    case M32C_OPERAND_BIT32ANPREFIXED :
609
0
      errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
610
0
      break;
611
0
    case M32C_OPERAND_BIT32ANUNPREFIXED :
612
0
      errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
613
0
      break;
614
0
    case M32C_OPERAND_BIT32RNPREFIXED :
615
0
      {
616
0
        long value = fields->f_dst32_rn_prefixed_QI;
617
0
        value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
618
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
619
0
      }
620
0
      break;
621
0
    case M32C_OPERAND_BIT32RNUNPREFIXED :
622
0
      {
623
0
        long value = fields->f_dst32_rn_unprefixed_QI;
624
0
        value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
625
0
        errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
626
0
      }
627
0
      break;
628
0
    case M32C_OPERAND_BITBASE16_16_S8 :
629
0
      errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
630
0
      break;
631
0
    case M32C_OPERAND_BITBASE16_16_U16 :
632
0
      {
633
0
        long value = fields->f_dsp_16_u16;
634
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
635
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
636
0
      }
637
0
      break;
638
0
    case M32C_OPERAND_BITBASE16_16_U8 :
639
0
      errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
640
0
      break;
641
0
    case M32C_OPERAND_BITBASE16_8_U11_S :
642
0
      {
643
0
{
644
0
  FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
645
0
  FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
646
0
}
647
0
        errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
648
0
        if (errmsg)
649
0
          break;
650
0
        errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
651
0
        if (errmsg)
652
0
          break;
653
0
      }
654
0
      break;
655
0
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
656
0
      {
657
0
{
658
0
  FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
659
0
  FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
660
0
}
661
0
        errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
662
0
        if (errmsg)
663
0
          break;
664
0
        errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
665
0
        if (errmsg)
666
0
          break;
667
0
      }
668
0
      break;
669
0
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
670
0
      {
671
0
{
672
0
  FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
673
0
  FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
674
0
}
675
0
        errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
676
0
        if (errmsg)
677
0
          break;
678
0
        {
679
0
        long value = fields->f_dsp_16_s16;
680
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
681
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
682
0
      }
683
0
        if (errmsg)
684
0
          break;
685
0
      }
686
0
      break;
687
0
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
688
0
      {
689
0
{
690
0
  FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
691
0
  FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
692
0
}
693
0
        errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
694
0
        if (errmsg)
695
0
          break;
696
0
        errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
697
0
        if (errmsg)
698
0
          break;
699
0
      }
700
0
      break;
701
0
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
702
0
      {
703
0
{
704
0
  FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
705
0
  FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
706
0
}
707
0
        errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
708
0
        if (errmsg)
709
0
          break;
710
0
        {
711
0
        long value = fields->f_dsp_16_u16;
712
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
713
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
714
0
      }
715
0
        if (errmsg)
716
0
          break;
717
0
      }
718
0
      break;
719
0
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
720
0
      {
721
0
{
722
0
  FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
723
0
  FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
724
0
  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
725
0
}
726
0
        errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
727
0
        if (errmsg)
728
0
          break;
729
0
        {
730
0
        long value = fields->f_dsp_16_u16;
731
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
732
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
733
0
      }
734
0
        if (errmsg)
735
0
          break;
736
0
        errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
737
0
        if (errmsg)
738
0
          break;
739
0
      }
740
0
      break;
741
0
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
742
0
      {
743
0
{
744
0
  FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
745
0
  FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
746
0
}
747
0
        errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
748
0
        if (errmsg)
749
0
          break;
750
0
        errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
751
0
        if (errmsg)
752
0
          break;
753
0
      }
754
0
      break;
755
0
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
756
0
      {
757
0
{
758
0
  FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
759
0
  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
760
0
  FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
761
0
}
762
0
        errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
763
0
        if (errmsg)
764
0
          break;
765
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
766
0
        if (errmsg)
767
0
          break;
768
0
        errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
769
0
        if (errmsg)
770
0
          break;
771
0
      }
772
0
      break;
773
0
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
774
0
      {
775
0
{
776
0
  FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
777
0
  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
778
0
}
779
0
        errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
780
0
        if (errmsg)
781
0
          break;
782
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
783
0
        if (errmsg)
784
0
          break;
785
0
      }
786
0
      break;
787
0
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
788
0
      {
789
0
{
790
0
  FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
791
0
  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
792
0
  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
793
0
}
794
0
        errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
795
0
        if (errmsg)
796
0
          break;
797
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
798
0
        if (errmsg)
799
0
          break;
800
0
        errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
801
0
        if (errmsg)
802
0
          break;
803
0
      }
804
0
      break;
805
0
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
806
0
      {
807
0
{
808
0
  FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
809
0
  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
810
0
  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
811
0
}
812
0
        errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
813
0
        if (errmsg)
814
0
          break;
815
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
816
0
        if (errmsg)
817
0
          break;
818
0
        {
819
0
        long value = fields->f_dsp_32_u16;
820
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
821
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
822
0
      }
823
0
        if (errmsg)
824
0
          break;
825
0
      }
826
0
      break;
827
0
    case M32C_OPERAND_BITNO16R :
828
0
      errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
829
0
      break;
830
0
    case M32C_OPERAND_BITNO32PREFIXED :
831
0
      errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
832
0
      break;
833
0
    case M32C_OPERAND_BITNO32UNPREFIXED :
834
0
      errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
835
0
      break;
836
0
    case M32C_OPERAND_DSP_10_U6 :
837
0
      errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
838
0
      break;
839
0
    case M32C_OPERAND_DSP_16_S16 :
840
0
      {
841
0
        long value = fields->f_dsp_16_s16;
842
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
843
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
844
0
      }
845
0
      break;
846
0
    case M32C_OPERAND_DSP_16_S8 :
847
0
      errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
848
0
      break;
849
0
    case M32C_OPERAND_DSP_16_U16 :
850
0
      {
851
0
        long value = fields->f_dsp_16_u16;
852
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
853
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
854
0
      }
855
0
      break;
856
0
    case M32C_OPERAND_DSP_16_U20 :
857
0
      {
858
0
{
859
0
  FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
860
0
  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
861
0
}
862
0
        {
863
0
        long value = fields->f_dsp_16_u16;
864
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
865
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
866
0
      }
867
0
        if (errmsg)
868
0
          break;
869
0
        errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
870
0
        if (errmsg)
871
0
          break;
872
0
      }
873
0
      break;
874
0
    case M32C_OPERAND_DSP_16_U24 :
875
0
      {
876
0
{
877
0
  FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
878
0
  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
879
0
}
880
0
        {
881
0
        long value = fields->f_dsp_16_u16;
882
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
883
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
884
0
      }
885
0
        if (errmsg)
886
0
          break;
887
0
        errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
888
0
        if (errmsg)
889
0
          break;
890
0
      }
891
0
      break;
892
0
    case M32C_OPERAND_DSP_16_U8 :
893
0
      errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
894
0
      break;
895
0
    case M32C_OPERAND_DSP_24_S16 :
896
0
      {
897
0
{
898
0
  FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
899
0
  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
900
0
}
901
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
902
0
        if (errmsg)
903
0
          break;
904
0
        errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
905
0
        if (errmsg)
906
0
          break;
907
0
      }
908
0
      break;
909
0
    case M32C_OPERAND_DSP_24_S8 :
910
0
      errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
911
0
      break;
912
0
    case M32C_OPERAND_DSP_24_U16 :
913
0
      {
914
0
{
915
0
  FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
916
0
  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255));
917
0
}
918
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
919
0
        if (errmsg)
920
0
          break;
921
0
        errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
922
0
        if (errmsg)
923
0
          break;
924
0
      }
925
0
      break;
926
0
    case M32C_OPERAND_DSP_24_U20 :
927
0
      {
928
0
{
929
0
  FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
930
0
  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
931
0
}
932
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
933
0
        if (errmsg)
934
0
          break;
935
0
        {
936
0
        long value = fields->f_dsp_32_u16;
937
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
938
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
939
0
      }
940
0
        if (errmsg)
941
0
          break;
942
0
      }
943
0
      break;
944
0
    case M32C_OPERAND_DSP_24_U24 :
945
0
      {
946
0
{
947
0
  FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
948
0
  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
949
0
}
950
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
951
0
        if (errmsg)
952
0
          break;
953
0
        {
954
0
        long value = fields->f_dsp_32_u16;
955
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
956
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
957
0
      }
958
0
        if (errmsg)
959
0
          break;
960
0
      }
961
0
      break;
962
0
    case M32C_OPERAND_DSP_24_U8 :
963
0
      errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
964
0
      break;
965
0
    case M32C_OPERAND_DSP_32_S16 :
966
0
      {
967
0
        long value = fields->f_dsp_32_s16;
968
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
969
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
970
0
      }
971
0
      break;
972
0
    case M32C_OPERAND_DSP_32_S8 :
973
0
      errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
974
0
      break;
975
0
    case M32C_OPERAND_DSP_32_U16 :
976
0
      {
977
0
        long value = fields->f_dsp_32_u16;
978
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
979
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
980
0
      }
981
0
      break;
982
0
    case M32C_OPERAND_DSP_32_U20 :
983
0
      {
984
0
        long value = fields->f_dsp_32_u24;
985
0
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
986
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
987
0
      }
988
0
      break;
989
0
    case M32C_OPERAND_DSP_32_U24 :
990
0
      {
991
0
        long value = fields->f_dsp_32_u24;
992
0
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
993
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
994
0
      }
995
0
      break;
996
0
    case M32C_OPERAND_DSP_32_U8 :
997
0
      errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
998
0
      break;
999
0
    case M32C_OPERAND_DSP_40_S16 :
1000
0
      {
1001
0
        long value = fields->f_dsp_40_s16;
1002
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1003
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1004
0
      }
1005
0
      break;
1006
0
    case M32C_OPERAND_DSP_40_S8 :
1007
0
      errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1008
0
      break;
1009
0
    case M32C_OPERAND_DSP_40_U16 :
1010
0
      {
1011
0
        long value = fields->f_dsp_40_u16;
1012
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1013
0
        errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1014
0
      }
1015
0
      break;
1016
0
    case M32C_OPERAND_DSP_40_U20 :
1017
0
      {
1018
0
        long value = fields->f_dsp_40_u20;
1019
0
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
1020
0
        errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
1021
0
      }
1022
0
      break;
1023
0
    case M32C_OPERAND_DSP_40_U24 :
1024
0
      {
1025
0
        long value = fields->f_dsp_40_u24;
1026
0
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1027
0
        errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1028
0
      }
1029
0
      break;
1030
0
    case M32C_OPERAND_DSP_40_U8 :
1031
0
      errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1032
0
      break;
1033
0
    case M32C_OPERAND_DSP_48_S16 :
1034
0
      {
1035
0
        long value = fields->f_dsp_48_s16;
1036
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1037
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1038
0
      }
1039
0
      break;
1040
0
    case M32C_OPERAND_DSP_48_S8 :
1041
0
      errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1042
0
      break;
1043
0
    case M32C_OPERAND_DSP_48_U16 :
1044
0
      {
1045
0
        long value = fields->f_dsp_48_u16;
1046
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1047
0
        errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1048
0
      }
1049
0
      break;
1050
0
    case M32C_OPERAND_DSP_48_U20 :
1051
0
      {
1052
0
{
1053
0
  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15));
1054
0
  FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
1055
0
}
1056
0
        {
1057
0
        long value = fields->f_dsp_48_u16;
1058
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1059
0
        errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1060
0
      }
1061
0
        if (errmsg)
1062
0
          break;
1063
0
        errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1064
0
        if (errmsg)
1065
0
          break;
1066
0
      }
1067
0
      break;
1068
0
    case M32C_OPERAND_DSP_48_U24 :
1069
0
      {
1070
0
{
1071
0
  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1072
0
  FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1073
0
}
1074
0
        {
1075
0
        long value = fields->f_dsp_48_u16;
1076
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1077
0
        errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1078
0
      }
1079
0
        if (errmsg)
1080
0
          break;
1081
0
        errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1082
0
        if (errmsg)
1083
0
          break;
1084
0
      }
1085
0
      break;
1086
0
    case M32C_OPERAND_DSP_48_U8 :
1087
0
      errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1088
0
      break;
1089
0
    case M32C_OPERAND_DSP_8_S24 :
1090
0
      {
1091
0
        long value = fields->f_dsp_8_s24;
1092
0
        value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608));
1093
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1094
0
      }
1095
0
      break;
1096
0
    case M32C_OPERAND_DSP_8_S8 :
1097
0
      errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1098
0
      break;
1099
0
    case M32C_OPERAND_DSP_8_U16 :
1100
0
      {
1101
0
        long value = fields->f_dsp_8_u16;
1102
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1103
0
        errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1104
0
      }
1105
0
      break;
1106
0
    case M32C_OPERAND_DSP_8_U24 :
1107
0
      {
1108
0
        long value = fields->f_dsp_8_u24;
1109
0
        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1110
0
        errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1111
0
      }
1112
0
      break;
1113
0
    case M32C_OPERAND_DSP_8_U6 :
1114
0
      errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1115
0
      break;
1116
0
    case M32C_OPERAND_DSP_8_U8 :
1117
0
      errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1118
0
      break;
1119
0
    case M32C_OPERAND_DST16AN :
1120
0
      errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1121
0
      break;
1122
0
    case M32C_OPERAND_DST16AN_S :
1123
0
      errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1124
0
      break;
1125
0
    case M32C_OPERAND_DST16ANHI :
1126
0
      errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1127
0
      break;
1128
0
    case M32C_OPERAND_DST16ANQI :
1129
0
      errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1130
0
      break;
1131
0
    case M32C_OPERAND_DST16ANQI_S :
1132
0
      errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1133
0
      break;
1134
0
    case M32C_OPERAND_DST16ANSI :
1135
0
      errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1136
0
      break;
1137
0
    case M32C_OPERAND_DST16RNEXTQI :
1138
0
      errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1139
0
      break;
1140
0
    case M32C_OPERAND_DST16RNHI :
1141
0
      errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1142
0
      break;
1143
0
    case M32C_OPERAND_DST16RNQI :
1144
0
      errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1145
0
      break;
1146
0
    case M32C_OPERAND_DST16RNQI_S :
1147
0
      errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1148
0
      break;
1149
0
    case M32C_OPERAND_DST16RNSI :
1150
0
      errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1151
0
      break;
1152
0
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1153
0
      errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1154
0
      break;
1155
0
    case M32C_OPERAND_DST32ANPREFIXED :
1156
0
      errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1157
0
      break;
1158
0
    case M32C_OPERAND_DST32ANPREFIXEDHI :
1159
0
      errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1160
0
      break;
1161
0
    case M32C_OPERAND_DST32ANPREFIXEDQI :
1162
0
      errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1163
0
      break;
1164
0
    case M32C_OPERAND_DST32ANPREFIXEDSI :
1165
0
      errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1166
0
      break;
1167
0
    case M32C_OPERAND_DST32ANUNPREFIXED :
1168
0
      errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1169
0
      break;
1170
0
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1171
0
      errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1172
0
      break;
1173
0
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1174
0
      errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1175
0
      break;
1176
0
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1177
0
      errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1178
0
      break;
1179
0
    case M32C_OPERAND_DST32R0HI_S :
1180
0
      break;
1181
0
    case M32C_OPERAND_DST32R0QI_S :
1182
0
      break;
1183
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1184
0
      errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1185
0
      break;
1186
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1187
0
      errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1188
0
      break;
1189
0
    case M32C_OPERAND_DST32RNPREFIXEDHI :
1190
0
      {
1191
0
        long value = fields->f_dst32_rn_prefixed_HI;
1192
0
        value = ((((value) + (2))) % (4));
1193
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1194
0
      }
1195
0
      break;
1196
0
    case M32C_OPERAND_DST32RNPREFIXEDQI :
1197
0
      {
1198
0
        long value = fields->f_dst32_rn_prefixed_QI;
1199
0
        value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1200
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1201
0
      }
1202
0
      break;
1203
0
    case M32C_OPERAND_DST32RNPREFIXEDSI :
1204
0
      {
1205
0
        long value = fields->f_dst32_rn_prefixed_SI;
1206
0
        value = ((value) + (2));
1207
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1208
0
      }
1209
0
      break;
1210
0
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1211
0
      {
1212
0
        long value = fields->f_dst32_rn_unprefixed_HI;
1213
0
        value = ((((value) + (2))) % (4));
1214
0
        errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1215
0
      }
1216
0
      break;
1217
0
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1218
0
      {
1219
0
        long value = fields->f_dst32_rn_unprefixed_QI;
1220
0
        value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1221
0
        errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1222
0
      }
1223
0
      break;
1224
0
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1225
0
      {
1226
0
        long value = fields->f_dst32_rn_unprefixed_SI;
1227
0
        value = ((value) + (2));
1228
0
        errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1229
0
      }
1230
0
      break;
1231
0
    case M32C_OPERAND_G :
1232
0
      break;
1233
0
    case M32C_OPERAND_IMM_12_S4 :
1234
0
      errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1235
0
      break;
1236
0
    case M32C_OPERAND_IMM_12_S4N :
1237
0
      errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1238
0
      break;
1239
0
    case M32C_OPERAND_IMM_13_U3 :
1240
0
      errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1241
0
      break;
1242
0
    case M32C_OPERAND_IMM_16_HI :
1243
0
      {
1244
0
        long value = fields->f_dsp_16_s16;
1245
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1246
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1247
0
      }
1248
0
      break;
1249
0
    case M32C_OPERAND_IMM_16_QI :
1250
0
      errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1251
0
      break;
1252
0
    case M32C_OPERAND_IMM_16_SI :
1253
0
      {
1254
0
{
1255
0
  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1256
0
  FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1257
0
}
1258
0
        {
1259
0
        long value = fields->f_dsp_16_u16;
1260
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1261
0
        errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1262
0
      }
1263
0
        if (errmsg)
1264
0
          break;
1265
0
        {
1266
0
        long value = fields->f_dsp_32_u16;
1267
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1268
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1269
0
      }
1270
0
        if (errmsg)
1271
0
          break;
1272
0
      }
1273
0
      break;
1274
0
    case M32C_OPERAND_IMM_20_S4 :
1275
0
      errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1276
0
      break;
1277
0
    case M32C_OPERAND_IMM_24_HI :
1278
0
      {
1279
0
{
1280
0
  FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1281
0
  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1282
0
}
1283
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1284
0
        if (errmsg)
1285
0
          break;
1286
0
        errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1287
0
        if (errmsg)
1288
0
          break;
1289
0
      }
1290
0
      break;
1291
0
    case M32C_OPERAND_IMM_24_QI :
1292
0
      errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1293
0
      break;
1294
0
    case M32C_OPERAND_IMM_24_SI :
1295
0
      {
1296
0
{
1297
0
  FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1298
0
  FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1299
0
}
1300
0
        errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1301
0
        if (errmsg)
1302
0
          break;
1303
0
        {
1304
0
        long value = fields->f_dsp_32_u24;
1305
0
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1306
0
        errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1307
0
      }
1308
0
        if (errmsg)
1309
0
          break;
1310
0
      }
1311
0
      break;
1312
0
    case M32C_OPERAND_IMM_32_HI :
1313
0
      {
1314
0
        long value = fields->f_dsp_32_s16;
1315
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1316
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1317
0
      }
1318
0
      break;
1319
0
    case M32C_OPERAND_IMM_32_QI :
1320
0
      errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1321
0
      break;
1322
0
    case M32C_OPERAND_IMM_32_SI :
1323
0
      {
1324
0
        long value = fields->f_dsp_32_s32;
1325
0
        value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) & (65280))) << (8))) | (((((value) & (255))) << (24)))))));
1326
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1327
0
      }
1328
0
      break;
1329
0
    case M32C_OPERAND_IMM_40_HI :
1330
0
      {
1331
0
        long value = fields->f_dsp_40_s16;
1332
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1333
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1334
0
      }
1335
0
      break;
1336
0
    case M32C_OPERAND_IMM_40_QI :
1337
0
      errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1338
0
      break;
1339
0
    case M32C_OPERAND_IMM_40_SI :
1340
0
      {
1341
0
{
1342
0
  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1343
0
  FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1344
0
}
1345
0
        {
1346
0
        long value = fields->f_dsp_40_u24;
1347
0
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1348
0
        errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1349
0
      }
1350
0
        if (errmsg)
1351
0
          break;
1352
0
        errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1353
0
        if (errmsg)
1354
0
          break;
1355
0
      }
1356
0
      break;
1357
0
    case M32C_OPERAND_IMM_48_HI :
1358
0
      {
1359
0
        long value = fields->f_dsp_48_s16;
1360
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1361
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1362
0
      }
1363
0
      break;
1364
0
    case M32C_OPERAND_IMM_48_QI :
1365
0
      errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1366
0
      break;
1367
0
    case M32C_OPERAND_IMM_48_SI :
1368
0
      {
1369
0
{
1370
0
  FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1371
0
  FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1372
0
}
1373
0
        {
1374
0
        long value = fields->f_dsp_48_u16;
1375
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1376
0
        errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1377
0
      }
1378
0
        if (errmsg)
1379
0
          break;
1380
0
        {
1381
0
        long value = fields->f_dsp_64_u16;
1382
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1383
0
        errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1384
0
      }
1385
0
        if (errmsg)
1386
0
          break;
1387
0
      }
1388
0
      break;
1389
0
    case M32C_OPERAND_IMM_56_HI :
1390
0
      {
1391
0
{
1392
0
  FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1393
0
  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1394
0
}
1395
0
        errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1396
0
        if (errmsg)
1397
0
          break;
1398
0
        errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1399
0
        if (errmsg)
1400
0
          break;
1401
0
      }
1402
0
      break;
1403
0
    case M32C_OPERAND_IMM_56_QI :
1404
0
      errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1405
0
      break;
1406
0
    case M32C_OPERAND_IMM_64_HI :
1407
0
      {
1408
0
        long value = fields->f_dsp_64_s16;
1409
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1410
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1411
0
      }
1412
0
      break;
1413
0
    case M32C_OPERAND_IMM_8_HI :
1414
0
      {
1415
0
        long value = fields->f_dsp_8_s16;
1416
0
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1417
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1418
0
      }
1419
0
      break;
1420
0
    case M32C_OPERAND_IMM_8_QI :
1421
0
      errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1422
0
      break;
1423
0
    case M32C_OPERAND_IMM_8_S4 :
1424
0
      errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1425
0
      break;
1426
0
    case M32C_OPERAND_IMM_8_S4N :
1427
0
      errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1428
0
      break;
1429
0
    case M32C_OPERAND_IMM_SH_12_S4 :
1430
0
      errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1431
0
      break;
1432
0
    case M32C_OPERAND_IMM_SH_20_S4 :
1433
0
      errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1434
0
      break;
1435
0
    case M32C_OPERAND_IMM_SH_8_S4 :
1436
0
      errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1437
0
      break;
1438
0
    case M32C_OPERAND_IMM1_S :
1439
0
      {
1440
0
        long value = fields->f_imm1_S;
1441
0
        value = ((value) - (1));
1442
0
        errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1443
0
      }
1444
0
      break;
1445
0
    case M32C_OPERAND_IMM3_S :
1446
0
      {
1447
0
{
1448
0
  FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1449
0
  FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1450
0
}
1451
0
        errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1452
0
        if (errmsg)
1453
0
          break;
1454
0
        errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1455
0
        if (errmsg)
1456
0
          break;
1457
0
      }
1458
0
      break;
1459
0
    case M32C_OPERAND_LAB_16_8 :
1460
0
      {
1461
0
        long value = fields->f_lab_16_8;
1462
0
        value = ((value) - (((pc) + (2))));
1463
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1464
0
      }
1465
0
      break;
1466
0
    case M32C_OPERAND_LAB_24_8 :
1467
0
      {
1468
0
        long value = fields->f_lab_24_8;
1469
0
        value = ((value) - (((pc) + (2))));
1470
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1471
0
      }
1472
0
      break;
1473
0
    case M32C_OPERAND_LAB_32_8 :
1474
0
      {
1475
0
        long value = fields->f_lab_32_8;
1476
0
        value = ((value) - (((pc) + (2))));
1477
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1478
0
      }
1479
0
      break;
1480
0
    case M32C_OPERAND_LAB_40_8 :
1481
0
      {
1482
0
        long value = fields->f_lab_40_8;
1483
0
        value = ((value) - (((pc) + (2))));
1484
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1485
0
      }
1486
0
      break;
1487
0
    case M32C_OPERAND_LAB_5_3 :
1488
0
      {
1489
0
        long value = fields->f_lab_5_3;
1490
0
        value = ((value) - (((pc) + (2))));
1491
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1492
0
      }
1493
0
      break;
1494
0
    case M32C_OPERAND_LAB_8_16 :
1495
0
      {
1496
0
        long value = fields->f_lab_8_16;
1497
0
        value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65280))) >> (8))));
1498
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1499
0
      }
1500
0
      break;
1501
0
    case M32C_OPERAND_LAB_8_24 :
1502
0
      {
1503
0
        long value = fields->f_lab_8_24;
1504
0
        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1505
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1506
0
      }
1507
0
      break;
1508
0
    case M32C_OPERAND_LAB_8_8 :
1509
0
      {
1510
0
        long value = fields->f_lab_8_8;
1511
0
        value = ((value) - (((pc) + (1))));
1512
0
        errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1513
0
      }
1514
0
      break;
1515
0
    case M32C_OPERAND_LAB32_JMP_S :
1516
0
      {
1517
0
{
1518
0
  SI tmp_val;
1519
0
  tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1520
0
  FLD (f_7_1) = ((tmp_val) & (1));
1521
0
  FLD (f_2_2) = ((USI) (tmp_val) >> (1));
1522
0
}
1523
0
        errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1524
0
        if (errmsg)
1525
0
          break;
1526
0
        errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1527
0
        if (errmsg)
1528
0
          break;
1529
0
      }
1530
0
      break;
1531
0
    case M32C_OPERAND_Q :
1532
0
      break;
1533
0
    case M32C_OPERAND_R0 :
1534
0
      break;
1535
0
    case M32C_OPERAND_R0H :
1536
0
      break;
1537
0
    case M32C_OPERAND_R0L :
1538
0
      break;
1539
0
    case M32C_OPERAND_R1 :
1540
0
      break;
1541
0
    case M32C_OPERAND_R1R2R0 :
1542
0
      break;
1543
0
    case M32C_OPERAND_R2 :
1544
0
      break;
1545
0
    case M32C_OPERAND_R2R0 :
1546
0
      break;
1547
0
    case M32C_OPERAND_R3 :
1548
0
      break;
1549
0
    case M32C_OPERAND_R3R1 :
1550
0
      break;
1551
0
    case M32C_OPERAND_REGSETPOP :
1552
0
      errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1553
0
      break;
1554
0
    case M32C_OPERAND_REGSETPUSH :
1555
0
      errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1556
0
      break;
1557
0
    case M32C_OPERAND_RN16_PUSH_S :
1558
0
      errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1559
0
      break;
1560
0
    case M32C_OPERAND_S :
1561
0
      break;
1562
0
    case M32C_OPERAND_SRC16AN :
1563
0
      errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1564
0
      break;
1565
0
    case M32C_OPERAND_SRC16ANHI :
1566
0
      errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1567
0
      break;
1568
0
    case M32C_OPERAND_SRC16ANQI :
1569
0
      errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1570
0
      break;
1571
0
    case M32C_OPERAND_SRC16RNHI :
1572
0
      errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1573
0
      break;
1574
0
    case M32C_OPERAND_SRC16RNQI :
1575
0
      errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1576
0
      break;
1577
0
    case M32C_OPERAND_SRC32ANPREFIXED :
1578
0
      errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1579
0
      break;
1580
0
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
1581
0
      errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1582
0
      break;
1583
0
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
1584
0
      errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1585
0
      break;
1586
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
1587
0
      errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1588
0
      break;
1589
0
    case M32C_OPERAND_SRC32ANUNPREFIXED :
1590
0
      errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1591
0
      break;
1592
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1593
0
      errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1594
0
      break;
1595
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1596
0
      errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1597
0
      break;
1598
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1599
0
      errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1600
0
      break;
1601
0
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
1602
0
      {
1603
0
        long value = fields->f_src32_rn_prefixed_HI;
1604
0
        value = ((((value) + (2))) % (4));
1605
0
        errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1606
0
      }
1607
0
      break;
1608
0
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
1609
0
      {
1610
0
        long value = fields->f_src32_rn_prefixed_QI;
1611
0
        value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1612
0
        errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1613
0
      }
1614
0
      break;
1615
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
1616
0
      {
1617
0
        long value = fields->f_src32_rn_prefixed_SI;
1618
0
        value = ((value) + (2));
1619
0
        errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1620
0
      }
1621
0
      break;
1622
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1623
0
      {
1624
0
        long value = fields->f_src32_rn_unprefixed_HI;
1625
0
        value = ((((value) + (2))) % (4));
1626
0
        errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1627
0
      }
1628
0
      break;
1629
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1630
0
      {
1631
0
        long value = fields->f_src32_rn_unprefixed_QI;
1632
0
        value = (((((~ (((value) << (1))))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1633
0
        errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1634
0
      }
1635
0
      break;
1636
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1637
0
      {
1638
0
        long value = fields->f_src32_rn_unprefixed_SI;
1639
0
        value = ((value) + (2));
1640
0
        errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1641
0
      }
1642
0
      break;
1643
0
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1644
0
      errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1645
0
      break;
1646
0
    case M32C_OPERAND_X :
1647
0
      break;
1648
0
    case M32C_OPERAND_Z :
1649
0
      break;
1650
0
    case M32C_OPERAND_COND16_16 :
1651
0
      errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1652
0
      break;
1653
0
    case M32C_OPERAND_COND16_24 :
1654
0
      errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1655
0
      break;
1656
0
    case M32C_OPERAND_COND16_32 :
1657
0
      errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1658
0
      break;
1659
0
    case M32C_OPERAND_COND16C :
1660
0
      errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1661
0
      break;
1662
0
    case M32C_OPERAND_COND16J :
1663
0
      errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1664
0
      break;
1665
0
    case M32C_OPERAND_COND16J5 :
1666
0
      errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1667
0
      break;
1668
0
    case M32C_OPERAND_COND32 :
1669
0
      {
1670
0
{
1671
0
  FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1));
1672
0
  FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1673
0
}
1674
0
        errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1675
0
        if (errmsg)
1676
0
          break;
1677
0
        errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1678
0
        if (errmsg)
1679
0
          break;
1680
0
      }
1681
0
      break;
1682
0
    case M32C_OPERAND_COND32_16 :
1683
0
      errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1684
0
      break;
1685
0
    case M32C_OPERAND_COND32_24 :
1686
0
      errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1687
0
      break;
1688
0
    case M32C_OPERAND_COND32_32 :
1689
0
      errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1690
0
      break;
1691
0
    case M32C_OPERAND_COND32_40 :
1692
0
      errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1693
0
      break;
1694
0
    case M32C_OPERAND_COND32J :
1695
0
      {
1696
0
{
1697
0
  FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7));
1698
0
  FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1699
0
}
1700
0
        errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1701
0
        if (errmsg)
1702
0
          break;
1703
0
        errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1704
0
        if (errmsg)
1705
0
          break;
1706
0
      }
1707
0
      break;
1708
0
    case M32C_OPERAND_CR1_PREFIXED_32 :
1709
0
      errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1710
0
      break;
1711
0
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
1712
0
      errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1713
0
      break;
1714
0
    case M32C_OPERAND_CR16 :
1715
0
      errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1716
0
      break;
1717
0
    case M32C_OPERAND_CR2_32 :
1718
0
      errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1719
0
      break;
1720
0
    case M32C_OPERAND_CR3_PREFIXED_32 :
1721
0
      errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1722
0
      break;
1723
0
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
1724
0
      errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1725
0
      break;
1726
0
    case M32C_OPERAND_FLAGS16 :
1727
0
      errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1728
0
      break;
1729
0
    case M32C_OPERAND_FLAGS32 :
1730
0
      errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1731
0
      break;
1732
0
    case M32C_OPERAND_SCCOND32 :
1733
0
      errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1734
0
      break;
1735
0
    case M32C_OPERAND_SIZE :
1736
0
      break;
1737
1738
0
    default :
1739
      /* xgettext:c-format */
1740
0
      opcodes_error_handler
1741
0
  (_("internal error: unrecognized field %d while building insn"),
1742
0
   opindex);
1743
0
      abort ();
1744
0
  }
1745
1746
0
  return errmsg;
1747
0
}
1748
1749
int m32c_cgen_extract_operand
1750
  (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1751
1752
/* Main entry point for operand extraction.
1753
   The result is <= 0 for error, >0 for success.
1754
   ??? Actual values aren't well defined right now.
1755
1756
   This function is basically just a big switch statement.  Earlier versions
1757
   used tables to look up the function to use, but
1758
   - if the table contains both assembler and disassembler functions then
1759
     the disassembler contains much of the assembler and vice-versa,
1760
   - there's a lot of inlining possibilities as things grow,
1761
   - using a switch statement avoids the function call overhead.
1762
1763
   This function could be moved into `print_insn_normal', but keeping it
1764
   separate makes clear the interface between `print_insn_normal' and each of
1765
   the handlers.  */
1766
1767
int
1768
m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1769
           int opindex,
1770
           CGEN_EXTRACT_INFO *ex_info,
1771
           CGEN_INSN_INT insn_value,
1772
           CGEN_FIELDS * fields,
1773
           bfd_vma pc)
1774
370k
{
1775
  /* Assume success (for those operands that are nops).  */
1776
370k
  int length = 1;
1777
370k
  unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1778
1779
370k
  switch (opindex)
1780
370k
    {
1781
0
    case M32C_OPERAND_A0 :
1782
0
      break;
1783
0
    case M32C_OPERAND_A1 :
1784
0
      break;
1785
2.17k
    case M32C_OPERAND_AN16_PUSH_S :
1786
2.17k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1787
2.17k
      break;
1788
264
    case M32C_OPERAND_BIT16AN :
1789
264
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1790
264
      break;
1791
405
    case M32C_OPERAND_BIT16RN :
1792
405
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1793
405
      break;
1794
2.50k
    case M32C_OPERAND_BIT3_S :
1795
2.50k
      {
1796
2.50k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1797
2.50k
        if (length <= 0) break;
1798
2.50k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1799
2.50k
        if (length <= 0) break;
1800
2.50k
{
1801
2.50k
  FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1802
2.50k
}
1803
2.50k
      }
1804
0
      break;
1805
471
    case M32C_OPERAND_BIT32ANPREFIXED :
1806
471
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1807
471
      break;
1808
732
    case M32C_OPERAND_BIT32ANUNPREFIXED :
1809
732
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1810
732
      break;
1811
63
    case M32C_OPERAND_BIT32RNPREFIXED :
1812
63
      {
1813
63
        long value;
1814
63
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1815
63
        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1816
63
        fields->f_dst32_rn_prefixed_QI = value;
1817
63
      }
1818
63
      break;
1819
561
    case M32C_OPERAND_BIT32RNUNPREFIXED :
1820
561
      {
1821
561
        long value;
1822
561
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1823
561
        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1824
561
        fields->f_dst32_rn_unprefixed_QI = value;
1825
561
      }
1826
561
      break;
1827
36
    case M32C_OPERAND_BITBASE16_16_S8 :
1828
36
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1829
36
      break;
1830
300
    case M32C_OPERAND_BITBASE16_16_U16 :
1831
300
      {
1832
300
        long value;
1833
300
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1834
300
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1835
300
        fields->f_dsp_16_u16 = value;
1836
300
      }
1837
300
      break;
1838
630
    case M32C_OPERAND_BITBASE16_16_U8 :
1839
630
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1840
630
      break;
1841
7.95k
    case M32C_OPERAND_BITBASE16_8_U11_S :
1842
7.95k
      {
1843
7.95k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1844
7.95k
        if (length <= 0) break;
1845
7.95k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1846
7.95k
        if (length <= 0) break;
1847
7.95k
{
1848
7.95k
  FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1849
7.95k
}
1850
7.95k
      }
1851
0
      break;
1852
350
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1853
350
      {
1854
350
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1855
350
        if (length <= 0) break;
1856
350
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1857
350
        if (length <= 0) break;
1858
350
{
1859
350
  FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) * (8))) | (FLD (f_bitno32_unprefixed)));
1860
350
}
1861
350
      }
1862
0
      break;
1863
142
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1864
142
      {
1865
142
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1866
142
        if (length <= 0) break;
1867
142
        {
1868
142
        long value;
1869
142
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1870
142
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
1871
142
        fields->f_dsp_16_s16 = value;
1872
142
      }
1873
142
        if (length <= 0) break;
1874
142
{
1875
142
  FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) * (8))) | (FLD (f_bitno32_unprefixed)));
1876
142
}
1877
142
      }
1878
0
      break;
1879
167
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1880
167
      {
1881
167
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1882
167
        if (length <= 0) break;
1883
167
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1884
167
        if (length <= 0) break;
1885
167
{
1886
167
  FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1887
167
}
1888
167
      }
1889
0
      break;
1890
571
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1891
571
      {
1892
571
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1893
571
        if (length <= 0) break;
1894
571
        {
1895
571
        long value;
1896
571
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1897
571
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1898
571
        fields->f_dsp_16_u16 = value;
1899
571
      }
1900
571
        if (length <= 0) break;
1901
571
{
1902
571
  FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1903
571
}
1904
571
      }
1905
0
      break;
1906
399
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1907
399
      {
1908
399
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1909
399
        if (length <= 0) break;
1910
399
        {
1911
399
        long value;
1912
399
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1913
399
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1914
399
        fields->f_dsp_16_u16 = value;
1915
399
      }
1916
399
        if (length <= 0) break;
1917
399
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1918
399
        if (length <= 0) break;
1919
399
{
1920
399
  FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1921
399
}
1922
399
      }
1923
0
      break;
1924
96
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1925
96
      {
1926
96
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1927
96
        if (length <= 0) break;
1928
96
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1929
96
        if (length <= 0) break;
1930
96
{
1931
96
  FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) * (8))) | (FLD (f_bitno32_prefixed)));
1932
96
}
1933
96
      }
1934
0
      break;
1935
83
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1936
83
      {
1937
83
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1938
83
        if (length <= 0) break;
1939
83
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1940
83
        if (length <= 0) break;
1941
83
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1942
83
        if (length <= 0) break;
1943
83
{
1944
83
  FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) * (2048))) | (FLD (f_bitno32_prefixed)))));
1945
83
}
1946
83
      }
1947
0
      break;
1948
154
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1949
154
      {
1950
154
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1951
154
        if (length <= 0) break;
1952
154
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1953
154
        if (length <= 0) break;
1954
154
{
1955
154
  FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1956
154
}
1957
154
      }
1958
0
      break;
1959
78
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1960
78
      {
1961
78
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1962
78
        if (length <= 0) break;
1963
78
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1964
78
        if (length <= 0) break;
1965
78
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1966
78
        if (length <= 0) break;
1967
78
{
1968
78
  FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1969
78
}
1970
78
      }
1971
0
      break;
1972
148
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1973
148
      {
1974
148
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1975
148
        if (length <= 0) break;
1976
148
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1977
148
        if (length <= 0) break;
1978
148
        {
1979
148
        long value;
1980
148
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1981
148
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
1982
148
        fields->f_dsp_32_u16 = value;
1983
148
      }
1984
148
        if (length <= 0) break;
1985
148
{
1986
148
  FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1987
148
}
1988
148
      }
1989
0
      break;
1990
482
    case M32C_OPERAND_BITNO16R :
1991
482
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1992
482
      break;
1993
183
    case M32C_OPERAND_BITNO32PREFIXED :
1994
183
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1995
183
      break;
1996
722
    case M32C_OPERAND_BITNO32UNPREFIXED :
1997
722
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1998
722
      break;
1999
1.65k
    case M32C_OPERAND_DSP_10_U6 :
2000
1.65k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
2001
1.65k
      break;
2002
973
    case M32C_OPERAND_DSP_16_S16 :
2003
973
      {
2004
973
        long value;
2005
973
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2006
973
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2007
973
        fields->f_dsp_16_s16 = value;
2008
973
      }
2009
973
      break;
2010
4.33k
    case M32C_OPERAND_DSP_16_S8 :
2011
4.33k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2012
4.33k
      break;
2013
9.59k
    case M32C_OPERAND_DSP_16_U16 :
2014
9.59k
      {
2015
9.59k
        long value;
2016
9.59k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2017
9.59k
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2018
9.59k
        fields->f_dsp_16_u16 = value;
2019
9.59k
      }
2020
9.59k
      break;
2021
279
    case M32C_OPERAND_DSP_16_U20 :
2022
279
      {
2023
279
        {
2024
279
        long value;
2025
279
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2026
279
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2027
279
        fields->f_dsp_16_u16 = value;
2028
279
      }
2029
279
        if (length <= 0) break;
2030
279
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2031
279
        if (length <= 0) break;
2032
279
{
2033
279
  FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2034
279
}
2035
279
      }
2036
0
      break;
2037
2.40k
    case M32C_OPERAND_DSP_16_U24 :
2038
2.40k
      {
2039
2.40k
        {
2040
2.40k
        long value;
2041
2.40k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2042
2.40k
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2043
2.40k
        fields->f_dsp_16_u16 = value;
2044
2.40k
      }
2045
2.40k
        if (length <= 0) break;
2046
2.40k
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2047
2.40k
        if (length <= 0) break;
2048
2.40k
{
2049
2.40k
  FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2050
2.40k
}
2051
2.40k
      }
2052
0
      break;
2053
8.72k
    case M32C_OPERAND_DSP_16_U8 :
2054
8.72k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2055
8.72k
      break;
2056
212
    case M32C_OPERAND_DSP_24_S16 :
2057
212
      {
2058
212
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2059
212
        if (length <= 0) break;
2060
212
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2061
212
        if (length <= 0) break;
2062
212
{
2063
212
  FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2064
212
}
2065
212
      }
2066
0
      break;
2067
118
    case M32C_OPERAND_DSP_24_S8 :
2068
118
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2069
118
      break;
2070
908
    case M32C_OPERAND_DSP_24_U16 :
2071
908
      {
2072
908
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2073
908
        if (length <= 0) break;
2074
908
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2075
908
        if (length <= 0) break;
2076
908
{
2077
908
  FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2078
908
}
2079
908
      }
2080
0
      break;
2081
338
    case M32C_OPERAND_DSP_24_U20 :
2082
338
      {
2083
338
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2084
338
        if (length <= 0) break;
2085
338
        {
2086
338
        long value;
2087
338
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2088
338
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2089
338
        fields->f_dsp_32_u16 = value;
2090
338
      }
2091
338
        if (length <= 0) break;
2092
338
{
2093
338
  FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2094
338
}
2095
338
      }
2096
0
      break;
2097
1.88k
    case M32C_OPERAND_DSP_24_U24 :
2098
1.88k
      {
2099
1.88k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2100
1.88k
        if (length <= 0) break;
2101
1.88k
        {
2102
1.88k
        long value;
2103
1.88k
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2104
1.88k
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2105
1.88k
        fields->f_dsp_32_u16 = value;
2106
1.88k
      }
2107
1.88k
        if (length <= 0) break;
2108
1.87k
{
2109
1.87k
  FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2110
1.87k
}
2111
1.87k
      }
2112
0
      break;
2113
1.00k
    case M32C_OPERAND_DSP_24_U8 :
2114
1.00k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2115
1.00k
      break;
2116
62
    case M32C_OPERAND_DSP_32_S16 :
2117
62
      {
2118
62
        long value;
2119
62
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2120
62
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2121
62
        fields->f_dsp_32_s16 = value;
2122
62
      }
2123
62
      break;
2124
161
    case M32C_OPERAND_DSP_32_S8 :
2125
161
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2126
161
      break;
2127
1.14k
    case M32C_OPERAND_DSP_32_U16 :
2128
1.14k
      {
2129
1.14k
        long value;
2130
1.14k
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2131
1.14k
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2132
1.14k
        fields->f_dsp_32_u16 = value;
2133
1.14k
      }
2134
1.14k
      break;
2135
41
    case M32C_OPERAND_DSP_32_U20 :
2136
41
      {
2137
41
        long value;
2138
41
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2139
41
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2140
41
        fields->f_dsp_32_u24 = value;
2141
41
      }
2142
41
      break;
2143
650
    case M32C_OPERAND_DSP_32_U24 :
2144
650
      {
2145
650
        long value;
2146
650
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2147
650
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2148
650
        fields->f_dsp_32_u24 = value;
2149
650
      }
2150
650
      break;
2151
791
    case M32C_OPERAND_DSP_32_U8 :
2152
791
      length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2153
791
      break;
2154
79
    case M32C_OPERAND_DSP_40_S16 :
2155
79
      {
2156
79
        long value;
2157
79
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2158
79
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2159
79
        fields->f_dsp_40_s16 = value;
2160
79
      }
2161
79
      break;
2162
121
    case M32C_OPERAND_DSP_40_S8 :
2163
121
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2164
121
      break;
2165
245
    case M32C_OPERAND_DSP_40_U16 :
2166
245
      {
2167
245
        long value;
2168
245
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2169
245
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2170
245
        fields->f_dsp_40_u16 = value;
2171
245
      }
2172
245
      break;
2173
0
    case M32C_OPERAND_DSP_40_U20 :
2174
0
      {
2175
0
        long value;
2176
0
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
2177
0
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
2178
0
        fields->f_dsp_40_u20 = value;
2179
0
      }
2180
0
      break;
2181
132
    case M32C_OPERAND_DSP_40_U24 :
2182
132
      {
2183
132
        long value;
2184
132
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2185
132
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2186
132
        fields->f_dsp_40_u24 = value;
2187
132
      }
2188
132
      break;
2189
211
    case M32C_OPERAND_DSP_40_U8 :
2190
211
      length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2191
211
      break;
2192
344
    case M32C_OPERAND_DSP_48_S16 :
2193
344
      {
2194
344
        long value;
2195
344
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2196
344
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2197
344
        fields->f_dsp_48_s16 = value;
2198
344
      }
2199
344
      break;
2200
57
    case M32C_OPERAND_DSP_48_S8 :
2201
57
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2202
57
      break;
2203
345
    case M32C_OPERAND_DSP_48_U16 :
2204
345
      {
2205
345
        long value;
2206
345
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2207
345
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2208
345
        fields->f_dsp_48_u16 = value;
2209
345
      }
2210
345
      break;
2211
0
    case M32C_OPERAND_DSP_48_U20 :
2212
0
      {
2213
0
        {
2214
0
        long value;
2215
0
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2216
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2217
0
        fields->f_dsp_48_u16 = value;
2218
0
      }
2219
0
        if (length <= 0) break;
2220
0
        length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2221
0
        if (length <= 0) break;
2222
0
{
2223
0
  FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040))));
2224
0
}
2225
0
      }
2226
0
      break;
2227
97
    case M32C_OPERAND_DSP_48_U24 :
2228
97
      {
2229
97
        {
2230
97
        long value;
2231
97
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2232
97
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2233
97
        fields->f_dsp_48_u16 = value;
2234
97
      }
2235
97
        if (length <= 0) break;
2236
97
        length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2237
97
        if (length <= 0) break;
2238
97
{
2239
97
  FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2240
97
}
2241
97
      }
2242
0
      break;
2243
35
    case M32C_OPERAND_DSP_48_U8 :
2244
35
      length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2245
35
      break;
2246
99
    case M32C_OPERAND_DSP_8_S24 :
2247
99
      {
2248
99
        long value;
2249
99
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2250
99
        value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608));
2251
99
        fields->f_dsp_8_s24 = value;
2252
99
      }
2253
99
      break;
2254
15.0k
    case M32C_OPERAND_DSP_8_S8 :
2255
15.0k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2256
15.0k
      break;
2257
11.6k
    case M32C_OPERAND_DSP_8_U16 :
2258
11.6k
      {
2259
11.6k
        long value;
2260
11.6k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2261
11.6k
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2262
11.6k
        fields->f_dsp_8_u16 = value;
2263
11.6k
      }
2264
11.6k
      break;
2265
0
    case M32C_OPERAND_DSP_8_U24 :
2266
0
      {
2267
0
        long value;
2268
0
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2269
0
        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2270
0
        fields->f_dsp_8_u24 = value;
2271
0
      }
2272
0
      break;
2273
80
    case M32C_OPERAND_DSP_8_U6 :
2274
80
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2275
80
      break;
2276
19.1k
    case M32C_OPERAND_DSP_8_U8 :
2277
19.1k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2278
19.1k
      break;
2279
4.53k
    case M32C_OPERAND_DST16AN :
2280
4.53k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2281
4.53k
      break;
2282
1.14k
    case M32C_OPERAND_DST16AN_S :
2283
1.14k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2284
1.14k
      break;
2285
668
    case M32C_OPERAND_DST16ANHI :
2286
668
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2287
668
      break;
2288
990
    case M32C_OPERAND_DST16ANQI :
2289
990
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2290
990
      break;
2291
2.42k
    case M32C_OPERAND_DST16ANQI_S :
2292
2.42k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2293
2.42k
      break;
2294
144
    case M32C_OPERAND_DST16ANSI :
2295
144
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2296
144
      break;
2297
33
    case M32C_OPERAND_DST16RNEXTQI :
2298
33
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2299
33
      break;
2300
1.60k
    case M32C_OPERAND_DST16RNHI :
2301
1.60k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2302
1.60k
      break;
2303
3.55k
    case M32C_OPERAND_DST16RNQI :
2304
3.55k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2305
3.55k
      break;
2306
15.0k
    case M32C_OPERAND_DST16RNQI_S :
2307
15.0k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2308
15.0k
      break;
2309
142
    case M32C_OPERAND_DST16RNSI :
2310
142
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2311
142
      break;
2312
38
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2313
38
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2314
38
      break;
2315
894
    case M32C_OPERAND_DST32ANPREFIXED :
2316
894
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2317
894
      break;
2318
225
    case M32C_OPERAND_DST32ANPREFIXEDHI :
2319
225
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2320
225
      break;
2321
331
    case M32C_OPERAND_DST32ANPREFIXEDQI :
2322
331
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2323
331
      break;
2324
64
    case M32C_OPERAND_DST32ANPREFIXEDSI :
2325
64
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2326
64
      break;
2327
7.34k
    case M32C_OPERAND_DST32ANUNPREFIXED :
2328
7.34k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2329
7.34k
      break;
2330
709
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2331
709
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2332
709
      break;
2333
556
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2334
556
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2335
556
      break;
2336
2.41k
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2337
2.41k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2338
2.41k
      break;
2339
2.48k
    case M32C_OPERAND_DST32R0HI_S :
2340
2.48k
      break;
2341
654
    case M32C_OPERAND_DST32R0QI_S :
2342
654
      break;
2343
38
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2344
38
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2345
38
      break;
2346
21
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2347
21
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2348
21
      break;
2349
88
    case M32C_OPERAND_DST32RNPREFIXEDHI :
2350
88
      {
2351
88
        long value;
2352
88
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2353
88
        value = ((((value) + (2))) % (4));
2354
88
        fields->f_dst32_rn_prefixed_HI = value;
2355
88
      }
2356
88
      break;
2357
122
    case M32C_OPERAND_DST32RNPREFIXEDQI :
2358
122
      {
2359
122
        long value;
2360
122
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2361
122
        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2362
122
        fields->f_dst32_rn_prefixed_QI = value;
2363
122
      }
2364
122
      break;
2365
38
    case M32C_OPERAND_DST32RNPREFIXEDSI :
2366
38
      {
2367
38
        long value;
2368
38
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2369
38
        value = ((value) - (2));
2370
38
        fields->f_dst32_rn_prefixed_SI = value;
2371
38
      }
2372
38
      break;
2373
2.83k
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2374
2.83k
      {
2375
2.83k
        long value;
2376
2.83k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2377
2.83k
        value = ((((value) + (2))) % (4));
2378
2.83k
        fields->f_dst32_rn_unprefixed_HI = value;
2379
2.83k
      }
2380
2.83k
      break;
2381
1.02k
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2382
1.02k
      {
2383
1.02k
        long value;
2384
1.02k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2385
1.02k
        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2386
1.02k
        fields->f_dst32_rn_unprefixed_QI = value;
2387
1.02k
      }
2388
1.02k
      break;
2389
1.17k
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2390
1.17k
      {
2391
1.17k
        long value;
2392
1.17k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2393
1.17k
        value = ((value) - (2));
2394
1.17k
        fields->f_dst32_rn_unprefixed_SI = value;
2395
1.17k
      }
2396
1.17k
      break;
2397
20.0k
    case M32C_OPERAND_G :
2398
20.0k
      break;
2399
1.89k
    case M32C_OPERAND_IMM_12_S4 :
2400
1.89k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2401
1.89k
      break;
2402
619
    case M32C_OPERAND_IMM_12_S4N :
2403
619
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2404
619
      break;
2405
24
    case M32C_OPERAND_IMM_13_U3 :
2406
24
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2407
24
      break;
2408
2.97k
    case M32C_OPERAND_IMM_16_HI :
2409
2.97k
      {
2410
2.97k
        long value;
2411
2.97k
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2412
2.97k
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2413
2.97k
        fields->f_dsp_16_s16 = value;
2414
2.97k
      }
2415
2.97k
      break;
2416
6.24k
    case M32C_OPERAND_IMM_16_QI :
2417
6.24k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2418
6.24k
      break;
2419
60
    case M32C_OPERAND_IMM_16_SI :
2420
60
      {
2421
60
        {
2422
60
        long value;
2423
60
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2424
60
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2425
60
        fields->f_dsp_16_u16 = value;
2426
60
      }
2427
60
        if (length <= 0) break;
2428
60
        {
2429
60
        long value;
2430
60
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2431
60
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2432
60
        fields->f_dsp_32_u16 = value;
2433
60
      }
2434
60
        if (length <= 0) break;
2435
60
{
2436
60
  FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2437
60
}
2438
60
      }
2439
0
      break;
2440
0
    case M32C_OPERAND_IMM_20_S4 :
2441
0
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2442
0
      break;
2443
930
    case M32C_OPERAND_IMM_24_HI :
2444
930
      {
2445
930
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2446
930
        if (length <= 0) break;
2447
930
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2448
930
        if (length <= 0) break;
2449
930
{
2450
930
  FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2451
930
}
2452
930
      }
2453
0
      break;
2454
1.10k
    case M32C_OPERAND_IMM_24_QI :
2455
1.10k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2456
1.10k
      break;
2457
19
    case M32C_OPERAND_IMM_24_SI :
2458
19
      {
2459
19
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2460
19
        if (length <= 0) break;
2461
19
        {
2462
19
        long value;
2463
19
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2464
19
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2465
19
        fields->f_dsp_32_u24 = value;
2466
19
      }
2467
19
        if (length <= 0) break;
2468
19
{
2469
19
  FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2470
19
}
2471
19
      }
2472
0
      break;
2473
266
    case M32C_OPERAND_IMM_32_HI :
2474
266
      {
2475
266
        long value;
2476
266
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2477
266
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2478
266
        fields->f_dsp_32_s16 = value;
2479
266
      }
2480
266
      break;
2481
651
    case M32C_OPERAND_IMM_32_QI :
2482
651
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2483
651
      break;
2484
89
    case M32C_OPERAND_IMM_32_SI :
2485
89
      {
2486
89
        long value;
2487
89
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2488
89
        value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) & (65280))) << (8))) | (((((value) & (255))) << (24)))))));
2489
89
        fields->f_dsp_32_s32 = value;
2490
89
      }
2491
89
      break;
2492
175
    case M32C_OPERAND_IMM_40_HI :
2493
175
      {
2494
175
        long value;
2495
175
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2496
175
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2497
175
        fields->f_dsp_40_s16 = value;
2498
175
      }
2499
175
      break;
2500
213
    case M32C_OPERAND_IMM_40_QI :
2501
213
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2502
213
      break;
2503
179
    case M32C_OPERAND_IMM_40_SI :
2504
179
      {
2505
179
        {
2506
179
        long value;
2507
179
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2508
179
        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2509
179
        fields->f_dsp_40_u24 = value;
2510
179
      }
2511
179
        if (length <= 0) break;
2512
178
        length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2513
178
        if (length <= 0) break;
2514
177
{
2515
177
  FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2516
177
}
2517
177
      }
2518
0
      break;
2519
270
    case M32C_OPERAND_IMM_48_HI :
2520
270
      {
2521
270
        long value;
2522
270
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2523
270
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2524
270
        fields->f_dsp_48_s16 = value;
2525
270
      }
2526
270
      break;
2527
59
    case M32C_OPERAND_IMM_48_QI :
2528
59
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2529
59
      break;
2530
0
    case M32C_OPERAND_IMM_48_SI :
2531
0
      {
2532
0
        {
2533
0
        long value;
2534
0
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2535
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2536
0
        fields->f_dsp_48_u16 = value;
2537
0
      }
2538
0
        if (length <= 0) break;
2539
0
        {
2540
0
        long value;
2541
0
        length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2542
0
        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
2543
0
        fields->f_dsp_64_u16 = value;
2544
0
      }
2545
0
        if (length <= 0) break;
2546
0
{
2547
0
  FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) & (65535))) << (16))));
2548
0
}
2549
0
      }
2550
0
      break;
2551
76
    case M32C_OPERAND_IMM_56_HI :
2552
76
      {
2553
76
        length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2554
76
        if (length <= 0) break;
2555
76
        length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2556
76
        if (length <= 0) break;
2557
75
{
2558
75
  FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2559
75
}
2560
75
      }
2561
0
      break;
2562
33
    case M32C_OPERAND_IMM_56_QI :
2563
33
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2564
33
      break;
2565
82
    case M32C_OPERAND_IMM_64_HI :
2566
82
      {
2567
82
        long value;
2568
82
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2569
82
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2570
82
        fields->f_dsp_64_s16 = value;
2571
82
      }
2572
82
      break;
2573
2.26k
    case M32C_OPERAND_IMM_8_HI :
2574
2.26k
      {
2575
2.26k
        long value;
2576
2.26k
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2577
2.26k
        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
2578
2.26k
        fields->f_dsp_8_s16 = value;
2579
2.26k
      }
2580
2.26k
      break;
2581
11.3k
    case M32C_OPERAND_IMM_8_QI :
2582
11.3k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2583
11.3k
      break;
2584
1.47k
    case M32C_OPERAND_IMM_8_S4 :
2585
1.47k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2586
1.47k
      break;
2587
1.62k
    case M32C_OPERAND_IMM_8_S4N :
2588
1.62k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2589
1.62k
      break;
2590
2.11k
    case M32C_OPERAND_IMM_SH_12_S4 :
2591
2.11k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2592
2.11k
      break;
2593
0
    case M32C_OPERAND_IMM_SH_20_S4 :
2594
0
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2595
0
      break;
2596
1.36k
    case M32C_OPERAND_IMM_SH_8_S4 :
2597
1.36k
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2598
1.36k
      break;
2599
2.37k
    case M32C_OPERAND_IMM1_S :
2600
2.37k
      {
2601
2.37k
        long value;
2602
2.37k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2603
2.37k
        value = ((value) + (1));
2604
2.37k
        fields->f_imm1_S = value;
2605
2.37k
      }
2606
2.37k
      break;
2607
3.76k
    case M32C_OPERAND_IMM3_S :
2608
3.76k
      {
2609
3.76k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2610
3.76k
        if (length <= 0) break;
2611
3.76k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2612
3.76k
        if (length <= 0) break;
2613
3.76k
{
2614
3.76k
  FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2615
3.76k
}
2616
3.76k
      }
2617
0
      break;
2618
1.01k
    case M32C_OPERAND_LAB_16_8 :
2619
1.01k
      {
2620
1.01k
        long value;
2621
1.01k
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2622
1.01k
        value = ((value) + (((pc) + (2))));
2623
1.01k
        fields->f_lab_16_8 = value;
2624
1.01k
      }
2625
1.01k
      break;
2626
780
    case M32C_OPERAND_LAB_24_8 :
2627
780
      {
2628
780
        long value;
2629
780
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2630
780
        value = ((value) + (((pc) + (2))));
2631
780
        fields->f_lab_24_8 = value;
2632
780
      }
2633
780
      break;
2634
773
    case M32C_OPERAND_LAB_32_8 :
2635
773
      {
2636
773
        long value;
2637
773
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2638
773
        value = ((value) + (((pc) + (2))));
2639
773
        fields->f_lab_32_8 = value;
2640
773
      }
2641
773
      break;
2642
33
    case M32C_OPERAND_LAB_40_8 :
2643
33
      {
2644
33
        long value;
2645
33
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2646
33
        value = ((value) + (((pc) + (2))));
2647
33
        fields->f_lab_40_8 = value;
2648
33
      }
2649
33
      break;
2650
2.68k
    case M32C_OPERAND_LAB_5_3 :
2651
2.68k
      {
2652
2.68k
        long value;
2653
2.68k
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2654
2.68k
        value = ((value) + (((pc) + (2))));
2655
2.68k
        fields->f_lab_5_3 = value;
2656
2.68k
      }
2657
2.68k
      break;
2658
776
    case M32C_OPERAND_LAB_8_16 :
2659
776
      {
2660
776
        long value;
2661
776
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2662
776
        value = ((((((((((USI) (((value) & (65280))) >> (8))) | (((((value) & (255))) << (8))))) ^ (32768))) - (32768))) + (((pc) + (1))));
2663
776
        fields->f_lab_8_16 = value;
2664
776
      }
2665
776
      break;
2666
715
    case M32C_OPERAND_LAB_8_24 :
2667
715
      {
2668
715
        long value;
2669
715
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2670
715
        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2671
715
        fields->f_lab_8_24 = value;
2672
715
      }
2673
715
      break;
2674
5.12k
    case M32C_OPERAND_LAB_8_8 :
2675
5.12k
      {
2676
5.12k
        long value;
2677
5.12k
        length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2678
5.12k
        value = ((value) + (((pc) + (1))));
2679
5.12k
        fields->f_lab_8_8 = value;
2680
5.12k
      }
2681
5.12k
      break;
2682
2.04k
    case M32C_OPERAND_LAB32_JMP_S :
2683
2.04k
      {
2684
2.04k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2685
2.04k
        if (length <= 0) break;
2686
2.04k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2687
2.04k
        if (length <= 0) break;
2688
2.04k
{
2689
2.04k
  FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2690
2.04k
}
2691
2.04k
      }
2692
0
      break;
2693
10.5k
    case M32C_OPERAND_Q :
2694
10.5k
      break;
2695
0
    case M32C_OPERAND_R0 :
2696
0
      break;
2697
0
    case M32C_OPERAND_R0H :
2698
0
      break;
2699
0
    case M32C_OPERAND_R0L :
2700
0
      break;
2701
0
    case M32C_OPERAND_R1 :
2702
0
      break;
2703
0
    case M32C_OPERAND_R1R2R0 :
2704
0
      break;
2705
0
    case M32C_OPERAND_R2 :
2706
0
      break;
2707
0
    case M32C_OPERAND_R2R0 :
2708
0
      break;
2709
54
    case M32C_OPERAND_R3 :
2710
54
      break;
2711
0
    case M32C_OPERAND_R3R1 :
2712
0
      break;
2713
1.33k
    case M32C_OPERAND_REGSETPOP :
2714
1.33k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2715
1.33k
      break;
2716
432
    case M32C_OPERAND_REGSETPUSH :
2717
432
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2718
432
      break;
2719
4.16k
    case M32C_OPERAND_RN16_PUSH_S :
2720
4.16k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2721
4.16k
      break;
2722
77.2k
    case M32C_OPERAND_S :
2723
77.2k
      break;
2724
2.89k
    case M32C_OPERAND_SRC16AN :
2725
2.89k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2726
2.89k
      break;
2727
427
    case M32C_OPERAND_SRC16ANHI :
2728
427
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2729
427
      break;
2730
204
    case M32C_OPERAND_SRC16ANQI :
2731
204
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2732
204
      break;
2733
827
    case M32C_OPERAND_SRC16RNHI :
2734
827
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2735
827
      break;
2736
1.36k
    case M32C_OPERAND_SRC16RNQI :
2737
1.36k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2738
1.36k
      break;
2739
971
    case M32C_OPERAND_SRC32ANPREFIXED :
2740
971
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2741
971
      break;
2742
203
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
2743
203
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2744
203
      break;
2745
52
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
2746
52
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2747
52
      break;
2748
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
2749
0
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2750
0
      break;
2751
5.32k
    case M32C_OPERAND_SRC32ANUNPREFIXED :
2752
5.32k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2753
5.32k
      break;
2754
188
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2755
188
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2756
188
      break;
2757
559
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2758
559
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2759
559
      break;
2760
351
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2761
351
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2762
351
      break;
2763
49
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
2764
49
      {
2765
49
        long value;
2766
49
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2767
49
        value = ((((value) + (2))) % (4));
2768
49
        fields->f_src32_rn_prefixed_HI = value;
2769
49
      }
2770
49
      break;
2771
823
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
2772
823
      {
2773
823
        long value;
2774
823
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2775
823
        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2776
823
        fields->f_src32_rn_prefixed_QI = value;
2777
823
      }
2778
823
      break;
2779
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
2780
0
      {
2781
0
        long value;
2782
0
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2783
0
        value = ((value) - (2));
2784
0
        fields->f_src32_rn_prefixed_SI = value;
2785
0
      }
2786
0
      break;
2787
1.94k
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2788
1.94k
      {
2789
1.94k
        long value;
2790
1.94k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2791
1.94k
        value = ((((value) + (2))) % (4));
2792
1.94k
        fields->f_src32_rn_unprefixed_HI = value;
2793
1.94k
      }
2794
1.94k
      break;
2795
1.16k
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2796
1.16k
      {
2797
1.16k
        long value;
2798
1.16k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2799
1.16k
        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2800
1.16k
        fields->f_src32_rn_unprefixed_QI = value;
2801
1.16k
      }
2802
1.16k
      break;
2803
836
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2804
836
      {
2805
836
        long value;
2806
836
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2807
836
        value = ((value) - (2));
2808
836
        fields->f_src32_rn_unprefixed_SI = value;
2809
836
      }
2810
836
      break;
2811
7.33k
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2812
7.33k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2813
7.33k
      break;
2814
7.56k
    case M32C_OPERAND_X :
2815
7.56k
      break;
2816
3.75k
    case M32C_OPERAND_Z :
2817
3.75k
      break;
2818
34
    case M32C_OPERAND_COND16_16 :
2819
34
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2820
34
      break;
2821
686
    case M32C_OPERAND_COND16_24 :
2822
686
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2823
686
      break;
2824
149
    case M32C_OPERAND_COND16_32 :
2825
149
      length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2826
149
      break;
2827
89
    case M32C_OPERAND_COND16C :
2828
89
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2829
89
      break;
2830
355
    case M32C_OPERAND_COND16J :
2831
355
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2832
355
      break;
2833
2.33k
    case M32C_OPERAND_COND16J5 :
2834
2.33k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2835
2.33k
      break;
2836
18
    case M32C_OPERAND_COND32 :
2837
18
      {
2838
18
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2839
18
        if (length <= 0) break;
2840
18
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2841
18
        if (length <= 0) break;
2842
18
{
2843
18
  FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2844
18
}
2845
18
      }
2846
0
      break;
2847
93
    case M32C_OPERAND_COND32_16 :
2848
93
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2849
93
      break;
2850
330
    case M32C_OPERAND_COND32_24 :
2851
330
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2852
330
      break;
2853
299
    case M32C_OPERAND_COND32_32 :
2854
299
      length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2855
299
      break;
2856
58
    case M32C_OPERAND_COND32_40 :
2857
58
      length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2858
58
      break;
2859
2.37k
    case M32C_OPERAND_COND32J :
2860
2.37k
      {
2861
2.37k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2862
2.37k
        if (length <= 0) break;
2863
2.37k
        length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2864
2.37k
        if (length <= 0) break;
2865
2.37k
{
2866
2.37k
  FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2867
2.37k
}
2868
2.37k
      }
2869
0
      break;
2870
112
    case M32C_OPERAND_CR1_PREFIXED_32 :
2871
112
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2872
112
      break;
2873
106
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
2874
106
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2875
106
      break;
2876
246
    case M32C_OPERAND_CR16 :
2877
246
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2878
246
      break;
2879
2.25k
    case M32C_OPERAND_CR2_32 :
2880
2.25k
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2881
2.25k
      break;
2882
119
    case M32C_OPERAND_CR3_PREFIXED_32 :
2883
119
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2884
119
      break;
2885
46
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
2886
46
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2887
46
      break;
2888
83
    case M32C_OPERAND_FLAGS16 :
2889
83
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2890
83
      break;
2891
21
    case M32C_OPERAND_FLAGS32 :
2892
21
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2893
21
      break;
2894
150
    case M32C_OPERAND_SCCOND32 :
2895
150
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2896
150
      break;
2897
0
    case M32C_OPERAND_SIZE :
2898
0
      break;
2899
2900
0
    default :
2901
      /* xgettext:c-format */
2902
0
      opcodes_error_handler
2903
0
  (_("internal error: unrecognized field %d while decoding insn"),
2904
0
   opindex);
2905
0
      abort ();
2906
370k
    }
2907
2908
370k
  return length;
2909
370k
}
2910
2911
cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2912
{
2913
  insert_insn_normal,
2914
};
2915
2916
cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2917
{
2918
  extract_insn_normal,
2919
};
2920
2921
int m32c_cgen_get_int_operand     (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2922
bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2923
2924
/* Getting values from cgen_fields is handled by a collection of functions.
2925
   They are distinguished by the type of the VALUE argument they return.
2926
   TODO: floating point, inlining support, remove cases where result type
2927
   not appropriate.  */
2928
2929
int
2930
m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2931
           int opindex,
2932
           const CGEN_FIELDS * fields)
2933
0
{
2934
0
  int value;
2935
2936
0
  switch (opindex)
2937
0
    {
2938
0
    case M32C_OPERAND_A0 :
2939
0
      value = 0;
2940
0
      break;
2941
0
    case M32C_OPERAND_A1 :
2942
0
      value = 0;
2943
0
      break;
2944
0
    case M32C_OPERAND_AN16_PUSH_S :
2945
0
      value = fields->f_4_1;
2946
0
      break;
2947
0
    case M32C_OPERAND_BIT16AN :
2948
0
      value = fields->f_dst16_an;
2949
0
      break;
2950
0
    case M32C_OPERAND_BIT16RN :
2951
0
      value = fields->f_dst16_rn;
2952
0
      break;
2953
0
    case M32C_OPERAND_BIT3_S :
2954
0
      value = fields->f_imm3_S;
2955
0
      break;
2956
0
    case M32C_OPERAND_BIT32ANPREFIXED :
2957
0
      value = fields->f_dst32_an_prefixed;
2958
0
      break;
2959
0
    case M32C_OPERAND_BIT32ANUNPREFIXED :
2960
0
      value = fields->f_dst32_an_unprefixed;
2961
0
      break;
2962
0
    case M32C_OPERAND_BIT32RNPREFIXED :
2963
0
      value = fields->f_dst32_rn_prefixed_QI;
2964
0
      break;
2965
0
    case M32C_OPERAND_BIT32RNUNPREFIXED :
2966
0
      value = fields->f_dst32_rn_unprefixed_QI;
2967
0
      break;
2968
0
    case M32C_OPERAND_BITBASE16_16_S8 :
2969
0
      value = fields->f_dsp_16_s8;
2970
0
      break;
2971
0
    case M32C_OPERAND_BITBASE16_16_U16 :
2972
0
      value = fields->f_dsp_16_u16;
2973
0
      break;
2974
0
    case M32C_OPERAND_BITBASE16_16_U8 :
2975
0
      value = fields->f_dsp_16_u8;
2976
0
      break;
2977
0
    case M32C_OPERAND_BITBASE16_8_U11_S :
2978
0
      value = fields->f_bitbase16_u11_S;
2979
0
      break;
2980
0
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2981
0
      value = fields->f_bitbase32_16_s11_unprefixed;
2982
0
      break;
2983
0
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2984
0
      value = fields->f_bitbase32_16_s19_unprefixed;
2985
0
      break;
2986
0
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2987
0
      value = fields->f_bitbase32_16_u11_unprefixed;
2988
0
      break;
2989
0
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2990
0
      value = fields->f_bitbase32_16_u19_unprefixed;
2991
0
      break;
2992
0
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2993
0
      value = fields->f_bitbase32_16_u27_unprefixed;
2994
0
      break;
2995
0
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2996
0
      value = fields->f_bitbase32_24_s11_prefixed;
2997
0
      break;
2998
0
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2999
0
      value = fields->f_bitbase32_24_s19_prefixed;
3000
0
      break;
3001
0
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3002
0
      value = fields->f_bitbase32_24_u11_prefixed;
3003
0
      break;
3004
0
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3005
0
      value = fields->f_bitbase32_24_u19_prefixed;
3006
0
      break;
3007
0
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3008
0
      value = fields->f_bitbase32_24_u27_prefixed;
3009
0
      break;
3010
0
    case M32C_OPERAND_BITNO16R :
3011
0
      value = fields->f_dsp_16_u8;
3012
0
      break;
3013
0
    case M32C_OPERAND_BITNO32PREFIXED :
3014
0
      value = fields->f_bitno32_prefixed;
3015
0
      break;
3016
0
    case M32C_OPERAND_BITNO32UNPREFIXED :
3017
0
      value = fields->f_bitno32_unprefixed;
3018
0
      break;
3019
0
    case M32C_OPERAND_DSP_10_U6 :
3020
0
      value = fields->f_dsp_10_u6;
3021
0
      break;
3022
0
    case M32C_OPERAND_DSP_16_S16 :
3023
0
      value = fields->f_dsp_16_s16;
3024
0
      break;
3025
0
    case M32C_OPERAND_DSP_16_S8 :
3026
0
      value = fields->f_dsp_16_s8;
3027
0
      break;
3028
0
    case M32C_OPERAND_DSP_16_U16 :
3029
0
      value = fields->f_dsp_16_u16;
3030
0
      break;
3031
0
    case M32C_OPERAND_DSP_16_U20 :
3032
0
      value = fields->f_dsp_16_u24;
3033
0
      break;
3034
0
    case M32C_OPERAND_DSP_16_U24 :
3035
0
      value = fields->f_dsp_16_u24;
3036
0
      break;
3037
0
    case M32C_OPERAND_DSP_16_U8 :
3038
0
      value = fields->f_dsp_16_u8;
3039
0
      break;
3040
0
    case M32C_OPERAND_DSP_24_S16 :
3041
0
      value = fields->f_dsp_24_s16;
3042
0
      break;
3043
0
    case M32C_OPERAND_DSP_24_S8 :
3044
0
      value = fields->f_dsp_24_s8;
3045
0
      break;
3046
0
    case M32C_OPERAND_DSP_24_U16 :
3047
0
      value = fields->f_dsp_24_u16;
3048
0
      break;
3049
0
    case M32C_OPERAND_DSP_24_U20 :
3050
0
      value = fields->f_dsp_24_u24;
3051
0
      break;
3052
0
    case M32C_OPERAND_DSP_24_U24 :
3053
0
      value = fields->f_dsp_24_u24;
3054
0
      break;
3055
0
    case M32C_OPERAND_DSP_24_U8 :
3056
0
      value = fields->f_dsp_24_u8;
3057
0
      break;
3058
0
    case M32C_OPERAND_DSP_32_S16 :
3059
0
      value = fields->f_dsp_32_s16;
3060
0
      break;
3061
0
    case M32C_OPERAND_DSP_32_S8 :
3062
0
      value = fields->f_dsp_32_s8;
3063
0
      break;
3064
0
    case M32C_OPERAND_DSP_32_U16 :
3065
0
      value = fields->f_dsp_32_u16;
3066
0
      break;
3067
0
    case M32C_OPERAND_DSP_32_U20 :
3068
0
      value = fields->f_dsp_32_u24;
3069
0
      break;
3070
0
    case M32C_OPERAND_DSP_32_U24 :
3071
0
      value = fields->f_dsp_32_u24;
3072
0
      break;
3073
0
    case M32C_OPERAND_DSP_32_U8 :
3074
0
      value = fields->f_dsp_32_u8;
3075
0
      break;
3076
0
    case M32C_OPERAND_DSP_40_S16 :
3077
0
      value = fields->f_dsp_40_s16;
3078
0
      break;
3079
0
    case M32C_OPERAND_DSP_40_S8 :
3080
0
      value = fields->f_dsp_40_s8;
3081
0
      break;
3082
0
    case M32C_OPERAND_DSP_40_U16 :
3083
0
      value = fields->f_dsp_40_u16;
3084
0
      break;
3085
0
    case M32C_OPERAND_DSP_40_U20 :
3086
0
      value = fields->f_dsp_40_u20;
3087
0
      break;
3088
0
    case M32C_OPERAND_DSP_40_U24 :
3089
0
      value = fields->f_dsp_40_u24;
3090
0
      break;
3091
0
    case M32C_OPERAND_DSP_40_U8 :
3092
0
      value = fields->f_dsp_40_u8;
3093
0
      break;
3094
0
    case M32C_OPERAND_DSP_48_S16 :
3095
0
      value = fields->f_dsp_48_s16;
3096
0
      break;
3097
0
    case M32C_OPERAND_DSP_48_S8 :
3098
0
      value = fields->f_dsp_48_s8;
3099
0
      break;
3100
0
    case M32C_OPERAND_DSP_48_U16 :
3101
0
      value = fields->f_dsp_48_u16;
3102
0
      break;
3103
0
    case M32C_OPERAND_DSP_48_U20 :
3104
0
      value = fields->f_dsp_48_u20;
3105
0
      break;
3106
0
    case M32C_OPERAND_DSP_48_U24 :
3107
0
      value = fields->f_dsp_48_u24;
3108
0
      break;
3109
0
    case M32C_OPERAND_DSP_48_U8 :
3110
0
      value = fields->f_dsp_48_u8;
3111
0
      break;
3112
0
    case M32C_OPERAND_DSP_8_S24 :
3113
0
      value = fields->f_dsp_8_s24;
3114
0
      break;
3115
0
    case M32C_OPERAND_DSP_8_S8 :
3116
0
      value = fields->f_dsp_8_s8;
3117
0
      break;
3118
0
    case M32C_OPERAND_DSP_8_U16 :
3119
0
      value = fields->f_dsp_8_u16;
3120
0
      break;
3121
0
    case M32C_OPERAND_DSP_8_U24 :
3122
0
      value = fields->f_dsp_8_u24;
3123
0
      break;
3124
0
    case M32C_OPERAND_DSP_8_U6 :
3125
0
      value = fields->f_dsp_8_u6;
3126
0
      break;
3127
0
    case M32C_OPERAND_DSP_8_U8 :
3128
0
      value = fields->f_dsp_8_u8;
3129
0
      break;
3130
0
    case M32C_OPERAND_DST16AN :
3131
0
      value = fields->f_dst16_an;
3132
0
      break;
3133
0
    case M32C_OPERAND_DST16AN_S :
3134
0
      value = fields->f_dst16_an_s;
3135
0
      break;
3136
0
    case M32C_OPERAND_DST16ANHI :
3137
0
      value = fields->f_dst16_an;
3138
0
      break;
3139
0
    case M32C_OPERAND_DST16ANQI :
3140
0
      value = fields->f_dst16_an;
3141
0
      break;
3142
0
    case M32C_OPERAND_DST16ANQI_S :
3143
0
      value = fields->f_dst16_rn_QI_s;
3144
0
      break;
3145
0
    case M32C_OPERAND_DST16ANSI :
3146
0
      value = fields->f_dst16_an;
3147
0
      break;
3148
0
    case M32C_OPERAND_DST16RNEXTQI :
3149
0
      value = fields->f_dst16_rn_ext;
3150
0
      break;
3151
0
    case M32C_OPERAND_DST16RNHI :
3152
0
      value = fields->f_dst16_rn;
3153
0
      break;
3154
0
    case M32C_OPERAND_DST16RNQI :
3155
0
      value = fields->f_dst16_rn;
3156
0
      break;
3157
0
    case M32C_OPERAND_DST16RNQI_S :
3158
0
      value = fields->f_dst16_rn_QI_s;
3159
0
      break;
3160
0
    case M32C_OPERAND_DST16RNSI :
3161
0
      value = fields->f_dst16_rn;
3162
0
      break;
3163
0
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3164
0
      value = fields->f_dst32_an_unprefixed;
3165
0
      break;
3166
0
    case M32C_OPERAND_DST32ANPREFIXED :
3167
0
      value = fields->f_dst32_an_prefixed;
3168
0
      break;
3169
0
    case M32C_OPERAND_DST32ANPREFIXEDHI :
3170
0
      value = fields->f_dst32_an_prefixed;
3171
0
      break;
3172
0
    case M32C_OPERAND_DST32ANPREFIXEDQI :
3173
0
      value = fields->f_dst32_an_prefixed;
3174
0
      break;
3175
0
    case M32C_OPERAND_DST32ANPREFIXEDSI :
3176
0
      value = fields->f_dst32_an_prefixed;
3177
0
      break;
3178
0
    case M32C_OPERAND_DST32ANUNPREFIXED :
3179
0
      value = fields->f_dst32_an_unprefixed;
3180
0
      break;
3181
0
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3182
0
      value = fields->f_dst32_an_unprefixed;
3183
0
      break;
3184
0
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3185
0
      value = fields->f_dst32_an_unprefixed;
3186
0
      break;
3187
0
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3188
0
      value = fields->f_dst32_an_unprefixed;
3189
0
      break;
3190
0
    case M32C_OPERAND_DST32R0HI_S :
3191
0
      value = 0;
3192
0
      break;
3193
0
    case M32C_OPERAND_DST32R0QI_S :
3194
0
      value = 0;
3195
0
      break;
3196
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3197
0
      value = fields->f_dst32_rn_ext_unprefixed;
3198
0
      break;
3199
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3200
0
      value = fields->f_dst32_rn_ext_unprefixed;
3201
0
      break;
3202
0
    case M32C_OPERAND_DST32RNPREFIXEDHI :
3203
0
      value = fields->f_dst32_rn_prefixed_HI;
3204
0
      break;
3205
0
    case M32C_OPERAND_DST32RNPREFIXEDQI :
3206
0
      value = fields->f_dst32_rn_prefixed_QI;
3207
0
      break;
3208
0
    case M32C_OPERAND_DST32RNPREFIXEDSI :
3209
0
      value = fields->f_dst32_rn_prefixed_SI;
3210
0
      break;
3211
0
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3212
0
      value = fields->f_dst32_rn_unprefixed_HI;
3213
0
      break;
3214
0
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3215
0
      value = fields->f_dst32_rn_unprefixed_QI;
3216
0
      break;
3217
0
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3218
0
      value = fields->f_dst32_rn_unprefixed_SI;
3219
0
      break;
3220
0
    case M32C_OPERAND_G :
3221
0
      value = 0;
3222
0
      break;
3223
0
    case M32C_OPERAND_IMM_12_S4 :
3224
0
      value = fields->f_imm_12_s4;
3225
0
      break;
3226
0
    case M32C_OPERAND_IMM_12_S4N :
3227
0
      value = fields->f_imm_12_s4;
3228
0
      break;
3229
0
    case M32C_OPERAND_IMM_13_U3 :
3230
0
      value = fields->f_imm_13_u3;
3231
0
      break;
3232
0
    case M32C_OPERAND_IMM_16_HI :
3233
0
      value = fields->f_dsp_16_s16;
3234
0
      break;
3235
0
    case M32C_OPERAND_IMM_16_QI :
3236
0
      value = fields->f_dsp_16_s8;
3237
0
      break;
3238
0
    case M32C_OPERAND_IMM_16_SI :
3239
0
      value = fields->f_dsp_16_s32;
3240
0
      break;
3241
0
    case M32C_OPERAND_IMM_20_S4 :
3242
0
      value = fields->f_imm_20_s4;
3243
0
      break;
3244
0
    case M32C_OPERAND_IMM_24_HI :
3245
0
      value = fields->f_dsp_24_s16;
3246
0
      break;
3247
0
    case M32C_OPERAND_IMM_24_QI :
3248
0
      value = fields->f_dsp_24_s8;
3249
0
      break;
3250
0
    case M32C_OPERAND_IMM_24_SI :
3251
0
      value = fields->f_dsp_24_s32;
3252
0
      break;
3253
0
    case M32C_OPERAND_IMM_32_HI :
3254
0
      value = fields->f_dsp_32_s16;
3255
0
      break;
3256
0
    case M32C_OPERAND_IMM_32_QI :
3257
0
      value = fields->f_dsp_32_s8;
3258
0
      break;
3259
0
    case M32C_OPERAND_IMM_32_SI :
3260
0
      value = fields->f_dsp_32_s32;
3261
0
      break;
3262
0
    case M32C_OPERAND_IMM_40_HI :
3263
0
      value = fields->f_dsp_40_s16;
3264
0
      break;
3265
0
    case M32C_OPERAND_IMM_40_QI :
3266
0
      value = fields->f_dsp_40_s8;
3267
0
      break;
3268
0
    case M32C_OPERAND_IMM_40_SI :
3269
0
      value = fields->f_dsp_40_s32;
3270
0
      break;
3271
0
    case M32C_OPERAND_IMM_48_HI :
3272
0
      value = fields->f_dsp_48_s16;
3273
0
      break;
3274
0
    case M32C_OPERAND_IMM_48_QI :
3275
0
      value = fields->f_dsp_48_s8;
3276
0
      break;
3277
0
    case M32C_OPERAND_IMM_48_SI :
3278
0
      value = fields->f_dsp_48_s32;
3279
0
      break;
3280
0
    case M32C_OPERAND_IMM_56_HI :
3281
0
      value = fields->f_dsp_56_s16;
3282
0
      break;
3283
0
    case M32C_OPERAND_IMM_56_QI :
3284
0
      value = fields->f_dsp_56_s8;
3285
0
      break;
3286
0
    case M32C_OPERAND_IMM_64_HI :
3287
0
      value = fields->f_dsp_64_s16;
3288
0
      break;
3289
0
    case M32C_OPERAND_IMM_8_HI :
3290
0
      value = fields->f_dsp_8_s16;
3291
0
      break;
3292
0
    case M32C_OPERAND_IMM_8_QI :
3293
0
      value = fields->f_dsp_8_s8;
3294
0
      break;
3295
0
    case M32C_OPERAND_IMM_8_S4 :
3296
0
      value = fields->f_imm_8_s4;
3297
0
      break;
3298
0
    case M32C_OPERAND_IMM_8_S4N :
3299
0
      value = fields->f_imm_8_s4;
3300
0
      break;
3301
0
    case M32C_OPERAND_IMM_SH_12_S4 :
3302
0
      value = fields->f_imm_12_s4;
3303
0
      break;
3304
0
    case M32C_OPERAND_IMM_SH_20_S4 :
3305
0
      value = fields->f_imm_20_s4;
3306
0
      break;
3307
0
    case M32C_OPERAND_IMM_SH_8_S4 :
3308
0
      value = fields->f_imm_8_s4;
3309
0
      break;
3310
0
    case M32C_OPERAND_IMM1_S :
3311
0
      value = fields->f_imm1_S;
3312
0
      break;
3313
0
    case M32C_OPERAND_IMM3_S :
3314
0
      value = fields->f_imm3_S;
3315
0
      break;
3316
0
    case M32C_OPERAND_LAB_16_8 :
3317
0
      value = fields->f_lab_16_8;
3318
0
      break;
3319
0
    case M32C_OPERAND_LAB_24_8 :
3320
0
      value = fields->f_lab_24_8;
3321
0
      break;
3322
0
    case M32C_OPERAND_LAB_32_8 :
3323
0
      value = fields->f_lab_32_8;
3324
0
      break;
3325
0
    case M32C_OPERAND_LAB_40_8 :
3326
0
      value = fields->f_lab_40_8;
3327
0
      break;
3328
0
    case M32C_OPERAND_LAB_5_3 :
3329
0
      value = fields->f_lab_5_3;
3330
0
      break;
3331
0
    case M32C_OPERAND_LAB_8_16 :
3332
0
      value = fields->f_lab_8_16;
3333
0
      break;
3334
0
    case M32C_OPERAND_LAB_8_24 :
3335
0
      value = fields->f_lab_8_24;
3336
0
      break;
3337
0
    case M32C_OPERAND_LAB_8_8 :
3338
0
      value = fields->f_lab_8_8;
3339
0
      break;
3340
0
    case M32C_OPERAND_LAB32_JMP_S :
3341
0
      value = fields->f_lab32_jmp_s;
3342
0
      break;
3343
0
    case M32C_OPERAND_Q :
3344
0
      value = 0;
3345
0
      break;
3346
0
    case M32C_OPERAND_R0 :
3347
0
      value = 0;
3348
0
      break;
3349
0
    case M32C_OPERAND_R0H :
3350
0
      value = 0;
3351
0
      break;
3352
0
    case M32C_OPERAND_R0L :
3353
0
      value = 0;
3354
0
      break;
3355
0
    case M32C_OPERAND_R1 :
3356
0
      value = 0;
3357
0
      break;
3358
0
    case M32C_OPERAND_R1R2R0 :
3359
0
      value = 0;
3360
0
      break;
3361
0
    case M32C_OPERAND_R2 :
3362
0
      value = 0;
3363
0
      break;
3364
0
    case M32C_OPERAND_R2R0 :
3365
0
      value = 0;
3366
0
      break;
3367
0
    case M32C_OPERAND_R3 :
3368
0
      value = 0;
3369
0
      break;
3370
0
    case M32C_OPERAND_R3R1 :
3371
0
      value = 0;
3372
0
      break;
3373
0
    case M32C_OPERAND_REGSETPOP :
3374
0
      value = fields->f_8_8;
3375
0
      break;
3376
0
    case M32C_OPERAND_REGSETPUSH :
3377
0
      value = fields->f_8_8;
3378
0
      break;
3379
0
    case M32C_OPERAND_RN16_PUSH_S :
3380
0
      value = fields->f_4_1;
3381
0
      break;
3382
0
    case M32C_OPERAND_S :
3383
0
      value = 0;
3384
0
      break;
3385
0
    case M32C_OPERAND_SRC16AN :
3386
0
      value = fields->f_src16_an;
3387
0
      break;
3388
0
    case M32C_OPERAND_SRC16ANHI :
3389
0
      value = fields->f_src16_an;
3390
0
      break;
3391
0
    case M32C_OPERAND_SRC16ANQI :
3392
0
      value = fields->f_src16_an;
3393
0
      break;
3394
0
    case M32C_OPERAND_SRC16RNHI :
3395
0
      value = fields->f_src16_rn;
3396
0
      break;
3397
0
    case M32C_OPERAND_SRC16RNQI :
3398
0
      value = fields->f_src16_rn;
3399
0
      break;
3400
0
    case M32C_OPERAND_SRC32ANPREFIXED :
3401
0
      value = fields->f_src32_an_prefixed;
3402
0
      break;
3403
0
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
3404
0
      value = fields->f_src32_an_prefixed;
3405
0
      break;
3406
0
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
3407
0
      value = fields->f_src32_an_prefixed;
3408
0
      break;
3409
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
3410
0
      value = fields->f_src32_an_prefixed;
3411
0
      break;
3412
0
    case M32C_OPERAND_SRC32ANUNPREFIXED :
3413
0
      value = fields->f_src32_an_unprefixed;
3414
0
      break;
3415
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3416
0
      value = fields->f_src32_an_unprefixed;
3417
0
      break;
3418
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3419
0
      value = fields->f_src32_an_unprefixed;
3420
0
      break;
3421
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3422
0
      value = fields->f_src32_an_unprefixed;
3423
0
      break;
3424
0
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
3425
0
      value = fields->f_src32_rn_prefixed_HI;
3426
0
      break;
3427
0
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
3428
0
      value = fields->f_src32_rn_prefixed_QI;
3429
0
      break;
3430
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
3431
0
      value = fields->f_src32_rn_prefixed_SI;
3432
0
      break;
3433
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3434
0
      value = fields->f_src32_rn_unprefixed_HI;
3435
0
      break;
3436
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3437
0
      value = fields->f_src32_rn_unprefixed_QI;
3438
0
      break;
3439
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3440
0
      value = fields->f_src32_rn_unprefixed_SI;
3441
0
      break;
3442
0
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3443
0
      value = fields->f_5_1;
3444
0
      break;
3445
0
    case M32C_OPERAND_X :
3446
0
      value = 0;
3447
0
      break;
3448
0
    case M32C_OPERAND_Z :
3449
0
      value = 0;
3450
0
      break;
3451
0
    case M32C_OPERAND_COND16_16 :
3452
0
      value = fields->f_dsp_16_u8;
3453
0
      break;
3454
0
    case M32C_OPERAND_COND16_24 :
3455
0
      value = fields->f_dsp_24_u8;
3456
0
      break;
3457
0
    case M32C_OPERAND_COND16_32 :
3458
0
      value = fields->f_dsp_32_u8;
3459
0
      break;
3460
0
    case M32C_OPERAND_COND16C :
3461
0
      value = fields->f_cond16;
3462
0
      break;
3463
0
    case M32C_OPERAND_COND16J :
3464
0
      value = fields->f_cond16;
3465
0
      break;
3466
0
    case M32C_OPERAND_COND16J5 :
3467
0
      value = fields->f_cond16j_5;
3468
0
      break;
3469
0
    case M32C_OPERAND_COND32 :
3470
0
      value = fields->f_cond32;
3471
0
      break;
3472
0
    case M32C_OPERAND_COND32_16 :
3473
0
      value = fields->f_dsp_16_u8;
3474
0
      break;
3475
0
    case M32C_OPERAND_COND32_24 :
3476
0
      value = fields->f_dsp_24_u8;
3477
0
      break;
3478
0
    case M32C_OPERAND_COND32_32 :
3479
0
      value = fields->f_dsp_32_u8;
3480
0
      break;
3481
0
    case M32C_OPERAND_COND32_40 :
3482
0
      value = fields->f_dsp_40_u8;
3483
0
      break;
3484
0
    case M32C_OPERAND_COND32J :
3485
0
      value = fields->f_cond32j;
3486
0
      break;
3487
0
    case M32C_OPERAND_CR1_PREFIXED_32 :
3488
0
      value = fields->f_21_3;
3489
0
      break;
3490
0
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
3491
0
      value = fields->f_13_3;
3492
0
      break;
3493
0
    case M32C_OPERAND_CR16 :
3494
0
      value = fields->f_9_3;
3495
0
      break;
3496
0
    case M32C_OPERAND_CR2_32 :
3497
0
      value = fields->f_13_3;
3498
0
      break;
3499
0
    case M32C_OPERAND_CR3_PREFIXED_32 :
3500
0
      value = fields->f_21_3;
3501
0
      break;
3502
0
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
3503
0
      value = fields->f_13_3;
3504
0
      break;
3505
0
    case M32C_OPERAND_FLAGS16 :
3506
0
      value = fields->f_9_3;
3507
0
      break;
3508
0
    case M32C_OPERAND_FLAGS32 :
3509
0
      value = fields->f_13_3;
3510
0
      break;
3511
0
    case M32C_OPERAND_SCCOND32 :
3512
0
      value = fields->f_cond16;
3513
0
      break;
3514
0
    case M32C_OPERAND_SIZE :
3515
0
      value = 0;
3516
0
      break;
3517
3518
0
    default :
3519
      /* xgettext:c-format */
3520
0
      opcodes_error_handler
3521
0
  (_("internal error: unrecognized field %d while getting int operand"),
3522
0
   opindex);
3523
0
      abort ();
3524
0
  }
3525
3526
0
  return value;
3527
0
}
3528
3529
bfd_vma
3530
m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3531
           int opindex,
3532
           const CGEN_FIELDS * fields)
3533
0
{
3534
0
  bfd_vma value;
3535
3536
0
  switch (opindex)
3537
0
    {
3538
0
    case M32C_OPERAND_A0 :
3539
0
      value = 0;
3540
0
      break;
3541
0
    case M32C_OPERAND_A1 :
3542
0
      value = 0;
3543
0
      break;
3544
0
    case M32C_OPERAND_AN16_PUSH_S :
3545
0
      value = fields->f_4_1;
3546
0
      break;
3547
0
    case M32C_OPERAND_BIT16AN :
3548
0
      value = fields->f_dst16_an;
3549
0
      break;
3550
0
    case M32C_OPERAND_BIT16RN :
3551
0
      value = fields->f_dst16_rn;
3552
0
      break;
3553
0
    case M32C_OPERAND_BIT3_S :
3554
0
      value = fields->f_imm3_S;
3555
0
      break;
3556
0
    case M32C_OPERAND_BIT32ANPREFIXED :
3557
0
      value = fields->f_dst32_an_prefixed;
3558
0
      break;
3559
0
    case M32C_OPERAND_BIT32ANUNPREFIXED :
3560
0
      value = fields->f_dst32_an_unprefixed;
3561
0
      break;
3562
0
    case M32C_OPERAND_BIT32RNPREFIXED :
3563
0
      value = fields->f_dst32_rn_prefixed_QI;
3564
0
      break;
3565
0
    case M32C_OPERAND_BIT32RNUNPREFIXED :
3566
0
      value = fields->f_dst32_rn_unprefixed_QI;
3567
0
      break;
3568
0
    case M32C_OPERAND_BITBASE16_16_S8 :
3569
0
      value = fields->f_dsp_16_s8;
3570
0
      break;
3571
0
    case M32C_OPERAND_BITBASE16_16_U16 :
3572
0
      value = fields->f_dsp_16_u16;
3573
0
      break;
3574
0
    case M32C_OPERAND_BITBASE16_16_U8 :
3575
0
      value = fields->f_dsp_16_u8;
3576
0
      break;
3577
0
    case M32C_OPERAND_BITBASE16_8_U11_S :
3578
0
      value = fields->f_bitbase16_u11_S;
3579
0
      break;
3580
0
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3581
0
      value = fields->f_bitbase32_16_s11_unprefixed;
3582
0
      break;
3583
0
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3584
0
      value = fields->f_bitbase32_16_s19_unprefixed;
3585
0
      break;
3586
0
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3587
0
      value = fields->f_bitbase32_16_u11_unprefixed;
3588
0
      break;
3589
0
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3590
0
      value = fields->f_bitbase32_16_u19_unprefixed;
3591
0
      break;
3592
0
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3593
0
      value = fields->f_bitbase32_16_u27_unprefixed;
3594
0
      break;
3595
0
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3596
0
      value = fields->f_bitbase32_24_s11_prefixed;
3597
0
      break;
3598
0
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3599
0
      value = fields->f_bitbase32_24_s19_prefixed;
3600
0
      break;
3601
0
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3602
0
      value = fields->f_bitbase32_24_u11_prefixed;
3603
0
      break;
3604
0
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3605
0
      value = fields->f_bitbase32_24_u19_prefixed;
3606
0
      break;
3607
0
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3608
0
      value = fields->f_bitbase32_24_u27_prefixed;
3609
0
      break;
3610
0
    case M32C_OPERAND_BITNO16R :
3611
0
      value = fields->f_dsp_16_u8;
3612
0
      break;
3613
0
    case M32C_OPERAND_BITNO32PREFIXED :
3614
0
      value = fields->f_bitno32_prefixed;
3615
0
      break;
3616
0
    case M32C_OPERAND_BITNO32UNPREFIXED :
3617
0
      value = fields->f_bitno32_unprefixed;
3618
0
      break;
3619
0
    case M32C_OPERAND_DSP_10_U6 :
3620
0
      value = fields->f_dsp_10_u6;
3621
0
      break;
3622
0
    case M32C_OPERAND_DSP_16_S16 :
3623
0
      value = fields->f_dsp_16_s16;
3624
0
      break;
3625
0
    case M32C_OPERAND_DSP_16_S8 :
3626
0
      value = fields->f_dsp_16_s8;
3627
0
      break;
3628
0
    case M32C_OPERAND_DSP_16_U16 :
3629
0
      value = fields->f_dsp_16_u16;
3630
0
      break;
3631
0
    case M32C_OPERAND_DSP_16_U20 :
3632
0
      value = fields->f_dsp_16_u24;
3633
0
      break;
3634
0
    case M32C_OPERAND_DSP_16_U24 :
3635
0
      value = fields->f_dsp_16_u24;
3636
0
      break;
3637
0
    case M32C_OPERAND_DSP_16_U8 :
3638
0
      value = fields->f_dsp_16_u8;
3639
0
      break;
3640
0
    case M32C_OPERAND_DSP_24_S16 :
3641
0
      value = fields->f_dsp_24_s16;
3642
0
      break;
3643
0
    case M32C_OPERAND_DSP_24_S8 :
3644
0
      value = fields->f_dsp_24_s8;
3645
0
      break;
3646
0
    case M32C_OPERAND_DSP_24_U16 :
3647
0
      value = fields->f_dsp_24_u16;
3648
0
      break;
3649
0
    case M32C_OPERAND_DSP_24_U20 :
3650
0
      value = fields->f_dsp_24_u24;
3651
0
      break;
3652
0
    case M32C_OPERAND_DSP_24_U24 :
3653
0
      value = fields->f_dsp_24_u24;
3654
0
      break;
3655
0
    case M32C_OPERAND_DSP_24_U8 :
3656
0
      value = fields->f_dsp_24_u8;
3657
0
      break;
3658
0
    case M32C_OPERAND_DSP_32_S16 :
3659
0
      value = fields->f_dsp_32_s16;
3660
0
      break;
3661
0
    case M32C_OPERAND_DSP_32_S8 :
3662
0
      value = fields->f_dsp_32_s8;
3663
0
      break;
3664
0
    case M32C_OPERAND_DSP_32_U16 :
3665
0
      value = fields->f_dsp_32_u16;
3666
0
      break;
3667
0
    case M32C_OPERAND_DSP_32_U20 :
3668
0
      value = fields->f_dsp_32_u24;
3669
0
      break;
3670
0
    case M32C_OPERAND_DSP_32_U24 :
3671
0
      value = fields->f_dsp_32_u24;
3672
0
      break;
3673
0
    case M32C_OPERAND_DSP_32_U8 :
3674
0
      value = fields->f_dsp_32_u8;
3675
0
      break;
3676
0
    case M32C_OPERAND_DSP_40_S16 :
3677
0
      value = fields->f_dsp_40_s16;
3678
0
      break;
3679
0
    case M32C_OPERAND_DSP_40_S8 :
3680
0
      value = fields->f_dsp_40_s8;
3681
0
      break;
3682
0
    case M32C_OPERAND_DSP_40_U16 :
3683
0
      value = fields->f_dsp_40_u16;
3684
0
      break;
3685
0
    case M32C_OPERAND_DSP_40_U20 :
3686
0
      value = fields->f_dsp_40_u20;
3687
0
      break;
3688
0
    case M32C_OPERAND_DSP_40_U24 :
3689
0
      value = fields->f_dsp_40_u24;
3690
0
      break;
3691
0
    case M32C_OPERAND_DSP_40_U8 :
3692
0
      value = fields->f_dsp_40_u8;
3693
0
      break;
3694
0
    case M32C_OPERAND_DSP_48_S16 :
3695
0
      value = fields->f_dsp_48_s16;
3696
0
      break;
3697
0
    case M32C_OPERAND_DSP_48_S8 :
3698
0
      value = fields->f_dsp_48_s8;
3699
0
      break;
3700
0
    case M32C_OPERAND_DSP_48_U16 :
3701
0
      value = fields->f_dsp_48_u16;
3702
0
      break;
3703
0
    case M32C_OPERAND_DSP_48_U20 :
3704
0
      value = fields->f_dsp_48_u20;
3705
0
      break;
3706
0
    case M32C_OPERAND_DSP_48_U24 :
3707
0
      value = fields->f_dsp_48_u24;
3708
0
      break;
3709
0
    case M32C_OPERAND_DSP_48_U8 :
3710
0
      value = fields->f_dsp_48_u8;
3711
0
      break;
3712
0
    case M32C_OPERAND_DSP_8_S24 :
3713
0
      value = fields->f_dsp_8_s24;
3714
0
      break;
3715
0
    case M32C_OPERAND_DSP_8_S8 :
3716
0
      value = fields->f_dsp_8_s8;
3717
0
      break;
3718
0
    case M32C_OPERAND_DSP_8_U16 :
3719
0
      value = fields->f_dsp_8_u16;
3720
0
      break;
3721
0
    case M32C_OPERAND_DSP_8_U24 :
3722
0
      value = fields->f_dsp_8_u24;
3723
0
      break;
3724
0
    case M32C_OPERAND_DSP_8_U6 :
3725
0
      value = fields->f_dsp_8_u6;
3726
0
      break;
3727
0
    case M32C_OPERAND_DSP_8_U8 :
3728
0
      value = fields->f_dsp_8_u8;
3729
0
      break;
3730
0
    case M32C_OPERAND_DST16AN :
3731
0
      value = fields->f_dst16_an;
3732
0
      break;
3733
0
    case M32C_OPERAND_DST16AN_S :
3734
0
      value = fields->f_dst16_an_s;
3735
0
      break;
3736
0
    case M32C_OPERAND_DST16ANHI :
3737
0
      value = fields->f_dst16_an;
3738
0
      break;
3739
0
    case M32C_OPERAND_DST16ANQI :
3740
0
      value = fields->f_dst16_an;
3741
0
      break;
3742
0
    case M32C_OPERAND_DST16ANQI_S :
3743
0
      value = fields->f_dst16_rn_QI_s;
3744
0
      break;
3745
0
    case M32C_OPERAND_DST16ANSI :
3746
0
      value = fields->f_dst16_an;
3747
0
      break;
3748
0
    case M32C_OPERAND_DST16RNEXTQI :
3749
0
      value = fields->f_dst16_rn_ext;
3750
0
      break;
3751
0
    case M32C_OPERAND_DST16RNHI :
3752
0
      value = fields->f_dst16_rn;
3753
0
      break;
3754
0
    case M32C_OPERAND_DST16RNQI :
3755
0
      value = fields->f_dst16_rn;
3756
0
      break;
3757
0
    case M32C_OPERAND_DST16RNQI_S :
3758
0
      value = fields->f_dst16_rn_QI_s;
3759
0
      break;
3760
0
    case M32C_OPERAND_DST16RNSI :
3761
0
      value = fields->f_dst16_rn;
3762
0
      break;
3763
0
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3764
0
      value = fields->f_dst32_an_unprefixed;
3765
0
      break;
3766
0
    case M32C_OPERAND_DST32ANPREFIXED :
3767
0
      value = fields->f_dst32_an_prefixed;
3768
0
      break;
3769
0
    case M32C_OPERAND_DST32ANPREFIXEDHI :
3770
0
      value = fields->f_dst32_an_prefixed;
3771
0
      break;
3772
0
    case M32C_OPERAND_DST32ANPREFIXEDQI :
3773
0
      value = fields->f_dst32_an_prefixed;
3774
0
      break;
3775
0
    case M32C_OPERAND_DST32ANPREFIXEDSI :
3776
0
      value = fields->f_dst32_an_prefixed;
3777
0
      break;
3778
0
    case M32C_OPERAND_DST32ANUNPREFIXED :
3779
0
      value = fields->f_dst32_an_unprefixed;
3780
0
      break;
3781
0
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3782
0
      value = fields->f_dst32_an_unprefixed;
3783
0
      break;
3784
0
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3785
0
      value = fields->f_dst32_an_unprefixed;
3786
0
      break;
3787
0
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3788
0
      value = fields->f_dst32_an_unprefixed;
3789
0
      break;
3790
0
    case M32C_OPERAND_DST32R0HI_S :
3791
0
      value = 0;
3792
0
      break;
3793
0
    case M32C_OPERAND_DST32R0QI_S :
3794
0
      value = 0;
3795
0
      break;
3796
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3797
0
      value = fields->f_dst32_rn_ext_unprefixed;
3798
0
      break;
3799
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3800
0
      value = fields->f_dst32_rn_ext_unprefixed;
3801
0
      break;
3802
0
    case M32C_OPERAND_DST32RNPREFIXEDHI :
3803
0
      value = fields->f_dst32_rn_prefixed_HI;
3804
0
      break;
3805
0
    case M32C_OPERAND_DST32RNPREFIXEDQI :
3806
0
      value = fields->f_dst32_rn_prefixed_QI;
3807
0
      break;
3808
0
    case M32C_OPERAND_DST32RNPREFIXEDSI :
3809
0
      value = fields->f_dst32_rn_prefixed_SI;
3810
0
      break;
3811
0
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3812
0
      value = fields->f_dst32_rn_unprefixed_HI;
3813
0
      break;
3814
0
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3815
0
      value = fields->f_dst32_rn_unprefixed_QI;
3816
0
      break;
3817
0
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3818
0
      value = fields->f_dst32_rn_unprefixed_SI;
3819
0
      break;
3820
0
    case M32C_OPERAND_G :
3821
0
      value = 0;
3822
0
      break;
3823
0
    case M32C_OPERAND_IMM_12_S4 :
3824
0
      value = fields->f_imm_12_s4;
3825
0
      break;
3826
0
    case M32C_OPERAND_IMM_12_S4N :
3827
0
      value = fields->f_imm_12_s4;
3828
0
      break;
3829
0
    case M32C_OPERAND_IMM_13_U3 :
3830
0
      value = fields->f_imm_13_u3;
3831
0
      break;
3832
0
    case M32C_OPERAND_IMM_16_HI :
3833
0
      value = fields->f_dsp_16_s16;
3834
0
      break;
3835
0
    case M32C_OPERAND_IMM_16_QI :
3836
0
      value = fields->f_dsp_16_s8;
3837
0
      break;
3838
0
    case M32C_OPERAND_IMM_16_SI :
3839
0
      value = fields->f_dsp_16_s32;
3840
0
      break;
3841
0
    case M32C_OPERAND_IMM_20_S4 :
3842
0
      value = fields->f_imm_20_s4;
3843
0
      break;
3844
0
    case M32C_OPERAND_IMM_24_HI :
3845
0
      value = fields->f_dsp_24_s16;
3846
0
      break;
3847
0
    case M32C_OPERAND_IMM_24_QI :
3848
0
      value = fields->f_dsp_24_s8;
3849
0
      break;
3850
0
    case M32C_OPERAND_IMM_24_SI :
3851
0
      value = fields->f_dsp_24_s32;
3852
0
      break;
3853
0
    case M32C_OPERAND_IMM_32_HI :
3854
0
      value = fields->f_dsp_32_s16;
3855
0
      break;
3856
0
    case M32C_OPERAND_IMM_32_QI :
3857
0
      value = fields->f_dsp_32_s8;
3858
0
      break;
3859
0
    case M32C_OPERAND_IMM_32_SI :
3860
0
      value = fields->f_dsp_32_s32;
3861
0
      break;
3862
0
    case M32C_OPERAND_IMM_40_HI :
3863
0
      value = fields->f_dsp_40_s16;
3864
0
      break;
3865
0
    case M32C_OPERAND_IMM_40_QI :
3866
0
      value = fields->f_dsp_40_s8;
3867
0
      break;
3868
0
    case M32C_OPERAND_IMM_40_SI :
3869
0
      value = fields->f_dsp_40_s32;
3870
0
      break;
3871
0
    case M32C_OPERAND_IMM_48_HI :
3872
0
      value = fields->f_dsp_48_s16;
3873
0
      break;
3874
0
    case M32C_OPERAND_IMM_48_QI :
3875
0
      value = fields->f_dsp_48_s8;
3876
0
      break;
3877
0
    case M32C_OPERAND_IMM_48_SI :
3878
0
      value = fields->f_dsp_48_s32;
3879
0
      break;
3880
0
    case M32C_OPERAND_IMM_56_HI :
3881
0
      value = fields->f_dsp_56_s16;
3882
0
      break;
3883
0
    case M32C_OPERAND_IMM_56_QI :
3884
0
      value = fields->f_dsp_56_s8;
3885
0
      break;
3886
0
    case M32C_OPERAND_IMM_64_HI :
3887
0
      value = fields->f_dsp_64_s16;
3888
0
      break;
3889
0
    case M32C_OPERAND_IMM_8_HI :
3890
0
      value = fields->f_dsp_8_s16;
3891
0
      break;
3892
0
    case M32C_OPERAND_IMM_8_QI :
3893
0
      value = fields->f_dsp_8_s8;
3894
0
      break;
3895
0
    case M32C_OPERAND_IMM_8_S4 :
3896
0
      value = fields->f_imm_8_s4;
3897
0
      break;
3898
0
    case M32C_OPERAND_IMM_8_S4N :
3899
0
      value = fields->f_imm_8_s4;
3900
0
      break;
3901
0
    case M32C_OPERAND_IMM_SH_12_S4 :
3902
0
      value = fields->f_imm_12_s4;
3903
0
      break;
3904
0
    case M32C_OPERAND_IMM_SH_20_S4 :
3905
0
      value = fields->f_imm_20_s4;
3906
0
      break;
3907
0
    case M32C_OPERAND_IMM_SH_8_S4 :
3908
0
      value = fields->f_imm_8_s4;
3909
0
      break;
3910
0
    case M32C_OPERAND_IMM1_S :
3911
0
      value = fields->f_imm1_S;
3912
0
      break;
3913
0
    case M32C_OPERAND_IMM3_S :
3914
0
      value = fields->f_imm3_S;
3915
0
      break;
3916
0
    case M32C_OPERAND_LAB_16_8 :
3917
0
      value = fields->f_lab_16_8;
3918
0
      break;
3919
0
    case M32C_OPERAND_LAB_24_8 :
3920
0
      value = fields->f_lab_24_8;
3921
0
      break;
3922
0
    case M32C_OPERAND_LAB_32_8 :
3923
0
      value = fields->f_lab_32_8;
3924
0
      break;
3925
0
    case M32C_OPERAND_LAB_40_8 :
3926
0
      value = fields->f_lab_40_8;
3927
0
      break;
3928
0
    case M32C_OPERAND_LAB_5_3 :
3929
0
      value = fields->f_lab_5_3;
3930
0
      break;
3931
0
    case M32C_OPERAND_LAB_8_16 :
3932
0
      value = fields->f_lab_8_16;
3933
0
      break;
3934
0
    case M32C_OPERAND_LAB_8_24 :
3935
0
      value = fields->f_lab_8_24;
3936
0
      break;
3937
0
    case M32C_OPERAND_LAB_8_8 :
3938
0
      value = fields->f_lab_8_8;
3939
0
      break;
3940
0
    case M32C_OPERAND_LAB32_JMP_S :
3941
0
      value = fields->f_lab32_jmp_s;
3942
0
      break;
3943
0
    case M32C_OPERAND_Q :
3944
0
      value = 0;
3945
0
      break;
3946
0
    case M32C_OPERAND_R0 :
3947
0
      value = 0;
3948
0
      break;
3949
0
    case M32C_OPERAND_R0H :
3950
0
      value = 0;
3951
0
      break;
3952
0
    case M32C_OPERAND_R0L :
3953
0
      value = 0;
3954
0
      break;
3955
0
    case M32C_OPERAND_R1 :
3956
0
      value = 0;
3957
0
      break;
3958
0
    case M32C_OPERAND_R1R2R0 :
3959
0
      value = 0;
3960
0
      break;
3961
0
    case M32C_OPERAND_R2 :
3962
0
      value = 0;
3963
0
      break;
3964
0
    case M32C_OPERAND_R2R0 :
3965
0
      value = 0;
3966
0
      break;
3967
0
    case M32C_OPERAND_R3 :
3968
0
      value = 0;
3969
0
      break;
3970
0
    case M32C_OPERAND_R3R1 :
3971
0
      value = 0;
3972
0
      break;
3973
0
    case M32C_OPERAND_REGSETPOP :
3974
0
      value = fields->f_8_8;
3975
0
      break;
3976
0
    case M32C_OPERAND_REGSETPUSH :
3977
0
      value = fields->f_8_8;
3978
0
      break;
3979
0
    case M32C_OPERAND_RN16_PUSH_S :
3980
0
      value = fields->f_4_1;
3981
0
      break;
3982
0
    case M32C_OPERAND_S :
3983
0
      value = 0;
3984
0
      break;
3985
0
    case M32C_OPERAND_SRC16AN :
3986
0
      value = fields->f_src16_an;
3987
0
      break;
3988
0
    case M32C_OPERAND_SRC16ANHI :
3989
0
      value = fields->f_src16_an;
3990
0
      break;
3991
0
    case M32C_OPERAND_SRC16ANQI :
3992
0
      value = fields->f_src16_an;
3993
0
      break;
3994
0
    case M32C_OPERAND_SRC16RNHI :
3995
0
      value = fields->f_src16_rn;
3996
0
      break;
3997
0
    case M32C_OPERAND_SRC16RNQI :
3998
0
      value = fields->f_src16_rn;
3999
0
      break;
4000
0
    case M32C_OPERAND_SRC32ANPREFIXED :
4001
0
      value = fields->f_src32_an_prefixed;
4002
0
      break;
4003
0
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
4004
0
      value = fields->f_src32_an_prefixed;
4005
0
      break;
4006
0
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
4007
0
      value = fields->f_src32_an_prefixed;
4008
0
      break;
4009
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
4010
0
      value = fields->f_src32_an_prefixed;
4011
0
      break;
4012
0
    case M32C_OPERAND_SRC32ANUNPREFIXED :
4013
0
      value = fields->f_src32_an_unprefixed;
4014
0
      break;
4015
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4016
0
      value = fields->f_src32_an_unprefixed;
4017
0
      break;
4018
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4019
0
      value = fields->f_src32_an_unprefixed;
4020
0
      break;
4021
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4022
0
      value = fields->f_src32_an_unprefixed;
4023
0
      break;
4024
0
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
4025
0
      value = fields->f_src32_rn_prefixed_HI;
4026
0
      break;
4027
0
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
4028
0
      value = fields->f_src32_rn_prefixed_QI;
4029
0
      break;
4030
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
4031
0
      value = fields->f_src32_rn_prefixed_SI;
4032
0
      break;
4033
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4034
0
      value = fields->f_src32_rn_unprefixed_HI;
4035
0
      break;
4036
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4037
0
      value = fields->f_src32_rn_unprefixed_QI;
4038
0
      break;
4039
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4040
0
      value = fields->f_src32_rn_unprefixed_SI;
4041
0
      break;
4042
0
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4043
0
      value = fields->f_5_1;
4044
0
      break;
4045
0
    case M32C_OPERAND_X :
4046
0
      value = 0;
4047
0
      break;
4048
0
    case M32C_OPERAND_Z :
4049
0
      value = 0;
4050
0
      break;
4051
0
    case M32C_OPERAND_COND16_16 :
4052
0
      value = fields->f_dsp_16_u8;
4053
0
      break;
4054
0
    case M32C_OPERAND_COND16_24 :
4055
0
      value = fields->f_dsp_24_u8;
4056
0
      break;
4057
0
    case M32C_OPERAND_COND16_32 :
4058
0
      value = fields->f_dsp_32_u8;
4059
0
      break;
4060
0
    case M32C_OPERAND_COND16C :
4061
0
      value = fields->f_cond16;
4062
0
      break;
4063
0
    case M32C_OPERAND_COND16J :
4064
0
      value = fields->f_cond16;
4065
0
      break;
4066
0
    case M32C_OPERAND_COND16J5 :
4067
0
      value = fields->f_cond16j_5;
4068
0
      break;
4069
0
    case M32C_OPERAND_COND32 :
4070
0
      value = fields->f_cond32;
4071
0
      break;
4072
0
    case M32C_OPERAND_COND32_16 :
4073
0
      value = fields->f_dsp_16_u8;
4074
0
      break;
4075
0
    case M32C_OPERAND_COND32_24 :
4076
0
      value = fields->f_dsp_24_u8;
4077
0
      break;
4078
0
    case M32C_OPERAND_COND32_32 :
4079
0
      value = fields->f_dsp_32_u8;
4080
0
      break;
4081
0
    case M32C_OPERAND_COND32_40 :
4082
0
      value = fields->f_dsp_40_u8;
4083
0
      break;
4084
0
    case M32C_OPERAND_COND32J :
4085
0
      value = fields->f_cond32j;
4086
0
      break;
4087
0
    case M32C_OPERAND_CR1_PREFIXED_32 :
4088
0
      value = fields->f_21_3;
4089
0
      break;
4090
0
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
4091
0
      value = fields->f_13_3;
4092
0
      break;
4093
0
    case M32C_OPERAND_CR16 :
4094
0
      value = fields->f_9_3;
4095
0
      break;
4096
0
    case M32C_OPERAND_CR2_32 :
4097
0
      value = fields->f_13_3;
4098
0
      break;
4099
0
    case M32C_OPERAND_CR3_PREFIXED_32 :
4100
0
      value = fields->f_21_3;
4101
0
      break;
4102
0
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
4103
0
      value = fields->f_13_3;
4104
0
      break;
4105
0
    case M32C_OPERAND_FLAGS16 :
4106
0
      value = fields->f_9_3;
4107
0
      break;
4108
0
    case M32C_OPERAND_FLAGS32 :
4109
0
      value = fields->f_13_3;
4110
0
      break;
4111
0
    case M32C_OPERAND_SCCOND32 :
4112
0
      value = fields->f_cond16;
4113
0
      break;
4114
0
    case M32C_OPERAND_SIZE :
4115
0
      value = 0;
4116
0
      break;
4117
4118
0
    default :
4119
      /* xgettext:c-format */
4120
0
      opcodes_error_handler
4121
0
  (_("internal error: unrecognized field %d while getting vma operand"),
4122
0
   opindex);
4123
0
      abort ();
4124
0
  }
4125
4126
0
  return value;
4127
0
}
4128
4129
void m32c_cgen_set_int_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4130
void m32c_cgen_set_vma_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4131
4132
/* Stuffing values in cgen_fields is handled by a collection of functions.
4133
   They are distinguished by the type of the VALUE argument they accept.
4134
   TODO: floating point, inlining support, remove cases where argument type
4135
   not appropriate.  */
4136
4137
void
4138
m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4139
           int opindex,
4140
           CGEN_FIELDS * fields,
4141
           int value)
4142
0
{
4143
0
  switch (opindex)
4144
0
    {
4145
0
    case M32C_OPERAND_A0 :
4146
0
      break;
4147
0
    case M32C_OPERAND_A1 :
4148
0
      break;
4149
0
    case M32C_OPERAND_AN16_PUSH_S :
4150
0
      fields->f_4_1 = value;
4151
0
      break;
4152
0
    case M32C_OPERAND_BIT16AN :
4153
0
      fields->f_dst16_an = value;
4154
0
      break;
4155
0
    case M32C_OPERAND_BIT16RN :
4156
0
      fields->f_dst16_rn = value;
4157
0
      break;
4158
0
    case M32C_OPERAND_BIT3_S :
4159
0
      fields->f_imm3_S = value;
4160
0
      break;
4161
0
    case M32C_OPERAND_BIT32ANPREFIXED :
4162
0
      fields->f_dst32_an_prefixed = value;
4163
0
      break;
4164
0
    case M32C_OPERAND_BIT32ANUNPREFIXED :
4165
0
      fields->f_dst32_an_unprefixed = value;
4166
0
      break;
4167
0
    case M32C_OPERAND_BIT32RNPREFIXED :
4168
0
      fields->f_dst32_rn_prefixed_QI = value;
4169
0
      break;
4170
0
    case M32C_OPERAND_BIT32RNUNPREFIXED :
4171
0
      fields->f_dst32_rn_unprefixed_QI = value;
4172
0
      break;
4173
0
    case M32C_OPERAND_BITBASE16_16_S8 :
4174
0
      fields->f_dsp_16_s8 = value;
4175
0
      break;
4176
0
    case M32C_OPERAND_BITBASE16_16_U16 :
4177
0
      fields->f_dsp_16_u16 = value;
4178
0
      break;
4179
0
    case M32C_OPERAND_BITBASE16_16_U8 :
4180
0
      fields->f_dsp_16_u8 = value;
4181
0
      break;
4182
0
    case M32C_OPERAND_BITBASE16_8_U11_S :
4183
0
      fields->f_bitbase16_u11_S = value;
4184
0
      break;
4185
0
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4186
0
      fields->f_bitbase32_16_s11_unprefixed = value;
4187
0
      break;
4188
0
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4189
0
      fields->f_bitbase32_16_s19_unprefixed = value;
4190
0
      break;
4191
0
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4192
0
      fields->f_bitbase32_16_u11_unprefixed = value;
4193
0
      break;
4194
0
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4195
0
      fields->f_bitbase32_16_u19_unprefixed = value;
4196
0
      break;
4197
0
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4198
0
      fields->f_bitbase32_16_u27_unprefixed = value;
4199
0
      break;
4200
0
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4201
0
      fields->f_bitbase32_24_s11_prefixed = value;
4202
0
      break;
4203
0
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4204
0
      fields->f_bitbase32_24_s19_prefixed = value;
4205
0
      break;
4206
0
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4207
0
      fields->f_bitbase32_24_u11_prefixed = value;
4208
0
      break;
4209
0
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4210
0
      fields->f_bitbase32_24_u19_prefixed = value;
4211
0
      break;
4212
0
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4213
0
      fields->f_bitbase32_24_u27_prefixed = value;
4214
0
      break;
4215
0
    case M32C_OPERAND_BITNO16R :
4216
0
      fields->f_dsp_16_u8 = value;
4217
0
      break;
4218
0
    case M32C_OPERAND_BITNO32PREFIXED :
4219
0
      fields->f_bitno32_prefixed = value;
4220
0
      break;
4221
0
    case M32C_OPERAND_BITNO32UNPREFIXED :
4222
0
      fields->f_bitno32_unprefixed = value;
4223
0
      break;
4224
0
    case M32C_OPERAND_DSP_10_U6 :
4225
0
      fields->f_dsp_10_u6 = value;
4226
0
      break;
4227
0
    case M32C_OPERAND_DSP_16_S16 :
4228
0
      fields->f_dsp_16_s16 = value;
4229
0
      break;
4230
0
    case M32C_OPERAND_DSP_16_S8 :
4231
0
      fields->f_dsp_16_s8 = value;
4232
0
      break;
4233
0
    case M32C_OPERAND_DSP_16_U16 :
4234
0
      fields->f_dsp_16_u16 = value;
4235
0
      break;
4236
0
    case M32C_OPERAND_DSP_16_U20 :
4237
0
      fields->f_dsp_16_u24 = value;
4238
0
      break;
4239
0
    case M32C_OPERAND_DSP_16_U24 :
4240
0
      fields->f_dsp_16_u24 = value;
4241
0
      break;
4242
0
    case M32C_OPERAND_DSP_16_U8 :
4243
0
      fields->f_dsp_16_u8 = value;
4244
0
      break;
4245
0
    case M32C_OPERAND_DSP_24_S16 :
4246
0
      fields->f_dsp_24_s16 = value;
4247
0
      break;
4248
0
    case M32C_OPERAND_DSP_24_S8 :
4249
0
      fields->f_dsp_24_s8 = value;
4250
0
      break;
4251
0
    case M32C_OPERAND_DSP_24_U16 :
4252
0
      fields->f_dsp_24_u16 = value;
4253
0
      break;
4254
0
    case M32C_OPERAND_DSP_24_U20 :
4255
0
      fields->f_dsp_24_u24 = value;
4256
0
      break;
4257
0
    case M32C_OPERAND_DSP_24_U24 :
4258
0
      fields->f_dsp_24_u24 = value;
4259
0
      break;
4260
0
    case M32C_OPERAND_DSP_24_U8 :
4261
0
      fields->f_dsp_24_u8 = value;
4262
0
      break;
4263
0
    case M32C_OPERAND_DSP_32_S16 :
4264
0
      fields->f_dsp_32_s16 = value;
4265
0
      break;
4266
0
    case M32C_OPERAND_DSP_32_S8 :
4267
0
      fields->f_dsp_32_s8 = value;
4268
0
      break;
4269
0
    case M32C_OPERAND_DSP_32_U16 :
4270
0
      fields->f_dsp_32_u16 = value;
4271
0
      break;
4272
0
    case M32C_OPERAND_DSP_32_U20 :
4273
0
      fields->f_dsp_32_u24 = value;
4274
0
      break;
4275
0
    case M32C_OPERAND_DSP_32_U24 :
4276
0
      fields->f_dsp_32_u24 = value;
4277
0
      break;
4278
0
    case M32C_OPERAND_DSP_32_U8 :
4279
0
      fields->f_dsp_32_u8 = value;
4280
0
      break;
4281
0
    case M32C_OPERAND_DSP_40_S16 :
4282
0
      fields->f_dsp_40_s16 = value;
4283
0
      break;
4284
0
    case M32C_OPERAND_DSP_40_S8 :
4285
0
      fields->f_dsp_40_s8 = value;
4286
0
      break;
4287
0
    case M32C_OPERAND_DSP_40_U16 :
4288
0
      fields->f_dsp_40_u16 = value;
4289
0
      break;
4290
0
    case M32C_OPERAND_DSP_40_U20 :
4291
0
      fields->f_dsp_40_u20 = value;
4292
0
      break;
4293
0
    case M32C_OPERAND_DSP_40_U24 :
4294
0
      fields->f_dsp_40_u24 = value;
4295
0
      break;
4296
0
    case M32C_OPERAND_DSP_40_U8 :
4297
0
      fields->f_dsp_40_u8 = value;
4298
0
      break;
4299
0
    case M32C_OPERAND_DSP_48_S16 :
4300
0
      fields->f_dsp_48_s16 = value;
4301
0
      break;
4302
0
    case M32C_OPERAND_DSP_48_S8 :
4303
0
      fields->f_dsp_48_s8 = value;
4304
0
      break;
4305
0
    case M32C_OPERAND_DSP_48_U16 :
4306
0
      fields->f_dsp_48_u16 = value;
4307
0
      break;
4308
0
    case M32C_OPERAND_DSP_48_U20 :
4309
0
      fields->f_dsp_48_u20 = value;
4310
0
      break;
4311
0
    case M32C_OPERAND_DSP_48_U24 :
4312
0
      fields->f_dsp_48_u24 = value;
4313
0
      break;
4314
0
    case M32C_OPERAND_DSP_48_U8 :
4315
0
      fields->f_dsp_48_u8 = value;
4316
0
      break;
4317
0
    case M32C_OPERAND_DSP_8_S24 :
4318
0
      fields->f_dsp_8_s24 = value;
4319
0
      break;
4320
0
    case M32C_OPERAND_DSP_8_S8 :
4321
0
      fields->f_dsp_8_s8 = value;
4322
0
      break;
4323
0
    case M32C_OPERAND_DSP_8_U16 :
4324
0
      fields->f_dsp_8_u16 = value;
4325
0
      break;
4326
0
    case M32C_OPERAND_DSP_8_U24 :
4327
0
      fields->f_dsp_8_u24 = value;
4328
0
      break;
4329
0
    case M32C_OPERAND_DSP_8_U6 :
4330
0
      fields->f_dsp_8_u6 = value;
4331
0
      break;
4332
0
    case M32C_OPERAND_DSP_8_U8 :
4333
0
      fields->f_dsp_8_u8 = value;
4334
0
      break;
4335
0
    case M32C_OPERAND_DST16AN :
4336
0
      fields->f_dst16_an = value;
4337
0
      break;
4338
0
    case M32C_OPERAND_DST16AN_S :
4339
0
      fields->f_dst16_an_s = value;
4340
0
      break;
4341
0
    case M32C_OPERAND_DST16ANHI :
4342
0
      fields->f_dst16_an = value;
4343
0
      break;
4344
0
    case M32C_OPERAND_DST16ANQI :
4345
0
      fields->f_dst16_an = value;
4346
0
      break;
4347
0
    case M32C_OPERAND_DST16ANQI_S :
4348
0
      fields->f_dst16_rn_QI_s = value;
4349
0
      break;
4350
0
    case M32C_OPERAND_DST16ANSI :
4351
0
      fields->f_dst16_an = value;
4352
0
      break;
4353
0
    case M32C_OPERAND_DST16RNEXTQI :
4354
0
      fields->f_dst16_rn_ext = value;
4355
0
      break;
4356
0
    case M32C_OPERAND_DST16RNHI :
4357
0
      fields->f_dst16_rn = value;
4358
0
      break;
4359
0
    case M32C_OPERAND_DST16RNQI :
4360
0
      fields->f_dst16_rn = value;
4361
0
      break;
4362
0
    case M32C_OPERAND_DST16RNQI_S :
4363
0
      fields->f_dst16_rn_QI_s = value;
4364
0
      break;
4365
0
    case M32C_OPERAND_DST16RNSI :
4366
0
      fields->f_dst16_rn = value;
4367
0
      break;
4368
0
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4369
0
      fields->f_dst32_an_unprefixed = value;
4370
0
      break;
4371
0
    case M32C_OPERAND_DST32ANPREFIXED :
4372
0
      fields->f_dst32_an_prefixed = value;
4373
0
      break;
4374
0
    case M32C_OPERAND_DST32ANPREFIXEDHI :
4375
0
      fields->f_dst32_an_prefixed = value;
4376
0
      break;
4377
0
    case M32C_OPERAND_DST32ANPREFIXEDQI :
4378
0
      fields->f_dst32_an_prefixed = value;
4379
0
      break;
4380
0
    case M32C_OPERAND_DST32ANPREFIXEDSI :
4381
0
      fields->f_dst32_an_prefixed = value;
4382
0
      break;
4383
0
    case M32C_OPERAND_DST32ANUNPREFIXED :
4384
0
      fields->f_dst32_an_unprefixed = value;
4385
0
      break;
4386
0
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4387
0
      fields->f_dst32_an_unprefixed = value;
4388
0
      break;
4389
0
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4390
0
      fields->f_dst32_an_unprefixed = value;
4391
0
      break;
4392
0
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4393
0
      fields->f_dst32_an_unprefixed = value;
4394
0
      break;
4395
0
    case M32C_OPERAND_DST32R0HI_S :
4396
0
      break;
4397
0
    case M32C_OPERAND_DST32R0QI_S :
4398
0
      break;
4399
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4400
0
      fields->f_dst32_rn_ext_unprefixed = value;
4401
0
      break;
4402
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4403
0
      fields->f_dst32_rn_ext_unprefixed = value;
4404
0
      break;
4405
0
    case M32C_OPERAND_DST32RNPREFIXEDHI :
4406
0
      fields->f_dst32_rn_prefixed_HI = value;
4407
0
      break;
4408
0
    case M32C_OPERAND_DST32RNPREFIXEDQI :
4409
0
      fields->f_dst32_rn_prefixed_QI = value;
4410
0
      break;
4411
0
    case M32C_OPERAND_DST32RNPREFIXEDSI :
4412
0
      fields->f_dst32_rn_prefixed_SI = value;
4413
0
      break;
4414
0
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4415
0
      fields->f_dst32_rn_unprefixed_HI = value;
4416
0
      break;
4417
0
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4418
0
      fields->f_dst32_rn_unprefixed_QI = value;
4419
0
      break;
4420
0
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4421
0
      fields->f_dst32_rn_unprefixed_SI = value;
4422
0
      break;
4423
0
    case M32C_OPERAND_G :
4424
0
      break;
4425
0
    case M32C_OPERAND_IMM_12_S4 :
4426
0
      fields->f_imm_12_s4 = value;
4427
0
      break;
4428
0
    case M32C_OPERAND_IMM_12_S4N :
4429
0
      fields->f_imm_12_s4 = value;
4430
0
      break;
4431
0
    case M32C_OPERAND_IMM_13_U3 :
4432
0
      fields->f_imm_13_u3 = value;
4433
0
      break;
4434
0
    case M32C_OPERAND_IMM_16_HI :
4435
0
      fields->f_dsp_16_s16 = value;
4436
0
      break;
4437
0
    case M32C_OPERAND_IMM_16_QI :
4438
0
      fields->f_dsp_16_s8 = value;
4439
0
      break;
4440
0
    case M32C_OPERAND_IMM_16_SI :
4441
0
      fields->f_dsp_16_s32 = value;
4442
0
      break;
4443
0
    case M32C_OPERAND_IMM_20_S4 :
4444
0
      fields->f_imm_20_s4 = value;
4445
0
      break;
4446
0
    case M32C_OPERAND_IMM_24_HI :
4447
0
      fields->f_dsp_24_s16 = value;
4448
0
      break;
4449
0
    case M32C_OPERAND_IMM_24_QI :
4450
0
      fields->f_dsp_24_s8 = value;
4451
0
      break;
4452
0
    case M32C_OPERAND_IMM_24_SI :
4453
0
      fields->f_dsp_24_s32 = value;
4454
0
      break;
4455
0
    case M32C_OPERAND_IMM_32_HI :
4456
0
      fields->f_dsp_32_s16 = value;
4457
0
      break;
4458
0
    case M32C_OPERAND_IMM_32_QI :
4459
0
      fields->f_dsp_32_s8 = value;
4460
0
      break;
4461
0
    case M32C_OPERAND_IMM_32_SI :
4462
0
      fields->f_dsp_32_s32 = value;
4463
0
      break;
4464
0
    case M32C_OPERAND_IMM_40_HI :
4465
0
      fields->f_dsp_40_s16 = value;
4466
0
      break;
4467
0
    case M32C_OPERAND_IMM_40_QI :
4468
0
      fields->f_dsp_40_s8 = value;
4469
0
      break;
4470
0
    case M32C_OPERAND_IMM_40_SI :
4471
0
      fields->f_dsp_40_s32 = value;
4472
0
      break;
4473
0
    case M32C_OPERAND_IMM_48_HI :
4474
0
      fields->f_dsp_48_s16 = value;
4475
0
      break;
4476
0
    case M32C_OPERAND_IMM_48_QI :
4477
0
      fields->f_dsp_48_s8 = value;
4478
0
      break;
4479
0
    case M32C_OPERAND_IMM_48_SI :
4480
0
      fields->f_dsp_48_s32 = value;
4481
0
      break;
4482
0
    case M32C_OPERAND_IMM_56_HI :
4483
0
      fields->f_dsp_56_s16 = value;
4484
0
      break;
4485
0
    case M32C_OPERAND_IMM_56_QI :
4486
0
      fields->f_dsp_56_s8 = value;
4487
0
      break;
4488
0
    case M32C_OPERAND_IMM_64_HI :
4489
0
      fields->f_dsp_64_s16 = value;
4490
0
      break;
4491
0
    case M32C_OPERAND_IMM_8_HI :
4492
0
      fields->f_dsp_8_s16 = value;
4493
0
      break;
4494
0
    case M32C_OPERAND_IMM_8_QI :
4495
0
      fields->f_dsp_8_s8 = value;
4496
0
      break;
4497
0
    case M32C_OPERAND_IMM_8_S4 :
4498
0
      fields->f_imm_8_s4 = value;
4499
0
      break;
4500
0
    case M32C_OPERAND_IMM_8_S4N :
4501
0
      fields->f_imm_8_s4 = value;
4502
0
      break;
4503
0
    case M32C_OPERAND_IMM_SH_12_S4 :
4504
0
      fields->f_imm_12_s4 = value;
4505
0
      break;
4506
0
    case M32C_OPERAND_IMM_SH_20_S4 :
4507
0
      fields->f_imm_20_s4 = value;
4508
0
      break;
4509
0
    case M32C_OPERAND_IMM_SH_8_S4 :
4510
0
      fields->f_imm_8_s4 = value;
4511
0
      break;
4512
0
    case M32C_OPERAND_IMM1_S :
4513
0
      fields->f_imm1_S = value;
4514
0
      break;
4515
0
    case M32C_OPERAND_IMM3_S :
4516
0
      fields->f_imm3_S = value;
4517
0
      break;
4518
0
    case M32C_OPERAND_LAB_16_8 :
4519
0
      fields->f_lab_16_8 = value;
4520
0
      break;
4521
0
    case M32C_OPERAND_LAB_24_8 :
4522
0
      fields->f_lab_24_8 = value;
4523
0
      break;
4524
0
    case M32C_OPERAND_LAB_32_8 :
4525
0
      fields->f_lab_32_8 = value;
4526
0
      break;
4527
0
    case M32C_OPERAND_LAB_40_8 :
4528
0
      fields->f_lab_40_8 = value;
4529
0
      break;
4530
0
    case M32C_OPERAND_LAB_5_3 :
4531
0
      fields->f_lab_5_3 = value;
4532
0
      break;
4533
0
    case M32C_OPERAND_LAB_8_16 :
4534
0
      fields->f_lab_8_16 = value;
4535
0
      break;
4536
0
    case M32C_OPERAND_LAB_8_24 :
4537
0
      fields->f_lab_8_24 = value;
4538
0
      break;
4539
0
    case M32C_OPERAND_LAB_8_8 :
4540
0
      fields->f_lab_8_8 = value;
4541
0
      break;
4542
0
    case M32C_OPERAND_LAB32_JMP_S :
4543
0
      fields->f_lab32_jmp_s = value;
4544
0
      break;
4545
0
    case M32C_OPERAND_Q :
4546
0
      break;
4547
0
    case M32C_OPERAND_R0 :
4548
0
      break;
4549
0
    case M32C_OPERAND_R0H :
4550
0
      break;
4551
0
    case M32C_OPERAND_R0L :
4552
0
      break;
4553
0
    case M32C_OPERAND_R1 :
4554
0
      break;
4555
0
    case M32C_OPERAND_R1R2R0 :
4556
0
      break;
4557
0
    case M32C_OPERAND_R2 :
4558
0
      break;
4559
0
    case M32C_OPERAND_R2R0 :
4560
0
      break;
4561
0
    case M32C_OPERAND_R3 :
4562
0
      break;
4563
0
    case M32C_OPERAND_R3R1 :
4564
0
      break;
4565
0
    case M32C_OPERAND_REGSETPOP :
4566
0
      fields->f_8_8 = value;
4567
0
      break;
4568
0
    case M32C_OPERAND_REGSETPUSH :
4569
0
      fields->f_8_8 = value;
4570
0
      break;
4571
0
    case M32C_OPERAND_RN16_PUSH_S :
4572
0
      fields->f_4_1 = value;
4573
0
      break;
4574
0
    case M32C_OPERAND_S :
4575
0
      break;
4576
0
    case M32C_OPERAND_SRC16AN :
4577
0
      fields->f_src16_an = value;
4578
0
      break;
4579
0
    case M32C_OPERAND_SRC16ANHI :
4580
0
      fields->f_src16_an = value;
4581
0
      break;
4582
0
    case M32C_OPERAND_SRC16ANQI :
4583
0
      fields->f_src16_an = value;
4584
0
      break;
4585
0
    case M32C_OPERAND_SRC16RNHI :
4586
0
      fields->f_src16_rn = value;
4587
0
      break;
4588
0
    case M32C_OPERAND_SRC16RNQI :
4589
0
      fields->f_src16_rn = value;
4590
0
      break;
4591
0
    case M32C_OPERAND_SRC32ANPREFIXED :
4592
0
      fields->f_src32_an_prefixed = value;
4593
0
      break;
4594
0
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
4595
0
      fields->f_src32_an_prefixed = value;
4596
0
      break;
4597
0
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
4598
0
      fields->f_src32_an_prefixed = value;
4599
0
      break;
4600
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
4601
0
      fields->f_src32_an_prefixed = value;
4602
0
      break;
4603
0
    case M32C_OPERAND_SRC32ANUNPREFIXED :
4604
0
      fields->f_src32_an_unprefixed = value;
4605
0
      break;
4606
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4607
0
      fields->f_src32_an_unprefixed = value;
4608
0
      break;
4609
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4610
0
      fields->f_src32_an_unprefixed = value;
4611
0
      break;
4612
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4613
0
      fields->f_src32_an_unprefixed = value;
4614
0
      break;
4615
0
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
4616
0
      fields->f_src32_rn_prefixed_HI = value;
4617
0
      break;
4618
0
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
4619
0
      fields->f_src32_rn_prefixed_QI = value;
4620
0
      break;
4621
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
4622
0
      fields->f_src32_rn_prefixed_SI = value;
4623
0
      break;
4624
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4625
0
      fields->f_src32_rn_unprefixed_HI = value;
4626
0
      break;
4627
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4628
0
      fields->f_src32_rn_unprefixed_QI = value;
4629
0
      break;
4630
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4631
0
      fields->f_src32_rn_unprefixed_SI = value;
4632
0
      break;
4633
0
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4634
0
      fields->f_5_1 = value;
4635
0
      break;
4636
0
    case M32C_OPERAND_X :
4637
0
      break;
4638
0
    case M32C_OPERAND_Z :
4639
0
      break;
4640
0
    case M32C_OPERAND_COND16_16 :
4641
0
      fields->f_dsp_16_u8 = value;
4642
0
      break;
4643
0
    case M32C_OPERAND_COND16_24 :
4644
0
      fields->f_dsp_24_u8 = value;
4645
0
      break;
4646
0
    case M32C_OPERAND_COND16_32 :
4647
0
      fields->f_dsp_32_u8 = value;
4648
0
      break;
4649
0
    case M32C_OPERAND_COND16C :
4650
0
      fields->f_cond16 = value;
4651
0
      break;
4652
0
    case M32C_OPERAND_COND16J :
4653
0
      fields->f_cond16 = value;
4654
0
      break;
4655
0
    case M32C_OPERAND_COND16J5 :
4656
0
      fields->f_cond16j_5 = value;
4657
0
      break;
4658
0
    case M32C_OPERAND_COND32 :
4659
0
      fields->f_cond32 = value;
4660
0
      break;
4661
0
    case M32C_OPERAND_COND32_16 :
4662
0
      fields->f_dsp_16_u8 = value;
4663
0
      break;
4664
0
    case M32C_OPERAND_COND32_24 :
4665
0
      fields->f_dsp_24_u8 = value;
4666
0
      break;
4667
0
    case M32C_OPERAND_COND32_32 :
4668
0
      fields->f_dsp_32_u8 = value;
4669
0
      break;
4670
0
    case M32C_OPERAND_COND32_40 :
4671
0
      fields->f_dsp_40_u8 = value;
4672
0
      break;
4673
0
    case M32C_OPERAND_COND32J :
4674
0
      fields->f_cond32j = value;
4675
0
      break;
4676
0
    case M32C_OPERAND_CR1_PREFIXED_32 :
4677
0
      fields->f_21_3 = value;
4678
0
      break;
4679
0
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
4680
0
      fields->f_13_3 = value;
4681
0
      break;
4682
0
    case M32C_OPERAND_CR16 :
4683
0
      fields->f_9_3 = value;
4684
0
      break;
4685
0
    case M32C_OPERAND_CR2_32 :
4686
0
      fields->f_13_3 = value;
4687
0
      break;
4688
0
    case M32C_OPERAND_CR3_PREFIXED_32 :
4689
0
      fields->f_21_3 = value;
4690
0
      break;
4691
0
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
4692
0
      fields->f_13_3 = value;
4693
0
      break;
4694
0
    case M32C_OPERAND_FLAGS16 :
4695
0
      fields->f_9_3 = value;
4696
0
      break;
4697
0
    case M32C_OPERAND_FLAGS32 :
4698
0
      fields->f_13_3 = value;
4699
0
      break;
4700
0
    case M32C_OPERAND_SCCOND32 :
4701
0
      fields->f_cond16 = value;
4702
0
      break;
4703
0
    case M32C_OPERAND_SIZE :
4704
0
      break;
4705
4706
0
    default :
4707
      /* xgettext:c-format */
4708
0
      opcodes_error_handler
4709
0
  (_("internal error: unrecognized field %d while setting int operand"),
4710
0
   opindex);
4711
0
      abort ();
4712
0
  }
4713
0
}
4714
4715
void
4716
m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4717
           int opindex,
4718
           CGEN_FIELDS * fields,
4719
           bfd_vma value)
4720
0
{
4721
0
  switch (opindex)
4722
0
    {
4723
0
    case M32C_OPERAND_A0 :
4724
0
      break;
4725
0
    case M32C_OPERAND_A1 :
4726
0
      break;
4727
0
    case M32C_OPERAND_AN16_PUSH_S :
4728
0
      fields->f_4_1 = value;
4729
0
      break;
4730
0
    case M32C_OPERAND_BIT16AN :
4731
0
      fields->f_dst16_an = value;
4732
0
      break;
4733
0
    case M32C_OPERAND_BIT16RN :
4734
0
      fields->f_dst16_rn = value;
4735
0
      break;
4736
0
    case M32C_OPERAND_BIT3_S :
4737
0
      fields->f_imm3_S = value;
4738
0
      break;
4739
0
    case M32C_OPERAND_BIT32ANPREFIXED :
4740
0
      fields->f_dst32_an_prefixed = value;
4741
0
      break;
4742
0
    case M32C_OPERAND_BIT32ANUNPREFIXED :
4743
0
      fields->f_dst32_an_unprefixed = value;
4744
0
      break;
4745
0
    case M32C_OPERAND_BIT32RNPREFIXED :
4746
0
      fields->f_dst32_rn_prefixed_QI = value;
4747
0
      break;
4748
0
    case M32C_OPERAND_BIT32RNUNPREFIXED :
4749
0
      fields->f_dst32_rn_unprefixed_QI = value;
4750
0
      break;
4751
0
    case M32C_OPERAND_BITBASE16_16_S8 :
4752
0
      fields->f_dsp_16_s8 = value;
4753
0
      break;
4754
0
    case M32C_OPERAND_BITBASE16_16_U16 :
4755
0
      fields->f_dsp_16_u16 = value;
4756
0
      break;
4757
0
    case M32C_OPERAND_BITBASE16_16_U8 :
4758
0
      fields->f_dsp_16_u8 = value;
4759
0
      break;
4760
0
    case M32C_OPERAND_BITBASE16_8_U11_S :
4761
0
      fields->f_bitbase16_u11_S = value;
4762
0
      break;
4763
0
    case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4764
0
      fields->f_bitbase32_16_s11_unprefixed = value;
4765
0
      break;
4766
0
    case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4767
0
      fields->f_bitbase32_16_s19_unprefixed = value;
4768
0
      break;
4769
0
    case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4770
0
      fields->f_bitbase32_16_u11_unprefixed = value;
4771
0
      break;
4772
0
    case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4773
0
      fields->f_bitbase32_16_u19_unprefixed = value;
4774
0
      break;
4775
0
    case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4776
0
      fields->f_bitbase32_16_u27_unprefixed = value;
4777
0
      break;
4778
0
    case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4779
0
      fields->f_bitbase32_24_s11_prefixed = value;
4780
0
      break;
4781
0
    case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4782
0
      fields->f_bitbase32_24_s19_prefixed = value;
4783
0
      break;
4784
0
    case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4785
0
      fields->f_bitbase32_24_u11_prefixed = value;
4786
0
      break;
4787
0
    case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4788
0
      fields->f_bitbase32_24_u19_prefixed = value;
4789
0
      break;
4790
0
    case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4791
0
      fields->f_bitbase32_24_u27_prefixed = value;
4792
0
      break;
4793
0
    case M32C_OPERAND_BITNO16R :
4794
0
      fields->f_dsp_16_u8 = value;
4795
0
      break;
4796
0
    case M32C_OPERAND_BITNO32PREFIXED :
4797
0
      fields->f_bitno32_prefixed = value;
4798
0
      break;
4799
0
    case M32C_OPERAND_BITNO32UNPREFIXED :
4800
0
      fields->f_bitno32_unprefixed = value;
4801
0
      break;
4802
0
    case M32C_OPERAND_DSP_10_U6 :
4803
0
      fields->f_dsp_10_u6 = value;
4804
0
      break;
4805
0
    case M32C_OPERAND_DSP_16_S16 :
4806
0
      fields->f_dsp_16_s16 = value;
4807
0
      break;
4808
0
    case M32C_OPERAND_DSP_16_S8 :
4809
0
      fields->f_dsp_16_s8 = value;
4810
0
      break;
4811
0
    case M32C_OPERAND_DSP_16_U16 :
4812
0
      fields->f_dsp_16_u16 = value;
4813
0
      break;
4814
0
    case M32C_OPERAND_DSP_16_U20 :
4815
0
      fields->f_dsp_16_u24 = value;
4816
0
      break;
4817
0
    case M32C_OPERAND_DSP_16_U24 :
4818
0
      fields->f_dsp_16_u24 = value;
4819
0
      break;
4820
0
    case M32C_OPERAND_DSP_16_U8 :
4821
0
      fields->f_dsp_16_u8 = value;
4822
0
      break;
4823
0
    case M32C_OPERAND_DSP_24_S16 :
4824
0
      fields->f_dsp_24_s16 = value;
4825
0
      break;
4826
0
    case M32C_OPERAND_DSP_24_S8 :
4827
0
      fields->f_dsp_24_s8 = value;
4828
0
      break;
4829
0
    case M32C_OPERAND_DSP_24_U16 :
4830
0
      fields->f_dsp_24_u16 = value;
4831
0
      break;
4832
0
    case M32C_OPERAND_DSP_24_U20 :
4833
0
      fields->f_dsp_24_u24 = value;
4834
0
      break;
4835
0
    case M32C_OPERAND_DSP_24_U24 :
4836
0
      fields->f_dsp_24_u24 = value;
4837
0
      break;
4838
0
    case M32C_OPERAND_DSP_24_U8 :
4839
0
      fields->f_dsp_24_u8 = value;
4840
0
      break;
4841
0
    case M32C_OPERAND_DSP_32_S16 :
4842
0
      fields->f_dsp_32_s16 = value;
4843
0
      break;
4844
0
    case M32C_OPERAND_DSP_32_S8 :
4845
0
      fields->f_dsp_32_s8 = value;
4846
0
      break;
4847
0
    case M32C_OPERAND_DSP_32_U16 :
4848
0
      fields->f_dsp_32_u16 = value;
4849
0
      break;
4850
0
    case M32C_OPERAND_DSP_32_U20 :
4851
0
      fields->f_dsp_32_u24 = value;
4852
0
      break;
4853
0
    case M32C_OPERAND_DSP_32_U24 :
4854
0
      fields->f_dsp_32_u24 = value;
4855
0
      break;
4856
0
    case M32C_OPERAND_DSP_32_U8 :
4857
0
      fields->f_dsp_32_u8 = value;
4858
0
      break;
4859
0
    case M32C_OPERAND_DSP_40_S16 :
4860
0
      fields->f_dsp_40_s16 = value;
4861
0
      break;
4862
0
    case M32C_OPERAND_DSP_40_S8 :
4863
0
      fields->f_dsp_40_s8 = value;
4864
0
      break;
4865
0
    case M32C_OPERAND_DSP_40_U16 :
4866
0
      fields->f_dsp_40_u16 = value;
4867
0
      break;
4868
0
    case M32C_OPERAND_DSP_40_U20 :
4869
0
      fields->f_dsp_40_u20 = value;
4870
0
      break;
4871
0
    case M32C_OPERAND_DSP_40_U24 :
4872
0
      fields->f_dsp_40_u24 = value;
4873
0
      break;
4874
0
    case M32C_OPERAND_DSP_40_U8 :
4875
0
      fields->f_dsp_40_u8 = value;
4876
0
      break;
4877
0
    case M32C_OPERAND_DSP_48_S16 :
4878
0
      fields->f_dsp_48_s16 = value;
4879
0
      break;
4880
0
    case M32C_OPERAND_DSP_48_S8 :
4881
0
      fields->f_dsp_48_s8 = value;
4882
0
      break;
4883
0
    case M32C_OPERAND_DSP_48_U16 :
4884
0
      fields->f_dsp_48_u16 = value;
4885
0
      break;
4886
0
    case M32C_OPERAND_DSP_48_U20 :
4887
0
      fields->f_dsp_48_u20 = value;
4888
0
      break;
4889
0
    case M32C_OPERAND_DSP_48_U24 :
4890
0
      fields->f_dsp_48_u24 = value;
4891
0
      break;
4892
0
    case M32C_OPERAND_DSP_48_U8 :
4893
0
      fields->f_dsp_48_u8 = value;
4894
0
      break;
4895
0
    case M32C_OPERAND_DSP_8_S24 :
4896
0
      fields->f_dsp_8_s24 = value;
4897
0
      break;
4898
0
    case M32C_OPERAND_DSP_8_S8 :
4899
0
      fields->f_dsp_8_s8 = value;
4900
0
      break;
4901
0
    case M32C_OPERAND_DSP_8_U16 :
4902
0
      fields->f_dsp_8_u16 = value;
4903
0
      break;
4904
0
    case M32C_OPERAND_DSP_8_U24 :
4905
0
      fields->f_dsp_8_u24 = value;
4906
0
      break;
4907
0
    case M32C_OPERAND_DSP_8_U6 :
4908
0
      fields->f_dsp_8_u6 = value;
4909
0
      break;
4910
0
    case M32C_OPERAND_DSP_8_U8 :
4911
0
      fields->f_dsp_8_u8 = value;
4912
0
      break;
4913
0
    case M32C_OPERAND_DST16AN :
4914
0
      fields->f_dst16_an = value;
4915
0
      break;
4916
0
    case M32C_OPERAND_DST16AN_S :
4917
0
      fields->f_dst16_an_s = value;
4918
0
      break;
4919
0
    case M32C_OPERAND_DST16ANHI :
4920
0
      fields->f_dst16_an = value;
4921
0
      break;
4922
0
    case M32C_OPERAND_DST16ANQI :
4923
0
      fields->f_dst16_an = value;
4924
0
      break;
4925
0
    case M32C_OPERAND_DST16ANQI_S :
4926
0
      fields->f_dst16_rn_QI_s = value;
4927
0
      break;
4928
0
    case M32C_OPERAND_DST16ANSI :
4929
0
      fields->f_dst16_an = value;
4930
0
      break;
4931
0
    case M32C_OPERAND_DST16RNEXTQI :
4932
0
      fields->f_dst16_rn_ext = value;
4933
0
      break;
4934
0
    case M32C_OPERAND_DST16RNHI :
4935
0
      fields->f_dst16_rn = value;
4936
0
      break;
4937
0
    case M32C_OPERAND_DST16RNQI :
4938
0
      fields->f_dst16_rn = value;
4939
0
      break;
4940
0
    case M32C_OPERAND_DST16RNQI_S :
4941
0
      fields->f_dst16_rn_QI_s = value;
4942
0
      break;
4943
0
    case M32C_OPERAND_DST16RNSI :
4944
0
      fields->f_dst16_rn = value;
4945
0
      break;
4946
0
    case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4947
0
      fields->f_dst32_an_unprefixed = value;
4948
0
      break;
4949
0
    case M32C_OPERAND_DST32ANPREFIXED :
4950
0
      fields->f_dst32_an_prefixed = value;
4951
0
      break;
4952
0
    case M32C_OPERAND_DST32ANPREFIXEDHI :
4953
0
      fields->f_dst32_an_prefixed = value;
4954
0
      break;
4955
0
    case M32C_OPERAND_DST32ANPREFIXEDQI :
4956
0
      fields->f_dst32_an_prefixed = value;
4957
0
      break;
4958
0
    case M32C_OPERAND_DST32ANPREFIXEDSI :
4959
0
      fields->f_dst32_an_prefixed = value;
4960
0
      break;
4961
0
    case M32C_OPERAND_DST32ANUNPREFIXED :
4962
0
      fields->f_dst32_an_unprefixed = value;
4963
0
      break;
4964
0
    case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4965
0
      fields->f_dst32_an_unprefixed = value;
4966
0
      break;
4967
0
    case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4968
0
      fields->f_dst32_an_unprefixed = value;
4969
0
      break;
4970
0
    case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4971
0
      fields->f_dst32_an_unprefixed = value;
4972
0
      break;
4973
0
    case M32C_OPERAND_DST32R0HI_S :
4974
0
      break;
4975
0
    case M32C_OPERAND_DST32R0QI_S :
4976
0
      break;
4977
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4978
0
      fields->f_dst32_rn_ext_unprefixed = value;
4979
0
      break;
4980
0
    case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4981
0
      fields->f_dst32_rn_ext_unprefixed = value;
4982
0
      break;
4983
0
    case M32C_OPERAND_DST32RNPREFIXEDHI :
4984
0
      fields->f_dst32_rn_prefixed_HI = value;
4985
0
      break;
4986
0
    case M32C_OPERAND_DST32RNPREFIXEDQI :
4987
0
      fields->f_dst32_rn_prefixed_QI = value;
4988
0
      break;
4989
0
    case M32C_OPERAND_DST32RNPREFIXEDSI :
4990
0
      fields->f_dst32_rn_prefixed_SI = value;
4991
0
      break;
4992
0
    case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4993
0
      fields->f_dst32_rn_unprefixed_HI = value;
4994
0
      break;
4995
0
    case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4996
0
      fields->f_dst32_rn_unprefixed_QI = value;
4997
0
      break;
4998
0
    case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4999
0
      fields->f_dst32_rn_unprefixed_SI = value;
5000
0
      break;
5001
0
    case M32C_OPERAND_G :
5002
0
      break;
5003
0
    case M32C_OPERAND_IMM_12_S4 :
5004
0
      fields->f_imm_12_s4 = value;
5005
0
      break;
5006
0
    case M32C_OPERAND_IMM_12_S4N :
5007
0
      fields->f_imm_12_s4 = value;
5008
0
      break;
5009
0
    case M32C_OPERAND_IMM_13_U3 :
5010
0
      fields->f_imm_13_u3 = value;
5011
0
      break;
5012
0
    case M32C_OPERAND_IMM_16_HI :
5013
0
      fields->f_dsp_16_s16 = value;
5014
0
      break;
5015
0
    case M32C_OPERAND_IMM_16_QI :
5016
0
      fields->f_dsp_16_s8 = value;
5017
0
      break;
5018
0
    case M32C_OPERAND_IMM_16_SI :
5019
0
      fields->f_dsp_16_s32 = value;
5020
0
      break;
5021
0
    case M32C_OPERAND_IMM_20_S4 :
5022
0
      fields->f_imm_20_s4 = value;
5023
0
      break;
5024
0
    case M32C_OPERAND_IMM_24_HI :
5025
0
      fields->f_dsp_24_s16 = value;
5026
0
      break;
5027
0
    case M32C_OPERAND_IMM_24_QI :
5028
0
      fields->f_dsp_24_s8 = value;
5029
0
      break;
5030
0
    case M32C_OPERAND_IMM_24_SI :
5031
0
      fields->f_dsp_24_s32 = value;
5032
0
      break;
5033
0
    case M32C_OPERAND_IMM_32_HI :
5034
0
      fields->f_dsp_32_s16 = value;
5035
0
      break;
5036
0
    case M32C_OPERAND_IMM_32_QI :
5037
0
      fields->f_dsp_32_s8 = value;
5038
0
      break;
5039
0
    case M32C_OPERAND_IMM_32_SI :
5040
0
      fields->f_dsp_32_s32 = value;
5041
0
      break;
5042
0
    case M32C_OPERAND_IMM_40_HI :
5043
0
      fields->f_dsp_40_s16 = value;
5044
0
      break;
5045
0
    case M32C_OPERAND_IMM_40_QI :
5046
0
      fields->f_dsp_40_s8 = value;
5047
0
      break;
5048
0
    case M32C_OPERAND_IMM_40_SI :
5049
0
      fields->f_dsp_40_s32 = value;
5050
0
      break;
5051
0
    case M32C_OPERAND_IMM_48_HI :
5052
0
      fields->f_dsp_48_s16 = value;
5053
0
      break;
5054
0
    case M32C_OPERAND_IMM_48_QI :
5055
0
      fields->f_dsp_48_s8 = value;
5056
0
      break;
5057
0
    case M32C_OPERAND_IMM_48_SI :
5058
0
      fields->f_dsp_48_s32 = value;
5059
0
      break;
5060
0
    case M32C_OPERAND_IMM_56_HI :
5061
0
      fields->f_dsp_56_s16 = value;
5062
0
      break;
5063
0
    case M32C_OPERAND_IMM_56_QI :
5064
0
      fields->f_dsp_56_s8 = value;
5065
0
      break;
5066
0
    case M32C_OPERAND_IMM_64_HI :
5067
0
      fields->f_dsp_64_s16 = value;
5068
0
      break;
5069
0
    case M32C_OPERAND_IMM_8_HI :
5070
0
      fields->f_dsp_8_s16 = value;
5071
0
      break;
5072
0
    case M32C_OPERAND_IMM_8_QI :
5073
0
      fields->f_dsp_8_s8 = value;
5074
0
      break;
5075
0
    case M32C_OPERAND_IMM_8_S4 :
5076
0
      fields->f_imm_8_s4 = value;
5077
0
      break;
5078
0
    case M32C_OPERAND_IMM_8_S4N :
5079
0
      fields->f_imm_8_s4 = value;
5080
0
      break;
5081
0
    case M32C_OPERAND_IMM_SH_12_S4 :
5082
0
      fields->f_imm_12_s4 = value;
5083
0
      break;
5084
0
    case M32C_OPERAND_IMM_SH_20_S4 :
5085
0
      fields->f_imm_20_s4 = value;
5086
0
      break;
5087
0
    case M32C_OPERAND_IMM_SH_8_S4 :
5088
0
      fields->f_imm_8_s4 = value;
5089
0
      break;
5090
0
    case M32C_OPERAND_IMM1_S :
5091
0
      fields->f_imm1_S = value;
5092
0
      break;
5093
0
    case M32C_OPERAND_IMM3_S :
5094
0
      fields->f_imm3_S = value;
5095
0
      break;
5096
0
    case M32C_OPERAND_LAB_16_8 :
5097
0
      fields->f_lab_16_8 = value;
5098
0
      break;
5099
0
    case M32C_OPERAND_LAB_24_8 :
5100
0
      fields->f_lab_24_8 = value;
5101
0
      break;
5102
0
    case M32C_OPERAND_LAB_32_8 :
5103
0
      fields->f_lab_32_8 = value;
5104
0
      break;
5105
0
    case M32C_OPERAND_LAB_40_8 :
5106
0
      fields->f_lab_40_8 = value;
5107
0
      break;
5108
0
    case M32C_OPERAND_LAB_5_3 :
5109
0
      fields->f_lab_5_3 = value;
5110
0
      break;
5111
0
    case M32C_OPERAND_LAB_8_16 :
5112
0
      fields->f_lab_8_16 = value;
5113
0
      break;
5114
0
    case M32C_OPERAND_LAB_8_24 :
5115
0
      fields->f_lab_8_24 = value;
5116
0
      break;
5117
0
    case M32C_OPERAND_LAB_8_8 :
5118
0
      fields->f_lab_8_8 = value;
5119
0
      break;
5120
0
    case M32C_OPERAND_LAB32_JMP_S :
5121
0
      fields->f_lab32_jmp_s = value;
5122
0
      break;
5123
0
    case M32C_OPERAND_Q :
5124
0
      break;
5125
0
    case M32C_OPERAND_R0 :
5126
0
      break;
5127
0
    case M32C_OPERAND_R0H :
5128
0
      break;
5129
0
    case M32C_OPERAND_R0L :
5130
0
      break;
5131
0
    case M32C_OPERAND_R1 :
5132
0
      break;
5133
0
    case M32C_OPERAND_R1R2R0 :
5134
0
      break;
5135
0
    case M32C_OPERAND_R2 :
5136
0
      break;
5137
0
    case M32C_OPERAND_R2R0 :
5138
0
      break;
5139
0
    case M32C_OPERAND_R3 :
5140
0
      break;
5141
0
    case M32C_OPERAND_R3R1 :
5142
0
      break;
5143
0
    case M32C_OPERAND_REGSETPOP :
5144
0
      fields->f_8_8 = value;
5145
0
      break;
5146
0
    case M32C_OPERAND_REGSETPUSH :
5147
0
      fields->f_8_8 = value;
5148
0
      break;
5149
0
    case M32C_OPERAND_RN16_PUSH_S :
5150
0
      fields->f_4_1 = value;
5151
0
      break;
5152
0
    case M32C_OPERAND_S :
5153
0
      break;
5154
0
    case M32C_OPERAND_SRC16AN :
5155
0
      fields->f_src16_an = value;
5156
0
      break;
5157
0
    case M32C_OPERAND_SRC16ANHI :
5158
0
      fields->f_src16_an = value;
5159
0
      break;
5160
0
    case M32C_OPERAND_SRC16ANQI :
5161
0
      fields->f_src16_an = value;
5162
0
      break;
5163
0
    case M32C_OPERAND_SRC16RNHI :
5164
0
      fields->f_src16_rn = value;
5165
0
      break;
5166
0
    case M32C_OPERAND_SRC16RNQI :
5167
0
      fields->f_src16_rn = value;
5168
0
      break;
5169
0
    case M32C_OPERAND_SRC32ANPREFIXED :
5170
0
      fields->f_src32_an_prefixed = value;
5171
0
      break;
5172
0
    case M32C_OPERAND_SRC32ANPREFIXEDHI :
5173
0
      fields->f_src32_an_prefixed = value;
5174
0
      break;
5175
0
    case M32C_OPERAND_SRC32ANPREFIXEDQI :
5176
0
      fields->f_src32_an_prefixed = value;
5177
0
      break;
5178
0
    case M32C_OPERAND_SRC32ANPREFIXEDSI :
5179
0
      fields->f_src32_an_prefixed = value;
5180
0
      break;
5181
0
    case M32C_OPERAND_SRC32ANUNPREFIXED :
5182
0
      fields->f_src32_an_unprefixed = value;
5183
0
      break;
5184
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5185
0
      fields->f_src32_an_unprefixed = value;
5186
0
      break;
5187
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5188
0
      fields->f_src32_an_unprefixed = value;
5189
0
      break;
5190
0
    case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5191
0
      fields->f_src32_an_unprefixed = value;
5192
0
      break;
5193
0
    case M32C_OPERAND_SRC32RNPREFIXEDHI :
5194
0
      fields->f_src32_rn_prefixed_HI = value;
5195
0
      break;
5196
0
    case M32C_OPERAND_SRC32RNPREFIXEDQI :
5197
0
      fields->f_src32_rn_prefixed_QI = value;
5198
0
      break;
5199
0
    case M32C_OPERAND_SRC32RNPREFIXEDSI :
5200
0
      fields->f_src32_rn_prefixed_SI = value;
5201
0
      break;
5202
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5203
0
      fields->f_src32_rn_unprefixed_HI = value;
5204
0
      break;
5205
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5206
0
      fields->f_src32_rn_unprefixed_QI = value;
5207
0
      break;
5208
0
    case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5209
0
      fields->f_src32_rn_unprefixed_SI = value;
5210
0
      break;
5211
0
    case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5212
0
      fields->f_5_1 = value;
5213
0
      break;
5214
0
    case M32C_OPERAND_X :
5215
0
      break;
5216
0
    case M32C_OPERAND_Z :
5217
0
      break;
5218
0
    case M32C_OPERAND_COND16_16 :
5219
0
      fields->f_dsp_16_u8 = value;
5220
0
      break;
5221
0
    case M32C_OPERAND_COND16_24 :
5222
0
      fields->f_dsp_24_u8 = value;
5223
0
      break;
5224
0
    case M32C_OPERAND_COND16_32 :
5225
0
      fields->f_dsp_32_u8 = value;
5226
0
      break;
5227
0
    case M32C_OPERAND_COND16C :
5228
0
      fields->f_cond16 = value;
5229
0
      break;
5230
0
    case M32C_OPERAND_COND16J :
5231
0
      fields->f_cond16 = value;
5232
0
      break;
5233
0
    case M32C_OPERAND_COND16J5 :
5234
0
      fields->f_cond16j_5 = value;
5235
0
      break;
5236
0
    case M32C_OPERAND_COND32 :
5237
0
      fields->f_cond32 = value;
5238
0
      break;
5239
0
    case M32C_OPERAND_COND32_16 :
5240
0
      fields->f_dsp_16_u8 = value;
5241
0
      break;
5242
0
    case M32C_OPERAND_COND32_24 :
5243
0
      fields->f_dsp_24_u8 = value;
5244
0
      break;
5245
0
    case M32C_OPERAND_COND32_32 :
5246
0
      fields->f_dsp_32_u8 = value;
5247
0
      break;
5248
0
    case M32C_OPERAND_COND32_40 :
5249
0
      fields->f_dsp_40_u8 = value;
5250
0
      break;
5251
0
    case M32C_OPERAND_COND32J :
5252
0
      fields->f_cond32j = value;
5253
0
      break;
5254
0
    case M32C_OPERAND_CR1_PREFIXED_32 :
5255
0
      fields->f_21_3 = value;
5256
0
      break;
5257
0
    case M32C_OPERAND_CR1_UNPREFIXED_32 :
5258
0
      fields->f_13_3 = value;
5259
0
      break;
5260
0
    case M32C_OPERAND_CR16 :
5261
0
      fields->f_9_3 = value;
5262
0
      break;
5263
0
    case M32C_OPERAND_CR2_32 :
5264
0
      fields->f_13_3 = value;
5265
0
      break;
5266
0
    case M32C_OPERAND_CR3_PREFIXED_32 :
5267
0
      fields->f_21_3 = value;
5268
0
      break;
5269
0
    case M32C_OPERAND_CR3_UNPREFIXED_32 :
5270
0
      fields->f_13_3 = value;
5271
0
      break;
5272
0
    case M32C_OPERAND_FLAGS16 :
5273
0
      fields->f_9_3 = value;
5274
0
      break;
5275
0
    case M32C_OPERAND_FLAGS32 :
5276
0
      fields->f_13_3 = value;
5277
0
      break;
5278
0
    case M32C_OPERAND_SCCOND32 :
5279
0
      fields->f_cond16 = value;
5280
0
      break;
5281
0
    case M32C_OPERAND_SIZE :
5282
0
      break;
5283
5284
0
    default :
5285
      /* xgettext:c-format */
5286
0
      opcodes_error_handler
5287
0
  (_("internal error: unrecognized field %d while setting vma operand"),
5288
0
   opindex);
5289
0
      abort ();
5290
0
  }
5291
0
}
5292
5293
/* Function to call before using the instruction builder tables.  */
5294
5295
void
5296
m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5297
4
{
5298
4
  cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5299
4
  cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5300
5301
4
  cd->insert_operand = m32c_cgen_insert_operand;
5302
4
  cd->extract_operand = m32c_cgen_extract_operand;
5303
5304
4
  cd->get_int_operand = m32c_cgen_get_int_operand;
5305
4
  cd->set_int_operand = m32c_cgen_set_int_operand;
5306
4
  cd->get_vma_operand = m32c_cgen_get_vma_operand;
5307
4
  cd->set_vma_operand = m32c_cgen_set_vma_operand;
5308
4
}