Coverage Report

Created: 2026-10-02 09:53

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/binutils-gdb/opcodes/microblaze-dis.c
Line
Count
Source
1
/* Disassemble Xilinx microblaze instructions.
2
3
   Copyright (C) 2009-2026 Free Software Foundation, Inc.
4
5
   This file is part of the GNU opcodes library.
6
7
   This library is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3, or (at your option)
10
   any later version.
11
12
   It is distributed in the hope that it will be useful, but WITHOUT
13
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15
   License for more details.
16
17
   You should have received a copy of the GNU General Public License
18
   along with this file; see the file COPYING.  If not, write to the
19
   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20
   MA 02110-1301, USA.  */
21
22
23
#include "sysdep.h"
24
#define STATIC_TABLE
25
#define DEFINE_TABLE
26
27
#include "disassemble.h"
28
#include <strings.h>
29
#include "microblaze-opc.h"
30
#include "microblaze-dis.h"
31
32
43.6k
#define get_field_rd(buf, instr)   get_field (buf, instr, RD_MASK, RD_LOW)
33
39.3k
#define get_field_r1(buf, instr)   get_field (buf, instr, RA_MASK, RA_LOW)
34
9.22k
#define get_field_r2(buf, instr)   get_field (buf, instr, RB_MASK, RB_LOW)
35
8.21k
#define get_int_field_imm(instr)   ((instr & IMM_MASK) >> IMM_LOW)
36
25.7k
#define get_int_field_r1(instr)    ((instr & RA_MASK) >> RA_LOW)
37
38
136k
#define NUM_STRBUFS 4
39
#define STRBUF_SIZE 25
40
41
struct string_buf
42
{
43
  unsigned int which;
44
  char str[NUM_STRBUFS][STRBUF_SIZE];
45
};
46
47
static inline char *
48
strbuf (struct string_buf *buf)
49
136k
{
50
136k
#ifdef ENABLE_CHECKING
51
136k
  if (buf->which >= NUM_STRBUFS)
52
0
    abort ();
53
136k
#endif
54
136k
  return buf->str[buf->which++];
55
136k
}
56
57
static char *
58
get_field (struct string_buf *buf, long instr, long mask, unsigned short low)
59
92.2k
{
60
92.2k
  char *p = strbuf (buf);
61
62
92.2k
  sprintf (p, "%s%d", register_prefix, (int)((instr & mask) >> low));
63
92.2k
  return p;
64
92.2k
}
65
66
static char *
67
get_field_imm (struct string_buf *buf, long instr)
68
30.9k
{
69
30.9k
  char *p = strbuf (buf);
70
71
30.9k
  sprintf (p, "%d", (short)((instr & IMM_MASK) >> IMM_LOW));
72
30.9k
  return p;
73
30.9k
}
74
75
static char *
76
get_field_imm5 (struct string_buf *buf, long instr)
77
301
{
78
301
  char *p = strbuf (buf);
79
80
301
  sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
81
301
  return p;
82
301
}
83
84
static char *
85
get_field_imm5_mbar (struct string_buf *buf, long instr)
86
239
{
87
239
  char *p = strbuf (buf);
88
89
239
  sprintf (p, "%d", (short)((instr & IMM5_MBAR_MASK) >> IMM_MBAR));
90
239
  return p;
91
239
}
92
93
static char *
94
get_field_immw (struct string_buf *buf, long instr)
95
179
{
96
179
  char *p = strbuf (buf);
97
98
179
  if (instr & 0x00004000)
99
70
    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK)
100
70
        >> IMM_WIDTH_LOW))); /* bsefi */
101
109
  else
102
109
    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >>
103
109
        IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >>
104
109
        IMM_LOW) + 1)); /* bsifi */
105
179
  return p;
106
179
}
107
108
static char *
109
get_field_rfsl (struct string_buf *buf, long instr)
110
10.0k
{
111
10.0k
  char *p = strbuf (buf);
112
113
10.0k
  sprintf (p, "%s%d", fsl_register_prefix,
114
10.0k
     (short)((instr & RFSL_MASK) >> IMM_LOW));
115
10.0k
  return p;
116
10.0k
}
117
118
static char *
119
get_field_imm15 (struct string_buf *buf, long instr)
120
16
{
121
16
  char *p = strbuf (buf);
122
123
16
  sprintf (p, "%d", (short)((instr & IMM15_MASK) >> IMM_LOW));
124
16
  return p;
125
16
}
126
127
static char *
128
get_field_special (struct string_buf *buf, long instr,
129
       const struct op_code_struct *op)
130
2.66k
{
131
2.66k
  char *p = strbuf (buf);
132
2.66k
  char *spr;
133
134
2.66k
  switch ((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask))
135
2.66k
    {
136
41
    case MICROBLAZE_REG_MSR_MASK:
137
41
      spr = "msr";
138
41
      break;
139
134
    case MICROBLAZE_REG_PC_MASK:
140
134
      spr = "pc";
141
134
      break;
142
18
    case MICROBLAZE_REG_EAR_MASK:
143
18
      spr = "ear";
144
18
      break;
145
585
    case MICROBLAZE_REG_ESR_MASK:
146
585
      spr = "esr";
147
585
      break;
148
36
    case MICROBLAZE_REG_FSR_MASK:
149
36
      spr = "fsr";
150
36
      break;
151
172
    case MICROBLAZE_REG_BTR_MASK:
152
172
      spr = "btr";
153
172
      break;
154
182
    case MICROBLAZE_REG_EDR_MASK:
155
182
      spr = "edr";
156
182
      break;
157
34
    case MICROBLAZE_REG_PID_MASK:
158
34
      spr = "pid";
159
34
      break;
160
79
    case MICROBLAZE_REG_ZPR_MASK:
161
79
      spr = "zpr";
162
79
      break;
163
74
    case MICROBLAZE_REG_TLBX_MASK:
164
74
      spr = "tlbx";
165
74
      break;
166
216
    case MICROBLAZE_REG_TLBLO_MASK:
167
216
      spr = "tlblo";
168
216
      break;
169
93
    case MICROBLAZE_REG_TLBHI_MASK:
170
93
      spr = "tlbhi";
171
93
      break;
172
13
    case MICROBLAZE_REG_TLBSX_MASK:
173
13
      spr = "tlbsx";
174
13
      break;
175
3
    case MICROBLAZE_REG_SHR_MASK:
176
3
      spr = "shr";
177
3
      break;
178
169
    case MICROBLAZE_REG_SLR_MASK:
179
169
      spr = "slr";
180
169
      break;
181
814
    default:
182
814
      if (((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask) & 0xE000)
183
814
    == MICROBLAZE_REG_PVR_MASK)
184
526
  {
185
526
    sprintf (p, "%spvr%d", register_prefix,
186
526
       ((unsigned short)(((instr & IMM_MASK) >> IMM_LOW)
187
526
             ^ op->immval_mask)
188
526
        ^ MICROBLAZE_REG_PVR_MASK));
189
526
    return p;
190
526
  }
191
288
      else
192
288
  spr = "pc";
193
288
      break;
194
2.66k
    }
195
196
2.13k
   sprintf (p, "%s%s", register_prefix, spr);
197
2.13k
   return p;
198
2.66k
}
199
200
static unsigned long
201
read_insn_microblaze (bfd_vma memaddr,
202
          struct disassemble_info *info,
203
          const struct op_code_struct **opr)
204
132k
{
205
132k
  unsigned char       ibytes[4];
206
132k
  int                 status;
207
132k
  const struct op_code_struct *op;
208
132k
  unsigned long inst;
209
210
132k
  status = info->read_memory_func (memaddr, ibytes, 4, info);
211
212
132k
  if (status != 0)
213
122
    {
214
122
      info->memory_error_func (status, memaddr, info);
215
122
      return 0;
216
122
    }
217
218
132k
  if (info->endian == BFD_ENDIAN_BIG)
219
14.3k
    inst = (((unsigned) ibytes[0] << 24) | (ibytes[1] << 16)
220
14.3k
      | (ibytes[2] << 8) | ibytes[3]);
221
117k
  else if (info->endian == BFD_ENDIAN_LITTLE)
222
117k
    inst = (((unsigned) ibytes[3] << 24) | (ibytes[2] << 16)
223
117k
      | (ibytes[1] << 8) | ibytes[0]);
224
0
  else
225
0
    abort ();
226
227
  /* Just a linear search of the table.  */
228
27.7M
  for (op = microblaze_opcodes; op->name != 0; op ++)
229
27.6M
    if (op->bit_sequence == (inst & op->opcode_mask))
230
58.4k
      break;
231
232
132k
  *opr = op;
233
132k
  return inst;
234
132k
}
235
236
237
int
238
print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
239
125k
{
240
125k
  fprintf_ftype print_func = info->fprintf_func;
241
125k
  void *stream = info->stream;
242
125k
  unsigned long inst, prev_inst;
243
125k
  const struct op_code_struct *op, *pop;
244
125k
  int immval = 0;
245
125k
  bool immfound = false;
246
125k
  static bfd_vma prev_insn_addr = -1; /* Init the prev insn addr.  */
247
125k
  static int prev_insn_vma = -1;  /* Init the prev insn vma.  */
248
125k
  int curr_insn_vma = info->buffer_vma;
249
125k
  struct string_buf buf;
250
251
125k
  buf.which = 0;
252
125k
  info->bytes_per_chunk = 4;
253
254
125k
  inst = read_insn_microblaze (memaddr, info, &op);
255
125k
  if (inst == 0)
256
288
    return -1;
257
258
125k
  if (prev_insn_vma == curr_insn_vma)
259
7.27k
    {
260
7.27k
      if (memaddr-(info->bytes_per_chunk) == prev_insn_addr)
261
6.95k
  {
262
6.95k
    prev_inst = read_insn_microblaze (prev_insn_addr, info, &pop);
263
6.95k
    if (prev_inst == 0)
264
1
      return -1;
265
6.95k
    if (pop->instr == imm)
266
1
      {
267
1
        immval = (get_int_field_imm (prev_inst) << 16) & 0xffff0000;
268
1
        immfound = true;
269
1
      }
270
6.95k
    else
271
6.95k
      {
272
6.95k
        immval = 0;
273
6.95k
        immfound = false;
274
6.95k
      }
275
6.95k
  }
276
7.27k
    }
277
278
  /* Make curr insn as prev insn.  */
279
125k
  prev_insn_addr = memaddr;
280
125k
  prev_insn_vma = curr_insn_vma;
281
282
125k
  if (op->name == NULL)
283
69.6k
    print_func (stream, ".long 0x%04x", (unsigned int) inst);
284
55.5k
  else
285
55.5k
    {
286
55.5k
      print_func (stream, "%s", op->name);
287
288
55.5k
      switch (op->inst_type)
289
55.5k
  {
290
3.91k
  case INST_TYPE_RD_R1_R2:
291
3.91k
    print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
292
3.91k
          get_field_r1 (&buf, inst), get_field_r2 (&buf, inst));
293
3.91k
    break;
294
25.7k
  case INST_TYPE_RD_R1_IMM:
295
25.7k
    print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
296
25.7k
          get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
297
25.7k
    if (info->print_address_func && get_int_field_r1 (inst) == 0
298
4.24k
        && info->symbol_at_address_func)
299
4.24k
      {
300
4.24k
        if (immfound)
301
1
    immval |= (get_int_field_imm (inst) & 0x0000ffff);
302
4.24k
        else
303
4.24k
    {
304
4.24k
      immval = get_int_field_imm (inst);
305
4.24k
      if (immval & 0x8000)
306
1.80k
        immval |= (~0xFFFF);
307
4.24k
    }
308
4.24k
        if (immval > 0 && info->symbol_at_address_func (immval, info))
309
0
    {
310
0
      print_func (stream, "\t// ");
311
0
      info->print_address_func (immval, info);
312
0
    }
313
4.24k
      }
314
25.7k
    break;
315
122
  case INST_TYPE_RD_R1_IMM5:
316
122
    print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
317
122
          get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
318
122
    break;
319
8.22k
  case INST_TYPE_RD_RFSL:
320
8.22k
    print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
321
8.22k
          get_field_rfsl (&buf, inst));
322
8.22k
    break;
323
960
  case INST_TYPE_R1_RFSL:
324
960
    print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst),
325
960
          get_field_rfsl (&buf, inst));
326
960
    break;
327
2.65k
  case INST_TYPE_RD_SPECIAL:
328
2.65k
    print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
329
2.65k
          get_field_special (&buf, inst, op));
330
2.65k
    break;
331
10
  case INST_TYPE_SPECIAL_R1:
332
10
    print_func (stream, "\t%s, %s", get_field_special (&buf, inst, op),
333
10
          get_field_r1 (&buf, inst));
334
10
    break;
335
1.73k
  case INST_TYPE_RD_R1:
336
1.73k
    print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
337
1.73k
          get_field_r1 (&buf, inst));
338
1.73k
    break;
339
3.52k
  case INST_TYPE_R1_R2:
340
3.52k
    print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst),
341
3.52k
          get_field_r2 (&buf, inst));
342
3.52k
    break;
343
2.81k
  case INST_TYPE_R1_IMM:
344
2.81k
    print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst),
345
2.81k
          get_field_imm (&buf, inst));
346
    /* The non-pc relative instructions are returns, which shouldn't
347
       have a label printed.  */
348
2.81k
    if (info->print_address_func && op->inst_offset_type == INST_PC_OFFSET
349
2.52k
        && info->symbol_at_address_func)
350
2.52k
      {
351
2.52k
        if (immfound)
352
0
    immval |= (get_int_field_imm (inst) & 0x0000ffff);
353
2.52k
        else
354
2.52k
    {
355
2.52k
      immval = get_int_field_imm (inst);
356
2.52k
      if (immval & 0x8000)
357
1.73k
        immval |= (~0xFFFF);
358
2.52k
    }
359
2.52k
        immval += memaddr;
360
2.52k
        if (immval > 0 && info->symbol_at_address_func (immval, info))
361
0
    {
362
0
      print_func (stream, "\t// ");
363
0
      info->print_address_func (immval, info);
364
0
    }
365
2.52k
        else
366
2.52k
    {
367
2.52k
      print_func (stream, "\t\t// ");
368
2.52k
      print_func (stream, "%x", immval);
369
2.52k
    }
370
2.52k
      }
371
2.81k
    break;
372
237
  case INST_TYPE_RD_IMM:
373
237
    print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
374
237
          get_field_imm (&buf, inst));
375
237
    if (info->print_address_func && info->symbol_at_address_func)
376
237
      {
377
237
        if (immfound)
378
0
    immval |= (get_int_field_imm (inst) & 0x0000ffff);
379
237
        else
380
237
    {
381
237
      immval = get_int_field_imm (inst);
382
237
      if (immval & 0x8000)
383
77
        immval |= (~0xFFFF);
384
237
    }
385
237
        if (op->inst_offset_type == INST_PC_OFFSET)
386
161
    immval += (int) memaddr;
387
237
        if (info->symbol_at_address_func (immval, info))
388
0
    {
389
0
      print_func (stream, "\t// ");
390
0
      info->print_address_func (immval, info);
391
0
    }
392
237
      }
393
237
    break;
394
2.17k
  case INST_TYPE_IMM:
395
2.17k
    print_func (stream, "\t%s", get_field_imm (&buf, inst));
396
2.17k
    if (info->print_address_func && info->symbol_at_address_func
397
2.17k
        && op->instr != imm)
398
1.21k
      {
399
1.21k
        if (immfound)
400
0
    immval |= (get_int_field_imm (inst) & 0x0000ffff);
401
1.21k
        else
402
1.21k
    {
403
1.21k
      immval = get_int_field_imm (inst);
404
1.21k
      if (immval & 0x8000)
405
307
        immval |= (~0xFFFF);
406
1.21k
    }
407
1.21k
        if (op->inst_offset_type == INST_PC_OFFSET)
408
666
    immval += (int) memaddr;
409
1.21k
        if (immval > 0 && info->symbol_at_address_func (immval, info))
410
0
    {
411
0
      print_func (stream, "\t// ");
412
0
      info->print_address_func (immval, info);
413
0
    }
414
1.21k
        else if (op->inst_offset_type == INST_PC_OFFSET)
415
666
    {
416
666
      print_func (stream, "\t\t// ");
417
666
      print_func (stream, "%x", immval);
418
666
    }
419
1.21k
      }
420
2.17k
    break;
421
865
  case INST_TYPE_RD_R2:
422
865
    print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
423
865
          get_field_r2 (&buf, inst));
424
865
    break;
425
578
  case INST_TYPE_R2:
426
578
    print_func (stream, "\t%s", get_field_r2 (&buf, inst));
427
578
    break;
428
0
  case INST_TYPE_R1:
429
0
    print_func (stream, "\t%s", get_field_r1 (&buf, inst));
430
0
    break;
431
337
  case INST_TYPE_R1_R2_SPECIAL:
432
337
    print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst),
433
337
          get_field_r2 (&buf, inst));
434
337
    break;
435
16
  case INST_TYPE_RD_IMM15:
436
16
    print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
437
16
          get_field_imm15 (&buf, inst));
438
16
    break;
439
    /* For mbar insn.  */
440
239
  case INST_TYPE_IMM5:
441
239
    print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst));
442
239
    break;
443
    /* For mbar 16 or sleep insn.  */
444
340
  case INST_TYPE_NONE:
445
340
    break;
446
    /* For bit field insns.  */
447
179
  case INST_TYPE_RD_R1_IMMW_IMMS:
448
179
    print_func (stream, "\t%s, %s, %s, %s",
449
179
          get_field_rd (&buf, inst),
450
179
          get_field_r1 (&buf, inst),
451
179
          get_field_immw (&buf, inst),
452
179
          get_field_imm5 (&buf, inst));
453
179
    break;
454
    /* For tuqula instruction */
455
0
  case INST_TYPE_RD:
456
0
    print_func (stream, "\t%s", get_field_rd (&buf, inst));
457
0
    break;
458
860
  case INST_TYPE_RFSL:
459
860
    print_func (stream, "\t%s", get_field_rfsl (&buf, inst));
460
860
    break;
461
0
  default:
462
    /* If the disassembler lags the instruction set.  */
463
0
    print_func (stream, "\tundecoded operands, inst is 0x%04x",
464
0
          (unsigned int) inst);
465
0
    break;
466
55.5k
  }
467
55.5k
    }
468
469
  /* Say how many bytes we consumed.  */
470
125k
  return 4;
471
125k
}
472
473
enum microblaze_instr
474
get_insn_microblaze (long inst,
475
           bool *isunsignedimm,
476
           enum microblaze_instr_type *insn_type,
477
           short *delay_slots)
478
0
{
479
0
  const struct op_code_struct *op;
480
0
  *isunsignedimm = false;
481
482
  /* Just a linear search of the table.  */
483
0
  for (op = microblaze_opcodes; op->name != 0; op ++)
484
0
    if (op->bit_sequence == (inst & op->opcode_mask))
485
0
      break;
486
487
0
  if (op->name == 0)
488
0
    return invalid_inst;
489
0
  else
490
0
    {
491
0
      *isunsignedimm = (op->inst_type == INST_TYPE_RD_R1_UNSIGNED_IMM);
492
0
      *insn_type = op->instr_type;
493
0
      *delay_slots = op->delay_slots;
494
0
      return op->instr;
495
0
    }
496
0
}
497
498
enum microblaze_instr
499
microblaze_decode_insn (long insn, int *rd, int *ra, int *rb, int *immed)
500
0
{
501
0
  enum microblaze_instr op;
502
0
  bool t1;
503
0
  enum microblaze_instr_type t2;
504
0
  short t3;
505
506
0
  op = get_insn_microblaze (insn, &t1, &t2, &t3);
507
0
  *rd = (insn & RD_MASK) >> RD_LOW;
508
0
  *ra = (insn & RA_MASK) >> RA_LOW;
509
0
  *rb = (insn & RB_MASK) >> RB_LOW;
510
0
  t3 = (insn & IMM_MASK) >> IMM_LOW;
511
0
  *immed = (int) t3;
512
0
  return (op);
513
0
}
514
515
unsigned long
516
microblaze_get_target_address (long inst, bool immfound, int immval,
517
             long pcval, long r1val, long r2val,
518
             bool *targetvalid,
519
             bool *unconditionalbranch)
520
0
{
521
0
  const struct op_code_struct *op;
522
0
  long targetaddr = 0;
523
524
0
  *unconditionalbranch = false;
525
  /* Just a linear search of the table.  */
526
0
  for (op = microblaze_opcodes; op->name != 0; op ++)
527
0
    if (op->bit_sequence == (inst & op->opcode_mask))
528
0
      break;
529
530
0
  if (op->name == 0)
531
0
    {
532
0
      *targetvalid = false;
533
0
    }
534
0
  else if (op->instr_type == branch_inst)
535
0
    {
536
0
      switch (op->inst_type)
537
0
  {
538
0
        case INST_TYPE_R2:
539
0
          *unconditionalbranch = true;
540
        /* Fall through.  */
541
0
        case INST_TYPE_RD_R2:
542
0
        case INST_TYPE_R1_R2:
543
0
          targetaddr = r2val;
544
0
          *targetvalid = true;
545
0
          if (op->inst_offset_type == INST_PC_OFFSET)
546
0
      targetaddr += pcval;
547
0
          break;
548
0
        case INST_TYPE_IMM:
549
0
          *unconditionalbranch = true;
550
        /* Fall through.  */
551
0
        case INST_TYPE_RD_IMM:
552
0
        case INST_TYPE_R1_IMM:
553
0
          if (immfound)
554
0
      {
555
0
        targetaddr = (immval << 16) & (~0xffff);
556
0
        targetaddr |= (get_int_field_imm (inst) & 0x0000ffff);
557
0
      }
558
0
    else
559
0
      {
560
0
        targetaddr = get_int_field_imm (inst);
561
0
        if (targetaddr & 0x8000)
562
0
    targetaddr |= (~0xFFFF);
563
0
            }
564
0
          if (op->inst_offset_type == INST_PC_OFFSET)
565
0
      targetaddr += pcval;
566
0
          *targetvalid = true;
567
0
          break;
568
0
  default:
569
0
    *targetvalid = false;
570
0
    break;
571
0
        }
572
0
    }
573
0
  else if (op->instr_type == return_inst)
574
0
    {
575
0
      if (immfound)
576
0
  {
577
0
    targetaddr = (immval << 16) & (~0xffff);
578
0
    targetaddr |= (get_int_field_imm (inst) & 0x0000ffff);
579
0
  }
580
0
      else
581
0
  {
582
0
    targetaddr = get_int_field_imm (inst);
583
0
    if (targetaddr & 0x8000)
584
0
      targetaddr |= (~0xFFFF);
585
0
  }
586
0
      targetaddr += r1val;
587
0
      *targetvalid = true;
588
0
    }
589
0
  else
590
0
    *targetvalid = false;
591
0
  return targetaddr;
592
0
}