/src/bloaty/third_party/capstone/arch/PowerPC/PPCGenAsmWriter.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |*Assembly Writer Source Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | /* Capstone Disassembly Engine */ |
10 | | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */ |
11 | | |
12 | | #include <stdio.h> // debug |
13 | | #include <capstone/platform.h> |
14 | | |
15 | | /// printInstruction - This method is automatically generated by tablegen |
16 | | /// from the instruction set description. |
17 | | static void printInstruction(MCInst *MI, SStream *O, const MCRegisterInfo *MRI) |
18 | 0 | { |
19 | 0 | static const uint32_t OpInfo[] = { |
20 | 0 | 0U, // PHI |
21 | 0 | 0U, // INLINEASM |
22 | 0 | 0U, // CFI_INSTRUCTION |
23 | 0 | 0U, // EH_LABEL |
24 | 0 | 0U, // GC_LABEL |
25 | 0 | 0U, // KILL |
26 | 0 | 0U, // EXTRACT_SUBREG |
27 | 0 | 0U, // INSERT_SUBREG |
28 | 0 | 0U, // IMPLICIT_DEF |
29 | 0 | 0U, // SUBREG_TO_REG |
30 | 0 | 0U, // COPY_TO_REGCLASS |
31 | 0 | 10419U, // DBG_VALUE |
32 | 0 | 0U, // REG_SEQUENCE |
33 | 0 | 0U, // COPY |
34 | 0 | 10412U, // BUNDLE |
35 | 0 | 10746U, // LIFETIME_START |
36 | 0 | 10399U, // LIFETIME_END |
37 | 0 | 0U, // STACKMAP |
38 | 0 | 0U, // PATCHPOINT |
39 | 0 | 0U, // LOAD_STACK_GUARD |
40 | 0 | 0U, // STATEPOINT |
41 | 0 | 0U, // FRAME_ALLOC |
42 | 0 | 19093U, // ADD4 |
43 | 0 | 19093U, // ADD4TLS |
44 | 0 | 16801U, // ADD4o |
45 | 0 | 19093U, // ADD8 |
46 | 0 | 19093U, // ADD8TLS |
47 | 0 | 19093U, // ADD8TLS_ |
48 | 0 | 16801U, // ADD8o |
49 | 0 | 18937U, // ADDC |
50 | 0 | 18937U, // ADDC8 |
51 | 0 | 16741U, // ADDC8o |
52 | 0 | 16741U, // ADDCo |
53 | 0 | 19414U, // ADDE |
54 | 0 | 19414U, // ADDE8 |
55 | 0 | 16924U, // ADDE8o |
56 | 0 | 16924U, // ADDEo |
57 | 0 | 19978U, // ADDI |
58 | 0 | 19978U, // ADDI8 |
59 | 0 | 18982U, // ADDIC |
60 | 0 | 18982U, // ADDIC8 |
61 | 0 | 16771U, // ADDICo |
62 | 0 | 22885U, // ADDIS |
63 | 0 | 22885U, // ADDIS8 |
64 | 0 | 10190U, // ADDISdtprelHA |
65 | 0 | 9129U, // ADDISdtprelHA32 |
66 | 0 | 10173U, // ADDISgotTprelHA |
67 | 0 | 10145U, // ADDIStlsgdHA |
68 | 0 | 10159U, // ADDIStlsldHA |
69 | 0 | 10133U, // ADDIStocHA |
70 | 0 | 10524U, // ADDIdtprelL |
71 | 0 | 9332U, // ADDIdtprelL32 |
72 | 0 | 10487U, // ADDItlsgdL |
73 | 0 | 9289U, // ADDItlsgdL32 |
74 | 0 | 10570U, // ADDItlsgdLADDR |
75 | 0 | 9384U, // ADDItlsgdLADDR32 |
76 | 0 | 10499U, // ADDItlsldL |
77 | 0 | 9303U, // ADDItlsldL32 |
78 | 0 | 10586U, // ADDItlsldLADDR |
79 | 0 | 9402U, // ADDItlsldLADDR32 |
80 | 0 | 10477U, // ADDItocL |
81 | 0 | 268454930U, // ADDME |
82 | 0 | 268454930U, // ADDME8 |
83 | 0 | 268452395U, // ADDME8o |
84 | 0 | 268452395U, // ADDMEo |
85 | 0 | 268454994U, // ADDZE |
86 | 0 | 268454994U, // ADDZE8 |
87 | 0 | 268452428U, // ADDZE8o |
88 | 0 | 268452428U, // ADDZEo |
89 | 0 | 296482U, // ADJCALLSTACKDOWN |
90 | 0 | 8947253U, // ADJCALLSTACKUP |
91 | 0 | 19252U, // AND |
92 | 0 | 19252U, // AND8 |
93 | 0 | 16863U, // AND8o |
94 | 0 | 18946U, // ANDC |
95 | 0 | 18946U, // ANDC8 |
96 | 0 | 16748U, // ANDC8o |
97 | 0 | 16748U, // ANDCo |
98 | 0 | 17561U, // ANDISo |
99 | 0 | 17561U, // ANDISo8 |
100 | 0 | 17080U, // ANDIo |
101 | 0 | 17080U, // ANDIo8 |
102 | 0 | 10681U, // ANDIo_1_EQ_BIT |
103 | 0 | 10083U, // ANDIo_1_EQ_BIT8 |
104 | 0 | 10697U, // ANDIo_1_GT_BIT |
105 | 0 | 10100U, // ANDIo_1_GT_BIT8 |
106 | 0 | 16863U, // ANDo |
107 | 0 | 554190291U, // ATOMIC_CMP_SWAP_I16 |
108 | 0 | 554190269U, // ATOMIC_CMP_SWAP_I32 |
109 | 0 | 9529U, // ATOMIC_CMP_SWAP_I64 |
110 | 0 | 10001U, // ATOMIC_CMP_SWAP_I8 |
111 | 0 | 9748U, // ATOMIC_LOAD_ADD_I16 |
112 | 0 | 9167U, // ATOMIC_LOAD_ADD_I32 |
113 | 0 | 9469U, // ATOMIC_LOAD_ADD_I64 |
114 | 0 | 9940U, // ATOMIC_LOAD_ADD_I8 |
115 | 0 | 9791U, // ATOMIC_LOAD_AND_I16 |
116 | 0 | 9210U, // ATOMIC_LOAD_AND_I32 |
117 | 0 | 9628U, // ATOMIC_LOAD_AND_I64 |
118 | 0 | 9981U, // ATOMIC_LOAD_AND_I8 |
119 | 0 | 9769U, // ATOMIC_LOAD_NAND_I16 |
120 | 0 | 9188U, // ATOMIC_LOAD_NAND_I32 |
121 | 0 | 9490U, // ATOMIC_LOAD_NAND_I64 |
122 | 0 | 9960U, // ATOMIC_LOAD_NAND_I8 |
123 | 0 | 9850U, // ATOMIC_LOAD_OR_I16 |
124 | 0 | 9269U, // ATOMIC_LOAD_OR_I32 |
125 | 0 | 9571U, // ATOMIC_LOAD_OR_I64 |
126 | 0 | 10040U, // ATOMIC_LOAD_OR_I8 |
127 | 0 | 9727U, // ATOMIC_LOAD_SUB_I16 |
128 | 0 | 9146U, // ATOMIC_LOAD_SUB_I32 |
129 | 0 | 9448U, // ATOMIC_LOAD_SUB_I64 |
130 | 0 | 9906U, // ATOMIC_LOAD_SUB_I8 |
131 | 0 | 9829U, // ATOMIC_LOAD_XOR_I16 |
132 | 0 | 9248U, // ATOMIC_LOAD_XOR_I32 |
133 | 0 | 9550U, // ATOMIC_LOAD_XOR_I64 |
134 | 0 | 10021U, // ATOMIC_LOAD_XOR_I8 |
135 | 0 | 9812U, // ATOMIC_SWAP_I16 |
136 | 0 | 9231U, // ATOMIC_SWAP_I32 |
137 | 0 | 9512U, // ATOMIC_SWAP_I64 |
138 | 0 | 10117U, // ATOMIC_SWAP_I8 |
139 | 0 | 10880U, // ATTN |
140 | 0 | 313588U, // B |
141 | 0 | 329423U, // BA |
142 | 0 | 25182312U, // BC |
143 | 0 | 879125U, // BCC |
144 | 0 | 1141269U, // BCCA |
145 | 0 | 1403413U, // BCCCTR |
146 | 0 | 1403413U, // BCCCTR8 |
147 | 0 | 1665557U, // BCCCTRL |
148 | 0 | 1665557U, // BCCCTRL8 |
149 | 0 | 1927701U, // BCCL |
150 | 0 | 2189845U, // BCCLA |
151 | 0 | 2451989U, // BCCLR |
152 | 0 | 2714133U, // BCCLRL |
153 | 0 | 2900122U, // BCCTR |
154 | 0 | 2900122U, // BCCTR8 |
155 | 0 | 2900178U, // BCCTR8n |
156 | 0 | 2900100U, // BCCTRL |
157 | 0 | 2900100U, // BCCTRL8 |
158 | 0 | 2900158U, // BCCTRL8n |
159 | 0 | 2900158U, // BCCTRLn |
160 | 0 | 2900178U, // BCCTRn |
161 | 0 | 25182320U, // BCL |
162 | 0 | 2900112U, // BCLR |
163 | 0 | 2900089U, // BCLRL |
164 | 0 | 2900148U, // BCLRLn |
165 | 0 | 2900169U, // BCLRn |
166 | 0 | 311373U, // BCLalways |
167 | 0 | 25182380U, // BCLn |
168 | 0 | 10917U, // BCTR |
169 | 0 | 10917U, // BCTR8 |
170 | 0 | 10874U, // BCTRL |
171 | 0 | 10874U, // BCTRL8 |
172 | 0 | 98394U, // BCTRL8_LDinto_toc |
173 | 0 | 25182373U, // BCn |
174 | 0 | 320294U, // BDNZ |
175 | 0 | 320294U, // BDNZ8 |
176 | 0 | 329961U, // BDNZA |
177 | 0 | 327936U, // BDNZAm |
178 | 0 | 327721U, // BDNZAp |
179 | 0 | 315560U, // BDNZL |
180 | 0 | 329734U, // BDNZLA |
181 | 0 | 327920U, // BDNZLAm |
182 | 0 | 327705U, // BDNZLAp |
183 | 0 | 10910U, // BDNZLR |
184 | 0 | 10910U, // BDNZLR8 |
185 | 0 | 10866U, // BDNZLRL |
186 | 0 | 9081U, // BDNZLRLm |
187 | 0 | 9049U, // BDNZLRLp |
188 | 0 | 9097U, // BDNZLRm |
189 | 0 | 9065U, // BDNZLRp |
190 | 0 | 311567U, // BDNZLm |
191 | 0 | 311352U, // BDNZLp |
192 | 0 | 311581U, // BDNZm |
193 | 0 | 311366U, // BDNZp |
194 | 0 | 320232U, // BDZ |
195 | 0 | 320232U, // BDZ8 |
196 | 0 | 329955U, // BDZA |
197 | 0 | 327929U, // BDZAm |
198 | 0 | 327714U, // BDZAp |
199 | 0 | 315554U, // BDZL |
200 | 0 | 329727U, // BDZLA |
201 | 0 | 327912U, // BDZLAm |
202 | 0 | 327697U, // BDZLAp |
203 | 0 | 10904U, // BDZLR |
204 | 0 | 10904U, // BDZLR8 |
205 | 0 | 10859U, // BDZLRL |
206 | 0 | 9073U, // BDZLRLm |
207 | 0 | 9041U, // BDZLRLp |
208 | 0 | 9090U, // BDZLRm |
209 | 0 | 9058U, // BDZLRp |
210 | 0 | 311560U, // BDZLm |
211 | 0 | 311345U, // BDZLp |
212 | 0 | 311575U, // BDZm |
213 | 0 | 311360U, // BDZp |
214 | 0 | 315437U, // BL |
215 | 0 | 315437U, // BL8 |
216 | 0 | 3199021U, // BL8_NOP |
217 | 0 | 3264557U, // BL8_NOP_TLS |
218 | 0 | 380973U, // BL8_TLS |
219 | 0 | 380973U, // BL8_TLS_ |
220 | 0 | 329716U, // BLA |
221 | 0 | 329716U, // BLA8 |
222 | 0 | 3213300U, // BLA8_NOP |
223 | 0 | 10900U, // BLR |
224 | 0 | 10900U, // BLR8 |
225 | 0 | 10854U, // BLRL |
226 | 0 | 380973U, // BL_TLS |
227 | 0 | 19031U, // BRINC |
228 | 0 | 19992U, // CLRLSLDI |
229 | 0 | 17060U, // CLRLSLDIo |
230 | 0 | 20334U, // CLRLSLWI |
231 | 0 | 17158U, // CLRLSLWIo |
232 | 0 | 20027U, // CLRRDI |
233 | 0 | 17087U, // CLRRDIo |
234 | 0 | 20375U, // CLRRWI |
235 | 0 | 17187U, // CLRRWIo |
236 | 0 | 18707U, // CMPB |
237 | 0 | 18707U, // CMPB8 |
238 | 0 | 19296U, // CMPD |
239 | 0 | 20020U, // CMPDI |
240 | 0 | 19230U, // CMPLD |
241 | 0 | 19984U, // CMPLDI |
242 | 0 | 24018U, // CMPLW |
243 | 0 | 20318U, // CMPLWI |
244 | 0 | 24258U, // CMPW |
245 | 0 | 20368U, // CMPWI |
246 | 0 | 268454862U, // CNTLZD |
247 | 0 | 268452371U, // CNTLZDo |
248 | 0 | 268459932U, // CNTLZW |
249 | 0 | 268459932U, // CNTLZW8 |
250 | 0 | 268453215U, // CNTLZW8o |
251 | 0 | 268453215U, // CNTLZWo |
252 | 0 | 9713U, // CR6SET |
253 | 0 | 9699U, // CR6UNSET |
254 | 0 | 19282U, // CRAND |
255 | 0 | 18952U, // CRANDC |
256 | 0 | 23565U, // CREQV |
257 | 0 | 19266U, // CRNAND |
258 | 0 | 22356U, // CRNOR |
259 | 0 | 22370U, // CROR |
260 | 0 | 19052U, // CRORC |
261 | 0 | 33577997U, // CRSET |
262 | 0 | 33576822U, // CRUNSET |
263 | 0 | 22390U, // CRXOR |
264 | 0 | 132813U, // DCBA |
265 | 0 | 134241U, // DCBF |
266 | 0 | 134619U, // DCBI |
267 | 0 | 138004U, // DCBST |
268 | 0 | 137959U, // DCBT |
269 | 0 | 138016U, // DCBTST |
270 | 0 | 139997U, // DCBZ |
271 | 0 | 135323U, // DCBZL |
272 | 0 | 268455405U, // DCCCI |
273 | 0 | 19393U, // DIVD |
274 | 0 | 23421U, // DIVDU |
275 | 0 | 17630U, // DIVDUo |
276 | 0 | 16908U, // DIVDo |
277 | 0 | 24461U, // DIVW |
278 | 0 | 23526U, // DIVWU |
279 | 0 | 17647U, // DIVWUo |
280 | 0 | 17752U, // DIVWo |
281 | 0 | 416157U, // DSS |
282 | 0 | 10847U, // DSSALL |
283 | 0 | 847420187U, // DST |
284 | 0 | 847420187U, // DST64 |
285 | 0 | 847420200U, // DSTST |
286 | 0 | 847420200U, // DSTST64 |
287 | 0 | 847420213U, // DSTSTT |
288 | 0 | 847420213U, // DSTSTT64 |
289 | 0 | 847420207U, // DSTT |
290 | 0 | 847420207U, // DSTT64 |
291 | 0 | 10213U, // DYNALLOC |
292 | 0 | 9870U, // DYNALLOC8 |
293 | 0 | 9347U, // EH_SjLj_LongJmp32 |
294 | 0 | 9591U, // EH_SjLj_LongJmp64 |
295 | 0 | 9366U, // EH_SjLj_SetJmp32 |
296 | 0 | 9610U, // EH_SjLj_SetJmp64 |
297 | 0 | 311297U, // EH_SjLj_Setup |
298 | 0 | 23560U, // EQV |
299 | 0 | 23560U, // EQV8 |
300 | 0 | 17662U, // EQV8o |
301 | 0 | 17662U, // EQVo |
302 | 0 | 268457944U, // EVABS |
303 | 0 | 50355624U, // EVADDIW |
304 | 0 | 268459087U, // EVADDSMIAAW |
305 | 0 | 268459219U, // EVADDSSIAAW |
306 | 0 | 268459153U, // EVADDUMIAAW |
307 | 0 | 268459285U, // EVADDUSIAAW |
308 | 0 | 23902U, // EVADDW |
309 | 0 | 19289U, // EVAND |
310 | 0 | 18960U, // EVANDC |
311 | 0 | 22237U, // EVCMPEQ |
312 | 0 | 22964U, // EVCMPGTS |
313 | 0 | 23472U, // EVCMPGTU |
314 | 0 | 22974U, // EVCMPLTS |
315 | 0 | 23482U, // EVCMPLTU |
316 | 0 | 268459753U, // EVCNTLSW |
317 | 0 | 268459930U, // EVCNTLZW |
318 | 0 | 23109U, // EVDIVWS |
319 | 0 | 23524U, // EVDIVWU |
320 | 0 | 23572U, // EVEQV |
321 | 0 | 268454247U, // EVEXTSB |
322 | 0 | 268455278U, // EVEXTSH |
323 | 0 | 58739421U, // EVLDD |
324 | 0 | 24589U, // EVLDDX |
325 | 0 | 58739957U, // EVLDH |
326 | 0 | 24693U, // EVLDHX |
327 | 0 | 58744166U, // EVLDW |
328 | 0 | 25233U, // EVLDWX |
329 | 0 | 58743462U, // EVLHHESPLAT |
330 | 0 | 24986U, // EVLHHESPLATX |
331 | 0 | 58743487U, // EVLHHOSSPLAT |
332 | 0 | 25013U, // EVLHHOSSPLATX |
333 | 0 | 58743501U, // EVLHHOUSPLAT |
334 | 0 | 25028U, // EVLHHOUSPLATX |
335 | 0 | 58739699U, // EVLWHE |
336 | 0 | 24664U, // EVLWHEX |
337 | 0 | 58743188U, // EVLWHOS |
338 | 0 | 24966U, // EVLWHOSX |
339 | 0 | 58743699U, // EVLWHOU |
340 | 0 | 25144U, // EVLWHOUX |
341 | 0 | 58743475U, // EVLWHSPLAT |
342 | 0 | 25000U, // EVLWHSPLATX |
343 | 0 | 58743515U, // EVLWWSPLAT |
344 | 0 | 25043U, // EVLWWSPLATX |
345 | 0 | 20091U, // EVMERGEHI |
346 | 0 | 21072U, // EVMERGEHILO |
347 | 0 | 21061U, // EVMERGELO |
348 | 0 | 20102U, // EVMERGELOHI |
349 | 0 | 18003U, // EVMHEGSMFAA |
350 | 0 | 20878U, // EVMHEGSMFAN |
351 | 0 | 18051U, // EVMHEGSMIAA |
352 | 0 | 20926U, // EVMHEGSMIAN |
353 | 0 | 18088U, // EVMHEGUMIAA |
354 | 0 | 20963U, // EVMHEGUMIAN |
355 | 0 | 19565U, // EVMHESMF |
356 | 0 | 18136U, // EVMHESMFA |
357 | 0 | 23579U, // EVMHESMFAAW |
358 | 0 | 24050U, // EVMHESMFANW |
359 | 0 | 20145U, // EVMHESMI |
360 | 0 | 18227U, // EVMHESMIA |
361 | 0 | 23644U, // EVMHESMIAAW |
362 | 0 | 24102U, // EVMHESMIANW |
363 | 0 | 19640U, // EVMHESSF |
364 | 0 | 18179U, // EVMHESSFA |
365 | 0 | 23605U, // EVMHESSFAAW |
366 | 0 | 24076U, // EVMHESSFANW |
367 | 0 | 23776U, // EVMHESSIAAW |
368 | 0 | 24180U, // EVMHESSIANW |
369 | 0 | 20184U, // EVMHEUMI |
370 | 0 | 18270U, // EVMHEUMIA |
371 | 0 | 23710U, // EVMHEUMIAAW |
372 | 0 | 24141U, // EVMHEUMIANW |
373 | 0 | 23842U, // EVMHEUSIAAW |
374 | 0 | 24219U, // EVMHEUSIANW |
375 | 0 | 18016U, // EVMHOGSMFAA |
376 | 0 | 20891U, // EVMHOGSMFAN |
377 | 0 | 18064U, // EVMHOGSMIAA |
378 | 0 | 20939U, // EVMHOGSMIAN |
379 | 0 | 18101U, // EVMHOGUMIAA |
380 | 0 | 20976U, // EVMHOGUMIAN |
381 | 0 | 19585U, // EVMHOSMF |
382 | 0 | 18158U, // EVMHOSMFA |
383 | 0 | 23592U, // EVMHOSMFAAW |
384 | 0 | 24063U, // EVMHOSMFANW |
385 | 0 | 20165U, // EVMHOSMI |
386 | 0 | 18249U, // EVMHOSMIA |
387 | 0 | 23684U, // EVMHOSMIAAW |
388 | 0 | 24128U, // EVMHOSMIANW |
389 | 0 | 19660U, // EVMHOSSF |
390 | 0 | 18201U, // EVMHOSSFA |
391 | 0 | 23618U, // EVMHOSSFAAW |
392 | 0 | 24089U, // EVMHOSSFANW |
393 | 0 | 23816U, // EVMHOSSIAAW |
394 | 0 | 24206U, // EVMHOSSIANW |
395 | 0 | 20214U, // EVMHOUMI |
396 | 0 | 18303U, // EVMHOUMIA |
397 | 0 | 23750U, // EVMHOUMIAAW |
398 | 0 | 24167U, // EVMHOUMIANW |
399 | 0 | 23882U, // EVMHOUSIAAW |
400 | 0 | 24245U, // EVMHOUSIANW |
401 | 0 | 268453902U, // EVMRA |
402 | 0 | 19575U, // EVMWHSMF |
403 | 0 | 18147U, // EVMWHSMFA |
404 | 0 | 20155U, // EVMWHSMI |
405 | 0 | 18238U, // EVMWHSMIA |
406 | 0 | 19650U, // EVMWHSSF |
407 | 0 | 18190U, // EVMWHSSFA |
408 | 0 | 20194U, // EVMWHUMI |
409 | 0 | 18281U, // EVMWHUMIA |
410 | 0 | 23671U, // EVMWLSMIAAW |
411 | 0 | 24115U, // EVMWLSMIANW |
412 | 0 | 23803U, // EVMWLSSIAAW |
413 | 0 | 24193U, // EVMWLSSIANW |
414 | 0 | 20204U, // EVMWLUMI |
415 | 0 | 18292U, // EVMWLUMIA |
416 | 0 | 23737U, // EVMWLUMIAAW |
417 | 0 | 24154U, // EVMWLUMIANW |
418 | 0 | 23869U, // EVMWLUSIAAW |
419 | 0 | 24232U, // EVMWLUSIANW |
420 | 0 | 19595U, // EVMWSMF |
421 | 0 | 18169U, // EVMWSMFA |
422 | 0 | 18029U, // EVMWSMFAA |
423 | 0 | 20904U, // EVMWSMFAN |
424 | 0 | 20175U, // EVMWSMI |
425 | 0 | 18260U, // EVMWSMIA |
426 | 0 | 18077U, // EVMWSMIAA |
427 | 0 | 20952U, // EVMWSMIAN |
428 | 0 | 19670U, // EVMWSSF |
429 | 0 | 18212U, // EVMWSSFA |
430 | 0 | 18040U, // EVMWSSFAA |
431 | 0 | 20915U, // EVMWSSFAN |
432 | 0 | 20224U, // EVMWUMI |
433 | 0 | 18314U, // EVMWUMIA |
434 | 0 | 18114U, // EVMWUMIAA |
435 | 0 | 20989U, // EVMWUMIAN |
436 | 0 | 19274U, // EVNAND |
437 | 0 | 268455143U, // EVNEG |
438 | 0 | 22363U, // EVNOR |
439 | 0 | 22376U, // EVOR |
440 | 0 | 19059U, // EVORC |
441 | 0 | 24025U, // EVRLW |
442 | 0 | 20326U, // EVRLWI |
443 | 0 | 268459373U, // EVRNDW |
444 | 0 | 24032U, // EVSLW |
445 | 0 | 20352U, // EVSLWI |
446 | 0 | 268455536U, // EVSPLATFI |
447 | 0 | 268455748U, // EVSPLATI |
448 | 0 | 22904U, // EVSRWIS |
449 | 0 | 23434U, // EVSRWIU |
450 | 0 | 23046U, // EVSRWS |
451 | 0 | 23510U, // EVSRWU |
452 | 0 | 58739428U, // EVSTDD |
453 | 0 | 24597U, // EVSTDDX |
454 | 0 | 58739964U, // EVSTDH |
455 | 0 | 24701U, // EVSTDHX |
456 | 0 | 58744181U, // EVSTDW |
457 | 0 | 25241U, // EVSTDWX |
458 | 0 | 58739707U, // EVSTWHE |
459 | 0 | 24673U, // EVSTWHEX |
460 | 0 | 58741308U, // EVSTWHO |
461 | 0 | 24794U, // EVSTWHOX |
462 | 0 | 58739785U, // EVSTWWE |
463 | 0 | 24683U, // EVSTWWEX |
464 | 0 | 58741353U, // EVSTWWO |
465 | 0 | 24804U, // EVSTWWOX |
466 | 0 | 268459113U, // EVSUBFSMIAAW |
467 | 0 | 268459245U, // EVSUBFSSIAAW |
468 | 0 | 268459179U, // EVSUBFUMIAAW |
469 | 0 | 268459311U, // EVSUBFUSIAAW |
470 | 0 | 23933U, // EVSUBFW |
471 | 0 | 67132806U, // EVSUBIFW |
472 | 0 | 22397U, // EVXOR |
473 | 0 | 20002U, // EXTLDI |
474 | 0 | 17071U, // EXTLDIo |
475 | 0 | 20360U, // EXTLWI |
476 | 0 | 17178U, // EXTLWIo |
477 | 0 | 20051U, // EXTRDI |
478 | 0 | 17114U, // EXTRDIo |
479 | 0 | 20399U, // EXTRWI |
480 | 0 | 17214U, // EXTRWIo |
481 | 0 | 268454249U, // EXTSB |
482 | 0 | 268454249U, // EXTSB8 |
483 | 0 | 268454249U, // EXTSB8_32_64 |
484 | 0 | 268452143U, // EXTSB8o |
485 | 0 | 268452143U, // EXTSBo |
486 | 0 | 268455280U, // EXTSH |
487 | 0 | 268455280U, // EXTSH8 |
488 | 0 | 268455280U, // EXTSH8_32_64 |
489 | 0 | 268452478U, // EXTSH8o |
490 | 0 | 268452478U, // EXTSHo |
491 | 0 | 268459790U, // EXTSW |
492 | 0 | 268459790U, // EXTSW_32_64 |
493 | 0 | 268453178U, // EXTSW_32_64o |
494 | 0 | 268453178U, // EXTSWo |
495 | 0 | 10885U, // EnforceIEIO |
496 | 0 | 268457929U, // FABSD |
497 | 0 | 268452914U, // FABSDo |
498 | 0 | 268457929U, // FABSS |
499 | 0 | 268452914U, // FABSSo |
500 | 0 | 19092U, // FADD |
501 | 0 | 22583U, // FADDS |
502 | 0 | 17500U, // FADDSo |
503 | 0 | 16800U, // FADDo |
504 | 0 | 0U, // FADDrtz |
505 | 0 | 268454656U, // FCFID |
506 | 0 | 268458121U, // FCFIDS |
507 | 0 | 268452983U, // FCFIDSo |
508 | 0 | 268458848U, // FCFIDU |
509 | 0 | 268458450U, // FCFIDUS |
510 | 0 | 268453042U, // FCFIDUSo |
511 | 0 | 268453077U, // FCFIDUo |
512 | 0 | 268452288U, // FCFIDo |
513 | 0 | 23452U, // FCMPUD |
514 | 0 | 23452U, // FCMPUS |
515 | 0 | 21013U, // FCPSGND |
516 | 0 | 17278U, // FCPSGNDo |
517 | 0 | 21013U, // FCPSGNS |
518 | 0 | 17278U, // FCPSGNSo |
519 | 0 | 268454665U, // FCTID |
520 | 0 | 268460846U, // FCTIDUZ |
521 | 0 | 268453264U, // FCTIDUZo |
522 | 0 | 268460783U, // FCTIDZ |
523 | 0 | 268453248U, // FCTIDZo |
524 | 0 | 268452296U, // FCTIDo |
525 | 0 | 268459443U, // FCTIW |
526 | 0 | 268460857U, // FCTIWUZ |
527 | 0 | 268453274U, // FCTIWUZo |
528 | 0 | 268460868U, // FCTIWZ |
529 | 0 | 268453284U, // FCTIWZo |
530 | 0 | 268453139U, // FCTIWo |
531 | 0 | 23551U, // FDIV |
532 | 0 | 23039U, // FDIVS |
533 | 0 | 17596U, // FDIVSo |
534 | 0 | 17655U, // FDIVo |
535 | 0 | 19100U, // FMADD |
536 | 0 | 22592U, // FMADDS |
537 | 0 | 17508U, // FMADDSo |
538 | 0 | 16807U, // FMADDo |
539 | 0 | 268457792U, // FMR |
540 | 0 | 268452896U, // FMRo |
541 | 0 | 18891U, // FMSUB |
542 | 0 | 22562U, // FMSUBS |
543 | 0 | 17481U, // FMSUBSo |
544 | 0 | 16713U, // FMSUBo |
545 | 0 | 20607U, // FMUL |
546 | 0 | 22915U, // FMULS |
547 | 0 | 17569U, // FMULSo |
548 | 0 | 17247U, // FMULo |
549 | 0 | 268457937U, // FNABSD |
550 | 0 | 268452921U, // FNABSDo |
551 | 0 | 268457937U, // FNABSS |
552 | 0 | 268452921U, // FNABSSo |
553 | 0 | 268455137U, // FNEGD |
554 | 0 | 268452460U, // FNEGDo |
555 | 0 | 268455137U, // FNEGS |
556 | 0 | 268452460U, // FNEGSo |
557 | 0 | 19109U, // FNMADD |
558 | 0 | 22602U, // FNMADDS |
559 | 0 | 17517U, // FNMADDSo |
560 | 0 | 16815U, // FNMADDo |
561 | 0 | 18900U, // FNMSUB |
562 | 0 | 22572U, // FNMSUBS |
563 | 0 | 17490U, // FNMSUBSo |
564 | 0 | 16721U, // FNMSUBo |
565 | 0 | 268454954U, // FRE |
566 | 0 | 268458203U, // FRES |
567 | 0 | 268452992U, // FRESo |
568 | 0 | 268452412U, // FREo |
569 | 0 | 268456252U, // FRIMD |
570 | 0 | 268452710U, // FRIMDo |
571 | 0 | 268456252U, // FRIMS |
572 | 0 | 268452710U, // FRIMSo |
573 | 0 | 268456486U, // FRIND |
574 | 0 | 268452743U, // FRINDo |
575 | 0 | 268456486U, // FRINS |
576 | 0 | 268452743U, // FRINSo |
577 | 0 | 268457336U, // FRIPD |
578 | 0 | 268452829U, // FRIPDo |
579 | 0 | 268457336U, // FRIPS |
580 | 0 | 268452829U, // FRIPSo |
581 | 0 | 268460832U, // FRIZD |
582 | 0 | 268453257U, // FRIZDo |
583 | 0 | 268460832U, // FRIZS |
584 | 0 | 268453257U, // FRIZSo |
585 | 0 | 268457576U, // FRSP |
586 | 0 | 268452860U, // FRSPo |
587 | 0 | 268454969U, // FRSQRTE |
588 | 0 | 268458211U, // FRSQRTES |
589 | 0 | 268452999U, // FRSQRTESo |
590 | 0 | 268452418U, // FRSQRTEo |
591 | 0 | 20559U, // FSELD |
592 | 0 | 17240U, // FSELDo |
593 | 0 | 20559U, // FSELS |
594 | 0 | 17240U, // FSELSo |
595 | 0 | 268458765U, // FSQRT |
596 | 0 | 268458440U, // FSQRTS |
597 | 0 | 268453033U, // FSQRTSo |
598 | 0 | 268453060U, // FSQRTo |
599 | 0 | 18883U, // FSUB |
600 | 0 | 22553U, // FSUBS |
601 | 0 | 17473U, // FSUBSo |
602 | 0 | 16706U, // FSUBo |
603 | 0 | 10616U, // GETtlsADDR |
604 | 0 | 9435U, // GETtlsADDR32 |
605 | 0 | 10602U, // GETtlsldADDR |
606 | 0 | 9420U, // GETtlsldADDR32 |
607 | 0 | 134625U, // ICBI |
608 | 0 | 187117U, // ICBT |
609 | 0 | 268455412U, // ICCCI |
610 | 0 | 20344U, // INSLWI |
611 | 0 | 17169U, // INSLWIo |
612 | 0 | 20035U, // INSRDI |
613 | 0 | 17096U, // INSRDIo |
614 | 0 | 20383U, // INSRWI |
615 | 0 | 17196U, // INSRWIo |
616 | 0 | 20565U, // ISEL |
617 | 0 | 20565U, // ISEL8 |
618 | 0 | 10783U, // ISYNC |
619 | 0 | 75515893U, // LA |
620 | 0 | 58738677U, // LAx |
621 | 0 | 58745571U, // LBZ |
622 | 0 | 58745571U, // LBZ8 |
623 | 0 | 24770U, // LBZCIX |
624 | 0 | 83909613U, // LBZU |
625 | 0 | 83909613U, // LBZU8 |
626 | 0 | 92299889U, // LBZUX |
627 | 0 | 92299889U, // LBZUX8 |
628 | 0 | 285237953U, // LBZX |
629 | 0 | 285237953U, // LBZX8 |
630 | 0 | 58739475U, // LD |
631 | 0 | 285237511U, // LDARX |
632 | 0 | 285237525U, // LDBRX |
633 | 0 | 24739U, // LDCIX |
634 | 0 | 83909490U, // LDU |
635 | 0 | 92299805U, // LDUX |
636 | 0 | 285237300U, // LDX |
637 | 0 | 10511U, // LDgotTprelL |
638 | 0 | 9317U, // LDgotTprelL32 |
639 | 0 | 10795U, // LDtoc |
640 | 0 | 10736U, // LDtocBA |
641 | 0 | 10736U, // LDtocCPT |
642 | 0 | 10459U, // LDtocJTI |
643 | 0 | 10469U, // LDtocL |
644 | 0 | 58739436U, // LFD |
645 | 0 | 83909449U, // LFDU |
646 | 0 | 92299788U, // LFDUX |
647 | 0 | 285237280U, // LFDX |
648 | 0 | 285237207U, // LFIWAX |
649 | 0 | 285237967U, // LFIWZX |
650 | 0 | 58743027U, // LFS |
651 | 0 | 83909539U, // LFSU |
652 | 0 | 92299865U, // LFSUX |
653 | 0 | 285237613U, // LFSX |
654 | 0 | 58738478U, // LHA |
655 | 0 | 58738478U, // LHA8 |
656 | 0 | 83909437U, // LHAU |
657 | 0 | 83909437U, // LHAU8 |
658 | 0 | 92299744U, // LHAUX |
659 | 0 | 92299744U, // LHAUX8 |
660 | 0 | 285237190U, // LHAX |
661 | 0 | 285237190U, // LHAX8 |
662 | 0 | 285237540U, // LHBRX |
663 | 0 | 285237540U, // LHBRX8 |
664 | 0 | 58745591U, // LHZ |
665 | 0 | 58745591U, // LHZ8 |
666 | 0 | 24778U, // LHZCIX |
667 | 0 | 83909619U, // LHZU |
668 | 0 | 83909619U, // LHZU8 |
669 | 0 | 92299896U, // LHZUX |
670 | 0 | 92299896U, // LHZUX8 |
671 | 0 | 285237959U, // LHZX |
672 | 0 | 285237959U, // LHZX8 |
673 | 0 | 100683414U, // LI |
674 | 0 | 100683414U, // LI8 |
675 | 0 | 100686188U, // LIS |
676 | 0 | 100686188U, // LIS8 |
677 | 0 | 58744295U, // LMW |
678 | 0 | 20407U, // LSWI |
679 | 0 | 285237221U, // LVEBX |
680 | 0 | 285237382U, // LVEHX |
681 | 0 | 285237922U, // LVEWX |
682 | 0 | 285233271U, // LVSL |
683 | 0 | 285235116U, // LVSR |
684 | 0 | 285237894U, // LVX |
685 | 0 | 285233294U, // LVXL |
686 | 0 | 58738709U, // LWA |
687 | 0 | 285237518U, // LWARX |
688 | 0 | 92299751U, // LWAUX |
689 | 0 | 285237215U, // LWAX |
690 | 0 | 285237215U, // LWAX_32 |
691 | 0 | 58738709U, // LWA_32 |
692 | 0 | 285237555U, // LWBRX |
693 | 0 | 285237555U, // LWBRX8 |
694 | 0 | 58745676U, // LWZ |
695 | 0 | 58745676U, // LWZ8 |
696 | 0 | 24786U, // LWZCIX |
697 | 0 | 83909625U, // LWZU |
698 | 0 | 83909625U, // LWZU8 |
699 | 0 | 92299903U, // LWZUX |
700 | 0 | 92299903U, // LWZUX8 |
701 | 0 | 285237975U, // LWZX |
702 | 0 | 285237975U, // LWZX8 |
703 | 0 | 10802U, // LWZtoc |
704 | 0 | 285237315U, // LXSDX |
705 | 0 | 285237156U, // LXVD2X |
706 | 0 | 285237596U, // LXVDSX |
707 | 0 | 285237173U, // LXVW4X |
708 | 0 | 415475U, // MBAR |
709 | 0 | 268455060U, // MCRF |
710 | 0 | 268458232U, // MCRFS |
711 | 0 | 284430U, // MFCR |
712 | 0 | 284430U, // MFCR8 |
713 | 0 | 284601U, // MFCTR |
714 | 0 | 284601U, // MFCTR8 |
715 | 0 | 268457721U, // MFDCR |
716 | 0 | 284909U, // MFFS |
717 | 0 | 279698U, // MFFSo |
718 | 0 | 284466U, // MFLR |
719 | 0 | 284466U, // MFLR8 |
720 | 0 | 284568U, // MFMSR |
721 | 0 | 109071514U, // MFOCRF |
722 | 0 | 109071514U, // MFOCRF8 |
723 | 0 | 268457860U, // MFSPR |
724 | 0 | 117462930U, // MFSR |
725 | 0 | 268456492U, // MFSRIN |
726 | 0 | 268454264U, // MFTB |
727 | 0 | 3430276U, // MFTB8 |
728 | 0 | 3692420U, // MFVRSAVE |
729 | 0 | 3692420U, // MFVRSAVEv |
730 | 0 | 284444U, // MFVSCR |
731 | 0 | 10789U, // MSYNC |
732 | 0 | 268455082U, // MTCRF |
733 | 0 | 268455082U, // MTCRF8 |
734 | 0 | 284608U, // MTCTR |
735 | 0 | 284608U, // MTCTR8 |
736 | 0 | 284608U, // MTCTR8loop |
737 | 0 | 284608U, // MTCTRloop |
738 | 0 | 302159623U, // MTDCR |
739 | 0 | 411053U, // MTFSB0 |
740 | 0 | 411061U, // MTFSB1 |
741 | 0 | 19633U, // MTFSF |
742 | 0 | 20072U, // MTFSFI |
743 | 0 | 17123U, // MTFSFIo |
744 | 0 | 268455089U, // MTFSFb |
745 | 0 | 16996U, // MTFSFo |
746 | 0 | 284472U, // MTLR |
747 | 0 | 284472U, // MTLR8 |
748 | 0 | 268457887U, // MTMSR |
749 | 0 | 268454758U, // MTMSRD |
750 | 0 | 199842U, // MTOCRF |
751 | 0 | 199842U, // MTOCRF8 |
752 | 0 | 268457867U, // MTSPR |
753 | 0 | 219046U, // MTSR |
754 | 0 | 268456500U, // MTSRIN |
755 | 0 | 278748U, // MTVRSAVE |
756 | 0 | 426204U, // MTVRSAVEv |
757 | 0 | 284452U, // MTVSCR |
758 | 0 | 19191U, // MULHD |
759 | 0 | 23382U, // MULHDU |
760 | 0 | 17612U, // MULHDUo |
761 | 0 | 16824U, // MULHDo |
762 | 0 | 23969U, // MULHW |
763 | 0 | 23492U, // MULHWU |
764 | 0 | 17638U, // MULHWUo |
765 | 0 | 17675U, // MULHWo |
766 | 0 | 19223U, // MULLD |
767 | 0 | 16848U, // MULLDo |
768 | 0 | 20122U, // MULLI |
769 | 0 | 20122U, // MULLI8 |
770 | 0 | 24011U, // MULLW |
771 | 0 | 17691U, // MULLWo |
772 | 0 | 10640U, // MoveGOTtoLR |
773 | 0 | 10628U, // MovePCtoLR |
774 | 0 | 10070U, // MovePCtoLR8 |
775 | 0 | 19260U, // NAND |
776 | 0 | 19260U, // NAND8 |
777 | 0 | 16862U, // NAND8o |
778 | 0 | 16862U, // NANDo |
779 | 0 | 268455138U, // NEG |
780 | 0 | 268455138U, // NEG8 |
781 | 0 | 268452461U, // NEG8o |
782 | 0 | 268452461U, // NEGo |
783 | 0 | 10896U, // NOP |
784 | 0 | 9105U, // NOP_GT_PWR6 |
785 | 0 | 9117U, // NOP_GT_PWR7 |
786 | 0 | 22351U, // NOR |
787 | 0 | 22351U, // NOR8 |
788 | 0 | 17446U, // NOR8o |
789 | 0 | 17446U, // NORo |
790 | 0 | 22344U, // OR |
791 | 0 | 22344U, // OR8 |
792 | 0 | 17447U, // OR8o |
793 | 0 | 19047U, // ORC |
794 | 0 | 19047U, // ORC8 |
795 | 0 | 16787U, // ORC8o |
796 | 0 | 16787U, // ORCo |
797 | 0 | 20276U, // ORI |
798 | 0 | 20276U, // ORI8 |
799 | 0 | 22898U, // ORIS |
800 | 0 | 22898U, // ORIS8 |
801 | 0 | 17447U, // ORo |
802 | 0 | 268454799U, // POPCNTD |
803 | 0 | 268459823U, // POPCNTW |
804 | 0 | 10713U, // PPC32GOT |
805 | 0 | 10723U, // PPC32PICGOT |
806 | 0 | 20233U, // QVALIGNI |
807 | 0 | 20233U, // QVALIGNIb |
808 | 0 | 20233U, // QVALIGNIs |
809 | 0 | 20281U, // QVESPLATI |
810 | 0 | 20281U, // QVESPLATIb |
811 | 0 | 20281U, // QVESPLATIs |
812 | 0 | 268457927U, // QVFABS |
813 | 0 | 268457927U, // QVFABSs |
814 | 0 | 19090U, // QVFADD |
815 | 0 | 22581U, // QVFADDS |
816 | 0 | 22581U, // QVFADDSs |
817 | 0 | 268454654U, // QVFCFID |
818 | 0 | 268458119U, // QVFCFIDS |
819 | 0 | 268458846U, // QVFCFIDU |
820 | 0 | 268458448U, // QVFCFIDUS |
821 | 0 | 268454654U, // QVFCFIDb |
822 | 0 | 22227U, // QVFCMPEQ |
823 | 0 | 22227U, // QVFCMPEQb |
824 | 0 | 22227U, // QVFCMPEQbs |
825 | 0 | 23283U, // QVFCMPGT |
826 | 0 | 23283U, // QVFCMPGTb |
827 | 0 | 23283U, // QVFCMPGTbs |
828 | 0 | 23299U, // QVFCMPLT |
829 | 0 | 23299U, // QVFCMPLTb |
830 | 0 | 23299U, // QVFCMPLTbs |
831 | 0 | 21011U, // QVFCPSGN |
832 | 0 | 21011U, // QVFCPSGNs |
833 | 0 | 268454663U, // QVFCTID |
834 | 0 | 268458856U, // QVFCTIDU |
835 | 0 | 268460844U, // QVFCTIDUZ |
836 | 0 | 268460781U, // QVFCTIDZ |
837 | 0 | 268454663U, // QVFCTIDb |
838 | 0 | 268459441U, // QVFCTIW |
839 | 0 | 268458956U, // QVFCTIWU |
840 | 0 | 268460855U, // QVFCTIWUZ |
841 | 0 | 268460866U, // QVFCTIWZ |
842 | 0 | 20513U, // QVFLOGICAL |
843 | 0 | 20513U, // QVFLOGICALb |
844 | 0 | 20513U, // QVFLOGICALs |
845 | 0 | 19098U, // QVFMADD |
846 | 0 | 22590U, // QVFMADDS |
847 | 0 | 22590U, // QVFMADDSs |
848 | 0 | 268457790U, // QVFMR |
849 | 0 | 268457790U, // QVFMRb |
850 | 0 | 268457790U, // QVFMRs |
851 | 0 | 18889U, // QVFMSUB |
852 | 0 | 22560U, // QVFMSUBS |
853 | 0 | 22560U, // QVFMSUBSs |
854 | 0 | 20605U, // QVFMUL |
855 | 0 | 22913U, // QVFMULS |
856 | 0 | 22913U, // QVFMULSs |
857 | 0 | 268457935U, // QVFNABS |
858 | 0 | 268457935U, // QVFNABSs |
859 | 0 | 268455135U, // QVFNEG |
860 | 0 | 268455135U, // QVFNEGs |
861 | 0 | 19107U, // QVFNMADD |
862 | 0 | 22600U, // QVFNMADDS |
863 | 0 | 22600U, // QVFNMADDSs |
864 | 0 | 18898U, // QVFNMSUB |
865 | 0 | 22570U, // QVFNMSUBS |
866 | 0 | 22570U, // QVFNMSUBSs |
867 | 0 | 20817U, // QVFPERM |
868 | 0 | 20817U, // QVFPERMs |
869 | 0 | 268454952U, // QVFRE |
870 | 0 | 268458201U, // QVFRES |
871 | 0 | 268458201U, // QVFRESs |
872 | 0 | 268456250U, // QVFRIM |
873 | 0 | 268456250U, // QVFRIMs |
874 | 0 | 268456484U, // QVFRIN |
875 | 0 | 268456484U, // QVFRINs |
876 | 0 | 268457334U, // QVFRIP |
877 | 0 | 268457334U, // QVFRIPs |
878 | 0 | 268460830U, // QVFRIZ |
879 | 0 | 268460830U, // QVFRIZs |
880 | 0 | 268457574U, // QVFRSP |
881 | 0 | 268457574U, // QVFRSPs |
882 | 0 | 268454967U, // QVFRSQRTE |
883 | 0 | 268458209U, // QVFRSQRTES |
884 | 0 | 268458209U, // QVFRSQRTESs |
885 | 0 | 20557U, // QVFSEL |
886 | 0 | 20557U, // QVFSELb |
887 | 0 | 20557U, // QVFSELbb |
888 | 0 | 20557U, // QVFSELbs |
889 | 0 | 18881U, // QVFSUB |
890 | 0 | 22551U, // QVFSUBS |
891 | 0 | 22551U, // QVFSUBSs |
892 | 0 | 21000U, // QVFTSTNAN |
893 | 0 | 21000U, // QVFTSTNANb |
894 | 0 | 21000U, // QVFTSTNANbs |
895 | 0 | 19144U, // QVFXMADD |
896 | 0 | 22640U, // QVFXMADDS |
897 | 0 | 20613U, // QVFXMUL |
898 | 0 | 22922U, // QVFXMULS |
899 | 0 | 19117U, // QVFXXCPNMADD |
900 | 0 | 22611U, // QVFXXCPNMADDS |
901 | 0 | 19154U, // QVFXXMADD |
902 | 0 | 22651U, // QVFXXMADDS |
903 | 0 | 19131U, // QVFXXNPMADD |
904 | 0 | 22626U, // QVFXXNPMADDS |
905 | 0 | 125849083U, // QVGPCI |
906 | 0 | 285237749U, // QVLFCDUX |
907 | 0 | 285231221U, // QVLFCDUXA |
908 | 0 | 285237242U, // QVLFCDX |
909 | 0 | 285231141U, // QVLFCDXA |
910 | 0 | 285237826U, // QVLFCSUX |
911 | 0 | 285231265U, // QVLFCSUXA |
912 | 0 | 285237577U, // QVLFCSX |
913 | 0 | 285231181U, // QVLFCSXA |
914 | 0 | 285237577U, // QVLFCSXs |
915 | 0 | 92299786U, // QVLFDUX |
916 | 0 | 285231244U, // QVLFDUXA |
917 | 0 | 285237278U, // QVLFDX |
918 | 0 | 285231162U, // QVLFDXA |
919 | 0 | 285237278U, // QVLFDXb |
920 | 0 | 285237205U, // QVLFIWAX |
921 | 0 | 285231130U, // QVLFIWAXA |
922 | 0 | 285237965U, // QVLFIWZX |
923 | 0 | 285231320U, // QVLFIWZXA |
924 | 0 | 92299863U, // QVLFSUX |
925 | 0 | 285231288U, // QVLFSUXA |
926 | 0 | 285237611U, // QVLFSX |
927 | 0 | 285231202U, // QVLFSXA |
928 | 0 | 285237611U, // QVLFSXb |
929 | 0 | 285237611U, // QVLFSXs |
930 | 0 | 285237295U, // QVLPCLDX |
931 | 0 | 285237628U, // QVLPCLSX |
932 | 0 | 3957116U, // QVLPCLSXint |
933 | 0 | 285237305U, // QVLPCRDX |
934 | 0 | 285237648U, // QVLPCRSX |
935 | 0 | 285237759U, // QVSTFCDUX |
936 | 0 | 285231232U, // QVSTFCDUXA |
937 | 0 | 285233139U, // QVSTFCDUXI |
938 | 0 | 285231042U, // QVSTFCDUXIA |
939 | 0 | 285237251U, // QVSTFCDX |
940 | 0 | 285231151U, // QVSTFCDXA |
941 | 0 | 285233097U, // QVSTFCDXI |
942 | 0 | 285230996U, // QVSTFCDXIA |
943 | 0 | 285237836U, // QVSTFCSUX |
944 | 0 | 285231276U, // QVSTFCSUXA |
945 | 0 | 285233162U, // QVSTFCSUXI |
946 | 0 | 285231067U, // QVSTFCSUXIA |
947 | 0 | 285237586U, // QVSTFCSX |
948 | 0 | 285231191U, // QVSTFCSXA |
949 | 0 | 285233118U, // QVSTFCSXI |
950 | 0 | 285231019U, // QVSTFCSXIA |
951 | 0 | 285237586U, // QVSTFCSXs |
952 | 0 | 92447251U, // QVSTFDUX |
953 | 0 | 285231254U, // QVSTFDUXA |
954 | 0 | 285233151U, // QVSTFDUXI |
955 | 0 | 285231055U, // QVSTFDUXIA |
956 | 0 | 285237286U, // QVSTFDX |
957 | 0 | 285231171U, // QVSTFDXA |
958 | 0 | 285233108U, // QVSTFDXI |
959 | 0 | 285231008U, // QVSTFDXIA |
960 | 0 | 285237286U, // QVSTFDXb |
961 | 0 | 285237937U, // QVSTFIWX |
962 | 0 | 285231309U, // QVSTFIWXA |
963 | 0 | 92447328U, // QVSTFSUX |
964 | 0 | 285231298U, // QVSTFSUXA |
965 | 0 | 285233174U, // QVSTFSUXI |
966 | 0 | 285231080U, // QVSTFSUXIA |
967 | 0 | 92447328U, // QVSTFSUXs |
968 | 0 | 285237619U, // QVSTFSX |
969 | 0 | 285231211U, // QVSTFSXA |
970 | 0 | 285233129U, // QVSTFSXI |
971 | 0 | 285231031U, // QVSTFSXIA |
972 | 0 | 285237619U, // QVSTFSXs |
973 | 0 | 10548U, // RESTORE_CR |
974 | 0 | 10653U, // RESTORE_CRBIT |
975 | 0 | 10429U, // RESTORE_VRSAVE |
976 | 0 | 10827U, // RFCI |
977 | 0 | 10838U, // RFDI |
978 | 0 | 10843U, // RFI |
979 | 0 | 10810U, // RFID |
980 | 0 | 10832U, // RFMCI |
981 | 0 | 20534U, // RLDCL |
982 | 0 | 17223U, // RLDCLo |
983 | 0 | 22272U, // RLDCR |
984 | 0 | 17423U, // RLDCRo |
985 | 0 | 18989U, // RLDIC |
986 | 0 | 20541U, // RLDICL |
987 | 0 | 20541U, // RLDICL_32_64 |
988 | 0 | 17231U, // RLDICLo |
989 | 0 | 22292U, // RLDICR |
990 | 0 | 17431U, // RLDICRo |
991 | 0 | 16779U, // RLDICo |
992 | 0 | 1115704993U, // RLDIMI |
993 | 0 | 1115701996U, // RLDIMIo |
994 | 0 | 1384140457U, // RLWIMI |
995 | 0 | 1384140457U, // RLWIMI8 |
996 | 0 | 1384137461U, // RLWIMI8o |
997 | 0 | 1384137461U, // RLWIMIo |
998 | 0 | 20802U, // RLWINM |
999 | 0 | 20802U, // RLWINM8 |
1000 | 0 | 17261U, // RLWINM8o |
1001 | 0 | 17261U, // RLWINMo |
1002 | 0 | 20810U, // RLWNM |
1003 | 0 | 20810U, // RLWNM8 |
1004 | 0 | 17270U, // RLWNM8o |
1005 | 0 | 17270U, // RLWNMo |
1006 | 0 | 20043U, // ROTRDI |
1007 | 0 | 17105U, // ROTRDIo |
1008 | 0 | 20391U, // ROTRWI |
1009 | 0 | 17205U, // ROTRWIo |
1010 | 0 | 10205U, // ReadTB |
1011 | 0 | 281210U, // SC |
1012 | 0 | 9649U, // SELECT_CC_F4 |
1013 | 0 | 9881U, // SELECT_CC_F8 |
1014 | 0 | 9674U, // SELECT_CC_I4 |
1015 | 0 | 9926U, // SELECT_CC_I8 |
1016 | 0 | 10223U, // SELECT_CC_QBRC |
1017 | 0 | 10252U, // SELECT_CC_QFRC |
1018 | 0 | 10341U, // SELECT_CC_QSRC |
1019 | 0 | 10312U, // SELECT_CC_VRRC |
1020 | 0 | 10281U, // SELECT_CC_VSFRC |
1021 | 0 | 10370U, // SELECT_CC_VSRC |
1022 | 0 | 9663U, // SELECT_F4 |
1023 | 0 | 9895U, // SELECT_F8 |
1024 | 0 | 9688U, // SELECT_I4 |
1025 | 0 | 10059U, // SELECT_I8 |
1026 | 0 | 10239U, // SELECT_QBRC |
1027 | 0 | 10268U, // SELECT_QFRC |
1028 | 0 | 10357U, // SELECT_QSRC |
1029 | 0 | 10328U, // SELECT_VRRC |
1030 | 0 | 10298U, // SELECT_VSFRC |
1031 | 0 | 10386U, // SELECT_VSRC |
1032 | 0 | 10761U, // SLBIA |
1033 | 0 | 281604U, // SLBIE |
1034 | 0 | 268454876U, // SLBMFEE |
1035 | 0 | 268454959U, // SLBMTE |
1036 | 0 | 19244U, // SLD |
1037 | 0 | 19996U, // SLDI |
1038 | 0 | 17064U, // SLDIo |
1039 | 0 | 16856U, // SLDo |
1040 | 0 | 24034U, // SLW |
1041 | 0 | 24034U, // SLW8 |
1042 | 0 | 17699U, // SLW8o |
1043 | 0 | 20338U, // SLWI |
1044 | 0 | 17162U, // SLWIo |
1045 | 0 | 17699U, // SLWo |
1046 | 0 | 10560U, // SPILL_CR |
1047 | 0 | 10668U, // SPILL_CRBIT |
1048 | 0 | 10445U, // SPILL_VRSAVE |
1049 | 0 | 19084U, // SRAD |
1050 | 0 | 19971U, // SRADI |
1051 | 0 | 17052U, // SRADIo |
1052 | 0 | 16793U, // SRADo |
1053 | 0 | 23896U, // SRAW |
1054 | 0 | 20302U, // SRAWI |
1055 | 0 | 17150U, // SRAWIo |
1056 | 0 | 17668U, // SRAWo |
1057 | 0 | 19305U, // SRD |
1058 | 0 | 20037U, // SRDI |
1059 | 0 | 17098U, // SRDIo |
1060 | 0 | 16869U, // SRDo |
1061 | 0 | 24265U, // SRW |
1062 | 0 | 24265U, // SRW8 |
1063 | 0 | 17705U, // SRW8o |
1064 | 0 | 20385U, // SRWI |
1065 | 0 | 17198U, // SRWIo |
1066 | 0 | 17705U, // SRWo |
1067 | 0 | 58739088U, // STB |
1068 | 0 | 58739088U, // STB8 |
1069 | 0 | 24731U, // STBCIX |
1070 | 0 | 84056899U, // STBU |
1071 | 0 | 84056899U, // STBU8 |
1072 | 0 | 92447214U, // STBUX |
1073 | 0 | 92447214U, // STBUX8 |
1074 | 0 | 285237236U, // STBX |
1075 | 0 | 285237236U, // STBX8 |
1076 | 0 | 58739608U, // STD |
1077 | 0 | 285237532U, // STDBRX |
1078 | 0 | 24746U, // STDCIX |
1079 | 0 | 285230440U, // STDCX |
1080 | 0 | 84056951U, // STDU |
1081 | 0 | 92447267U, // STDUX |
1082 | 0 | 285237330U, // STDX |
1083 | 0 | 58739441U, // STFD |
1084 | 0 | 84056911U, // STFDU |
1085 | 0 | 92447253U, // STFDUX |
1086 | 0 | 285237288U, // STFDX |
1087 | 0 | 285237939U, // STFIWX |
1088 | 0 | 58743039U, // STFS |
1089 | 0 | 84057001U, // STFSU |
1090 | 0 | 92447330U, // STFSUX |
1091 | 0 | 285237621U, // STFSX |
1092 | 0 | 58740113U, // STH |
1093 | 0 | 58740113U, // STH8 |
1094 | 0 | 285237547U, // STHBRX |
1095 | 0 | 24754U, // STHCIX |
1096 | 0 | 84056964U, // STHU |
1097 | 0 | 84056964U, // STHU8 |
1098 | 0 | 92447281U, // STHUX |
1099 | 0 | 92447281U, // STHUX8 |
1100 | 0 | 285237397U, // STHX |
1101 | 0 | 285237397U, // STHX8 |
1102 | 0 | 58744300U, // STMW |
1103 | 0 | 20413U, // STSWI |
1104 | 0 | 285237228U, // STVEBX |
1105 | 0 | 285237389U, // STVEHX |
1106 | 0 | 285237929U, // STVEWX |
1107 | 0 | 285237899U, // STVX |
1108 | 0 | 285233300U, // STVXL |
1109 | 0 | 58744632U, // STW |
1110 | 0 | 58744632U, // STW8 |
1111 | 0 | 285237562U, // STWBRX |
1112 | 0 | 24762U, // STWCIX |
1113 | 0 | 285230448U, // STWCX |
1114 | 0 | 84057054U, // STWU |
1115 | 0 | 84057054U, // STWU8 |
1116 | 0 | 92447338U, // STWUX |
1117 | 0 | 92447338U, // STWUX8 |
1118 | 0 | 285237947U, // STWX |
1119 | 0 | 285237947U, // STWX8 |
1120 | 0 | 285237322U, // STXSDX |
1121 | 0 | 285237164U, // STXVD2X |
1122 | 0 | 285237181U, // STXVW4X |
1123 | 0 | 19559U, // SUBF |
1124 | 0 | 19559U, // SUBF8 |
1125 | 0 | 16989U, // SUBF8o |
1126 | 0 | 18968U, // SUBFC |
1127 | 0 | 18968U, // SUBFC8 |
1128 | 0 | 16755U, // SUBFC8o |
1129 | 0 | 16755U, // SUBFCo |
1130 | 0 | 19436U, // SUBFE |
1131 | 0 | 19436U, // SUBFE8 |
1132 | 0 | 16931U, // SUBFE8o |
1133 | 0 | 16931U, // SUBFEo |
1134 | 0 | 18996U, // SUBFIC |
1135 | 0 | 18996U, // SUBFIC8 |
1136 | 0 | 268454937U, // SUBFME |
1137 | 0 | 268454937U, // SUBFME8 |
1138 | 0 | 268452403U, // SUBFME8o |
1139 | 0 | 268452403U, // SUBFMEo |
1140 | 0 | 268455001U, // SUBFZE |
1141 | 0 | 268455001U, // SUBFZE8 |
1142 | 0 | 268452436U, // SUBFZE8o |
1143 | 0 | 268452436U, // SUBFZEo |
1144 | 0 | 16989U, // SUBFo |
1145 | 0 | 19943U, // SUBI |
1146 | 0 | 18975U, // SUBIC |
1147 | 0 | 16763U, // SUBICo |
1148 | 0 | 22878U, // SUBIS |
1149 | 0 | 281182U, // SYNC |
1150 | 0 | 313588U, // TAILB |
1151 | 0 | 313588U, // TAILB8 |
1152 | 0 | 329423U, // TAILBA |
1153 | 0 | 329423U, // TAILBA8 |
1154 | 0 | 10917U, // TAILBCTR |
1155 | 0 | 10917U, // TAILBCTR8 |
1156 | 0 | 269026886U, // TCRETURNai |
1157 | 0 | 269026793U, // TCRETURNai8 |
1158 | 0 | 269011582U, // TCRETURNdi |
1159 | 0 | 269010423U, // TCRETURNdi8 |
1160 | 0 | 268981990U, // TCRETURNri |
1161 | 0 | 268977669U, // TCRETURNri8 |
1162 | 0 | 150420U, // TD |
1163 | 0 | 151131U, // TDI |
1164 | 0 | 10767U, // TLBIA |
1165 | 0 | 4361227U, // TLBIE |
1166 | 0 | 282693U, // TLBIEL |
1167 | 0 | 268459980U, // TLBIVAX |
1168 | 0 | 281360U, // TLBLD |
1169 | 0 | 282259U, // TLBLI |
1170 | 0 | 10815U, // TLBRE |
1171 | 0 | 19489U, // TLBRE2 |
1172 | 0 | 268460354U, // TLBSX |
1173 | 0 | 24898U, // TLBSX2 |
1174 | 0 | 17784U, // TLBSX2D |
1175 | 0 | 10775U, // TLBSYNC |
1176 | 0 | 10821U, // TLBWE |
1177 | 0 | 19522U, // TLBWE2 |
1178 | 0 | 10891U, // TRAP |
1179 | 0 | 155425U, // TW |
1180 | 0 | 151492U, // TWI |
1181 | 0 | 268453395U, // UPDATE_VRSAVE |
1182 | 0 | 10537U, // UpdateGBR |
1183 | 0 | 24390U, // VADDCUW |
1184 | 0 | 21753U, // VADDFP |
1185 | 0 | 22514U, // VADDSBS |
1186 | 0 | 22831U, // VADDSHS |
1187 | 0 | 23073U, // VADDSWS |
1188 | 0 | 20674U, // VADDUBM |
1189 | 0 | 22542U, // VADDUBS |
1190 | 0 | 20702U, // VADDUDM |
1191 | 0 | 20741U, // VADDUHM |
1192 | 0 | 22859U, // VADDUHS |
1193 | 0 | 20860U, // VADDUWM |
1194 | 0 | 23100U, // VADDUWS |
1195 | 0 | 19290U, // VAND |
1196 | 0 | 18961U, // VANDC |
1197 | 0 | 18728U, // VAVGSB |
1198 | 0 | 19759U, // VAVGSH |
1199 | 0 | 24279U, // VAVGSW |
1200 | 0 | 18846U, // VAVGUB |
1201 | 0 | 19871U, // VAVGUH |
1202 | 0 | 24408U, // VAVGUW |
1203 | 0 | 1652580708U, // VCFSX |
1204 | 0 | 1879073124U, // VCFSX_0 |
1205 | 0 | 1652580906U, // VCFUX |
1206 | 0 | 1879073322U, // VCFUX_0 |
1207 | 0 | 268454382U, // VCLZB |
1208 | 0 | 268454855U, // VCLZD |
1209 | 0 | 268455380U, // VCLZH |
1210 | 0 | 268459923U, // VCLZW |
1211 | 0 | 21717U, // VCMPBFP |
1212 | 0 | 17330U, // VCMPBFPo |
1213 | 0 | 21816U, // VCMPEQFP |
1214 | 0 | 17351U, // VCMPEQFPo |
1215 | 0 | 18871U, // VCMPEQUB |
1216 | 0 | 16695U, // VCMPEQUBo |
1217 | 0 | 19365U, // VCMPEQUD |
1218 | 0 | 16886U, // VCMPEQUDo |
1219 | 0 | 19896U, // VCMPEQUH |
1220 | 0 | 17030U, // VCMPEQUHo |
1221 | 0 | 24433U, // VCMPEQUW |
1222 | 0 | 17730U, // VCMPEQUWo |
1223 | 0 | 21770U, // VCMPGEFP |
1224 | 0 | 17340U, // VCMPGEFPo |
1225 | 0 | 21826U, // VCMPGTFP |
1226 | 0 | 17362U, // VCMPGTFPo |
1227 | 0 | 18781U, // VCMPGTSB |
1228 | 0 | 16676U, // VCMPGTSBo |
1229 | 0 | 19324U, // VCMPGTSD |
1230 | 0 | 16875U, // VCMPGTSDo |
1231 | 0 | 19812U, // VCMPGTSH |
1232 | 0 | 17011U, // VCMPGTSHo |
1233 | 0 | 24324U, // VCMPGTSW |
1234 | 0 | 17711U, // VCMPGTSWo |
1235 | 0 | 18908U, // VCMPGTUB |
1236 | 0 | 16730U, // VCMPGTUBo |
1237 | 0 | 19375U, // VCMPGTUD |
1238 | 0 | 16897U, // VCMPGTUDo |
1239 | 0 | 19906U, // VCMPGTUH |
1240 | 0 | 17041U, // VCMPGTUHo |
1241 | 0 | 24443U, // VCMPGTUW |
1242 | 0 | 17741U, // VCMPGTUWo |
1243 | 0 | 1652578966U, // VCTSXS |
1244 | 0 | 1879071382U, // VCTSXS_0 |
1245 | 0 | 1652578974U, // VCTUXS |
1246 | 0 | 1879071390U, // VCTUXS_0 |
1247 | 0 | 23573U, // VEQV |
1248 | 0 | 268457243U, // VEXPTEFP |
1249 | 0 | 268457217U, // VLOGEFP |
1250 | 0 | 21744U, // VMADDFP |
1251 | 0 | 21836U, // VMAXFP |
1252 | 0 | 18800U, // VMAXSB |
1253 | 0 | 19334U, // VMAXSD |
1254 | 0 | 19831U, // VMAXSH |
1255 | 0 | 24341U, // VMAXSW |
1256 | 0 | 18918U, // VMAXUB |
1257 | 0 | 19385U, // VMAXUD |
1258 | 0 | 19916U, // VMAXUH |
1259 | 0 | 24453U, // VMAXUW |
1260 | 0 | 22808U, // VMHADDSHS |
1261 | 0 | 22819U, // VMHRADDSHS |
1262 | 0 | 19357U, // VMIDUD |
1263 | 0 | 21808U, // VMINFP |
1264 | 0 | 18764U, // VMINSB |
1265 | 0 | 19316U, // VMINSD |
1266 | 0 | 19795U, // VMINSH |
1267 | 0 | 24307U, // VMINSW |
1268 | 0 | 18854U, // VMINUB |
1269 | 0 | 19879U, // VMINUH |
1270 | 0 | 24416U, // VMINUW |
1271 | 0 | 20730U, // VMLADDUHM |
1272 | 0 | 18679U, // VMRGHB |
1273 | 0 | 19716U, // VMRGHH |
1274 | 0 | 23952U, // VMRGHW |
1275 | 0 | 18687U, // VMRGLB |
1276 | 0 | 19724U, // VMRGLH |
1277 | 0 | 23994U, // VMRGLW |
1278 | 0 | 20655U, // VMSUMMBM |
1279 | 0 | 20711U, // VMSUMSHM |
1280 | 0 | 22840U, // VMSUMSHS |
1281 | 0 | 20683U, // VMSUMUBM |
1282 | 0 | 20750U, // VMSUMUHM |
1283 | 0 | 22868U, // VMSUMUHS |
1284 | 0 | 18719U, // VMULESB |
1285 | 0 | 19750U, // VMULESH |
1286 | 0 | 24270U, // VMULESW |
1287 | 0 | 18837U, // VMULEUB |
1288 | 0 | 19862U, // VMULEUH |
1289 | 0 | 24399U, // VMULEUW |
1290 | 0 | 18772U, // VMULOSB |
1291 | 0 | 19803U, // VMULOSH |
1292 | 0 | 24315U, // VMULOSW |
1293 | 0 | 18862U, // VMULOUB |
1294 | 0 | 19887U, // VMULOUH |
1295 | 0 | 24424U, // VMULOUW |
1296 | 0 | 20869U, // VMULUWM |
1297 | 0 | 19275U, // VNAND |
1298 | 0 | 21726U, // VNMSUBFP |
1299 | 0 | 22364U, // VNOR |
1300 | 0 | 22377U, // VOR |
1301 | 0 | 19060U, // VORC |
1302 | 0 | 20826U, // VPERM |
1303 | 0 | 24823U, // VPKPX |
1304 | 0 | 22946U, // VPKSHSS |
1305 | 0 | 23003U, // VPKSHUS |
1306 | 0 | 22955U, // VPKSWSS |
1307 | 0 | 23021U, // VPKSWUS |
1308 | 0 | 20833U, // VPKUHUM |
1309 | 0 | 23012U, // VPKUHUS |
1310 | 0 | 20842U, // VPKUWUM |
1311 | 0 | 23030U, // VPKUWUS |
1312 | 0 | 268454278U, // VPOPCNTB |
1313 | 0 | 268454798U, // VPOPCNTD |
1314 | 0 | 268455303U, // VPOPCNTH |
1315 | 0 | 268459822U, // VPOPCNTW |
1316 | 0 | 268457236U, // VREFP |
1317 | 0 | 268456216U, // VRFIM |
1318 | 0 | 268456477U, // VRFIN |
1319 | 0 | 268457300U, // VRFIP |
1320 | 0 | 268460796U, // VRFIZ |
1321 | 0 | 18695U, // VRLB |
1322 | 0 | 19237U, // VRLD |
1323 | 0 | 19732U, // VRLH |
1324 | 0 | 24026U, // VRLW |
1325 | 0 | 268457253U, // VRSQRTEFP |
1326 | 0 | 20571U, // VSEL |
1327 | 0 | 20600U, // VSL |
1328 | 0 | 18701U, // VSLB |
1329 | 0 | 19243U, // VSLD |
1330 | 0 | 20243U, // VSLDOI |
1331 | 0 | 19738U, // VSLH |
1332 | 0 | 21085U, // VSLO |
1333 | 0 | 24033U, // VSLW |
1334 | 0 | 1652574590U, // VSPLTB |
1335 | 0 | 1652575615U, // VSPLTH |
1336 | 0 | 134236473U, // VSPLTISB |
1337 | 0 | 134237504U, // VSPLTISH |
1338 | 0 | 134242015U, // VSPLTISW |
1339 | 0 | 1652580125U, // VSPLTW |
1340 | 0 | 22445U, // VSR |
1341 | 0 | 18672U, // VSRAB |
1342 | 0 | 19083U, // VSRAD |
1343 | 0 | 19694U, // VSRAH |
1344 | 0 | 23895U, // VSRAW |
1345 | 0 | 18713U, // VSRB |
1346 | 0 | 19310U, // VSRD |
1347 | 0 | 19744U, // VSRH |
1348 | 0 | 21091U, // VSRO |
1349 | 0 | 24264U, // VSRW |
1350 | 0 | 24381U, // VSUBCUW |
1351 | 0 | 21736U, // VSUBFP |
1352 | 0 | 22505U, // VSUBSBS |
1353 | 0 | 22799U, // VSUBSHS |
1354 | 0 | 23064U, // VSUBSWS |
1355 | 0 | 20665U, // VSUBUBM |
1356 | 0 | 22533U, // VSUBUBS |
1357 | 0 | 20693U, // VSUBUDM |
1358 | 0 | 20721U, // VSUBUHM |
1359 | 0 | 22850U, // VSUBUHS |
1360 | 0 | 20851U, // VSUBUWM |
1361 | 0 | 23091U, // VSUBUWS |
1362 | 0 | 23054U, // VSUM2SWS |
1363 | 0 | 22495U, // VSUM4SBS |
1364 | 0 | 22789U, // VSUM4SHS |
1365 | 0 | 22523U, // VSUM4UBS |
1366 | 0 | 23082U, // VSUMSWS |
1367 | 0 | 268460270U, // VUPKHPX |
1368 | 0 | 268454192U, // VUPKHSB |
1369 | 0 | 268455223U, // VUPKHSH |
1370 | 0 | 268460286U, // VUPKLPX |
1371 | 0 | 268454211U, // VUPKLSB |
1372 | 0 | 268455242U, // VUPKLSH |
1373 | 0 | 22398U, // VXOR |
1374 | 0 | 33576830U, // V_SET0 |
1375 | 0 | 33576830U, // V_SET0B |
1376 | 0 | 33576830U, // V_SET0H |
1377 | 0 | 4480735U, // V_SETALLONES |
1378 | 0 | 4480735U, // V_SETALLONESB |
1379 | 0 | 4480735U, // V_SETALLONESH |
1380 | 0 | 285437U, // WAIT |
1381 | 0 | 281573U, // WRTEE |
1382 | 0 | 282208U, // WRTEEI |
1383 | 0 | 22385U, // XOR |
1384 | 0 | 22385U, // XOR8 |
1385 | 0 | 17452U, // XOR8o |
1386 | 0 | 20275U, // XORI |
1387 | 0 | 20275U, // XORI8 |
1388 | 0 | 22897U, // XORIS |
1389 | 0 | 22897U, // XORIS8 |
1390 | 0 | 17452U, // XORo |
1391 | 0 | 268457014U, // XSABSDP |
1392 | 0 | 21216U, // XSADDDP |
1393 | 0 | 21497U, // XSCMPODP |
1394 | 0 | 21629U, // XSCMPUDP |
1395 | 0 | 21457U, // XSCPSGNDP |
1396 | 0 | 268457543U, // XSCVDPSP |
1397 | 0 | 268458129U, // XSCVDPSXDS |
1398 | 0 | 268458574U, // XSCVDPSXWS |
1399 | 0 | 268458165U, // XSCVDPUXDS |
1400 | 0 | 268458610U, // XSCVDPUXWS |
1401 | 0 | 268456963U, // XSCVSPDP |
1402 | 0 | 268456690U, // XSCVSXDDP |
1403 | 0 | 268456712U, // XSCVUXDDP |
1404 | 0 | 21639U, // XSDIVDP |
1405 | 0 | 2189447864U, // XSMADDADP |
1406 | 0 | 2189448123U, // XSMADDMDP |
1407 | 0 | 21699U, // XSMAXDP |
1408 | 0 | 21479U, // XSMINDP |
1409 | 0 | 2189447818U, // XSMSUBADP |
1410 | 0 | 2189448077U, // XSMSUBMDP |
1411 | 0 | 21347U, // XSMULDP |
1412 | 0 | 268456994U, // XSNABSDP |
1413 | 0 | 268456785U, // XSNEGDP |
1414 | 0 | 2189447840U, // XSNMADDADP |
1415 | 0 | 2189448099U, // XSNMADDMDP |
1416 | 0 | 2189447794U, // XSNMSUBADP |
1417 | 0 | 2189448053U, // XSNMSUBMDP |
1418 | 0 | 268455707U, // XSRDPI |
1419 | 0 | 268454460U, // XSRDPIC |
1420 | 0 | 268456223U, // XSRDPIM |
1421 | 0 | 268457307U, // XSRDPIP |
1422 | 0 | 268460803U, // XSRDPIZ |
1423 | 0 | 268456745U, // XSREDP |
1424 | 0 | 268456761U, // XSRSQRTEDP |
1425 | 0 | 268457043U, // XSSQRTDP |
1426 | 0 | 21198U, // XSSUBDP |
1427 | 0 | 21648U, // XSTDIVDP |
1428 | 0 | 268457053U, // XSTSQRTDP |
1429 | 0 | 268457023U, // XVABSDP |
1430 | 0 | 268457592U, // XVABSSP |
1431 | 0 | 21225U, // XVADDDP |
1432 | 0 | 21941U, // XVADDSP |
1433 | 0 | 21527U, // XVCMPEQDP |
1434 | 0 | 17306U, // XVCMPEQDPo |
1435 | 0 | 22107U, // XVCMPEQSP |
1436 | 0 | 17392U, // XVCMPEQSPo |
1437 | 0 | 21278U, // XVCMPGEDP |
1438 | 0 | 17294U, // XVCMPGEDPo |
1439 | 0 | 21972U, // XVCMPGESP |
1440 | 0 | 17380U, // XVCMPGESPo |
1441 | 0 | 21576U, // XVCMPGTDP |
1442 | 0 | 17318U, // XVCMPGTDPo |
1443 | 0 | 22145U, // XVCMPGTSP |
1444 | 0 | 17411U, // XVCMPGTSPo |
1445 | 0 | 21468U, // XVCPSGNDP |
1446 | 0 | 22067U, // XVCPSGNSP |
1447 | 0 | 268457553U, // XVCVDPSP |
1448 | 0 | 268458141U, // XVCVDPSXDS |
1449 | 0 | 268458586U, // XVCVDPSXWS |
1450 | 0 | 268458177U, // XVCVDPUXDS |
1451 | 0 | 268458622U, // XVCVDPUXWS |
1452 | 0 | 268456973U, // XVCVSPDP |
1453 | 0 | 268458153U, // XVCVSPSXDS |
1454 | 0 | 268458598U, // XVCVSPSXWS |
1455 | 0 | 268458189U, // XVCVSPUXDS |
1456 | 0 | 268458634U, // XVCVSPUXWS |
1457 | 0 | 268456701U, // XVCVSXDDP |
1458 | 0 | 268457406U, // XVCVSXDSP |
1459 | 0 | 268457133U, // XVCVSXWDP |
1460 | 0 | 268457652U, // XVCVSXWSP |
1461 | 0 | 268456723U, // XVCVUXDDP |
1462 | 0 | 268457417U, // XVCVUXDSP |
1463 | 0 | 268457144U, // XVCVUXWDP |
1464 | 0 | 268457663U, // XVCVUXWSP |
1465 | 0 | 21668U, // XVDIVDP |
1466 | 0 | 22187U, // XVDIVSP |
1467 | 0 | 2189447875U, // XVMADDADP |
1468 | 0 | 2189448609U, // XVMADDASP |
1469 | 0 | 2189448134U, // XVMADDMDP |
1470 | 0 | 2189448744U, // XVMADDMSP |
1471 | 0 | 21708U, // XVMAXDP |
1472 | 0 | 22218U, // XVMAXSP |
1473 | 0 | 21488U, // XVMINDP |
1474 | 0 | 22078U, // XVMINSP |
1475 | 0 | 2189447829U, // XVMSUBADP |
1476 | 0 | 2189448586U, // XVMSUBASP |
1477 | 0 | 2189448088U, // XVMSUBMDP |
1478 | 0 | 2189448721U, // XVMSUBMSP |
1479 | 0 | 21356U, // XVMULDP |
1480 | 0 | 22012U, // XVMULSP |
1481 | 0 | 268457004U, // XVNABSDP |
1482 | 0 | 268457582U, // XVNABSSP |
1483 | 0 | 268456794U, // XVNEGDP |
1484 | 0 | 268457459U, // XVNEGSP |
1485 | 0 | 2189447852U, // XVNMADDADP |
1486 | 0 | 2189448597U, // XVNMADDASP |
1487 | 0 | 2189448111U, // XVNMADDMDP |
1488 | 0 | 2189448732U, // XVNMADDMSP |
1489 | 0 | 2189447806U, // XVNMSUBADP |
1490 | 0 | 2189448574U, // XVNMSUBASP |
1491 | 0 | 2189448065U, // XVNMSUBMDP |
1492 | 0 | 2189448709U, // XVNMSUBMSP |
1493 | 0 | 268455715U, // XVRDPI |
1494 | 0 | 268454469U, // XVRDPIC |
1495 | 0 | 268456232U, // XVRDPIM |
1496 | 0 | 268457316U, // XVRDPIP |
1497 | 0 | 268460812U, // XVRDPIZ |
1498 | 0 | 268456753U, // XVREDP |
1499 | 0 | 268457439U, // XVRESP |
1500 | 0 | 268455723U, // XVRSPI |
1501 | 0 | 268454478U, // XVRSPIC |
1502 | 0 | 268456241U, // XVRSPIM |
1503 | 0 | 268457325U, // XVRSPIP |
1504 | 0 | 268460821U, // XVRSPIZ |
1505 | 0 | 268456773U, // XVRSQRTEDP |
1506 | 0 | 268457447U, // XVRSQRTESP |
1507 | 0 | 268457075U, // XVSQRTDP |
1508 | 0 | 268457623U, // XVSQRTSP |
1509 | 0 | 21207U, // XVSUBDP |
1510 | 0 | 21932U, // XVSUBSP |
1511 | 0 | 21658U, // XVTDIVDP |
1512 | 0 | 22177U, // XVTDIVSP |
1513 | 0 | 268457064U, // XVTSQRTDP |
1514 | 0 | 268457612U, // XVTSQRTSP |
1515 | 0 | 19249U, // XXLAND |
1516 | 0 | 18943U, // XXLANDC |
1517 | 0 | 23557U, // XXLEQV |
1518 | 0 | 19257U, // XXLNAND |
1519 | 0 | 22348U, // XXLNOR |
1520 | 0 | 22341U, // XXLOR |
1521 | 0 | 19044U, // XXLORC |
1522 | 0 | 22341U, // XXLORf |
1523 | 0 | 22382U, // XXLXOR |
1524 | 0 | 23960U, // XXMRGHW |
1525 | 0 | 24002U, // XXMRGLW |
1526 | 0 | 20010U, // XXPERMDI |
1527 | 0 | 20577U, // XXSEL |
1528 | 0 | 20309U, // XXSLDWI |
1529 | 0 | 24357U, // XXSPLTW |
1530 | 0 | 150005U, // gBC |
1531 | 0 | 149203U, // gBCA |
1532 | 0 | 153522U, // gBCCTR |
1533 | 0 | 151663U, // gBCCTRL |
1534 | 0 | 151601U, // gBCL |
1535 | 0 | 149497U, // gBCLA |
1536 | 0 | 153388U, // gBCLR |
1537 | 0 | 151656U, // gBCLRL |
1538 | 0 | 0U |
1539 | 0 | }; |
1540 | |
|
1541 | 0 | static const uint16_t OpInfo2[] = { |
1542 | 0 | 0U, // PHI |
1543 | 0 | 0U, // INLINEASM |
1544 | 0 | 0U, // CFI_INSTRUCTION |
1545 | 0 | 0U, // EH_LABEL |
1546 | 0 | 0U, // GC_LABEL |
1547 | 0 | 0U, // KILL |
1548 | 0 | 0U, // EXTRACT_SUBREG |
1549 | 0 | 0U, // INSERT_SUBREG |
1550 | 0 | 0U, // IMPLICIT_DEF |
1551 | 0 | 0U, // SUBREG_TO_REG |
1552 | 0 | 0U, // COPY_TO_REGCLASS |
1553 | 0 | 0U, // DBG_VALUE |
1554 | 0 | 0U, // REG_SEQUENCE |
1555 | 0 | 0U, // COPY |
1556 | 0 | 0U, // BUNDLE |
1557 | 0 | 0U, // LIFETIME_START |
1558 | 0 | 0U, // LIFETIME_END |
1559 | 0 | 0U, // STACKMAP |
1560 | 0 | 0U, // PATCHPOINT |
1561 | 0 | 0U, // LOAD_STACK_GUARD |
1562 | 0 | 0U, // STATEPOINT |
1563 | 0 | 0U, // FRAME_ALLOC |
1564 | 0 | 0U, // ADD4 |
1565 | 0 | 0U, // ADD4TLS |
1566 | 0 | 0U, // ADD4o |
1567 | 0 | 0U, // ADD8 |
1568 | 0 | 0U, // ADD8TLS |
1569 | 0 | 0U, // ADD8TLS_ |
1570 | 0 | 0U, // ADD8o |
1571 | 0 | 0U, // ADDC |
1572 | 0 | 0U, // ADDC8 |
1573 | 0 | 0U, // ADDC8o |
1574 | 0 | 0U, // ADDCo |
1575 | 0 | 0U, // ADDE |
1576 | 0 | 0U, // ADDE8 |
1577 | 0 | 0U, // ADDE8o |
1578 | 0 | 0U, // ADDEo |
1579 | 0 | 1U, // ADDI |
1580 | 0 | 1U, // ADDI8 |
1581 | 0 | 1U, // ADDIC |
1582 | 0 | 1U, // ADDIC8 |
1583 | 0 | 1U, // ADDICo |
1584 | 0 | 1U, // ADDIS |
1585 | 0 | 1U, // ADDIS8 |
1586 | 0 | 0U, // ADDISdtprelHA |
1587 | 0 | 0U, // ADDISdtprelHA32 |
1588 | 0 | 0U, // ADDISgotTprelHA |
1589 | 0 | 0U, // ADDIStlsgdHA |
1590 | 0 | 0U, // ADDIStlsldHA |
1591 | 0 | 0U, // ADDIStocHA |
1592 | 0 | 0U, // ADDIdtprelL |
1593 | 0 | 0U, // ADDIdtprelL32 |
1594 | 0 | 0U, // ADDItlsgdL |
1595 | 0 | 0U, // ADDItlsgdL32 |
1596 | 0 | 0U, // ADDItlsgdLADDR |
1597 | 0 | 0U, // ADDItlsgdLADDR32 |
1598 | 0 | 0U, // ADDItlsldL |
1599 | 0 | 0U, // ADDItlsldL32 |
1600 | 0 | 0U, // ADDItlsldLADDR |
1601 | 0 | 0U, // ADDItlsldLADDR32 |
1602 | 0 | 0U, // ADDItocL |
1603 | 0 | 0U, // ADDME |
1604 | 0 | 0U, // ADDME8 |
1605 | 0 | 0U, // ADDME8o |
1606 | 0 | 0U, // ADDMEo |
1607 | 0 | 0U, // ADDZE |
1608 | 0 | 0U, // ADDZE8 |
1609 | 0 | 0U, // ADDZE8o |
1610 | 0 | 0U, // ADDZEo |
1611 | 0 | 0U, // ADJCALLSTACKDOWN |
1612 | 0 | 0U, // ADJCALLSTACKUP |
1613 | 0 | 0U, // AND |
1614 | 0 | 0U, // AND8 |
1615 | 0 | 0U, // AND8o |
1616 | 0 | 0U, // ANDC |
1617 | 0 | 0U, // ANDC8 |
1618 | 0 | 0U, // ANDC8o |
1619 | 0 | 0U, // ANDCo |
1620 | 0 | 2U, // ANDISo |
1621 | 0 | 2U, // ANDISo8 |
1622 | 0 | 2U, // ANDIo |
1623 | 0 | 2U, // ANDIo8 |
1624 | 0 | 0U, // ANDIo_1_EQ_BIT |
1625 | 0 | 0U, // ANDIo_1_EQ_BIT8 |
1626 | 0 | 0U, // ANDIo_1_GT_BIT |
1627 | 0 | 0U, // ANDIo_1_GT_BIT8 |
1628 | 0 | 0U, // ANDo |
1629 | 0 | 0U, // ATOMIC_CMP_SWAP_I16 |
1630 | 0 | 0U, // ATOMIC_CMP_SWAP_I32 |
1631 | 0 | 0U, // ATOMIC_CMP_SWAP_I64 |
1632 | 0 | 0U, // ATOMIC_CMP_SWAP_I8 |
1633 | 0 | 0U, // ATOMIC_LOAD_ADD_I16 |
1634 | 0 | 0U, // ATOMIC_LOAD_ADD_I32 |
1635 | 0 | 0U, // ATOMIC_LOAD_ADD_I64 |
1636 | 0 | 0U, // ATOMIC_LOAD_ADD_I8 |
1637 | 0 | 0U, // ATOMIC_LOAD_AND_I16 |
1638 | 0 | 0U, // ATOMIC_LOAD_AND_I32 |
1639 | 0 | 0U, // ATOMIC_LOAD_AND_I64 |
1640 | 0 | 0U, // ATOMIC_LOAD_AND_I8 |
1641 | 0 | 0U, // ATOMIC_LOAD_NAND_I16 |
1642 | 0 | 0U, // ATOMIC_LOAD_NAND_I32 |
1643 | 0 | 0U, // ATOMIC_LOAD_NAND_I64 |
1644 | 0 | 0U, // ATOMIC_LOAD_NAND_I8 |
1645 | 0 | 0U, // ATOMIC_LOAD_OR_I16 |
1646 | 0 | 0U, // ATOMIC_LOAD_OR_I32 |
1647 | 0 | 0U, // ATOMIC_LOAD_OR_I64 |
1648 | 0 | 0U, // ATOMIC_LOAD_OR_I8 |
1649 | 0 | 0U, // ATOMIC_LOAD_SUB_I16 |
1650 | 0 | 0U, // ATOMIC_LOAD_SUB_I32 |
1651 | 0 | 0U, // ATOMIC_LOAD_SUB_I64 |
1652 | 0 | 0U, // ATOMIC_LOAD_SUB_I8 |
1653 | 0 | 0U, // ATOMIC_LOAD_XOR_I16 |
1654 | 0 | 0U, // ATOMIC_LOAD_XOR_I32 |
1655 | 0 | 0U, // ATOMIC_LOAD_XOR_I64 |
1656 | 0 | 0U, // ATOMIC_LOAD_XOR_I8 |
1657 | 0 | 0U, // ATOMIC_SWAP_I16 |
1658 | 0 | 0U, // ATOMIC_SWAP_I32 |
1659 | 0 | 0U, // ATOMIC_SWAP_I64 |
1660 | 0 | 0U, // ATOMIC_SWAP_I8 |
1661 | 0 | 0U, // ATTN |
1662 | 0 | 0U, // B |
1663 | 0 | 0U, // BA |
1664 | 0 | 0U, // BC |
1665 | 0 | 0U, // BCC |
1666 | 0 | 0U, // BCCA |
1667 | 0 | 0U, // BCCCTR |
1668 | 0 | 0U, // BCCCTR8 |
1669 | 0 | 0U, // BCCCTRL |
1670 | 0 | 0U, // BCCCTRL8 |
1671 | 0 | 0U, // BCCL |
1672 | 0 | 0U, // BCCLA |
1673 | 0 | 0U, // BCCLR |
1674 | 0 | 0U, // BCCLRL |
1675 | 0 | 0U, // BCCTR |
1676 | 0 | 0U, // BCCTR8 |
1677 | 0 | 0U, // BCCTR8n |
1678 | 0 | 0U, // BCCTRL |
1679 | 0 | 0U, // BCCTRL8 |
1680 | 0 | 0U, // BCCTRL8n |
1681 | 0 | 0U, // BCCTRLn |
1682 | 0 | 0U, // BCCTRn |
1683 | 0 | 0U, // BCL |
1684 | 0 | 0U, // BCLR |
1685 | 0 | 0U, // BCLRL |
1686 | 0 | 0U, // BCLRLn |
1687 | 0 | 0U, // BCLRn |
1688 | 0 | 0U, // BCLalways |
1689 | 0 | 0U, // BCLn |
1690 | 0 | 0U, // BCTR |
1691 | 0 | 0U, // BCTR8 |
1692 | 0 | 0U, // BCTRL |
1693 | 0 | 0U, // BCTRL8 |
1694 | 0 | 0U, // BCTRL8_LDinto_toc |
1695 | 0 | 0U, // BCn |
1696 | 0 | 0U, // BDNZ |
1697 | 0 | 0U, // BDNZ8 |
1698 | 0 | 0U, // BDNZA |
1699 | 0 | 0U, // BDNZAm |
1700 | 0 | 0U, // BDNZAp |
1701 | 0 | 0U, // BDNZL |
1702 | 0 | 0U, // BDNZLA |
1703 | 0 | 0U, // BDNZLAm |
1704 | 0 | 0U, // BDNZLAp |
1705 | 0 | 0U, // BDNZLR |
1706 | 0 | 0U, // BDNZLR8 |
1707 | 0 | 0U, // BDNZLRL |
1708 | 0 | 0U, // BDNZLRLm |
1709 | 0 | 0U, // BDNZLRLp |
1710 | 0 | 0U, // BDNZLRm |
1711 | 0 | 0U, // BDNZLRp |
1712 | 0 | 0U, // BDNZLm |
1713 | 0 | 0U, // BDNZLp |
1714 | 0 | 0U, // BDNZm |
1715 | 0 | 0U, // BDNZp |
1716 | 0 | 0U, // BDZ |
1717 | 0 | 0U, // BDZ8 |
1718 | 0 | 0U, // BDZA |
1719 | 0 | 0U, // BDZAm |
1720 | 0 | 0U, // BDZAp |
1721 | 0 | 0U, // BDZL |
1722 | 0 | 0U, // BDZLA |
1723 | 0 | 0U, // BDZLAm |
1724 | 0 | 0U, // BDZLAp |
1725 | 0 | 0U, // BDZLR |
1726 | 0 | 0U, // BDZLR8 |
1727 | 0 | 0U, // BDZLRL |
1728 | 0 | 0U, // BDZLRLm |
1729 | 0 | 0U, // BDZLRLp |
1730 | 0 | 0U, // BDZLRm |
1731 | 0 | 0U, // BDZLRp |
1732 | 0 | 0U, // BDZLm |
1733 | 0 | 0U, // BDZLp |
1734 | 0 | 0U, // BDZm |
1735 | 0 | 0U, // BDZp |
1736 | 0 | 0U, // BL |
1737 | 0 | 0U, // BL8 |
1738 | 0 | 0U, // BL8_NOP |
1739 | 0 | 0U, // BL8_NOP_TLS |
1740 | 0 | 0U, // BL8_TLS |
1741 | 0 | 0U, // BL8_TLS_ |
1742 | 0 | 0U, // BLA |
1743 | 0 | 0U, // BLA8 |
1744 | 0 | 0U, // BLA8_NOP |
1745 | 0 | 0U, // BLR |
1746 | 0 | 0U, // BLR8 |
1747 | 0 | 0U, // BLRL |
1748 | 0 | 0U, // BL_TLS |
1749 | 0 | 0U, // BRINC |
1750 | 0 | 19U, // CLRLSLDI |
1751 | 0 | 19U, // CLRLSLDIo |
1752 | 0 | 52U, // CLRLSLWI |
1753 | 0 | 52U, // CLRLSLWIo |
1754 | 0 | 3U, // CLRRDI |
1755 | 0 | 3U, // CLRRDIo |
1756 | 0 | 4U, // CLRRWI |
1757 | 0 | 4U, // CLRRWIo |
1758 | 0 | 0U, // CMPB |
1759 | 0 | 0U, // CMPB8 |
1760 | 0 | 0U, // CMPD |
1761 | 0 | 1U, // CMPDI |
1762 | 0 | 0U, // CMPLD |
1763 | 0 | 2U, // CMPLDI |
1764 | 0 | 0U, // CMPLW |
1765 | 0 | 2U, // CMPLWI |
1766 | 0 | 0U, // CMPW |
1767 | 0 | 1U, // CMPWI |
1768 | 0 | 0U, // CNTLZD |
1769 | 0 | 0U, // CNTLZDo |
1770 | 0 | 0U, // CNTLZW |
1771 | 0 | 0U, // CNTLZW8 |
1772 | 0 | 0U, // CNTLZW8o |
1773 | 0 | 0U, // CNTLZWo |
1774 | 0 | 0U, // CR6SET |
1775 | 0 | 0U, // CR6UNSET |
1776 | 0 | 0U, // CRAND |
1777 | 0 | 0U, // CRANDC |
1778 | 0 | 0U, // CREQV |
1779 | 0 | 0U, // CRNAND |
1780 | 0 | 0U, // CRNOR |
1781 | 0 | 0U, // CROR |
1782 | 0 | 0U, // CRORC |
1783 | 0 | 5U, // CRSET |
1784 | 0 | 5U, // CRUNSET |
1785 | 0 | 0U, // CRXOR |
1786 | 0 | 0U, // DCBA |
1787 | 0 | 0U, // DCBF |
1788 | 0 | 0U, // DCBI |
1789 | 0 | 0U, // DCBST |
1790 | 0 | 0U, // DCBT |
1791 | 0 | 0U, // DCBTST |
1792 | 0 | 0U, // DCBZ |
1793 | 0 | 0U, // DCBZL |
1794 | 0 | 0U, // DCCCI |
1795 | 0 | 0U, // DIVD |
1796 | 0 | 0U, // DIVDU |
1797 | 0 | 0U, // DIVDUo |
1798 | 0 | 0U, // DIVDo |
1799 | 0 | 0U, // DIVW |
1800 | 0 | 0U, // DIVWU |
1801 | 0 | 0U, // DIVWUo |
1802 | 0 | 0U, // DIVWo |
1803 | 0 | 0U, // DSS |
1804 | 0 | 0U, // DSSALL |
1805 | 0 | 0U, // DST |
1806 | 0 | 0U, // DST64 |
1807 | 0 | 0U, // DSTST |
1808 | 0 | 0U, // DSTST64 |
1809 | 0 | 0U, // DSTSTT |
1810 | 0 | 0U, // DSTSTT64 |
1811 | 0 | 0U, // DSTT |
1812 | 0 | 0U, // DSTT64 |
1813 | 0 | 0U, // DYNALLOC |
1814 | 0 | 0U, // DYNALLOC8 |
1815 | 0 | 0U, // EH_SjLj_LongJmp32 |
1816 | 0 | 0U, // EH_SjLj_LongJmp64 |
1817 | 0 | 0U, // EH_SjLj_SetJmp32 |
1818 | 0 | 0U, // EH_SjLj_SetJmp64 |
1819 | 0 | 0U, // EH_SjLj_Setup |
1820 | 0 | 0U, // EQV |
1821 | 0 | 0U, // EQV8 |
1822 | 0 | 0U, // EQV8o |
1823 | 0 | 0U, // EQVo |
1824 | 0 | 0U, // EVABS |
1825 | 0 | 0U, // EVADDIW |
1826 | 0 | 0U, // EVADDSMIAAW |
1827 | 0 | 0U, // EVADDSSIAAW |
1828 | 0 | 0U, // EVADDUMIAAW |
1829 | 0 | 0U, // EVADDUSIAAW |
1830 | 0 | 0U, // EVADDW |
1831 | 0 | 0U, // EVAND |
1832 | 0 | 0U, // EVANDC |
1833 | 0 | 0U, // EVCMPEQ |
1834 | 0 | 0U, // EVCMPGTS |
1835 | 0 | 0U, // EVCMPGTU |
1836 | 0 | 0U, // EVCMPLTS |
1837 | 0 | 0U, // EVCMPLTU |
1838 | 0 | 0U, // EVCNTLSW |
1839 | 0 | 0U, // EVCNTLZW |
1840 | 0 | 0U, // EVDIVWS |
1841 | 0 | 0U, // EVDIVWU |
1842 | 0 | 0U, // EVEQV |
1843 | 0 | 0U, // EVEXTSB |
1844 | 0 | 0U, // EVEXTSH |
1845 | 0 | 0U, // EVLDD |
1846 | 0 | 0U, // EVLDDX |
1847 | 0 | 0U, // EVLDH |
1848 | 0 | 0U, // EVLDHX |
1849 | 0 | 0U, // EVLDW |
1850 | 0 | 0U, // EVLDWX |
1851 | 0 | 0U, // EVLHHESPLAT |
1852 | 0 | 0U, // EVLHHESPLATX |
1853 | 0 | 0U, // EVLHHOSSPLAT |
1854 | 0 | 0U, // EVLHHOSSPLATX |
1855 | 0 | 0U, // EVLHHOUSPLAT |
1856 | 0 | 0U, // EVLHHOUSPLATX |
1857 | 0 | 0U, // EVLWHE |
1858 | 0 | 0U, // EVLWHEX |
1859 | 0 | 0U, // EVLWHOS |
1860 | 0 | 0U, // EVLWHOSX |
1861 | 0 | 0U, // EVLWHOU |
1862 | 0 | 0U, // EVLWHOUX |
1863 | 0 | 0U, // EVLWHSPLAT |
1864 | 0 | 0U, // EVLWHSPLATX |
1865 | 0 | 0U, // EVLWWSPLAT |
1866 | 0 | 0U, // EVLWWSPLATX |
1867 | 0 | 0U, // EVMERGEHI |
1868 | 0 | 0U, // EVMERGEHILO |
1869 | 0 | 0U, // EVMERGELO |
1870 | 0 | 0U, // EVMERGELOHI |
1871 | 0 | 0U, // EVMHEGSMFAA |
1872 | 0 | 0U, // EVMHEGSMFAN |
1873 | 0 | 0U, // EVMHEGSMIAA |
1874 | 0 | 0U, // EVMHEGSMIAN |
1875 | 0 | 0U, // EVMHEGUMIAA |
1876 | 0 | 0U, // EVMHEGUMIAN |
1877 | 0 | 0U, // EVMHESMF |
1878 | 0 | 0U, // EVMHESMFA |
1879 | 0 | 0U, // EVMHESMFAAW |
1880 | 0 | 0U, // EVMHESMFANW |
1881 | 0 | 0U, // EVMHESMI |
1882 | 0 | 0U, // EVMHESMIA |
1883 | 0 | 0U, // EVMHESMIAAW |
1884 | 0 | 0U, // EVMHESMIANW |
1885 | 0 | 0U, // EVMHESSF |
1886 | 0 | 0U, // EVMHESSFA |
1887 | 0 | 0U, // EVMHESSFAAW |
1888 | 0 | 0U, // EVMHESSFANW |
1889 | 0 | 0U, // EVMHESSIAAW |
1890 | 0 | 0U, // EVMHESSIANW |
1891 | 0 | 0U, // EVMHEUMI |
1892 | 0 | 0U, // EVMHEUMIA |
1893 | 0 | 0U, // EVMHEUMIAAW |
1894 | 0 | 0U, // EVMHEUMIANW |
1895 | 0 | 0U, // EVMHEUSIAAW |
1896 | 0 | 0U, // EVMHEUSIANW |
1897 | 0 | 0U, // EVMHOGSMFAA |
1898 | 0 | 0U, // EVMHOGSMFAN |
1899 | 0 | 0U, // EVMHOGSMIAA |
1900 | 0 | 0U, // EVMHOGSMIAN |
1901 | 0 | 0U, // EVMHOGUMIAA |
1902 | 0 | 0U, // EVMHOGUMIAN |
1903 | 0 | 0U, // EVMHOSMF |
1904 | 0 | 0U, // EVMHOSMFA |
1905 | 0 | 0U, // EVMHOSMFAAW |
1906 | 0 | 0U, // EVMHOSMFANW |
1907 | 0 | 0U, // EVMHOSMI |
1908 | 0 | 0U, // EVMHOSMIA |
1909 | 0 | 0U, // EVMHOSMIAAW |
1910 | 0 | 0U, // EVMHOSMIANW |
1911 | 0 | 0U, // EVMHOSSF |
1912 | 0 | 0U, // EVMHOSSFA |
1913 | 0 | 0U, // EVMHOSSFAAW |
1914 | 0 | 0U, // EVMHOSSFANW |
1915 | 0 | 0U, // EVMHOSSIAAW |
1916 | 0 | 0U, // EVMHOSSIANW |
1917 | 0 | 0U, // EVMHOUMI |
1918 | 0 | 0U, // EVMHOUMIA |
1919 | 0 | 0U, // EVMHOUMIAAW |
1920 | 0 | 0U, // EVMHOUMIANW |
1921 | 0 | 0U, // EVMHOUSIAAW |
1922 | 0 | 0U, // EVMHOUSIANW |
1923 | 0 | 0U, // EVMRA |
1924 | 0 | 0U, // EVMWHSMF |
1925 | 0 | 0U, // EVMWHSMFA |
1926 | 0 | 0U, // EVMWHSMI |
1927 | 0 | 0U, // EVMWHSMIA |
1928 | 0 | 0U, // EVMWHSSF |
1929 | 0 | 0U, // EVMWHSSFA |
1930 | 0 | 0U, // EVMWHUMI |
1931 | 0 | 0U, // EVMWHUMIA |
1932 | 0 | 0U, // EVMWLSMIAAW |
1933 | 0 | 0U, // EVMWLSMIANW |
1934 | 0 | 0U, // EVMWLSSIAAW |
1935 | 0 | 0U, // EVMWLSSIANW |
1936 | 0 | 0U, // EVMWLUMI |
1937 | 0 | 0U, // EVMWLUMIA |
1938 | 0 | 0U, // EVMWLUMIAAW |
1939 | 0 | 0U, // EVMWLUMIANW |
1940 | 0 | 0U, // EVMWLUSIAAW |
1941 | 0 | 0U, // EVMWLUSIANW |
1942 | 0 | 0U, // EVMWSMF |
1943 | 0 | 0U, // EVMWSMFA |
1944 | 0 | 0U, // EVMWSMFAA |
1945 | 0 | 0U, // EVMWSMFAN |
1946 | 0 | 0U, // EVMWSMI |
1947 | 0 | 0U, // EVMWSMIA |
1948 | 0 | 0U, // EVMWSMIAA |
1949 | 0 | 0U, // EVMWSMIAN |
1950 | 0 | 0U, // EVMWSSF |
1951 | 0 | 0U, // EVMWSSFA |
1952 | 0 | 0U, // EVMWSSFAA |
1953 | 0 | 0U, // EVMWSSFAN |
1954 | 0 | 0U, // EVMWUMI |
1955 | 0 | 0U, // EVMWUMIA |
1956 | 0 | 0U, // EVMWUMIAA |
1957 | 0 | 0U, // EVMWUMIAN |
1958 | 0 | 0U, // EVNAND |
1959 | 0 | 0U, // EVNEG |
1960 | 0 | 0U, // EVNOR |
1961 | 0 | 0U, // EVOR |
1962 | 0 | 0U, // EVORC |
1963 | 0 | 0U, // EVRLW |
1964 | 0 | 4U, // EVRLWI |
1965 | 0 | 0U, // EVRNDW |
1966 | 0 | 0U, // EVSLW |
1967 | 0 | 4U, // EVSLWI |
1968 | 0 | 0U, // EVSPLATFI |
1969 | 0 | 0U, // EVSPLATI |
1970 | 0 | 4U, // EVSRWIS |
1971 | 0 | 4U, // EVSRWIU |
1972 | 0 | 0U, // EVSRWS |
1973 | 0 | 0U, // EVSRWU |
1974 | 0 | 0U, // EVSTDD |
1975 | 0 | 0U, // EVSTDDX |
1976 | 0 | 0U, // EVSTDH |
1977 | 0 | 0U, // EVSTDHX |
1978 | 0 | 0U, // EVSTDW |
1979 | 0 | 0U, // EVSTDWX |
1980 | 0 | 0U, // EVSTWHE |
1981 | 0 | 0U, // EVSTWHEX |
1982 | 0 | 0U, // EVSTWHO |
1983 | 0 | 0U, // EVSTWHOX |
1984 | 0 | 0U, // EVSTWWE |
1985 | 0 | 0U, // EVSTWWEX |
1986 | 0 | 0U, // EVSTWWO |
1987 | 0 | 0U, // EVSTWWOX |
1988 | 0 | 0U, // EVSUBFSMIAAW |
1989 | 0 | 0U, // EVSUBFSSIAAW |
1990 | 0 | 0U, // EVSUBFUMIAAW |
1991 | 0 | 0U, // EVSUBFUSIAAW |
1992 | 0 | 0U, // EVSUBFW |
1993 | 0 | 0U, // EVSUBIFW |
1994 | 0 | 0U, // EVXOR |
1995 | 0 | 19U, // EXTLDI |
1996 | 0 | 19U, // EXTLDIo |
1997 | 0 | 52U, // EXTLWI |
1998 | 0 | 52U, // EXTLWIo |
1999 | 0 | 19U, // EXTRDI |
2000 | 0 | 19U, // EXTRDIo |
2001 | 0 | 52U, // EXTRWI |
2002 | 0 | 52U, // EXTRWIo |
2003 | 0 | 0U, // EXTSB |
2004 | 0 | 0U, // EXTSB8 |
2005 | 0 | 0U, // EXTSB8_32_64 |
2006 | 0 | 0U, // EXTSB8o |
2007 | 0 | 0U, // EXTSBo |
2008 | 0 | 0U, // EXTSH |
2009 | 0 | 0U, // EXTSH8 |
2010 | 0 | 0U, // EXTSH8_32_64 |
2011 | 0 | 0U, // EXTSH8o |
2012 | 0 | 0U, // EXTSHo |
2013 | 0 | 0U, // EXTSW |
2014 | 0 | 0U, // EXTSW_32_64 |
2015 | 0 | 0U, // EXTSW_32_64o |
2016 | 0 | 0U, // EXTSWo |
2017 | 0 | 0U, // EnforceIEIO |
2018 | 0 | 0U, // FABSD |
2019 | 0 | 0U, // FABSDo |
2020 | 0 | 0U, // FABSS |
2021 | 0 | 0U, // FABSSo |
2022 | 0 | 0U, // FADD |
2023 | 0 | 0U, // FADDS |
2024 | 0 | 0U, // FADDSo |
2025 | 0 | 0U, // FADDo |
2026 | 0 | 0U, // FADDrtz |
2027 | 0 | 0U, // FCFID |
2028 | 0 | 0U, // FCFIDS |
2029 | 0 | 0U, // FCFIDSo |
2030 | 0 | 0U, // FCFIDU |
2031 | 0 | 0U, // FCFIDUS |
2032 | 0 | 0U, // FCFIDUSo |
2033 | 0 | 0U, // FCFIDUo |
2034 | 0 | 0U, // FCFIDo |
2035 | 0 | 0U, // FCMPUD |
2036 | 0 | 0U, // FCMPUS |
2037 | 0 | 0U, // FCPSGND |
2038 | 0 | 0U, // FCPSGNDo |
2039 | 0 | 0U, // FCPSGNS |
2040 | 0 | 0U, // FCPSGNSo |
2041 | 0 | 0U, // FCTID |
2042 | 0 | 0U, // FCTIDUZ |
2043 | 0 | 0U, // FCTIDUZo |
2044 | 0 | 0U, // FCTIDZ |
2045 | 0 | 0U, // FCTIDZo |
2046 | 0 | 0U, // FCTIDo |
2047 | 0 | 0U, // FCTIW |
2048 | 0 | 0U, // FCTIWUZ |
2049 | 0 | 0U, // FCTIWUZo |
2050 | 0 | 0U, // FCTIWZ |
2051 | 0 | 0U, // FCTIWZo |
2052 | 0 | 0U, // FCTIWo |
2053 | 0 | 0U, // FDIV |
2054 | 0 | 0U, // FDIVS |
2055 | 0 | 0U, // FDIVSo |
2056 | 0 | 0U, // FDIVo |
2057 | 0 | 80U, // FMADD |
2058 | 0 | 80U, // FMADDS |
2059 | 0 | 80U, // FMADDSo |
2060 | 0 | 80U, // FMADDo |
2061 | 0 | 0U, // FMR |
2062 | 0 | 0U, // FMRo |
2063 | 0 | 80U, // FMSUB |
2064 | 0 | 80U, // FMSUBS |
2065 | 0 | 80U, // FMSUBSo |
2066 | 0 | 80U, // FMSUBo |
2067 | 0 | 0U, // FMUL |
2068 | 0 | 0U, // FMULS |
2069 | 0 | 0U, // FMULSo |
2070 | 0 | 0U, // FMULo |
2071 | 0 | 0U, // FNABSD |
2072 | 0 | 0U, // FNABSDo |
2073 | 0 | 0U, // FNABSS |
2074 | 0 | 0U, // FNABSSo |
2075 | 0 | 0U, // FNEGD |
2076 | 0 | 0U, // FNEGDo |
2077 | 0 | 0U, // FNEGS |
2078 | 0 | 0U, // FNEGSo |
2079 | 0 | 80U, // FNMADD |
2080 | 0 | 80U, // FNMADDS |
2081 | 0 | 80U, // FNMADDSo |
2082 | 0 | 80U, // FNMADDo |
2083 | 0 | 80U, // FNMSUB |
2084 | 0 | 80U, // FNMSUBS |
2085 | 0 | 80U, // FNMSUBSo |
2086 | 0 | 80U, // FNMSUBo |
2087 | 0 | 0U, // FRE |
2088 | 0 | 0U, // FRES |
2089 | 0 | 0U, // FRESo |
2090 | 0 | 0U, // FREo |
2091 | 0 | 0U, // FRIMD |
2092 | 0 | 0U, // FRIMDo |
2093 | 0 | 0U, // FRIMS |
2094 | 0 | 0U, // FRIMSo |
2095 | 0 | 0U, // FRIND |
2096 | 0 | 0U, // FRINDo |
2097 | 0 | 0U, // FRINS |
2098 | 0 | 0U, // FRINSo |
2099 | 0 | 0U, // FRIPD |
2100 | 0 | 0U, // FRIPDo |
2101 | 0 | 0U, // FRIPS |
2102 | 0 | 0U, // FRIPSo |
2103 | 0 | 0U, // FRIZD |
2104 | 0 | 0U, // FRIZDo |
2105 | 0 | 0U, // FRIZS |
2106 | 0 | 0U, // FRIZSo |
2107 | 0 | 0U, // FRSP |
2108 | 0 | 0U, // FRSPo |
2109 | 0 | 0U, // FRSQRTE |
2110 | 0 | 0U, // FRSQRTES |
2111 | 0 | 0U, // FRSQRTESo |
2112 | 0 | 0U, // FRSQRTEo |
2113 | 0 | 80U, // FSELD |
2114 | 0 | 80U, // FSELDo |
2115 | 0 | 80U, // FSELS |
2116 | 0 | 80U, // FSELSo |
2117 | 0 | 0U, // FSQRT |
2118 | 0 | 0U, // FSQRTS |
2119 | 0 | 0U, // FSQRTSo |
2120 | 0 | 0U, // FSQRTo |
2121 | 0 | 0U, // FSUB |
2122 | 0 | 0U, // FSUBS |
2123 | 0 | 0U, // FSUBSo |
2124 | 0 | 0U, // FSUBo |
2125 | 0 | 0U, // GETtlsADDR |
2126 | 0 | 0U, // GETtlsADDR32 |
2127 | 0 | 0U, // GETtlsldADDR |
2128 | 0 | 0U, // GETtlsldADDR32 |
2129 | 0 | 0U, // ICBI |
2130 | 0 | 0U, // ICBT |
2131 | 0 | 0U, // ICCCI |
2132 | 0 | 52U, // INSLWI |
2133 | 0 | 52U, // INSLWIo |
2134 | 0 | 19U, // INSRDI |
2135 | 0 | 19U, // INSRDIo |
2136 | 0 | 52U, // INSRWI |
2137 | 0 | 52U, // INSRWIo |
2138 | 0 | 80U, // ISEL |
2139 | 0 | 80U, // ISEL8 |
2140 | 0 | 0U, // ISYNC |
2141 | 0 | 0U, // LA |
2142 | 0 | 0U, // LAx |
2143 | 0 | 0U, // LBZ |
2144 | 0 | 0U, // LBZ8 |
2145 | 0 | 0U, // LBZCIX |
2146 | 0 | 0U, // LBZU |
2147 | 0 | 0U, // LBZU8 |
2148 | 0 | 0U, // LBZUX |
2149 | 0 | 0U, // LBZUX8 |
2150 | 0 | 0U, // LBZX |
2151 | 0 | 0U, // LBZX8 |
2152 | 0 | 0U, // LD |
2153 | 0 | 0U, // LDARX |
2154 | 0 | 0U, // LDBRX |
2155 | 0 | 0U, // LDCIX |
2156 | 0 | 0U, // LDU |
2157 | 0 | 0U, // LDUX |
2158 | 0 | 0U, // LDX |
2159 | 0 | 0U, // LDgotTprelL |
2160 | 0 | 0U, // LDgotTprelL32 |
2161 | 0 | 0U, // LDtoc |
2162 | 0 | 0U, // LDtocBA |
2163 | 0 | 0U, // LDtocCPT |
2164 | 0 | 0U, // LDtocJTI |
2165 | 0 | 0U, // LDtocL |
2166 | 0 | 0U, // LFD |
2167 | 0 | 0U, // LFDU |
2168 | 0 | 0U, // LFDUX |
2169 | 0 | 0U, // LFDX |
2170 | 0 | 0U, // LFIWAX |
2171 | 0 | 0U, // LFIWZX |
2172 | 0 | 0U, // LFS |
2173 | 0 | 0U, // LFSU |
2174 | 0 | 0U, // LFSUX |
2175 | 0 | 0U, // LFSX |
2176 | 0 | 0U, // LHA |
2177 | 0 | 0U, // LHA8 |
2178 | 0 | 0U, // LHAU |
2179 | 0 | 0U, // LHAU8 |
2180 | 0 | 0U, // LHAUX |
2181 | 0 | 0U, // LHAUX8 |
2182 | 0 | 0U, // LHAX |
2183 | 0 | 0U, // LHAX8 |
2184 | 0 | 0U, // LHBRX |
2185 | 0 | 0U, // LHBRX8 |
2186 | 0 | 0U, // LHZ |
2187 | 0 | 0U, // LHZ8 |
2188 | 0 | 0U, // LHZCIX |
2189 | 0 | 0U, // LHZU |
2190 | 0 | 0U, // LHZU8 |
2191 | 0 | 0U, // LHZUX |
2192 | 0 | 0U, // LHZUX8 |
2193 | 0 | 0U, // LHZX |
2194 | 0 | 0U, // LHZX8 |
2195 | 0 | 0U, // LI |
2196 | 0 | 0U, // LI8 |
2197 | 0 | 0U, // LIS |
2198 | 0 | 0U, // LIS8 |
2199 | 0 | 0U, // LMW |
2200 | 0 | 4U, // LSWI |
2201 | 0 | 0U, // LVEBX |
2202 | 0 | 0U, // LVEHX |
2203 | 0 | 0U, // LVEWX |
2204 | 0 | 0U, // LVSL |
2205 | 0 | 0U, // LVSR |
2206 | 0 | 0U, // LVX |
2207 | 0 | 0U, // LVXL |
2208 | 0 | 0U, // LWA |
2209 | 0 | 0U, // LWARX |
2210 | 0 | 0U, // LWAUX |
2211 | 0 | 0U, // LWAX |
2212 | 0 | 0U, // LWAX_32 |
2213 | 0 | 0U, // LWA_32 |
2214 | 0 | 0U, // LWBRX |
2215 | 0 | 0U, // LWBRX8 |
2216 | 0 | 0U, // LWZ |
2217 | 0 | 0U, // LWZ8 |
2218 | 0 | 0U, // LWZCIX |
2219 | 0 | 0U, // LWZU |
2220 | 0 | 0U, // LWZU8 |
2221 | 0 | 0U, // LWZUX |
2222 | 0 | 0U, // LWZUX8 |
2223 | 0 | 0U, // LWZX |
2224 | 0 | 0U, // LWZX8 |
2225 | 0 | 0U, // LWZtoc |
2226 | 0 | 0U, // LXSDX |
2227 | 0 | 0U, // LXVD2X |
2228 | 0 | 0U, // LXVDSX |
2229 | 0 | 0U, // LXVW4X |
2230 | 0 | 0U, // MBAR |
2231 | 0 | 0U, // MCRF |
2232 | 0 | 0U, // MCRFS |
2233 | 0 | 0U, // MFCR |
2234 | 0 | 0U, // MFCR8 |
2235 | 0 | 0U, // MFCTR |
2236 | 0 | 0U, // MFCTR8 |
2237 | 0 | 0U, // MFDCR |
2238 | 0 | 0U, // MFFS |
2239 | 0 | 0U, // MFFSo |
2240 | 0 | 0U, // MFLR |
2241 | 0 | 0U, // MFLR8 |
2242 | 0 | 0U, // MFMSR |
2243 | 0 | 0U, // MFOCRF |
2244 | 0 | 0U, // MFOCRF8 |
2245 | 0 | 0U, // MFSPR |
2246 | 0 | 0U, // MFSR |
2247 | 0 | 0U, // MFSRIN |
2248 | 0 | 0U, // MFTB |
2249 | 0 | 0U, // MFTB8 |
2250 | 0 | 0U, // MFVRSAVE |
2251 | 0 | 0U, // MFVRSAVEv |
2252 | 0 | 0U, // MFVSCR |
2253 | 0 | 0U, // MSYNC |
2254 | 0 | 0U, // MTCRF |
2255 | 0 | 0U, // MTCRF8 |
2256 | 0 | 0U, // MTCTR |
2257 | 0 | 0U, // MTCTR8 |
2258 | 0 | 0U, // MTCTR8loop |
2259 | 0 | 0U, // MTCTRloop |
2260 | 0 | 0U, // MTDCR |
2261 | 0 | 0U, // MTFSB0 |
2262 | 0 | 0U, // MTFSB1 |
2263 | 0 | 80U, // MTFSF |
2264 | 0 | 0U, // MTFSFI |
2265 | 0 | 0U, // MTFSFIo |
2266 | 0 | 0U, // MTFSFb |
2267 | 0 | 80U, // MTFSFo |
2268 | 0 | 0U, // MTLR |
2269 | 0 | 0U, // MTLR8 |
2270 | 0 | 0U, // MTMSR |
2271 | 0 | 0U, // MTMSRD |
2272 | 0 | 0U, // MTOCRF |
2273 | 0 | 0U, // MTOCRF8 |
2274 | 0 | 0U, // MTSPR |
2275 | 0 | 0U, // MTSR |
2276 | 0 | 0U, // MTSRIN |
2277 | 0 | 0U, // MTVRSAVE |
2278 | 0 | 0U, // MTVRSAVEv |
2279 | 0 | 0U, // MTVSCR |
2280 | 0 | 0U, // MULHD |
2281 | 0 | 0U, // MULHDU |
2282 | 0 | 0U, // MULHDUo |
2283 | 0 | 0U, // MULHDo |
2284 | 0 | 0U, // MULHW |
2285 | 0 | 0U, // MULHWU |
2286 | 0 | 0U, // MULHWUo |
2287 | 0 | 0U, // MULHWo |
2288 | 0 | 0U, // MULLD |
2289 | 0 | 0U, // MULLDo |
2290 | 0 | 1U, // MULLI |
2291 | 0 | 1U, // MULLI8 |
2292 | 0 | 0U, // MULLW |
2293 | 0 | 0U, // MULLWo |
2294 | 0 | 0U, // MoveGOTtoLR |
2295 | 0 | 0U, // MovePCtoLR |
2296 | 0 | 0U, // MovePCtoLR8 |
2297 | 0 | 0U, // NAND |
2298 | 0 | 0U, // NAND8 |
2299 | 0 | 0U, // NAND8o |
2300 | 0 | 0U, // NANDo |
2301 | 0 | 0U, // NEG |
2302 | 0 | 0U, // NEG8 |
2303 | 0 | 0U, // NEG8o |
2304 | 0 | 0U, // NEGo |
2305 | 0 | 0U, // NOP |
2306 | 0 | 0U, // NOP_GT_PWR6 |
2307 | 0 | 0U, // NOP_GT_PWR7 |
2308 | 0 | 0U, // NOR |
2309 | 0 | 0U, // NOR8 |
2310 | 0 | 0U, // NOR8o |
2311 | 0 | 0U, // NORo |
2312 | 0 | 0U, // OR |
2313 | 0 | 0U, // OR8 |
2314 | 0 | 0U, // OR8o |
2315 | 0 | 0U, // ORC |
2316 | 0 | 0U, // ORC8 |
2317 | 0 | 0U, // ORC8o |
2318 | 0 | 0U, // ORCo |
2319 | 0 | 2U, // ORI |
2320 | 0 | 2U, // ORI8 |
2321 | 0 | 2U, // ORIS |
2322 | 0 | 2U, // ORIS8 |
2323 | 0 | 0U, // ORo |
2324 | 0 | 0U, // POPCNTD |
2325 | 0 | 0U, // POPCNTW |
2326 | 0 | 0U, // PPC32GOT |
2327 | 0 | 0U, // PPC32PICGOT |
2328 | 0 | 112U, // QVALIGNI |
2329 | 0 | 112U, // QVALIGNIb |
2330 | 0 | 112U, // QVALIGNIs |
2331 | 0 | 6U, // QVESPLATI |
2332 | 0 | 6U, // QVESPLATIb |
2333 | 0 | 6U, // QVESPLATIs |
2334 | 0 | 0U, // QVFABS |
2335 | 0 | 0U, // QVFABSs |
2336 | 0 | 0U, // QVFADD |
2337 | 0 | 0U, // QVFADDS |
2338 | 0 | 0U, // QVFADDSs |
2339 | 0 | 0U, // QVFCFID |
2340 | 0 | 0U, // QVFCFIDS |
2341 | 0 | 0U, // QVFCFIDU |
2342 | 0 | 0U, // QVFCFIDUS |
2343 | 0 | 0U, // QVFCFIDb |
2344 | 0 | 0U, // QVFCMPEQ |
2345 | 0 | 0U, // QVFCMPEQb |
2346 | 0 | 0U, // QVFCMPEQbs |
2347 | 0 | 0U, // QVFCMPGT |
2348 | 0 | 0U, // QVFCMPGTb |
2349 | 0 | 0U, // QVFCMPGTbs |
2350 | 0 | 0U, // QVFCMPLT |
2351 | 0 | 0U, // QVFCMPLTb |
2352 | 0 | 0U, // QVFCMPLTbs |
2353 | 0 | 0U, // QVFCPSGN |
2354 | 0 | 0U, // QVFCPSGNs |
2355 | 0 | 0U, // QVFCTID |
2356 | 0 | 0U, // QVFCTIDU |
2357 | 0 | 0U, // QVFCTIDUZ |
2358 | 0 | 0U, // QVFCTIDZ |
2359 | 0 | 0U, // QVFCTIDb |
2360 | 0 | 0U, // QVFCTIW |
2361 | 0 | 0U, // QVFCTIWU |
2362 | 0 | 0U, // QVFCTIWUZ |
2363 | 0 | 0U, // QVFCTIWZ |
2364 | 0 | 144U, // QVFLOGICAL |
2365 | 0 | 144U, // QVFLOGICALb |
2366 | 0 | 144U, // QVFLOGICALs |
2367 | 0 | 7U, // QVFMADD |
2368 | 0 | 7U, // QVFMADDS |
2369 | 0 | 7U, // QVFMADDSs |
2370 | 0 | 0U, // QVFMR |
2371 | 0 | 0U, // QVFMRb |
2372 | 0 | 0U, // QVFMRs |
2373 | 0 | 7U, // QVFMSUB |
2374 | 0 | 7U, // QVFMSUBS |
2375 | 0 | 7U, // QVFMSUBSs |
2376 | 0 | 0U, // QVFMUL |
2377 | 0 | 0U, // QVFMULS |
2378 | 0 | 0U, // QVFMULSs |
2379 | 0 | 0U, // QVFNABS |
2380 | 0 | 0U, // QVFNABSs |
2381 | 0 | 0U, // QVFNEG |
2382 | 0 | 0U, // QVFNEGs |
2383 | 0 | 7U, // QVFNMADD |
2384 | 0 | 7U, // QVFNMADDS |
2385 | 0 | 7U, // QVFNMADDSs |
2386 | 0 | 7U, // QVFNMSUB |
2387 | 0 | 7U, // QVFNMSUBS |
2388 | 0 | 7U, // QVFNMSUBSs |
2389 | 0 | 80U, // QVFPERM |
2390 | 0 | 80U, // QVFPERMs |
2391 | 0 | 0U, // QVFRE |
2392 | 0 | 0U, // QVFRES |
2393 | 0 | 0U, // QVFRESs |
2394 | 0 | 0U, // QVFRIM |
2395 | 0 | 0U, // QVFRIMs |
2396 | 0 | 0U, // QVFRIN |
2397 | 0 | 0U, // QVFRINs |
2398 | 0 | 0U, // QVFRIP |
2399 | 0 | 0U, // QVFRIPs |
2400 | 0 | 0U, // QVFRIZ |
2401 | 0 | 0U, // QVFRIZs |
2402 | 0 | 0U, // QVFRSP |
2403 | 0 | 0U, // QVFRSPs |
2404 | 0 | 0U, // QVFRSQRTE |
2405 | 0 | 0U, // QVFRSQRTES |
2406 | 0 | 0U, // QVFRSQRTESs |
2407 | 0 | 7U, // QVFSEL |
2408 | 0 | 7U, // QVFSELb |
2409 | 0 | 7U, // QVFSELbb |
2410 | 0 | 7U, // QVFSELbs |
2411 | 0 | 0U, // QVFSUB |
2412 | 0 | 0U, // QVFSUBS |
2413 | 0 | 0U, // QVFSUBSs |
2414 | 0 | 0U, // QVFTSTNAN |
2415 | 0 | 0U, // QVFTSTNANb |
2416 | 0 | 0U, // QVFTSTNANbs |
2417 | 0 | 7U, // QVFXMADD |
2418 | 0 | 7U, // QVFXMADDS |
2419 | 0 | 0U, // QVFXMUL |
2420 | 0 | 0U, // QVFXMULS |
2421 | 0 | 7U, // QVFXXCPNMADD |
2422 | 0 | 7U, // QVFXXCPNMADDS |
2423 | 0 | 7U, // QVFXXMADD |
2424 | 0 | 7U, // QVFXXMADDS |
2425 | 0 | 7U, // QVFXXNPMADD |
2426 | 0 | 7U, // QVFXXNPMADDS |
2427 | 0 | 0U, // QVGPCI |
2428 | 0 | 0U, // QVLFCDUX |
2429 | 0 | 0U, // QVLFCDUXA |
2430 | 0 | 0U, // QVLFCDX |
2431 | 0 | 0U, // QVLFCDXA |
2432 | 0 | 0U, // QVLFCSUX |
2433 | 0 | 0U, // QVLFCSUXA |
2434 | 0 | 0U, // QVLFCSX |
2435 | 0 | 0U, // QVLFCSXA |
2436 | 0 | 0U, // QVLFCSXs |
2437 | 0 | 0U, // QVLFDUX |
2438 | 0 | 0U, // QVLFDUXA |
2439 | 0 | 0U, // QVLFDX |
2440 | 0 | 0U, // QVLFDXA |
2441 | 0 | 0U, // QVLFDXb |
2442 | 0 | 0U, // QVLFIWAX |
2443 | 0 | 0U, // QVLFIWAXA |
2444 | 0 | 0U, // QVLFIWZX |
2445 | 0 | 0U, // QVLFIWZXA |
2446 | 0 | 0U, // QVLFSUX |
2447 | 0 | 0U, // QVLFSUXA |
2448 | 0 | 0U, // QVLFSX |
2449 | 0 | 0U, // QVLFSXA |
2450 | 0 | 0U, // QVLFSXb |
2451 | 0 | 0U, // QVLFSXs |
2452 | 0 | 0U, // QVLPCLDX |
2453 | 0 | 0U, // QVLPCLSX |
2454 | 0 | 0U, // QVLPCLSXint |
2455 | 0 | 0U, // QVLPCRDX |
2456 | 0 | 0U, // QVLPCRSX |
2457 | 0 | 0U, // QVSTFCDUX |
2458 | 0 | 0U, // QVSTFCDUXA |
2459 | 0 | 0U, // QVSTFCDUXI |
2460 | 0 | 0U, // QVSTFCDUXIA |
2461 | 0 | 0U, // QVSTFCDX |
2462 | 0 | 0U, // QVSTFCDXA |
2463 | 0 | 0U, // QVSTFCDXI |
2464 | 0 | 0U, // QVSTFCDXIA |
2465 | 0 | 0U, // QVSTFCSUX |
2466 | 0 | 0U, // QVSTFCSUXA |
2467 | 0 | 0U, // QVSTFCSUXI |
2468 | 0 | 0U, // QVSTFCSUXIA |
2469 | 0 | 0U, // QVSTFCSX |
2470 | 0 | 0U, // QVSTFCSXA |
2471 | 0 | 0U, // QVSTFCSXI |
2472 | 0 | 0U, // QVSTFCSXIA |
2473 | 0 | 0U, // QVSTFCSXs |
2474 | 0 | 0U, // QVSTFDUX |
2475 | 0 | 0U, // QVSTFDUXA |
2476 | 0 | 0U, // QVSTFDUXI |
2477 | 0 | 0U, // QVSTFDUXIA |
2478 | 0 | 0U, // QVSTFDX |
2479 | 0 | 0U, // QVSTFDXA |
2480 | 0 | 0U, // QVSTFDXI |
2481 | 0 | 0U, // QVSTFDXIA |
2482 | 0 | 0U, // QVSTFDXb |
2483 | 0 | 0U, // QVSTFIWX |
2484 | 0 | 0U, // QVSTFIWXA |
2485 | 0 | 0U, // QVSTFSUX |
2486 | 0 | 0U, // QVSTFSUXA |
2487 | 0 | 0U, // QVSTFSUXI |
2488 | 0 | 0U, // QVSTFSUXIA |
2489 | 0 | 0U, // QVSTFSUXs |
2490 | 0 | 0U, // QVSTFSX |
2491 | 0 | 0U, // QVSTFSXA |
2492 | 0 | 0U, // QVSTFSXI |
2493 | 0 | 0U, // QVSTFSXIA |
2494 | 0 | 0U, // QVSTFSXs |
2495 | 0 | 0U, // RESTORE_CR |
2496 | 0 | 0U, // RESTORE_CRBIT |
2497 | 0 | 0U, // RESTORE_VRSAVE |
2498 | 0 | 0U, // RFCI |
2499 | 0 | 0U, // RFDI |
2500 | 0 | 0U, // RFI |
2501 | 0 | 0U, // RFID |
2502 | 0 | 0U, // RFMCI |
2503 | 0 | 16U, // RLDCL |
2504 | 0 | 16U, // RLDCLo |
2505 | 0 | 16U, // RLDCR |
2506 | 0 | 16U, // RLDCRo |
2507 | 0 | 19U, // RLDIC |
2508 | 0 | 19U, // RLDICL |
2509 | 0 | 19U, // RLDICL_32_64 |
2510 | 0 | 19U, // RLDICLo |
2511 | 0 | 19U, // RLDICR |
2512 | 0 | 19U, // RLDICRo |
2513 | 0 | 19U, // RLDICo |
2514 | 0 | 0U, // RLDIMI |
2515 | 0 | 0U, // RLDIMIo |
2516 | 0 | 0U, // RLWIMI |
2517 | 0 | 0U, // RLWIMI8 |
2518 | 0 | 0U, // RLWIMI8o |
2519 | 0 | 0U, // RLWIMIo |
2520 | 0 | 308U, // RLWINM |
2521 | 0 | 308U, // RLWINM8 |
2522 | 0 | 308U, // RLWINM8o |
2523 | 0 | 308U, // RLWINMo |
2524 | 0 | 304U, // RLWNM |
2525 | 0 | 304U, // RLWNM8 |
2526 | 0 | 304U, // RLWNM8o |
2527 | 0 | 304U, // RLWNMo |
2528 | 0 | 3U, // ROTRDI |
2529 | 0 | 3U, // ROTRDIo |
2530 | 0 | 4U, // ROTRWI |
2531 | 0 | 4U, // ROTRWIo |
2532 | 0 | 0U, // ReadTB |
2533 | 0 | 0U, // SC |
2534 | 0 | 0U, // SELECT_CC_F4 |
2535 | 0 | 0U, // SELECT_CC_F8 |
2536 | 0 | 0U, // SELECT_CC_I4 |
2537 | 0 | 0U, // SELECT_CC_I8 |
2538 | 0 | 0U, // SELECT_CC_QBRC |
2539 | 0 | 0U, // SELECT_CC_QFRC |
2540 | 0 | 0U, // SELECT_CC_QSRC |
2541 | 0 | 0U, // SELECT_CC_VRRC |
2542 | 0 | 0U, // SELECT_CC_VSFRC |
2543 | 0 | 0U, // SELECT_CC_VSRC |
2544 | 0 | 0U, // SELECT_F4 |
2545 | 0 | 0U, // SELECT_F8 |
2546 | 0 | 0U, // SELECT_I4 |
2547 | 0 | 0U, // SELECT_I8 |
2548 | 0 | 0U, // SELECT_QBRC |
2549 | 0 | 0U, // SELECT_QFRC |
2550 | 0 | 0U, // SELECT_QSRC |
2551 | 0 | 0U, // SELECT_VRRC |
2552 | 0 | 0U, // SELECT_VSFRC |
2553 | 0 | 0U, // SELECT_VSRC |
2554 | 0 | 0U, // SLBIA |
2555 | 0 | 0U, // SLBIE |
2556 | 0 | 0U, // SLBMFEE |
2557 | 0 | 0U, // SLBMTE |
2558 | 0 | 0U, // SLD |
2559 | 0 | 3U, // SLDI |
2560 | 0 | 3U, // SLDIo |
2561 | 0 | 0U, // SLDo |
2562 | 0 | 0U, // SLW |
2563 | 0 | 0U, // SLW8 |
2564 | 0 | 0U, // SLW8o |
2565 | 0 | 4U, // SLWI |
2566 | 0 | 4U, // SLWIo |
2567 | 0 | 0U, // SLWo |
2568 | 0 | 0U, // SPILL_CR |
2569 | 0 | 0U, // SPILL_CRBIT |
2570 | 0 | 0U, // SPILL_VRSAVE |
2571 | 0 | 0U, // SRAD |
2572 | 0 | 3U, // SRADI |
2573 | 0 | 3U, // SRADIo |
2574 | 0 | 0U, // SRADo |
2575 | 0 | 0U, // SRAW |
2576 | 0 | 4U, // SRAWI |
2577 | 0 | 4U, // SRAWIo |
2578 | 0 | 0U, // SRAWo |
2579 | 0 | 0U, // SRD |
2580 | 0 | 3U, // SRDI |
2581 | 0 | 3U, // SRDIo |
2582 | 0 | 0U, // SRDo |
2583 | 0 | 0U, // SRW |
2584 | 0 | 0U, // SRW8 |
2585 | 0 | 0U, // SRW8o |
2586 | 0 | 4U, // SRWI |
2587 | 0 | 4U, // SRWIo |
2588 | 0 | 0U, // SRWo |
2589 | 0 | 0U, // STB |
2590 | 0 | 0U, // STB8 |
2591 | 0 | 0U, // STBCIX |
2592 | 0 | 0U, // STBU |
2593 | 0 | 0U, // STBU8 |
2594 | 0 | 0U, // STBUX |
2595 | 0 | 0U, // STBUX8 |
2596 | 0 | 0U, // STBX |
2597 | 0 | 0U, // STBX8 |
2598 | 0 | 0U, // STD |
2599 | 0 | 0U, // STDBRX |
2600 | 0 | 0U, // STDCIX |
2601 | 0 | 0U, // STDCX |
2602 | 0 | 0U, // STDU |
2603 | 0 | 0U, // STDUX |
2604 | 0 | 0U, // STDX |
2605 | 0 | 0U, // STFD |
2606 | 0 | 0U, // STFDU |
2607 | 0 | 0U, // STFDUX |
2608 | 0 | 0U, // STFDX |
2609 | 0 | 0U, // STFIWX |
2610 | 0 | 0U, // STFS |
2611 | 0 | 0U, // STFSU |
2612 | 0 | 0U, // STFSUX |
2613 | 0 | 0U, // STFSX |
2614 | 0 | 0U, // STH |
2615 | 0 | 0U, // STH8 |
2616 | 0 | 0U, // STHBRX |
2617 | 0 | 0U, // STHCIX |
2618 | 0 | 0U, // STHU |
2619 | 0 | 0U, // STHU8 |
2620 | 0 | 0U, // STHUX |
2621 | 0 | 0U, // STHUX8 |
2622 | 0 | 0U, // STHX |
2623 | 0 | 0U, // STHX8 |
2624 | 0 | 0U, // STMW |
2625 | 0 | 4U, // STSWI |
2626 | 0 | 0U, // STVEBX |
2627 | 0 | 0U, // STVEHX |
2628 | 0 | 0U, // STVEWX |
2629 | 0 | 0U, // STVX |
2630 | 0 | 0U, // STVXL |
2631 | 0 | 0U, // STW |
2632 | 0 | 0U, // STW8 |
2633 | 0 | 0U, // STWBRX |
2634 | 0 | 0U, // STWCIX |
2635 | 0 | 0U, // STWCX |
2636 | 0 | 0U, // STWU |
2637 | 0 | 0U, // STWU8 |
2638 | 0 | 0U, // STWUX |
2639 | 0 | 0U, // STWUX8 |
2640 | 0 | 0U, // STWX |
2641 | 0 | 0U, // STWX8 |
2642 | 0 | 0U, // STXSDX |
2643 | 0 | 0U, // STXVD2X |
2644 | 0 | 0U, // STXVW4X |
2645 | 0 | 0U, // SUBF |
2646 | 0 | 0U, // SUBF8 |
2647 | 0 | 0U, // SUBF8o |
2648 | 0 | 0U, // SUBFC |
2649 | 0 | 0U, // SUBFC8 |
2650 | 0 | 0U, // SUBFC8o |
2651 | 0 | 0U, // SUBFCo |
2652 | 0 | 0U, // SUBFE |
2653 | 0 | 0U, // SUBFE8 |
2654 | 0 | 0U, // SUBFE8o |
2655 | 0 | 0U, // SUBFEo |
2656 | 0 | 1U, // SUBFIC |
2657 | 0 | 1U, // SUBFIC8 |
2658 | 0 | 0U, // SUBFME |
2659 | 0 | 0U, // SUBFME8 |
2660 | 0 | 0U, // SUBFME8o |
2661 | 0 | 0U, // SUBFMEo |
2662 | 0 | 0U, // SUBFZE |
2663 | 0 | 0U, // SUBFZE8 |
2664 | 0 | 0U, // SUBFZE8o |
2665 | 0 | 0U, // SUBFZEo |
2666 | 0 | 0U, // SUBFo |
2667 | 0 | 1U, // SUBI |
2668 | 0 | 1U, // SUBIC |
2669 | 0 | 1U, // SUBICo |
2670 | 0 | 1U, // SUBIS |
2671 | 0 | 0U, // SYNC |
2672 | 0 | 0U, // TAILB |
2673 | 0 | 0U, // TAILB8 |
2674 | 0 | 0U, // TAILBA |
2675 | 0 | 0U, // TAILBA8 |
2676 | 0 | 0U, // TAILBCTR |
2677 | 0 | 0U, // TAILBCTR8 |
2678 | 0 | 0U, // TCRETURNai |
2679 | 0 | 0U, // TCRETURNai8 |
2680 | 0 | 0U, // TCRETURNdi |
2681 | 0 | 0U, // TCRETURNdi8 |
2682 | 0 | 0U, // TCRETURNri |
2683 | 0 | 0U, // TCRETURNri8 |
2684 | 0 | 0U, // TD |
2685 | 0 | 1U, // TDI |
2686 | 0 | 0U, // TLBIA |
2687 | 0 | 0U, // TLBIE |
2688 | 0 | 0U, // TLBIEL |
2689 | 0 | 0U, // TLBIVAX |
2690 | 0 | 0U, // TLBLD |
2691 | 0 | 0U, // TLBLI |
2692 | 0 | 0U, // TLBRE |
2693 | 0 | 0U, // TLBRE2 |
2694 | 0 | 0U, // TLBSX |
2695 | 0 | 0U, // TLBSX2 |
2696 | 0 | 0U, // TLBSX2D |
2697 | 0 | 0U, // TLBSYNC |
2698 | 0 | 0U, // TLBWE |
2699 | 0 | 0U, // TLBWE2 |
2700 | 0 | 0U, // TRAP |
2701 | 0 | 0U, // TW |
2702 | 0 | 1U, // TWI |
2703 | 0 | 0U, // UPDATE_VRSAVE |
2704 | 0 | 0U, // UpdateGBR |
2705 | 0 | 0U, // VADDCUW |
2706 | 0 | 0U, // VADDFP |
2707 | 0 | 0U, // VADDSBS |
2708 | 0 | 0U, // VADDSHS |
2709 | 0 | 0U, // VADDSWS |
2710 | 0 | 0U, // VADDUBM |
2711 | 0 | 0U, // VADDUBS |
2712 | 0 | 0U, // VADDUDM |
2713 | 0 | 0U, // VADDUHM |
2714 | 0 | 0U, // VADDUHS |
2715 | 0 | 0U, // VADDUWM |
2716 | 0 | 0U, // VADDUWS |
2717 | 0 | 0U, // VAND |
2718 | 0 | 0U, // VANDC |
2719 | 0 | 0U, // VAVGSB |
2720 | 0 | 0U, // VAVGSH |
2721 | 0 | 0U, // VAVGSW |
2722 | 0 | 0U, // VAVGUB |
2723 | 0 | 0U, // VAVGUH |
2724 | 0 | 0U, // VAVGUW |
2725 | 0 | 0U, // VCFSX |
2726 | 0 | 0U, // VCFSX_0 |
2727 | 0 | 0U, // VCFUX |
2728 | 0 | 0U, // VCFUX_0 |
2729 | 0 | 0U, // VCLZB |
2730 | 0 | 0U, // VCLZD |
2731 | 0 | 0U, // VCLZH |
2732 | 0 | 0U, // VCLZW |
2733 | 0 | 0U, // VCMPBFP |
2734 | 0 | 0U, // VCMPBFPo |
2735 | 0 | 0U, // VCMPEQFP |
2736 | 0 | 0U, // VCMPEQFPo |
2737 | 0 | 0U, // VCMPEQUB |
2738 | 0 | 0U, // VCMPEQUBo |
2739 | 0 | 0U, // VCMPEQUD |
2740 | 0 | 0U, // VCMPEQUDo |
2741 | 0 | 0U, // VCMPEQUH |
2742 | 0 | 0U, // VCMPEQUHo |
2743 | 0 | 0U, // VCMPEQUW |
2744 | 0 | 0U, // VCMPEQUWo |
2745 | 0 | 0U, // VCMPGEFP |
2746 | 0 | 0U, // VCMPGEFPo |
2747 | 0 | 0U, // VCMPGTFP |
2748 | 0 | 0U, // VCMPGTFPo |
2749 | 0 | 0U, // VCMPGTSB |
2750 | 0 | 0U, // VCMPGTSBo |
2751 | 0 | 0U, // VCMPGTSD |
2752 | 0 | 0U, // VCMPGTSDo |
2753 | 0 | 0U, // VCMPGTSH |
2754 | 0 | 0U, // VCMPGTSHo |
2755 | 0 | 0U, // VCMPGTSW |
2756 | 0 | 0U, // VCMPGTSWo |
2757 | 0 | 0U, // VCMPGTUB |
2758 | 0 | 0U, // VCMPGTUBo |
2759 | 0 | 0U, // VCMPGTUD |
2760 | 0 | 0U, // VCMPGTUDo |
2761 | 0 | 0U, // VCMPGTUH |
2762 | 0 | 0U, // VCMPGTUHo |
2763 | 0 | 0U, // VCMPGTUW |
2764 | 0 | 0U, // VCMPGTUWo |
2765 | 0 | 0U, // VCTSXS |
2766 | 0 | 0U, // VCTSXS_0 |
2767 | 0 | 0U, // VCTUXS |
2768 | 0 | 0U, // VCTUXS_0 |
2769 | 0 | 0U, // VEQV |
2770 | 0 | 0U, // VEXPTEFP |
2771 | 0 | 0U, // VLOGEFP |
2772 | 0 | 80U, // VMADDFP |
2773 | 0 | 0U, // VMAXFP |
2774 | 0 | 0U, // VMAXSB |
2775 | 0 | 0U, // VMAXSD |
2776 | 0 | 0U, // VMAXSH |
2777 | 0 | 0U, // VMAXSW |
2778 | 0 | 0U, // VMAXUB |
2779 | 0 | 0U, // VMAXUD |
2780 | 0 | 0U, // VMAXUH |
2781 | 0 | 0U, // VMAXUW |
2782 | 0 | 80U, // VMHADDSHS |
2783 | 0 | 80U, // VMHRADDSHS |
2784 | 0 | 0U, // VMIDUD |
2785 | 0 | 0U, // VMINFP |
2786 | 0 | 0U, // VMINSB |
2787 | 0 | 0U, // VMINSD |
2788 | 0 | 0U, // VMINSH |
2789 | 0 | 0U, // VMINSW |
2790 | 0 | 0U, // VMINUB |
2791 | 0 | 0U, // VMINUH |
2792 | 0 | 0U, // VMINUW |
2793 | 0 | 80U, // VMLADDUHM |
2794 | 0 | 0U, // VMRGHB |
2795 | 0 | 0U, // VMRGHH |
2796 | 0 | 0U, // VMRGHW |
2797 | 0 | 0U, // VMRGLB |
2798 | 0 | 0U, // VMRGLH |
2799 | 0 | 0U, // VMRGLW |
2800 | 0 | 80U, // VMSUMMBM |
2801 | 0 | 80U, // VMSUMSHM |
2802 | 0 | 80U, // VMSUMSHS |
2803 | 0 | 80U, // VMSUMUBM |
2804 | 0 | 80U, // VMSUMUHM |
2805 | 0 | 80U, // VMSUMUHS |
2806 | 0 | 0U, // VMULESB |
2807 | 0 | 0U, // VMULESH |
2808 | 0 | 0U, // VMULESW |
2809 | 0 | 0U, // VMULEUB |
2810 | 0 | 0U, // VMULEUH |
2811 | 0 | 0U, // VMULEUW |
2812 | 0 | 0U, // VMULOSB |
2813 | 0 | 0U, // VMULOSH |
2814 | 0 | 0U, // VMULOSW |
2815 | 0 | 0U, // VMULOUB |
2816 | 0 | 0U, // VMULOUH |
2817 | 0 | 0U, // VMULOUW |
2818 | 0 | 0U, // VMULUWM |
2819 | 0 | 0U, // VNAND |
2820 | 0 | 80U, // VNMSUBFP |
2821 | 0 | 0U, // VNOR |
2822 | 0 | 0U, // VOR |
2823 | 0 | 0U, // VORC |
2824 | 0 | 80U, // VPERM |
2825 | 0 | 0U, // VPKPX |
2826 | 0 | 0U, // VPKSHSS |
2827 | 0 | 0U, // VPKSHUS |
2828 | 0 | 0U, // VPKSWSS |
2829 | 0 | 0U, // VPKSWUS |
2830 | 0 | 0U, // VPKUHUM |
2831 | 0 | 0U, // VPKUHUS |
2832 | 0 | 0U, // VPKUWUM |
2833 | 0 | 0U, // VPKUWUS |
2834 | 0 | 0U, // VPOPCNTB |
2835 | 0 | 0U, // VPOPCNTD |
2836 | 0 | 0U, // VPOPCNTH |
2837 | 0 | 0U, // VPOPCNTW |
2838 | 0 | 0U, // VREFP |
2839 | 0 | 0U, // VRFIM |
2840 | 0 | 0U, // VRFIN |
2841 | 0 | 0U, // VRFIP |
2842 | 0 | 0U, // VRFIZ |
2843 | 0 | 0U, // VRLB |
2844 | 0 | 0U, // VRLD |
2845 | 0 | 0U, // VRLH |
2846 | 0 | 0U, // VRLW |
2847 | 0 | 0U, // VRSQRTEFP |
2848 | 0 | 80U, // VSEL |
2849 | 0 | 0U, // VSL |
2850 | 0 | 0U, // VSLB |
2851 | 0 | 0U, // VSLD |
2852 | 0 | 48U, // VSLDOI |
2853 | 0 | 0U, // VSLH |
2854 | 0 | 0U, // VSLO |
2855 | 0 | 0U, // VSLW |
2856 | 0 | 0U, // VSPLTB |
2857 | 0 | 0U, // VSPLTH |
2858 | 0 | 0U, // VSPLTISB |
2859 | 0 | 0U, // VSPLTISH |
2860 | 0 | 0U, // VSPLTISW |
2861 | 0 | 0U, // VSPLTW |
2862 | 0 | 0U, // VSR |
2863 | 0 | 0U, // VSRAB |
2864 | 0 | 0U, // VSRAD |
2865 | 0 | 0U, // VSRAH |
2866 | 0 | 0U, // VSRAW |
2867 | 0 | 0U, // VSRB |
2868 | 0 | 0U, // VSRD |
2869 | 0 | 0U, // VSRH |
2870 | 0 | 0U, // VSRO |
2871 | 0 | 0U, // VSRW |
2872 | 0 | 0U, // VSUBCUW |
2873 | 0 | 0U, // VSUBFP |
2874 | 0 | 0U, // VSUBSBS |
2875 | 0 | 0U, // VSUBSHS |
2876 | 0 | 0U, // VSUBSWS |
2877 | 0 | 0U, // VSUBUBM |
2878 | 0 | 0U, // VSUBUBS |
2879 | 0 | 0U, // VSUBUDM |
2880 | 0 | 0U, // VSUBUHM |
2881 | 0 | 0U, // VSUBUHS |
2882 | 0 | 0U, // VSUBUWM |
2883 | 0 | 0U, // VSUBUWS |
2884 | 0 | 0U, // VSUM2SWS |
2885 | 0 | 0U, // VSUM4SBS |
2886 | 0 | 0U, // VSUM4SHS |
2887 | 0 | 0U, // VSUM4UBS |
2888 | 0 | 0U, // VSUMSWS |
2889 | 0 | 0U, // VUPKHPX |
2890 | 0 | 0U, // VUPKHSB |
2891 | 0 | 0U, // VUPKHSH |
2892 | 0 | 0U, // VUPKLPX |
2893 | 0 | 0U, // VUPKLSB |
2894 | 0 | 0U, // VUPKLSH |
2895 | 0 | 0U, // VXOR |
2896 | 0 | 5U, // V_SET0 |
2897 | 0 | 5U, // V_SET0B |
2898 | 0 | 5U, // V_SET0H |
2899 | 0 | 0U, // V_SETALLONES |
2900 | 0 | 0U, // V_SETALLONESB |
2901 | 0 | 0U, // V_SETALLONESH |
2902 | 0 | 0U, // WAIT |
2903 | 0 | 0U, // WRTEE |
2904 | 0 | 0U, // WRTEEI |
2905 | 0 | 0U, // XOR |
2906 | 0 | 0U, // XOR8 |
2907 | 0 | 0U, // XOR8o |
2908 | 0 | 2U, // XORI |
2909 | 0 | 2U, // XORI8 |
2910 | 0 | 2U, // XORIS |
2911 | 0 | 2U, // XORIS8 |
2912 | 0 | 0U, // XORo |
2913 | 0 | 0U, // XSABSDP |
2914 | 0 | 0U, // XSADDDP |
2915 | 0 | 0U, // XSCMPODP |
2916 | 0 | 0U, // XSCMPUDP |
2917 | 0 | 0U, // XSCPSGNDP |
2918 | 0 | 0U, // XSCVDPSP |
2919 | 0 | 0U, // XSCVDPSXDS |
2920 | 0 | 0U, // XSCVDPSXWS |
2921 | 0 | 0U, // XSCVDPUXDS |
2922 | 0 | 0U, // XSCVDPUXWS |
2923 | 0 | 0U, // XSCVSPDP |
2924 | 0 | 0U, // XSCVSXDDP |
2925 | 0 | 0U, // XSCVUXDDP |
2926 | 0 | 0U, // XSDIVDP |
2927 | 0 | 0U, // XSMADDADP |
2928 | 0 | 0U, // XSMADDMDP |
2929 | 0 | 0U, // XSMAXDP |
2930 | 0 | 0U, // XSMINDP |
2931 | 0 | 0U, // XSMSUBADP |
2932 | 0 | 0U, // XSMSUBMDP |
2933 | 0 | 0U, // XSMULDP |
2934 | 0 | 0U, // XSNABSDP |
2935 | 0 | 0U, // XSNEGDP |
2936 | 0 | 0U, // XSNMADDADP |
2937 | 0 | 0U, // XSNMADDMDP |
2938 | 0 | 0U, // XSNMSUBADP |
2939 | 0 | 0U, // XSNMSUBMDP |
2940 | 0 | 0U, // XSRDPI |
2941 | 0 | 0U, // XSRDPIC |
2942 | 0 | 0U, // XSRDPIM |
2943 | 0 | 0U, // XSRDPIP |
2944 | 0 | 0U, // XSRDPIZ |
2945 | 0 | 0U, // XSREDP |
2946 | 0 | 0U, // XSRSQRTEDP |
2947 | 0 | 0U, // XSSQRTDP |
2948 | 0 | 0U, // XSSUBDP |
2949 | 0 | 0U, // XSTDIVDP |
2950 | 0 | 0U, // XSTSQRTDP |
2951 | 0 | 0U, // XVABSDP |
2952 | 0 | 0U, // XVABSSP |
2953 | 0 | 0U, // XVADDDP |
2954 | 0 | 0U, // XVADDSP |
2955 | 0 | 0U, // XVCMPEQDP |
2956 | 0 | 0U, // XVCMPEQDPo |
2957 | 0 | 0U, // XVCMPEQSP |
2958 | 0 | 0U, // XVCMPEQSPo |
2959 | 0 | 0U, // XVCMPGEDP |
2960 | 0 | 0U, // XVCMPGEDPo |
2961 | 0 | 0U, // XVCMPGESP |
2962 | 0 | 0U, // XVCMPGESPo |
2963 | 0 | 0U, // XVCMPGTDP |
2964 | 0 | 0U, // XVCMPGTDPo |
2965 | 0 | 0U, // XVCMPGTSP |
2966 | 0 | 0U, // XVCMPGTSPo |
2967 | 0 | 0U, // XVCPSGNDP |
2968 | 0 | 0U, // XVCPSGNSP |
2969 | 0 | 0U, // XVCVDPSP |
2970 | 0 | 0U, // XVCVDPSXDS |
2971 | 0 | 0U, // XVCVDPSXWS |
2972 | 0 | 0U, // XVCVDPUXDS |
2973 | 0 | 0U, // XVCVDPUXWS |
2974 | 0 | 0U, // XVCVSPDP |
2975 | 0 | 0U, // XVCVSPSXDS |
2976 | 0 | 0U, // XVCVSPSXWS |
2977 | 0 | 0U, // XVCVSPUXDS |
2978 | 0 | 0U, // XVCVSPUXWS |
2979 | 0 | 0U, // XVCVSXDDP |
2980 | 0 | 0U, // XVCVSXDSP |
2981 | 0 | 0U, // XVCVSXWDP |
2982 | 0 | 0U, // XVCVSXWSP |
2983 | 0 | 0U, // XVCVUXDDP |
2984 | 0 | 0U, // XVCVUXDSP |
2985 | 0 | 0U, // XVCVUXWDP |
2986 | 0 | 0U, // XVCVUXWSP |
2987 | 0 | 0U, // XVDIVDP |
2988 | 0 | 0U, // XVDIVSP |
2989 | 0 | 0U, // XVMADDADP |
2990 | 0 | 0U, // XVMADDASP |
2991 | 0 | 0U, // XVMADDMDP |
2992 | 0 | 0U, // XVMADDMSP |
2993 | 0 | 0U, // XVMAXDP |
2994 | 0 | 0U, // XVMAXSP |
2995 | 0 | 0U, // XVMINDP |
2996 | 0 | 0U, // XVMINSP |
2997 | 0 | 0U, // XVMSUBADP |
2998 | 0 | 0U, // XVMSUBASP |
2999 | 0 | 0U, // XVMSUBMDP |
3000 | 0 | 0U, // XVMSUBMSP |
3001 | 0 | 0U, // XVMULDP |
3002 | 0 | 0U, // XVMULSP |
3003 | 0 | 0U, // XVNABSDP |
3004 | 0 | 0U, // XVNABSSP |
3005 | 0 | 0U, // XVNEGDP |
3006 | 0 | 0U, // XVNEGSP |
3007 | 0 | 0U, // XVNMADDADP |
3008 | 0 | 0U, // XVNMADDASP |
3009 | 0 | 0U, // XVNMADDMDP |
3010 | 0 | 0U, // XVNMADDMSP |
3011 | 0 | 0U, // XVNMSUBADP |
3012 | 0 | 0U, // XVNMSUBASP |
3013 | 0 | 0U, // XVNMSUBMDP |
3014 | 0 | 0U, // XVNMSUBMSP |
3015 | 0 | 0U, // XVRDPI |
3016 | 0 | 0U, // XVRDPIC |
3017 | 0 | 0U, // XVRDPIM |
3018 | 0 | 0U, // XVRDPIP |
3019 | 0 | 0U, // XVRDPIZ |
3020 | 0 | 0U, // XVREDP |
3021 | 0 | 0U, // XVRESP |
3022 | 0 | 0U, // XVRSPI |
3023 | 0 | 0U, // XVRSPIC |
3024 | 0 | 0U, // XVRSPIM |
3025 | 0 | 0U, // XVRSPIP |
3026 | 0 | 0U, // XVRSPIZ |
3027 | 0 | 0U, // XVRSQRTEDP |
3028 | 0 | 0U, // XVRSQRTESP |
3029 | 0 | 0U, // XVSQRTDP |
3030 | 0 | 0U, // XVSQRTSP |
3031 | 0 | 0U, // XVSUBDP |
3032 | 0 | 0U, // XVSUBSP |
3033 | 0 | 0U, // XVTDIVDP |
3034 | 0 | 0U, // XVTDIVSP |
3035 | 0 | 0U, // XVTSQRTDP |
3036 | 0 | 0U, // XVTSQRTSP |
3037 | 0 | 0U, // XXLAND |
3038 | 0 | 0U, // XXLANDC |
3039 | 0 | 0U, // XXLEQV |
3040 | 0 | 0U, // XXLNAND |
3041 | 0 | 0U, // XXLNOR |
3042 | 0 | 0U, // XXLOR |
3043 | 0 | 0U, // XXLORC |
3044 | 0 | 0U, // XXLORf |
3045 | 0 | 0U, // XXLXOR |
3046 | 0 | 0U, // XXMRGHW |
3047 | 0 | 0U, // XXMRGLW |
3048 | 0 | 112U, // XXPERMDI |
3049 | 0 | 80U, // XXSEL |
3050 | 0 | 112U, // XXSLDWI |
3051 | 0 | 6U, // XXSPLTW |
3052 | 0 | 8U, // gBC |
3053 | 0 | 9U, // gBCA |
3054 | 0 | 0U, // gBCCTR |
3055 | 0 | 0U, // gBCCTRL |
3056 | 0 | 8U, // gBCL |
3057 | 0 | 9U, // gBCLA |
3058 | 0 | 0U, // gBCLR |
3059 | 0 | 0U, // gBCLRL |
3060 | 0 | 0U |
3061 | 0 | }; |
3062 | |
|
3063 | 0 | #ifndef CAPSTONE_DIET |
3064 | 0 | static const char AsmStrs[] = { |
3065 | 0 | /* 0 */ '#', 'E', 'H', '_', 'S', 'j', 'L', 'j', '_', 'S', 'e', 't', 'u', 'p', 9, 0, |
3066 | 0 | /* 16 */ 'b', 'd', 'z', 'l', 'a', '+', 32, 0, |
3067 | 0 | /* 24 */ 'b', 'd', 'n', 'z', 'l', 'a', '+', 32, 0, |
3068 | 0 | /* 33 */ 'b', 'd', 'z', 'a', '+', 32, 0, |
3069 | 0 | /* 40 */ 'b', 'd', 'n', 'z', 'a', '+', 32, 0, |
3070 | 0 | /* 48 */ 'b', 'd', 'z', 'l', '+', 32, 0, |
3071 | 0 | /* 55 */ 'b', 'd', 'n', 'z', 'l', '+', 32, 0, |
3072 | 0 | /* 63 */ 'b', 'd', 'z', '+', 32, 0, |
3073 | 0 | /* 69 */ 'b', 'd', 'n', 'z', '+', 32, 0, |
3074 | 0 | /* 76 */ 'b', 'c', 'l', 32, '2', '0', ',', 32, '3', '1', ',', 32, 0, |
3075 | 0 | /* 89 */ 'b', 'c', 't', 'r', 'l', 10, 9, 'l', 'd', 32, '2', ',', 32, 0, |
3076 | 0 | /* 103 */ 'b', 'c', 32, '1', '2', ',', 32, 0, |
3077 | 0 | /* 111 */ 'b', 'c', 'l', 32, '1', '2', ',', 32, 0, |
3078 | 0 | /* 120 */ 'b', 'c', 'l', 'r', 'l', 32, '1', '2', ',', 32, 0, |
3079 | 0 | /* 131 */ 'b', 'c', 'c', 't', 'r', 'l', 32, '1', '2', ',', 32, 0, |
3080 | 0 | /* 143 */ 'b', 'c', 'l', 'r', 32, '1', '2', ',', 32, 0, |
3081 | 0 | /* 153 */ 'b', 'c', 'c', 't', 'r', 32, '1', '2', ',', 32, 0, |
3082 | 0 | /* 164 */ 'b', 'c', 32, '4', ',', 32, 0, |
3083 | 0 | /* 171 */ 'b', 'c', 'l', 32, '4', ',', 32, 0, |
3084 | 0 | /* 179 */ 'b', 'c', 'l', 'r', 'l', 32, '4', ',', 32, 0, |
3085 | 0 | /* 189 */ 'b', 'c', 'c', 't', 'r', 'l', 32, '4', ',', 32, 0, |
3086 | 0 | /* 200 */ 'b', 'c', 'l', 'r', 32, '4', ',', 32, 0, |
3087 | 0 | /* 209 */ 'b', 'c', 'c', 't', 'r', 32, '4', ',', 32, 0, |
3088 | 0 | /* 219 */ 'm', 't', 's', 'p', 'r', 32, '2', '5', '6', ',', 32, 0, |
3089 | 0 | /* 231 */ 'b', 'd', 'z', 'l', 'a', '-', 32, 0, |
3090 | 0 | /* 239 */ 'b', 'd', 'n', 'z', 'l', 'a', '-', 32, 0, |
3091 | 0 | /* 248 */ 'b', 'd', 'z', 'a', '-', 32, 0, |
3092 | 0 | /* 255 */ 'b', 'd', 'n', 'z', 'a', '-', 32, 0, |
3093 | 0 | /* 263 */ 'b', 'd', 'z', 'l', '-', 32, 0, |
3094 | 0 | /* 270 */ 'b', 'd', 'n', 'z', 'l', '-', 32, 0, |
3095 | 0 | /* 278 */ 'b', 'd', 'z', '-', 32, 0, |
3096 | 0 | /* 284 */ 'b', 'd', 'n', 'z', '-', 32, 0, |
3097 | 0 | /* 291 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'b', '.', 32, 0, |
3098 | 0 | /* 302 */ 'e', 'x', 't', 's', 'b', '.', 32, 0, |
3099 | 0 | /* 310 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'b', '.', 32, 0, |
3100 | 0 | /* 321 */ 'f', 's', 'u', 'b', '.', 32, 0, |
3101 | 0 | /* 328 */ 'f', 'm', 's', 'u', 'b', '.', 32, 0, |
3102 | 0 | /* 336 */ 'f', 'n', 'm', 's', 'u', 'b', '.', 32, 0, |
3103 | 0 | /* 345 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'b', '.', 32, 0, |
3104 | 0 | /* 356 */ 'a', 'd', 'd', 'c', '.', 32, 0, |
3105 | 0 | /* 363 */ 'a', 'n', 'd', 'c', '.', 32, 0, |
3106 | 0 | /* 370 */ 's', 'u', 'b', 'f', 'c', '.', 32, 0, |
3107 | 0 | /* 378 */ 's', 'u', 'b', 'i', 'c', '.', 32, 0, |
3108 | 0 | /* 386 */ 'a', 'd', 'd', 'i', 'c', '.', 32, 0, |
3109 | 0 | /* 394 */ 'r', 'l', 'd', 'i', 'c', '.', 32, 0, |
3110 | 0 | /* 402 */ 'o', 'r', 'c', '.', 32, 0, |
3111 | 0 | /* 408 */ 's', 'r', 'a', 'd', '.', 32, 0, |
3112 | 0 | /* 415 */ 'f', 'a', 'd', 'd', '.', 32, 0, |
3113 | 0 | /* 422 */ 'f', 'm', 'a', 'd', 'd', '.', 32, 0, |
3114 | 0 | /* 430 */ 'f', 'n', 'm', 'a', 'd', 'd', '.', 32, 0, |
3115 | 0 | /* 439 */ 'm', 'u', 'l', 'h', 'd', '.', 32, 0, |
3116 | 0 | /* 447 */ 'f', 'c', 'f', 'i', 'd', '.', 32, 0, |
3117 | 0 | /* 455 */ 'f', 'c', 't', 'i', 'd', '.', 32, 0, |
3118 | 0 | /* 463 */ 'm', 'u', 'l', 'l', 'd', '.', 32, 0, |
3119 | 0 | /* 471 */ 's', 'l', 'd', '.', 32, 0, |
3120 | 0 | /* 477 */ 'n', 'a', 'n', 'd', '.', 32, 0, |
3121 | 0 | /* 484 */ 's', 'r', 'd', '.', 32, 0, |
3122 | 0 | /* 490 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'd', '.', 32, 0, |
3123 | 0 | /* 501 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'd', '.', 32, 0, |
3124 | 0 | /* 512 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'd', '.', 32, 0, |
3125 | 0 | /* 523 */ 'd', 'i', 'v', 'd', '.', 32, 0, |
3126 | 0 | /* 530 */ 'c', 'n', 't', 'l', 'z', 'd', '.', 32, 0, |
3127 | 0 | /* 539 */ 'a', 'd', 'd', 'e', '.', 32, 0, |
3128 | 0 | /* 546 */ 's', 'u', 'b', 'f', 'e', '.', 32, 0, |
3129 | 0 | /* 554 */ 'a', 'd', 'd', 'm', 'e', '.', 32, 0, |
3130 | 0 | /* 562 */ 's', 'u', 'b', 'f', 'm', 'e', '.', 32, 0, |
3131 | 0 | /* 571 */ 'f', 'r', 'e', '.', 32, 0, |
3132 | 0 | /* 577 */ 'f', 'r', 's', 'q', 'r', 't', 'e', '.', 32, 0, |
3133 | 0 | /* 587 */ 'a', 'd', 'd', 'z', 'e', '.', 32, 0, |
3134 | 0 | /* 595 */ 's', 'u', 'b', 'f', 'z', 'e', '.', 32, 0, |
3135 | 0 | /* 604 */ 's', 'u', 'b', 'f', '.', 32, 0, |
3136 | 0 | /* 611 */ 'm', 't', 'f', 's', 'f', '.', 32, 0, |
3137 | 0 | /* 619 */ 'f', 'n', 'e', 'g', '.', 32, 0, |
3138 | 0 | /* 626 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'h', '.', 32, 0, |
3139 | 0 | /* 637 */ 'e', 'x', 't', 's', 'h', '.', 32, 0, |
3140 | 0 | /* 645 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'h', '.', 32, 0, |
3141 | 0 | /* 656 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'h', '.', 32, 0, |
3142 | 0 | /* 667 */ 's', 'r', 'a', 'd', 'i', '.', 32, 0, |
3143 | 0 | /* 675 */ 'c', 'l', 'r', 'l', 's', 'l', 'd', 'i', '.', 32, 0, |
3144 | 0 | /* 686 */ 'e', 'x', 't', 'l', 'd', 'i', '.', 32, 0, |
3145 | 0 | /* 695 */ 'a', 'n', 'd', 'i', '.', 32, 0, |
3146 | 0 | /* 702 */ 'c', 'l', 'r', 'r', 'd', 'i', '.', 32, 0, |
3147 | 0 | /* 711 */ 'i', 'n', 's', 'r', 'd', 'i', '.', 32, 0, |
3148 | 0 | /* 720 */ 'r', 'o', 't', 'r', 'd', 'i', '.', 32, 0, |
3149 | 0 | /* 729 */ 'e', 'x', 't', 'r', 'd', 'i', '.', 32, 0, |
3150 | 0 | /* 738 */ 'm', 't', 'f', 's', 'f', 'i', '.', 32, 0, |
3151 | 0 | /* 747 */ 'r', 'l', 'd', 'i', 'm', 'i', '.', 32, 0, |
3152 | 0 | /* 756 */ 'r', 'l', 'w', 'i', 'm', 'i', '.', 32, 0, |
3153 | 0 | /* 765 */ 's', 'r', 'a', 'w', 'i', '.', 32, 0, |
3154 | 0 | /* 773 */ 'c', 'l', 'r', 'l', 's', 'l', 'w', 'i', '.', 32, 0, |
3155 | 0 | /* 784 */ 'i', 'n', 's', 'l', 'w', 'i', '.', 32, 0, |
3156 | 0 | /* 793 */ 'e', 'x', 't', 'l', 'w', 'i', '.', 32, 0, |
3157 | 0 | /* 802 */ 'c', 'l', 'r', 'r', 'w', 'i', '.', 32, 0, |
3158 | 0 | /* 811 */ 'i', 'n', 's', 'r', 'w', 'i', '.', 32, 0, |
3159 | 0 | /* 820 */ 'r', 'o', 't', 'r', 'w', 'i', '.', 32, 0, |
3160 | 0 | /* 829 */ 'e', 'x', 't', 'r', 'w', 'i', '.', 32, 0, |
3161 | 0 | /* 838 */ 'r', 'l', 'd', 'c', 'l', '.', 32, 0, |
3162 | 0 | /* 846 */ 'r', 'l', 'd', 'i', 'c', 'l', '.', 32, 0, |
3163 | 0 | /* 855 */ 'f', 's', 'e', 'l', '.', 32, 0, |
3164 | 0 | /* 862 */ 'f', 'm', 'u', 'l', '.', 32, 0, |
3165 | 0 | /* 869 */ 'f', 'r', 'i', 'm', '.', 32, 0, |
3166 | 0 | /* 876 */ 'r', 'l', 'w', 'i', 'n', 'm', '.', 32, 0, |
3167 | 0 | /* 885 */ 'r', 'l', 'w', 'n', 'm', '.', 32, 0, |
3168 | 0 | /* 893 */ 'f', 'c', 'p', 's', 'g', 'n', '.', 32, 0, |
3169 | 0 | /* 902 */ 'f', 'r', 'i', 'n', '.', 32, 0, |
3170 | 0 | /* 909 */ 'x', 'v', 'c', 'm', 'p', 'g', 'e', 'd', 'p', '.', 32, 0, |
3171 | 0 | /* 921 */ 'x', 'v', 'c', 'm', 'p', 'e', 'q', 'd', 'p', '.', 32, 0, |
3172 | 0 | /* 933 */ 'x', 'v', 'c', 'm', 'p', 'g', 't', 'd', 'p', '.', 32, 0, |
3173 | 0 | /* 945 */ 'v', 'c', 'm', 'p', 'b', 'f', 'p', '.', 32, 0, |
3174 | 0 | /* 955 */ 'v', 'c', 'm', 'p', 'g', 'e', 'f', 'p', '.', 32, 0, |
3175 | 0 | /* 966 */ 'v', 'c', 'm', 'p', 'e', 'q', 'f', 'p', '.', 32, 0, |
3176 | 0 | /* 977 */ 'v', 'c', 'm', 'p', 'g', 't', 'f', 'p', '.', 32, 0, |
3177 | 0 | /* 988 */ 'f', 'r', 'i', 'p', '.', 32, 0, |
3178 | 0 | /* 995 */ 'x', 'v', 'c', 'm', 'p', 'g', 'e', 's', 'p', '.', 32, 0, |
3179 | 0 | /* 1007 */ 'x', 'v', 'c', 'm', 'p', 'e', 'q', 's', 'p', '.', 32, 0, |
3180 | 0 | /* 1019 */ 'f', 'r', 's', 'p', '.', 32, 0, |
3181 | 0 | /* 1026 */ 'x', 'v', 'c', 'm', 'p', 'g', 't', 's', 'p', '.', 32, 0, |
3182 | 0 | /* 1038 */ 'r', 'l', 'd', 'c', 'r', '.', 32, 0, |
3183 | 0 | /* 1046 */ 'r', 'l', 'd', 'i', 'c', 'r', '.', 32, 0, |
3184 | 0 | /* 1055 */ 'f', 'm', 'r', '.', 32, 0, |
3185 | 0 | /* 1061 */ 'n', 'o', 'r', '.', 32, 0, |
3186 | 0 | /* 1067 */ 'x', 'o', 'r', '.', 32, 0, |
3187 | 0 | /* 1073 */ 'f', 'a', 'b', 's', '.', 32, 0, |
3188 | 0 | /* 1080 */ 'f', 'n', 'a', 'b', 's', '.', 32, 0, |
3189 | 0 | /* 1088 */ 'f', 's', 'u', 'b', 's', '.', 32, 0, |
3190 | 0 | /* 1096 */ 'f', 'm', 's', 'u', 'b', 's', '.', 32, 0, |
3191 | 0 | /* 1105 */ 'f', 'n', 'm', 's', 'u', 'b', 's', '.', 32, 0, |
3192 | 0 | /* 1115 */ 'f', 'a', 'd', 'd', 's', '.', 32, 0, |
3193 | 0 | /* 1123 */ 'f', 'm', 'a', 'd', 'd', 's', '.', 32, 0, |
3194 | 0 | /* 1132 */ 'f', 'n', 'm', 'a', 'd', 'd', 's', '.', 32, 0, |
3195 | 0 | /* 1142 */ 'f', 'c', 'f', 'i', 'd', 's', '.', 32, 0, |
3196 | 0 | /* 1151 */ 'f', 'r', 'e', 's', '.', 32, 0, |
3197 | 0 | /* 1158 */ 'f', 'r', 's', 'q', 'r', 't', 'e', 's', '.', 32, 0, |
3198 | 0 | /* 1169 */ 'm', 'f', 'f', 's', '.', 32, 0, |
3199 | 0 | /* 1176 */ 'a', 'n', 'd', 'i', 's', '.', 32, 0, |
3200 | 0 | /* 1184 */ 'f', 'm', 'u', 'l', 's', '.', 32, 0, |
3201 | 0 | /* 1192 */ 'f', 's', 'q', 'r', 't', 's', '.', 32, 0, |
3202 | 0 | /* 1201 */ 'f', 'c', 'f', 'i', 'd', 'u', 's', '.', 32, 0, |
3203 | 0 | /* 1211 */ 'f', 'd', 'i', 'v', 's', '.', 32, 0, |
3204 | 0 | /* 1219 */ 'f', 's', 'q', 'r', 't', '.', 32, 0, |
3205 | 0 | /* 1227 */ 'm', 'u', 'l', 'h', 'd', 'u', '.', 32, 0, |
3206 | 0 | /* 1236 */ 'f', 'c', 'f', 'i', 'd', 'u', '.', 32, 0, |
3207 | 0 | /* 1245 */ 'd', 'i', 'v', 'd', 'u', '.', 32, 0, |
3208 | 0 | /* 1253 */ 'm', 'u', 'l', 'h', 'w', 'u', '.', 32, 0, |
3209 | 0 | /* 1262 */ 'd', 'i', 'v', 'w', 'u', '.', 32, 0, |
3210 | 0 | /* 1270 */ 'f', 'd', 'i', 'v', '.', 32, 0, |
3211 | 0 | /* 1277 */ 'e', 'q', 'v', '.', 32, 0, |
3212 | 0 | /* 1283 */ 's', 'r', 'a', 'w', '.', 32, 0, |
3213 | 0 | /* 1290 */ 'm', 'u', 'l', 'h', 'w', '.', 32, 0, |
3214 | 0 | /* 1298 */ 'f', 'c', 't', 'i', 'w', '.', 32, 0, |
3215 | 0 | /* 1306 */ 'm', 'u', 'l', 'l', 'w', '.', 32, 0, |
3216 | 0 | /* 1314 */ 's', 'l', 'w', '.', 32, 0, |
3217 | 0 | /* 1320 */ 's', 'r', 'w', '.', 32, 0, |
3218 | 0 | /* 1326 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'w', '.', 32, 0, |
3219 | 0 | /* 1337 */ 'e', 'x', 't', 's', 'w', '.', 32, 0, |
3220 | 0 | /* 1345 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'w', '.', 32, 0, |
3221 | 0 | /* 1356 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'w', '.', 32, 0, |
3222 | 0 | /* 1367 */ 'd', 'i', 'v', 'w', '.', 32, 0, |
3223 | 0 | /* 1374 */ 'c', 'n', 't', 'l', 'z', 'w', '.', 32, 0, |
3224 | 0 | /* 1383 */ 's', 't', 'd', 'c', 'x', '.', 32, 0, |
3225 | 0 | /* 1391 */ 's', 't', 'w', 'c', 'x', '.', 32, 0, |
3226 | 0 | /* 1399 */ 't', 'l', 'b', 's', 'x', '.', 32, 0, |
3227 | 0 | /* 1407 */ 'f', 'c', 't', 'i', 'd', 'z', '.', 32, 0, |
3228 | 0 | /* 1416 */ 'f', 'r', 'i', 'z', '.', 32, 0, |
3229 | 0 | /* 1423 */ 'f', 'c', 't', 'i', 'd', 'u', 'z', '.', 32, 0, |
3230 | 0 | /* 1433 */ 'f', 'c', 't', 'i', 'w', 'u', 'z', '.', 32, 0, |
3231 | 0 | /* 1443 */ 'f', 'c', 't', 'i', 'w', 'z', '.', 32, 0, |
3232 | 0 | /* 1452 */ 'm', 't', 'f', 's', 'b', '0', 32, 0, |
3233 | 0 | /* 1460 */ 'm', 't', 'f', 's', 'b', '1', 32, 0, |
3234 | 0 | /* 1468 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'M', 'P', '_', 'S', 'W', 'A', 'P', '_', 'I', '3', '2', 32, 0, |
3235 | 0 | /* 1490 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'M', 'P', '_', 'S', 'W', 'A', 'P', '_', 'I', '1', '6', 32, 0, |
3236 | 0 | /* 1512 */ '#', 'T', 'C', '_', 'R', 'E', 'T', 'U', 'R', 'N', 'a', '8', 32, 0, |
3237 | 0 | /* 1526 */ '#', 'T', 'C', '_', 'R', 'E', 'T', 'U', 'R', 'N', 'd', '8', 32, 0, |
3238 | 0 | /* 1540 */ '#', 'T', 'C', '_', 'R', 'E', 'T', 'U', 'R', 'N', 'r', '8', 32, 0, |
3239 | 0 | /* 1554 */ 'U', 'P', 'D', 'A', 'T', 'E', '_', 'V', 'R', 'S', 'A', 'V', 'E', 32, 0, |
3240 | 0 | /* 1569 */ '#', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 32, 0, |
3241 | 0 | /* 1588 */ '#', 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 32, 0, |
3242 | 0 | /* 1605 */ '#', 'T', 'C', '_', 'R', 'E', 'T', 'U', 'R', 'N', 'a', 32, 0, |
3243 | 0 | /* 1618 */ 'e', 'v', 'm', 'h', 'e', 'g', 's', 'm', 'f', 'a', 'a', 32, 0, |
3244 | 0 | /* 1631 */ 'e', 'v', 'm', 'h', 'o', 'g', 's', 'm', 'f', 'a', 'a', 32, 0, |
3245 | 0 | /* 1644 */ 'e', 'v', 'm', 'w', 's', 'm', 'f', 'a', 'a', 32, 0, |
3246 | 0 | /* 1655 */ 'e', 'v', 'm', 'w', 's', 's', 'f', 'a', 'a', 32, 0, |
3247 | 0 | /* 1666 */ 'e', 'v', 'm', 'h', 'e', 'g', 's', 'm', 'i', 'a', 'a', 32, 0, |
3248 | 0 | /* 1679 */ 'e', 'v', 'm', 'h', 'o', 'g', 's', 'm', 'i', 'a', 'a', 32, 0, |
3249 | 0 | /* 1692 */ 'e', 'v', 'm', 'w', 's', 'm', 'i', 'a', 'a', 32, 0, |
3250 | 0 | /* 1703 */ 'e', 'v', 'm', 'h', 'e', 'g', 'u', 'm', 'i', 'a', 'a', 32, 0, |
3251 | 0 | /* 1716 */ 'e', 'v', 'm', 'h', 'o', 'g', 'u', 'm', 'i', 'a', 'a', 32, 0, |
3252 | 0 | /* 1729 */ 'e', 'v', 'm', 'w', 'u', 'm', 'i', 'a', 'a', 32, 0, |
3253 | 0 | /* 1740 */ 'd', 'c', 'b', 'a', 32, 0, |
3254 | 0 | /* 1746 */ 'b', 'c', 'a', 32, 0, |
3255 | 0 | /* 1751 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'f', 'a', 32, 0, |
3256 | 0 | /* 1762 */ 'e', 'v', 'm', 'w', 'h', 's', 'm', 'f', 'a', 32, 0, |
3257 | 0 | /* 1773 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'f', 'a', 32, 0, |
3258 | 0 | /* 1784 */ 'e', 'v', 'm', 'w', 's', 'm', 'f', 'a', 32, 0, |
3259 | 0 | /* 1794 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'f', 'a', 32, 0, |
3260 | 0 | /* 1805 */ 'e', 'v', 'm', 'w', 'h', 's', 's', 'f', 'a', 32, 0, |
3261 | 0 | /* 1816 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'f', 'a', 32, 0, |
3262 | 0 | /* 1827 */ 'e', 'v', 'm', 'w', 's', 's', 'f', 'a', 32, 0, |
3263 | 0 | /* 1837 */ 'l', 'h', 'a', 32, 0, |
3264 | 0 | /* 1842 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'i', 'a', 32, 0, |
3265 | 0 | /* 1853 */ 'e', 'v', 'm', 'w', 'h', 's', 'm', 'i', 'a', 32, 0, |
3266 | 0 | /* 1864 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'i', 'a', 32, 0, |
3267 | 0 | /* 1875 */ 'e', 'v', 'm', 'w', 's', 'm', 'i', 'a', 32, 0, |
3268 | 0 | /* 1885 */ 'e', 'v', 'm', 'h', 'e', 'u', 'm', 'i', 'a', 32, 0, |
3269 | 0 | /* 1896 */ 'e', 'v', 'm', 'w', 'h', 'u', 'm', 'i', 'a', 32, 0, |
3270 | 0 | /* 1907 */ 'e', 'v', 'm', 'w', 'l', 'u', 'm', 'i', 'a', 32, 0, |
3271 | 0 | /* 1918 */ 'e', 'v', 'm', 'h', 'o', 'u', 'm', 'i', 'a', 32, 0, |
3272 | 0 | /* 1929 */ 'e', 'v', 'm', 'w', 'u', 'm', 'i', 'a', 32, 0, |
3273 | 0 | /* 1939 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'x', 'i', 'a', 32, 0, |
3274 | 0 | /* 1951 */ 'q', 'v', 's', 't', 'f', 'd', 'x', 'i', 'a', 32, 0, |
3275 | 0 | /* 1962 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'x', 'i', 'a', 32, 0, |
3276 | 0 | /* 1974 */ 'q', 'v', 's', 't', 'f', 's', 'x', 'i', 'a', 32, 0, |
3277 | 0 | /* 1985 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'u', 'x', 'i', 'a', 32, 0, |
3278 | 0 | /* 1998 */ 'q', 'v', 's', 't', 'f', 'd', 'u', 'x', 'i', 'a', 32, 0, |
3279 | 0 | /* 2010 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'u', 'x', 'i', 'a', 32, 0, |
3280 | 0 | /* 2023 */ 'q', 'v', 's', 't', 'f', 's', 'u', 'x', 'i', 'a', 32, 0, |
3281 | 0 | /* 2035 */ 'b', 'l', 'a', 32, 0, |
3282 | 0 | /* 2040 */ 'b', 'c', 'l', 'a', 32, 0, |
3283 | 0 | /* 2046 */ 'b', 'd', 'z', 'l', 'a', 32, 0, |
3284 | 0 | /* 2053 */ 'b', 'd', 'n', 'z', 'l', 'a', 32, 0, |
3285 | 0 | /* 2061 */ 'e', 'v', 'm', 'r', 'a', 32, 0, |
3286 | 0 | /* 2068 */ 'l', 'w', 'a', 32, 0, |
3287 | 0 | /* 2073 */ 'q', 'v', 'l', 'f', 'i', 'w', 'a', 'x', 'a', 32, 0, |
3288 | 0 | /* 2084 */ 'q', 'v', 'l', 'f', 'c', 'd', 'x', 'a', 32, 0, |
3289 | 0 | /* 2094 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'x', 'a', 32, 0, |
3290 | 0 | /* 2105 */ 'q', 'v', 'l', 'f', 'd', 'x', 'a', 32, 0, |
3291 | 0 | /* 2114 */ 'q', 'v', 's', 't', 'f', 'd', 'x', 'a', 32, 0, |
3292 | 0 | /* 2124 */ 'q', 'v', 'l', 'f', 'c', 's', 'x', 'a', 32, 0, |
3293 | 0 | /* 2134 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'x', 'a', 32, 0, |
3294 | 0 | /* 2145 */ 'q', 'v', 'l', 'f', 's', 'x', 'a', 32, 0, |
3295 | 0 | /* 2154 */ 'q', 'v', 's', 't', 'f', 's', 'x', 'a', 32, 0, |
3296 | 0 | /* 2164 */ 'q', 'v', 'l', 'f', 'c', 'd', 'u', 'x', 'a', 32, 0, |
3297 | 0 | /* 2175 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'u', 'x', 'a', 32, 0, |
3298 | 0 | /* 2187 */ 'q', 'v', 'l', 'f', 'd', 'u', 'x', 'a', 32, 0, |
3299 | 0 | /* 2197 */ 'q', 'v', 's', 't', 'f', 'd', 'u', 'x', 'a', 32, 0, |
3300 | 0 | /* 2208 */ 'q', 'v', 'l', 'f', 'c', 's', 'u', 'x', 'a', 32, 0, |
3301 | 0 | /* 2219 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'u', 'x', 'a', 32, 0, |
3302 | 0 | /* 2231 */ 'q', 'v', 'l', 'f', 's', 'u', 'x', 'a', 32, 0, |
3303 | 0 | /* 2241 */ 'q', 'v', 's', 't', 'f', 's', 'u', 'x', 'a', 32, 0, |
3304 | 0 | /* 2252 */ 'q', 'v', 's', 't', 'f', 'i', 'w', 'x', 'a', 32, 0, |
3305 | 0 | /* 2263 */ 'q', 'v', 'l', 'f', 'i', 'w', 'z', 'x', 'a', 32, 0, |
3306 | 0 | /* 2274 */ 'b', 'd', 'z', 'a', 32, 0, |
3307 | 0 | /* 2280 */ 'b', 'd', 'n', 'z', 'a', 32, 0, |
3308 | 0 | /* 2287 */ 'v', 's', 'r', 'a', 'b', 32, 0, |
3309 | 0 | /* 2294 */ 'v', 'm', 'r', 'g', 'h', 'b', 32, 0, |
3310 | 0 | /* 2302 */ 'v', 'm', 'r', 'g', 'l', 'b', 32, 0, |
3311 | 0 | /* 2310 */ 'v', 'r', 'l', 'b', 32, 0, |
3312 | 0 | /* 2316 */ 'v', 's', 'l', 'b', 32, 0, |
3313 | 0 | /* 2322 */ 'c', 'm', 'p', 'b', 32, 0, |
3314 | 0 | /* 2328 */ 'v', 's', 'r', 'b', 32, 0, |
3315 | 0 | /* 2334 */ 'v', 'm', 'u', 'l', 'e', 's', 'b', 32, 0, |
3316 | 0 | /* 2343 */ 'v', 'a', 'v', 'g', 's', 'b', 32, 0, |
3317 | 0 | /* 2351 */ 'v', 'u', 'p', 'k', 'h', 's', 'b', 32, 0, |
3318 | 0 | /* 2360 */ 'v', 's', 'p', 'l', 't', 'i', 's', 'b', 32, 0, |
3319 | 0 | /* 2370 */ 'v', 'u', 'p', 'k', 'l', 's', 'b', 32, 0, |
3320 | 0 | /* 2379 */ 'v', 'm', 'i', 'n', 's', 'b', 32, 0, |
3321 | 0 | /* 2387 */ 'v', 'm', 'u', 'l', 'o', 's', 'b', 32, 0, |
3322 | 0 | /* 2396 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'b', 32, 0, |
3323 | 0 | /* 2406 */ 'e', 'v', 'e', 'x', 't', 's', 'b', 32, 0, |
3324 | 0 | /* 2415 */ 'v', 'm', 'a', 'x', 's', 'b', 32, 0, |
3325 | 0 | /* 2423 */ 'm', 'f', 't', 'b', 32, 0, |
3326 | 0 | /* 2429 */ 'v', 's', 'p', 'l', 't', 'b', 32, 0, |
3327 | 0 | /* 2437 */ 'v', 'p', 'o', 'p', 'c', 'n', 't', 'b', 32, 0, |
3328 | 0 | /* 2447 */ 's', 't', 'b', 32, 0, |
3329 | 0 | /* 2452 */ 'v', 'm', 'u', 'l', 'e', 'u', 'b', 32, 0, |
3330 | 0 | /* 2461 */ 'v', 'a', 'v', 'g', 'u', 'b', 32, 0, |
3331 | 0 | /* 2469 */ 'v', 'm', 'i', 'n', 'u', 'b', 32, 0, |
3332 | 0 | /* 2477 */ 'v', 'm', 'u', 'l', 'o', 'u', 'b', 32, 0, |
3333 | 0 | /* 2486 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'b', 32, 0, |
3334 | 0 | /* 2496 */ 'q', 'v', 'f', 's', 'u', 'b', 32, 0, |
3335 | 0 | /* 2504 */ 'q', 'v', 'f', 'm', 's', 'u', 'b', 32, 0, |
3336 | 0 | /* 2513 */ 'q', 'v', 'f', 'n', 'm', 's', 'u', 'b', 32, 0, |
3337 | 0 | /* 2523 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'b', 32, 0, |
3338 | 0 | /* 2533 */ 'v', 'm', 'a', 'x', 'u', 'b', 32, 0, |
3339 | 0 | /* 2541 */ 'v', 'c', 'l', 'z', 'b', 32, 0, |
3340 | 0 | /* 2548 */ 'b', 'c', 32, 0, |
3341 | 0 | /* 2552 */ 'a', 'd', 'd', 'c', 32, 0, |
3342 | 0 | /* 2558 */ 'x', 'x', 'l', 'a', 'n', 'd', 'c', 32, 0, |
3343 | 0 | /* 2567 */ 'c', 'r', 'a', 'n', 'd', 'c', 32, 0, |
3344 | 0 | /* 2575 */ 'e', 'v', 'a', 'n', 'd', 'c', 32, 0, |
3345 | 0 | /* 2583 */ 's', 'u', 'b', 'f', 'c', 32, 0, |
3346 | 0 | /* 2590 */ 's', 'u', 'b', 'i', 'c', 32, 0, |
3347 | 0 | /* 2597 */ 'a', 'd', 'd', 'i', 'c', 32, 0, |
3348 | 0 | /* 2604 */ 'r', 'l', 'd', 'i', 'c', 32, 0, |
3349 | 0 | /* 2611 */ 's', 'u', 'b', 'f', 'i', 'c', 32, 0, |
3350 | 0 | /* 2619 */ 'x', 's', 'r', 'd', 'p', 'i', 'c', 32, 0, |
3351 | 0 | /* 2628 */ 'x', 'v', 'r', 'd', 'p', 'i', 'c', 32, 0, |
3352 | 0 | /* 2637 */ 'x', 'v', 'r', 's', 'p', 'i', 'c', 32, 0, |
3353 | 0 | /* 2646 */ 'b', 'r', 'i', 'n', 'c', 32, 0, |
3354 | 0 | /* 2653 */ 's', 'y', 'n', 'c', 32, 0, |
3355 | 0 | /* 2659 */ 'x', 'x', 'l', 'o', 'r', 'c', 32, 0, |
3356 | 0 | /* 2667 */ 'c', 'r', 'o', 'r', 'c', 32, 0, |
3357 | 0 | /* 2674 */ 'e', 'v', 'o', 'r', 'c', 32, 0, |
3358 | 0 | /* 2681 */ 's', 'c', 32, 0, |
3359 | 0 | /* 2685 */ '#', 'T', 'C', '_', 'R', 'E', 'T', 'U', 'R', 'N', 'd', 32, 0, |
3360 | 0 | /* 2698 */ 'v', 's', 'r', 'a', 'd', 32, 0, |
3361 | 0 | /* 2705 */ 'q', 'v', 'f', 'a', 'd', 'd', 32, 0, |
3362 | 0 | /* 2713 */ 'q', 'v', 'f', 'm', 'a', 'd', 'd', 32, 0, |
3363 | 0 | /* 2722 */ 'q', 'v', 'f', 'n', 'm', 'a', 'd', 'd', 32, 0, |
3364 | 0 | /* 2732 */ 'q', 'v', 'f', 'x', 'x', 'c', 'p', 'n', 'm', 'a', 'd', 'd', 32, 0, |
3365 | 0 | /* 2746 */ 'q', 'v', 'f', 'x', 'x', 'n', 'p', 'm', 'a', 'd', 'd', 32, 0, |
3366 | 0 | /* 2759 */ 'q', 'v', 'f', 'x', 'm', 'a', 'd', 'd', 32, 0, |
3367 | 0 | /* 2769 */ 'q', 'v', 'f', 'x', 'x', 'm', 'a', 'd', 'd', 32, 0, |
3368 | 0 | /* 2780 */ 'e', 'v', 'l', 'd', 'd', 32, 0, |
3369 | 0 | /* 2787 */ 'e', 'v', 's', 't', 'd', 'd', 32, 0, |
3370 | 0 | /* 2795 */ 'l', 'f', 'd', 32, 0, |
3371 | 0 | /* 2800 */ 's', 't', 'f', 'd', 32, 0, |
3372 | 0 | /* 2806 */ 'm', 'u', 'l', 'h', 'd', 32, 0, |
3373 | 0 | /* 2813 */ 'q', 'v', 'f', 'c', 'f', 'i', 'd', 32, 0, |
3374 | 0 | /* 2822 */ 'q', 'v', 'f', 'c', 't', 'i', 'd', 32, 0, |
3375 | 0 | /* 2831 */ 't', 'l', 'b', 'l', 'd', 32, 0, |
3376 | 0 | /* 2838 */ 'm', 'u', 'l', 'l', 'd', 32, 0, |
3377 | 0 | /* 2845 */ 'c', 'm', 'p', 'l', 'd', 32, 0, |
3378 | 0 | /* 2852 */ 'v', 'r', 'l', 'd', 32, 0, |
3379 | 0 | /* 2858 */ 'v', 's', 'l', 'd', 32, 0, |
3380 | 0 | /* 2864 */ 'x', 'x', 'l', 'a', 'n', 'd', 32, 0, |
3381 | 0 | /* 2872 */ 'x', 'x', 'l', 'n', 'a', 'n', 'd', 32, 0, |
3382 | 0 | /* 2881 */ 'c', 'r', 'n', 'a', 'n', 'd', 32, 0, |
3383 | 0 | /* 2889 */ 'e', 'v', 'n', 'a', 'n', 'd', 32, 0, |
3384 | 0 | /* 2897 */ 'c', 'r', 'a', 'n', 'd', 32, 0, |
3385 | 0 | /* 2904 */ 'e', 'v', 'a', 'n', 'd', 32, 0, |
3386 | 0 | /* 2911 */ 'c', 'm', 'p', 'd', 32, 0, |
3387 | 0 | /* 2917 */ 'm', 't', 'm', 's', 'r', 'd', 32, 0, |
3388 | 0 | /* 2925 */ 'v', 's', 'r', 'd', 32, 0, |
3389 | 0 | /* 2931 */ 'v', 'm', 'i', 'n', 's', 'd', 32, 0, |
3390 | 0 | /* 2939 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'd', 32, 0, |
3391 | 0 | /* 2949 */ 'v', 'm', 'a', 'x', 's', 'd', 32, 0, |
3392 | 0 | /* 2957 */ 'v', 'p', 'o', 'p', 'c', 'n', 't', 'd', 32, 0, |
3393 | 0 | /* 2967 */ 's', 't', 'd', 32, 0, |
3394 | 0 | /* 2972 */ 'v', 'm', 'i', 'n', 'u', 'd', 32, 0, |
3395 | 0 | /* 2980 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'd', 32, 0, |
3396 | 0 | /* 2990 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'd', 32, 0, |
3397 | 0 | /* 3000 */ 'v', 'm', 'a', 'x', 'u', 'd', 32, 0, |
3398 | 0 | /* 3008 */ 'd', 'i', 'v', 'd', 32, 0, |
3399 | 0 | /* 3014 */ 'v', 'c', 'l', 'z', 'd', 32, 0, |
3400 | 0 | /* 3021 */ 'c', 'n', 't', 'l', 'z', 'd', 32, 0, |
3401 | 0 | /* 3029 */ 'a', 'd', 'd', 'e', 32, 0, |
3402 | 0 | /* 3035 */ 's', 'l', 'b', 'm', 'f', 'e', 'e', 32, 0, |
3403 | 0 | /* 3044 */ 'w', 'r', 't', 'e', 'e', 32, 0, |
3404 | 0 | /* 3051 */ 's', 'u', 'b', 'f', 'e', 32, 0, |
3405 | 0 | /* 3058 */ 'e', 'v', 'l', 'w', 'h', 'e', 32, 0, |
3406 | 0 | /* 3066 */ 'e', 'v', 's', 't', 'w', 'h', 'e', 32, 0, |
3407 | 0 | /* 3075 */ 's', 'l', 'b', 'i', 'e', 32, 0, |
3408 | 0 | /* 3082 */ 't', 'l', 'b', 'i', 'e', 32, 0, |
3409 | 0 | /* 3089 */ 'a', 'd', 'd', 'm', 'e', 32, 0, |
3410 | 0 | /* 3096 */ 's', 'u', 'b', 'f', 'm', 'e', 32, 0, |
3411 | 0 | /* 3104 */ 't', 'l', 'b', 'r', 'e', 32, 0, |
3412 | 0 | /* 3111 */ 'q', 'v', 'f', 'r', 'e', 32, 0, |
3413 | 0 | /* 3118 */ 's', 'l', 'b', 'm', 't', 'e', 32, 0, |
3414 | 0 | /* 3126 */ 'q', 'v', 'f', 'r', 's', 'q', 'r', 't', 'e', 32, 0, |
3415 | 0 | /* 3137 */ 't', 'l', 'b', 'w', 'e', 32, 0, |
3416 | 0 | /* 3144 */ 'e', 'v', 's', 't', 'w', 'w', 'e', 32, 0, |
3417 | 0 | /* 3153 */ 'a', 'd', 'd', 'z', 'e', 32, 0, |
3418 | 0 | /* 3160 */ 's', 'u', 'b', 'f', 'z', 'e', 32, 0, |
3419 | 0 | /* 3168 */ 'd', 'c', 'b', 'f', 32, 0, |
3420 | 0 | /* 3174 */ 's', 'u', 'b', 'f', 32, 0, |
3421 | 0 | /* 3180 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'f', 32, 0, |
3422 | 0 | /* 3190 */ 'e', 'v', 'm', 'w', 'h', 's', 'm', 'f', 32, 0, |
3423 | 0 | /* 3200 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'f', 32, 0, |
3424 | 0 | /* 3210 */ 'e', 'v', 'm', 'w', 's', 'm', 'f', 32, 0, |
3425 | 0 | /* 3219 */ 'm', 'c', 'r', 'f', 32, 0, |
3426 | 0 | /* 3225 */ 'm', 'f', 'o', 'c', 'r', 'f', 32, 0, |
3427 | 0 | /* 3233 */ 'm', 't', 'o', 'c', 'r', 'f', 32, 0, |
3428 | 0 | /* 3241 */ 'm', 't', 'c', 'r', 'f', 32, 0, |
3429 | 0 | /* 3248 */ 'm', 't', 'f', 's', 'f', 32, 0, |
3430 | 0 | /* 3255 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'f', 32, 0, |
3431 | 0 | /* 3265 */ 'e', 'v', 'm', 'w', 'h', 's', 's', 'f', 32, 0, |
3432 | 0 | /* 3275 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'f', 32, 0, |
3433 | 0 | /* 3285 */ 'e', 'v', 'm', 'w', 's', 's', 'f', 32, 0, |
3434 | 0 | /* 3294 */ 'q', 'v', 'f', 'n', 'e', 'g', 32, 0, |
3435 | 0 | /* 3302 */ 'e', 'v', 'n', 'e', 'g', 32, 0, |
3436 | 0 | /* 3309 */ 'v', 's', 'r', 'a', 'h', 32, 0, |
3437 | 0 | /* 3316 */ 'e', 'v', 'l', 'd', 'h', 32, 0, |
3438 | 0 | /* 3323 */ 'e', 'v', 's', 't', 'd', 'h', 32, 0, |
3439 | 0 | /* 3331 */ 'v', 'm', 'r', 'g', 'h', 'h', 32, 0, |
3440 | 0 | /* 3339 */ 'v', 'm', 'r', 'g', 'l', 'h', 32, 0, |
3441 | 0 | /* 3347 */ 'v', 'r', 'l', 'h', 32, 0, |
3442 | 0 | /* 3353 */ 'v', 's', 'l', 'h', 32, 0, |
3443 | 0 | /* 3359 */ 'v', 's', 'r', 'h', 32, 0, |
3444 | 0 | /* 3365 */ 'v', 'm', 'u', 'l', 'e', 's', 'h', 32, 0, |
3445 | 0 | /* 3374 */ 'v', 'a', 'v', 'g', 's', 'h', 32, 0, |
3446 | 0 | /* 3382 */ 'v', 'u', 'p', 'k', 'h', 's', 'h', 32, 0, |
3447 | 0 | /* 3391 */ 'v', 's', 'p', 'l', 't', 'i', 's', 'h', 32, 0, |
3448 | 0 | /* 3401 */ 'v', 'u', 'p', 'k', 'l', 's', 'h', 32, 0, |
3449 | 0 | /* 3410 */ 'v', 'm', 'i', 'n', 's', 'h', 32, 0, |
3450 | 0 | /* 3418 */ 'v', 'm', 'u', 'l', 'o', 's', 'h', 32, 0, |
3451 | 0 | /* 3427 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'h', 32, 0, |
3452 | 0 | /* 3437 */ 'e', 'v', 'e', 'x', 't', 's', 'h', 32, 0, |
3453 | 0 | /* 3446 */ 'v', 'm', 'a', 'x', 's', 'h', 32, 0, |
3454 | 0 | /* 3454 */ 'v', 's', 'p', 'l', 't', 'h', 32, 0, |
3455 | 0 | /* 3462 */ 'v', 'p', 'o', 'p', 'c', 'n', 't', 'h', 32, 0, |
3456 | 0 | /* 3472 */ 's', 't', 'h', 32, 0, |
3457 | 0 | /* 3477 */ 'v', 'm', 'u', 'l', 'e', 'u', 'h', 32, 0, |
3458 | 0 | /* 3486 */ 'v', 'a', 'v', 'g', 'u', 'h', 32, 0, |
3459 | 0 | /* 3494 */ 'v', 'm', 'i', 'n', 'u', 'h', 32, 0, |
3460 | 0 | /* 3502 */ 'v', 'm', 'u', 'l', 'o', 'u', 'h', 32, 0, |
3461 | 0 | /* 3511 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'h', 32, 0, |
3462 | 0 | /* 3521 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'h', 32, 0, |
3463 | 0 | /* 3531 */ 'v', 'm', 'a', 'x', 'u', 'h', 32, 0, |
3464 | 0 | /* 3539 */ 'v', 'c', 'l', 'z', 'h', 32, 0, |
3465 | 0 | /* 3546 */ 'd', 'c', 'b', 'i', 32, 0, |
3466 | 0 | /* 3552 */ 'i', 'c', 'b', 'i', 32, 0, |
3467 | 0 | /* 3558 */ 's', 'u', 'b', 'i', 32, 0, |
3468 | 0 | /* 3564 */ 'd', 'c', 'c', 'c', 'i', 32, 0, |
3469 | 0 | /* 3571 */ 'i', 'c', 'c', 'c', 'i', 32, 0, |
3470 | 0 | /* 3578 */ 'q', 'v', 'g', 'p', 'c', 'i', 32, 0, |
3471 | 0 | /* 3586 */ 's', 'r', 'a', 'd', 'i', 32, 0, |
3472 | 0 | /* 3593 */ 'a', 'd', 'd', 'i', 32, 0, |
3473 | 0 | /* 3599 */ 'c', 'm', 'p', 'l', 'd', 'i', 32, 0, |
3474 | 0 | /* 3607 */ 'c', 'l', 'r', 'l', 's', 'l', 'd', 'i', 32, 0, |
3475 | 0 | /* 3617 */ 'e', 'x', 't', 'l', 'd', 'i', 32, 0, |
3476 | 0 | /* 3625 */ 'x', 'x', 'p', 'e', 'r', 'm', 'd', 'i', 32, 0, |
3477 | 0 | /* 3635 */ 'c', 'm', 'p', 'd', 'i', 32, 0, |
3478 | 0 | /* 3642 */ 'c', 'l', 'r', 'r', 'd', 'i', 32, 0, |
3479 | 0 | /* 3650 */ 'i', 'n', 's', 'r', 'd', 'i', 32, 0, |
3480 | 0 | /* 3658 */ 'r', 'o', 't', 'r', 'd', 'i', 32, 0, |
3481 | 0 | /* 3666 */ 'e', 'x', 't', 'r', 'd', 'i', 32, 0, |
3482 | 0 | /* 3674 */ 't', 'd', 'i', 32, 0, |
3483 | 0 | /* 3679 */ 'w', 'r', 't', 'e', 'e', 'i', 32, 0, |
3484 | 0 | /* 3687 */ 'm', 't', 'f', 's', 'f', 'i', 32, 0, |
3485 | 0 | /* 3695 */ 'e', 'v', 's', 'p', 'l', 'a', 't', 'f', 'i', 32, 0, |
3486 | 0 | /* 3706 */ 'e', 'v', 'm', 'e', 'r', 'g', 'e', 'h', 'i', 32, 0, |
3487 | 0 | /* 3717 */ 'e', 'v', 'm', 'e', 'r', 'g', 'e', 'l', 'o', 'h', 'i', 32, 0, |
3488 | 0 | /* 3730 */ 't', 'l', 'b', 'l', 'i', 32, 0, |
3489 | 0 | /* 3737 */ 'm', 'u', 'l', 'l', 'i', 32, 0, |
3490 | 0 | /* 3744 */ 'r', 'l', 'd', 'i', 'm', 'i', 32, 0, |
3491 | 0 | /* 3752 */ 'r', 'l', 'w', 'i', 'm', 'i', 32, 0, |
3492 | 0 | /* 3760 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'i', 32, 0, |
3493 | 0 | /* 3770 */ 'e', 'v', 'm', 'w', 'h', 's', 'm', 'i', 32, 0, |
3494 | 0 | /* 3780 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'i', 32, 0, |
3495 | 0 | /* 3790 */ 'e', 'v', 'm', 'w', 's', 'm', 'i', 32, 0, |
3496 | 0 | /* 3799 */ 'e', 'v', 'm', 'h', 'e', 'u', 'm', 'i', 32, 0, |
3497 | 0 | /* 3809 */ 'e', 'v', 'm', 'w', 'h', 'u', 'm', 'i', 32, 0, |
3498 | 0 | /* 3819 */ 'e', 'v', 'm', 'w', 'l', 'u', 'm', 'i', 32, 0, |
3499 | 0 | /* 3829 */ 'e', 'v', 'm', 'h', 'o', 'u', 'm', 'i', 32, 0, |
3500 | 0 | /* 3839 */ 'e', 'v', 'm', 'w', 'u', 'm', 'i', 32, 0, |
3501 | 0 | /* 3848 */ 'q', 'v', 'a', 'l', 'i', 'g', 'n', 'i', 32, 0, |
3502 | 0 | /* 3858 */ 'v', 's', 'l', 'd', 'o', 'i', 32, 0, |
3503 | 0 | /* 3866 */ 'x', 's', 'r', 'd', 'p', 'i', 32, 0, |
3504 | 0 | /* 3874 */ 'x', 'v', 'r', 'd', 'p', 'i', 32, 0, |
3505 | 0 | /* 3882 */ 'x', 'v', 'r', 's', 'p', 'i', 32, 0, |
3506 | 0 | /* 3890 */ 'x', 'o', 'r', 'i', 32, 0, |
3507 | 0 | /* 3896 */ 'q', 'v', 'e', 's', 'p', 'l', 'a', 't', 'i', 32, 0, |
3508 | 0 | /* 3907 */ 'e', 'v', 's', 'p', 'l', 'a', 't', 'i', 32, 0, |
3509 | 0 | /* 3917 */ 's', 'r', 'a', 'w', 'i', 32, 0, |
3510 | 0 | /* 3924 */ 'x', 'x', 's', 'l', 'd', 'w', 'i', 32, 0, |
3511 | 0 | /* 3933 */ 'c', 'm', 'p', 'l', 'w', 'i', 32, 0, |
3512 | 0 | /* 3941 */ 'e', 'v', 'r', 'l', 'w', 'i', 32, 0, |
3513 | 0 | /* 3949 */ 'c', 'l', 'r', 'l', 's', 'l', 'w', 'i', 32, 0, |
3514 | 0 | /* 3959 */ 'i', 'n', 's', 'l', 'w', 'i', 32, 0, |
3515 | 0 | /* 3967 */ 'e', 'v', 's', 'l', 'w', 'i', 32, 0, |
3516 | 0 | /* 3975 */ 'e', 'x', 't', 'l', 'w', 'i', 32, 0, |
3517 | 0 | /* 3983 */ 'c', 'm', 'p', 'w', 'i', 32, 0, |
3518 | 0 | /* 3990 */ 'c', 'l', 'r', 'r', 'w', 'i', 32, 0, |
3519 | 0 | /* 3998 */ 'i', 'n', 's', 'r', 'w', 'i', 32, 0, |
3520 | 0 | /* 4006 */ 'r', 'o', 't', 'r', 'w', 'i', 32, 0, |
3521 | 0 | /* 4014 */ 'e', 'x', 't', 'r', 'w', 'i', 32, 0, |
3522 | 0 | /* 4022 */ 'l', 's', 'w', 'i', 32, 0, |
3523 | 0 | /* 4028 */ 's', 't', 's', 'w', 'i', 32, 0, |
3524 | 0 | /* 4035 */ 't', 'w', 'i', 32, 0, |
3525 | 0 | /* 4040 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'x', 'i', 32, 0, |
3526 | 0 | /* 4051 */ 'q', 'v', 's', 't', 'f', 'd', 'x', 'i', 32, 0, |
3527 | 0 | /* 4061 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'x', 'i', 32, 0, |
3528 | 0 | /* 4072 */ 'q', 'v', 's', 't', 'f', 's', 'x', 'i', 32, 0, |
3529 | 0 | /* 4082 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'u', 'x', 'i', 32, 0, |
3530 | 0 | /* 4094 */ 'q', 'v', 's', 't', 'f', 'd', 'u', 'x', 'i', 32, 0, |
3531 | 0 | /* 4105 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'u', 'x', 'i', 32, 0, |
3532 | 0 | /* 4117 */ 'q', 'v', 's', 't', 'f', 's', 'u', 'x', 'i', 32, 0, |
3533 | 0 | /* 4128 */ 'q', 'v', 'f', 'l', 'o', 'g', 'i', 'c', 'a', 'l', 32, 0, |
3534 | 0 | /* 4140 */ 'b', 'l', 32, 0, |
3535 | 0 | /* 4144 */ 'b', 'c', 'l', 32, 0, |
3536 | 0 | /* 4149 */ 'r', 'l', 'd', 'c', 'l', 32, 0, |
3537 | 0 | /* 4156 */ 'r', 'l', 'd', 'i', 'c', 'l', 32, 0, |
3538 | 0 | /* 4164 */ 't', 'l', 'b', 'i', 'e', 'l', 32, 0, |
3539 | 0 | /* 4172 */ 'q', 'v', 'f', 's', 'e', 'l', 32, 0, |
3540 | 0 | /* 4180 */ 'i', 's', 'e', 'l', 32, 0, |
3541 | 0 | /* 4186 */ 'v', 's', 'e', 'l', 32, 0, |
3542 | 0 | /* 4192 */ 'x', 'x', 's', 'e', 'l', 32, 0, |
3543 | 0 | /* 4199 */ 'b', 'c', 'l', 'r', 'l', 32, 0, |
3544 | 0 | /* 4206 */ 'b', 'c', 'c', 't', 'r', 'l', 32, 0, |
3545 | 0 | /* 4214 */ 'l', 'v', 's', 'l', 32, 0, |
3546 | 0 | /* 4220 */ 'q', 'v', 'f', 'm', 'u', 'l', 32, 0, |
3547 | 0 | /* 4228 */ 'q', 'v', 'f', 'x', 'm', 'u', 'l', 32, 0, |
3548 | 0 | /* 4237 */ 'l', 'v', 'x', 'l', 32, 0, |
3549 | 0 | /* 4243 */ 's', 't', 'v', 'x', 'l', 32, 0, |
3550 | 0 | /* 4250 */ 'd', 'c', 'b', 'z', 'l', 32, 0, |
3551 | 0 | /* 4257 */ 'b', 'd', 'z', 'l', 32, 0, |
3552 | 0 | /* 4263 */ 'b', 'd', 'n', 'z', 'l', 32, 0, |
3553 | 0 | /* 4270 */ 'v', 'm', 's', 'u', 'm', 'm', 'b', 'm', 32, 0, |
3554 | 0 | /* 4280 */ 'v', 's', 'u', 'b', 'u', 'b', 'm', 32, 0, |
3555 | 0 | /* 4289 */ 'v', 'a', 'd', 'd', 'u', 'b', 'm', 32, 0, |
3556 | 0 | /* 4298 */ 'v', 'm', 's', 'u', 'm', 'u', 'b', 'm', 32, 0, |
3557 | 0 | /* 4308 */ 'v', 's', 'u', 'b', 'u', 'd', 'm', 32, 0, |
3558 | 0 | /* 4317 */ 'v', 'a', 'd', 'd', 'u', 'd', 'm', 32, 0, |
3559 | 0 | /* 4326 */ 'v', 'm', 's', 'u', 'm', 's', 'h', 'm', 32, 0, |
3560 | 0 | /* 4336 */ 'v', 's', 'u', 'b', 'u', 'h', 'm', 32, 0, |
3561 | 0 | /* 4345 */ 'v', 'm', 'l', 'a', 'd', 'd', 'u', 'h', 'm', 32, 0, |
3562 | 0 | /* 4356 */ 'v', 'a', 'd', 'd', 'u', 'h', 'm', 32, 0, |
3563 | 0 | /* 4365 */ 'v', 'm', 's', 'u', 'm', 'u', 'h', 'm', 32, 0, |
3564 | 0 | /* 4375 */ 'v', 'r', 'f', 'i', 'm', 32, 0, |
3565 | 0 | /* 4382 */ 'x', 's', 'r', 'd', 'p', 'i', 'm', 32, 0, |
3566 | 0 | /* 4391 */ 'x', 'v', 'r', 'd', 'p', 'i', 'm', 32, 0, |
3567 | 0 | /* 4400 */ 'x', 'v', 'r', 's', 'p', 'i', 'm', 32, 0, |
3568 | 0 | /* 4409 */ 'q', 'v', 'f', 'r', 'i', 'm', 32, 0, |
3569 | 0 | /* 4417 */ 'r', 'l', 'w', 'i', 'n', 'm', 32, 0, |
3570 | 0 | /* 4425 */ 'r', 'l', 'w', 'n', 'm', 32, 0, |
3571 | 0 | /* 4432 */ 'q', 'v', 'f', 'p', 'e', 'r', 'm', 32, 0, |
3572 | 0 | /* 4441 */ 'v', 'p', 'e', 'r', 'm', 32, 0, |
3573 | 0 | /* 4448 */ 'v', 'p', 'k', 'u', 'h', 'u', 'm', 32, 0, |
3574 | 0 | /* 4457 */ 'v', 'p', 'k', 'u', 'w', 'u', 'm', 32, 0, |
3575 | 0 | /* 4466 */ 'v', 's', 'u', 'b', 'u', 'w', 'm', 32, 0, |
3576 | 0 | /* 4475 */ 'v', 'a', 'd', 'd', 'u', 'w', 'm', 32, 0, |
3577 | 0 | /* 4484 */ 'v', 'm', 'u', 'l', 'u', 'w', 'm', 32, 0, |
3578 | 0 | /* 4493 */ 'e', 'v', 'm', 'h', 'e', 'g', 's', 'm', 'f', 'a', 'n', 32, 0, |
3579 | 0 | /* 4506 */ 'e', 'v', 'm', 'h', 'o', 'g', 's', 'm', 'f', 'a', 'n', 32, 0, |
3580 | 0 | /* 4519 */ 'e', 'v', 'm', 'w', 's', 'm', 'f', 'a', 'n', 32, 0, |
3581 | 0 | /* 4530 */ 'e', 'v', 'm', 'w', 's', 's', 'f', 'a', 'n', 32, 0, |
3582 | 0 | /* 4541 */ 'e', 'v', 'm', 'h', 'e', 'g', 's', 'm', 'i', 'a', 'n', 32, 0, |
3583 | 0 | /* 4554 */ 'e', 'v', 'm', 'h', 'o', 'g', 's', 'm', 'i', 'a', 'n', 32, 0, |
3584 | 0 | /* 4567 */ 'e', 'v', 'm', 'w', 's', 'm', 'i', 'a', 'n', 32, 0, |
3585 | 0 | /* 4578 */ 'e', 'v', 'm', 'h', 'e', 'g', 'u', 'm', 'i', 'a', 'n', 32, 0, |
3586 | 0 | /* 4591 */ 'e', 'v', 'm', 'h', 'o', 'g', 'u', 'm', 'i', 'a', 'n', 32, 0, |
3587 | 0 | /* 4604 */ 'e', 'v', 'm', 'w', 'u', 'm', 'i', 'a', 'n', 32, 0, |
3588 | 0 | /* 4615 */ 'q', 'v', 'f', 't', 's', 't', 'n', 'a', 'n', 32, 0, |
3589 | 0 | /* 4626 */ 'q', 'v', 'f', 'c', 'p', 's', 'g', 'n', 32, 0, |
3590 | 0 | /* 4636 */ 'v', 'r', 'f', 'i', 'n', 32, 0, |
3591 | 0 | /* 4643 */ 'q', 'v', 'f', 'r', 'i', 'n', 32, 0, |
3592 | 0 | /* 4651 */ 'm', 'f', 's', 'r', 'i', 'n', 32, 0, |
3593 | 0 | /* 4659 */ 'm', 't', 's', 'r', 'i', 'n', 32, 0, |
3594 | 0 | /* 4667 */ 'e', 'v', 's', 't', 'w', 'h', 'o', 32, 0, |
3595 | 0 | /* 4676 */ 'e', 'v', 'm', 'e', 'r', 'g', 'e', 'l', 'o', 32, 0, |
3596 | 0 | /* 4687 */ 'e', 'v', 'm', 'e', 'r', 'g', 'e', 'h', 'i', 'l', 'o', 32, 0, |
3597 | 0 | /* 4700 */ 'v', 's', 'l', 'o', 32, 0, |
3598 | 0 | /* 4706 */ 'v', 's', 'r', 'o', 32, 0, |
3599 | 0 | /* 4712 */ 'e', 'v', 's', 't', 'w', 'w', 'o', 32, 0, |
3600 | 0 | /* 4721 */ 'x', 's', 'n', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, |
3601 | 0 | /* 4733 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, |
3602 | 0 | /* 4745 */ 'x', 's', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, |
3603 | 0 | /* 4756 */ 'x', 'v', 'm', 's', 'u', 'b', 'a', 'd', 'p', 32, 0, |
3604 | 0 | /* 4767 */ 'x', 's', 'n', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, |
3605 | 0 | /* 4779 */ 'x', 'v', 'n', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, |
3606 | 0 | /* 4791 */ 'x', 's', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, |
3607 | 0 | /* 4802 */ 'x', 'v', 'm', 'a', 'd', 'd', 'a', 'd', 'p', 32, 0, |
3608 | 0 | /* 4813 */ 'x', 's', 's', 'u', 'b', 'd', 'p', 32, 0, |
3609 | 0 | /* 4822 */ 'x', 'v', 's', 'u', 'b', 'd', 'p', 32, 0, |
3610 | 0 | /* 4831 */ 'x', 's', 'a', 'd', 'd', 'd', 'p', 32, 0, |
3611 | 0 | /* 4840 */ 'x', 'v', 'a', 'd', 'd', 'd', 'p', 32, 0, |
3612 | 0 | /* 4849 */ 'x', 's', 'c', 'v', 's', 'x', 'd', 'd', 'p', 32, 0, |
3613 | 0 | /* 4860 */ 'x', 'v', 'c', 'v', 's', 'x', 'd', 'd', 'p', 32, 0, |
3614 | 0 | /* 4871 */ 'x', 's', 'c', 'v', 'u', 'x', 'd', 'd', 'p', 32, 0, |
3615 | 0 | /* 4882 */ 'x', 'v', 'c', 'v', 'u', 'x', 'd', 'd', 'p', 32, 0, |
3616 | 0 | /* 4893 */ 'x', 'v', 'c', 'm', 'p', 'g', 'e', 'd', 'p', 32, 0, |
3617 | 0 | /* 4904 */ 'x', 's', 'r', 'e', 'd', 'p', 32, 0, |
3618 | 0 | /* 4912 */ 'x', 'v', 'r', 'e', 'd', 'p', 32, 0, |
3619 | 0 | /* 4920 */ 'x', 's', 'r', 's', 'q', 'r', 't', 'e', 'd', 'p', 32, 0, |
3620 | 0 | /* 4932 */ 'x', 'v', 'r', 's', 'q', 'r', 't', 'e', 'd', 'p', 32, 0, |
3621 | 0 | /* 4944 */ 'x', 's', 'n', 'e', 'g', 'd', 'p', 32, 0, |
3622 | 0 | /* 4953 */ 'x', 'v', 'n', 'e', 'g', 'd', 'p', 32, 0, |
3623 | 0 | /* 4962 */ 'x', 's', 'm', 'u', 'l', 'd', 'p', 32, 0, |
3624 | 0 | /* 4971 */ 'x', 'v', 'm', 'u', 'l', 'd', 'p', 32, 0, |
3625 | 0 | /* 4980 */ 'x', 's', 'n', 'm', 's', 'u', 'b', 'm', 'd', 'p', 32, 0, |
3626 | 0 | /* 4992 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'm', 'd', 'p', 32, 0, |
3627 | 0 | /* 5004 */ 'x', 's', 'm', 's', 'u', 'b', 'm', 'd', 'p', 32, 0, |
3628 | 0 | /* 5015 */ 'x', 'v', 'm', 's', 'u', 'b', 'm', 'd', 'p', 32, 0, |
3629 | 0 | /* 5026 */ 'x', 's', 'n', 'm', 'a', 'd', 'd', 'm', 'd', 'p', 32, 0, |
3630 | 0 | /* 5038 */ 'x', 'v', 'n', 'm', 'a', 'd', 'd', 'm', 'd', 'p', 32, 0, |
3631 | 0 | /* 5050 */ 'x', 's', 'm', 'a', 'd', 'd', 'm', 'd', 'p', 32, 0, |
3632 | 0 | /* 5061 */ 'x', 'v', 'm', 'a', 'd', 'd', 'm', 'd', 'p', 32, 0, |
3633 | 0 | /* 5072 */ 'x', 's', 'c', 'p', 's', 'g', 'n', 'd', 'p', 32, 0, |
3634 | 0 | /* 5083 */ 'x', 'v', 'c', 'p', 's', 'g', 'n', 'd', 'p', 32, 0, |
3635 | 0 | /* 5094 */ 'x', 's', 'm', 'i', 'n', 'd', 'p', 32, 0, |
3636 | 0 | /* 5103 */ 'x', 'v', 'm', 'i', 'n', 'd', 'p', 32, 0, |
3637 | 0 | /* 5112 */ 'x', 's', 'c', 'm', 'p', 'o', 'd', 'p', 32, 0, |
3638 | 0 | /* 5122 */ 'x', 's', 'c', 'v', 's', 'p', 'd', 'p', 32, 0, |
3639 | 0 | /* 5132 */ 'x', 'v', 'c', 'v', 's', 'p', 'd', 'p', 32, 0, |
3640 | 0 | /* 5142 */ 'x', 'v', 'c', 'm', 'p', 'e', 'q', 'd', 'p', 32, 0, |
3641 | 0 | /* 5153 */ 'x', 's', 'n', 'a', 'b', 's', 'd', 'p', 32, 0, |
3642 | 0 | /* 5163 */ 'x', 'v', 'n', 'a', 'b', 's', 'd', 'p', 32, 0, |
3643 | 0 | /* 5173 */ 'x', 's', 'a', 'b', 's', 'd', 'p', 32, 0, |
3644 | 0 | /* 5182 */ 'x', 'v', 'a', 'b', 's', 'd', 'p', 32, 0, |
3645 | 0 | /* 5191 */ 'x', 'v', 'c', 'm', 'p', 'g', 't', 'd', 'p', 32, 0, |
3646 | 0 | /* 5202 */ 'x', 's', 's', 'q', 'r', 't', 'd', 'p', 32, 0, |
3647 | 0 | /* 5212 */ 'x', 's', 't', 's', 'q', 'r', 't', 'd', 'p', 32, 0, |
3648 | 0 | /* 5223 */ 'x', 'v', 't', 's', 'q', 'r', 't', 'd', 'p', 32, 0, |
3649 | 0 | /* 5234 */ 'x', 'v', 's', 'q', 'r', 't', 'd', 'p', 32, 0, |
3650 | 0 | /* 5244 */ 'x', 's', 'c', 'm', 'p', 'u', 'd', 'p', 32, 0, |
3651 | 0 | /* 5254 */ 'x', 's', 'd', 'i', 'v', 'd', 'p', 32, 0, |
3652 | 0 | /* 5263 */ 'x', 's', 't', 'd', 'i', 'v', 'd', 'p', 32, 0, |
3653 | 0 | /* 5273 */ 'x', 'v', 't', 'd', 'i', 'v', 'd', 'p', 32, 0, |
3654 | 0 | /* 5283 */ 'x', 'v', 'd', 'i', 'v', 'd', 'p', 32, 0, |
3655 | 0 | /* 5292 */ 'x', 'v', 'c', 'v', 's', 'x', 'w', 'd', 'p', 32, 0, |
3656 | 0 | /* 5303 */ 'x', 'v', 'c', 'v', 'u', 'x', 'w', 'd', 'p', 32, 0, |
3657 | 0 | /* 5314 */ 'x', 's', 'm', 'a', 'x', 'd', 'p', 32, 0, |
3658 | 0 | /* 5323 */ 'x', 'v', 'm', 'a', 'x', 'd', 'p', 32, 0, |
3659 | 0 | /* 5332 */ 'v', 'c', 'm', 'p', 'b', 'f', 'p', 32, 0, |
3660 | 0 | /* 5341 */ 'v', 'n', 'm', 's', 'u', 'b', 'f', 'p', 32, 0, |
3661 | 0 | /* 5351 */ 'v', 's', 'u', 'b', 'f', 'p', 32, 0, |
3662 | 0 | /* 5359 */ 'v', 'm', 'a', 'd', 'd', 'f', 'p', 32, 0, |
3663 | 0 | /* 5368 */ 'v', 'a', 'd', 'd', 'f', 'p', 32, 0, |
3664 | 0 | /* 5376 */ 'v', 'l', 'o', 'g', 'e', 'f', 'p', 32, 0, |
3665 | 0 | /* 5385 */ 'v', 'c', 'm', 'p', 'g', 'e', 'f', 'p', 32, 0, |
3666 | 0 | /* 5395 */ 'v', 'r', 'e', 'f', 'p', 32, 0, |
3667 | 0 | /* 5402 */ 'v', 'e', 'x', 'p', 't', 'e', 'f', 'p', 32, 0, |
3668 | 0 | /* 5412 */ 'v', 'r', 's', 'q', 'r', 't', 'e', 'f', 'p', 32, 0, |
3669 | 0 | /* 5423 */ 'v', 'm', 'i', 'n', 'f', 'p', 32, 0, |
3670 | 0 | /* 5431 */ 'v', 'c', 'm', 'p', 'e', 'q', 'f', 'p', 32, 0, |
3671 | 0 | /* 5441 */ 'v', 'c', 'm', 'p', 'g', 't', 'f', 'p', 32, 0, |
3672 | 0 | /* 5451 */ 'v', 'm', 'a', 'x', 'f', 'p', 32, 0, |
3673 | 0 | /* 5459 */ 'v', 'r', 'f', 'i', 'p', 32, 0, |
3674 | 0 | /* 5466 */ 'x', 's', 'r', 'd', 'p', 'i', 'p', 32, 0, |
3675 | 0 | /* 5475 */ 'x', 'v', 'r', 'd', 'p', 'i', 'p', 32, 0, |
3676 | 0 | /* 5484 */ 'x', 'v', 'r', 's', 'p', 'i', 'p', 32, 0, |
3677 | 0 | /* 5493 */ 'q', 'v', 'f', 'r', 'i', 'p', 32, 0, |
3678 | 0 | /* 5501 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'a', 's', 'p', 32, 0, |
3679 | 0 | /* 5513 */ 'x', 'v', 'm', 's', 'u', 'b', 'a', 's', 'p', 32, 0, |
3680 | 0 | /* 5524 */ 'x', 'v', 'n', 'm', 'a', 'd', 'd', 'a', 's', 'p', 32, 0, |
3681 | 0 | /* 5536 */ 'x', 'v', 'm', 'a', 'd', 'd', 'a', 's', 'p', 32, 0, |
3682 | 0 | /* 5547 */ 'x', 'v', 's', 'u', 'b', 's', 'p', 32, 0, |
3683 | 0 | /* 5556 */ 'x', 'v', 'a', 'd', 'd', 's', 'p', 32, 0, |
3684 | 0 | /* 5565 */ 'x', 'v', 'c', 'v', 's', 'x', 'd', 's', 'p', 32, 0, |
3685 | 0 | /* 5576 */ 'x', 'v', 'c', 'v', 'u', 'x', 'd', 's', 'p', 32, 0, |
3686 | 0 | /* 5587 */ 'x', 'v', 'c', 'm', 'p', 'g', 'e', 's', 'p', 32, 0, |
3687 | 0 | /* 5598 */ 'x', 'v', 'r', 'e', 's', 'p', 32, 0, |
3688 | 0 | /* 5606 */ 'x', 'v', 'r', 's', 'q', 'r', 't', 'e', 's', 'p', 32, 0, |
3689 | 0 | /* 5618 */ 'x', 'v', 'n', 'e', 'g', 's', 'p', 32, 0, |
3690 | 0 | /* 5627 */ 'x', 'v', 'm', 'u', 'l', 's', 'p', 32, 0, |
3691 | 0 | /* 5636 */ 'x', 'v', 'n', 'm', 's', 'u', 'b', 'm', 's', 'p', 32, 0, |
3692 | 0 | /* 5648 */ 'x', 'v', 'm', 's', 'u', 'b', 'm', 's', 'p', 32, 0, |
3693 | 0 | /* 5659 */ 'x', 'v', 'n', 'm', 'a', 'd', 'd', 'm', 's', 'p', 32, 0, |
3694 | 0 | /* 5671 */ 'x', 'v', 'm', 'a', 'd', 'd', 'm', 's', 'p', 32, 0, |
3695 | 0 | /* 5682 */ 'x', 'v', 'c', 'p', 's', 'g', 'n', 's', 'p', 32, 0, |
3696 | 0 | /* 5693 */ 'x', 'v', 'm', 'i', 'n', 's', 'p', 32, 0, |
3697 | 0 | /* 5702 */ 'x', 's', 'c', 'v', 'd', 'p', 's', 'p', 32, 0, |
3698 | 0 | /* 5712 */ 'x', 'v', 'c', 'v', 'd', 'p', 's', 'p', 32, 0, |
3699 | 0 | /* 5722 */ 'x', 'v', 'c', 'm', 'p', 'e', 'q', 's', 'p', 32, 0, |
3700 | 0 | /* 5733 */ 'q', 'v', 'f', 'r', 's', 'p', 32, 0, |
3701 | 0 | /* 5741 */ 'x', 'v', 'n', 'a', 'b', 's', 's', 'p', 32, 0, |
3702 | 0 | /* 5751 */ 'x', 'v', 'a', 'b', 's', 's', 'p', 32, 0, |
3703 | 0 | /* 5760 */ 'x', 'v', 'c', 'm', 'p', 'g', 't', 's', 'p', 32, 0, |
3704 | 0 | /* 5771 */ 'x', 'v', 't', 's', 'q', 'r', 't', 's', 'p', 32, 0, |
3705 | 0 | /* 5782 */ 'x', 'v', 's', 'q', 'r', 't', 's', 'p', 32, 0, |
3706 | 0 | /* 5792 */ 'x', 'v', 't', 'd', 'i', 'v', 's', 'p', 32, 0, |
3707 | 0 | /* 5802 */ 'x', 'v', 'd', 'i', 'v', 's', 'p', 32, 0, |
3708 | 0 | /* 5811 */ 'x', 'v', 'c', 'v', 's', 'x', 'w', 's', 'p', 32, 0, |
3709 | 0 | /* 5822 */ 'x', 'v', 'c', 'v', 'u', 'x', 'w', 's', 'p', 32, 0, |
3710 | 0 | /* 5833 */ 'x', 'v', 'm', 'a', 'x', 's', 'p', 32, 0, |
3711 | 0 | /* 5842 */ 'q', 'v', 'f', 'c', 'm', 'p', 'e', 'q', 32, 0, |
3712 | 0 | /* 5852 */ 'e', 'v', 'c', 'm', 'p', 'e', 'q', 32, 0, |
3713 | 0 | /* 5861 */ '#', 'T', 'C', '_', 'R', 'E', 'T', 'U', 'R', 'N', 'r', 32, 0, |
3714 | 0 | /* 5874 */ 'm', 'b', 'a', 'r', 32, 0, |
3715 | 0 | /* 5880 */ 'm', 'f', 'd', 'c', 'r', 32, 0, |
3716 | 0 | /* 5887 */ 'r', 'l', 'd', 'c', 'r', 32, 0, |
3717 | 0 | /* 5894 */ 'm', 't', 'd', 'c', 'r', 32, 0, |
3718 | 0 | /* 5901 */ 'm', 'f', 'c', 'r', 32, 0, |
3719 | 0 | /* 5907 */ 'r', 'l', 'd', 'i', 'c', 'r', 32, 0, |
3720 | 0 | /* 5915 */ 'm', 'f', 'v', 's', 'c', 'r', 32, 0, |
3721 | 0 | /* 5923 */ 'm', 't', 'v', 's', 'c', 'r', 32, 0, |
3722 | 0 | /* 5931 */ 'b', 'c', 'l', 'r', 32, 0, |
3723 | 0 | /* 5937 */ 'm', 'f', 'l', 'r', 32, 0, |
3724 | 0 | /* 5943 */ 'm', 't', 'l', 'r', 32, 0, |
3725 | 0 | /* 5949 */ 'q', 'v', 'f', 'm', 'r', 32, 0, |
3726 | 0 | /* 5956 */ 'x', 'x', 'l', 'o', 'r', 32, 0, |
3727 | 0 | /* 5963 */ 'x', 'x', 'l', 'n', 'o', 'r', 32, 0, |
3728 | 0 | /* 5971 */ 'c', 'r', 'n', 'o', 'r', 32, 0, |
3729 | 0 | /* 5978 */ 'e', 'v', 'n', 'o', 'r', 32, 0, |
3730 | 0 | /* 5985 */ 'c', 'r', 'o', 'r', 32, 0, |
3731 | 0 | /* 5991 */ 'e', 'v', 'o', 'r', 32, 0, |
3732 | 0 | /* 5997 */ 'x', 'x', 'l', 'x', 'o', 'r', 32, 0, |
3733 | 0 | /* 6005 */ 'c', 'r', 'x', 'o', 'r', 32, 0, |
3734 | 0 | /* 6012 */ 'e', 'v', 'x', 'o', 'r', 32, 0, |
3735 | 0 | /* 6019 */ 'm', 'f', 's', 'p', 'r', 32, 0, |
3736 | 0 | /* 6026 */ 'm', 't', 's', 'p', 'r', 32, 0, |
3737 | 0 | /* 6033 */ 'm', 'f', 's', 'r', 32, 0, |
3738 | 0 | /* 6039 */ 'm', 'f', 'm', 's', 'r', 32, 0, |
3739 | 0 | /* 6046 */ 'm', 't', 'm', 's', 'r', 32, 0, |
3740 | 0 | /* 6053 */ 'm', 't', 's', 'r', 32, 0, |
3741 | 0 | /* 6059 */ 'l', 'v', 's', 'r', 32, 0, |
3742 | 0 | /* 6065 */ 'b', 'c', 'c', 't', 'r', 32, 0, |
3743 | 0 | /* 6072 */ 'm', 'f', 'c', 't', 'r', 32, 0, |
3744 | 0 | /* 6079 */ 'm', 't', 'c', 't', 'r', 32, 0, |
3745 | 0 | /* 6086 */ 'q', 'v', 'f', 'a', 'b', 's', 32, 0, |
3746 | 0 | /* 6094 */ 'q', 'v', 'f', 'n', 'a', 'b', 's', 32, 0, |
3747 | 0 | /* 6103 */ 'e', 'v', 'a', 'b', 's', 32, 0, |
3748 | 0 | /* 6110 */ 'v', 's', 'u', 'm', '4', 's', 'b', 's', 32, 0, |
3749 | 0 | /* 6120 */ 'v', 's', 'u', 'b', 's', 'b', 's', 32, 0, |
3750 | 0 | /* 6129 */ 'v', 'a', 'd', 'd', 's', 'b', 's', 32, 0, |
3751 | 0 | /* 6138 */ 'v', 's', 'u', 'm', '4', 'u', 'b', 's', 32, 0, |
3752 | 0 | /* 6148 */ 'v', 's', 'u', 'b', 'u', 'b', 's', 32, 0, |
3753 | 0 | /* 6157 */ 'v', 'a', 'd', 'd', 'u', 'b', 's', 32, 0, |
3754 | 0 | /* 6166 */ 'q', 'v', 'f', 's', 'u', 'b', 's', 32, 0, |
3755 | 0 | /* 6175 */ 'q', 'v', 'f', 'm', 's', 'u', 'b', 's', 32, 0, |
3756 | 0 | /* 6185 */ 'q', 'v', 'f', 'n', 'm', 's', 'u', 'b', 's', 32, 0, |
3757 | 0 | /* 6196 */ 'q', 'v', 'f', 'a', 'd', 'd', 's', 32, 0, |
3758 | 0 | /* 6205 */ 'q', 'v', 'f', 'm', 'a', 'd', 'd', 's', 32, 0, |
3759 | 0 | /* 6215 */ 'q', 'v', 'f', 'n', 'm', 'a', 'd', 'd', 's', 32, 0, |
3760 | 0 | /* 6226 */ 'q', 'v', 'f', 'x', 'x', 'c', 'p', 'n', 'm', 'a', 'd', 'd', 's', 32, 0, |
3761 | 0 | /* 6241 */ 'q', 'v', 'f', 'x', 'x', 'n', 'p', 'm', 'a', 'd', 'd', 's', 32, 0, |
3762 | 0 | /* 6255 */ 'q', 'v', 'f', 'x', 'm', 'a', 'd', 'd', 's', 32, 0, |
3763 | 0 | /* 6266 */ 'q', 'v', 'f', 'x', 'x', 'm', 'a', 'd', 'd', 's', 32, 0, |
3764 | 0 | /* 6278 */ 'q', 'v', 'f', 'c', 'f', 'i', 'd', 's', 32, 0, |
3765 | 0 | /* 6288 */ 'x', 's', 'c', 'v', 'd', 'p', 's', 'x', 'd', 's', 32, 0, |
3766 | 0 | /* 6300 */ 'x', 'v', 'c', 'v', 'd', 'p', 's', 'x', 'd', 's', 32, 0, |
3767 | 0 | /* 6312 */ 'x', 'v', 'c', 'v', 's', 'p', 's', 'x', 'd', 's', 32, 0, |
3768 | 0 | /* 6324 */ 'x', 's', 'c', 'v', 'd', 'p', 'u', 'x', 'd', 's', 32, 0, |
3769 | 0 | /* 6336 */ 'x', 'v', 'c', 'v', 'd', 'p', 'u', 'x', 'd', 's', 32, 0, |
3770 | 0 | /* 6348 */ 'x', 'v', 'c', 'v', 's', 'p', 'u', 'x', 'd', 's', 32, 0, |
3771 | 0 | /* 6360 */ 'q', 'v', 'f', 'r', 'e', 's', 32, 0, |
3772 | 0 | /* 6368 */ 'q', 'v', 'f', 'r', 's', 'q', 'r', 't', 'e', 's', 32, 0, |
3773 | 0 | /* 6380 */ 'm', 'f', 'f', 's', 32, 0, |
3774 | 0 | /* 6386 */ 'l', 'f', 's', 32, 0, |
3775 | 0 | /* 6391 */ 'm', 'c', 'r', 'f', 's', 32, 0, |
3776 | 0 | /* 6398 */ 's', 't', 'f', 's', 32, 0, |
3777 | 0 | /* 6404 */ 'v', 's', 'u', 'm', '4', 's', 'h', 's', 32, 0, |
3778 | 0 | /* 6414 */ 'v', 's', 'u', 'b', 's', 'h', 's', 32, 0, |
3779 | 0 | /* 6423 */ 'v', 'm', 'h', 'a', 'd', 'd', 's', 'h', 's', 32, 0, |
3780 | 0 | /* 6434 */ 'v', 'm', 'h', 'r', 'a', 'd', 'd', 's', 'h', 's', 32, 0, |
3781 | 0 | /* 6446 */ 'v', 'a', 'd', 'd', 's', 'h', 's', 32, 0, |
3782 | 0 | /* 6455 */ 'v', 'm', 's', 'u', 'm', 's', 'h', 's', 32, 0, |
3783 | 0 | /* 6465 */ 'v', 's', 'u', 'b', 'u', 'h', 's', 32, 0, |
3784 | 0 | /* 6474 */ 'v', 'a', 'd', 'd', 'u', 'h', 's', 32, 0, |
3785 | 0 | /* 6483 */ 'v', 'm', 's', 'u', 'm', 'u', 'h', 's', 32, 0, |
3786 | 0 | /* 6493 */ 's', 'u', 'b', 'i', 's', 32, 0, |
3787 | 0 | /* 6500 */ 'a', 'd', 'd', 'i', 's', 32, 0, |
3788 | 0 | /* 6507 */ 'l', 'i', 's', 32, 0, |
3789 | 0 | /* 6512 */ 'x', 'o', 'r', 'i', 's', 32, 0, |
3790 | 0 | /* 6519 */ 'e', 'v', 's', 'r', 'w', 'i', 's', 32, 0, |
3791 | 0 | /* 6528 */ 'q', 'v', 'f', 'm', 'u', 'l', 's', 32, 0, |
3792 | 0 | /* 6537 */ 'q', 'v', 'f', 'x', 'm', 'u', 'l', 's', 32, 0, |
3793 | 0 | /* 6547 */ 'e', 'v', 'l', 'w', 'h', 'o', 's', 32, 0, |
3794 | 0 | /* 6556 */ 'd', 's', 's', 32, 0, |
3795 | 0 | /* 6561 */ 'v', 'p', 'k', 's', 'h', 's', 's', 32, 0, |
3796 | 0 | /* 6570 */ 'v', 'p', 'k', 's', 'w', 's', 's', 32, 0, |
3797 | 0 | /* 6579 */ 'e', 'v', 'c', 'm', 'p', 'g', 't', 's', 32, 0, |
3798 | 0 | /* 6589 */ 'e', 'v', 'c', 'm', 'p', 'l', 't', 's', 32, 0, |
3799 | 0 | /* 6599 */ 'f', 's', 'q', 'r', 't', 's', 32, 0, |
3800 | 0 | /* 6607 */ 'q', 'v', 'f', 'c', 'f', 'i', 'd', 'u', 's', 32, 0, |
3801 | 0 | /* 6618 */ 'v', 'p', 'k', 's', 'h', 'u', 's', 32, 0, |
3802 | 0 | /* 6627 */ 'v', 'p', 'k', 'u', 'h', 'u', 's', 32, 0, |
3803 | 0 | /* 6636 */ 'v', 'p', 'k', 's', 'w', 'u', 's', 32, 0, |
3804 | 0 | /* 6645 */ 'v', 'p', 'k', 'u', 'w', 'u', 's', 32, 0, |
3805 | 0 | /* 6654 */ 'f', 'd', 'i', 'v', 's', 32, 0, |
3806 | 0 | /* 6661 */ 'e', 'v', 's', 'r', 'w', 's', 32, 0, |
3807 | 0 | /* 6669 */ 'v', 's', 'u', 'm', '2', 's', 'w', 's', 32, 0, |
3808 | 0 | /* 6679 */ 'v', 's', 'u', 'b', 's', 'w', 's', 32, 0, |
3809 | 0 | /* 6688 */ 'v', 'a', 'd', 'd', 's', 'w', 's', 32, 0, |
3810 | 0 | /* 6697 */ 'v', 's', 'u', 'm', 's', 'w', 's', 32, 0, |
3811 | 0 | /* 6706 */ 'v', 's', 'u', 'b', 'u', 'w', 's', 32, 0, |
3812 | 0 | /* 6715 */ 'v', 'a', 'd', 'd', 'u', 'w', 's', 32, 0, |
3813 | 0 | /* 6724 */ 'e', 'v', 'd', 'i', 'v', 'w', 's', 32, 0, |
3814 | 0 | /* 6733 */ 'x', 's', 'c', 'v', 'd', 'p', 's', 'x', 'w', 's', 32, 0, |
3815 | 0 | /* 6745 */ 'x', 'v', 'c', 'v', 'd', 'p', 's', 'x', 'w', 's', 32, 0, |
3816 | 0 | /* 6757 */ 'x', 'v', 'c', 'v', 's', 'p', 's', 'x', 'w', 's', 32, 0, |
3817 | 0 | /* 6769 */ 'x', 's', 'c', 'v', 'd', 'p', 'u', 'x', 'w', 's', 32, 0, |
3818 | 0 | /* 6781 */ 'x', 'v', 'c', 'v', 'd', 'p', 'u', 'x', 'w', 's', 32, 0, |
3819 | 0 | /* 6793 */ 'x', 'v', 'c', 'v', 's', 'p', 'u', 'x', 'w', 's', 32, 0, |
3820 | 0 | /* 6805 */ 'v', 'c', 't', 's', 'x', 's', 32, 0, |
3821 | 0 | /* 6813 */ 'v', 'c', 't', 'u', 'x', 's', 32, 0, |
3822 | 0 | /* 6821 */ 'e', 'v', 'l', 'h', 'h', 'e', 's', 'p', 'l', 'a', 't', 32, 0, |
3823 | 0 | /* 6834 */ 'e', 'v', 'l', 'w', 'h', 's', 'p', 'l', 'a', 't', 32, 0, |
3824 | 0 | /* 6846 */ 'e', 'v', 'l', 'h', 'h', 'o', 's', 's', 'p', 'l', 'a', 't', 32, 0, |
3825 | 0 | /* 6860 */ 'e', 'v', 'l', 'h', 'h', 'o', 'u', 's', 'p', 'l', 'a', 't', 32, 0, |
3826 | 0 | /* 6874 */ 'e', 'v', 'l', 'w', 'w', 's', 'p', 'l', 'a', 't', 32, 0, |
3827 | 0 | /* 6886 */ 'd', 'c', 'b', 't', 32, 0, |
3828 | 0 | /* 6892 */ 'i', 'c', 'b', 't', 32, 0, |
3829 | 0 | /* 6898 */ 'q', 'v', 'f', 'c', 'm', 'p', 'g', 't', 32, 0, |
3830 | 0 | /* 6908 */ 'w', 'a', 'i', 't', 32, 0, |
3831 | 0 | /* 6914 */ 'q', 'v', 'f', 'c', 'm', 'p', 'l', 't', 32, 0, |
3832 | 0 | /* 6924 */ 'f', 's', 'q', 'r', 't', 32, 0, |
3833 | 0 | /* 6931 */ 'd', 'c', 'b', 's', 't', 32, 0, |
3834 | 0 | /* 6938 */ 'd', 's', 't', 32, 0, |
3835 | 0 | /* 6943 */ 'd', 'c', 'b', 't', 's', 't', 32, 0, |
3836 | 0 | /* 6951 */ 'd', 's', 't', 's', 't', 32, 0, |
3837 | 0 | /* 6958 */ 'd', 's', 't', 't', 32, 0, |
3838 | 0 | /* 6964 */ 'd', 's', 't', 's', 't', 't', 32, 0, |
3839 | 0 | /* 6972 */ 'l', 'h', 'a', 'u', 32, 0, |
3840 | 0 | /* 6978 */ 's', 't', 'b', 'u', 32, 0, |
3841 | 0 | /* 6984 */ 'l', 'f', 'd', 'u', 32, 0, |
3842 | 0 | /* 6990 */ 's', 't', 'f', 'd', 'u', 32, 0, |
3843 | 0 | /* 6997 */ 'm', 'u', 'l', 'h', 'd', 'u', 32, 0, |
3844 | 0 | /* 7005 */ 'q', 'v', 'f', 'c', 'f', 'i', 'd', 'u', 32, 0, |
3845 | 0 | /* 7015 */ 'q', 'v', 'f', 'c', 't', 'i', 'd', 'u', 32, 0, |
3846 | 0 | /* 7025 */ 'l', 'd', 'u', 32, 0, |
3847 | 0 | /* 7030 */ 's', 't', 'd', 'u', 32, 0, |
3848 | 0 | /* 7036 */ 'd', 'i', 'v', 'd', 'u', 32, 0, |
3849 | 0 | /* 7043 */ 's', 't', 'h', 'u', 32, 0, |
3850 | 0 | /* 7049 */ 'e', 'v', 's', 'r', 'w', 'i', 'u', 32, 0, |
3851 | 0 | /* 7058 */ 'e', 'v', 'l', 'w', 'h', 'o', 'u', 32, 0, |
3852 | 0 | /* 7067 */ 'f', 'c', 'm', 'p', 'u', 32, 0, |
3853 | 0 | /* 7074 */ 'l', 'f', 's', 'u', 32, 0, |
3854 | 0 | /* 7080 */ 's', 't', 'f', 's', 'u', 32, 0, |
3855 | 0 | /* 7087 */ 'e', 'v', 'c', 'm', 'p', 'g', 't', 'u', 32, 0, |
3856 | 0 | /* 7097 */ 'e', 'v', 'c', 'm', 'p', 'l', 't', 'u', 32, 0, |
3857 | 0 | /* 7107 */ 'm', 'u', 'l', 'h', 'w', 'u', 32, 0, |
3858 | 0 | /* 7115 */ 'q', 'v', 'f', 'c', 't', 'i', 'w', 'u', 32, 0, |
3859 | 0 | /* 7125 */ 'e', 'v', 's', 'r', 'w', 'u', 32, 0, |
3860 | 0 | /* 7133 */ 's', 't', 'w', 'u', 32, 0, |
3861 | 0 | /* 7139 */ 'e', 'v', 'd', 'i', 'v', 'w', 'u', 32, 0, |
3862 | 0 | /* 7148 */ 'l', 'b', 'z', 'u', 32, 0, |
3863 | 0 | /* 7154 */ 'l', 'h', 'z', 'u', 32, 0, |
3864 | 0 | /* 7160 */ 'l', 'w', 'z', 'u', 32, 0, |
3865 | 0 | /* 7166 */ 'f', 'd', 'i', 'v', 32, 0, |
3866 | 0 | /* 7172 */ 'x', 'x', 'l', 'e', 'q', 'v', 32, 0, |
3867 | 0 | /* 7180 */ 'c', 'r', 'e', 'q', 'v', 32, 0, |
3868 | 0 | /* 7187 */ 'e', 'v', 'e', 'q', 'v', 32, 0, |
3869 | 0 | /* 7194 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'f', 'a', 'a', 'w', 32, 0, |
3870 | 0 | /* 7207 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'f', 'a', 'a', 'w', 32, 0, |
3871 | 0 | /* 7220 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'f', 'a', 'a', 'w', 32, 0, |
3872 | 0 | /* 7233 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'f', 'a', 'a', 'w', 32, 0, |
3873 | 0 | /* 7246 */ 'e', 'v', 'a', 'd', 'd', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3874 | 0 | /* 7259 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3875 | 0 | /* 7272 */ 'e', 'v', 's', 'u', 'b', 'f', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3876 | 0 | /* 7286 */ 'e', 'v', 'm', 'w', 'l', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3877 | 0 | /* 7299 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3878 | 0 | /* 7312 */ 'e', 'v', 'a', 'd', 'd', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3879 | 0 | /* 7325 */ 'e', 'v', 'm', 'h', 'e', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3880 | 0 | /* 7338 */ 'e', 'v', 's', 'u', 'b', 'f', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3881 | 0 | /* 7352 */ 'e', 'v', 'm', 'w', 'l', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3882 | 0 | /* 7365 */ 'e', 'v', 'm', 'h', 'o', 'u', 'm', 'i', 'a', 'a', 'w', 32, 0, |
3883 | 0 | /* 7378 */ 'e', 'v', 'a', 'd', 'd', 's', 's', 'i', 'a', 'a', 'w', 32, 0, |
3884 | 0 | /* 7391 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'i', 'a', 'a', 'w', 32, 0, |
3885 | 0 | /* 7404 */ 'e', 'v', 's', 'u', 'b', 'f', 's', 's', 'i', 'a', 'a', 'w', 32, 0, |
3886 | 0 | /* 7418 */ 'e', 'v', 'm', 'w', 'l', 's', 's', 'i', 'a', 'a', 'w', 32, 0, |
3887 | 0 | /* 7431 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'i', 'a', 'a', 'w', 32, 0, |
3888 | 0 | /* 7444 */ 'e', 'v', 'a', 'd', 'd', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, |
3889 | 0 | /* 7457 */ 'e', 'v', 'm', 'h', 'e', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, |
3890 | 0 | /* 7470 */ 'e', 'v', 's', 'u', 'b', 'f', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, |
3891 | 0 | /* 7484 */ 'e', 'v', 'm', 'w', 'l', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, |
3892 | 0 | /* 7497 */ 'e', 'v', 'm', 'h', 'o', 'u', 's', 'i', 'a', 'a', 'w', 32, 0, |
3893 | 0 | /* 7510 */ 'v', 's', 'r', 'a', 'w', 32, 0, |
3894 | 0 | /* 7517 */ 'e', 'v', 'a', 'd', 'd', 'w', 32, 0, |
3895 | 0 | /* 7525 */ 'e', 'v', 'l', 'd', 'w', 32, 0, |
3896 | 0 | /* 7532 */ 'e', 'v', 'r', 'n', 'd', 'w', 32, 0, |
3897 | 0 | /* 7540 */ 'e', 'v', 's', 't', 'd', 'w', 32, 0, |
3898 | 0 | /* 7548 */ 'e', 'v', 's', 'u', 'b', 'f', 'w', 32, 0, |
3899 | 0 | /* 7557 */ 'e', 'v', 's', 'u', 'b', 'i', 'f', 'w', 32, 0, |
3900 | 0 | /* 7567 */ 'v', 'm', 'r', 'g', 'h', 'w', 32, 0, |
3901 | 0 | /* 7575 */ 'x', 'x', 'm', 'r', 'g', 'h', 'w', 32, 0, |
3902 | 0 | /* 7584 */ 'm', 'u', 'l', 'h', 'w', 32, 0, |
3903 | 0 | /* 7591 */ 'e', 'v', 'a', 'd', 'd', 'i', 'w', 32, 0, |
3904 | 0 | /* 7600 */ 'q', 'v', 'f', 'c', 't', 'i', 'w', 32, 0, |
3905 | 0 | /* 7609 */ 'v', 'm', 'r', 'g', 'l', 'w', 32, 0, |
3906 | 0 | /* 7617 */ 'x', 'x', 'm', 'r', 'g', 'l', 'w', 32, 0, |
3907 | 0 | /* 7626 */ 'm', 'u', 'l', 'l', 'w', 32, 0, |
3908 | 0 | /* 7633 */ 'c', 'm', 'p', 'l', 'w', 32, 0, |
3909 | 0 | /* 7640 */ 'e', 'v', 'r', 'l', 'w', 32, 0, |
3910 | 0 | /* 7647 */ 'e', 'v', 's', 'l', 'w', 32, 0, |
3911 | 0 | /* 7654 */ 'l', 'm', 'w', 32, 0, |
3912 | 0 | /* 7659 */ 's', 't', 'm', 'w', 32, 0, |
3913 | 0 | /* 7665 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'f', 'a', 'n', 'w', 32, 0, |
3914 | 0 | /* 7678 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'f', 'a', 'n', 'w', 32, 0, |
3915 | 0 | /* 7691 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'f', 'a', 'n', 'w', 32, 0, |
3916 | 0 | /* 7704 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'f', 'a', 'n', 'w', 32, 0, |
3917 | 0 | /* 7717 */ 'e', 'v', 'm', 'h', 'e', 's', 'm', 'i', 'a', 'n', 'w', 32, 0, |
3918 | 0 | /* 7730 */ 'e', 'v', 'm', 'w', 'l', 's', 'm', 'i', 'a', 'n', 'w', 32, 0, |
3919 | 0 | /* 7743 */ 'e', 'v', 'm', 'h', 'o', 's', 'm', 'i', 'a', 'n', 'w', 32, 0, |
3920 | 0 | /* 7756 */ 'e', 'v', 'm', 'h', 'e', 'u', 'm', 'i', 'a', 'n', 'w', 32, 0, |
3921 | 0 | /* 7769 */ 'e', 'v', 'm', 'w', 'l', 'u', 'm', 'i', 'a', 'n', 'w', 32, 0, |
3922 | 0 | /* 7782 */ 'e', 'v', 'm', 'h', 'o', 'u', 'm', 'i', 'a', 'n', 'w', 32, 0, |
3923 | 0 | /* 7795 */ 'e', 'v', 'm', 'h', 'e', 's', 's', 'i', 'a', 'n', 'w', 32, 0, |
3924 | 0 | /* 7808 */ 'e', 'v', 'm', 'w', 'l', 's', 's', 'i', 'a', 'n', 'w', 32, 0, |
3925 | 0 | /* 7821 */ 'e', 'v', 'm', 'h', 'o', 's', 's', 'i', 'a', 'n', 'w', 32, 0, |
3926 | 0 | /* 7834 */ 'e', 'v', 'm', 'h', 'e', 'u', 's', 'i', 'a', 'n', 'w', 32, 0, |
3927 | 0 | /* 7847 */ 'e', 'v', 'm', 'w', 'l', 'u', 's', 'i', 'a', 'n', 'w', 32, 0, |
3928 | 0 | /* 7860 */ 'e', 'v', 'm', 'h', 'o', 'u', 's', 'i', 'a', 'n', 'w', 32, 0, |
3929 | 0 | /* 7873 */ 'c', 'm', 'p', 'w', 32, 0, |
3930 | 0 | /* 7879 */ 'v', 's', 'r', 'w', 32, 0, |
3931 | 0 | /* 7885 */ 'v', 'm', 'u', 'l', 'e', 's', 'w', 32, 0, |
3932 | 0 | /* 7894 */ 'v', 'a', 'v', 'g', 's', 'w', 32, 0, |
3933 | 0 | /* 7902 */ 'v', 's', 'p', 'l', 't', 'i', 's', 'w', 32, 0, |
3934 | 0 | /* 7912 */ 'e', 'v', 'c', 'n', 't', 'l', 's', 'w', 32, 0, |
3935 | 0 | /* 7922 */ 'v', 'm', 'i', 'n', 's', 'w', 32, 0, |
3936 | 0 | /* 7930 */ 'v', 'm', 'u', 'l', 'o', 's', 'w', 32, 0, |
3937 | 0 | /* 7939 */ 'v', 'c', 'm', 'p', 'g', 't', 's', 'w', 32, 0, |
3938 | 0 | /* 7949 */ 'e', 'x', 't', 's', 'w', 32, 0, |
3939 | 0 | /* 7956 */ 'v', 'm', 'a', 'x', 's', 'w', 32, 0, |
3940 | 0 | /* 7964 */ 'v', 's', 'p', 'l', 't', 'w', 32, 0, |
3941 | 0 | /* 7972 */ 'x', 'x', 's', 'p', 'l', 't', 'w', 32, 0, |
3942 | 0 | /* 7981 */ 'v', 'p', 'o', 'p', 'c', 'n', 't', 'w', 32, 0, |
3943 | 0 | /* 7991 */ 's', 't', 'w', 32, 0, |
3944 | 0 | /* 7996 */ 'v', 's', 'u', 'b', 'c', 'u', 'w', 32, 0, |
3945 | 0 | /* 8005 */ 'v', 'a', 'd', 'd', 'c', 'u', 'w', 32, 0, |
3946 | 0 | /* 8014 */ 'v', 'm', 'u', 'l', 'e', 'u', 'w', 32, 0, |
3947 | 0 | /* 8023 */ 'v', 'a', 'v', 'g', 'u', 'w', 32, 0, |
3948 | 0 | /* 8031 */ 'v', 'm', 'i', 'n', 'u', 'w', 32, 0, |
3949 | 0 | /* 8039 */ 'v', 'm', 'u', 'l', 'o', 'u', 'w', 32, 0, |
3950 | 0 | /* 8048 */ 'v', 'c', 'm', 'p', 'e', 'q', 'u', 'w', 32, 0, |
3951 | 0 | /* 8058 */ 'v', 'c', 'm', 'p', 'g', 't', 'u', 'w', 32, 0, |
3952 | 0 | /* 8068 */ 'v', 'm', 'a', 'x', 'u', 'w', 32, 0, |
3953 | 0 | /* 8076 */ 'd', 'i', 'v', 'w', 32, 0, |
3954 | 0 | /* 8082 */ 'v', 'c', 'l', 'z', 'w', 32, 0, |
3955 | 0 | /* 8089 */ 'e', 'v', 'c', 'n', 't', 'l', 'z', 'w', 32, 0, |
3956 | 0 | /* 8099 */ 'l', 'x', 'v', 'd', '2', 'x', 32, 0, |
3957 | 0 | /* 8107 */ 's', 't', 'x', 'v', 'd', '2', 'x', 32, 0, |
3958 | 0 | /* 8116 */ 'l', 'x', 'v', 'w', '4', 'x', 32, 0, |
3959 | 0 | /* 8124 */ 's', 't', 'x', 'v', 'w', '4', 'x', 32, 0, |
3960 | 0 | /* 8133 */ 'l', 'h', 'a', 'x', 32, 0, |
3961 | 0 | /* 8139 */ 't', 'l', 'b', 'i', 'v', 'a', 'x', 32, 0, |
3962 | 0 | /* 8148 */ 'q', 'v', 'l', 'f', 'i', 'w', 'a', 'x', 32, 0, |
3963 | 0 | /* 8158 */ 'l', 'w', 'a', 'x', 32, 0, |
3964 | 0 | /* 8164 */ 'l', 'v', 'e', 'b', 'x', 32, 0, |
3965 | 0 | /* 8171 */ 's', 't', 'v', 'e', 'b', 'x', 32, 0, |
3966 | 0 | /* 8179 */ 's', 't', 'b', 'x', 32, 0, |
3967 | 0 | /* 8185 */ 'q', 'v', 'l', 'f', 'c', 'd', 'x', 32, 0, |
3968 | 0 | /* 8194 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'x', 32, 0, |
3969 | 0 | /* 8204 */ 'e', 'v', 'l', 'd', 'd', 'x', 32, 0, |
3970 | 0 | /* 8212 */ 'e', 'v', 's', 't', 'd', 'd', 'x', 32, 0, |
3971 | 0 | /* 8221 */ 'q', 'v', 'l', 'f', 'd', 'x', 32, 0, |
3972 | 0 | /* 8229 */ 'q', 'v', 's', 't', 'f', 'd', 'x', 32, 0, |
3973 | 0 | /* 8238 */ 'q', 'v', 'l', 'p', 'c', 'l', 'd', 'x', 32, 0, |
3974 | 0 | /* 8248 */ 'q', 'v', 'l', 'p', 'c', 'r', 'd', 'x', 32, 0, |
3975 | 0 | /* 8258 */ 'l', 'x', 's', 'd', 'x', 32, 0, |
3976 | 0 | /* 8265 */ 's', 't', 'x', 's', 'd', 'x', 32, 0, |
3977 | 0 | /* 8273 */ 's', 't', 'd', 'x', 32, 0, |
3978 | 0 | /* 8279 */ 'e', 'v', 'l', 'w', 'h', 'e', 'x', 32, 0, |
3979 | 0 | /* 8288 */ 'e', 'v', 's', 't', 'w', 'h', 'e', 'x', 32, 0, |
3980 | 0 | /* 8298 */ 'e', 'v', 's', 't', 'w', 'w', 'e', 'x', 32, 0, |
3981 | 0 | /* 8308 */ 'e', 'v', 'l', 'd', 'h', 'x', 32, 0, |
3982 | 0 | /* 8316 */ 'e', 'v', 's', 't', 'd', 'h', 'x', 32, 0, |
3983 | 0 | /* 8325 */ 'l', 'v', 'e', 'h', 'x', 32, 0, |
3984 | 0 | /* 8332 */ 's', 't', 'v', 'e', 'h', 'x', 32, 0, |
3985 | 0 | /* 8340 */ 's', 't', 'h', 'x', 32, 0, |
3986 | 0 | /* 8346 */ 's', 't', 'b', 'c', 'i', 'x', 32, 0, |
3987 | 0 | /* 8354 */ 'l', 'd', 'c', 'i', 'x', 32, 0, |
3988 | 0 | /* 8361 */ 's', 't', 'd', 'c', 'i', 'x', 32, 0, |
3989 | 0 | /* 8369 */ 's', 't', 'h', 'c', 'i', 'x', 32, 0, |
3990 | 0 | /* 8377 */ 's', 't', 'w', 'c', 'i', 'x', 32, 0, |
3991 | 0 | /* 8385 */ 'l', 'b', 'z', 'c', 'i', 'x', 32, 0, |
3992 | 0 | /* 8393 */ 'l', 'h', 'z', 'c', 'i', 'x', 32, 0, |
3993 | 0 | /* 8401 */ 'l', 'w', 'z', 'c', 'i', 'x', 32, 0, |
3994 | 0 | /* 8409 */ 'e', 'v', 's', 't', 'w', 'h', 'o', 'x', 32, 0, |
3995 | 0 | /* 8419 */ 'e', 'v', 's', 't', 'w', 'w', 'o', 'x', 32, 0, |
3996 | 0 | /* 8429 */ 'v', 'u', 'p', 'k', 'h', 'p', 'x', 32, 0, |
3997 | 0 | /* 8438 */ 'v', 'p', 'k', 'p', 'x', 32, 0, |
3998 | 0 | /* 8445 */ 'v', 'u', 'p', 'k', 'l', 'p', 'x', 32, 0, |
3999 | 0 | /* 8454 */ 'l', 'd', 'a', 'r', 'x', 32, 0, |
4000 | 0 | /* 8461 */ 'l', 'w', 'a', 'r', 'x', 32, 0, |
4001 | 0 | /* 8468 */ 'l', 'd', 'b', 'r', 'x', 32, 0, |
4002 | 0 | /* 8475 */ 's', 't', 'd', 'b', 'r', 'x', 32, 0, |
4003 | 0 | /* 8483 */ 'l', 'h', 'b', 'r', 'x', 32, 0, |
4004 | 0 | /* 8490 */ 's', 't', 'h', 'b', 'r', 'x', 32, 0, |
4005 | 0 | /* 8498 */ 'l', 'w', 'b', 'r', 'x', 32, 0, |
4006 | 0 | /* 8505 */ 's', 't', 'w', 'b', 'r', 'x', 32, 0, |
4007 | 0 | /* 8513 */ 't', 'l', 'b', 's', 'x', 32, 0, |
4008 | 0 | /* 8520 */ 'q', 'v', 'l', 'f', 'c', 's', 'x', 32, 0, |
4009 | 0 | /* 8529 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'x', 32, 0, |
4010 | 0 | /* 8539 */ 'l', 'x', 'v', 'd', 's', 'x', 32, 0, |
4011 | 0 | /* 8547 */ 'v', 'c', 'f', 's', 'x', 32, 0, |
4012 | 0 | /* 8554 */ 'q', 'v', 'l', 'f', 's', 'x', 32, 0, |
4013 | 0 | /* 8562 */ 'q', 'v', 's', 't', 'f', 's', 'x', 32, 0, |
4014 | 0 | /* 8571 */ 'q', 'v', 'l', 'p', 'c', 'l', 's', 'x', 32, 0, |
4015 | 0 | /* 8581 */ 'e', 'v', 'l', 'w', 'h', 'o', 's', 'x', 32, 0, |
4016 | 0 | /* 8591 */ 'q', 'v', 'l', 'p', 'c', 'r', 's', 'x', 32, 0, |
4017 | 0 | /* 8601 */ 'e', 'v', 'l', 'h', 'h', 'e', 's', 'p', 'l', 'a', 't', 'x', 32, 0, |
4018 | 0 | /* 8615 */ 'e', 'v', 'l', 'w', 'h', 's', 'p', 'l', 'a', 't', 'x', 32, 0, |
4019 | 0 | /* 8628 */ 'e', 'v', 'l', 'h', 'h', 'o', 's', 's', 'p', 'l', 'a', 't', 'x', 32, 0, |
4020 | 0 | /* 8643 */ 'e', 'v', 'l', 'h', 'h', 'o', 'u', 's', 'p', 'l', 'a', 't', 'x', 32, 0, |
4021 | 0 | /* 8658 */ 'e', 'v', 'l', 'w', 'w', 's', 'p', 'l', 'a', 't', 'x', 32, 0, |
4022 | 0 | /* 8671 */ 'l', 'h', 'a', 'u', 'x', 32, 0, |
4023 | 0 | /* 8678 */ 'l', 'w', 'a', 'u', 'x', 32, 0, |
4024 | 0 | /* 8685 */ 's', 't', 'b', 'u', 'x', 32, 0, |
4025 | 0 | /* 8692 */ 'q', 'v', 'l', 'f', 'c', 'd', 'u', 'x', 32, 0, |
4026 | 0 | /* 8702 */ 'q', 'v', 's', 't', 'f', 'c', 'd', 'u', 'x', 32, 0, |
4027 | 0 | /* 8713 */ 'q', 'v', 'l', 'f', 'd', 'u', 'x', 32, 0, |
4028 | 0 | /* 8722 */ 'q', 'v', 's', 't', 'f', 'd', 'u', 'x', 32, 0, |
4029 | 0 | /* 8732 */ 'l', 'd', 'u', 'x', 32, 0, |
4030 | 0 | /* 8738 */ 's', 't', 'd', 'u', 'x', 32, 0, |
4031 | 0 | /* 8745 */ 'v', 'c', 'f', 'u', 'x', 32, 0, |
4032 | 0 | /* 8752 */ 's', 't', 'h', 'u', 'x', 32, 0, |
4033 | 0 | /* 8759 */ 'e', 'v', 'l', 'w', 'h', 'o', 'u', 'x', 32, 0, |
4034 | 0 | /* 8769 */ 'q', 'v', 'l', 'f', 'c', 's', 'u', 'x', 32, 0, |
4035 | 0 | /* 8779 */ 'q', 'v', 's', 't', 'f', 'c', 's', 'u', 'x', 32, 0, |
4036 | 0 | /* 8790 */ 'q', 'v', 'l', 'f', 's', 'u', 'x', 32, 0, |
4037 | 0 | /* 8799 */ 'q', 'v', 's', 't', 'f', 's', 'u', 'x', 32, 0, |
4038 | 0 | /* 8809 */ 's', 't', 'w', 'u', 'x', 32, 0, |
4039 | 0 | /* 8816 */ 'l', 'b', 'z', 'u', 'x', 32, 0, |
4040 | 0 | /* 8823 */ 'l', 'h', 'z', 'u', 'x', 32, 0, |
4041 | 0 | /* 8830 */ 'l', 'w', 'z', 'u', 'x', 32, 0, |
4042 | 0 | /* 8837 */ 'l', 'v', 'x', 32, 0, |
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4044 | 0 | /* 8848 */ 'e', 'v', 'l', 'd', 'w', 'x', 32, 0, |
4045 | 0 | /* 8856 */ 'e', 'v', 's', 't', 'd', 'w', 'x', 32, 0, |
4046 | 0 | /* 8865 */ 'l', 'v', 'e', 'w', 'x', 32, 0, |
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4049 | 0 | /* 8890 */ 's', 't', 'w', 'x', 32, 0, |
4050 | 0 | /* 8896 */ 'l', 'b', 'z', 'x', 32, 0, |
4051 | 0 | /* 8902 */ 'l', 'h', 'z', 'x', 32, 0, |
4052 | 0 | /* 8908 */ 'q', 'v', 'l', 'f', 'i', 'w', 'z', 'x', 32, 0, |
4053 | 0 | /* 8918 */ 'l', 'w', 'z', 'x', 32, 0, |
4054 | 0 | /* 8924 */ 'd', 'c', 'b', 'z', 32, 0, |
4055 | 0 | /* 8930 */ 'l', 'b', 'z', 32, 0, |
4056 | 0 | /* 8935 */ 'b', 'd', 'z', 32, 0, |
4057 | 0 | /* 8940 */ 'q', 'v', 'f', 'c', 't', 'i', 'd', 'z', 32, 0, |
4058 | 0 | /* 8950 */ 'l', 'h', 'z', 32, 0, |
4059 | 0 | /* 8955 */ 'v', 'r', 'f', 'i', 'z', 32, 0, |
4060 | 0 | /* 8962 */ 'x', 's', 'r', 'd', 'p', 'i', 'z', 32, 0, |
4061 | 0 | /* 8971 */ 'x', 'v', 'r', 'd', 'p', 'i', 'z', 32, 0, |
4062 | 0 | /* 8980 */ 'x', 'v', 'r', 's', 'p', 'i', 'z', 32, 0, |
4063 | 0 | /* 8989 */ 'q', 'v', 'f', 'r', 'i', 'z', 32, 0, |
4064 | 0 | /* 8997 */ 'b', 'd', 'n', 'z', 32, 0, |
4065 | 0 | /* 9003 */ 'q', 'v', 'f', 'c', 't', 'i', 'd', 'u', 'z', 32, 0, |
4066 | 0 | /* 9014 */ 'q', 'v', 'f', 'c', 't', 'i', 'w', 'u', 'z', 32, 0, |
4067 | 0 | /* 9025 */ 'q', 'v', 'f', 'c', 't', 'i', 'w', 'z', 32, 0, |
4068 | 0 | /* 9035 */ 'l', 'w', 'z', 32, 0, |
4069 | 0 | /* 9040 */ 'b', 'd', 'z', 'l', 'r', 'l', '+', 0, |
4070 | 0 | /* 9048 */ 'b', 'd', 'n', 'z', 'l', 'r', 'l', '+', 0, |
4071 | 0 | /* 9057 */ 'b', 'd', 'z', 'l', 'r', '+', 0, |
4072 | 0 | /* 9064 */ 'b', 'd', 'n', 'z', 'l', 'r', '+', 0, |
4073 | 0 | /* 9072 */ 'b', 'd', 'z', 'l', 'r', 'l', '-', 0, |
4074 | 0 | /* 9080 */ 'b', 'd', 'n', 'z', 'l', 'r', 'l', '-', 0, |
4075 | 0 | /* 9089 */ 'b', 'd', 'z', 'l', 'r', '-', 0, |
4076 | 0 | /* 9096 */ 'b', 'd', 'n', 'z', 'l', 'r', '-', 0, |
4077 | 0 | /* 9104 */ 'o', 'r', 'i', 32, '1', ',', 32, '1', ',', 32, '0', 0, |
4078 | 0 | /* 9116 */ 'o', 'r', 'i', 32, '2', ',', 32, '2', ',', 32, '0', 0, |
4079 | 0 | /* 9128 */ '#', 'A', 'D', 'D', 'I', 'S', 'd', 't', 'p', 'r', 'e', 'l', 'H', 'A', '3', '2', 0, |
4080 | 0 | /* 9145 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'S', 'U', 'B', '_', 'I', '3', '2', 0, |
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4082 | 0 | /* 9187 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'N', 'A', 'N', 'D', '_', 'I', '3', '2', 0, |
4083 | 0 | /* 9209 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'A', 'N', 'D', '_', 'I', '3', '2', 0, |
4084 | 0 | /* 9230 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'S', 'W', 'A', 'P', '_', 'I', '3', '2', 0, |
4085 | 0 | /* 9247 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'X', 'O', 'R', '_', 'I', '3', '2', 0, |
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4087 | 0 | /* 9288 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'g', 'd', 'L', '3', '2', 0, |
4088 | 0 | /* 9302 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'l', 'd', 'L', '3', '2', 0, |
4089 | 0 | /* 9316 */ '#', 'L', 'D', 'g', 'o', 't', 'T', 'p', 'r', 'e', 'l', 'L', '3', '2', 0, |
4090 | 0 | /* 9331 */ '#', 'A', 'D', 'D', 'I', 'd', 't', 'p', 'r', 'e', 'l', 'L', '3', '2', 0, |
4091 | 0 | /* 9346 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'L', 'O', 'N', 'G', 'J', 'M', 'P', '3', '2', 0, |
4092 | 0 | /* 9365 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'S', 'E', 'T', 'J', 'M', 'P', '3', '2', 0, |
4093 | 0 | /* 9383 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'g', 'd', 'L', 'A', 'D', 'D', 'R', '3', '2', 0, |
4094 | 0 | /* 9401 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'l', 'd', 'L', 'A', 'D', 'D', 'R', '3', '2', 0, |
4095 | 0 | /* 9419 */ 'G', 'E', 'T', 't', 'l', 's', 'l', 'd', 'A', 'D', 'D', 'R', '3', '2', 0, |
4096 | 0 | /* 9434 */ 'G', 'E', 'T', 't', 'l', 's', 'A', 'D', 'D', 'R', '3', '2', 0, |
4097 | 0 | /* 9447 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'S', 'U', 'B', '_', 'I', '6', '4', 0, |
4098 | 0 | /* 9468 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'A', 'D', 'D', '_', 'I', '6', '4', 0, |
4099 | 0 | /* 9489 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'N', 'A', 'N', 'D', '_', 'I', '6', '4', 0, |
4100 | 0 | /* 9511 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'S', 'W', 'A', 'P', '_', 'I', '6', '4', 0, |
4101 | 0 | /* 9528 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'M', 'P', '_', 'S', 'W', 'A', 'P', '_', 'I', '6', '4', 0, |
4102 | 0 | /* 9549 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'X', 'O', 'R', '_', 'I', '6', '4', 0, |
4103 | 0 | /* 9570 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'O', 'R', '_', 'I', '6', '4', 0, |
4104 | 0 | /* 9590 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'L', 'O', 'N', 'G', 'J', 'M', 'P', '6', '4', 0, |
4105 | 0 | /* 9609 */ '#', 'E', 'H', '_', 'S', 'J', 'L', 'J', '_', 'S', 'E', 'T', 'J', 'M', 'P', '6', '4', 0, |
4106 | 0 | /* 9627 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'A', 'N', 'D', '_', 'i', '6', '4', 0, |
4107 | 0 | /* 9648 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', '4', 0, |
4108 | 0 | /* 9662 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'F', '4', 0, |
4109 | 0 | /* 9673 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', '4', 0, |
4110 | 0 | /* 9687 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'I', '4', 0, |
4111 | 0 | /* 9698 */ 'c', 'r', 'x', 'o', 'r', 32, '6', ',', 32, '6', ',', 32, '6', 0, |
4112 | 0 | /* 9712 */ 'c', 'r', 'e', 'q', 'v', 32, '6', ',', 32, '6', ',', 32, '6', 0, |
4113 | 0 | /* 9726 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'S', 'U', 'B', '_', 'I', '1', '6', 0, |
4114 | 0 | /* 9747 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'A', 'D', 'D', '_', 'I', '1', '6', 0, |
4115 | 0 | /* 9768 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'N', 'A', 'N', 'D', '_', 'I', '1', '6', 0, |
4116 | 0 | /* 9790 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'A', 'N', 'D', '_', 'I', '1', '6', 0, |
4117 | 0 | /* 9811 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'S', 'W', 'A', 'P', '_', 'I', '1', '6', 0, |
4118 | 0 | /* 9828 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'X', 'O', 'R', '_', 'I', '1', '6', 0, |
4119 | 0 | /* 9849 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'O', 'R', '_', 'I', '1', '6', 0, |
4120 | 0 | /* 9869 */ '#', 'D', 'Y', 'N', 'A', 'L', 'L', 'O', 'C', '8', 0, |
4121 | 0 | /* 9880 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'F', '8', 0, |
4122 | 0 | /* 9894 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'F', '8', 0, |
4123 | 0 | /* 9905 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'S', 'U', 'B', '_', 'I', '8', 0, |
4124 | 0 | /* 9925 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'I', '8', 0, |
4125 | 0 | /* 9939 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'A', 'D', 'D', '_', 'I', '8', 0, |
4126 | 0 | /* 9959 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'N', 'A', 'N', 'D', '_', 'I', '8', 0, |
4127 | 0 | /* 9980 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'A', 'N', 'D', '_', 'I', '8', 0, |
4128 | 0 | /* 10000 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'M', 'P', '_', 'S', 'W', 'A', 'P', '_', 'I', '8', 0, |
4129 | 0 | /* 10020 */ 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'X', 'O', 'R', '_', 'I', '8', 0, |
4130 | 0 | /* 10039 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'L', 'O', 'A', 'D', '_', 'O', 'R', '_', 'I', '8', 0, |
4131 | 0 | /* 10058 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'I', '8', 0, |
4132 | 0 | /* 10069 */ '#', 'M', 'o', 'v', 'e', 'P', 'C', 't', 'o', 'L', 'R', '8', 0, |
4133 | 0 | /* 10082 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'E', 'Q', '_', 'B', 'I', 'T', '8', 0, |
4134 | 0 | /* 10099 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'G', 'T', '_', 'B', 'I', 'T', '8', 0, |
4135 | 0 | /* 10116 */ '#', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'S', 'W', 'A', 'P', '_', 'i', '8', 0, |
4136 | 0 | /* 10132 */ '#', 'A', 'D', 'D', 'I', 'S', 't', 'o', 'c', 'H', 'A', 0, |
4137 | 0 | /* 10144 */ '#', 'A', 'D', 'D', 'I', 'S', 't', 'l', 's', 'g', 'd', 'H', 'A', 0, |
4138 | 0 | /* 10158 */ '#', 'A', 'D', 'D', 'I', 'S', 't', 'l', 's', 'l', 'd', 'H', 'A', 0, |
4139 | 0 | /* 10172 */ '#', 'A', 'D', 'D', 'I', 'S', 'g', 'o', 't', 'T', 'p', 'r', 'e', 'l', 'H', 'A', 0, |
4140 | 0 | /* 10189 */ '#', 'A', 'D', 'D', 'I', 'S', 'd', 't', 'p', 'r', 'e', 'l', 'H', 'A', 0, |
4141 | 0 | /* 10204 */ '#', 'R', 'e', 'a', 'd', 'T', 'B', 0, |
4142 | 0 | /* 10212 */ '#', 'D', 'Y', 'N', 'A', 'L', 'L', 'O', 'C', 0, |
4143 | 0 | /* 10222 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'B', 'R', 'C', 0, |
4144 | 0 | /* 10238 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'Q', 'B', 'R', 'C', 0, |
4145 | 0 | /* 10251 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'F', 'R', 'C', 0, |
4146 | 0 | /* 10267 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'Q', 'F', 'R', 'C', 0, |
4147 | 0 | /* 10280 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'V', 'S', 'F', 'R', 'C', 0, |
4148 | 0 | /* 10297 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'V', 'S', 'F', 'R', 'C', 0, |
4149 | 0 | /* 10311 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'V', 'R', 'R', 'C', 0, |
4150 | 0 | /* 10327 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'V', 'R', 'R', 'C', 0, |
4151 | 0 | /* 10340 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'Q', 'S', 'R', 'C', 0, |
4152 | 0 | /* 10356 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'Q', 'S', 'R', 'C', 0, |
4153 | 0 | /* 10369 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', '_', 'V', 'S', 'R', 'C', 0, |
4154 | 0 | /* 10385 */ '#', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'V', 'S', 'R', 'C', 0, |
4155 | 0 | /* 10398 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, |
4156 | 0 | /* 10411 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, |
4157 | 0 | /* 10418 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, |
4158 | 0 | /* 10428 */ '#', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '_', 'V', 'R', 'S', 'A', 'V', 'E', 0, |
4159 | 0 | /* 10444 */ '#', 'S', 'P', 'I', 'L', 'L', '_', 'V', 'R', 'S', 'A', 'V', 'E', 0, |
4160 | 0 | /* 10458 */ '#', 'L', 'D', 't', 'o', 'c', 'J', 'T', 'I', 0, |
4161 | 0 | /* 10468 */ '#', 'L', 'D', 't', 'o', 'c', 'L', 0, |
4162 | 0 | /* 10476 */ '#', 'A', 'D', 'D', 'I', 't', 'o', 'c', 'L', 0, |
4163 | 0 | /* 10486 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'g', 'd', 'L', 0, |
4164 | 0 | /* 10498 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'l', 'd', 'L', 0, |
4165 | 0 | /* 10510 */ '#', 'L', 'D', 'g', 'o', 't', 'T', 'p', 'r', 'e', 'l', 'L', 0, |
4166 | 0 | /* 10523 */ '#', 'A', 'D', 'D', 'I', 'd', 't', 'p', 'r', 'e', 'l', 'L', 0, |
4167 | 0 | /* 10536 */ '#', 'U', 'p', 'd', 'a', 't', 'e', 'G', 'B', 'R', 0, |
4168 | 0 | /* 10547 */ '#', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '_', 'C', 'R', 0, |
4169 | 0 | /* 10559 */ '#', 'S', 'P', 'I', 'L', 'L', '_', 'C', 'R', 0, |
4170 | 0 | /* 10569 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'g', 'd', 'L', 'A', 'D', 'D', 'R', 0, |
4171 | 0 | /* 10585 */ '#', 'A', 'D', 'D', 'I', 't', 'l', 's', 'l', 'd', 'L', 'A', 'D', 'D', 'R', 0, |
4172 | 0 | /* 10601 */ '#', 'G', 'E', 'T', 't', 'l', 's', 'l', 'd', 'A', 'D', 'D', 'R', 0, |
4173 | 0 | /* 10615 */ '#', 'G', 'E', 'T', 't', 'l', 's', 'A', 'D', 'D', 'R', 0, |
4174 | 0 | /* 10627 */ '#', 'M', 'o', 'v', 'e', 'P', 'C', 't', 'o', 'L', 'R', 0, |
4175 | 0 | /* 10639 */ '#', 'M', 'o', 'v', 'e', 'G', 'O', 'T', 't', 'o', 'L', 'R', 0, |
4176 | 0 | /* 10652 */ '#', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '_', 'C', 'R', 'B', 'I', 'T', 0, |
4177 | 0 | /* 10667 */ '#', 'S', 'P', 'I', 'L', 'L', '_', 'C', 'R', 'B', 'I', 'T', 0, |
4178 | 0 | /* 10680 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'E', 'Q', '_', 'B', 'I', 'T', 0, |
4179 | 0 | /* 10696 */ '#', 'A', 'N', 'D', 'I', 'o', '_', '1', '_', 'G', 'T', '_', 'B', 'I', 'T', 0, |
4180 | 0 | /* 10712 */ '#', 'P', 'P', 'C', '3', '2', 'G', 'O', 'T', 0, |
4181 | 0 | /* 10722 */ '#', 'P', 'P', 'C', '3', '2', 'P', 'I', 'C', 'G', 'O', 'T', 0, |
4182 | 0 | /* 10735 */ '#', 'L', 'D', 't', 'o', 'c', 'C', 'P', 'T', 0, |
4183 | 0 | /* 10745 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, |
4184 | 0 | /* 10760 */ 's', 'l', 'b', 'i', 'a', 0, |
4185 | 0 | /* 10766 */ 't', 'l', 'b', 'i', 'a', 0, |
4186 | 0 | /* 10772 */ 'b', 0, |
4187 | 0 | /* 10774 */ 't', 'l', 'b', 's', 'y', 'n', 'c', 0, |
4188 | 0 | /* 10782 */ 'i', 's', 'y', 'n', 'c', 0, |
4189 | 0 | /* 10788 */ 'm', 's', 'y', 'n', 'c', 0, |
4190 | 0 | /* 10794 */ '#', 'L', 'D', 't', 'o', 'c', 0, |
4191 | 0 | /* 10801 */ '#', 'L', 'W', 'Z', 't', 'o', 'c', 0, |
4192 | 0 | /* 10809 */ 'r', 'f', 'i', 'd', 0, |
4193 | 0 | /* 10814 */ 't', 'l', 'b', 'r', 'e', 0, |
4194 | 0 | /* 10820 */ 't', 'l', 'b', 'w', 'e', 0, |
4195 | 0 | /* 10826 */ 'r', 'f', 'c', 'i', 0, |
4196 | 0 | /* 10831 */ 'r', 'f', 'm', 'c', 'i', 0, |
4197 | 0 | /* 10837 */ 'r', 'f', 'd', 'i', 0, |
4198 | 0 | /* 10842 */ 'r', 'f', 'i', 0, |
4199 | 0 | /* 10846 */ 'd', 's', 's', 'a', 'l', 'l', 0, |
4200 | 0 | /* 10853 */ 'b', 'l', 'r', 'l', 0, |
4201 | 0 | /* 10858 */ 'b', 'd', 'z', 'l', 'r', 'l', 0, |
4202 | 0 | /* 10865 */ 'b', 'd', 'n', 'z', 'l', 'r', 'l', 0, |
4203 | 0 | /* 10873 */ 'b', 'c', 't', 'r', 'l', 0, |
4204 | 0 | /* 10879 */ 'a', 't', 't', 'n', 0, |
4205 | 0 | /* 10884 */ 'e', 'i', 'e', 'i', 'o', 0, |
4206 | 0 | /* 10890 */ 't', 'r', 'a', 'p', 0, |
4207 | 0 | /* 10895 */ 'n', 'o', 'p', 0, |
4208 | 0 | /* 10899 */ 'b', 'l', 'r', 0, |
4209 | 0 | /* 10903 */ 'b', 'd', 'z', 'l', 'r', 0, |
4210 | 0 | /* 10909 */ 'b', 'd', 'n', 'z', 'l', 'r', 0, |
4211 | 0 | /* 10916 */ 'b', 'c', 't', 'r', 0, |
4212 | 0 | }; |
4213 | 0 | #endif |
4214 | | |
4215 | | // Emit the opcode for the instruction. |
4216 | 0 | unsigned int opcode = MCInst_getOpcode(MI); |
4217 | 0 | uint64_t Bits1 = OpInfo[opcode]; |
4218 | 0 | uint64_t Bits2 = OpInfo2[opcode]; |
4219 | 0 | uint64_t Bits = (Bits2 << 32) | Bits1; |
4220 | | // assert(Bits != 0 && "Cannot print this instruction."); |
4221 | 0 | #ifndef CAPSTONE_DIET |
4222 | 0 | SStream_concat0(O, AsmStrs+(Bits & 16383)-1); |
4223 | 0 | #endif |
4224 | | |
4225 | | // Fragment 0 encoded into 4 bits for 14 unique commands. |
4226 | | //printf("Frag-0: %"PRIu64"\n", (Bits >> 14) & 15); |
4227 | 0 | switch ((Bits >> 14) & 15) { |
4228 | 0 | default: // llvm_unreachable("Invalid command number."); |
4229 | 0 | case 0: |
4230 | | // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, ADDISdtprelHA, ADDISd... |
4231 | 0 | return; |
4232 | 0 | break; |
4233 | 0 | case 1: |
4234 | | // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... |
4235 | 0 | printOperand(MI, 0, O); |
4236 | 0 | break; |
4237 | 0 | case 2: |
4238 | | // ADJCALLSTACKDOWN, ADJCALLSTACKUP |
4239 | 0 | printU16ImmOperand(MI, 0, O); |
4240 | 0 | break; |
4241 | 0 | case 3: |
4242 | | // B, BCLalways, BDNZ, BDNZ8, BDNZL, BDNZLm, BDNZLp, BDNZm, BDNZp, BDZ, B... |
4243 | 0 | printBranchOperand(MI, 0, O); |
4244 | 0 | break; |
4245 | 0 | case 4: |
4246 | | // BA, BDNZA, BDNZAm, BDNZAp, BDNZLA, BDNZLAm, BDNZLAp, BDZA, BDZAm, BDZA... |
4247 | 0 | printAbsBranchOperand(MI, 0, O); |
4248 | 0 | break; |
4249 | 0 | case 5: |
4250 | | // BCC, BCCA, BCCCTR, BCCCTR8, BCCCTRL, BCCCTRL8, BCCL, BCCLA, BCCLR, BCC... |
4251 | 0 | printPredicateOperand(MI, 0, O, "cc"); |
4252 | 0 | break; |
4253 | 0 | case 6: |
4254 | | // BCTRL8_LDinto_toc |
4255 | 0 | printMemRegImm(MI, 0, O); |
4256 | 0 | return; |
4257 | 0 | break; |
4258 | 0 | case 7: |
4259 | | // BL8_NOP_TLS, BL8_TLS, BL8_TLS_, BL_TLS |
4260 | 0 | printTLSCall(MI, 0, O); |
4261 | 0 | break; |
4262 | 0 | case 8: |
4263 | | // DCBA, DCBF, DCBI, DCBST, DCBT, DCBTST, DCBZ, DCBZL, ICBI |
4264 | 0 | printMemRegReg(MI, 0, O); |
4265 | 0 | return; |
4266 | 0 | break; |
4267 | 0 | case 9: |
4268 | | // DSS, MBAR, MTFSB0, MTFSB1, TD, TDI, TW, TWI, gBC, gBCA, gBCCTR, gBCCTR... |
4269 | 0 | printU5ImmOperand(MI, 0, O); |
4270 | 0 | break; |
4271 | 0 | case 10: |
4272 | | // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64, MTDCR, MTV... |
4273 | 0 | printOperand(MI, 1, O); |
4274 | 0 | break; |
4275 | 0 | case 11: |
4276 | | // ICBT |
4277 | 0 | printU4ImmOperand(MI, 0, O); |
4278 | 0 | SStream_concat0(O, ", "); |
4279 | 0 | printMemRegReg(MI, 1, O); |
4280 | 0 | return; |
4281 | 0 | break; |
4282 | 0 | case 12: |
4283 | | // MTOCRF, MTOCRF8 |
4284 | 0 | printcrbitm(MI, 0, O); |
4285 | 0 | SStream_concat0(O, ", "); |
4286 | 0 | printOperand(MI, 1, O); |
4287 | 0 | return; |
4288 | 0 | break; |
4289 | 0 | case 13: |
4290 | | // MTSR |
4291 | 0 | printU4ImmOperand(MI, 1, O); |
4292 | 0 | SStream_concat0(O, ", "); |
4293 | 0 | printOperand(MI, 0, O); |
4294 | 0 | return; |
4295 | 0 | break; |
4296 | 0 | } |
4297 | | |
4298 | | |
4299 | | // Fragment 1 encoded into 5 bits for 18 unique commands. |
4300 | | //printf("Frag-1: %"PRIu64"\n", (Bits >> 18) & 31); |
4301 | 0 | switch ((Bits >> 18) & 31) { |
4302 | 0 | default: // llvm_unreachable("Invalid command number."); |
4303 | 0 | case 0: |
4304 | | // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... |
4305 | 0 | SStream_concat0(O, ", "); |
4306 | 0 | break; |
4307 | 0 | case 1: |
4308 | | // ADJCALLSTACKDOWN, B, BA, BCLalways, BDNZ, BDNZ8, BDNZA, BDNZAm, BDNZAp... |
4309 | 0 | return; |
4310 | 0 | break; |
4311 | 0 | case 2: |
4312 | | // ADJCALLSTACKUP, ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, TCRETURNai, ... |
4313 | 0 | SStream_concat0(O, " "); |
4314 | 0 | break; |
4315 | 0 | case 3: |
4316 | | // BCC |
4317 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4318 | 0 | SStream_concat0(O, " "); |
4319 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4320 | 0 | SStream_concat0(O, ", "); |
4321 | 0 | printBranchOperand(MI, 2, O); |
4322 | 0 | return; |
4323 | 0 | break; |
4324 | 0 | case 4: |
4325 | | // BCCA |
4326 | 0 | SStream_concat0(O, "a"); |
4327 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4328 | 0 | SStream_concat0(O, " "); |
4329 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4330 | 0 | SStream_concat0(O, ", "); |
4331 | 0 | printAbsBranchOperand(MI, 2, O); |
4332 | 0 | return; |
4333 | 0 | break; |
4334 | 0 | case 5: |
4335 | | // BCCCTR, BCCCTR8 |
4336 | 0 | SStream_concat0(O, "ctr"); |
4337 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4338 | 0 | SStream_concat0(O, " "); |
4339 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4340 | 0 | return; |
4341 | 0 | break; |
4342 | 0 | case 6: |
4343 | | // BCCCTRL, BCCCTRL8 |
4344 | 0 | SStream_concat0(O, "ctrl"); |
4345 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4346 | 0 | SStream_concat0(O, " "); |
4347 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4348 | 0 | return; |
4349 | 0 | break; |
4350 | 0 | case 7: |
4351 | | // BCCL |
4352 | 0 | SStream_concat0(O, "l"); |
4353 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4354 | 0 | SStream_concat0(O, " "); |
4355 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4356 | 0 | SStream_concat0(O, ", "); |
4357 | 0 | printBranchOperand(MI, 2, O); |
4358 | 0 | return; |
4359 | 0 | break; |
4360 | 0 | case 8: |
4361 | | // BCCLA |
4362 | 0 | SStream_concat0(O, "la"); |
4363 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4364 | 0 | SStream_concat0(O, " "); |
4365 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4366 | 0 | SStream_concat0(O, ", "); |
4367 | 0 | printAbsBranchOperand(MI, 2, O); |
4368 | 0 | return; |
4369 | 0 | break; |
4370 | 0 | case 9: |
4371 | | // BCCLR |
4372 | 0 | SStream_concat0(O, "lr"); |
4373 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4374 | 0 | SStream_concat0(O, " "); |
4375 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4376 | 0 | return; |
4377 | 0 | break; |
4378 | 0 | case 10: |
4379 | | // BCCLRL |
4380 | 0 | SStream_concat0(O, "lrl"); |
4381 | 0 | printPredicateOperand(MI, 0, O, "pm"); |
4382 | 0 | SStream_concat0(O, " "); |
4383 | 0 | printPredicateOperand(MI, 0, O, "reg"); |
4384 | 0 | return; |
4385 | 0 | break; |
4386 | 0 | case 11: |
4387 | | // BCCTR, BCCTR8, BCCTR8n, BCCTRL, BCCTRL8, BCCTRL8n, BCCTRLn, BCCTRn, BC... |
4388 | 0 | SStream_concat0(O, ", 0"); |
4389 | 0 | return; |
4390 | 0 | break; |
4391 | 0 | case 12: |
4392 | | // BL8_NOP, BL8_NOP_TLS, BLA8_NOP |
4393 | 0 | SStream_concat0(O, "\n\tnop"); // qq |
4394 | 0 | return; |
4395 | 0 | break; |
4396 | 0 | case 13: |
4397 | | // MFTB8 |
4398 | 0 | SStream_concat0(O, ", 268"); |
4399 | 0 | op_addImm(MI, 268); |
4400 | 0 | return; |
4401 | 0 | break; |
4402 | 0 | case 14: |
4403 | | // MFVRSAVE, MFVRSAVEv |
4404 | 0 | SStream_concat0(O, ", 256"); |
4405 | 0 | op_addImm(MI, 256); |
4406 | 0 | return; |
4407 | 0 | break; |
4408 | 0 | case 15: |
4409 | | // QVLPCLSXint |
4410 | 0 | SStream_concat0(O, ", 0, "); |
4411 | 0 | op_addImm(MI, 0); |
4412 | 0 | printOperand(MI, 1, O); |
4413 | 0 | return; |
4414 | 0 | break; |
4415 | 0 | case 16: |
4416 | | // TLBIE |
4417 | 0 | SStream_concat0(O, ","); |
4418 | 0 | printOperand(MI, 0, O); |
4419 | 0 | return; |
4420 | 0 | break; |
4421 | 0 | case 17: |
4422 | | // V_SETALLONES, V_SETALLONESB, V_SETALLONESH |
4423 | 0 | SStream_concat0(O, ", -1"); |
4424 | 0 | op_addImm(MI, -1); |
4425 | 0 | return; |
4426 | 0 | break; |
4427 | 0 | } |
4428 | | |
4429 | | |
4430 | | // Fragment 2 encoded into 5 bits for 17 unique commands. |
4431 | | //printf("Frag-2: %"PRIu64"\n", (Bits >> 23) & 31); |
4432 | 0 | switch ((Bits >> 23) & 31) { |
4433 | 0 | default: // llvm_unreachable("Invalid command number."); |
4434 | 0 | case 0: |
4435 | | // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... |
4436 | 0 | printOperand(MI, 1, O); |
4437 | 0 | break; |
4438 | 0 | case 1: |
4439 | | // ADJCALLSTACKUP |
4440 | 0 | printU16ImmOperand(MI, 1, O); |
4441 | 0 | return; |
4442 | 0 | break; |
4443 | 0 | case 2: |
4444 | | // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, LBZX, LBZX8, LDARX, LDBRX, L... |
4445 | 0 | printMemRegReg(MI, 1, O); |
4446 | 0 | break; |
4447 | 0 | case 3: |
4448 | | // BC, BCL, BCLn, BCn |
4449 | 0 | printBranchOperand(MI, 1, O); |
4450 | 0 | return; |
4451 | 0 | break; |
4452 | 0 | case 4: |
4453 | | // CRSET, CRUNSET, MTDCR, V_SET0, V_SET0B, V_SET0H |
4454 | 0 | printOperand(MI, 0, O); |
4455 | 0 | break; |
4456 | 0 | case 5: |
4457 | | // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64, RLDIMI, RL... |
4458 | 0 | printOperand(MI, 2, O); |
4459 | 0 | SStream_concat0(O, ", "); |
4460 | 0 | break; |
4461 | 0 | case 6: |
4462 | | // EVADDIW |
4463 | 0 | printU5ImmOperand(MI, 2, O); |
4464 | 0 | SStream_concat0(O, ", "); |
4465 | 0 | printOperand(MI, 1, O); |
4466 | 0 | return; |
4467 | 0 | break; |
4468 | 0 | case 7: |
4469 | | // EVLDD, EVLDH, EVLDW, EVLHHESPLAT, EVLHHOSSPLAT, EVLHHOUSPLAT, EVLWHE, ... |
4470 | 0 | printMemRegImm(MI, 1, O); |
4471 | 0 | return; |
4472 | 0 | break; |
4473 | 0 | case 8: |
4474 | | // EVSUBIFW |
4475 | 0 | printU5ImmOperand(MI, 1, O); |
4476 | 0 | SStream_concat0(O, ", "); |
4477 | 0 | printOperand(MI, 2, O); |
4478 | 0 | return; |
4479 | 0 | break; |
4480 | 0 | case 9: |
4481 | | // LA |
4482 | 0 | printS16ImmOperand(MI, 2, O); |
4483 | 0 | SStream_concat0(O, "("); |
4484 | 0 | printOperand(MI, 1, O); |
4485 | 0 | SStream_concat0(O, ")"); |
4486 | 0 | return; |
4487 | 0 | break; |
4488 | 0 | case 10: |
4489 | | // LBZU, LBZU8, LDU, LFDU, LFSU, LHAU, LHAU8, LHZU, LHZU8, LWZU, LWZU8, S... |
4490 | 0 | printMemRegImm(MI, 2, O); |
4491 | 0 | return; |
4492 | 0 | break; |
4493 | 0 | case 11: |
4494 | | // LBZUX, LBZUX8, LDUX, LFDUX, LFSUX, LHAUX, LHAUX8, LHZUX, LHZUX8, LWAUX... |
4495 | 0 | printMemRegReg(MI, 2, O); |
4496 | 0 | return; |
4497 | 0 | break; |
4498 | 0 | case 12: |
4499 | | // LI, LI8, LIS, LIS8 |
4500 | 0 | printS16ImmOperand(MI, 1, O); |
4501 | 0 | return; |
4502 | 0 | break; |
4503 | 0 | case 13: |
4504 | | // MFOCRF, MFOCRF8 |
4505 | 0 | printcrbitm(MI, 1, O); |
4506 | 0 | return; |
4507 | 0 | break; |
4508 | 0 | case 14: |
4509 | | // MFSR |
4510 | 0 | printU4ImmOperand(MI, 1, O); |
4511 | 0 | return; |
4512 | 0 | break; |
4513 | 0 | case 15: |
4514 | | // QVGPCI |
4515 | 0 | printU12ImmOperand(MI, 1, O); |
4516 | 0 | return; |
4517 | 0 | break; |
4518 | 0 | case 16: |
4519 | | // VSPLTISB, VSPLTISH, VSPLTISW |
4520 | 0 | printS5ImmOperand(MI, 1, O); |
4521 | 0 | return; |
4522 | 0 | break; |
4523 | 0 | } |
4524 | | |
4525 | | |
4526 | | // Fragment 3 encoded into 4 bits for 9 unique commands. |
4527 | | //printf("Frag-3: %"PRIu64"\n", (Bits >> 28) & 15); |
4528 | 0 | switch ((Bits >> 28) & 15) { |
4529 | 0 | default: // llvm_unreachable("Invalid command number."); |
4530 | 0 | case 0: |
4531 | | // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... |
4532 | 0 | SStream_concat0(O, ", "); |
4533 | 0 | break; |
4534 | 0 | case 1: |
4535 | | // ADDME, ADDME8, ADDME8o, ADDMEo, ADDZE, ADDZE8, ADDZE8o, ADDZEo, CNTLZD... |
4536 | 0 | return; |
4537 | 0 | break; |
4538 | 0 | case 2: |
4539 | | // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32 |
4540 | 0 | SStream_concat0(O, " "); |
4541 | 0 | printOperand(MI, 3, O); |
4542 | 0 | SStream_concat0(O, " "); |
4543 | 0 | printOperand(MI, 4, O); |
4544 | 0 | return; |
4545 | 0 | break; |
4546 | 0 | case 3: |
4547 | | // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64 |
4548 | 0 | printU5ImmOperand(MI, 0, O); |
4549 | 0 | return; |
4550 | 0 | break; |
4551 | 0 | case 4: |
4552 | | // RLDIMI, RLDIMIo |
4553 | 0 | printU6ImmOperand(MI, 3, O); |
4554 | 0 | SStream_concat0(O, ", "); |
4555 | 0 | printU6ImmOperand(MI, 4, O); |
4556 | 0 | return; |
4557 | 0 | break; |
4558 | 0 | case 5: |
4559 | | // RLWIMI, RLWIMI8, RLWIMI8o, RLWIMIo |
4560 | 0 | printU5ImmOperand(MI, 3, O); |
4561 | 0 | SStream_concat0(O, ", "); |
4562 | 0 | printU5ImmOperand(MI, 4, O); |
4563 | 0 | SStream_concat0(O, ", "); |
4564 | 0 | printU5ImmOperand(MI, 5, O); |
4565 | 0 | return; |
4566 | 0 | break; |
4567 | 0 | case 6: |
4568 | | // VCFSX, VCFUX, VCTSXS, VCTUXS, VSPLTB, VSPLTH, VSPLTW |
4569 | 0 | printU5ImmOperand(MI, 1, O); |
4570 | 0 | return; |
4571 | 0 | break; |
4572 | 0 | case 7: |
4573 | | // VCFSX_0, VCFUX_0, VCTSXS_0, VCTUXS_0 |
4574 | 0 | SStream_concat0(O, ", 0"); |
4575 | 0 | return; |
4576 | 0 | break; |
4577 | 0 | case 8: |
4578 | | // XSMADDADP, XSMADDMDP, XSMSUBADP, XSMSUBMDP, XSNMADDADP, XSNMADDMDP, XS... |
4579 | 0 | printOperand(MI, 3, O); |
4580 | 0 | return; |
4581 | 0 | break; |
4582 | 0 | } |
4583 | | |
4584 | | |
4585 | | // Fragment 4 encoded into 4 bits for 10 unique commands. |
4586 | | //printf("Frag-4: %"PRIu64"\n", (Bits >> 32) & 15); |
4587 | 0 | switch ((Bits >> 32) & 15) { |
4588 | 0 | default: // llvm_unreachable("Invalid command number."); |
4589 | 0 | case 0: |
4590 | | // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... |
4591 | 0 | printOperand(MI, 2, O); |
4592 | 0 | break; |
4593 | 0 | case 1: |
4594 | | // ADDI, ADDI8, ADDIC, ADDIC8, ADDICo, ADDIS, ADDIS8, CMPDI, CMPWI, MULLI... |
4595 | 0 | printS16ImmOperand(MI, 2, O); |
4596 | 0 | return; |
4597 | 0 | break; |
4598 | 0 | case 2: |
4599 | | // ANDISo, ANDISo8, ANDIo, ANDIo8, CMPLDI, CMPLWI, ORI, ORI8, ORIS, ORIS8... |
4600 | 0 | printU16ImmOperand(MI, 2, O); |
4601 | 0 | return; |
4602 | 0 | break; |
4603 | 0 | case 3: |
4604 | | // CLRLSLDI, CLRLSLDIo, CLRRDI, CLRRDIo, EXTLDI, EXTLDIo, EXTRDI, EXTRDIo... |
4605 | 0 | printU6ImmOperand(MI, 2, O); |
4606 | 0 | break; |
4607 | 0 | case 4: |
4608 | | // CLRLSLWI, CLRLSLWIo, CLRRWI, CLRRWIo, EVRLWI, EVSLWI, EVSRWIS, EVSRWIU... |
4609 | 0 | printU5ImmOperand(MI, 2, O); |
4610 | 0 | break; |
4611 | 0 | case 5: |
4612 | | // CRSET, CRUNSET, V_SET0, V_SET0B, V_SET0H |
4613 | 0 | printOperand(MI, 0, O); |
4614 | 0 | return; |
4615 | 0 | break; |
4616 | 0 | case 6: |
4617 | | // QVESPLATI, QVESPLATIb, QVESPLATIs, XXSPLTW |
4618 | 0 | printU2ImmOperand(MI, 2, O); |
4619 | 0 | return; |
4620 | 0 | break; |
4621 | 0 | case 7: |
4622 | | // QVFMADD, QVFMADDS, QVFMADDSs, QVFMSUB, QVFMSUBS, QVFMSUBSs, QVFNMADD, ... |
4623 | 0 | printOperand(MI, 3, O); |
4624 | 0 | SStream_concat0(O, ", "); |
4625 | 0 | printOperand(MI, 2, O); |
4626 | 0 | return; |
4627 | 0 | break; |
4628 | 0 | case 8: |
4629 | | // gBC, gBCL |
4630 | 0 | printBranchOperand(MI, 2, O); |
4631 | 0 | return; |
4632 | 0 | break; |
4633 | 0 | case 9: |
4634 | | // gBCA, gBCLA |
4635 | 0 | printAbsBranchOperand(MI, 2, O); |
4636 | 0 | return; |
4637 | 0 | break; |
4638 | 0 | } |
4639 | | |
4640 | | |
4641 | | // Fragment 5 encoded into 1 bits for 2 unique commands. |
4642 | | //printf("Frag-5: %"PRIu64"\n", (Bits >> 36) & 1); |
4643 | 0 | if ((Bits >> 36) & 1) { |
4644 | | // CLRLSLDI, CLRLSLDIo, CLRLSLWI, CLRLSLWIo, EXTLDI, EXTLDIo, EXTLWI, EXT... |
4645 | 0 | SStream_concat0(O, ", "); |
4646 | 0 | } else { |
4647 | | // ADD4, ADD4TLS, ADD4o, ADD8, ADD8TLS, ADD8TLS_, ADD8o, ADDC, ADDC8, ADD... |
4648 | 0 | return; |
4649 | 0 | } |
4650 | | |
4651 | | |
4652 | | // Fragment 6 encoded into 3 bits for 5 unique commands. |
4653 | | //printf("Frag-6: %"PRIu64"\n", (Bits >> 37) & 7); |
4654 | 0 | switch ((Bits >> 37) & 7) { |
4655 | 0 | default: // llvm_unreachable("Invalid command number."); |
4656 | 0 | case 0: |
4657 | | // CLRLSLDI, CLRLSLDIo, EXTLDI, EXTLDIo, EXTRDI, EXTRDIo, INSRDI, INSRDIo... |
4658 | 0 | printU6ImmOperand(MI, 3, O); |
4659 | 0 | return; |
4660 | 0 | break; |
4661 | 0 | case 1: |
4662 | | // CLRLSLWI, CLRLSLWIo, EXTLWI, EXTLWIo, EXTRWI, EXTRWIo, INSLWI, INSLWIo... |
4663 | 0 | printU5ImmOperand(MI, 3, O); |
4664 | 0 | break; |
4665 | 0 | case 2: |
4666 | | // FMADD, FMADDS, FMADDSo, FMADDo, FMSUB, FMSUBS, FMSUBSo, FMSUBo, FNMADD... |
4667 | 0 | printOperand(MI, 3, O); |
4668 | 0 | return; |
4669 | 0 | break; |
4670 | 0 | case 3: |
4671 | | // QVALIGNI, QVALIGNIb, QVALIGNIs, XXPERMDI, XXSLDWI |
4672 | 0 | printU2ImmOperand(MI, 3, O); |
4673 | 0 | return; |
4674 | 0 | break; |
4675 | 0 | case 4: |
4676 | | // QVFLOGICAL, QVFLOGICALb, QVFLOGICALs |
4677 | 0 | printU12ImmOperand(MI, 3, O); |
4678 | 0 | return; |
4679 | 0 | break; |
4680 | 0 | } |
4681 | | |
4682 | | |
4683 | | // Fragment 7 encoded into 1 bits for 2 unique commands. |
4684 | | //printf("Frag-7: %"PRIu64"\n", (Bits >> 40) & 1); |
4685 | 0 | if ((Bits >> 40) & 1) { |
4686 | | // RLWINM, RLWINM8, RLWINM8o, RLWINMo, RLWNM, RLWNM8, RLWNM8o, RLWNMo |
4687 | 0 | SStream_concat0(O, ", "); |
4688 | 0 | printU5ImmOperand(MI, 4, O); |
4689 | 0 | return; |
4690 | 0 | } else { |
4691 | | // CLRLSLWI, CLRLSLWIo, EXTLWI, EXTLWIo, EXTRWI, EXTRWIo, INSLWI, INSLWIo... |
4692 | 0 | return; |
4693 | 0 | } |
4694 | 0 | } |
4695 | | |
4696 | | |
4697 | | #ifndef CAPSTONE_DIET |
4698 | | /// getRegisterName - This method is automatically generated by tblgen |
4699 | | /// from the register set description. This returns the assembler name |
4700 | | /// for the specified register. |
4701 | | static const char *getRegisterName(unsigned RegNo) |
4702 | 0 | { |
4703 | | // assert(RegNo && RegNo < 310 && "Invalid register number!"); |
4704 | |
|
4705 | 0 | static const char AsmStrs[] = { |
4706 | 0 | /* 0 */ '*', '*', 'R', 'O', 'U', 'N', 'D', 'I', 'N', 'G', 32, 'M', 'O', 'D', 'E', '*', '*', 0, |
4707 | 0 | /* 18 */ '*', '*', 'F', 'R', 'A', 'M', 'E', 32, 'P', 'O', 'I', 'N', 'T', 'E', 'R', '*', '*', 0, |
4708 | 0 | /* 36 */ '*', '*', 'B', 'A', 'S', 'E', 32, 'P', 'O', 'I', 'N', 'T', 'E', 'R', '*', '*', 0, |
4709 | 0 | /* 53 */ 'f', '1', '0', 0, |
4710 | 0 | /* 57 */ 'q', '1', '0', 0, |
4711 | 0 | /* 61 */ 'r', '1', '0', 0, |
4712 | 0 | /* 65 */ 'v', 's', '1', '0', 0, |
4713 | 0 | /* 70 */ 'v', '1', '0', 0, |
4714 | 0 | /* 74 */ 'f', '2', '0', 0, |
4715 | 0 | /* 78 */ 'q', '2', '0', 0, |
4716 | 0 | /* 82 */ 'r', '2', '0', 0, |
4717 | 0 | /* 86 */ 'v', 's', '2', '0', 0, |
4718 | 0 | /* 91 */ 'v', '2', '0', 0, |
4719 | 0 | /* 95 */ 'f', '3', '0', 0, |
4720 | 0 | /* 99 */ 'q', '3', '0', 0, |
4721 | 0 | /* 103 */ 'r', '3', '0', 0, |
4722 | 0 | /* 107 */ 'v', 's', '3', '0', 0, |
4723 | 0 | /* 112 */ 'v', '3', '0', 0, |
4724 | 0 | /* 116 */ 'v', 's', '4', '0', 0, |
4725 | 0 | /* 121 */ 'v', 's', '5', '0', 0, |
4726 | 0 | /* 126 */ 'v', 's', '6', '0', 0, |
4727 | 0 | /* 131 */ 'f', '0', 0, |
4728 | 0 | /* 134 */ 'q', '0', 0, |
4729 | 0 | /* 137 */ 'c', 'r', '0', 0, |
4730 | 0 | /* 141 */ 'v', 's', '0', 0, |
4731 | 0 | /* 145 */ 'v', '0', 0, |
4732 | 0 | /* 148 */ 'f', '1', '1', 0, |
4733 | 0 | /* 152 */ 'q', '1', '1', 0, |
4734 | 0 | /* 156 */ 'r', '1', '1', 0, |
4735 | 0 | /* 160 */ 'v', 's', '1', '1', 0, |
4736 | 0 | /* 165 */ 'v', '1', '1', 0, |
4737 | 0 | /* 169 */ 'f', '2', '1', 0, |
4738 | 0 | /* 173 */ 'q', '2', '1', 0, |
4739 | 0 | /* 177 */ 'r', '2', '1', 0, |
4740 | 0 | /* 181 */ 'v', 's', '2', '1', 0, |
4741 | 0 | /* 186 */ 'v', '2', '1', 0, |
4742 | 0 | /* 190 */ 'f', '3', '1', 0, |
4743 | 0 | /* 194 */ 'q', '3', '1', 0, |
4744 | 0 | /* 198 */ 'r', '3', '1', 0, |
4745 | 0 | /* 202 */ 'v', 's', '3', '1', 0, |
4746 | 0 | /* 207 */ 'v', '3', '1', 0, |
4747 | 0 | /* 211 */ 'v', 's', '4', '1', 0, |
4748 | 0 | /* 216 */ 'v', 's', '5', '1', 0, |
4749 | 0 | /* 221 */ 'v', 's', '6', '1', 0, |
4750 | 0 | /* 226 */ 'f', '1', 0, |
4751 | 0 | /* 229 */ 'q', '1', 0, |
4752 | 0 | /* 232 */ 'c', 'r', '1', 0, |
4753 | 0 | /* 236 */ 'v', 's', '1', 0, |
4754 | 0 | /* 240 */ 'v', '1', 0, |
4755 | 0 | /* 243 */ 'f', '1', '2', 0, |
4756 | 0 | /* 247 */ 'q', '1', '2', 0, |
4757 | 0 | /* 251 */ 'r', '1', '2', 0, |
4758 | 0 | /* 255 */ 'v', 's', '1', '2', 0, |
4759 | 0 | /* 260 */ 'v', '1', '2', 0, |
4760 | 0 | /* 264 */ 'f', '2', '2', 0, |
4761 | 0 | /* 268 */ 'q', '2', '2', 0, |
4762 | 0 | /* 272 */ 'r', '2', '2', 0, |
4763 | 0 | /* 276 */ 'v', 's', '2', '2', 0, |
4764 | 0 | /* 281 */ 'v', '2', '2', 0, |
4765 | 0 | /* 285 */ 'v', 's', '3', '2', 0, |
4766 | 0 | /* 290 */ 'v', 's', '4', '2', 0, |
4767 | 0 | /* 295 */ 'v', 's', '5', '2', 0, |
4768 | 0 | /* 300 */ 'v', 's', '6', '2', 0, |
4769 | 0 | /* 305 */ 'f', '2', 0, |
4770 | 0 | /* 308 */ 'q', '2', 0, |
4771 | 0 | /* 311 */ 'c', 'r', '2', 0, |
4772 | 0 | /* 315 */ 'v', 's', '2', 0, |
4773 | 0 | /* 319 */ 'v', '2', 0, |
4774 | 0 | /* 322 */ 'f', '1', '3', 0, |
4775 | 0 | /* 326 */ 'q', '1', '3', 0, |
4776 | 0 | /* 330 */ 'r', '1', '3', 0, |
4777 | 0 | /* 334 */ 'v', 's', '1', '3', 0, |
4778 | 0 | /* 339 */ 'v', '1', '3', 0, |
4779 | 0 | /* 343 */ 'f', '2', '3', 0, |
4780 | 0 | /* 347 */ 'q', '2', '3', 0, |
4781 | 0 | /* 351 */ 'r', '2', '3', 0, |
4782 | 0 | /* 355 */ 'v', 's', '2', '3', 0, |
4783 | 0 | /* 360 */ 'v', '2', '3', 0, |
4784 | 0 | /* 364 */ 'v', 's', '3', '3', 0, |
4785 | 0 | /* 369 */ 'v', 's', '4', '3', 0, |
4786 | 0 | /* 374 */ 'v', 's', '5', '3', 0, |
4787 | 0 | /* 379 */ 'v', 's', '6', '3', 0, |
4788 | 0 | /* 384 */ 'f', '3', 0, |
4789 | 0 | /* 387 */ 'q', '3', 0, |
4790 | 0 | /* 390 */ 'c', 'r', '3', 0, |
4791 | 0 | /* 394 */ 'v', 's', '3', 0, |
4792 | 0 | /* 398 */ 'v', '3', 0, |
4793 | 0 | /* 401 */ 'f', '1', '4', 0, |
4794 | 0 | /* 405 */ 'q', '1', '4', 0, |
4795 | 0 | /* 409 */ 'r', '1', '4', 0, |
4796 | 0 | /* 413 */ 'v', 's', '1', '4', 0, |
4797 | 0 | /* 418 */ 'v', '1', '4', 0, |
4798 | 0 | /* 422 */ 'f', '2', '4', 0, |
4799 | 0 | /* 426 */ 'q', '2', '4', 0, |
4800 | 0 | /* 430 */ 'r', '2', '4', 0, |
4801 | 0 | /* 434 */ 'v', 's', '2', '4', 0, |
4802 | 0 | /* 439 */ 'v', '2', '4', 0, |
4803 | 0 | /* 443 */ 'v', 's', '3', '4', 0, |
4804 | 0 | /* 448 */ 'v', 's', '4', '4', 0, |
4805 | 0 | /* 453 */ 'v', 's', '5', '4', 0, |
4806 | 0 | /* 458 */ 'f', '4', 0, |
4807 | 0 | /* 461 */ 'q', '4', 0, |
4808 | 0 | /* 464 */ 'c', 'r', '4', 0, |
4809 | 0 | /* 468 */ 'v', 's', '4', 0, |
4810 | 0 | /* 472 */ 'v', '4', 0, |
4811 | 0 | /* 475 */ 'f', '1', '5', 0, |
4812 | 0 | /* 479 */ 'q', '1', '5', 0, |
4813 | 0 | /* 483 */ 'r', '1', '5', 0, |
4814 | 0 | /* 487 */ 'v', 's', '1', '5', 0, |
4815 | 0 | /* 492 */ 'v', '1', '5', 0, |
4816 | 0 | /* 496 */ 'f', '2', '5', 0, |
4817 | 0 | /* 500 */ 'q', '2', '5', 0, |
4818 | 0 | /* 504 */ 'r', '2', '5', 0, |
4819 | 0 | /* 508 */ 'v', 's', '2', '5', 0, |
4820 | 0 | /* 513 */ 'v', '2', '5', 0, |
4821 | 0 | /* 517 */ 'v', 's', '3', '5', 0, |
4822 | 0 | /* 522 */ 'v', 's', '4', '5', 0, |
4823 | 0 | /* 527 */ 'v', 's', '5', '5', 0, |
4824 | 0 | /* 532 */ 'f', '5', 0, |
4825 | 0 | /* 535 */ 'q', '5', 0, |
4826 | 0 | /* 538 */ 'c', 'r', '5', 0, |
4827 | 0 | /* 542 */ 'v', 's', '5', 0, |
4828 | 0 | /* 546 */ 'v', '5', 0, |
4829 | 0 | /* 549 */ 'f', '1', '6', 0, |
4830 | 0 | /* 553 */ 'q', '1', '6', 0, |
4831 | 0 | /* 557 */ 'r', '1', '6', 0, |
4832 | 0 | /* 561 */ 'v', 's', '1', '6', 0, |
4833 | 0 | /* 566 */ 'v', '1', '6', 0, |
4834 | 0 | /* 570 */ 'f', '2', '6', 0, |
4835 | 0 | /* 574 */ 'q', '2', '6', 0, |
4836 | 0 | /* 578 */ 'r', '2', '6', 0, |
4837 | 0 | /* 582 */ 'v', 's', '2', '6', 0, |
4838 | 0 | /* 587 */ 'v', '2', '6', 0, |
4839 | 0 | /* 591 */ 'v', 's', '3', '6', 0, |
4840 | 0 | /* 596 */ 'v', 's', '4', '6', 0, |
4841 | 0 | /* 601 */ 'v', 's', '5', '6', 0, |
4842 | 0 | /* 606 */ 'f', '6', 0, |
4843 | 0 | /* 609 */ 'q', '6', 0, |
4844 | 0 | /* 612 */ 'c', 'r', '6', 0, |
4845 | 0 | /* 616 */ 'v', 's', '6', 0, |
4846 | 0 | /* 620 */ 'v', '6', 0, |
4847 | 0 | /* 623 */ 'f', '1', '7', 0, |
4848 | 0 | /* 627 */ 'q', '1', '7', 0, |
4849 | 0 | /* 631 */ 'r', '1', '7', 0, |
4850 | 0 | /* 635 */ 'v', 's', '1', '7', 0, |
4851 | 0 | /* 640 */ 'v', '1', '7', 0, |
4852 | 0 | /* 644 */ 'f', '2', '7', 0, |
4853 | 0 | /* 648 */ 'q', '2', '7', 0, |
4854 | 0 | /* 652 */ 'r', '2', '7', 0, |
4855 | 0 | /* 656 */ 'v', 's', '2', '7', 0, |
4856 | 0 | /* 661 */ 'v', '2', '7', 0, |
4857 | 0 | /* 665 */ 'v', 's', '3', '7', 0, |
4858 | 0 | /* 670 */ 'v', 's', '4', '7', 0, |
4859 | 0 | /* 675 */ 'v', 's', '5', '7', 0, |
4860 | 0 | /* 680 */ 'f', '7', 0, |
4861 | 0 | /* 683 */ 'q', '7', 0, |
4862 | 0 | /* 686 */ 'c', 'r', '7', 0, |
4863 | 0 | /* 690 */ 'v', 's', '7', 0, |
4864 | 0 | /* 694 */ 'v', '7', 0, |
4865 | 0 | /* 697 */ 'f', '1', '8', 0, |
4866 | 0 | /* 701 */ 'q', '1', '8', 0, |
4867 | 0 | /* 705 */ 'r', '1', '8', 0, |
4868 | 0 | /* 709 */ 'v', 's', '1', '8', 0, |
4869 | 0 | /* 714 */ 'v', '1', '8', 0, |
4870 | 0 | /* 718 */ 'f', '2', '8', 0, |
4871 | 0 | /* 722 */ 'q', '2', '8', 0, |
4872 | 0 | /* 726 */ 'r', '2', '8', 0, |
4873 | 0 | /* 730 */ 'v', 's', '2', '8', 0, |
4874 | 0 | /* 735 */ 'v', '2', '8', 0, |
4875 | 0 | /* 739 */ 'v', 's', '3', '8', 0, |
4876 | 0 | /* 744 */ 'v', 's', '4', '8', 0, |
4877 | 0 | /* 749 */ 'v', 's', '5', '8', 0, |
4878 | 0 | /* 754 */ 'f', '8', 0, |
4879 | 0 | /* 757 */ 'q', '8', 0, |
4880 | 0 | /* 760 */ 'r', '8', 0, |
4881 | 0 | /* 763 */ 'v', 's', '8', 0, |
4882 | 0 | /* 767 */ 'v', '8', 0, |
4883 | 0 | /* 770 */ 'f', '1', '9', 0, |
4884 | 0 | /* 774 */ 'q', '1', '9', 0, |
4885 | 0 | /* 778 */ 'r', '1', '9', 0, |
4886 | 0 | /* 782 */ 'v', 's', '1', '9', 0, |
4887 | 0 | /* 787 */ 'v', '1', '9', 0, |
4888 | 0 | /* 791 */ 'f', '2', '9', 0, |
4889 | 0 | /* 795 */ 'q', '2', '9', 0, |
4890 | 0 | /* 799 */ 'r', '2', '9', 0, |
4891 | 0 | /* 803 */ 'v', 's', '2', '9', 0, |
4892 | 0 | /* 808 */ 'v', '2', '9', 0, |
4893 | 0 | /* 812 */ 'v', 's', '3', '9', 0, |
4894 | 0 | /* 817 */ 'v', 's', '4', '9', 0, |
4895 | 0 | /* 822 */ 'v', 's', '5', '9', 0, |
4896 | 0 | /* 827 */ 'f', '9', 0, |
4897 | 0 | /* 830 */ 'q', '9', 0, |
4898 | 0 | /* 833 */ 'r', '9', 0, |
4899 | 0 | /* 836 */ 'v', 's', '9', 0, |
4900 | 0 | /* 840 */ 'v', '9', 0, |
4901 | 0 | /* 843 */ 'c', 'a', 0, |
4902 | 0 | /* 846 */ 'v', 'r', 's', 'a', 'v', 'e', 0, |
4903 | 0 | /* 853 */ 'l', 'r', 0, |
4904 | 0 | /* 856 */ 'c', 't', 'r', 0, |
4905 | 0 | }; |
4906 | |
|
4907 | 0 | static const uint16_t RegAsmOffset[] = { |
4908 | 0 | 36, 843, 856, 18, 853, 0, 846, 55, 36, 137, 232, 311, 390, 464, |
4909 | 0 | 538, 612, 686, 856, 131, 226, 305, 384, 458, 532, 606, 680, 754, 827, |
4910 | 0 | 53, 148, 243, 322, 401, 475, 549, 623, 697, 770, 74, 169, 264, 343, |
4911 | 0 | 422, 496, 570, 644, 718, 791, 95, 190, 18, 853, 134, 229, 308, 387, |
4912 | 0 | 461, 535, 609, 683, 757, 830, 57, 152, 247, 326, 405, 479, 553, 627, |
4913 | 0 | 701, 774, 78, 173, 268, 347, 426, 500, 574, 648, 722, 795, 99, 194, |
4914 | 0 | 138, 233, 312, 391, 465, 539, 613, 687, 760, 833, 61, 156, 251, 330, |
4915 | 0 | 409, 483, 557, 631, 705, 778, 82, 177, 272, 351, 430, 504, 578, 652, |
4916 | 0 | 726, 799, 103, 198, 145, 240, 319, 398, 472, 546, 620, 694, 767, 840, |
4917 | 0 | 70, 165, 260, 339, 418, 492, 566, 640, 714, 787, 91, 186, 281, 360, |
4918 | 0 | 439, 513, 587, 661, 735, 808, 112, 207, 285, 364, 443, 517, 591, 665, |
4919 | 0 | 739, 812, 116, 211, 290, 369, 448, 522, 596, 670, 744, 817, 121, 216, |
4920 | 0 | 295, 374, 453, 527, 601, 675, 749, 822, 126, 221, 300, 379, 285, 364, |
4921 | 0 | 443, 517, 591, 665, 739, 812, 116, 211, 290, 369, 448, 522, 596, 670, |
4922 | 0 | 744, 817, 121, 216, 295, 374, 453, 527, 601, 675, 749, 822, 126, 221, |
4923 | 0 | 300, 379, 141, 236, 315, 394, 468, 542, 616, 690, 763, 836, 65, 160, |
4924 | 0 | 255, 334, 413, 487, 561, 635, 709, 782, 86, 181, 276, 355, 434, 508, |
4925 | 0 | 582, 656, 730, 803, 107, 202, 138, 233, 312, 391, 465, 539, 613, 687, |
4926 | 0 | 760, 833, 61, 156, 251, 330, 409, 483, 557, 631, 705, 778, 82, 177, |
4927 | 0 | 272, 351, 430, 504, 578, 652, 726, 799, 103, 198, 55, 245, 551, 54, |
4928 | 0 | 402, 698, 265, 571, 96, 150, 477, 772, 323, 624, 170, 497, 792, 55, |
4929 | 0 | 403, 699, 244, 550, 75, 423, 719, 324, 625, 149, 476, 771, 344, 645, |
4930 | 0 | 191, |
4931 | 0 | }; |
4932 | | |
4933 | | //assert (*(AsmStrs+RegAsmOffset[RegNo-1]) && |
4934 | | // "Invalid alt name index for register!"); |
4935 | | //int i; |
4936 | | //for (i = 0; i < sizeof(RegAsmOffset)/2; i++) |
4937 | | // printf("%s = %u\n", AsmStrs+RegAsmOffset[i], i + 1); |
4938 | | //printf("*************************\n"); |
4939 | 0 | return AsmStrs+RegAsmOffset[RegNo-1]; |
4940 | 0 | } |
4941 | | #endif |
4942 | | |
4943 | | #ifdef PRINT_ALIAS_INSTR |
4944 | | #undef PRINT_ALIAS_INSTR |
4945 | | |
4946 | | static void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, |
4947 | | unsigned PrintMethodIdx, SStream *OS) |
4948 | 0 | { |
4949 | 0 | switch (PrintMethodIdx) { |
4950 | 0 | default: |
4951 | | // llvm_unreachable("Unknown PrintMethod kind"); |
4952 | 0 | break; |
4953 | 0 | case 0: |
4954 | 0 | printBranchOperand(MI, OpIdx, OS); |
4955 | 0 | break; |
4956 | 0 | case 1: |
4957 | 0 | printAbsBranchOperand(MI, OpIdx, OS); |
4958 | 0 | break; |
4959 | 0 | case 2: |
4960 | 0 | printS16ImmOperand(MI, OpIdx, OS); |
4961 | 0 | break; |
4962 | 0 | case 3: |
4963 | 0 | printU16ImmOperand(MI, OpIdx, OS); |
4964 | 0 | break; |
4965 | 0 | case 4: |
4966 | 0 | printU6ImmOperand(MI, OpIdx, OS); |
4967 | 0 | break; |
4968 | 0 | case 5: |
4969 | 0 | printU5ImmOperand(MI, OpIdx, OS); |
4970 | 0 | break; |
4971 | 0 | } |
4972 | 0 | } |
4973 | | |
4974 | | static char *printAliasInstr(MCInst *MI, SStream *OS, void *info) |
4975 | 0 | { |
4976 | 0 | #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) |
4977 | 0 | const char *AsmString; |
4978 | 0 | char *tmp, *AsmMnem, *AsmOps, *c; |
4979 | 0 | int OpIdx, PrintMethodIdx; |
4980 | 0 | MCRegisterInfo *MRI = (MCRegisterInfo *)info; |
4981 | 0 | switch (MCInst_getOpcode(MI)) { |
4982 | 0 | default: return NULL; |
4983 | 0 | case PPC_BCC: |
4984 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
4985 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
4986 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
4987 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
4988 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
4989 | | // (BCC 12, crrc:$cc, condbrtarget:$dst) |
4990 | 0 | AsmString = "blt $\x02, $\xFF\x03\x01"; |
4991 | 0 | break; |
4992 | 0 | } |
4993 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
4994 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
4995 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
4996 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
4997 | | // (BCC 12, CR0, condbrtarget:$dst) |
4998 | 0 | AsmString = "blt $\xFF\x03\x01"; |
4999 | 0 | break; |
5000 | 0 | } |
5001 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5002 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5003 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5004 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5005 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5006 | | // (BCC 14, crrc:$cc, condbrtarget:$dst) |
5007 | 0 | AsmString = "blt- $\x02, $\xFF\x03\x01"; |
5008 | 0 | break; |
5009 | 0 | } |
5010 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5011 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5012 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5013 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5014 | | // (BCC 14, CR0, condbrtarget:$dst) |
5015 | 0 | AsmString = "blt- $\xFF\x03\x01"; |
5016 | 0 | break; |
5017 | 0 | } |
5018 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5019 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5020 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5021 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5022 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5023 | | // (BCC 15, crrc:$cc, condbrtarget:$dst) |
5024 | 0 | AsmString = "blt+ $\x02, $\xFF\x03\x01"; |
5025 | 0 | break; |
5026 | 0 | } |
5027 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5028 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5029 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5030 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5031 | | // (BCC 15, CR0, condbrtarget:$dst) |
5032 | 0 | AsmString = "blt+ $\xFF\x03\x01"; |
5033 | 0 | break; |
5034 | 0 | } |
5035 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5036 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5037 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5038 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5039 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5040 | | // (BCC 44, crrc:$cc, condbrtarget:$dst) |
5041 | 0 | AsmString = "bgt $\x02, $\xFF\x03\x01"; |
5042 | 0 | break; |
5043 | 0 | } |
5044 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5045 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5046 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5047 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5048 | | // (BCC 44, CR0, condbrtarget:$dst) |
5049 | 0 | AsmString = "bgt $\xFF\x03\x01"; |
5050 | 0 | break; |
5051 | 0 | } |
5052 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5053 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5054 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5055 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5056 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5057 | | // (BCC 46, crrc:$cc, condbrtarget:$dst) |
5058 | 0 | AsmString = "bgt- $\x02, $\xFF\x03\x01"; |
5059 | 0 | break; |
5060 | 0 | } |
5061 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5062 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5063 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5064 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5065 | | // (BCC 46, CR0, condbrtarget:$dst) |
5066 | 0 | AsmString = "bgt- $\xFF\x03\x01"; |
5067 | 0 | break; |
5068 | 0 | } |
5069 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5070 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5071 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5072 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5073 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5074 | | // (BCC 47, crrc:$cc, condbrtarget:$dst) |
5075 | 0 | AsmString = "bgt+ $\x02, $\xFF\x03\x01"; |
5076 | 0 | break; |
5077 | 0 | } |
5078 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5079 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5080 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5081 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5082 | | // (BCC 47, CR0, condbrtarget:$dst) |
5083 | 0 | AsmString = "bgt+ $\xFF\x03\x01"; |
5084 | 0 | break; |
5085 | 0 | } |
5086 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5087 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5088 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5089 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5090 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5091 | | // (BCC 76, crrc:$cc, condbrtarget:$dst) |
5092 | 0 | AsmString = "beq $\x02, $\xFF\x03\x01"; |
5093 | 0 | break; |
5094 | 0 | } |
5095 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5096 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5097 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5098 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5099 | | // (BCC 76, CR0, condbrtarget:$dst) |
5100 | 0 | AsmString = "beq $\xFF\x03\x01"; |
5101 | 0 | break; |
5102 | 0 | } |
5103 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5104 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5105 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5106 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5107 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5108 | | // (BCC 78, crrc:$cc, condbrtarget:$dst) |
5109 | 0 | AsmString = "beq- $\x02, $\xFF\x03\x01"; |
5110 | 0 | break; |
5111 | 0 | } |
5112 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5113 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5114 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5115 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5116 | | // (BCC 78, CR0, condbrtarget:$dst) |
5117 | 0 | AsmString = "beq- $\xFF\x03\x01"; |
5118 | 0 | break; |
5119 | 0 | } |
5120 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5121 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5122 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5123 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5124 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5125 | | // (BCC 79, crrc:$cc, condbrtarget:$dst) |
5126 | 0 | AsmString = "beq+ $\x02, $\xFF\x03\x01"; |
5127 | 0 | break; |
5128 | 0 | } |
5129 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5130 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5131 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5132 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5133 | | // (BCC 79, CR0, condbrtarget:$dst) |
5134 | 0 | AsmString = "beq+ $\xFF\x03\x01"; |
5135 | 0 | break; |
5136 | 0 | } |
5137 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5138 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5139 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5140 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5141 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5142 | | // (BCC 68, crrc:$cc, condbrtarget:$dst) |
5143 | 0 | AsmString = "bne $\x02, $\xFF\x03\x01"; |
5144 | 0 | break; |
5145 | 0 | } |
5146 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5147 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5148 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5149 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5150 | | // (BCC 68, CR0, condbrtarget:$dst) |
5151 | 0 | AsmString = "bne $\xFF\x03\x01"; |
5152 | 0 | break; |
5153 | 0 | } |
5154 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5155 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5156 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5157 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5158 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5159 | | // (BCC 70, crrc:$cc, condbrtarget:$dst) |
5160 | 0 | AsmString = "bne- $\x02, $\xFF\x03\x01"; |
5161 | 0 | break; |
5162 | 0 | } |
5163 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5164 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5165 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5166 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5167 | | // (BCC 70, CR0, condbrtarget:$dst) |
5168 | 0 | AsmString = "bne- $\xFF\x03\x01"; |
5169 | 0 | break; |
5170 | 0 | } |
5171 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5172 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5173 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5174 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5175 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5176 | | // (BCC 71, crrc:$cc, condbrtarget:$dst) |
5177 | 0 | AsmString = "bne+ $\x02, $\xFF\x03\x01"; |
5178 | 0 | break; |
5179 | 0 | } |
5180 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5181 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5182 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5183 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5184 | | // (BCC 71, CR0, condbrtarget:$dst) |
5185 | 0 | AsmString = "bne+ $\xFF\x03\x01"; |
5186 | 0 | break; |
5187 | 0 | } |
5188 | 0 | return NULL; |
5189 | 0 | case PPC_BCCA: |
5190 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5191 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5192 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5193 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5194 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5195 | | // (BCCA 12, crrc:$cc, abscondbrtarget:$dst) |
5196 | 0 | AsmString = "blta $\x02, $\xFF\x03\x02"; |
5197 | 0 | break; |
5198 | 0 | } |
5199 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5200 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5201 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5202 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5203 | | // (BCCA 12, CR0, abscondbrtarget:$dst) |
5204 | 0 | AsmString = "blta $\xFF\x03\x02"; |
5205 | 0 | break; |
5206 | 0 | } |
5207 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5208 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5209 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5210 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5211 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5212 | | // (BCCA 14, crrc:$cc, abscondbrtarget:$dst) |
5213 | 0 | AsmString = "blta- $\x02, $\xFF\x03\x02"; |
5214 | 0 | break; |
5215 | 0 | } |
5216 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5217 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5218 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5219 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5220 | | // (BCCA 14, CR0, abscondbrtarget:$dst) |
5221 | 0 | AsmString = "blta- $\xFF\x03\x02"; |
5222 | 0 | break; |
5223 | 0 | } |
5224 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5225 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5226 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5227 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5228 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5229 | | // (BCCA 15, crrc:$cc, abscondbrtarget:$dst) |
5230 | 0 | AsmString = "blta+ $\x02, $\xFF\x03\x02"; |
5231 | 0 | break; |
5232 | 0 | } |
5233 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5234 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5235 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5236 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5237 | | // (BCCA 15, CR0, abscondbrtarget:$dst) |
5238 | 0 | AsmString = "blta+ $\xFF\x03\x02"; |
5239 | 0 | break; |
5240 | 0 | } |
5241 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5242 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5243 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5244 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5245 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5246 | | // (BCCA 44, crrc:$cc, abscondbrtarget:$dst) |
5247 | 0 | AsmString = "bgta $\x02, $\xFF\x03\x02"; |
5248 | 0 | break; |
5249 | 0 | } |
5250 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5251 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5252 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5253 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5254 | | // (BCCA 44, CR0, abscondbrtarget:$dst) |
5255 | 0 | AsmString = "bgta $\xFF\x03\x02"; |
5256 | 0 | break; |
5257 | 0 | } |
5258 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5259 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5260 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5261 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5262 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5263 | | // (BCCA 46, crrc:$cc, abscondbrtarget:$dst) |
5264 | 0 | AsmString = "bgta- $\x02, $\xFF\x03\x02"; |
5265 | 0 | break; |
5266 | 0 | } |
5267 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5268 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5269 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5270 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5271 | | // (BCCA 46, CR0, abscondbrtarget:$dst) |
5272 | 0 | AsmString = "bgta- $\xFF\x03\x02"; |
5273 | 0 | break; |
5274 | 0 | } |
5275 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5276 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5277 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5278 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5279 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5280 | | // (BCCA 47, crrc:$cc, abscondbrtarget:$dst) |
5281 | 0 | AsmString = "bgta+ $\x02, $\xFF\x03\x02"; |
5282 | 0 | break; |
5283 | 0 | } |
5284 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5285 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5286 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5287 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5288 | | // (BCCA 47, CR0, abscondbrtarget:$dst) |
5289 | 0 | AsmString = "bgta+ $\xFF\x03\x02"; |
5290 | 0 | break; |
5291 | 0 | } |
5292 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5293 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5294 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5295 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5296 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5297 | | // (BCCA 76, crrc:$cc, abscondbrtarget:$dst) |
5298 | 0 | AsmString = "beqa $\x02, $\xFF\x03\x02"; |
5299 | 0 | break; |
5300 | 0 | } |
5301 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5302 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5303 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5304 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5305 | | // (BCCA 76, CR0, abscondbrtarget:$dst) |
5306 | 0 | AsmString = "beqa $\xFF\x03\x02"; |
5307 | 0 | break; |
5308 | 0 | } |
5309 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5310 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5311 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5312 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5313 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5314 | | // (BCCA 78, crrc:$cc, abscondbrtarget:$dst) |
5315 | 0 | AsmString = "beqa- $\x02, $\xFF\x03\x02"; |
5316 | 0 | break; |
5317 | 0 | } |
5318 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5319 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5320 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5321 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5322 | | // (BCCA 78, CR0, abscondbrtarget:$dst) |
5323 | 0 | AsmString = "beqa- $\xFF\x03\x02"; |
5324 | 0 | break; |
5325 | 0 | } |
5326 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5327 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5328 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5329 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5330 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5331 | | // (BCCA 79, crrc:$cc, abscondbrtarget:$dst) |
5332 | 0 | AsmString = "beqa+ $\x02, $\xFF\x03\x02"; |
5333 | 0 | break; |
5334 | 0 | } |
5335 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5336 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5337 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5338 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5339 | | // (BCCA 79, CR0, abscondbrtarget:$dst) |
5340 | 0 | AsmString = "beqa+ $\xFF\x03\x02"; |
5341 | 0 | break; |
5342 | 0 | } |
5343 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5344 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5345 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5346 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5347 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5348 | | // (BCCA 68, crrc:$cc, abscondbrtarget:$dst) |
5349 | 0 | AsmString = "bnea $\x02, $\xFF\x03\x02"; |
5350 | 0 | break; |
5351 | 0 | } |
5352 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5353 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5354 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5355 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5356 | | // (BCCA 68, CR0, abscondbrtarget:$dst) |
5357 | 0 | AsmString = "bnea $\xFF\x03\x02"; |
5358 | 0 | break; |
5359 | 0 | } |
5360 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5361 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5362 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5363 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5364 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5365 | | // (BCCA 70, crrc:$cc, abscondbrtarget:$dst) |
5366 | 0 | AsmString = "bnea- $\x02, $\xFF\x03\x02"; |
5367 | 0 | break; |
5368 | 0 | } |
5369 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5370 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5371 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5372 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5373 | | // (BCCA 70, CR0, abscondbrtarget:$dst) |
5374 | 0 | AsmString = "bnea- $\xFF\x03\x02"; |
5375 | 0 | break; |
5376 | 0 | } |
5377 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5378 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5379 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5380 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5381 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5382 | | // (BCCA 71, crrc:$cc, abscondbrtarget:$dst) |
5383 | 0 | AsmString = "bnea+ $\x02, $\xFF\x03\x02"; |
5384 | 0 | break; |
5385 | 0 | } |
5386 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5387 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5388 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5389 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5390 | | // (BCCA 71, CR0, abscondbrtarget:$dst) |
5391 | 0 | AsmString = "bnea+ $\xFF\x03\x02"; |
5392 | 0 | break; |
5393 | 0 | } |
5394 | 0 | return NULL; |
5395 | 0 | case PPC_BCCCTR: |
5396 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5397 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5398 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5399 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5400 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5401 | | // (BCCCTR 12, crrc:$cc) |
5402 | 0 | AsmString = "bltctr $\x02"; |
5403 | 0 | break; |
5404 | 0 | } |
5405 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5406 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5407 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5408 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5409 | | // (BCCCTR 12, CR0) |
5410 | 0 | AsmString = "bltctr"; |
5411 | 0 | break; |
5412 | 0 | } |
5413 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5414 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5415 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5416 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5417 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5418 | | // (BCCCTR 14, crrc:$cc) |
5419 | 0 | AsmString = "bltctr- $\x02"; |
5420 | 0 | break; |
5421 | 0 | } |
5422 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5423 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5424 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5425 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5426 | | // (BCCCTR 14, CR0) |
5427 | 0 | AsmString = "bltctr-"; |
5428 | 0 | break; |
5429 | 0 | } |
5430 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5431 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5432 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5433 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5434 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5435 | | // (BCCCTR 15, crrc:$cc) |
5436 | 0 | AsmString = "bltctr+ $\x02"; |
5437 | 0 | break; |
5438 | 0 | } |
5439 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5440 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5441 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5442 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5443 | | // (BCCCTR 15, CR0) |
5444 | 0 | AsmString = "bltctr+"; |
5445 | 0 | break; |
5446 | 0 | } |
5447 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5448 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5449 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5450 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5451 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5452 | | // (BCCCTR 44, crrc:$cc) |
5453 | 0 | AsmString = "bgtctr $\x02"; |
5454 | 0 | break; |
5455 | 0 | } |
5456 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5457 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5458 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5459 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5460 | | // (BCCCTR 44, CR0) |
5461 | 0 | AsmString = "bgtctr"; |
5462 | 0 | break; |
5463 | 0 | } |
5464 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5465 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5466 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5467 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5468 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5469 | | // (BCCCTR 46, crrc:$cc) |
5470 | 0 | AsmString = "bgtctr- $\x02"; |
5471 | 0 | break; |
5472 | 0 | } |
5473 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5474 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5475 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5476 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5477 | | // (BCCCTR 46, CR0) |
5478 | 0 | AsmString = "bgtctr-"; |
5479 | 0 | break; |
5480 | 0 | } |
5481 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5482 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5483 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5484 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5485 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5486 | | // (BCCCTR 47, crrc:$cc) |
5487 | 0 | AsmString = "bgtctr+ $\x02"; |
5488 | 0 | break; |
5489 | 0 | } |
5490 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5491 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5492 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5493 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5494 | | // (BCCCTR 47, CR0) |
5495 | 0 | AsmString = "bgtctr+"; |
5496 | 0 | break; |
5497 | 0 | } |
5498 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5499 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5500 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5501 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5502 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5503 | | // (BCCCTR 76, crrc:$cc) |
5504 | 0 | AsmString = "beqctr $\x02"; |
5505 | 0 | break; |
5506 | 0 | } |
5507 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5508 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5509 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5510 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5511 | | // (BCCCTR 76, CR0) |
5512 | 0 | AsmString = "beqctr"; |
5513 | 0 | break; |
5514 | 0 | } |
5515 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5516 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5517 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5518 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5519 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5520 | | // (BCCCTR 78, crrc:$cc) |
5521 | 0 | AsmString = "beqctr- $\x02"; |
5522 | 0 | break; |
5523 | 0 | } |
5524 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5525 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5526 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5527 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5528 | | // (BCCCTR 78, CR0) |
5529 | 0 | AsmString = "beqctr-"; |
5530 | 0 | break; |
5531 | 0 | } |
5532 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5533 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5534 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5535 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5536 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5537 | | // (BCCCTR 79, crrc:$cc) |
5538 | 0 | AsmString = "beqctr+ $\x02"; |
5539 | 0 | break; |
5540 | 0 | } |
5541 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5542 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5543 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5544 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5545 | | // (BCCCTR 79, CR0) |
5546 | 0 | AsmString = "beqctr+"; |
5547 | 0 | break; |
5548 | 0 | } |
5549 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5550 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5551 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5552 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5553 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5554 | | // (BCCCTR 68, crrc:$cc) |
5555 | 0 | AsmString = "bnectr $\x02"; |
5556 | 0 | break; |
5557 | 0 | } |
5558 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5559 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5560 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5561 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5562 | | // (BCCCTR 68, CR0) |
5563 | 0 | AsmString = "bnectr"; |
5564 | 0 | break; |
5565 | 0 | } |
5566 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5567 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5568 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5569 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5570 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5571 | | // (BCCCTR 70, crrc:$cc) |
5572 | 0 | AsmString = "bnectr- $\x02"; |
5573 | 0 | break; |
5574 | 0 | } |
5575 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5576 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5577 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5578 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5579 | | // (BCCCTR 70, CR0) |
5580 | 0 | AsmString = "bnectr-"; |
5581 | 0 | break; |
5582 | 0 | } |
5583 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5584 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5585 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5586 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5587 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5588 | | // (BCCCTR 71, crrc:$cc) |
5589 | 0 | AsmString = "bnectr+ $\x02"; |
5590 | 0 | break; |
5591 | 0 | } |
5592 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5593 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5594 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5595 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5596 | | // (BCCCTR 71, CR0) |
5597 | 0 | AsmString = "bnectr+"; |
5598 | 0 | break; |
5599 | 0 | } |
5600 | 0 | return NULL; |
5601 | 0 | case PPC_BCCCTRL: |
5602 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5603 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5604 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5605 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5606 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5607 | | // (BCCCTRL 12, crrc:$cc) |
5608 | 0 | AsmString = "bltctrl $\x02"; |
5609 | 0 | break; |
5610 | 0 | } |
5611 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5612 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5613 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5614 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5615 | | // (BCCCTRL 12, CR0) |
5616 | 0 | AsmString = "bltctrl"; |
5617 | 0 | break; |
5618 | 0 | } |
5619 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5620 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5621 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5622 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5623 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5624 | | // (BCCCTRL 14, crrc:$cc) |
5625 | 0 | AsmString = "bltctrl- $\x02"; |
5626 | 0 | break; |
5627 | 0 | } |
5628 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5629 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5630 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5631 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5632 | | // (BCCCTRL 14, CR0) |
5633 | 0 | AsmString = "bltctrl-"; |
5634 | 0 | break; |
5635 | 0 | } |
5636 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5637 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5638 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5639 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5640 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5641 | | // (BCCCTRL 15, crrc:$cc) |
5642 | 0 | AsmString = "bltctrl+ $\x02"; |
5643 | 0 | break; |
5644 | 0 | } |
5645 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5646 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5647 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5648 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5649 | | // (BCCCTRL 15, CR0) |
5650 | 0 | AsmString = "bltctrl+"; |
5651 | 0 | break; |
5652 | 0 | } |
5653 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5654 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5655 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5656 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5657 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5658 | | // (BCCCTRL 44, crrc:$cc) |
5659 | 0 | AsmString = "bgtctrl $\x02"; |
5660 | 0 | break; |
5661 | 0 | } |
5662 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5663 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5664 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5665 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5666 | | // (BCCCTRL 44, CR0) |
5667 | 0 | AsmString = "bgtctrl"; |
5668 | 0 | break; |
5669 | 0 | } |
5670 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5671 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5672 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5673 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5674 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5675 | | // (BCCCTRL 46, crrc:$cc) |
5676 | 0 | AsmString = "bgtctrl- $\x02"; |
5677 | 0 | break; |
5678 | 0 | } |
5679 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5680 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5681 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5682 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5683 | | // (BCCCTRL 46, CR0) |
5684 | 0 | AsmString = "bgtctrl-"; |
5685 | 0 | break; |
5686 | 0 | } |
5687 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5688 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5689 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5690 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5691 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5692 | | // (BCCCTRL 47, crrc:$cc) |
5693 | 0 | AsmString = "bgtctrl+ $\x02"; |
5694 | 0 | break; |
5695 | 0 | } |
5696 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5697 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5698 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5699 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5700 | | // (BCCCTRL 47, CR0) |
5701 | 0 | AsmString = "bgtctrl+"; |
5702 | 0 | break; |
5703 | 0 | } |
5704 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5705 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5706 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5707 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5708 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5709 | | // (BCCCTRL 76, crrc:$cc) |
5710 | 0 | AsmString = "beqctrl $\x02"; |
5711 | 0 | break; |
5712 | 0 | } |
5713 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5714 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5715 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5716 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5717 | | // (BCCCTRL 76, CR0) |
5718 | 0 | AsmString = "beqctrl"; |
5719 | 0 | break; |
5720 | 0 | } |
5721 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5722 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5723 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5724 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5725 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5726 | | // (BCCCTRL 78, crrc:$cc) |
5727 | 0 | AsmString = "beqctrl- $\x02"; |
5728 | 0 | break; |
5729 | 0 | } |
5730 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5731 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5732 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5733 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5734 | | // (BCCCTRL 78, CR0) |
5735 | 0 | AsmString = "beqctrl-"; |
5736 | 0 | break; |
5737 | 0 | } |
5738 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5739 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5740 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5741 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5742 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5743 | | // (BCCCTRL 79, crrc:$cc) |
5744 | 0 | AsmString = "beqctrl+ $\x02"; |
5745 | 0 | break; |
5746 | 0 | } |
5747 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5748 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5749 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5750 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5751 | | // (BCCCTRL 79, CR0) |
5752 | 0 | AsmString = "beqctrl+"; |
5753 | 0 | break; |
5754 | 0 | } |
5755 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5756 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5757 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5758 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5759 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5760 | | // (BCCCTRL 68, crrc:$cc) |
5761 | 0 | AsmString = "bnectrl $\x02"; |
5762 | 0 | break; |
5763 | 0 | } |
5764 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5765 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5766 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5767 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5768 | | // (BCCCTRL 68, CR0) |
5769 | 0 | AsmString = "bnectrl"; |
5770 | 0 | break; |
5771 | 0 | } |
5772 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5773 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5774 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5775 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5776 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5777 | | // (BCCCTRL 70, crrc:$cc) |
5778 | 0 | AsmString = "bnectrl- $\x02"; |
5779 | 0 | break; |
5780 | 0 | } |
5781 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5782 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5783 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5784 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5785 | | // (BCCCTRL 70, CR0) |
5786 | 0 | AsmString = "bnectrl-"; |
5787 | 0 | break; |
5788 | 0 | } |
5789 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5790 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5791 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5792 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5793 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5794 | | // (BCCCTRL 71, crrc:$cc) |
5795 | 0 | AsmString = "bnectrl+ $\x02"; |
5796 | 0 | break; |
5797 | 0 | } |
5798 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
5799 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5800 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5801 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5802 | | // (BCCCTRL 71, CR0) |
5803 | 0 | AsmString = "bnectrl+"; |
5804 | 0 | break; |
5805 | 0 | } |
5806 | 0 | return NULL; |
5807 | 0 | case PPC_BCCL: |
5808 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5809 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5810 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5811 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5812 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5813 | | // (BCCL 12, crrc:$cc, condbrtarget:$dst) |
5814 | 0 | AsmString = "bltl $\x02, $\xFF\x03\x01"; |
5815 | 0 | break; |
5816 | 0 | } |
5817 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5818 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5819 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
5820 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5821 | | // (BCCL 12, CR0, condbrtarget:$dst) |
5822 | 0 | AsmString = "bltl $\xFF\x03\x01"; |
5823 | 0 | break; |
5824 | 0 | } |
5825 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5826 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5827 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5828 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5829 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5830 | | // (BCCL 14, crrc:$cc, condbrtarget:$dst) |
5831 | 0 | AsmString = "bltl- $\x02, $\xFF\x03\x01"; |
5832 | 0 | break; |
5833 | 0 | } |
5834 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5835 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5836 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
5837 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5838 | | // (BCCL 14, CR0, condbrtarget:$dst) |
5839 | 0 | AsmString = "bltl- $\xFF\x03\x01"; |
5840 | 0 | break; |
5841 | 0 | } |
5842 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5843 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5844 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5845 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5846 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5847 | | // (BCCL 15, crrc:$cc, condbrtarget:$dst) |
5848 | 0 | AsmString = "bltl+ $\x02, $\xFF\x03\x01"; |
5849 | 0 | break; |
5850 | 0 | } |
5851 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5852 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5853 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
5854 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5855 | | // (BCCL 15, CR0, condbrtarget:$dst) |
5856 | 0 | AsmString = "bltl+ $\xFF\x03\x01"; |
5857 | 0 | break; |
5858 | 0 | } |
5859 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5860 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5861 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5862 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5863 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5864 | | // (BCCL 44, crrc:$cc, condbrtarget:$dst) |
5865 | 0 | AsmString = "bgtl $\x02, $\xFF\x03\x01"; |
5866 | 0 | break; |
5867 | 0 | } |
5868 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5869 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5870 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
5871 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5872 | | // (BCCL 44, CR0, condbrtarget:$dst) |
5873 | 0 | AsmString = "bgtl $\xFF\x03\x01"; |
5874 | 0 | break; |
5875 | 0 | } |
5876 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5877 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5878 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5879 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5880 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5881 | | // (BCCL 46, crrc:$cc, condbrtarget:$dst) |
5882 | 0 | AsmString = "bgtl- $\x02, $\xFF\x03\x01"; |
5883 | 0 | break; |
5884 | 0 | } |
5885 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5886 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5887 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
5888 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5889 | | // (BCCL 46, CR0, condbrtarget:$dst) |
5890 | 0 | AsmString = "bgtl- $\xFF\x03\x01"; |
5891 | 0 | break; |
5892 | 0 | } |
5893 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5894 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5895 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5896 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5897 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5898 | | // (BCCL 47, crrc:$cc, condbrtarget:$dst) |
5899 | 0 | AsmString = "bgtl+ $\x02, $\xFF\x03\x01"; |
5900 | 0 | break; |
5901 | 0 | } |
5902 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5903 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5904 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
5905 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5906 | | // (BCCL 47, CR0, condbrtarget:$dst) |
5907 | 0 | AsmString = "bgtl+ $\xFF\x03\x01"; |
5908 | 0 | break; |
5909 | 0 | } |
5910 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5911 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5912 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5913 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5914 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5915 | | // (BCCL 76, crrc:$cc, condbrtarget:$dst) |
5916 | 0 | AsmString = "beql $\x02, $\xFF\x03\x01"; |
5917 | 0 | break; |
5918 | 0 | } |
5919 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5920 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5921 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
5922 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5923 | | // (BCCL 76, CR0, condbrtarget:$dst) |
5924 | 0 | AsmString = "beql $\xFF\x03\x01"; |
5925 | 0 | break; |
5926 | 0 | } |
5927 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5928 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5929 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5930 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5931 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5932 | | // (BCCL 78, crrc:$cc, condbrtarget:$dst) |
5933 | 0 | AsmString = "beql- $\x02, $\xFF\x03\x01"; |
5934 | 0 | break; |
5935 | 0 | } |
5936 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5937 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5938 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
5939 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5940 | | // (BCCL 78, CR0, condbrtarget:$dst) |
5941 | 0 | AsmString = "beql- $\xFF\x03\x01"; |
5942 | 0 | break; |
5943 | 0 | } |
5944 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5945 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5946 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5947 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5948 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5949 | | // (BCCL 79, crrc:$cc, condbrtarget:$dst) |
5950 | 0 | AsmString = "beql+ $\x02, $\xFF\x03\x01"; |
5951 | 0 | break; |
5952 | 0 | } |
5953 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5954 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5955 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
5956 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5957 | | // (BCCL 79, CR0, condbrtarget:$dst) |
5958 | 0 | AsmString = "beql+ $\xFF\x03\x01"; |
5959 | 0 | break; |
5960 | 0 | } |
5961 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5962 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5963 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5964 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5965 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5966 | | // (BCCL 68, crrc:$cc, condbrtarget:$dst) |
5967 | 0 | AsmString = "bnel $\x02, $\xFF\x03\x01"; |
5968 | 0 | break; |
5969 | 0 | } |
5970 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5971 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5972 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
5973 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5974 | | // (BCCL 68, CR0, condbrtarget:$dst) |
5975 | 0 | AsmString = "bnel $\xFF\x03\x01"; |
5976 | 0 | break; |
5977 | 0 | } |
5978 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5979 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5980 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5981 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5982 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
5983 | | // (BCCL 70, crrc:$cc, condbrtarget:$dst) |
5984 | 0 | AsmString = "bnel- $\x02, $\xFF\x03\x01"; |
5985 | 0 | break; |
5986 | 0 | } |
5987 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5988 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5989 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
5990 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
5991 | | // (BCCL 70, CR0, condbrtarget:$dst) |
5992 | 0 | AsmString = "bnel- $\xFF\x03\x01"; |
5993 | 0 | break; |
5994 | 0 | } |
5995 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
5996 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
5997 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
5998 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
5999 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6000 | | // (BCCL 71, crrc:$cc, condbrtarget:$dst) |
6001 | 0 | AsmString = "bnel+ $\x02, $\xFF\x03\x01"; |
6002 | 0 | break; |
6003 | 0 | } |
6004 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6005 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6006 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
6007 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6008 | | // (BCCL 71, CR0, condbrtarget:$dst) |
6009 | 0 | AsmString = "bnel+ $\xFF\x03\x01"; |
6010 | 0 | break; |
6011 | 0 | } |
6012 | 0 | return NULL; |
6013 | 0 | case PPC_BCCLA: |
6014 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6015 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6016 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
6017 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6018 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6019 | | // (BCCLA 12, crrc:$cc, abscondbrtarget:$dst) |
6020 | 0 | AsmString = "bltla $\x02, $\xFF\x03\x02"; |
6021 | 0 | break; |
6022 | 0 | } |
6023 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6024 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6025 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
6026 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6027 | | // (BCCLA 12, CR0, abscondbrtarget:$dst) |
6028 | 0 | AsmString = "bltla $\xFF\x03\x02"; |
6029 | 0 | break; |
6030 | 0 | } |
6031 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6032 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6033 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
6034 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6035 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6036 | | // (BCCLA 14, crrc:$cc, abscondbrtarget:$dst) |
6037 | 0 | AsmString = "bltla- $\x02, $\xFF\x03\x02"; |
6038 | 0 | break; |
6039 | 0 | } |
6040 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6041 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6042 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
6043 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6044 | | // (BCCLA 14, CR0, abscondbrtarget:$dst) |
6045 | 0 | AsmString = "bltla- $\xFF\x03\x02"; |
6046 | 0 | break; |
6047 | 0 | } |
6048 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6049 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6050 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
6051 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6052 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6053 | | // (BCCLA 15, crrc:$cc, abscondbrtarget:$dst) |
6054 | 0 | AsmString = "bltla+ $\x02, $\xFF\x03\x02"; |
6055 | 0 | break; |
6056 | 0 | } |
6057 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6058 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6059 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
6060 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6061 | | // (BCCLA 15, CR0, abscondbrtarget:$dst) |
6062 | 0 | AsmString = "bltla+ $\xFF\x03\x02"; |
6063 | 0 | break; |
6064 | 0 | } |
6065 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6066 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6067 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
6068 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6069 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6070 | | // (BCCLA 44, crrc:$cc, abscondbrtarget:$dst) |
6071 | 0 | AsmString = "bgtla $\x02, $\xFF\x03\x02"; |
6072 | 0 | break; |
6073 | 0 | } |
6074 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6075 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6076 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
6077 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6078 | | // (BCCLA 44, CR0, abscondbrtarget:$dst) |
6079 | 0 | AsmString = "bgtla $\xFF\x03\x02"; |
6080 | 0 | break; |
6081 | 0 | } |
6082 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6083 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6084 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
6085 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6086 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6087 | | // (BCCLA 46, crrc:$cc, abscondbrtarget:$dst) |
6088 | 0 | AsmString = "bgtla- $\x02, $\xFF\x03\x02"; |
6089 | 0 | break; |
6090 | 0 | } |
6091 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6092 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6093 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
6094 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6095 | | // (BCCLA 46, CR0, abscondbrtarget:$dst) |
6096 | 0 | AsmString = "bgtla- $\xFF\x03\x02"; |
6097 | 0 | break; |
6098 | 0 | } |
6099 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6100 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6101 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
6102 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6103 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6104 | | // (BCCLA 47, crrc:$cc, abscondbrtarget:$dst) |
6105 | 0 | AsmString = "bgtla+ $\x02, $\xFF\x03\x02"; |
6106 | 0 | break; |
6107 | 0 | } |
6108 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6109 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6110 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
6111 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6112 | | // (BCCLA 47, CR0, abscondbrtarget:$dst) |
6113 | 0 | AsmString = "bgtla+ $\xFF\x03\x02"; |
6114 | 0 | break; |
6115 | 0 | } |
6116 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6117 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6118 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
6119 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6120 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6121 | | // (BCCLA 76, crrc:$cc, abscondbrtarget:$dst) |
6122 | 0 | AsmString = "beqla $\x02, $\xFF\x03\x02"; |
6123 | 0 | break; |
6124 | 0 | } |
6125 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6126 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6127 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
6128 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6129 | | // (BCCLA 76, CR0, abscondbrtarget:$dst) |
6130 | 0 | AsmString = "beqla $\xFF\x03\x02"; |
6131 | 0 | break; |
6132 | 0 | } |
6133 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6134 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6135 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
6136 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6137 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6138 | | // (BCCLA 78, crrc:$cc, abscondbrtarget:$dst) |
6139 | 0 | AsmString = "beqla- $\x02, $\xFF\x03\x02"; |
6140 | 0 | break; |
6141 | 0 | } |
6142 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6143 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6144 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
6145 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6146 | | // (BCCLA 78, CR0, abscondbrtarget:$dst) |
6147 | 0 | AsmString = "beqla- $\xFF\x03\x02"; |
6148 | 0 | break; |
6149 | 0 | } |
6150 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6151 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6152 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
6153 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6154 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6155 | | // (BCCLA 79, crrc:$cc, abscondbrtarget:$dst) |
6156 | 0 | AsmString = "beqla+ $\x02, $\xFF\x03\x02"; |
6157 | 0 | break; |
6158 | 0 | } |
6159 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6160 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6161 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
6162 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6163 | | // (BCCLA 79, CR0, abscondbrtarget:$dst) |
6164 | 0 | AsmString = "beqla+ $\xFF\x03\x02"; |
6165 | 0 | break; |
6166 | 0 | } |
6167 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6168 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6169 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
6170 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6171 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6172 | | // (BCCLA 68, crrc:$cc, abscondbrtarget:$dst) |
6173 | 0 | AsmString = "bnela $\x02, $\xFF\x03\x02"; |
6174 | 0 | break; |
6175 | 0 | } |
6176 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6177 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6178 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
6179 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6180 | | // (BCCLA 68, CR0, abscondbrtarget:$dst) |
6181 | 0 | AsmString = "bnela $\xFF\x03\x02"; |
6182 | 0 | break; |
6183 | 0 | } |
6184 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6185 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6186 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
6187 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6188 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6189 | | // (BCCLA 70, crrc:$cc, abscondbrtarget:$dst) |
6190 | 0 | AsmString = "bnela- $\x02, $\xFF\x03\x02"; |
6191 | 0 | break; |
6192 | 0 | } |
6193 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6194 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6195 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
6196 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6197 | | // (BCCLA 70, CR0, abscondbrtarget:$dst) |
6198 | 0 | AsmString = "bnela- $\xFF\x03\x02"; |
6199 | 0 | break; |
6200 | 0 | } |
6201 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6202 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6203 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
6204 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6205 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6206 | | // (BCCLA 71, crrc:$cc, abscondbrtarget:$dst) |
6207 | 0 | AsmString = "bnela+ $\x02, $\xFF\x03\x02"; |
6208 | 0 | break; |
6209 | 0 | } |
6210 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6211 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6212 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
6213 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6214 | | // (BCCLA 71, CR0, abscondbrtarget:$dst) |
6215 | 0 | AsmString = "bnela+ $\xFF\x03\x02"; |
6216 | 0 | break; |
6217 | 0 | } |
6218 | 0 | return NULL; |
6219 | 0 | case PPC_BCCLR: |
6220 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6221 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6222 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
6223 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6224 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6225 | | // (BCCLR 12, crrc:$cc) |
6226 | 0 | AsmString = "bltlr $\x02"; |
6227 | 0 | break; |
6228 | 0 | } |
6229 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6230 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6231 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
6232 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6233 | | // (BCCLR 12, CR0) |
6234 | 0 | AsmString = "bltlr"; |
6235 | 0 | break; |
6236 | 0 | } |
6237 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6238 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6239 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
6240 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6241 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6242 | | // (BCCLR 14, crrc:$cc) |
6243 | 0 | AsmString = "bltlr- $\x02"; |
6244 | 0 | break; |
6245 | 0 | } |
6246 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6247 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6248 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
6249 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6250 | | // (BCCLR 14, CR0) |
6251 | 0 | AsmString = "bltlr-"; |
6252 | 0 | break; |
6253 | 0 | } |
6254 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6255 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6256 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
6257 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6258 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6259 | | // (BCCLR 15, crrc:$cc) |
6260 | 0 | AsmString = "bltlr+ $\x02"; |
6261 | 0 | break; |
6262 | 0 | } |
6263 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6264 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6265 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
6266 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6267 | | // (BCCLR 15, CR0) |
6268 | 0 | AsmString = "bltlr+"; |
6269 | 0 | break; |
6270 | 0 | } |
6271 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6272 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6273 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
6274 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6275 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6276 | | // (BCCLR 44, crrc:$cc) |
6277 | 0 | AsmString = "bgtlr $\x02"; |
6278 | 0 | break; |
6279 | 0 | } |
6280 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6281 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6282 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
6283 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6284 | | // (BCCLR 44, CR0) |
6285 | 0 | AsmString = "bgtlr"; |
6286 | 0 | break; |
6287 | 0 | } |
6288 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6289 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6290 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
6291 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6292 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6293 | | // (BCCLR 46, crrc:$cc) |
6294 | 0 | AsmString = "bgtlr- $\x02"; |
6295 | 0 | break; |
6296 | 0 | } |
6297 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6298 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6299 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
6300 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6301 | | // (BCCLR 46, CR0) |
6302 | 0 | AsmString = "bgtlr-"; |
6303 | 0 | break; |
6304 | 0 | } |
6305 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6306 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6307 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
6308 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6309 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6310 | | // (BCCLR 47, crrc:$cc) |
6311 | 0 | AsmString = "bgtlr+ $\x02"; |
6312 | 0 | break; |
6313 | 0 | } |
6314 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6315 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6316 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
6317 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6318 | | // (BCCLR 47, CR0) |
6319 | 0 | AsmString = "bgtlr+"; |
6320 | 0 | break; |
6321 | 0 | } |
6322 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6323 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6324 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
6325 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6326 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6327 | | // (BCCLR 76, crrc:$cc) |
6328 | 0 | AsmString = "beqlr $\x02"; |
6329 | 0 | break; |
6330 | 0 | } |
6331 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6332 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6333 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
6334 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6335 | | // (BCCLR 76, CR0) |
6336 | 0 | AsmString = "beqlr"; |
6337 | 0 | break; |
6338 | 0 | } |
6339 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6340 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6341 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
6342 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6343 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6344 | | // (BCCLR 78, crrc:$cc) |
6345 | 0 | AsmString = "beqlr- $\x02"; |
6346 | 0 | break; |
6347 | 0 | } |
6348 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6349 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6350 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
6351 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6352 | | // (BCCLR 78, CR0) |
6353 | 0 | AsmString = "beqlr-"; |
6354 | 0 | break; |
6355 | 0 | } |
6356 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6357 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6358 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
6359 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6360 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6361 | | // (BCCLR 79, crrc:$cc) |
6362 | 0 | AsmString = "beqlr+ $\x02"; |
6363 | 0 | break; |
6364 | 0 | } |
6365 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6366 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6367 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
6368 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6369 | | // (BCCLR 79, CR0) |
6370 | 0 | AsmString = "beqlr+"; |
6371 | 0 | break; |
6372 | 0 | } |
6373 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6374 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6375 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
6376 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6377 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6378 | | // (BCCLR 68, crrc:$cc) |
6379 | 0 | AsmString = "bnelr $\x02"; |
6380 | 0 | break; |
6381 | 0 | } |
6382 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6383 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6384 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
6385 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6386 | | // (BCCLR 68, CR0) |
6387 | 0 | AsmString = "bnelr"; |
6388 | 0 | break; |
6389 | 0 | } |
6390 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6391 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6392 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
6393 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6394 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6395 | | // (BCCLR 70, crrc:$cc) |
6396 | 0 | AsmString = "bnelr- $\x02"; |
6397 | 0 | break; |
6398 | 0 | } |
6399 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6400 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6401 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
6402 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6403 | | // (BCCLR 70, CR0) |
6404 | 0 | AsmString = "bnelr-"; |
6405 | 0 | break; |
6406 | 0 | } |
6407 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6408 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6409 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
6410 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6411 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6412 | | // (BCCLR 71, crrc:$cc) |
6413 | 0 | AsmString = "bnelr+ $\x02"; |
6414 | 0 | break; |
6415 | 0 | } |
6416 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6417 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6418 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
6419 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6420 | | // (BCCLR 71, CR0) |
6421 | 0 | AsmString = "bnelr+"; |
6422 | 0 | break; |
6423 | 0 | } |
6424 | 0 | return NULL; |
6425 | 0 | case PPC_BCCLRL: |
6426 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6427 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6428 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
6429 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6430 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6431 | | // (BCCLRL 12, crrc:$cc) |
6432 | 0 | AsmString = "bltlrl $\x02"; |
6433 | 0 | break; |
6434 | 0 | } |
6435 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6436 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6437 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 12 && |
6438 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6439 | | // (BCCLRL 12, CR0) |
6440 | 0 | AsmString = "bltlrl"; |
6441 | 0 | break; |
6442 | 0 | } |
6443 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6444 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6445 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
6446 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6447 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6448 | | // (BCCLRL 14, crrc:$cc) |
6449 | 0 | AsmString = "bltlrl- $\x02"; |
6450 | 0 | break; |
6451 | 0 | } |
6452 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6453 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6454 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 14 && |
6455 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6456 | | // (BCCLRL 14, CR0) |
6457 | 0 | AsmString = "bltlrl-"; |
6458 | 0 | break; |
6459 | 0 | } |
6460 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6461 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6462 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
6463 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6464 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6465 | | // (BCCLRL 15, crrc:$cc) |
6466 | 0 | AsmString = "bltlrl+ $\x02"; |
6467 | 0 | break; |
6468 | 0 | } |
6469 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6470 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6471 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15 && |
6472 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6473 | | // (BCCLRL 15, CR0) |
6474 | 0 | AsmString = "bltlrl+"; |
6475 | 0 | break; |
6476 | 0 | } |
6477 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6478 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6479 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
6480 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6481 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6482 | | // (BCCLRL 44, crrc:$cc) |
6483 | 0 | AsmString = "bgtlrl $\x02"; |
6484 | 0 | break; |
6485 | 0 | } |
6486 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6487 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6488 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 44 && |
6489 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6490 | | // (BCCLRL 44, CR0) |
6491 | 0 | AsmString = "bgtlrl"; |
6492 | 0 | break; |
6493 | 0 | } |
6494 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6495 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6496 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
6497 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6498 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6499 | | // (BCCLRL 46, crrc:$cc) |
6500 | 0 | AsmString = "bgtlrl- $\x02"; |
6501 | 0 | break; |
6502 | 0 | } |
6503 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6504 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6505 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 46 && |
6506 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6507 | | // (BCCLRL 46, CR0) |
6508 | 0 | AsmString = "bgtlrl-"; |
6509 | 0 | break; |
6510 | 0 | } |
6511 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6512 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6513 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
6514 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6515 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6516 | | // (BCCLRL 47, crrc:$cc) |
6517 | 0 | AsmString = "bgtlrl+ $\x02"; |
6518 | 0 | break; |
6519 | 0 | } |
6520 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6521 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6522 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 47 && |
6523 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6524 | | // (BCCLRL 47, CR0) |
6525 | 0 | AsmString = "bgtlrl+"; |
6526 | 0 | break; |
6527 | 0 | } |
6528 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6529 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6530 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
6531 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6532 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6533 | | // (BCCLRL 76, crrc:$cc) |
6534 | 0 | AsmString = "beqlrl $\x02"; |
6535 | 0 | break; |
6536 | 0 | } |
6537 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6538 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6539 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 76 && |
6540 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6541 | | // (BCCLRL 76, CR0) |
6542 | 0 | AsmString = "beqlrl"; |
6543 | 0 | break; |
6544 | 0 | } |
6545 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6546 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6547 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
6548 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6549 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6550 | | // (BCCLRL 78, crrc:$cc) |
6551 | 0 | AsmString = "beqlrl- $\x02"; |
6552 | 0 | break; |
6553 | 0 | } |
6554 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6555 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6556 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 78 && |
6557 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6558 | | // (BCCLRL 78, CR0) |
6559 | 0 | AsmString = "beqlrl-"; |
6560 | 0 | break; |
6561 | 0 | } |
6562 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6563 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6564 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
6565 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6566 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6567 | | // (BCCLRL 79, crrc:$cc) |
6568 | 0 | AsmString = "beqlrl+ $\x02"; |
6569 | 0 | break; |
6570 | 0 | } |
6571 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6572 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6573 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 79 && |
6574 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6575 | | // (BCCLRL 79, CR0) |
6576 | 0 | AsmString = "beqlrl+"; |
6577 | 0 | break; |
6578 | 0 | } |
6579 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6580 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6581 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
6582 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6583 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6584 | | // (BCCLRL 68, crrc:$cc) |
6585 | 0 | AsmString = "bnelrl $\x02"; |
6586 | 0 | break; |
6587 | 0 | } |
6588 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6589 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6590 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 68 && |
6591 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6592 | | // (BCCLRL 68, CR0) |
6593 | 0 | AsmString = "bnelrl"; |
6594 | 0 | break; |
6595 | 0 | } |
6596 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6597 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6598 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
6599 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6600 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6601 | | // (BCCLRL 70, crrc:$cc) |
6602 | 0 | AsmString = "bnelrl- $\x02"; |
6603 | 0 | break; |
6604 | 0 | } |
6605 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6606 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6607 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 70 && |
6608 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6609 | | // (BCCLRL 70, CR0) |
6610 | 0 | AsmString = "bnelrl-"; |
6611 | 0 | break; |
6612 | 0 | } |
6613 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6614 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6615 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
6616 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6617 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 1)) { |
6618 | | // (BCCLRL 71, crrc:$cc) |
6619 | 0 | AsmString = "bnelrl+ $\x02"; |
6620 | 0 | break; |
6621 | 0 | } |
6622 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6623 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6624 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 71 && |
6625 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_CR0) { |
6626 | | // (BCCLRL 71, CR0) |
6627 | 0 | AsmString = "bnelrl+"; |
6628 | 0 | break; |
6629 | 0 | } |
6630 | 0 | return NULL; |
6631 | 0 | case PPC_CMPD: |
6632 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6633 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6634 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6635 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
6636 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6637 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
6638 | | // (CMPD CR0, g8rc:$rA, g8rc:$rB) |
6639 | 0 | AsmString = "cmpd $\x02, $\x03"; |
6640 | 0 | break; |
6641 | 0 | } |
6642 | 0 | return NULL; |
6643 | 0 | case PPC_CMPDI: |
6644 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6645 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6646 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6647 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
6648 | | // (CMPDI CR0, g8rc:$rA, s16imm64:$imm) |
6649 | 0 | AsmString = "cmpdi $\x02, $\xFF\x03\x03"; |
6650 | 0 | break; |
6651 | 0 | } |
6652 | 0 | return NULL; |
6653 | 0 | case PPC_CMPLD: |
6654 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6655 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6656 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6657 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
6658 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6659 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
6660 | | // (CMPLD CR0, g8rc:$rA, g8rc:$rB) |
6661 | 0 | AsmString = "cmpld $\x02, $\x03"; |
6662 | 0 | break; |
6663 | 0 | } |
6664 | 0 | return NULL; |
6665 | 0 | case PPC_CMPLDI: |
6666 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6667 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6668 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6669 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
6670 | | // (CMPLDI CR0, g8rc:$rA, u16imm64:$imm) |
6671 | 0 | AsmString = "cmpldi $\x02, $\xFF\x03\x04"; |
6672 | 0 | break; |
6673 | 0 | } |
6674 | 0 | return NULL; |
6675 | 0 | case PPC_CMPLW: |
6676 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6677 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6678 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6679 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
6680 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6681 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
6682 | | // (CMPLW CR0, gprc:$rA, gprc:$rB) |
6683 | 0 | AsmString = "cmplw $\x02, $\x03"; |
6684 | 0 | break; |
6685 | 0 | } |
6686 | 0 | return NULL; |
6687 | 0 | case PPC_CMPLWI: |
6688 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6689 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6690 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6691 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
6692 | | // (CMPLWI CR0, gprc:$rA, u16imm:$imm) |
6693 | 0 | AsmString = "cmplwi $\x02, $\xFF\x03\x04"; |
6694 | 0 | break; |
6695 | 0 | } |
6696 | 0 | return NULL; |
6697 | 0 | case PPC_CMPW: |
6698 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6699 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6700 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6701 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
6702 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6703 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
6704 | | // (CMPW CR0, gprc:$rA, gprc:$rB) |
6705 | 0 | AsmString = "cmpw $\x02, $\x03"; |
6706 | 0 | break; |
6707 | 0 | } |
6708 | 0 | return NULL; |
6709 | 0 | case PPC_CMPWI: |
6710 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6711 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_CR0 && |
6712 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6713 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
6714 | | // (CMPWI CR0, gprc:$rA, s16imm:$imm) |
6715 | 0 | AsmString = "cmpwi $\x02, $\xFF\x03\x03"; |
6716 | 0 | break; |
6717 | 0 | } |
6718 | 0 | return NULL; |
6719 | 0 | case PPC_CNTLZW: |
6720 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6721 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6722 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6723 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6724 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
6725 | | // (CNTLZW gprc:$rA, gprc:$rS) |
6726 | 0 | AsmString = "cntlz $\x01, $\x02"; |
6727 | 0 | break; |
6728 | 0 | } |
6729 | 0 | return NULL; |
6730 | 0 | case PPC_CNTLZWo: |
6731 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6732 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6733 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6734 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6735 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
6736 | | // (CNTLZWo gprc:$rA, gprc:$rS) |
6737 | 0 | AsmString = "cntlz. $\x01, $\x02"; |
6738 | 0 | break; |
6739 | 0 | } |
6740 | 0 | return NULL; |
6741 | 0 | case PPC_CREQV: |
6742 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6743 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6744 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && |
6745 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6746 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && |
6747 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6748 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { |
6749 | | // (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) |
6750 | 0 | AsmString = "crset $\x01"; |
6751 | 0 | break; |
6752 | 0 | } |
6753 | 0 | return NULL; |
6754 | 0 | case PPC_CRNOR: |
6755 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6756 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6757 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && |
6758 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6759 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
6760 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6761 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
6762 | | // (CRNOR crbitrc:$bx, crbitrc:$by, crbitrc:$by) |
6763 | 0 | AsmString = "crnot $\x01, $\x02"; |
6764 | 0 | break; |
6765 | 0 | } |
6766 | 0 | return NULL; |
6767 | 0 | case PPC_CROR: |
6768 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6769 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6770 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && |
6771 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6772 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
6773 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6774 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
6775 | | // (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by) |
6776 | 0 | AsmString = "crmove $\x01, $\x02"; |
6777 | 0 | break; |
6778 | 0 | } |
6779 | 0 | return NULL; |
6780 | 0 | case PPC_CRXOR: |
6781 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
6782 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6783 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 0) && |
6784 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
6785 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && |
6786 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
6787 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0))) { |
6788 | | // (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) |
6789 | 0 | AsmString = "crclr $\x01"; |
6790 | 0 | break; |
6791 | 0 | } |
6792 | 0 | return NULL; |
6793 | 0 | case PPC_MBAR: |
6794 | 0 | if (MCInst_getNumOperands(MI) == 1 && |
6795 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
6796 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { |
6797 | | // (MBAR 0) |
6798 | 0 | AsmString = "mbar"; |
6799 | 0 | break; |
6800 | 0 | } |
6801 | 0 | return NULL; |
6802 | 0 | case PPC_MFDCR: |
6803 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6804 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6805 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6806 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6807 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 128) { |
6808 | | // (MFDCR gprc:$Rx, 128) |
6809 | 0 | AsmString = "mfbr0 $\x01"; |
6810 | 0 | break; |
6811 | 0 | } |
6812 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6813 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6814 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6815 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6816 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 129) { |
6817 | | // (MFDCR gprc:$Rx, 129) |
6818 | 0 | AsmString = "mfbr1 $\x01"; |
6819 | 0 | break; |
6820 | 0 | } |
6821 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6822 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6823 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6824 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6825 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 130) { |
6826 | | // (MFDCR gprc:$Rx, 130) |
6827 | 0 | AsmString = "mfbr2 $\x01"; |
6828 | 0 | break; |
6829 | 0 | } |
6830 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6831 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6832 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6833 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6834 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 131) { |
6835 | | // (MFDCR gprc:$Rx, 131) |
6836 | 0 | AsmString = "mfbr3 $\x01"; |
6837 | 0 | break; |
6838 | 0 | } |
6839 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6840 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6841 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6842 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6843 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 132) { |
6844 | | // (MFDCR gprc:$Rx, 132) |
6845 | 0 | AsmString = "mfbr4 $\x01"; |
6846 | 0 | break; |
6847 | 0 | } |
6848 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6849 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6850 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6851 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6852 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 133) { |
6853 | | // (MFDCR gprc:$Rx, 133) |
6854 | 0 | AsmString = "mfbr5 $\x01"; |
6855 | 0 | break; |
6856 | 0 | } |
6857 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6858 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6859 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6860 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6861 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 134) { |
6862 | | // (MFDCR gprc:$Rx, 134) |
6863 | 0 | AsmString = "mfbr6 $\x01"; |
6864 | 0 | break; |
6865 | 0 | } |
6866 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6867 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6868 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6869 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6870 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 135) { |
6871 | | // (MFDCR gprc:$Rx, 135) |
6872 | 0 | AsmString = "mfbr7 $\x01"; |
6873 | 0 | break; |
6874 | 0 | } |
6875 | 0 | return NULL; |
6876 | 0 | case PPC_MFSPR: |
6877 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6878 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6879 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6880 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6881 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1) { |
6882 | | // (MFSPR gprc:$Rx, 1) |
6883 | 0 | AsmString = "mfxer $\x01"; |
6884 | 0 | break; |
6885 | 0 | } |
6886 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6887 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6888 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6889 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6890 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 4) { |
6891 | | // (MFSPR gprc:$Rx, 4) |
6892 | 0 | AsmString = "mfrtcu $\x01"; |
6893 | 0 | break; |
6894 | 0 | } |
6895 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6896 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6897 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6898 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6899 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 5) { |
6900 | | // (MFSPR gprc:$Rx, 5) |
6901 | 0 | AsmString = "mfrtcl $\x01"; |
6902 | 0 | break; |
6903 | 0 | } |
6904 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6905 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6906 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6907 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6908 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 17) { |
6909 | | // (MFSPR gprc:$Rx, 17) |
6910 | 0 | AsmString = "mfdscr $\x01"; |
6911 | 0 | break; |
6912 | 0 | } |
6913 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6914 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6915 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6916 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6917 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 18) { |
6918 | | // (MFSPR gprc:$Rx, 18) |
6919 | 0 | AsmString = "mfdsisr $\x01"; |
6920 | 0 | break; |
6921 | 0 | } |
6922 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6923 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6924 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6925 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6926 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 19) { |
6927 | | // (MFSPR gprc:$Rx, 19) |
6928 | 0 | AsmString = "mfdar $\x01"; |
6929 | 0 | break; |
6930 | 0 | } |
6931 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6932 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6933 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6934 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6935 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 990) { |
6936 | | // (MFSPR gprc:$Rx, 990) |
6937 | 0 | AsmString = "mfsrr2 $\x01"; |
6938 | 0 | break; |
6939 | 0 | } |
6940 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6941 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6942 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6943 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6944 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 991) { |
6945 | | // (MFSPR gprc:$Rx, 991) |
6946 | 0 | AsmString = "mfsrr3 $\x01"; |
6947 | 0 | break; |
6948 | 0 | } |
6949 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6950 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6951 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6952 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6953 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 28) { |
6954 | | // (MFSPR gprc:$Rx, 28) |
6955 | 0 | AsmString = "mfcfar $\x01"; |
6956 | 0 | break; |
6957 | 0 | } |
6958 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6959 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6960 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6961 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6962 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 29) { |
6963 | | // (MFSPR gprc:$Rx, 29) |
6964 | 0 | AsmString = "mfamr $\x01"; |
6965 | 0 | break; |
6966 | 0 | } |
6967 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6968 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6969 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6970 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6971 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 48) { |
6972 | | // (MFSPR gprc:$Rx, 48) |
6973 | 0 | AsmString = "mfpid $\x01"; |
6974 | 0 | break; |
6975 | 0 | } |
6976 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6977 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6978 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6979 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6980 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 989) { |
6981 | | // (MFSPR gprc:$Rx, 989) |
6982 | 0 | AsmString = "mftblo $\x01"; |
6983 | 0 | break; |
6984 | 0 | } |
6985 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6986 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6987 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6988 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6989 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 988) { |
6990 | | // (MFSPR gprc:$Rx, 988) |
6991 | 0 | AsmString = "mftbhi $\x01"; |
6992 | 0 | break; |
6993 | 0 | } |
6994 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
6995 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
6996 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
6997 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
6998 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 536) { |
6999 | | // (MFSPR gprc:$Rx, 536) |
7000 | 0 | AsmString = "mfdbatu $\x01, 0"; |
7001 | 0 | break; |
7002 | 0 | } |
7003 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7004 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7005 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7006 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7007 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 538) { |
7008 | | // (MFSPR gprc:$Rx, 538) |
7009 | 0 | AsmString = "mfdbatu $\x01, 1"; |
7010 | 0 | break; |
7011 | 0 | } |
7012 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7013 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7014 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7015 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7016 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 540) { |
7017 | | // (MFSPR gprc:$Rx, 540) |
7018 | 0 | AsmString = "mfdbatu $\x01, 2"; |
7019 | 0 | break; |
7020 | 0 | } |
7021 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7022 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7023 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7024 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7025 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 542) { |
7026 | | // (MFSPR gprc:$Rx, 542) |
7027 | 0 | AsmString = "mfdbatu $\x01, 3"; |
7028 | 0 | break; |
7029 | 0 | } |
7030 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7031 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7032 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7033 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7034 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 537) { |
7035 | | // (MFSPR gprc:$Rx, 537) |
7036 | 0 | AsmString = "mfdbatl $\x01, 0"; |
7037 | 0 | break; |
7038 | 0 | } |
7039 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7040 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7041 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7042 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7043 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 539) { |
7044 | | // (MFSPR gprc:$Rx, 539) |
7045 | 0 | AsmString = "mfdbatl $\x01, 1"; |
7046 | 0 | break; |
7047 | 0 | } |
7048 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7049 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7050 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7051 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7052 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 541) { |
7053 | | // (MFSPR gprc:$Rx, 541) |
7054 | 0 | AsmString = "mfdbatl $\x01, 2"; |
7055 | 0 | break; |
7056 | 0 | } |
7057 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7058 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7059 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7060 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7061 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 543) { |
7062 | | // (MFSPR gprc:$Rx, 543) |
7063 | 0 | AsmString = "mfdbatl $\x01, 3"; |
7064 | 0 | break; |
7065 | 0 | } |
7066 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7067 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7068 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7069 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7070 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 528) { |
7071 | | // (MFSPR gprc:$Rx, 528) |
7072 | 0 | AsmString = "mfibatu $\x01, 0"; |
7073 | 0 | break; |
7074 | 0 | } |
7075 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7076 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7077 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7078 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7079 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 530) { |
7080 | | // (MFSPR gprc:$Rx, 530) |
7081 | 0 | AsmString = "mfibatu $\x01, 1"; |
7082 | 0 | break; |
7083 | 0 | } |
7084 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7085 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7086 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7087 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7088 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 532) { |
7089 | | // (MFSPR gprc:$Rx, 532) |
7090 | 0 | AsmString = "mfibatu $\x01, 2"; |
7091 | 0 | break; |
7092 | 0 | } |
7093 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7094 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7095 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7096 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7097 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 534) { |
7098 | | // (MFSPR gprc:$Rx, 534) |
7099 | 0 | AsmString = "mfibatu $\x01, 3"; |
7100 | 0 | break; |
7101 | 0 | } |
7102 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7103 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7104 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7105 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7106 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 529) { |
7107 | | // (MFSPR gprc:$Rx, 529) |
7108 | 0 | AsmString = "mfibatl $\x01, 0"; |
7109 | 0 | break; |
7110 | 0 | } |
7111 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7112 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7113 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7114 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7115 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 531) { |
7116 | | // (MFSPR gprc:$Rx, 531) |
7117 | 0 | AsmString = "mfibatl $\x01, 1"; |
7118 | 0 | break; |
7119 | 0 | } |
7120 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7121 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7122 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7123 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7124 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 533) { |
7125 | | // (MFSPR gprc:$Rx, 533) |
7126 | 0 | AsmString = "mfibatl $\x01, 2"; |
7127 | 0 | break; |
7128 | 0 | } |
7129 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7130 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7131 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7132 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7133 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 535) { |
7134 | | // (MFSPR gprc:$Rx, 535) |
7135 | 0 | AsmString = "mfibatl $\x01, 3"; |
7136 | 0 | break; |
7137 | 0 | } |
7138 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7139 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7140 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7141 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7142 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1018) { |
7143 | | // (MFSPR gprc:$Rx, 1018) |
7144 | 0 | AsmString = "mfdccr $\x01"; |
7145 | 0 | break; |
7146 | 0 | } |
7147 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7148 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7149 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7150 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7151 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 1019) { |
7152 | | // (MFSPR gprc:$Rx, 1019) |
7153 | 0 | AsmString = "mficcr $\x01"; |
7154 | 0 | break; |
7155 | 0 | } |
7156 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7157 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7158 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7159 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7160 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 981) { |
7161 | | // (MFSPR gprc:$Rx, 981) |
7162 | 0 | AsmString = "mfdear $\x01"; |
7163 | 0 | break; |
7164 | 0 | } |
7165 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7166 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7167 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7168 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7169 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 980) { |
7170 | | // (MFSPR gprc:$Rx, 980) |
7171 | 0 | AsmString = "mfesr $\x01"; |
7172 | 0 | break; |
7173 | 0 | } |
7174 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7175 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7176 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7177 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7178 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 512) { |
7179 | | // (MFSPR gprc:$Rx, 512) |
7180 | 0 | AsmString = "mfspefscr $\x01"; |
7181 | 0 | break; |
7182 | 0 | } |
7183 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7184 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7185 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7186 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7187 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 986) { |
7188 | | // (MFSPR gprc:$Rx, 986) |
7189 | 0 | AsmString = "mftcr $\x01"; |
7190 | 0 | break; |
7191 | 0 | } |
7192 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7193 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7194 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7195 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7196 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 280) { |
7197 | | // (MFSPR gprc:$RT, 280) |
7198 | 0 | AsmString = "mfasr $\x01"; |
7199 | 0 | break; |
7200 | 0 | } |
7201 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7202 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7203 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7204 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7205 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 287) { |
7206 | | // (MFSPR gprc:$RT, 287) |
7207 | 0 | AsmString = "mfpvr $\x01"; |
7208 | 0 | break; |
7209 | 0 | } |
7210 | 0 | return NULL; |
7211 | 0 | case PPC_MFTB: |
7212 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7213 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7214 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7215 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7216 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 269) { |
7217 | | // (MFTB gprc:$Rx, 269) |
7218 | 0 | AsmString = "mftbu $\x01"; |
7219 | 0 | break; |
7220 | 0 | } |
7221 | 0 | return NULL; |
7222 | 0 | case PPC_MTCRF8: |
7223 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7224 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7225 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 255 && |
7226 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7227 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
7228 | | // (MTCRF8 255, g8rc:$rA) |
7229 | 0 | AsmString = "mtcr $\x02"; |
7230 | 0 | break; |
7231 | 0 | } |
7232 | 0 | return NULL; |
7233 | 0 | case PPC_MTDCR: |
7234 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7235 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7236 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7237 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7238 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 128) { |
7239 | | // (MTDCR gprc:$Rx, 128) |
7240 | 0 | AsmString = "mtbr0 $\x01"; |
7241 | 0 | break; |
7242 | 0 | } |
7243 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7244 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7245 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7246 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7247 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 129) { |
7248 | | // (MTDCR gprc:$Rx, 129) |
7249 | 0 | AsmString = "mtbr1 $\x01"; |
7250 | 0 | break; |
7251 | 0 | } |
7252 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7253 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7254 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7255 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7256 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 130) { |
7257 | | // (MTDCR gprc:$Rx, 130) |
7258 | 0 | AsmString = "mtbr2 $\x01"; |
7259 | 0 | break; |
7260 | 0 | } |
7261 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7262 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7263 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7264 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7265 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 131) { |
7266 | | // (MTDCR gprc:$Rx, 131) |
7267 | 0 | AsmString = "mtbr3 $\x01"; |
7268 | 0 | break; |
7269 | 0 | } |
7270 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7271 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7272 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7273 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7274 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 132) { |
7275 | | // (MTDCR gprc:$Rx, 132) |
7276 | 0 | AsmString = "mtbr4 $\x01"; |
7277 | 0 | break; |
7278 | 0 | } |
7279 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7280 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7281 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7282 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7283 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 133) { |
7284 | | // (MTDCR gprc:$Rx, 133) |
7285 | 0 | AsmString = "mtbr5 $\x01"; |
7286 | 0 | break; |
7287 | 0 | } |
7288 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7289 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7290 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7291 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7292 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 134) { |
7293 | | // (MTDCR gprc:$Rx, 134) |
7294 | 0 | AsmString = "mtbr6 $\x01"; |
7295 | 0 | break; |
7296 | 0 | } |
7297 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7298 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7299 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7300 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7301 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 135) { |
7302 | | // (MTDCR gprc:$Rx, 135) |
7303 | 0 | AsmString = "mtbr7 $\x01"; |
7304 | 0 | break; |
7305 | 0 | } |
7306 | 0 | return NULL; |
7307 | 0 | case PPC_MTFSF: |
7308 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7309 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7310 | 0 | GETREGCLASS_CONTAIN(PPC_F8RCRegClassID, 1) && |
7311 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
7312 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && |
7313 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7314 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
7315 | | // (MTFSF i32imm:$FLM, f8rc:$FRB, 0, 0) |
7316 | 0 | AsmString = "mtfsf $\x01, $\x02"; |
7317 | 0 | break; |
7318 | 0 | } |
7319 | 0 | return NULL; |
7320 | 0 | case PPC_MTFSFI: |
7321 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
7322 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7323 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 0) && |
7324 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
7325 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
7326 | | // (MTFSFI crrc:$BF, i32imm:$U, 0) |
7327 | 0 | AsmString = "mtfsfi $\x01, $\x02"; |
7328 | 0 | break; |
7329 | 0 | } |
7330 | 0 | return NULL; |
7331 | 0 | case PPC_MTFSFIo: |
7332 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
7333 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7334 | 0 | GETREGCLASS_CONTAIN(PPC_CRRCRegClassID, 0) && |
7335 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
7336 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
7337 | | // (MTFSFIo crrc:$BF, i32imm:$U, 0) |
7338 | 0 | AsmString = "mtfsfi. $\x01, $\x02"; |
7339 | 0 | break; |
7340 | 0 | } |
7341 | 0 | return NULL; |
7342 | 0 | case PPC_MTFSFo: |
7343 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7344 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7345 | 0 | GETREGCLASS_CONTAIN(PPC_F8RCRegClassID, 1) && |
7346 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
7347 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && |
7348 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7349 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
7350 | | // (MTFSFo i32imm:$FLM, f8rc:$FRB, 0, 0) |
7351 | 0 | AsmString = "mtfsf. $\x01, $\x02"; |
7352 | 0 | break; |
7353 | 0 | } |
7354 | 0 | return NULL; |
7355 | 0 | case PPC_MTMSR: |
7356 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7357 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7358 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7359 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7360 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { |
7361 | | // (MTMSR gprc:$RS, 0) |
7362 | 0 | AsmString = "mtmsr $\x01"; |
7363 | 0 | break; |
7364 | 0 | } |
7365 | 0 | return NULL; |
7366 | 0 | case PPC_MTMSRD: |
7367 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7368 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7369 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7370 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 1)) && |
7371 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) { |
7372 | | // (MTMSRD gprc:$RS, 0) |
7373 | 0 | AsmString = "mtmsrd $\x01"; |
7374 | 0 | break; |
7375 | 0 | } |
7376 | 0 | return NULL; |
7377 | 0 | case PPC_MTSPR: |
7378 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7379 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7380 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && |
7381 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7382 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7383 | | // (MTSPR 1, gprc:$Rx) |
7384 | 0 | AsmString = "mtxer $\x02"; |
7385 | 0 | break; |
7386 | 0 | } |
7387 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7388 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7389 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 17 && |
7390 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7391 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7392 | | // (MTSPR 17, gprc:$Rx) |
7393 | 0 | AsmString = "mtdscr $\x02"; |
7394 | 0 | break; |
7395 | 0 | } |
7396 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7397 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7398 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 18 && |
7399 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7400 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7401 | | // (MTSPR 18, gprc:$Rx) |
7402 | 0 | AsmString = "mtdsisr $\x02"; |
7403 | 0 | break; |
7404 | 0 | } |
7405 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7406 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7407 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 19 && |
7408 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7409 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7410 | | // (MTSPR 19, gprc:$Rx) |
7411 | 0 | AsmString = "mtdar $\x02"; |
7412 | 0 | break; |
7413 | 0 | } |
7414 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7415 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7416 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 990 && |
7417 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7418 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7419 | | // (MTSPR 990, gprc:$Rx) |
7420 | 0 | AsmString = "mtsrr2 $\x02"; |
7421 | 0 | break; |
7422 | 0 | } |
7423 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7424 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7425 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 991 && |
7426 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7427 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7428 | | // (MTSPR 991, gprc:$Rx) |
7429 | 0 | AsmString = "mtsrr3 $\x02"; |
7430 | 0 | break; |
7431 | 0 | } |
7432 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7433 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7434 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 28 && |
7435 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7436 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7437 | | // (MTSPR 28, gprc:$Rx) |
7438 | 0 | AsmString = "mtcfar $\x02"; |
7439 | 0 | break; |
7440 | 0 | } |
7441 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7442 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7443 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 29 && |
7444 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7445 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7446 | | // (MTSPR 29, gprc:$Rx) |
7447 | 0 | AsmString = "mtamr $\x02"; |
7448 | 0 | break; |
7449 | 0 | } |
7450 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7451 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7452 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 48 && |
7453 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7454 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7455 | | // (MTSPR 48, gprc:$Rx) |
7456 | 0 | AsmString = "mtpid $\x02"; |
7457 | 0 | break; |
7458 | 0 | } |
7459 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7460 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7461 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 284 && |
7462 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7463 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7464 | | // (MTSPR 284, gprc:$Rx) |
7465 | 0 | AsmString = "mttbl $\x02"; |
7466 | 0 | break; |
7467 | 0 | } |
7468 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7469 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7470 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 285 && |
7471 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7472 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7473 | | // (MTSPR 285, gprc:$Rx) |
7474 | 0 | AsmString = "mttbu $\x02"; |
7475 | 0 | break; |
7476 | 0 | } |
7477 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7478 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7479 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 989 && |
7480 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7481 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7482 | | // (MTSPR 989, gprc:$Rx) |
7483 | 0 | AsmString = "mttblo $\x02"; |
7484 | 0 | break; |
7485 | 0 | } |
7486 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7487 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7488 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 988 && |
7489 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7490 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7491 | | // (MTSPR 988, gprc:$Rx) |
7492 | 0 | AsmString = "mttbhi $\x02"; |
7493 | 0 | break; |
7494 | 0 | } |
7495 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7496 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7497 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 536 && |
7498 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7499 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7500 | | // (MTSPR 536, gprc:$Rx) |
7501 | 0 | AsmString = "mtdbatu 0, $\x02"; |
7502 | 0 | break; |
7503 | 0 | } |
7504 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7505 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7506 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 538 && |
7507 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7508 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7509 | | // (MTSPR 538, gprc:$Rx) |
7510 | 0 | AsmString = "mtdbatu 1, $\x02"; |
7511 | 0 | break; |
7512 | 0 | } |
7513 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7514 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7515 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 540 && |
7516 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7517 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7518 | | // (MTSPR 540, gprc:$Rx) |
7519 | 0 | AsmString = "mtdbatu 2, $\x02"; |
7520 | 0 | break; |
7521 | 0 | } |
7522 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7523 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7524 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 542 && |
7525 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7526 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7527 | | // (MTSPR 542, gprc:$Rx) |
7528 | 0 | AsmString = "mtdbatu 3, $\x02"; |
7529 | 0 | break; |
7530 | 0 | } |
7531 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7532 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7533 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 537 && |
7534 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7535 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7536 | | // (MTSPR 537, gprc:$Rx) |
7537 | 0 | AsmString = "mtdbatl 0, $\x02"; |
7538 | 0 | break; |
7539 | 0 | } |
7540 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7541 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7542 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 539 && |
7543 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7544 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7545 | | // (MTSPR 539, gprc:$Rx) |
7546 | 0 | AsmString = "mtdbatl 1, $\x02"; |
7547 | 0 | break; |
7548 | 0 | } |
7549 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7550 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7551 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 541 && |
7552 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7553 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7554 | | // (MTSPR 541, gprc:$Rx) |
7555 | 0 | AsmString = "mtdbatl 2, $\x02"; |
7556 | 0 | break; |
7557 | 0 | } |
7558 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7559 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7560 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 543 && |
7561 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7562 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7563 | | // (MTSPR 543, gprc:$Rx) |
7564 | 0 | AsmString = "mtdbatl 3, $\x02"; |
7565 | 0 | break; |
7566 | 0 | } |
7567 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7568 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7569 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 528 && |
7570 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7571 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7572 | | // (MTSPR 528, gprc:$Rx) |
7573 | 0 | AsmString = "mtibatu 0, $\x02"; |
7574 | 0 | break; |
7575 | 0 | } |
7576 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7577 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7578 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 530 && |
7579 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7580 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7581 | | // (MTSPR 530, gprc:$Rx) |
7582 | 0 | AsmString = "mtibatu 1, $\x02"; |
7583 | 0 | break; |
7584 | 0 | } |
7585 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7586 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7587 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 532 && |
7588 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7589 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7590 | | // (MTSPR 532, gprc:$Rx) |
7591 | 0 | AsmString = "mtibatu 2, $\x02"; |
7592 | 0 | break; |
7593 | 0 | } |
7594 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7595 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7596 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 534 && |
7597 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7598 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7599 | | // (MTSPR 534, gprc:$Rx) |
7600 | 0 | AsmString = "mtibatu 3, $\x02"; |
7601 | 0 | break; |
7602 | 0 | } |
7603 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7604 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7605 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 529 && |
7606 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7607 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7608 | | // (MTSPR 529, gprc:$Rx) |
7609 | 0 | AsmString = "mtibatl 0, $\x02"; |
7610 | 0 | break; |
7611 | 0 | } |
7612 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7613 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7614 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 531 && |
7615 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7616 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7617 | | // (MTSPR 531, gprc:$Rx) |
7618 | 0 | AsmString = "mtibatl 1, $\x02"; |
7619 | 0 | break; |
7620 | 0 | } |
7621 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7622 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7623 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 533 && |
7624 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7625 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7626 | | // (MTSPR 533, gprc:$Rx) |
7627 | 0 | AsmString = "mtibatl 2, $\x02"; |
7628 | 0 | break; |
7629 | 0 | } |
7630 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7631 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7632 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 535 && |
7633 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7634 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7635 | | // (MTSPR 535, gprc:$Rx) |
7636 | 0 | AsmString = "mtibatl 3, $\x02"; |
7637 | 0 | break; |
7638 | 0 | } |
7639 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7640 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7641 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1018 && |
7642 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7643 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7644 | | // (MTSPR 1018, gprc:$Rx) |
7645 | 0 | AsmString = "mtdccr $\x02"; |
7646 | 0 | break; |
7647 | 0 | } |
7648 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7649 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7650 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1019 && |
7651 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7652 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7653 | | // (MTSPR 1019, gprc:$Rx) |
7654 | 0 | AsmString = "mticcr $\x02"; |
7655 | 0 | break; |
7656 | 0 | } |
7657 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7658 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7659 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 981 && |
7660 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7661 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7662 | | // (MTSPR 981, gprc:$Rx) |
7663 | 0 | AsmString = "mtdear $\x02"; |
7664 | 0 | break; |
7665 | 0 | } |
7666 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7667 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7668 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 980 && |
7669 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7670 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7671 | | // (MTSPR 980, gprc:$Rx) |
7672 | 0 | AsmString = "mtesr $\x02"; |
7673 | 0 | break; |
7674 | 0 | } |
7675 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7676 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7677 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 512 && |
7678 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7679 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7680 | | // (MTSPR 512, gprc:$Rx) |
7681 | 0 | AsmString = "mtspefscr $\x02"; |
7682 | 0 | break; |
7683 | 0 | } |
7684 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
7685 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
7686 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 986 && |
7687 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7688 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
7689 | | // (MTSPR 986, gprc:$Rx) |
7690 | 0 | AsmString = "mttcr $\x02"; |
7691 | 0 | break; |
7692 | 0 | } |
7693 | 0 | return NULL; |
7694 | 0 | case PPC_NOR8: |
7695 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
7696 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7697 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7698 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7699 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7700 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7701 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
7702 | | // (NOR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) |
7703 | 0 | AsmString = "not $\x01, $\x02"; |
7704 | 0 | break; |
7705 | 0 | } |
7706 | 0 | return NULL; |
7707 | 0 | case PPC_NOR8o: |
7708 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
7709 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7710 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7711 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7712 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7713 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7714 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
7715 | | // (NOR8o g8rc:$rA, g8rc:$rB, g8rc:$rB) |
7716 | 0 | AsmString = "not. $\x01, $\x02"; |
7717 | 0 | break; |
7718 | 0 | } |
7719 | 0 | return NULL; |
7720 | 0 | case PPC_OR8: |
7721 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
7722 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7723 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7724 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7725 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7726 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7727 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
7728 | | // (OR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) |
7729 | 0 | AsmString = "mr $\x01, $\x02"; |
7730 | 0 | break; |
7731 | 0 | } |
7732 | 0 | return NULL; |
7733 | 0 | case PPC_OR8o: |
7734 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
7735 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7736 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7737 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7738 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7739 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7740 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
7741 | | // (OR8o g8rc:$rA, g8rc:$rB, g8rc:$rB) |
7742 | 0 | AsmString = "mr. $\x01, $\x02"; |
7743 | 0 | break; |
7744 | 0 | } |
7745 | 0 | return NULL; |
7746 | 0 | case PPC_QVFLOGICALb: |
7747 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7748 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7749 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7750 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7751 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && |
7752 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7753 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && |
7754 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7755 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
7756 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0) |
7757 | 0 | AsmString = "qvfclr $\x01"; |
7758 | 0 | break; |
7759 | 0 | } |
7760 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7761 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7762 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7763 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7764 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7765 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7766 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7767 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7768 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 1) { |
7769 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 1) |
7770 | 0 | AsmString = "qvfand $\x01, $\x02, $\x03"; |
7771 | 0 | break; |
7772 | 0 | } |
7773 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7774 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7775 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7776 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7777 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7778 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7779 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7780 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7781 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 4) { |
7782 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 4) |
7783 | 0 | AsmString = "qvfandc $\x01, $\x02, $\x03"; |
7784 | 0 | break; |
7785 | 0 | } |
7786 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7787 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7788 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7789 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7790 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7791 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7792 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && |
7793 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7794 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 5) { |
7795 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 5) |
7796 | 0 | AsmString = "qvfctfb $\x01, $\x02"; |
7797 | 0 | break; |
7798 | 0 | } |
7799 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7800 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7801 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7802 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7803 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7804 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7805 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7806 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7807 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 6) { |
7808 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 6) |
7809 | 0 | AsmString = "qvfxor $\x01, $\x02, $\x03"; |
7810 | 0 | break; |
7811 | 0 | } |
7812 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7813 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7814 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7815 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7816 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7817 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7818 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7819 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7820 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { |
7821 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 7) |
7822 | 0 | AsmString = "qvfor $\x01, $\x02, $\x03"; |
7823 | 0 | break; |
7824 | 0 | } |
7825 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7826 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7827 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7828 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7829 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7830 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7831 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7832 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7833 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 8) { |
7834 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 8) |
7835 | 0 | AsmString = "qvfnor $\x01, $\x02, $\x03"; |
7836 | 0 | break; |
7837 | 0 | } |
7838 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7839 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7840 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7841 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7842 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7843 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7844 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7845 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7846 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 9) { |
7847 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 9) |
7848 | 0 | AsmString = "qvfequ $\x01, $\x02, $\x03"; |
7849 | 0 | break; |
7850 | 0 | } |
7851 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7852 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7853 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7854 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7855 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7856 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7857 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && |
7858 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7859 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 10) { |
7860 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRA, 10) |
7861 | 0 | AsmString = "qvfnot $\x01, $\x02"; |
7862 | 0 | break; |
7863 | 0 | } |
7864 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7865 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7866 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7867 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7868 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7869 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7870 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7871 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7872 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 13) { |
7873 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 13) |
7874 | 0 | AsmString = "qvforc $\x01, $\x02, $\x03"; |
7875 | 0 | break; |
7876 | 0 | } |
7877 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7878 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7879 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7880 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7881 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 1) && |
7882 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7883 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 2) && |
7884 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7885 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 14) { |
7886 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRA, qbrc:$FRB, 14) |
7887 | 0 | AsmString = "qvfnand $\x01, $\x02, $\x03"; |
7888 | 0 | break; |
7889 | 0 | } |
7890 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7891 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7892 | 0 | GETREGCLASS_CONTAIN(PPC_QBRCRegClassID, 0) && |
7893 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7894 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && |
7895 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7896 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 0)) && |
7897 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7898 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { |
7899 | | // (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 15) |
7900 | 0 | AsmString = "qvfset $\x01"; |
7901 | 0 | break; |
7902 | 0 | } |
7903 | 0 | return NULL; |
7904 | 0 | case PPC_RLDCL: |
7905 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7906 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7907 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7908 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7909 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7910 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7911 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && |
7912 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7913 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
7914 | | // (RLDCL g8rc:$rA, g8rc:$rS, gprc:$rB, 0) |
7915 | 0 | AsmString = "rotld $\x01, $\x02, $\x03"; |
7916 | 0 | break; |
7917 | 0 | } |
7918 | 0 | return NULL; |
7919 | 0 | case PPC_RLDCLo: |
7920 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7921 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7922 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7923 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7924 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7925 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
7926 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && |
7927 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7928 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
7929 | | // (RLDCLo g8rc:$rA, g8rc:$rS, gprc:$rB, 0) |
7930 | 0 | AsmString = "rotld. $\x01, $\x02, $\x03"; |
7931 | 0 | break; |
7932 | 0 | } |
7933 | 0 | return NULL; |
7934 | 0 | case PPC_RLDICL: |
7935 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7936 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7937 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7938 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7939 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7940 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7941 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
7942 | | // (RLDICL g8rc:$rA, g8rc:$rS, u6imm:$n, 0) |
7943 | 0 | AsmString = "rotldi $\x01, $\x02, $\xFF\x03\x05"; |
7944 | 0 | break; |
7945 | 0 | } |
7946 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7947 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7948 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7949 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7950 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7951 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
7952 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
7953 | | // (RLDICL g8rc:$rA, g8rc:$rS, 0, u6imm:$n) |
7954 | 0 | AsmString = "clrldi $\x01, $\x02, $\xFF\x04\x05"; |
7955 | 0 | break; |
7956 | 0 | } |
7957 | 0 | return NULL; |
7958 | 0 | case PPC_RLDICLo: |
7959 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7960 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7961 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7962 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7963 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7964 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7965 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
7966 | | // (RLDICLo g8rc:$rA, g8rc:$rS, u6imm:$n, 0) |
7967 | 0 | AsmString = "rotldi. $\x01, $\x02, $\xFF\x03\x05"; |
7968 | 0 | break; |
7969 | 0 | } |
7970 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
7971 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7972 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
7973 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7974 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
7975 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
7976 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
7977 | | // (RLDICLo g8rc:$rA, g8rc:$rS, 0, u6imm:$n) |
7978 | 0 | AsmString = "clrldi. $\x01, $\x02, $\xFF\x04\x05"; |
7979 | 0 | break; |
7980 | 0 | } |
7981 | 0 | return NULL; |
7982 | 0 | case PPC_RLWINM: |
7983 | 0 | if (MCInst_getNumOperands(MI) == 5 && |
7984 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7985 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7986 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
7987 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
7988 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
7989 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && |
7990 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 4)) && |
7991 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { |
7992 | | // (RLWINM gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) |
7993 | 0 | AsmString = "rotlwi $\x01, $\x02, $\xFF\x03\x06"; |
7994 | 0 | break; |
7995 | 0 | } |
7996 | 0 | if (MCInst_getNumOperands(MI) == 5 && |
7997 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
7998 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
7999 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8000 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8001 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8002 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && |
8003 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 4)) && |
8004 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { |
8005 | | // (RLWINM gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) |
8006 | 0 | AsmString = "clrlwi $\x01, $\x02, $\xFF\x04\x06"; |
8007 | 0 | break; |
8008 | 0 | } |
8009 | 0 | return NULL; |
8010 | 0 | case PPC_RLWINMo: |
8011 | 0 | if (MCInst_getNumOperands(MI) == 5 && |
8012 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8013 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8014 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8015 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8016 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8017 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && |
8018 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 4)) && |
8019 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { |
8020 | | // (RLWINMo gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) |
8021 | 0 | AsmString = "rotlwi. $\x01, $\x02, $\xFF\x03\x06"; |
8022 | 0 | break; |
8023 | 0 | } |
8024 | 0 | if (MCInst_getNumOperands(MI) == 5 && |
8025 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8026 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8027 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8028 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8029 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8030 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && |
8031 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 4)) && |
8032 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { |
8033 | | // (RLWINMo gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) |
8034 | 0 | AsmString = "clrlwi. $\x01, $\x02, $\xFF\x04\x06"; |
8035 | 0 | break; |
8036 | 0 | } |
8037 | 0 | return NULL; |
8038 | 0 | case PPC_RLWNM: |
8039 | 0 | if (MCInst_getNumOperands(MI) == 5 && |
8040 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8041 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8042 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8043 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8044 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8045 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && |
8046 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8047 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && |
8048 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 4)) && |
8049 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { |
8050 | | // (RLWNM gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) |
8051 | 0 | AsmString = "rotlw $\x01, $\x02, $\x03"; |
8052 | 0 | break; |
8053 | 0 | } |
8054 | 0 | return NULL; |
8055 | 0 | case PPC_RLWNMo: |
8056 | 0 | if (MCInst_getNumOperands(MI) == 5 && |
8057 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8058 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8059 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8060 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8061 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8062 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2) && |
8063 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8064 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && |
8065 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 4)) && |
8066 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 4)) == 31) { |
8067 | | // (RLWNMo gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) |
8068 | 0 | AsmString = "rotlw. $\x01, $\x02, $\x03"; |
8069 | 0 | break; |
8070 | 0 | } |
8071 | 0 | return NULL; |
8072 | 0 | case PPC_SC: |
8073 | 0 | if (MCInst_getNumOperands(MI) == 1 && |
8074 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8075 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { |
8076 | | // (SC 0) |
8077 | 0 | AsmString = "sc"; |
8078 | 0 | break; |
8079 | 0 | } |
8080 | 0 | return NULL; |
8081 | 0 | case PPC_SUBF8: |
8082 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8083 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8084 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
8085 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8086 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8087 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8088 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8089 | | // (SUBF8 g8rc:$rA, g8rc:$rC, g8rc:$rB) |
8090 | 0 | AsmString = "sub $\x01, $\x03, $\x02"; |
8091 | 0 | break; |
8092 | 0 | } |
8093 | 0 | return NULL; |
8094 | 0 | case PPC_SUBF8o: |
8095 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8096 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8097 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
8098 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8099 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8100 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8101 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8102 | | // (SUBF8o g8rc:$rA, g8rc:$rC, g8rc:$rB) |
8103 | 0 | AsmString = "sub. $\x01, $\x03, $\x02"; |
8104 | 0 | break; |
8105 | 0 | } |
8106 | 0 | return NULL; |
8107 | 0 | case PPC_SUBFC8: |
8108 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8109 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8110 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
8111 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8112 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8113 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8114 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8115 | | // (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB) |
8116 | 0 | AsmString = "subc $\x01, $\x03, $\x02"; |
8117 | 0 | break; |
8118 | 0 | } |
8119 | 0 | return NULL; |
8120 | 0 | case PPC_SUBFC8o: |
8121 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8122 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8123 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 0) && |
8124 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8125 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8126 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8127 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8128 | | // (SUBFC8o g8rc:$rA, g8rc:$rC, g8rc:$rB) |
8129 | 0 | AsmString = "subc. $\x01, $\x03, $\x02"; |
8130 | 0 | break; |
8131 | 0 | } |
8132 | 0 | return NULL; |
8133 | 0 | case PPC_SYNC: |
8134 | 0 | if (MCInst_getNumOperands(MI) == 1 && |
8135 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8136 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { |
8137 | | // (SYNC 1) |
8138 | 0 | AsmString = "lwsync"; |
8139 | 0 | break; |
8140 | 0 | } |
8141 | 0 | if (MCInst_getNumOperands(MI) == 1 && |
8142 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8143 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { |
8144 | | // (SYNC 2) |
8145 | 0 | AsmString = "ptesync"; |
8146 | 0 | break; |
8147 | 0 | } |
8148 | 0 | return NULL; |
8149 | 0 | case PPC_TD: |
8150 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8151 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8152 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && |
8153 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8154 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8155 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8156 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8157 | | // (TD 16, g8rc:$rA, g8rc:$rB) |
8158 | 0 | AsmString = "tdlt $\x02, $\x03"; |
8159 | 0 | break; |
8160 | 0 | } |
8161 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8162 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8163 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && |
8164 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8165 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8166 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8167 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8168 | | // (TD 4, g8rc:$rA, g8rc:$rB) |
8169 | 0 | AsmString = "tdeq $\x02, $\x03"; |
8170 | 0 | break; |
8171 | 0 | } |
8172 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8173 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8174 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8175 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8176 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8177 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8178 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8179 | | // (TD 8, g8rc:$rA, g8rc:$rB) |
8180 | 0 | AsmString = "tdgt $\x02, $\x03"; |
8181 | 0 | break; |
8182 | 0 | } |
8183 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8184 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8185 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && |
8186 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8187 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8188 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8189 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8190 | | // (TD 24, g8rc:$rA, g8rc:$rB) |
8191 | 0 | AsmString = "tdne $\x02, $\x03"; |
8192 | 0 | break; |
8193 | 0 | } |
8194 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8195 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8196 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8197 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8198 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8199 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8200 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8201 | | // (TD 2, g8rc:$rA, g8rc:$rB) |
8202 | 0 | AsmString = "tdllt $\x02, $\x03"; |
8203 | 0 | break; |
8204 | 0 | } |
8205 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8206 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8207 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && |
8208 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8209 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8210 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8211 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8212 | | // (TD 1, g8rc:$rA, g8rc:$rB) |
8213 | 0 | AsmString = "tdlgt $\x02, $\x03"; |
8214 | 0 | break; |
8215 | 0 | } |
8216 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8217 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8218 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && |
8219 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8220 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1) && |
8221 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8222 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 2)) { |
8223 | | // (TD 31, g8rc:$rA, g8rc:$rB) |
8224 | 0 | AsmString = "tdu $\x02, $\x03"; |
8225 | 0 | break; |
8226 | 0 | } |
8227 | 0 | return NULL; |
8228 | 0 | case PPC_TDI: |
8229 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8230 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8231 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && |
8232 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8233 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
8234 | | // (TDI 16, g8rc:$rA, s16imm:$imm) |
8235 | 0 | AsmString = "tdlti $\x02, $\xFF\x03\x03"; |
8236 | 0 | break; |
8237 | 0 | } |
8238 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8239 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8240 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && |
8241 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8242 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
8243 | | // (TDI 4, g8rc:$rA, s16imm:$imm) |
8244 | 0 | AsmString = "tdeqi $\x02, $\xFF\x03\x03"; |
8245 | 0 | break; |
8246 | 0 | } |
8247 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8248 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8249 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8250 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8251 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
8252 | | // (TDI 8, g8rc:$rA, s16imm:$imm) |
8253 | 0 | AsmString = "tdgti $\x02, $\xFF\x03\x03"; |
8254 | 0 | break; |
8255 | 0 | } |
8256 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8257 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8258 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && |
8259 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8260 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
8261 | | // (TDI 24, g8rc:$rA, s16imm:$imm) |
8262 | 0 | AsmString = "tdnei $\x02, $\xFF\x03\x03"; |
8263 | 0 | break; |
8264 | 0 | } |
8265 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8266 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8267 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8268 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8269 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
8270 | | // (TDI 2, g8rc:$rA, s16imm:$imm) |
8271 | 0 | AsmString = "tdllti $\x02, $\xFF\x03\x03"; |
8272 | 0 | break; |
8273 | 0 | } |
8274 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8275 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8276 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && |
8277 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8278 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
8279 | | // (TDI 1, g8rc:$rA, s16imm:$imm) |
8280 | 0 | AsmString = "tdlgti $\x02, $\xFF\x03\x03"; |
8281 | 0 | break; |
8282 | 0 | } |
8283 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8284 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8285 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && |
8286 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8287 | 0 | GETREGCLASS_CONTAIN(PPC_G8RCRegClassID, 1)) { |
8288 | | // (TDI 31, g8rc:$rA, s16imm:$imm) |
8289 | 0 | AsmString = "tdui $\x02, $\xFF\x03\x03"; |
8290 | 0 | break; |
8291 | 0 | } |
8292 | 0 | return NULL; |
8293 | 0 | case PPC_TLBIE: |
8294 | 0 | if (MCInst_getNumOperands(MI) == 2 && |
8295 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_R0 && |
8296 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8297 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8298 | | // (TLBIE R0, gprc:$RB) |
8299 | 0 | AsmString = "tlbie $\x02"; |
8300 | 0 | break; |
8301 | 0 | } |
8302 | 0 | return NULL; |
8303 | 0 | case PPC_TLBRE2: |
8304 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8305 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8306 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8307 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8308 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8309 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8310 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8311 | | // (TLBRE2 gprc:$RS, gprc:$A, 0) |
8312 | 0 | AsmString = "tlbrehi $\x01, $\x02"; |
8313 | 0 | break; |
8314 | 0 | } |
8315 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8316 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8317 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8318 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8319 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8320 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8321 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { |
8322 | | // (TLBRE2 gprc:$RS, gprc:$A, 1) |
8323 | 0 | AsmString = "tlbrelo $\x01, $\x02"; |
8324 | 0 | break; |
8325 | 0 | } |
8326 | 0 | return NULL; |
8327 | 0 | case PPC_TLBWE2: |
8328 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8329 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8330 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8331 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8332 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8333 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8334 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8335 | | // (TLBWE2 gprc:$RS, gprc:$A, 0) |
8336 | 0 | AsmString = "tlbwehi $\x01, $\x02"; |
8337 | 0 | break; |
8338 | 0 | } |
8339 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8340 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8341 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 0) && |
8342 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8343 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8344 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8345 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 1) { |
8346 | | // (TLBWE2 gprc:$RS, gprc:$A, 1) |
8347 | 0 | AsmString = "tlbwelo $\x01, $\x02"; |
8348 | 0 | break; |
8349 | 0 | } |
8350 | 0 | return NULL; |
8351 | 0 | case PPC_TW: |
8352 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8353 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8354 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && |
8355 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8356 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8357 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8358 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
8359 | | // (TW 16, gprc:$rA, gprc:$rB) |
8360 | 0 | AsmString = "twlt $\x02, $\x03"; |
8361 | 0 | break; |
8362 | 0 | } |
8363 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8364 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8365 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && |
8366 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8367 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8368 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8369 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
8370 | | // (TW 4, gprc:$rA, gprc:$rB) |
8371 | 0 | AsmString = "tweq $\x02, $\x03"; |
8372 | 0 | break; |
8373 | 0 | } |
8374 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8375 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8376 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8377 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8378 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8379 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8380 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
8381 | | // (TW 8, gprc:$rA, gprc:$rB) |
8382 | 0 | AsmString = "twgt $\x02, $\x03"; |
8383 | 0 | break; |
8384 | 0 | } |
8385 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8386 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8387 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && |
8388 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8389 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8390 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8391 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
8392 | | // (TW 24, gprc:$rA, gprc:$rB) |
8393 | 0 | AsmString = "twne $\x02, $\x03"; |
8394 | 0 | break; |
8395 | 0 | } |
8396 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8397 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8398 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8399 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8400 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8401 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8402 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
8403 | | // (TW 2, gprc:$rA, gprc:$rB) |
8404 | 0 | AsmString = "twllt $\x02, $\x03"; |
8405 | 0 | break; |
8406 | 0 | } |
8407 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8408 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8409 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && |
8410 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8411 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8412 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8413 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
8414 | | // (TW 1, gprc:$rA, gprc:$rB) |
8415 | 0 | AsmString = "twlgt $\x02, $\x03"; |
8416 | 0 | break; |
8417 | 0 | } |
8418 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8419 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8420 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && |
8421 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8422 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1) && |
8423 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8424 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 2)) { |
8425 | | // (TW 31, gprc:$rA, gprc:$rB) |
8426 | 0 | AsmString = "twu $\x02, $\x03"; |
8427 | 0 | break; |
8428 | 0 | } |
8429 | 0 | return NULL; |
8430 | 0 | case PPC_TWI: |
8431 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8432 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8433 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 16 && |
8434 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8435 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8436 | | // (TWI 16, gprc:$rA, s16imm:$imm) |
8437 | 0 | AsmString = "twlti $\x02, $\xFF\x03\x03"; |
8438 | 0 | break; |
8439 | 0 | } |
8440 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8441 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8442 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4 && |
8443 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8444 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8445 | | // (TWI 4, gprc:$rA, s16imm:$imm) |
8446 | 0 | AsmString = "tweqi $\x02, $\xFF\x03\x03"; |
8447 | 0 | break; |
8448 | 0 | } |
8449 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8450 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8451 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8452 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8453 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8454 | | // (TWI 8, gprc:$rA, s16imm:$imm) |
8455 | 0 | AsmString = "twgti $\x02, $\xFF\x03\x03"; |
8456 | 0 | break; |
8457 | 0 | } |
8458 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8459 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8460 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 24 && |
8461 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8462 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8463 | | // (TWI 24, gprc:$rA, s16imm:$imm) |
8464 | 0 | AsmString = "twnei $\x02, $\xFF\x03\x03"; |
8465 | 0 | break; |
8466 | 0 | } |
8467 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8468 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8469 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8470 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8471 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8472 | | // (TWI 2, gprc:$rA, s16imm:$imm) |
8473 | 0 | AsmString = "twllti $\x02, $\xFF\x03\x03"; |
8474 | 0 | break; |
8475 | 0 | } |
8476 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8477 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8478 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1 && |
8479 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8480 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8481 | | // (TWI 1, gprc:$rA, s16imm:$imm) |
8482 | 0 | AsmString = "twlgti $\x02, $\xFF\x03\x03"; |
8483 | 0 | break; |
8484 | 0 | } |
8485 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8486 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8487 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 31 && |
8488 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8489 | 0 | GETREGCLASS_CONTAIN(PPC_GPRCRegClassID, 1)) { |
8490 | | // (TWI 31, gprc:$rA, s16imm:$imm) |
8491 | 0 | AsmString = "twui $\x02, $\xFF\x03\x03"; |
8492 | 0 | break; |
8493 | 0 | } |
8494 | 0 | return NULL; |
8495 | 0 | case PPC_WAIT: |
8496 | 0 | if (MCInst_getNumOperands(MI) == 1 && |
8497 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8498 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { |
8499 | | // (WAIT 0) |
8500 | 0 | AsmString = "wait"; |
8501 | 0 | break; |
8502 | 0 | } |
8503 | 0 | if (MCInst_getNumOperands(MI) == 1 && |
8504 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8505 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { |
8506 | | // (WAIT 1) |
8507 | 0 | AsmString = "waitrsv"; |
8508 | 0 | break; |
8509 | 0 | } |
8510 | 0 | if (MCInst_getNumOperands(MI) == 1 && |
8511 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8512 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { |
8513 | | // (WAIT 2) |
8514 | 0 | AsmString = "waitimpl"; |
8515 | 0 | break; |
8516 | 0 | } |
8517 | 0 | return NULL; |
8518 | 0 | case PPC_XORI: |
8519 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8520 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 0)) == PPC_R0 && |
8521 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 1)) == PPC_R0 && |
8522 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8523 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8524 | | // (XORI R0, R0, 0) |
8525 | 0 | AsmString = "xnop"; |
8526 | 0 | break; |
8527 | 0 | } |
8528 | 0 | return NULL; |
8529 | 0 | case PPC_XVCPSGNDP: |
8530 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8531 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8532 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && |
8533 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8534 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && |
8535 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8536 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
8537 | | // (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB) |
8538 | 0 | AsmString = "xvmovdp $\x01, $\x02"; |
8539 | 0 | break; |
8540 | 0 | } |
8541 | 0 | return NULL; |
8542 | 0 | case PPC_XVCPSGNSP: |
8543 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8544 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8545 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && |
8546 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8547 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && |
8548 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8549 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { |
8550 | | // (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB) |
8551 | 0 | AsmString = "xvmovsp $\x01, $\x02"; |
8552 | 0 | break; |
8553 | 0 | } |
8554 | 0 | return NULL; |
8555 | 0 | case PPC_XXPERMDI: |
8556 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
8557 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8558 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && |
8559 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8560 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && |
8561 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8562 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && |
8563 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8564 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
8565 | | // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0) |
8566 | 0 | AsmString = "xxspltd $\x01, $\x02, 0"; |
8567 | 0 | break; |
8568 | 0 | } |
8569 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
8570 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8571 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && |
8572 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8573 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && |
8574 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8575 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && |
8576 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8577 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { |
8578 | | // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3) |
8579 | 0 | AsmString = "xxspltd $\x01, $\x02, 1"; |
8580 | 0 | break; |
8581 | 0 | } |
8582 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
8583 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8584 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && |
8585 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8586 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && |
8587 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8588 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 2) && |
8589 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8590 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { |
8591 | | // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0) |
8592 | 0 | AsmString = "xxmrghd $\x01, $\x02, $\x03"; |
8593 | 0 | break; |
8594 | 0 | } |
8595 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
8596 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8597 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && |
8598 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8599 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && |
8600 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8601 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 2) && |
8602 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8603 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 3) { |
8604 | | // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3) |
8605 | 0 | AsmString = "xxmrgld $\x01, $\x02, $\x03"; |
8606 | 0 | break; |
8607 | 0 | } |
8608 | 0 | if (MCInst_getNumOperands(MI) == 4 && |
8609 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 0)) && |
8610 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 0) && |
8611 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8612 | 0 | GETREGCLASS_CONTAIN(PPC_VSRCRegClassID, 1) && |
8613 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 2)) && |
8614 | 0 | MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && |
8615 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 3)) && |
8616 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 3)) == 2) { |
8617 | | // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2) |
8618 | 0 | AsmString = "xxswapd $\x01, $\x02"; |
8619 | 0 | break; |
8620 | 0 | } |
8621 | 0 | return NULL; |
8622 | 0 | case PPC_gBC: |
8623 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8624 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8625 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8626 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8627 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8628 | | // (gBC 8, crbitrc:$bi, condbrtarget:$dst) |
8629 | 0 | AsmString = "bdnzt $\x02, $\xFF\x03\x01"; |
8630 | 0 | break; |
8631 | 0 | } |
8632 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8633 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8634 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && |
8635 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8636 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8637 | | // (gBC 0, crbitrc:$bi, condbrtarget:$dst) |
8638 | 0 | AsmString = "bdnzf $\x02, $\xFF\x03\x01"; |
8639 | 0 | break; |
8640 | 0 | } |
8641 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8642 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8643 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && |
8644 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8645 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8646 | | // (gBC 10, crbitrc:$bi, condbrtarget:$dst) |
8647 | 0 | AsmString = "bdzt $\x02, $\xFF\x03\x01"; |
8648 | 0 | break; |
8649 | 0 | } |
8650 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8651 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8652 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8653 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8654 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8655 | | // (gBC 2, crbitrc:$bi, condbrtarget:$dst) |
8656 | 0 | AsmString = "bdzf $\x02, $\xFF\x03\x01"; |
8657 | 0 | break; |
8658 | 0 | } |
8659 | 0 | return NULL; |
8660 | 0 | case PPC_gBCA: |
8661 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8662 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8663 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8664 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8665 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8666 | | // (gBCA 8, crbitrc:$bi, abscondbrtarget:$dst) |
8667 | 0 | AsmString = "bdnzta $\x02, $\xFF\x03\x02"; |
8668 | 0 | break; |
8669 | 0 | } |
8670 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8671 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8672 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && |
8673 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8674 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8675 | | // (gBCA 0, crbitrc:$bi, abscondbrtarget:$dst) |
8676 | 0 | AsmString = "bdnzfa $\x02, $\xFF\x03\x02"; |
8677 | 0 | break; |
8678 | 0 | } |
8679 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8680 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8681 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && |
8682 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8683 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8684 | | // (gBCA 10, crbitrc:$bi, abscondbrtarget:$dst) |
8685 | 0 | AsmString = "bdzta $\x02, $\xFF\x03\x02"; |
8686 | 0 | break; |
8687 | 0 | } |
8688 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8689 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8690 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8691 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8692 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8693 | | // (gBCA 2, crbitrc:$bi, abscondbrtarget:$dst) |
8694 | 0 | AsmString = "bdzfa $\x02, $\xFF\x03\x02"; |
8695 | 0 | break; |
8696 | 0 | } |
8697 | 0 | return NULL; |
8698 | 0 | case PPC_gBCCTR: |
8699 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8700 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8701 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8702 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8703 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8704 | | // (gBCCTR u5imm:$bo, crbitrc:$bi, 0) |
8705 | 0 | AsmString = "bcctr $\xFF\x01\x06, $\x02"; |
8706 | 0 | break; |
8707 | 0 | } |
8708 | 0 | return NULL; |
8709 | 0 | case PPC_gBCCTRL: |
8710 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8711 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8712 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8713 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8714 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8715 | | // (gBCCTRL u5imm:$bo, crbitrc:$bi, 0) |
8716 | 0 | AsmString = "bcctrl $\xFF\x01\x06, $\x02"; |
8717 | 0 | break; |
8718 | 0 | } |
8719 | 0 | return NULL; |
8720 | 0 | case PPC_gBCL: |
8721 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8722 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8723 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8724 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8725 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8726 | | // (gBCL 8, crbitrc:$bi, condbrtarget:$dst) |
8727 | 0 | AsmString = "bdnztl $\x02, $\xFF\x03\x01"; |
8728 | 0 | break; |
8729 | 0 | } |
8730 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8731 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8732 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && |
8733 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8734 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8735 | | // (gBCL 0, crbitrc:$bi, condbrtarget:$dst) |
8736 | 0 | AsmString = "bdnzfl $\x02, $\xFF\x03\x01"; |
8737 | 0 | break; |
8738 | 0 | } |
8739 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8740 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8741 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && |
8742 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8743 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8744 | | // (gBCL 10, crbitrc:$bi, condbrtarget:$dst) |
8745 | 0 | AsmString = "bdztl $\x02, $\xFF\x03\x01"; |
8746 | 0 | break; |
8747 | 0 | } |
8748 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8749 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8750 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8751 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8752 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8753 | | // (gBCL 2, crbitrc:$bi, condbrtarget:$dst) |
8754 | 0 | AsmString = "bdzfl $\x02, $\xFF\x03\x01"; |
8755 | 0 | break; |
8756 | 0 | } |
8757 | 0 | return NULL; |
8758 | 0 | case PPC_gBCLA: |
8759 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8760 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8761 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8762 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8763 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8764 | | // (gBCLA 8, crbitrc:$bi, abscondbrtarget:$dst) |
8765 | 0 | AsmString = "bdnztla $\x02, $\xFF\x03\x02"; |
8766 | 0 | break; |
8767 | 0 | } |
8768 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8769 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8770 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && |
8771 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8772 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8773 | | // (gBCLA 0, crbitrc:$bi, abscondbrtarget:$dst) |
8774 | 0 | AsmString = "bdnzfla $\x02, $\xFF\x03\x02"; |
8775 | 0 | break; |
8776 | 0 | } |
8777 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8778 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8779 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && |
8780 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8781 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8782 | | // (gBCLA 10, crbitrc:$bi, abscondbrtarget:$dst) |
8783 | 0 | AsmString = "bdztla $\x02, $\xFF\x03\x02"; |
8784 | 0 | break; |
8785 | 0 | } |
8786 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8787 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8788 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8789 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8790 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1)) { |
8791 | | // (gBCLA 2, crbitrc:$bi, abscondbrtarget:$dst) |
8792 | 0 | AsmString = "bdzfla $\x02, $\xFF\x03\x02"; |
8793 | 0 | break; |
8794 | 0 | } |
8795 | 0 | return NULL; |
8796 | 0 | case PPC_gBCLR: |
8797 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8798 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8799 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8800 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8801 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8802 | | // (gBCLR u5imm:$bo, crbitrc:$bi, 0) |
8803 | 0 | AsmString = "bclr $\xFF\x01\x06, $\x02"; |
8804 | 0 | break; |
8805 | 0 | } |
8806 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8807 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8808 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8809 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8810 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8811 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8812 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8813 | | // (gBCLR 8, crbitrc:$bi, 0) |
8814 | 0 | AsmString = "bdnztlr $\x02"; |
8815 | 0 | break; |
8816 | 0 | } |
8817 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8818 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8819 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && |
8820 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8821 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8822 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8823 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8824 | | // (gBCLR 0, crbitrc:$bi, 0) |
8825 | 0 | AsmString = "bdnzflr $\x02"; |
8826 | 0 | break; |
8827 | 0 | } |
8828 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8829 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8830 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && |
8831 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8832 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8833 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8834 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8835 | | // (gBCLR 10, crbitrc:$bi, 0) |
8836 | 0 | AsmString = "bdztlr $\x02"; |
8837 | 0 | break; |
8838 | 0 | } |
8839 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8840 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8841 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8842 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8843 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8844 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8845 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8846 | | // (gBCLR 2, crbitrc:$bi, 0) |
8847 | 0 | AsmString = "bdzflr $\x02"; |
8848 | 0 | break; |
8849 | 0 | } |
8850 | 0 | return NULL; |
8851 | 0 | case PPC_gBCLRL: |
8852 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8853 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8854 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8855 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8856 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8857 | | // (gBCLRL u5imm:$bo, crbitrc:$bi, 0) |
8858 | 0 | AsmString = "bclrl $\xFF\x01\x06, $\x02"; |
8859 | 0 | break; |
8860 | 0 | } |
8861 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8862 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8863 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 8 && |
8864 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8865 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8866 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8867 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8868 | | // (gBCLRL 8, crbitrc:$bi, 0) |
8869 | 0 | AsmString = "bdnztlrl $\x02"; |
8870 | 0 | break; |
8871 | 0 | } |
8872 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8873 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8874 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 && |
8875 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8876 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8877 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8878 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8879 | | // (gBCLRL 0, crbitrc:$bi, 0) |
8880 | 0 | AsmString = "bdnzflrl $\x02"; |
8881 | 0 | break; |
8882 | 0 | } |
8883 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8884 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8885 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 10 && |
8886 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8887 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8888 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8889 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8890 | | // (gBCLRL 10, crbitrc:$bi, 0) |
8891 | 0 | AsmString = "bdztlrl $\x02"; |
8892 | 0 | break; |
8893 | 0 | } |
8894 | 0 | if (MCInst_getNumOperands(MI) == 3 && |
8895 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 0)) && |
8896 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2 && |
8897 | 0 | MCOperand_isReg(MCInst_getOperand(MI, 1)) && |
8898 | 0 | GETREGCLASS_CONTAIN(PPC_CRBITRCRegClassID, 1) && |
8899 | 0 | MCOperand_isImm(MCInst_getOperand(MI, 2)) && |
8900 | 0 | MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { |
8901 | | // (gBCLRL 2, crbitrc:$bi, 0) |
8902 | 0 | AsmString = "bdzflrl $\x02"; |
8903 | 0 | break; |
8904 | 0 | } |
8905 | 0 | return NULL; |
8906 | 0 | } |
8907 | | |
8908 | 0 | tmp = cs_strdup(AsmString); |
8909 | 0 | AsmMnem = tmp; |
8910 | 0 | for(AsmOps = tmp; *AsmOps; AsmOps++) { |
8911 | 0 | if (*AsmOps == ' ' || *AsmOps == '\t') { |
8912 | 0 | *AsmOps = '\0'; |
8913 | 0 | AsmOps++; |
8914 | 0 | break; |
8915 | 0 | } |
8916 | 0 | } |
8917 | 0 | SStream_concat0(OS, AsmMnem); |
8918 | 0 | if (*AsmOps) { |
8919 | 0 | SStream_concat0(OS, "\t"); |
8920 | 0 | for (c = AsmOps; *c; c++) { |
8921 | 0 | if (*c == '$') { |
8922 | 0 | c += 1; |
8923 | 0 | if (*c == (char)0xff) { |
8924 | 0 | c += 1; |
8925 | 0 | OpIdx = *c - 1; |
8926 | 0 | c += 1; |
8927 | 0 | PrintMethodIdx = *c - 1; |
8928 | 0 | printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS); |
8929 | 0 | } else |
8930 | 0 | printOperand(MI, *c - 1, OS); |
8931 | 0 | } else { |
8932 | 0 | SStream_concat(OS, "%c", *c); |
8933 | 0 | } |
8934 | 0 | } |
8935 | 0 | } |
8936 | 0 | return tmp; |
8937 | 0 | } |
8938 | | |
8939 | | #endif // PRINT_ALIAS_INSTR |