Coverage Report

Created: 2025-07-20 06:54

/src/bloaty/third_party/capstone/arch/X86/X86Mapping.c
Line
Count
Source (jump to first uncovered line)
1
/* Capstone Disassembly Engine */
2
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
3
4
#ifdef CAPSTONE_HAS_X86
5
6
#if defined(CAPSTONE_HAS_OSXKERNEL)
7
#include <Availability.h>
8
#endif
9
10
#include <string.h>
11
#ifndef CAPSTONE_HAS_OSXKERNEL
12
#include <stdlib.h>
13
#else
14
#include "qsort.h"
15
#endif
16
17
#include "X86Mapping.h"
18
#include "X86DisassemblerDecoder.h"
19
20
#include "../../utils.h"
21
22
23
const uint64_t arch_masks[9] = {
24
  0, 0xff,
25
  0xffff,
26
  0,
27
  0xffffffff,
28
  0, 0, 0,
29
  0xffffffffffffffffLL
30
};
31
32
static const x86_reg sib_base_map[] = {
33
  X86_REG_INVALID,
34
#define ENTRY(x) X86_REG_##x,
35
  ALL_SIB_BASES
36
#undef ENTRY
37
};
38
39
// Fill-ins to make the compiler happy.  These constants are never actually
40
//   assigned; they are just filler to make an automatically-generated switch
41
//   statement work.
42
enum {
43
  X86_REG_BX_SI = 500,
44
  X86_REG_BX_DI = 501,
45
  X86_REG_BP_SI = 502,
46
  X86_REG_BP_DI = 503,
47
  X86_REG_sib   = 504,
48
  X86_REG_sib64 = 505
49
};
50
51
static const x86_reg sib_index_map[] = {
52
  X86_REG_INVALID,
53
#define ENTRY(x) X86_REG_##x,
54
  ALL_EA_BASES
55
  REGS_XMM
56
  REGS_YMM
57
  REGS_ZMM
58
#undef ENTRY
59
};
60
61
static const x86_reg segment_map[] = {
62
  X86_REG_INVALID,
63
  X86_REG_CS,
64
  X86_REG_SS,
65
  X86_REG_DS,
66
  X86_REG_ES,
67
  X86_REG_FS,
68
  X86_REG_GS,
69
};
70
71
x86_reg x86_map_sib_base(int r)
72
36.2M
{
73
36.2M
  return sib_base_map[r];
74
36.2M
}
75
76
x86_reg x86_map_sib_index(int r)
77
36.2M
{
78
36.2M
  return sib_index_map[r];
79
36.2M
}
80
81
x86_reg x86_map_segment(int r)
82
0
{
83
0
  return segment_map[r];
84
0
}
85
86
#ifndef CAPSTONE_DIET
87
static const name_map reg_name_maps[] = {
88
  { X86_REG_INVALID, NULL },
89
90
  { X86_REG_AH, "ah" },
91
  { X86_REG_AL, "al" },
92
  { X86_REG_AX, "ax" },
93
  { X86_REG_BH, "bh" },
94
  { X86_REG_BL, "bl" },
95
  { X86_REG_BP, "bp" },
96
  { X86_REG_BPL, "bpl" },
97
  { X86_REG_BX, "bx" },
98
  { X86_REG_CH, "ch" },
99
  { X86_REG_CL, "cl" },
100
  { X86_REG_CS, "cs" },
101
  { X86_REG_CX, "cx" },
102
  { X86_REG_DH, "dh" },
103
  { X86_REG_DI, "di" },
104
  { X86_REG_DIL, "dil" },
105
  { X86_REG_DL, "dl" },
106
  { X86_REG_DS, "ds" },
107
  { X86_REG_DX, "dx" },
108
  { X86_REG_EAX, "eax" },
109
  { X86_REG_EBP, "ebp" },
110
  { X86_REG_EBX, "ebx" },
111
  { X86_REG_ECX, "ecx" },
112
  { X86_REG_EDI, "edi" },
113
  { X86_REG_EDX, "edx" },
114
  { X86_REG_EFLAGS, "flags" },
115
  { X86_REG_EIP, "eip" },
116
  { X86_REG_EIZ, "eiz" },
117
  { X86_REG_ES, "es" },
118
  { X86_REG_ESI, "esi" },
119
  { X86_REG_ESP, "esp" },
120
  { X86_REG_FPSW, "fpsw" },
121
  { X86_REG_FS, "fs" },
122
  { X86_REG_GS, "gs" },
123
  { X86_REG_IP, "ip" },
124
  { X86_REG_RAX, "rax" },
125
  { X86_REG_RBP, "rbp" },
126
  { X86_REG_RBX, "rbx" },
127
  { X86_REG_RCX, "rcx" },
128
  { X86_REG_RDI, "rdi" },
129
  { X86_REG_RDX, "rdx" },
130
  { X86_REG_RIP, "rip" },
131
  { X86_REG_RIZ, "riz" },
132
  { X86_REG_RSI, "rsi" },
133
  { X86_REG_RSP, "rsp" },
134
  { X86_REG_SI, "si" },
135
  { X86_REG_SIL, "sil" },
136
  { X86_REG_SP, "sp" },
137
  { X86_REG_SPL, "spl" },
138
  { X86_REG_SS, "ss" },
139
  { X86_REG_CR0, "cr0" },
140
  { X86_REG_CR1, "cr1" },
141
  { X86_REG_CR2, "cr2" },
142
  { X86_REG_CR3, "cr3" },
143
  { X86_REG_CR4, "cr4" },
144
  { X86_REG_CR5, "cr5" },
145
  { X86_REG_CR6, "cr6" },
146
  { X86_REG_CR7, "cr7" },
147
  { X86_REG_CR8, "cr8" },
148
  { X86_REG_CR9, "cr9" },
149
  { X86_REG_CR10, "cr10" },
150
  { X86_REG_CR11, "cr11" },
151
  { X86_REG_CR12, "cr12" },
152
  { X86_REG_CR13, "cr13" },
153
  { X86_REG_CR14, "cr14" },
154
  { X86_REG_CR15, "cr15" },
155
  { X86_REG_DR0, "dr0" },
156
  { X86_REG_DR1, "dr1" },
157
  { X86_REG_DR2, "dr2" },
158
  { X86_REG_DR3, "dr3" },
159
  { X86_REG_DR4, "dr4" },
160
  { X86_REG_DR5, "dr5" },
161
  { X86_REG_DR6, "dr6" },
162
  { X86_REG_DR7, "dr7" },
163
  { X86_REG_DR8, "dr8" },
164
  { X86_REG_DR9, "dr9" },
165
  { X86_REG_DR10, "dr10" },
166
  { X86_REG_DR11, "dr11" },
167
  { X86_REG_DR12, "dr12" },
168
  { X86_REG_DR13, "dr13" },
169
  { X86_REG_DR14, "dr14" },
170
  { X86_REG_DR15, "dr15" },
171
  { X86_REG_FP0, "fp0" },
172
  { X86_REG_FP1, "fp1" },
173
  { X86_REG_FP2, "fp2" },
174
  { X86_REG_FP3, "fp3" },
175
  { X86_REG_FP4, "fp4" },
176
  { X86_REG_FP5, "fp5" },
177
  { X86_REG_FP6, "fp6" },
178
  { X86_REG_FP7, "fp7" },
179
  { X86_REG_K0, "k0" },
180
  { X86_REG_K1, "k1" },
181
  { X86_REG_K2, "k2" },
182
  { X86_REG_K3, "k3" },
183
  { X86_REG_K4, "k4" },
184
  { X86_REG_K5, "k5" },
185
  { X86_REG_K6, "k6" },
186
  { X86_REG_K7, "k7" },
187
  { X86_REG_MM0, "mm0" },
188
  { X86_REG_MM1, "mm1" },
189
  { X86_REG_MM2, "mm2" },
190
  { X86_REG_MM3, "mm3" },
191
  { X86_REG_MM4, "mm4" },
192
  { X86_REG_MM5, "mm5" },
193
  { X86_REG_MM6, "mm6" },
194
  { X86_REG_MM7, "mm7" },
195
  { X86_REG_R8, "r8" },
196
  { X86_REG_R9, "r9" },
197
  { X86_REG_R10, "r10" },
198
  { X86_REG_R11, "r11" },
199
  { X86_REG_R12, "r12" },
200
  { X86_REG_R13, "r13" },
201
  { X86_REG_R14, "r14" },
202
  { X86_REG_R15, "r15" },
203
  { X86_REG_ST0, "st(0)" },
204
  { X86_REG_ST1, "st(1)" },
205
  { X86_REG_ST2, "st(2)" },
206
  { X86_REG_ST3, "st(3)" },
207
  { X86_REG_ST4, "st(4)" },
208
  { X86_REG_ST5, "st(5)" },
209
  { X86_REG_ST6, "st(6)" },
210
  { X86_REG_ST7, "st(7)" },
211
  { X86_REG_XMM0, "xmm0" },
212
  { X86_REG_XMM1, "xmm1" },
213
  { X86_REG_XMM2, "xmm2" },
214
  { X86_REG_XMM3, "xmm3" },
215
  { X86_REG_XMM4, "xmm4" },
216
  { X86_REG_XMM5, "xmm5" },
217
  { X86_REG_XMM6, "xmm6" },
218
  { X86_REG_XMM7, "xmm7" },
219
  { X86_REG_XMM8, "xmm8" },
220
  { X86_REG_XMM9, "xmm9" },
221
  { X86_REG_XMM10, "xmm10" },
222
  { X86_REG_XMM11, "xmm11" },
223
  { X86_REG_XMM12, "xmm12" },
224
  { X86_REG_XMM13, "xmm13" },
225
  { X86_REG_XMM14, "xmm14" },
226
  { X86_REG_XMM15, "xmm15" },
227
  { X86_REG_XMM16, "xmm16" },
228
  { X86_REG_XMM17, "xmm17" },
229
  { X86_REG_XMM18, "xmm18" },
230
  { X86_REG_XMM19, "xmm19" },
231
  { X86_REG_XMM20, "xmm20" },
232
  { X86_REG_XMM21, "xmm21" },
233
  { X86_REG_XMM22, "xmm22" },
234
  { X86_REG_XMM23, "xmm23" },
235
  { X86_REG_XMM24, "xmm24" },
236
  { X86_REG_XMM25, "xmm25" },
237
  { X86_REG_XMM26, "xmm26" },
238
  { X86_REG_XMM27, "xmm27" },
239
  { X86_REG_XMM28, "xmm28" },
240
  { X86_REG_XMM29, "xmm29" },
241
  { X86_REG_XMM30, "xmm30" },
242
  { X86_REG_XMM31, "xmm31" },
243
  { X86_REG_YMM0, "ymm0" },
244
  { X86_REG_YMM1, "ymm1" },
245
  { X86_REG_YMM2, "ymm2" },
246
  { X86_REG_YMM3, "ymm3" },
247
  { X86_REG_YMM4, "ymm4" },
248
  { X86_REG_YMM5, "ymm5" },
249
  { X86_REG_YMM6, "ymm6" },
250
  { X86_REG_YMM7, "ymm7" },
251
  { X86_REG_YMM8, "ymm8" },
252
  { X86_REG_YMM9, "ymm9" },
253
  { X86_REG_YMM10, "ymm10" },
254
  { X86_REG_YMM11, "ymm11" },
255
  { X86_REG_YMM12, "ymm12" },
256
  { X86_REG_YMM13, "ymm13" },
257
  { X86_REG_YMM14, "ymm14" },
258
  { X86_REG_YMM15, "ymm15" },
259
  { X86_REG_YMM16, "ymm16" },
260
  { X86_REG_YMM17, "ymm17" },
261
  { X86_REG_YMM18, "ymm18" },
262
  { X86_REG_YMM19, "ymm19" },
263
  { X86_REG_YMM20, "ymm20" },
264
  { X86_REG_YMM21, "ymm21" },
265
  { X86_REG_YMM22, "ymm22" },
266
  { X86_REG_YMM23, "ymm23" },
267
  { X86_REG_YMM24, "ymm24" },
268
  { X86_REG_YMM25, "ymm25" },
269
  { X86_REG_YMM26, "ymm26" },
270
  { X86_REG_YMM27, "ymm27" },
271
  { X86_REG_YMM28, "ymm28" },
272
  { X86_REG_YMM29, "ymm29" },
273
  { X86_REG_YMM30, "ymm30" },
274
  { X86_REG_YMM31, "ymm31" },
275
  { X86_REG_ZMM0, "zmm0" },
276
  { X86_REG_ZMM1, "zmm1" },
277
  { X86_REG_ZMM2, "zmm2" },
278
  { X86_REG_ZMM3, "zmm3" },
279
  { X86_REG_ZMM4, "zmm4" },
280
  { X86_REG_ZMM5, "zmm5" },
281
  { X86_REG_ZMM6, "zmm6" },
282
  { X86_REG_ZMM7, "zmm7" },
283
  { X86_REG_ZMM8, "zmm8" },
284
  { X86_REG_ZMM9, "zmm9" },
285
  { X86_REG_ZMM10, "zmm10" },
286
  { X86_REG_ZMM11, "zmm11" },
287
  { X86_REG_ZMM12, "zmm12" },
288
  { X86_REG_ZMM13, "zmm13" },
289
  { X86_REG_ZMM14, "zmm14" },
290
  { X86_REG_ZMM15, "zmm15" },
291
  { X86_REG_ZMM16, "zmm16" },
292
  { X86_REG_ZMM17, "zmm17" },
293
  { X86_REG_ZMM18, "zmm18" },
294
  { X86_REG_ZMM19, "zmm19" },
295
  { X86_REG_ZMM20, "zmm20" },
296
  { X86_REG_ZMM21, "zmm21" },
297
  { X86_REG_ZMM22, "zmm22" },
298
  { X86_REG_ZMM23, "zmm23" },
299
  { X86_REG_ZMM24, "zmm24" },
300
  { X86_REG_ZMM25, "zmm25" },
301
  { X86_REG_ZMM26, "zmm26" },
302
  { X86_REG_ZMM27, "zmm27" },
303
  { X86_REG_ZMM28, "zmm28" },
304
  { X86_REG_ZMM29, "zmm29" },
305
  { X86_REG_ZMM30, "zmm30" },
306
  { X86_REG_ZMM31, "zmm31" },
307
  { X86_REG_R8B, "r8b" },
308
  { X86_REG_R9B, "r9b" },
309
  { X86_REG_R10B, "r10b" },
310
  { X86_REG_R11B, "r11b" },
311
  { X86_REG_R12B, "r12b" },
312
  { X86_REG_R13B, "r13b" },
313
  { X86_REG_R14B, "r14b" },
314
  { X86_REG_R15B, "r15b" },
315
  { X86_REG_R8D, "r8d" },
316
  { X86_REG_R9D, "r9d" },
317
  { X86_REG_R10D, "r10d" },
318
  { X86_REG_R11D, "r11d" },
319
  { X86_REG_R12D, "r12d" },
320
  { X86_REG_R13D, "r13d" },
321
  { X86_REG_R14D, "r14d" },
322
  { X86_REG_R15D, "r15d" },
323
  { X86_REG_R8W, "r8w" },
324
  { X86_REG_R9W, "r9w" },
325
  { X86_REG_R10W, "r10w" },
326
  { X86_REG_R11W, "r11w" },
327
  { X86_REG_R12W, "r12w" },
328
  { X86_REG_R13W, "r13w" },
329
  { X86_REG_R14W, "r14w" },
330
  { X86_REG_R15W, "r15w" },
331
};
332
#endif
333
334
// register size in non-64bit mode
335
const uint8_t regsize_map_32 [] = {
336
  0,  //  { X86_REG_INVALID, NULL },
337
  1,  // { X86_REG_AH, "ah" },
338
  1,  // { X86_REG_AL, "al" },
339
  2,  // { X86_REG_AX, "ax" },
340
  1,  // { X86_REG_BH, "bh" },
341
  1,  // { X86_REG_BL, "bl" },
342
  2,  // { X86_REG_BP, "bp" },
343
  1,  // { X86_REG_BPL, "bpl" },
344
  2,  // { X86_REG_BX, "bx" },
345
  1,  // { X86_REG_CH, "ch" },
346
  1,  // { X86_REG_CL, "cl" },
347
  2,  // { X86_REG_CS, "cs" },
348
  2,  // { X86_REG_CX, "cx" },
349
  1,  // { X86_REG_DH, "dh" },
350
  2,  // { X86_REG_DI, "di" },
351
  1,  // { X86_REG_DIL, "dil" },
352
  1,  // { X86_REG_DL, "dl" },
353
  2,  // { X86_REG_DS, "ds" },
354
  2,  // { X86_REG_DX, "dx" },
355
  4,  // { X86_REG_EAX, "eax" },
356
  4,  // { X86_REG_EBP, "ebp" },
357
  4,  // { X86_REG_EBX, "ebx" },
358
  4,  // { X86_REG_ECX, "ecx" },
359
  4,  // { X86_REG_EDI, "edi" },
360
  4,  // { X86_REG_EDX, "edx" },
361
  4,  // { X86_REG_EFLAGS, "flags" },
362
  4,  // { X86_REG_EIP, "eip" },
363
  4,  // { X86_REG_EIZ, "eiz" },
364
  2,  // { X86_REG_ES, "es" },
365
  4,  // { X86_REG_ESI, "esi" },
366
  4,  // { X86_REG_ESP, "esp" },
367
  10, // { X86_REG_FPSW, "fpsw" },
368
  2,  // { X86_REG_FS, "fs" },
369
  2,  // { X86_REG_GS, "gs" },
370
  2,  // { X86_REG_IP, "ip" },
371
  8,  // { X86_REG_RAX, "rax" },
372
  8,  // { X86_REG_RBP, "rbp" },
373
  8,  // { X86_REG_RBX, "rbx" },
374
  8,  // { X86_REG_RCX, "rcx" },
375
  8,  // { X86_REG_RDI, "rdi" },
376
  8,  // { X86_REG_RDX, "rdx" },
377
  8,  // { X86_REG_RIP, "rip" },
378
  8,  // { X86_REG_RIZ, "riz" },
379
  8,  // { X86_REG_RSI, "rsi" },
380
  8,  // { X86_REG_RSP, "rsp" },
381
  2,  // { X86_REG_SI, "si" },
382
  1,  // { X86_REG_SIL, "sil" },
383
  2,  // { X86_REG_SP, "sp" },
384
  1,  // { X86_REG_SPL, "spl" },
385
  2,  // { X86_REG_SS, "ss" },
386
  4,  // { X86_REG_CR0, "cr0" },
387
  4,  // { X86_REG_CR1, "cr1" },
388
  4,  // { X86_REG_CR2, "cr2" },
389
  4,  // { X86_REG_CR3, "cr3" },
390
  4,  // { X86_REG_CR4, "cr4" },
391
  8,  // { X86_REG_CR5, "cr5" },
392
  8,  // { X86_REG_CR6, "cr6" },
393
  8,  // { X86_REG_CR7, "cr7" },
394
  8,  // { X86_REG_CR8, "cr8" },
395
  8,  // { X86_REG_CR9, "cr9" },
396
  8,  // { X86_REG_CR10, "cr10" },
397
  8,  // { X86_REG_CR11, "cr11" },
398
  8,  // { X86_REG_CR12, "cr12" },
399
  8,  // { X86_REG_CR13, "cr13" },
400
  8,  // { X86_REG_CR14, "cr14" },
401
  8,  // { X86_REG_CR15, "cr15" },
402
  4,  // { X86_REG_DR0, "dr0" },
403
  4,  // { X86_REG_DR1, "dr1" },
404
  4,  // { X86_REG_DR2, "dr2" },
405
  4,  // { X86_REG_DR3, "dr3" },
406
  4,  // { X86_REG_DR4, "dr4" },
407
  4,  // { X86_REG_DR5, "dr5" },
408
  4,  // { X86_REG_DR6, "dr6" },
409
  4,  // { X86_REG_DR7, "dr7" },
410
  4,  // { X86_REG_DR8, "dr8" },
411
  4,  // { X86_REG_DR9, "dr9" },
412
  4,  // { X86_REG_DR10, "dr10" },
413
  4,  // { X86_REG_DR11, "dr11" },
414
  4,  // { X86_REG_DR12, "dr12" },
415
  4,  // { X86_REG_DR13, "dr13" },
416
  4,  // { X86_REG_DR14, "dr14" },
417
  4,  // { X86_REG_DR15, "dr15" },
418
  10, // { X86_REG_FP0, "fp0" },
419
  10, // { X86_REG_FP1, "fp1" },
420
  10, // { X86_REG_FP2, "fp2" },
421
  10, // { X86_REG_FP3, "fp3" },
422
  10, // { X86_REG_FP4, "fp4" },
423
  10, // { X86_REG_FP5, "fp5" },
424
  10, // { X86_REG_FP6, "fp6" },
425
  10, // { X86_REG_FP7, "fp7" },
426
  2,  // { X86_REG_K0, "k0" },
427
  2,  // { X86_REG_K1, "k1" },
428
  2,  // { X86_REG_K2, "k2" },
429
  2,  // { X86_REG_K3, "k3" },
430
  2,  // { X86_REG_K4, "k4" },
431
  2,  // { X86_REG_K5, "k5" },
432
  2,  // { X86_REG_K6, "k6" },
433
  2,  // { X86_REG_K7, "k7" },
434
  8,  // { X86_REG_MM0, "mm0" },
435
  8,  // { X86_REG_MM1, "mm1" },
436
  8,  // { X86_REG_MM2, "mm2" },
437
  8,  // { X86_REG_MM3, "mm3" },
438
  8,  // { X86_REG_MM4, "mm4" },
439
  8,  // { X86_REG_MM5, "mm5" },
440
  8,  // { X86_REG_MM6, "mm6" },
441
  8,  // { X86_REG_MM7, "mm7" },
442
  8,  // { X86_REG_R8, "r8" },
443
  8,  // { X86_REG_R9, "r9" },
444
  8,  // { X86_REG_R10, "r10" },
445
  8,  // { X86_REG_R11, "r11" },
446
  8,  // { X86_REG_R12, "r12" },
447
  8,  // { X86_REG_R13, "r13" },
448
  8,  // { X86_REG_R14, "r14" },
449
  8,  // { X86_REG_R15, "r15" },
450
  10, // { X86_REG_ST0, "st0" },
451
  10, // { X86_REG_ST1, "st1" },
452
  10, // { X86_REG_ST2, "st2" },
453
  10, // { X86_REG_ST3, "st3" },
454
  10, // { X86_REG_ST4, "st4" },
455
  10, // { X86_REG_ST5, "st5" },
456
  10, // { X86_REG_ST6, "st6" },
457
  10, // { X86_REG_ST7, "st7" },
458
  16, // { X86_REG_XMM0, "xmm0" },
459
  16, // { X86_REG_XMM1, "xmm1" },
460
  16, // { X86_REG_XMM2, "xmm2" },
461
  16, // { X86_REG_XMM3, "xmm3" },
462
  16, // { X86_REG_XMM4, "xmm4" },
463
  16, // { X86_REG_XMM5, "xmm5" },
464
  16, // { X86_REG_XMM6, "xmm6" },
465
  16, // { X86_REG_XMM7, "xmm7" },
466
  16, // { X86_REG_XMM8, "xmm8" },
467
  16, // { X86_REG_XMM9, "xmm9" },
468
  16, // { X86_REG_XMM10, "xmm10" },
469
  16, // { X86_REG_XMM11, "xmm11" },
470
  16, // { X86_REG_XMM12, "xmm12" },
471
  16, // { X86_REG_XMM13, "xmm13" },
472
  16, // { X86_REG_XMM14, "xmm14" },
473
  16, // { X86_REG_XMM15, "xmm15" },
474
  16, // { X86_REG_XMM16, "xmm16" },
475
  16, // { X86_REG_XMM17, "xmm17" },
476
  16, // { X86_REG_XMM18, "xmm18" },
477
  16, // { X86_REG_XMM19, "xmm19" },
478
  16, // { X86_REG_XMM20, "xmm20" },
479
  16, // { X86_REG_XMM21, "xmm21" },
480
  16, // { X86_REG_XMM22, "xmm22" },
481
  16, // { X86_REG_XMM23, "xmm23" },
482
  16, // { X86_REG_XMM24, "xmm24" },
483
  16, // { X86_REG_XMM25, "xmm25" },
484
  16, // { X86_REG_XMM26, "xmm26" },
485
  16, // { X86_REG_XMM27, "xmm27" },
486
  16, // { X86_REG_XMM28, "xmm28" },
487
  16, // { X86_REG_XMM29, "xmm29" },
488
  16, // { X86_REG_XMM30, "xmm30" },
489
  16, // { X86_REG_XMM31, "xmm31" },
490
  32, // { X86_REG_YMM0, "ymm0" },
491
  32, // { X86_REG_YMM1, "ymm1" },
492
  32, // { X86_REG_YMM2, "ymm2" },
493
  32, // { X86_REG_YMM3, "ymm3" },
494
  32, // { X86_REG_YMM4, "ymm4" },
495
  32, // { X86_REG_YMM5, "ymm5" },
496
  32, // { X86_REG_YMM6, "ymm6" },
497
  32, // { X86_REG_YMM7, "ymm7" },
498
  32, // { X86_REG_YMM8, "ymm8" },
499
  32, // { X86_REG_YMM9, "ymm9" },
500
  32, // { X86_REG_YMM10, "ymm10" },
501
  32, // { X86_REG_YMM11, "ymm11" },
502
  32, // { X86_REG_YMM12, "ymm12" },
503
  32, // { X86_REG_YMM13, "ymm13" },
504
  32, // { X86_REG_YMM14, "ymm14" },
505
  32, // { X86_REG_YMM15, "ymm15" },
506
  32, // { X86_REG_YMM16, "ymm16" },
507
  32, // { X86_REG_YMM17, "ymm17" },
508
  32, // { X86_REG_YMM18, "ymm18" },
509
  32, // { X86_REG_YMM19, "ymm19" },
510
  32, // { X86_REG_YMM20, "ymm20" },
511
  32, // { X86_REG_YMM21, "ymm21" },
512
  32, // { X86_REG_YMM22, "ymm22" },
513
  32, // { X86_REG_YMM23, "ymm23" },
514
  32, // { X86_REG_YMM24, "ymm24" },
515
  32, // { X86_REG_YMM25, "ymm25" },
516
  32, // { X86_REG_YMM26, "ymm26" },
517
  32, // { X86_REG_YMM27, "ymm27" },
518
  32, // { X86_REG_YMM28, "ymm28" },
519
  32, // { X86_REG_YMM29, "ymm29" },
520
  32, // { X86_REG_YMM30, "ymm30" },
521
  32, // { X86_REG_YMM31, "ymm31" },
522
  64, // { X86_REG_ZMM0, "zmm0" },
523
  64, // { X86_REG_ZMM1, "zmm1" },
524
  64, // { X86_REG_ZMM2, "zmm2" },
525
  64, // { X86_REG_ZMM3, "zmm3" },
526
  64, // { X86_REG_ZMM4, "zmm4" },
527
  64, // { X86_REG_ZMM5, "zmm5" },
528
  64, // { X86_REG_ZMM6, "zmm6" },
529
  64, // { X86_REG_ZMM7, "zmm7" },
530
  64, // { X86_REG_ZMM8, "zmm8" },
531
  64, // { X86_REG_ZMM9, "zmm9" },
532
  64, // { X86_REG_ZMM10, "zmm10" },
533
  64, // { X86_REG_ZMM11, "zmm11" },
534
  64, // { X86_REG_ZMM12, "zmm12" },
535
  64, // { X86_REG_ZMM13, "zmm13" },
536
  64, // { X86_REG_ZMM14, "zmm14" },
537
  64, // { X86_REG_ZMM15, "zmm15" },
538
  64, // { X86_REG_ZMM16, "zmm16" },
539
  64, // { X86_REG_ZMM17, "zmm17" },
540
  64, // { X86_REG_ZMM18, "zmm18" },
541
  64, // { X86_REG_ZMM19, "zmm19" },
542
  64, // { X86_REG_ZMM20, "zmm20" },
543
  64, // { X86_REG_ZMM21, "zmm21" },
544
  64, // { X86_REG_ZMM22, "zmm22" },
545
  64, // { X86_REG_ZMM23, "zmm23" },
546
  64, // { X86_REG_ZMM24, "zmm24" },
547
  64, // { X86_REG_ZMM25, "zmm25" },
548
  64, // { X86_REG_ZMM26, "zmm26" },
549
  64, // { X86_REG_ZMM27, "zmm27" },
550
  64, // { X86_REG_ZMM28, "zmm28" },
551
  64, // { X86_REG_ZMM29, "zmm29" },
552
  64, // { X86_REG_ZMM30, "zmm30" },
553
  64, // { X86_REG_ZMM31, "zmm31" },
554
  1,  // { X86_REG_R8B, "r8b" },
555
  1,  // { X86_REG_R9B, "r9b" },
556
  1,  // { X86_REG_R10B, "r10b" },
557
  1,  // { X86_REG_R11B, "r11b" },
558
  1,  // { X86_REG_R12B, "r12b" },
559
  1,  // { X86_REG_R13B, "r13b" },
560
  1,  // { X86_REG_R14B, "r14b" },
561
  1,  // { X86_REG_R15B, "r15b" },
562
  4,  // { X86_REG_R8D, "r8d" },
563
  4,  // { X86_REG_R9D, "r9d" },
564
  4,  // { X86_REG_R10D, "r10d" },
565
  4,  // { X86_REG_R11D, "r11d" },
566
  4,  // { X86_REG_R12D, "r12d" },
567
  4,  // { X86_REG_R13D, "r13d" },
568
  4,  // { X86_REG_R14D, "r14d" },
569
  4,  // { X86_REG_R15D, "r15d" },
570
  2,  // { X86_REG_R8W, "r8w" },
571
  2,  // { X86_REG_R9W, "r9w" },
572
  2,  // { X86_REG_R10W, "r10w" },
573
  2,  // { X86_REG_R11W, "r11w" },
574
  2,  // { X86_REG_R12W, "r12w" },
575
  2,  // { X86_REG_R13W, "r13w" },
576
  2,  // { X86_REG_R14W, "r14w" },
577
  2,  // { X86_REG_R15W, "r15w" },
578
};
579
580
// register size in 64bit mode
581
const uint8_t regsize_map_64 [] = {
582
  0,  //  { X86_REG_INVALID, NULL },
583
  1,  // { X86_REG_AH, "ah" },
584
  1,  // { X86_REG_AL, "al" },
585
  2,  // { X86_REG_AX, "ax" },
586
  1,  // { X86_REG_BH, "bh" },
587
  1,  // { X86_REG_BL, "bl" },
588
  2,  // { X86_REG_BP, "bp" },
589
  1,  // { X86_REG_BPL, "bpl" },
590
  2,  // { X86_REG_BX, "bx" },
591
  1,  // { X86_REG_CH, "ch" },
592
  1,  // { X86_REG_CL, "cl" },
593
  2,  // { X86_REG_CS, "cs" },
594
  2,  // { X86_REG_CX, "cx" },
595
  1,  // { X86_REG_DH, "dh" },
596
  2,  // { X86_REG_DI, "di" },
597
  1,  // { X86_REG_DIL, "dil" },
598
  1,  // { X86_REG_DL, "dl" },
599
  2,  // { X86_REG_DS, "ds" },
600
  2,  // { X86_REG_DX, "dx" },
601
  4,  // { X86_REG_EAX, "eax" },
602
  4,  // { X86_REG_EBP, "ebp" },
603
  4,  // { X86_REG_EBX, "ebx" },
604
  4,  // { X86_REG_ECX, "ecx" },
605
  4,  // { X86_REG_EDI, "edi" },
606
  4,  // { X86_REG_EDX, "edx" },
607
  8,  // { X86_REG_EFLAGS, "flags" },
608
  4,  // { X86_REG_EIP, "eip" },
609
  4,  // { X86_REG_EIZ, "eiz" },
610
  2,  // { X86_REG_ES, "es" },
611
  4,  // { X86_REG_ESI, "esi" },
612
  4,  // { X86_REG_ESP, "esp" },
613
  10, // { X86_REG_FPSW, "fpsw" },
614
  2,  // { X86_REG_FS, "fs" },
615
  2,  // { X86_REG_GS, "gs" },
616
  2,  // { X86_REG_IP, "ip" },
617
  8,  // { X86_REG_RAX, "rax" },
618
  8,  // { X86_REG_RBP, "rbp" },
619
  8,  // { X86_REG_RBX, "rbx" },
620
  8,  // { X86_REG_RCX, "rcx" },
621
  8,  // { X86_REG_RDI, "rdi" },
622
  8,  // { X86_REG_RDX, "rdx" },
623
  8,  // { X86_REG_RIP, "rip" },
624
  8,  // { X86_REG_RIZ, "riz" },
625
  8,  // { X86_REG_RSI, "rsi" },
626
  8,  // { X86_REG_RSP, "rsp" },
627
  2,  // { X86_REG_SI, "si" },
628
  1,  // { X86_REG_SIL, "sil" },
629
  2,  // { X86_REG_SP, "sp" },
630
  1,  // { X86_REG_SPL, "spl" },
631
  2,  // { X86_REG_SS, "ss" },
632
  8,  // { X86_REG_CR0, "cr0" },
633
  8,  // { X86_REG_CR1, "cr1" },
634
  8,  // { X86_REG_CR2, "cr2" },
635
  8,  // { X86_REG_CR3, "cr3" },
636
  8,  // { X86_REG_CR4, "cr4" },
637
  8,  // { X86_REG_CR5, "cr5" },
638
  8,  // { X86_REG_CR6, "cr6" },
639
  8,  // { X86_REG_CR7, "cr7" },
640
  8,  // { X86_REG_CR8, "cr8" },
641
  8,  // { X86_REG_CR9, "cr9" },
642
  8,  // { X86_REG_CR10, "cr10" },
643
  8,  // { X86_REG_CR11, "cr11" },
644
  8,  // { X86_REG_CR12, "cr12" },
645
  8,  // { X86_REG_CR13, "cr13" },
646
  8,  // { X86_REG_CR14, "cr14" },
647
  8,  // { X86_REG_CR15, "cr15" },
648
  8,  // { X86_REG_DR0, "dr0" },
649
  8,  // { X86_REG_DR1, "dr1" },
650
  8,  // { X86_REG_DR2, "dr2" },
651
  8,  // { X86_REG_DR3, "dr3" },
652
  8,  // { X86_REG_DR4, "dr4" },
653
  8,  // { X86_REG_DR5, "dr5" },
654
  8,  // { X86_REG_DR6, "dr6" },
655
  8,  // { X86_REG_DR7, "dr7" },
656
  8,  // { X86_REG_DR8, "dr8" },
657
  8,  // { X86_REG_DR9, "dr9" },
658
  8,  // { X86_REG_DR10, "dr10" },
659
  8,  // { X86_REG_DR11, "dr11" },
660
  8,  // { X86_REG_DR12, "dr12" },
661
  8,  // { X86_REG_DR13, "dr13" },
662
  8,  // { X86_REG_DR14, "dr14" },
663
  8,  // { X86_REG_DR15, "dr15" },
664
  10, // { X86_REG_FP0, "fp0" },
665
  10, // { X86_REG_FP1, "fp1" },
666
  10, // { X86_REG_FP2, "fp2" },
667
  10, // { X86_REG_FP3, "fp3" },
668
  10, // { X86_REG_FP4, "fp4" },
669
  10, // { X86_REG_FP5, "fp5" },
670
  10, // { X86_REG_FP6, "fp6" },
671
  10, // { X86_REG_FP7, "fp7" },
672
  2,  // { X86_REG_K0, "k0" },
673
  2,  // { X86_REG_K1, "k1" },
674
  2,  // { X86_REG_K2, "k2" },
675
  2,  // { X86_REG_K3, "k3" },
676
  2,  // { X86_REG_K4, "k4" },
677
  2,  // { X86_REG_K5, "k5" },
678
  2,  // { X86_REG_K6, "k6" },
679
  2,  // { X86_REG_K7, "k7" },
680
  8,  // { X86_REG_MM0, "mm0" },
681
  8,  // { X86_REG_MM1, "mm1" },
682
  8,  // { X86_REG_MM2, "mm2" },
683
  8,  // { X86_REG_MM3, "mm3" },
684
  8,  // { X86_REG_MM4, "mm4" },
685
  8,  // { X86_REG_MM5, "mm5" },
686
  8,  // { X86_REG_MM6, "mm6" },
687
  8,  // { X86_REG_MM7, "mm7" },
688
  8,  // { X86_REG_R8, "r8" },
689
  8,  // { X86_REG_R9, "r9" },
690
  8,  // { X86_REG_R10, "r10" },
691
  8,  // { X86_REG_R11, "r11" },
692
  8,  // { X86_REG_R12, "r12" },
693
  8,  // { X86_REG_R13, "r13" },
694
  8,  // { X86_REG_R14, "r14" },
695
  8,  // { X86_REG_R15, "r15" },
696
  10, // { X86_REG_ST0, "st0" },
697
  10, // { X86_REG_ST1, "st1" },
698
  10, // { X86_REG_ST2, "st2" },
699
  10, // { X86_REG_ST3, "st3" },
700
  10, // { X86_REG_ST4, "st4" },
701
  10, // { X86_REG_ST5, "st5" },
702
  10, // { X86_REG_ST6, "st6" },
703
  10, // { X86_REG_ST7, "st7" },
704
  16, // { X86_REG_XMM0, "xmm0" },
705
  16, // { X86_REG_XMM1, "xmm1" },
706
  16, // { X86_REG_XMM2, "xmm2" },
707
  16, // { X86_REG_XMM3, "xmm3" },
708
  16, // { X86_REG_XMM4, "xmm4" },
709
  16, // { X86_REG_XMM5, "xmm5" },
710
  16, // { X86_REG_XMM6, "xmm6" },
711
  16, // { X86_REG_XMM7, "xmm7" },
712
  16, // { X86_REG_XMM8, "xmm8" },
713
  16, // { X86_REG_XMM9, "xmm9" },
714
  16, // { X86_REG_XMM10, "xmm10" },
715
  16, // { X86_REG_XMM11, "xmm11" },
716
  16, // { X86_REG_XMM12, "xmm12" },
717
  16, // { X86_REG_XMM13, "xmm13" },
718
  16, // { X86_REG_XMM14, "xmm14" },
719
  16, // { X86_REG_XMM15, "xmm15" },
720
  16, // { X86_REG_XMM16, "xmm16" },
721
  16, // { X86_REG_XMM17, "xmm17" },
722
  16, // { X86_REG_XMM18, "xmm18" },
723
  16, // { X86_REG_XMM19, "xmm19" },
724
  16, // { X86_REG_XMM20, "xmm20" },
725
  16, // { X86_REG_XMM21, "xmm21" },
726
  16, // { X86_REG_XMM22, "xmm22" },
727
  16, // { X86_REG_XMM23, "xmm23" },
728
  16, // { X86_REG_XMM24, "xmm24" },
729
  16, // { X86_REG_XMM25, "xmm25" },
730
  16, // { X86_REG_XMM26, "xmm26" },
731
  16, // { X86_REG_XMM27, "xmm27" },
732
  16, // { X86_REG_XMM28, "xmm28" },
733
  16, // { X86_REG_XMM29, "xmm29" },
734
  16, // { X86_REG_XMM30, "xmm30" },
735
  16, // { X86_REG_XMM31, "xmm31" },
736
  32, // { X86_REG_YMM0, "ymm0" },
737
  32, // { X86_REG_YMM1, "ymm1" },
738
  32, // { X86_REG_YMM2, "ymm2" },
739
  32, // { X86_REG_YMM3, "ymm3" },
740
  32, // { X86_REG_YMM4, "ymm4" },
741
  32, // { X86_REG_YMM5, "ymm5" },
742
  32, // { X86_REG_YMM6, "ymm6" },
743
  32, // { X86_REG_YMM7, "ymm7" },
744
  32, // { X86_REG_YMM8, "ymm8" },
745
  32, // { X86_REG_YMM9, "ymm9" },
746
  32, // { X86_REG_YMM10, "ymm10" },
747
  32, // { X86_REG_YMM11, "ymm11" },
748
  32, // { X86_REG_YMM12, "ymm12" },
749
  32, // { X86_REG_YMM13, "ymm13" },
750
  32, // { X86_REG_YMM14, "ymm14" },
751
  32, // { X86_REG_YMM15, "ymm15" },
752
  32, // { X86_REG_YMM16, "ymm16" },
753
  32, // { X86_REG_YMM17, "ymm17" },
754
  32, // { X86_REG_YMM18, "ymm18" },
755
  32, // { X86_REG_YMM19, "ymm19" },
756
  32, // { X86_REG_YMM20, "ymm20" },
757
  32, // { X86_REG_YMM21, "ymm21" },
758
  32, // { X86_REG_YMM22, "ymm22" },
759
  32, // { X86_REG_YMM23, "ymm23" },
760
  32, // { X86_REG_YMM24, "ymm24" },
761
  32, // { X86_REG_YMM25, "ymm25" },
762
  32, // { X86_REG_YMM26, "ymm26" },
763
  32, // { X86_REG_YMM27, "ymm27" },
764
  32, // { X86_REG_YMM28, "ymm28" },
765
  32, // { X86_REG_YMM29, "ymm29" },
766
  32, // { X86_REG_YMM30, "ymm30" },
767
  32, // { X86_REG_YMM31, "ymm31" },
768
  64, // { X86_REG_ZMM0, "zmm0" },
769
  64, // { X86_REG_ZMM1, "zmm1" },
770
  64, // { X86_REG_ZMM2, "zmm2" },
771
  64, // { X86_REG_ZMM3, "zmm3" },
772
  64, // { X86_REG_ZMM4, "zmm4" },
773
  64, // { X86_REG_ZMM5, "zmm5" },
774
  64, // { X86_REG_ZMM6, "zmm6" },
775
  64, // { X86_REG_ZMM7, "zmm7" },
776
  64, // { X86_REG_ZMM8, "zmm8" },
777
  64, // { X86_REG_ZMM9, "zmm9" },
778
  64, // { X86_REG_ZMM10, "zmm10" },
779
  64, // { X86_REG_ZMM11, "zmm11" },
780
  64, // { X86_REG_ZMM12, "zmm12" },
781
  64, // { X86_REG_ZMM13, "zmm13" },
782
  64, // { X86_REG_ZMM14, "zmm14" },
783
  64, // { X86_REG_ZMM15, "zmm15" },
784
  64, // { X86_REG_ZMM16, "zmm16" },
785
  64, // { X86_REG_ZMM17, "zmm17" },
786
  64, // { X86_REG_ZMM18, "zmm18" },
787
  64, // { X86_REG_ZMM19, "zmm19" },
788
  64, // { X86_REG_ZMM20, "zmm20" },
789
  64, // { X86_REG_ZMM21, "zmm21" },
790
  64, // { X86_REG_ZMM22, "zmm22" },
791
  64, // { X86_REG_ZMM23, "zmm23" },
792
  64, // { X86_REG_ZMM24, "zmm24" },
793
  64, // { X86_REG_ZMM25, "zmm25" },
794
  64, // { X86_REG_ZMM26, "zmm26" },
795
  64, // { X86_REG_ZMM27, "zmm27" },
796
  64, // { X86_REG_ZMM28, "zmm28" },
797
  64, // { X86_REG_ZMM29, "zmm29" },
798
  64, // { X86_REG_ZMM30, "zmm30" },
799
  64, // { X86_REG_ZMM31, "zmm31" },
800
  1,  // { X86_REG_R8B, "r8b" },
801
  1,  // { X86_REG_R9B, "r9b" },
802
  1,  // { X86_REG_R10B, "r10b" },
803
  1,  // { X86_REG_R11B, "r11b" },
804
  1,  // { X86_REG_R12B, "r12b" },
805
  1,  // { X86_REG_R13B, "r13b" },
806
  1,  // { X86_REG_R14B, "r14b" },
807
  1,  // { X86_REG_R15B, "r15b" },
808
  4,  // { X86_REG_R8D, "r8d" },
809
  4,  // { X86_REG_R9D, "r9d" },
810
  4,  // { X86_REG_R10D, "r10d" },
811
  4,  // { X86_REG_R11D, "r11d" },
812
  4,  // { X86_REG_R12D, "r12d" },
813
  4,  // { X86_REG_R13D, "r13d" },
814
  4,  // { X86_REG_R14D, "r14d" },
815
  4,  // { X86_REG_R15D, "r15d" },
816
  2,  // { X86_REG_R8W, "r8w" },
817
  2,  // { X86_REG_R9W, "r9w" },
818
  2,  // { X86_REG_R10W, "r10w" },
819
  2,  // { X86_REG_R11W, "r11w" },
820
  2,  // { X86_REG_R12W, "r12w" },
821
  2,  // { X86_REG_R13W, "r13w" },
822
  2,  // { X86_REG_R14W, "r14w" },
823
  2,  // { X86_REG_R15W, "r15w" },
824
};
825
826
const char *X86_reg_name(csh handle, unsigned int reg)
827
0
{
828
0
#ifndef CAPSTONE_DIET
829
0
  cs_struct *ud = (cs_struct *)handle;
830
831
0
  if (reg >= ARR_SIZE(reg_name_maps))
832
0
    return NULL;
833
834
0
  if (reg == X86_REG_EFLAGS) {
835
0
    if (ud->mode & CS_MODE_32)
836
0
      return "eflags";
837
0
    if (ud->mode & CS_MODE_64)
838
0
      return "rflags";
839
0
  }
840
841
0
  return reg_name_maps[reg].name;
842
#else
843
  return NULL;
844
#endif
845
0
}
846
847
#ifndef CAPSTONE_DIET
848
static const name_map insn_name_maps[] = {
849
  { X86_INS_INVALID, NULL },
850
851
  { X86_INS_AAA, "aaa" },
852
  { X86_INS_AAD, "aad" },
853
  { X86_INS_AAM, "aam" },
854
  { X86_INS_AAS, "aas" },
855
  { X86_INS_FABS, "fabs" },
856
  { X86_INS_ADC, "adc" },
857
  { X86_INS_ADCX, "adcx" },
858
  { X86_INS_ADD, "add" },
859
  { X86_INS_ADDPD, "addpd" },
860
  { X86_INS_ADDPS, "addps" },
861
  { X86_INS_ADDSD, "addsd" },
862
  { X86_INS_ADDSS, "addss" },
863
  { X86_INS_ADDSUBPD, "addsubpd" },
864
  { X86_INS_ADDSUBPS, "addsubps" },
865
  { X86_INS_FADD, "fadd" },
866
  { X86_INS_FIADD, "fiadd" },
867
  { X86_INS_FADDP, "faddp" },
868
  { X86_INS_ADOX, "adox" },
869
  { X86_INS_AESDECLAST, "aesdeclast" },
870
  { X86_INS_AESDEC, "aesdec" },
871
  { X86_INS_AESENCLAST, "aesenclast" },
872
  { X86_INS_AESENC, "aesenc" },
873
  { X86_INS_AESIMC, "aesimc" },
874
  { X86_INS_AESKEYGENASSIST, "aeskeygenassist" },
875
  { X86_INS_AND, "and" },
876
  { X86_INS_ANDN, "andn" },
877
  { X86_INS_ANDNPD, "andnpd" },
878
  { X86_INS_ANDNPS, "andnps" },
879
  { X86_INS_ANDPD, "andpd" },
880
  { X86_INS_ANDPS, "andps" },
881
  { X86_INS_ARPL, "arpl" },
882
  { X86_INS_BEXTR, "bextr" },
883
  { X86_INS_BLCFILL, "blcfill" },
884
  { X86_INS_BLCI, "blci" },
885
  { X86_INS_BLCIC, "blcic" },
886
  { X86_INS_BLCMSK, "blcmsk" },
887
  { X86_INS_BLCS, "blcs" },
888
  { X86_INS_BLENDPD, "blendpd" },
889
  { X86_INS_BLENDPS, "blendps" },
890
  { X86_INS_BLENDVPD, "blendvpd" },
891
  { X86_INS_BLENDVPS, "blendvps" },
892
  { X86_INS_BLSFILL, "blsfill" },
893
  { X86_INS_BLSI, "blsi" },
894
  { X86_INS_BLSIC, "blsic" },
895
  { X86_INS_BLSMSK, "blsmsk" },
896
  { X86_INS_BLSR, "blsr" },
897
  { X86_INS_BOUND, "bound" },
898
  { X86_INS_BSF, "bsf" },
899
  { X86_INS_BSR, "bsr" },
900
  { X86_INS_BSWAP, "bswap" },
901
  { X86_INS_BT, "bt" },
902
  { X86_INS_BTC, "btc" },
903
  { X86_INS_BTR, "btr" },
904
  { X86_INS_BTS, "bts" },
905
  { X86_INS_BZHI, "bzhi" },
906
  { X86_INS_CALL, "call" },
907
  { X86_INS_CBW, "cbw" },
908
  { X86_INS_CDQ, "cdq" },
909
  { X86_INS_CDQE, "cdqe" },
910
  { X86_INS_FCHS, "fchs" },
911
  { X86_INS_CLAC, "clac" },
912
  { X86_INS_CLC, "clc" },
913
  { X86_INS_CLD, "cld" },
914
  { X86_INS_CLFLUSH, "clflush" },
915
  { X86_INS_CLFLUSHOPT, "clflushopt" },
916
  { X86_INS_CLGI, "clgi" },
917
  { X86_INS_CLI, "cli" },
918
  { X86_INS_CLTS, "clts" },
919
  { X86_INS_CLWB, "clwb" },
920
  { X86_INS_CMC, "cmc" },
921
  { X86_INS_CMOVA, "cmova" },
922
  { X86_INS_CMOVAE, "cmovae" },
923
  { X86_INS_CMOVB, "cmovb" },
924
  { X86_INS_CMOVBE, "cmovbe" },
925
  { X86_INS_FCMOVBE, "fcmovbe" },
926
  { X86_INS_FCMOVB, "fcmovb" },
927
  { X86_INS_CMOVE, "cmove" },
928
  { X86_INS_FCMOVE, "fcmove" },
929
  { X86_INS_CMOVG, "cmovg" },
930
  { X86_INS_CMOVGE, "cmovge" },
931
  { X86_INS_CMOVL, "cmovl" },
932
  { X86_INS_CMOVLE, "cmovle" },
933
  { X86_INS_FCMOVNBE, "fcmovnbe" },
934
  { X86_INS_FCMOVNB, "fcmovnb" },
935
  { X86_INS_CMOVNE, "cmovne" },
936
  { X86_INS_FCMOVNE, "fcmovne" },
937
  { X86_INS_CMOVNO, "cmovno" },
938
  { X86_INS_CMOVNP, "cmovnp" },
939
  { X86_INS_FCMOVNU, "fcmovnu" },
940
  { X86_INS_CMOVNS, "cmovns" },
941
  { X86_INS_CMOVO, "cmovo" },
942
  { X86_INS_CMOVP, "cmovp" },
943
  { X86_INS_FCMOVU, "fcmovu" },
944
  { X86_INS_CMOVS, "cmovs" },
945
  { X86_INS_CMP, "cmp" },
946
  { X86_INS_CMPSB, "cmpsb" },
947
  { X86_INS_CMPSQ, "cmpsq" },
948
  { X86_INS_CMPSW, "cmpsw" },
949
  { X86_INS_CMPXCHG16B, "cmpxchg16b" },
950
  { X86_INS_CMPXCHG, "cmpxchg" },
951
  { X86_INS_CMPXCHG8B, "cmpxchg8b" },
952
  { X86_INS_COMISD, "comisd" },
953
  { X86_INS_COMISS, "comiss" },
954
  { X86_INS_FCOMP, "fcomp" },
955
  { X86_INS_FCOMIP, "fcomip" },
956
  { X86_INS_FCOMI, "fcomi" },
957
  { X86_INS_FCOM, "fcom" },
958
  { X86_INS_FCOS, "fcos" },
959
  { X86_INS_CPUID, "cpuid" },
960
  { X86_INS_CQO, "cqo" },
961
  { X86_INS_CRC32, "crc32" },
962
  { X86_INS_CVTDQ2PD, "cvtdq2pd" },
963
  { X86_INS_CVTDQ2PS, "cvtdq2ps" },
964
  { X86_INS_CVTPD2DQ, "cvtpd2dq" },
965
  { X86_INS_CVTPD2PS, "cvtpd2ps" },
966
  { X86_INS_CVTPS2DQ, "cvtps2dq" },
967
  { X86_INS_CVTPS2PD, "cvtps2pd" },
968
  { X86_INS_CVTSD2SI, "cvtsd2si" },
969
  { X86_INS_CVTSD2SS, "cvtsd2ss" },
970
  { X86_INS_CVTSI2SD, "cvtsi2sd" },
971
  { X86_INS_CVTSI2SS, "cvtsi2ss" },
972
  { X86_INS_CVTSS2SD, "cvtss2sd" },
973
  { X86_INS_CVTSS2SI, "cvtss2si" },
974
  { X86_INS_CVTTPD2DQ, "cvttpd2dq" },
975
  { X86_INS_CVTTPS2DQ, "cvttps2dq" },
976
  { X86_INS_CVTTSD2SI, "cvttsd2si" },
977
  { X86_INS_CVTTSS2SI, "cvttss2si" },
978
  { X86_INS_CWD, "cwd" },
979
  { X86_INS_CWDE, "cwde" },
980
  { X86_INS_DAA, "daa" },
981
  { X86_INS_DAS, "das" },
982
  { X86_INS_DATA16, "data16" },
983
  { X86_INS_DEC, "dec" },
984
  { X86_INS_DIV, "div" },
985
  { X86_INS_DIVPD, "divpd" },
986
  { X86_INS_DIVPS, "divps" },
987
  { X86_INS_FDIVR, "fdivr" },
988
  { X86_INS_FIDIVR, "fidivr" },
989
  { X86_INS_FDIVRP, "fdivrp" },
990
  { X86_INS_DIVSD, "divsd" },
991
  { X86_INS_DIVSS, "divss" },
992
  { X86_INS_FDIV, "fdiv" },
993
  { X86_INS_FIDIV, "fidiv" },
994
  { X86_INS_FDIVP, "fdivp" },
995
  { X86_INS_DPPD, "dppd" },
996
  { X86_INS_DPPS, "dpps" },
997
  { X86_INS_RET, "ret" },
998
  { X86_INS_ENCLS, "encls" },
999
  { X86_INS_ENCLU, "enclu" },
1000
  { X86_INS_ENTER, "enter" },
1001
  { X86_INS_EXTRACTPS, "extractps" },
1002
  { X86_INS_EXTRQ, "extrq" },
1003
  { X86_INS_F2XM1, "f2xm1" },
1004
  { X86_INS_LCALL, "lcall" },
1005
  { X86_INS_LJMP, "ljmp" },
1006
  { X86_INS_FBLD, "fbld" },
1007
  { X86_INS_FBSTP, "fbstp" },
1008
  { X86_INS_FCOMPP, "fcompp" },
1009
  { X86_INS_FDECSTP, "fdecstp" },
1010
  { X86_INS_FEMMS, "femms" },
1011
  { X86_INS_FFREE, "ffree" },
1012
  { X86_INS_FICOM, "ficom" },
1013
  { X86_INS_FICOMP, "ficomp" },
1014
  { X86_INS_FINCSTP, "fincstp" },
1015
  { X86_INS_FLDCW, "fldcw" },
1016
  { X86_INS_FLDENV, "fldenv" },
1017
  { X86_INS_FLDL2E, "fldl2e" },
1018
  { X86_INS_FLDL2T, "fldl2t" },
1019
  { X86_INS_FLDLG2, "fldlg2" },
1020
  { X86_INS_FLDLN2, "fldln2" },
1021
  { X86_INS_FLDPI, "fldpi" },
1022
  { X86_INS_FNCLEX, "fnclex" },
1023
  { X86_INS_FNINIT, "fninit" },
1024
  { X86_INS_FNOP, "fnop" },
1025
  { X86_INS_FNSTCW, "fnstcw" },
1026
  { X86_INS_FNSTSW, "fnstsw" },
1027
  { X86_INS_FPATAN, "fpatan" },
1028
  { X86_INS_FPREM, "fprem" },
1029
  { X86_INS_FPREM1, "fprem1" },
1030
  { X86_INS_FPTAN, "fptan" },
1031
  { X86_INS_FFREEP, "ffreep" },
1032
  { X86_INS_FRNDINT, "frndint" },
1033
  { X86_INS_FRSTOR, "frstor" },
1034
  { X86_INS_FNSAVE, "fnsave" },
1035
  { X86_INS_FSCALE, "fscale" },
1036
  { X86_INS_FSETPM, "fsetpm" },
1037
  { X86_INS_FSINCOS, "fsincos" },
1038
  { X86_INS_FNSTENV, "fnstenv" },
1039
  { X86_INS_FXAM, "fxam" },
1040
  { X86_INS_FXRSTOR, "fxrstor" },
1041
  { X86_INS_FXRSTOR64, "fxrstor64" },
1042
  { X86_INS_FXSAVE, "fxsave" },
1043
  { X86_INS_FXSAVE64, "fxsave64" },
1044
  { X86_INS_FXTRACT, "fxtract" },
1045
  { X86_INS_FYL2X, "fyl2x" },
1046
  { X86_INS_FYL2XP1, "fyl2xp1" },
1047
  { X86_INS_MOVAPD, "movapd" },
1048
  { X86_INS_MOVAPS, "movaps" },
1049
  { X86_INS_ORPD, "orpd" },
1050
  { X86_INS_ORPS, "orps" },
1051
  { X86_INS_VMOVAPD, "vmovapd" },
1052
  { X86_INS_VMOVAPS, "vmovaps" },
1053
  { X86_INS_XORPD, "xorpd" },
1054
  { X86_INS_XORPS, "xorps" },
1055
  { X86_INS_GETSEC, "getsec" },
1056
  { X86_INS_HADDPD, "haddpd" },
1057
  { X86_INS_HADDPS, "haddps" },
1058
  { X86_INS_HLT, "hlt" },
1059
  { X86_INS_HSUBPD, "hsubpd" },
1060
  { X86_INS_HSUBPS, "hsubps" },
1061
  { X86_INS_IDIV, "idiv" },
1062
  { X86_INS_FILD, "fild" },
1063
  { X86_INS_IMUL, "imul" },
1064
  { X86_INS_IN, "in" },
1065
  { X86_INS_INC, "inc" },
1066
  { X86_INS_INSB, "insb" },
1067
  { X86_INS_INSERTPS, "insertps" },
1068
  { X86_INS_INSERTQ, "insertq" },
1069
  { X86_INS_INSD, "insd" },
1070
  { X86_INS_INSW, "insw" },
1071
  { X86_INS_INT, "int" },
1072
  { X86_INS_INT1, "int1" },
1073
  { X86_INS_INT3, "int3" },
1074
  { X86_INS_INTO, "into" },
1075
  { X86_INS_INVD, "invd" },
1076
  { X86_INS_INVEPT, "invept" },
1077
  { X86_INS_INVLPG, "invlpg" },
1078
  { X86_INS_INVLPGA, "invlpga" },
1079
  { X86_INS_INVPCID, "invpcid" },
1080
  { X86_INS_INVVPID, "invvpid" },
1081
  { X86_INS_IRET, "iret" },
1082
  { X86_INS_IRETD, "iretd" },
1083
  { X86_INS_IRETQ, "iretq" },
1084
  { X86_INS_FISTTP, "fisttp" },
1085
  { X86_INS_FIST, "fist" },
1086
  { X86_INS_FISTP, "fistp" },
1087
  { X86_INS_UCOMISD, "ucomisd" },
1088
  { X86_INS_UCOMISS, "ucomiss" },
1089
  { X86_INS_VCOMISD, "vcomisd" },
1090
  { X86_INS_VCOMISS, "vcomiss" },
1091
  { X86_INS_VCVTSD2SS, "vcvtsd2ss" },
1092
  { X86_INS_VCVTSI2SD, "vcvtsi2sd" },
1093
  { X86_INS_VCVTSI2SS, "vcvtsi2ss" },
1094
  { X86_INS_VCVTSS2SD, "vcvtss2sd" },
1095
  { X86_INS_VCVTTSD2SI, "vcvttsd2si" },
1096
  { X86_INS_VCVTTSD2USI, "vcvttsd2usi" },
1097
  { X86_INS_VCVTTSS2SI, "vcvttss2si" },
1098
  { X86_INS_VCVTTSS2USI, "vcvttss2usi" },
1099
  { X86_INS_VCVTUSI2SD, "vcvtusi2sd" },
1100
  { X86_INS_VCVTUSI2SS, "vcvtusi2ss" },
1101
  { X86_INS_VUCOMISD, "vucomisd" },
1102
  { X86_INS_VUCOMISS, "vucomiss" },
1103
  { X86_INS_JAE, "jae" },
1104
  { X86_INS_JA, "ja" },
1105
  { X86_INS_JBE, "jbe" },
1106
  { X86_INS_JB, "jb" },
1107
  { X86_INS_JCXZ, "jcxz" },
1108
  { X86_INS_JECXZ, "jecxz" },
1109
  { X86_INS_JE, "je" },
1110
  { X86_INS_JGE, "jge" },
1111
  { X86_INS_JG, "jg" },
1112
  { X86_INS_JLE, "jle" },
1113
  { X86_INS_JL, "jl" },
1114
  { X86_INS_JMP, "jmp" },
1115
  { X86_INS_JNE, "jne" },
1116
  { X86_INS_JNO, "jno" },
1117
  { X86_INS_JNP, "jnp" },
1118
  { X86_INS_JNS, "jns" },
1119
  { X86_INS_JO, "jo" },
1120
  { X86_INS_JP, "jp" },
1121
  { X86_INS_JRCXZ, "jrcxz" },
1122
  { X86_INS_JS, "js" },
1123
  { X86_INS_KANDB, "kandb" },
1124
  { X86_INS_KANDD, "kandd" },
1125
  { X86_INS_KANDNB, "kandnb" },
1126
  { X86_INS_KANDND, "kandnd" },
1127
  { X86_INS_KANDNQ, "kandnq" },
1128
  { X86_INS_KANDNW, "kandnw" },
1129
  { X86_INS_KANDQ, "kandq" },
1130
  { X86_INS_KANDW, "kandw" },
1131
  { X86_INS_KMOVB, "kmovb" },
1132
  { X86_INS_KMOVD, "kmovd" },
1133
  { X86_INS_KMOVQ, "kmovq" },
1134
  { X86_INS_KMOVW, "kmovw" },
1135
  { X86_INS_KNOTB, "knotb" },
1136
  { X86_INS_KNOTD, "knotd" },
1137
  { X86_INS_KNOTQ, "knotq" },
1138
  { X86_INS_KNOTW, "knotw" },
1139
  { X86_INS_KORB, "korb" },
1140
  { X86_INS_KORD, "kord" },
1141
  { X86_INS_KORQ, "korq" },
1142
  { X86_INS_KORTESTB, "kortestb" },
1143
  { X86_INS_KORTESTD, "kortestd" },
1144
  { X86_INS_KORTESTQ, "kortestq" },
1145
  { X86_INS_KORTESTW, "kortestw" },
1146
  { X86_INS_KORW, "korw" },
1147
  { X86_INS_KSHIFTLB, "kshiftlb" },
1148
  { X86_INS_KSHIFTLD, "kshiftld" },
1149
  { X86_INS_KSHIFTLQ, "kshiftlq" },
1150
  { X86_INS_KSHIFTLW, "kshiftlw" },
1151
  { X86_INS_KSHIFTRB, "kshiftrb" },
1152
  { X86_INS_KSHIFTRD, "kshiftrd" },
1153
  { X86_INS_KSHIFTRQ, "kshiftrq" },
1154
  { X86_INS_KSHIFTRW, "kshiftrw" },
1155
  { X86_INS_KUNPCKBW, "kunpckbw" },
1156
  { X86_INS_KXNORB, "kxnorb" },
1157
  { X86_INS_KXNORD, "kxnord" },
1158
  { X86_INS_KXNORQ, "kxnorq" },
1159
  { X86_INS_KXNORW, "kxnorw" },
1160
  { X86_INS_KXORB, "kxorb" },
1161
  { X86_INS_KXORD, "kxord" },
1162
  { X86_INS_KXORQ, "kxorq" },
1163
  { X86_INS_KXORW, "kxorw" },
1164
  { X86_INS_LAHF, "lahf" },
1165
  { X86_INS_LAR, "lar" },
1166
  { X86_INS_LDDQU, "lddqu" },
1167
  { X86_INS_LDMXCSR, "ldmxcsr" },
1168
  { X86_INS_LDS, "lds" },
1169
  { X86_INS_FLDZ, "fldz" },
1170
  { X86_INS_FLD1, "fld1" },
1171
  { X86_INS_FLD, "fld" },
1172
  { X86_INS_LEA, "lea" },
1173
  { X86_INS_LEAVE, "leave" },
1174
  { X86_INS_LES, "les" },
1175
  { X86_INS_LFENCE, "lfence" },
1176
  { X86_INS_LFS, "lfs" },
1177
  { X86_INS_LGDT, "lgdt" },
1178
  { X86_INS_LGS, "lgs" },
1179
  { X86_INS_LIDT, "lidt" },
1180
  { X86_INS_LLDT, "lldt" },
1181
  { X86_INS_LMSW, "lmsw" },
1182
  { X86_INS_OR, "or" },
1183
  { X86_INS_SUB, "sub" },
1184
  { X86_INS_XOR, "xor" },
1185
  { X86_INS_LODSB, "lodsb" },
1186
  { X86_INS_LODSD, "lodsd" },
1187
  { X86_INS_LODSQ, "lodsq" },
1188
  { X86_INS_LODSW, "lodsw" },
1189
  { X86_INS_LOOP, "loop" },
1190
  { X86_INS_LOOPE, "loope" },
1191
  { X86_INS_LOOPNE, "loopne" },
1192
  { X86_INS_RETF, "retf" },
1193
  { X86_INS_RETFQ, "retfq" },
1194
  { X86_INS_LSL, "lsl" },
1195
  { X86_INS_LSS, "lss" },
1196
  { X86_INS_LTR, "ltr" },
1197
  { X86_INS_XADD, "xadd" },
1198
  { X86_INS_LZCNT, "lzcnt" },
1199
  { X86_INS_MASKMOVDQU, "maskmovdqu" },
1200
  { X86_INS_MAXPD, "maxpd" },
1201
  { X86_INS_MAXPS, "maxps" },
1202
  { X86_INS_MAXSD, "maxsd" },
1203
  { X86_INS_MAXSS, "maxss" },
1204
  { X86_INS_MFENCE, "mfence" },
1205
  { X86_INS_MINPD, "minpd" },
1206
  { X86_INS_MINPS, "minps" },
1207
  { X86_INS_MINSD, "minsd" },
1208
  { X86_INS_MINSS, "minss" },
1209
  { X86_INS_CVTPD2PI, "cvtpd2pi" },
1210
  { X86_INS_CVTPI2PD, "cvtpi2pd" },
1211
  { X86_INS_CVTPI2PS, "cvtpi2ps" },
1212
  { X86_INS_CVTPS2PI, "cvtps2pi" },
1213
  { X86_INS_CVTTPD2PI, "cvttpd2pi" },
1214
  { X86_INS_CVTTPS2PI, "cvttps2pi" },
1215
  { X86_INS_EMMS, "emms" },
1216
  { X86_INS_MASKMOVQ, "maskmovq" },
1217
  { X86_INS_MOVD, "movd" },
1218
  { X86_INS_MOVDQ2Q, "movdq2q" },
1219
  { X86_INS_MOVNTQ, "movntq" },
1220
  { X86_INS_MOVQ2DQ, "movq2dq" },
1221
  { X86_INS_MOVQ, "movq" },
1222
  { X86_INS_PABSB, "pabsb" },
1223
  { X86_INS_PABSD, "pabsd" },
1224
  { X86_INS_PABSW, "pabsw" },
1225
  { X86_INS_PACKSSDW, "packssdw" },
1226
  { X86_INS_PACKSSWB, "packsswb" },
1227
  { X86_INS_PACKUSWB, "packuswb" },
1228
  { X86_INS_PADDB, "paddb" },
1229
  { X86_INS_PADDD, "paddd" },
1230
  { X86_INS_PADDQ, "paddq" },
1231
  { X86_INS_PADDSB, "paddsb" },
1232
  { X86_INS_PADDSW, "paddsw" },
1233
  { X86_INS_PADDUSB, "paddusb" },
1234
  { X86_INS_PADDUSW, "paddusw" },
1235
  { X86_INS_PADDW, "paddw" },
1236
  { X86_INS_PALIGNR, "palignr" },
1237
  { X86_INS_PANDN, "pandn" },
1238
  { X86_INS_PAND, "pand" },
1239
  { X86_INS_PAVGB, "pavgb" },
1240
  { X86_INS_PAVGW, "pavgw" },
1241
  { X86_INS_PCMPEQB, "pcmpeqb" },
1242
  { X86_INS_PCMPEQD, "pcmpeqd" },
1243
  { X86_INS_PCMPEQW, "pcmpeqw" },
1244
  { X86_INS_PCMPGTB, "pcmpgtb" },
1245
  { X86_INS_PCMPGTD, "pcmpgtd" },
1246
  { X86_INS_PCMPGTW, "pcmpgtw" },
1247
  { X86_INS_PEXTRW, "pextrw" },
1248
  { X86_INS_PHADDSW, "phaddsw" },
1249
  { X86_INS_PHADDW, "phaddw" },
1250
  { X86_INS_PHADDD, "phaddd" },
1251
  { X86_INS_PHSUBD, "phsubd" },
1252
  { X86_INS_PHSUBSW, "phsubsw" },
1253
  { X86_INS_PHSUBW, "phsubw" },
1254
  { X86_INS_PINSRW, "pinsrw" },
1255
  { X86_INS_PMADDUBSW, "pmaddubsw" },
1256
  { X86_INS_PMADDWD, "pmaddwd" },
1257
  { X86_INS_PMAXSW, "pmaxsw" },
1258
  { X86_INS_PMAXUB, "pmaxub" },
1259
  { X86_INS_PMINSW, "pminsw" },
1260
  { X86_INS_PMINUB, "pminub" },
1261
  { X86_INS_PMOVMSKB, "pmovmskb" },
1262
  { X86_INS_PMULHRSW, "pmulhrsw" },
1263
  { X86_INS_PMULHUW, "pmulhuw" },
1264
  { X86_INS_PMULHW, "pmulhw" },
1265
  { X86_INS_PMULLW, "pmullw" },
1266
  { X86_INS_PMULUDQ, "pmuludq" },
1267
  { X86_INS_POR, "por" },
1268
  { X86_INS_PSADBW, "psadbw" },
1269
  { X86_INS_PSHUFB, "pshufb" },
1270
  { X86_INS_PSHUFW, "pshufw" },
1271
  { X86_INS_PSIGNB, "psignb" },
1272
  { X86_INS_PSIGND, "psignd" },
1273
  { X86_INS_PSIGNW, "psignw" },
1274
  { X86_INS_PSLLD, "pslld" },
1275
  { X86_INS_PSLLQ, "psllq" },
1276
  { X86_INS_PSLLW, "psllw" },
1277
  { X86_INS_PSRAD, "psrad" },
1278
  { X86_INS_PSRAW, "psraw" },
1279
  { X86_INS_PSRLD, "psrld" },
1280
  { X86_INS_PSRLQ, "psrlq" },
1281
  { X86_INS_PSRLW, "psrlw" },
1282
  { X86_INS_PSUBB, "psubb" },
1283
  { X86_INS_PSUBD, "psubd" },
1284
  { X86_INS_PSUBQ, "psubq" },
1285
  { X86_INS_PSUBSB, "psubsb" },
1286
  { X86_INS_PSUBSW, "psubsw" },
1287
  { X86_INS_PSUBUSB, "psubusb" },
1288
  { X86_INS_PSUBUSW, "psubusw" },
1289
  { X86_INS_PSUBW, "psubw" },
1290
  { X86_INS_PUNPCKHBW, "punpckhbw" },
1291
  { X86_INS_PUNPCKHDQ, "punpckhdq" },
1292
  { X86_INS_PUNPCKHWD, "punpckhwd" },
1293
  { X86_INS_PUNPCKLBW, "punpcklbw" },
1294
  { X86_INS_PUNPCKLDQ, "punpckldq" },
1295
  { X86_INS_PUNPCKLWD, "punpcklwd" },
1296
  { X86_INS_PXOR, "pxor" },
1297
  { X86_INS_MONITOR, "monitor" },
1298
  { X86_INS_MONTMUL, "montmul" },
1299
  { X86_INS_MOV, "mov" },
1300
  { X86_INS_MOVABS, "movabs" },
1301
  { X86_INS_MOVBE, "movbe" },
1302
  { X86_INS_MOVDDUP, "movddup" },
1303
  { X86_INS_MOVDQA, "movdqa" },
1304
  { X86_INS_MOVDQU, "movdqu" },
1305
  { X86_INS_MOVHLPS, "movhlps" },
1306
  { X86_INS_MOVHPD, "movhpd" },
1307
  { X86_INS_MOVHPS, "movhps" },
1308
  { X86_INS_MOVLHPS, "movlhps" },
1309
  { X86_INS_MOVLPD, "movlpd" },
1310
  { X86_INS_MOVLPS, "movlps" },
1311
  { X86_INS_MOVMSKPD, "movmskpd" },
1312
  { X86_INS_MOVMSKPS, "movmskps" },
1313
  { X86_INS_MOVNTDQA, "movntdqa" },
1314
  { X86_INS_MOVNTDQ, "movntdq" },
1315
  { X86_INS_MOVNTI, "movnti" },
1316
  { X86_INS_MOVNTPD, "movntpd" },
1317
  { X86_INS_MOVNTPS, "movntps" },
1318
  { X86_INS_MOVNTSD, "movntsd" },
1319
  { X86_INS_MOVNTSS, "movntss" },
1320
  { X86_INS_MOVSB, "movsb" },
1321
  { X86_INS_MOVSD, "movsd" },
1322
  { X86_INS_MOVSHDUP, "movshdup" },
1323
  { X86_INS_MOVSLDUP, "movsldup" },
1324
  { X86_INS_MOVSQ, "movsq" },
1325
  { X86_INS_MOVSS, "movss" },
1326
  { X86_INS_MOVSW, "movsw" },
1327
  { X86_INS_MOVSX, "movsx" },
1328
  { X86_INS_MOVSXD, "movsxd" },
1329
  { X86_INS_MOVUPD, "movupd" },
1330
  { X86_INS_MOVUPS, "movups" },
1331
  { X86_INS_MOVZX, "movzx" },
1332
  { X86_INS_MPSADBW, "mpsadbw" },
1333
  { X86_INS_MUL, "mul" },
1334
  { X86_INS_MULPD, "mulpd" },
1335
  { X86_INS_MULPS, "mulps" },
1336
  { X86_INS_MULSD, "mulsd" },
1337
  { X86_INS_MULSS, "mulss" },
1338
  { X86_INS_MULX, "mulx" },
1339
  { X86_INS_FMUL, "fmul" },
1340
  { X86_INS_FIMUL, "fimul" },
1341
  { X86_INS_FMULP, "fmulp" },
1342
  { X86_INS_MWAIT, "mwait" },
1343
  { X86_INS_NEG, "neg" },
1344
  { X86_INS_NOP, "nop" },
1345
  { X86_INS_NOT, "not" },
1346
  { X86_INS_OUT, "out" },
1347
  { X86_INS_OUTSB, "outsb" },
1348
  { X86_INS_OUTSD, "outsd" },
1349
  { X86_INS_OUTSW, "outsw" },
1350
  { X86_INS_PACKUSDW, "packusdw" },
1351
  { X86_INS_PAUSE, "pause" },
1352
  { X86_INS_PAVGUSB, "pavgusb" },
1353
  { X86_INS_PBLENDVB, "pblendvb" },
1354
  { X86_INS_PBLENDW, "pblendw" },
1355
  { X86_INS_PCLMULQDQ, "pclmulqdq" },
1356
  { X86_INS_PCMPEQQ, "pcmpeqq" },
1357
  { X86_INS_PCMPESTRI, "pcmpestri" },
1358
  { X86_INS_PCMPESTRM, "pcmpestrm" },
1359
  { X86_INS_PCMPGTQ, "pcmpgtq" },
1360
  { X86_INS_PCMPISTRI, "pcmpistri" },
1361
  { X86_INS_PCMPISTRM, "pcmpistrm" },
1362
  { X86_INS_PCOMMIT, "pcommit" },
1363
  { X86_INS_PDEP, "pdep" },
1364
  { X86_INS_PEXT, "pext" },
1365
  { X86_INS_PEXTRB, "pextrb" },
1366
  { X86_INS_PEXTRD, "pextrd" },
1367
  { X86_INS_PEXTRQ, "pextrq" },
1368
  { X86_INS_PF2ID, "pf2id" },
1369
  { X86_INS_PF2IW, "pf2iw" },
1370
  { X86_INS_PFACC, "pfacc" },
1371
  { X86_INS_PFADD, "pfadd" },
1372
  { X86_INS_PFCMPEQ, "pfcmpeq" },
1373
  { X86_INS_PFCMPGE, "pfcmpge" },
1374
  { X86_INS_PFCMPGT, "pfcmpgt" },
1375
  { X86_INS_PFMAX, "pfmax" },
1376
  { X86_INS_PFMIN, "pfmin" },
1377
  { X86_INS_PFMUL, "pfmul" },
1378
  { X86_INS_PFNACC, "pfnacc" },
1379
  { X86_INS_PFPNACC, "pfpnacc" },
1380
  { X86_INS_PFRCPIT1, "pfrcpit1" },
1381
  { X86_INS_PFRCPIT2, "pfrcpit2" },
1382
  { X86_INS_PFRCP, "pfrcp" },
1383
  { X86_INS_PFRSQIT1, "pfrsqit1" },
1384
  { X86_INS_PFRSQRT, "pfrsqrt" },
1385
  { X86_INS_PFSUBR, "pfsubr" },
1386
  { X86_INS_PFSUB, "pfsub" },
1387
  { X86_INS_PHMINPOSUW, "phminposuw" },
1388
  { X86_INS_PI2FD, "pi2fd" },
1389
  { X86_INS_PI2FW, "pi2fw" },
1390
  { X86_INS_PINSRB, "pinsrb" },
1391
  { X86_INS_PINSRD, "pinsrd" },
1392
  { X86_INS_PINSRQ, "pinsrq" },
1393
  { X86_INS_PMAXSB, "pmaxsb" },
1394
  { X86_INS_PMAXSD, "pmaxsd" },
1395
  { X86_INS_PMAXUD, "pmaxud" },
1396
  { X86_INS_PMAXUW, "pmaxuw" },
1397
  { X86_INS_PMINSB, "pminsb" },
1398
  { X86_INS_PMINSD, "pminsd" },
1399
  { X86_INS_PMINUD, "pminud" },
1400
  { X86_INS_PMINUW, "pminuw" },
1401
  { X86_INS_PMOVSXBD, "pmovsxbd" },
1402
  { X86_INS_PMOVSXBQ, "pmovsxbq" },
1403
  { X86_INS_PMOVSXBW, "pmovsxbw" },
1404
  { X86_INS_PMOVSXDQ, "pmovsxdq" },
1405
  { X86_INS_PMOVSXWD, "pmovsxwd" },
1406
  { X86_INS_PMOVSXWQ, "pmovsxwq" },
1407
  { X86_INS_PMOVZXBD, "pmovzxbd" },
1408
  { X86_INS_PMOVZXBQ, "pmovzxbq" },
1409
  { X86_INS_PMOVZXBW, "pmovzxbw" },
1410
  { X86_INS_PMOVZXDQ, "pmovzxdq" },
1411
  { X86_INS_PMOVZXWD, "pmovzxwd" },
1412
  { X86_INS_PMOVZXWQ, "pmovzxwq" },
1413
  { X86_INS_PMULDQ, "pmuldq" },
1414
  { X86_INS_PMULHRW, "pmulhrw" },
1415
  { X86_INS_PMULLD, "pmulld" },
1416
  { X86_INS_POP, "pop" },
1417
  { X86_INS_POPAW, "popaw" },
1418
  { X86_INS_POPAL, "popal" },
1419
  { X86_INS_POPCNT, "popcnt" },
1420
  { X86_INS_POPF, "popf" },
1421
  { X86_INS_POPFD, "popfd" },
1422
  { X86_INS_POPFQ, "popfq" },
1423
  { X86_INS_PREFETCH, "prefetch" },
1424
  { X86_INS_PREFETCHNTA, "prefetchnta" },
1425
  { X86_INS_PREFETCHT0, "prefetcht0" },
1426
  { X86_INS_PREFETCHT1, "prefetcht1" },
1427
  { X86_INS_PREFETCHT2, "prefetcht2" },
1428
  { X86_INS_PREFETCHW, "prefetchw" },
1429
  { X86_INS_PSHUFD, "pshufd" },
1430
  { X86_INS_PSHUFHW, "pshufhw" },
1431
  { X86_INS_PSHUFLW, "pshuflw" },
1432
  { X86_INS_PSLLDQ, "pslldq" },
1433
  { X86_INS_PSRLDQ, "psrldq" },
1434
  { X86_INS_PSWAPD, "pswapd" },
1435
  { X86_INS_PTEST, "ptest" },
1436
  { X86_INS_PUNPCKHQDQ, "punpckhqdq" },
1437
  { X86_INS_PUNPCKLQDQ, "punpcklqdq" },
1438
  { X86_INS_PUSH, "push" },
1439
  { X86_INS_PUSHAW, "pushaw" },
1440
  { X86_INS_PUSHAL, "pushal" },
1441
  { X86_INS_PUSHF, "pushf" },
1442
  { X86_INS_PUSHFD, "pushfd" },
1443
  { X86_INS_PUSHFQ, "pushfq" },
1444
  { X86_INS_RCL, "rcl" },
1445
  { X86_INS_RCPPS, "rcpps" },
1446
  { X86_INS_RCPSS, "rcpss" },
1447
  { X86_INS_RCR, "rcr" },
1448
  { X86_INS_RDFSBASE, "rdfsbase" },
1449
  { X86_INS_RDGSBASE, "rdgsbase" },
1450
  { X86_INS_RDMSR, "rdmsr" },
1451
  { X86_INS_RDPMC, "rdpmc" },
1452
  { X86_INS_RDRAND, "rdrand" },
1453
  { X86_INS_RDSEED, "rdseed" },
1454
  { X86_INS_RDTSC, "rdtsc" },
1455
  { X86_INS_RDTSCP, "rdtscp" },
1456
  { X86_INS_ROL, "rol" },
1457
  { X86_INS_ROR, "ror" },
1458
  { X86_INS_RORX, "rorx" },
1459
  { X86_INS_ROUNDPD, "roundpd" },
1460
  { X86_INS_ROUNDPS, "roundps" },
1461
  { X86_INS_ROUNDSD, "roundsd" },
1462
  { X86_INS_ROUNDSS, "roundss" },
1463
  { X86_INS_RSM, "rsm" },
1464
  { X86_INS_RSQRTPS, "rsqrtps" },
1465
  { X86_INS_RSQRTSS, "rsqrtss" },
1466
  { X86_INS_SAHF, "sahf" },
1467
  { X86_INS_SAL, "sal" },
1468
  { X86_INS_SALC, "salc" },
1469
  { X86_INS_SAR, "sar" },
1470
  { X86_INS_SARX, "sarx" },
1471
  { X86_INS_SBB, "sbb" },
1472
  { X86_INS_SCASB, "scasb" },
1473
  { X86_INS_SCASD, "scasd" },
1474
  { X86_INS_SCASQ, "scasq" },
1475
  { X86_INS_SCASW, "scasw" },
1476
  { X86_INS_SETAE, "setae" },
1477
  { X86_INS_SETA, "seta" },
1478
  { X86_INS_SETBE, "setbe" },
1479
  { X86_INS_SETB, "setb" },
1480
  { X86_INS_SETE, "sete" },
1481
  { X86_INS_SETGE, "setge" },
1482
  { X86_INS_SETG, "setg" },
1483
  { X86_INS_SETLE, "setle" },
1484
  { X86_INS_SETL, "setl" },
1485
  { X86_INS_SETNE, "setne" },
1486
  { X86_INS_SETNO, "setno" },
1487
  { X86_INS_SETNP, "setnp" },
1488
  { X86_INS_SETNS, "setns" },
1489
  { X86_INS_SETO, "seto" },
1490
  { X86_INS_SETP, "setp" },
1491
  { X86_INS_SETS, "sets" },
1492
  { X86_INS_SFENCE, "sfence" },
1493
  { X86_INS_SGDT, "sgdt" },
1494
  { X86_INS_SHA1MSG1, "sha1msg1" },
1495
  { X86_INS_SHA1MSG2, "sha1msg2" },
1496
  { X86_INS_SHA1NEXTE, "sha1nexte" },
1497
  { X86_INS_SHA1RNDS4, "sha1rnds4" },
1498
  { X86_INS_SHA256MSG1, "sha256msg1" },
1499
  { X86_INS_SHA256MSG2, "sha256msg2" },
1500
  { X86_INS_SHA256RNDS2, "sha256rnds2" },
1501
  { X86_INS_SHL, "shl" },
1502
  { X86_INS_SHLD, "shld" },
1503
  { X86_INS_SHLX, "shlx" },
1504
  { X86_INS_SHR, "shr" },
1505
  { X86_INS_SHRD, "shrd" },
1506
  { X86_INS_SHRX, "shrx" },
1507
  { X86_INS_SHUFPD, "shufpd" },
1508
  { X86_INS_SHUFPS, "shufps" },
1509
  { X86_INS_SIDT, "sidt" },
1510
  { X86_INS_FSIN, "fsin" },
1511
  { X86_INS_SKINIT, "skinit" },
1512
  { X86_INS_SLDT, "sldt" },
1513
  { X86_INS_SMSW, "smsw" },
1514
  { X86_INS_SQRTPD, "sqrtpd" },
1515
  { X86_INS_SQRTPS, "sqrtps" },
1516
  { X86_INS_SQRTSD, "sqrtsd" },
1517
  { X86_INS_SQRTSS, "sqrtss" },
1518
  { X86_INS_FSQRT, "fsqrt" },
1519
  { X86_INS_STAC, "stac" },
1520
  { X86_INS_STC, "stc" },
1521
  { X86_INS_STD, "std" },
1522
  { X86_INS_STGI, "stgi" },
1523
  { X86_INS_STI, "sti" },
1524
  { X86_INS_STMXCSR, "stmxcsr" },
1525
  { X86_INS_STOSB, "stosb" },
1526
  { X86_INS_STOSD, "stosd" },
1527
  { X86_INS_STOSQ, "stosq" },
1528
  { X86_INS_STOSW, "stosw" },
1529
  { X86_INS_STR, "str" },
1530
  { X86_INS_FST, "fst" },
1531
  { X86_INS_FSTP, "fstp" },
1532
  { X86_INS_FSTPNCE, "fstpnce" },
1533
  { X86_INS_FXCH, "fxch" },
1534
  { X86_INS_SUBPD, "subpd" },
1535
  { X86_INS_SUBPS, "subps" },
1536
  { X86_INS_FSUBR, "fsubr" },
1537
  { X86_INS_FISUBR, "fisubr" },
1538
  { X86_INS_FSUBRP, "fsubrp" },
1539
  { X86_INS_SUBSD, "subsd" },
1540
  { X86_INS_SUBSS, "subss" },
1541
  { X86_INS_FSUB, "fsub" },
1542
  { X86_INS_FISUB, "fisub" },
1543
  { X86_INS_FSUBP, "fsubp" },
1544
  { X86_INS_SWAPGS, "swapgs" },
1545
  { X86_INS_SYSCALL, "syscall" },
1546
  { X86_INS_SYSENTER, "sysenter" },
1547
  { X86_INS_SYSEXIT, "sysexit" },
1548
  { X86_INS_SYSRET, "sysret" },
1549
  { X86_INS_T1MSKC, "t1mskc" },
1550
  { X86_INS_TEST, "test" },
1551
  { X86_INS_UD2, "ud2" },
1552
  { X86_INS_FTST, "ftst" },
1553
  { X86_INS_TZCNT, "tzcnt" },
1554
  { X86_INS_TZMSK, "tzmsk" },
1555
  { X86_INS_FUCOMIP, "fucomip" },
1556
  { X86_INS_FUCOMI, "fucomi" },
1557
  { X86_INS_FUCOMPP, "fucompp" },
1558
  { X86_INS_FUCOMP, "fucomp" },
1559
  { X86_INS_FUCOM, "fucom" },
1560
  { X86_INS_UD2B, "ud2b" },
1561
  { X86_INS_UNPCKHPD, "unpckhpd" },
1562
  { X86_INS_UNPCKHPS, "unpckhps" },
1563
  { X86_INS_UNPCKLPD, "unpcklpd" },
1564
  { X86_INS_UNPCKLPS, "unpcklps" },
1565
  { X86_INS_VADDPD, "vaddpd" },
1566
  { X86_INS_VADDPS, "vaddps" },
1567
  { X86_INS_VADDSD, "vaddsd" },
1568
  { X86_INS_VADDSS, "vaddss" },
1569
  { X86_INS_VADDSUBPD, "vaddsubpd" },
1570
  { X86_INS_VADDSUBPS, "vaddsubps" },
1571
  { X86_INS_VAESDECLAST, "vaesdeclast" },
1572
  { X86_INS_VAESDEC, "vaesdec" },
1573
  { X86_INS_VAESENCLAST, "vaesenclast" },
1574
  { X86_INS_VAESENC, "vaesenc" },
1575
  { X86_INS_VAESIMC, "vaesimc" },
1576
  { X86_INS_VAESKEYGENASSIST, "vaeskeygenassist" },
1577
  { X86_INS_VALIGND, "valignd" },
1578
  { X86_INS_VALIGNQ, "valignq" },
1579
  { X86_INS_VANDNPD, "vandnpd" },
1580
  { X86_INS_VANDNPS, "vandnps" },
1581
  { X86_INS_VANDPD, "vandpd" },
1582
  { X86_INS_VANDPS, "vandps" },
1583
  { X86_INS_VBLENDMPD, "vblendmpd" },
1584
  { X86_INS_VBLENDMPS, "vblendmps" },
1585
  { X86_INS_VBLENDPD, "vblendpd" },
1586
  { X86_INS_VBLENDPS, "vblendps" },
1587
  { X86_INS_VBLENDVPD, "vblendvpd" },
1588
  { X86_INS_VBLENDVPS, "vblendvps" },
1589
  { X86_INS_VBROADCASTF128, "vbroadcastf128" },
1590
  { X86_INS_VBROADCASTI32X4, "vbroadcasti32x4" },
1591
  { X86_INS_VBROADCASTI64X4, "vbroadcasti64x4" },
1592
  { X86_INS_VBROADCASTSD, "vbroadcastsd" },
1593
  { X86_INS_VBROADCASTSS, "vbroadcastss" },
1594
  { X86_INS_VCOMPRESSPD, "vcompresspd" },
1595
  { X86_INS_VCOMPRESSPS, "vcompressps" },
1596
  { X86_INS_VCVTDQ2PD, "vcvtdq2pd" },
1597
  { X86_INS_VCVTDQ2PS, "vcvtdq2ps" },
1598
  { X86_INS_VCVTPD2DQX, "vcvtpd2dqx" },
1599
  { X86_INS_VCVTPD2DQ, "vcvtpd2dq" },
1600
  { X86_INS_VCVTPD2PSX, "vcvtpd2psx" },
1601
  { X86_INS_VCVTPD2PS, "vcvtpd2ps" },
1602
  { X86_INS_VCVTPD2UDQ, "vcvtpd2udq" },
1603
  { X86_INS_VCVTPH2PS, "vcvtph2ps" },
1604
  { X86_INS_VCVTPS2DQ, "vcvtps2dq" },
1605
  { X86_INS_VCVTPS2PD, "vcvtps2pd" },
1606
  { X86_INS_VCVTPS2PH, "vcvtps2ph" },
1607
  { X86_INS_VCVTPS2UDQ, "vcvtps2udq" },
1608
  { X86_INS_VCVTSD2SI, "vcvtsd2si" },
1609
  { X86_INS_VCVTSD2USI, "vcvtsd2usi" },
1610
  { X86_INS_VCVTSS2SI, "vcvtss2si" },
1611
  { X86_INS_VCVTSS2USI, "vcvtss2usi" },
1612
  { X86_INS_VCVTTPD2DQX, "vcvttpd2dqx" },
1613
  { X86_INS_VCVTTPD2DQ, "vcvttpd2dq" },
1614
  { X86_INS_VCVTTPD2UDQ, "vcvttpd2udq" },
1615
  { X86_INS_VCVTTPS2DQ, "vcvttps2dq" },
1616
  { X86_INS_VCVTTPS2UDQ, "vcvttps2udq" },
1617
  { X86_INS_VCVTUDQ2PD, "vcvtudq2pd" },
1618
  { X86_INS_VCVTUDQ2PS, "vcvtudq2ps" },
1619
  { X86_INS_VDIVPD, "vdivpd" },
1620
  { X86_INS_VDIVPS, "vdivps" },
1621
  { X86_INS_VDIVSD, "vdivsd" },
1622
  { X86_INS_VDIVSS, "vdivss" },
1623
  { X86_INS_VDPPD, "vdppd" },
1624
  { X86_INS_VDPPS, "vdpps" },
1625
  { X86_INS_VERR, "verr" },
1626
  { X86_INS_VERW, "verw" },
1627
  { X86_INS_VEXP2PD, "vexp2pd" },
1628
  { X86_INS_VEXP2PS, "vexp2ps" },
1629
  { X86_INS_VEXPANDPD, "vexpandpd" },
1630
  { X86_INS_VEXPANDPS, "vexpandps" },
1631
  { X86_INS_VEXTRACTF128, "vextractf128" },
1632
  { X86_INS_VEXTRACTF32X4, "vextractf32x4" },
1633
  { X86_INS_VEXTRACTF64X4, "vextractf64x4" },
1634
  { X86_INS_VEXTRACTI128, "vextracti128" },
1635
  { X86_INS_VEXTRACTI32X4, "vextracti32x4" },
1636
  { X86_INS_VEXTRACTI64X4, "vextracti64x4" },
1637
  { X86_INS_VEXTRACTPS, "vextractps" },
1638
  { X86_INS_VFMADD132PD, "vfmadd132pd" },
1639
  { X86_INS_VFMADD132PS, "vfmadd132ps" },
1640
  { X86_INS_VFMADDPD, "vfmaddpd" },
1641
  { X86_INS_VFMADD213PD, "vfmadd213pd" },
1642
  { X86_INS_VFMADD231PD, "vfmadd231pd" },
1643
  { X86_INS_VFMADDPS, "vfmaddps" },
1644
  { X86_INS_VFMADD213PS, "vfmadd213ps" },
1645
  { X86_INS_VFMADD231PS, "vfmadd231ps" },
1646
  { X86_INS_VFMADDSD, "vfmaddsd" },
1647
  { X86_INS_VFMADD213SD, "vfmadd213sd" },
1648
  { X86_INS_VFMADD132SD, "vfmadd132sd" },
1649
  { X86_INS_VFMADD231SD, "vfmadd231sd" },
1650
  { X86_INS_VFMADDSS, "vfmaddss" },
1651
  { X86_INS_VFMADD213SS, "vfmadd213ss" },
1652
  { X86_INS_VFMADD132SS, "vfmadd132ss" },
1653
  { X86_INS_VFMADD231SS, "vfmadd231ss" },
1654
  { X86_INS_VFMADDSUB132PD, "vfmaddsub132pd" },
1655
  { X86_INS_VFMADDSUB132PS, "vfmaddsub132ps" },
1656
  { X86_INS_VFMADDSUBPD, "vfmaddsubpd" },
1657
  { X86_INS_VFMADDSUB213PD, "vfmaddsub213pd" },
1658
  { X86_INS_VFMADDSUB231PD, "vfmaddsub231pd" },
1659
  { X86_INS_VFMADDSUBPS, "vfmaddsubps" },
1660
  { X86_INS_VFMADDSUB213PS, "vfmaddsub213ps" },
1661
  { X86_INS_VFMADDSUB231PS, "vfmaddsub231ps" },
1662
  { X86_INS_VFMSUB132PD, "vfmsub132pd" },
1663
  { X86_INS_VFMSUB132PS, "vfmsub132ps" },
1664
  { X86_INS_VFMSUBADD132PD, "vfmsubadd132pd" },
1665
  { X86_INS_VFMSUBADD132PS, "vfmsubadd132ps" },
1666
  { X86_INS_VFMSUBADDPD, "vfmsubaddpd" },
1667
  { X86_INS_VFMSUBADD213PD, "vfmsubadd213pd" },
1668
  { X86_INS_VFMSUBADD231PD, "vfmsubadd231pd" },
1669
  { X86_INS_VFMSUBADDPS, "vfmsubaddps" },
1670
  { X86_INS_VFMSUBADD213PS, "vfmsubadd213ps" },
1671
  { X86_INS_VFMSUBADD231PS, "vfmsubadd231ps" },
1672
  { X86_INS_VFMSUBPD, "vfmsubpd" },
1673
  { X86_INS_VFMSUB213PD, "vfmsub213pd" },
1674
  { X86_INS_VFMSUB231PD, "vfmsub231pd" },
1675
  { X86_INS_VFMSUBPS, "vfmsubps" },
1676
  { X86_INS_VFMSUB213PS, "vfmsub213ps" },
1677
  { X86_INS_VFMSUB231PS, "vfmsub231ps" },
1678
  { X86_INS_VFMSUBSD, "vfmsubsd" },
1679
  { X86_INS_VFMSUB213SD, "vfmsub213sd" },
1680
  { X86_INS_VFMSUB132SD, "vfmsub132sd" },
1681
  { X86_INS_VFMSUB231SD, "vfmsub231sd" },
1682
  { X86_INS_VFMSUBSS, "vfmsubss" },
1683
  { X86_INS_VFMSUB213SS, "vfmsub213ss" },
1684
  { X86_INS_VFMSUB132SS, "vfmsub132ss" },
1685
  { X86_INS_VFMSUB231SS, "vfmsub231ss" },
1686
  { X86_INS_VFNMADD132PD, "vfnmadd132pd" },
1687
  { X86_INS_VFNMADD132PS, "vfnmadd132ps" },
1688
  { X86_INS_VFNMADDPD, "vfnmaddpd" },
1689
  { X86_INS_VFNMADD213PD, "vfnmadd213pd" },
1690
  { X86_INS_VFNMADD231PD, "vfnmadd231pd" },
1691
  { X86_INS_VFNMADDPS, "vfnmaddps" },
1692
  { X86_INS_VFNMADD213PS, "vfnmadd213ps" },
1693
  { X86_INS_VFNMADD231PS, "vfnmadd231ps" },
1694
  { X86_INS_VFNMADDSD, "vfnmaddsd" },
1695
  { X86_INS_VFNMADD213SD, "vfnmadd213sd" },
1696
  { X86_INS_VFNMADD132SD, "vfnmadd132sd" },
1697
  { X86_INS_VFNMADD231SD, "vfnmadd231sd" },
1698
  { X86_INS_VFNMADDSS, "vfnmaddss" },
1699
  { X86_INS_VFNMADD213SS, "vfnmadd213ss" },
1700
  { X86_INS_VFNMADD132SS, "vfnmadd132ss" },
1701
  { X86_INS_VFNMADD231SS, "vfnmadd231ss" },
1702
  { X86_INS_VFNMSUB132PD, "vfnmsub132pd" },
1703
  { X86_INS_VFNMSUB132PS, "vfnmsub132ps" },
1704
  { X86_INS_VFNMSUBPD, "vfnmsubpd" },
1705
  { X86_INS_VFNMSUB213PD, "vfnmsub213pd" },
1706
  { X86_INS_VFNMSUB231PD, "vfnmsub231pd" },
1707
  { X86_INS_VFNMSUBPS, "vfnmsubps" },
1708
  { X86_INS_VFNMSUB213PS, "vfnmsub213ps" },
1709
  { X86_INS_VFNMSUB231PS, "vfnmsub231ps" },
1710
  { X86_INS_VFNMSUBSD, "vfnmsubsd" },
1711
  { X86_INS_VFNMSUB213SD, "vfnmsub213sd" },
1712
  { X86_INS_VFNMSUB132SD, "vfnmsub132sd" },
1713
  { X86_INS_VFNMSUB231SD, "vfnmsub231sd" },
1714
  { X86_INS_VFNMSUBSS, "vfnmsubss" },
1715
  { X86_INS_VFNMSUB213SS, "vfnmsub213ss" },
1716
  { X86_INS_VFNMSUB132SS, "vfnmsub132ss" },
1717
  { X86_INS_VFNMSUB231SS, "vfnmsub231ss" },
1718
  { X86_INS_VFRCZPD, "vfrczpd" },
1719
  { X86_INS_VFRCZPS, "vfrczps" },
1720
  { X86_INS_VFRCZSD, "vfrczsd" },
1721
  { X86_INS_VFRCZSS, "vfrczss" },
1722
  { X86_INS_VORPD, "vorpd" },
1723
  { X86_INS_VORPS, "vorps" },
1724
  { X86_INS_VXORPD, "vxorpd" },
1725
  { X86_INS_VXORPS, "vxorps" },
1726
  { X86_INS_VGATHERDPD, "vgatherdpd" },
1727
  { X86_INS_VGATHERDPS, "vgatherdps" },
1728
  { X86_INS_VGATHERPF0DPD, "vgatherpf0dpd" },
1729
  { X86_INS_VGATHERPF0DPS, "vgatherpf0dps" },
1730
  { X86_INS_VGATHERPF0QPD, "vgatherpf0qpd" },
1731
  { X86_INS_VGATHERPF0QPS, "vgatherpf0qps" },
1732
  { X86_INS_VGATHERPF1DPD, "vgatherpf1dpd" },
1733
  { X86_INS_VGATHERPF1DPS, "vgatherpf1dps" },
1734
  { X86_INS_VGATHERPF1QPD, "vgatherpf1qpd" },
1735
  { X86_INS_VGATHERPF1QPS, "vgatherpf1qps" },
1736
  { X86_INS_VGATHERQPD, "vgatherqpd" },
1737
  { X86_INS_VGATHERQPS, "vgatherqps" },
1738
  { X86_INS_VHADDPD, "vhaddpd" },
1739
  { X86_INS_VHADDPS, "vhaddps" },
1740
  { X86_INS_VHSUBPD, "vhsubpd" },
1741
  { X86_INS_VHSUBPS, "vhsubps" },
1742
  { X86_INS_VINSERTF128, "vinsertf128" },
1743
  { X86_INS_VINSERTF32X4, "vinsertf32x4" },
1744
  { X86_INS_VINSERTF32X8, "vinsertf32x8" },
1745
  { X86_INS_VINSERTF64X2, "vinsertf64x2" },
1746
  { X86_INS_VINSERTF64X4, "vinsertf64x4" },
1747
  { X86_INS_VINSERTI128, "vinserti128" },
1748
  { X86_INS_VINSERTI32X4, "vinserti32x4" },
1749
  { X86_INS_VINSERTI32X8, "vinserti32x8" },
1750
  { X86_INS_VINSERTI64X2, "vinserti64x2" },
1751
  { X86_INS_VINSERTI64X4, "vinserti64x4" },
1752
  { X86_INS_VINSERTPS, "vinsertps" },
1753
  { X86_INS_VLDDQU, "vlddqu" },
1754
  { X86_INS_VLDMXCSR, "vldmxcsr" },
1755
  { X86_INS_VMASKMOVDQU, "vmaskmovdqu" },
1756
  { X86_INS_VMASKMOVPD, "vmaskmovpd" },
1757
  { X86_INS_VMASKMOVPS, "vmaskmovps" },
1758
  { X86_INS_VMAXPD, "vmaxpd" },
1759
  { X86_INS_VMAXPS, "vmaxps" },
1760
  { X86_INS_VMAXSD, "vmaxsd" },
1761
  { X86_INS_VMAXSS, "vmaxss" },
1762
  { X86_INS_VMCALL, "vmcall" },
1763
  { X86_INS_VMCLEAR, "vmclear" },
1764
  { X86_INS_VMFUNC, "vmfunc" },
1765
  { X86_INS_VMINPD, "vminpd" },
1766
  { X86_INS_VMINPS, "vminps" },
1767
  { X86_INS_VMINSD, "vminsd" },
1768
  { X86_INS_VMINSS, "vminss" },
1769
  { X86_INS_VMLAUNCH, "vmlaunch" },
1770
  { X86_INS_VMLOAD, "vmload" },
1771
  { X86_INS_VMMCALL, "vmmcall" },
1772
  { X86_INS_VMOVQ, "vmovq" },
1773
  { X86_INS_VMOVDDUP, "vmovddup" },
1774
  { X86_INS_VMOVD, "vmovd" },
1775
  { X86_INS_VMOVDQA32, "vmovdqa32" },
1776
  { X86_INS_VMOVDQA64, "vmovdqa64" },
1777
  { X86_INS_VMOVDQA, "vmovdqa" },
1778
  { X86_INS_VMOVDQU16, "vmovdqu16" },
1779
  { X86_INS_VMOVDQU32, "vmovdqu32" },
1780
  { X86_INS_VMOVDQU64, "vmovdqu64" },
1781
  { X86_INS_VMOVDQU8, "vmovdqu8" },
1782
  { X86_INS_VMOVDQU, "vmovdqu" },
1783
  { X86_INS_VMOVHLPS, "vmovhlps" },
1784
  { X86_INS_VMOVHPD, "vmovhpd" },
1785
  { X86_INS_VMOVHPS, "vmovhps" },
1786
  { X86_INS_VMOVLHPS, "vmovlhps" },
1787
  { X86_INS_VMOVLPD, "vmovlpd" },
1788
  { X86_INS_VMOVLPS, "vmovlps" },
1789
  { X86_INS_VMOVMSKPD, "vmovmskpd" },
1790
  { X86_INS_VMOVMSKPS, "vmovmskps" },
1791
  { X86_INS_VMOVNTDQA, "vmovntdqa" },
1792
  { X86_INS_VMOVNTDQ, "vmovntdq" },
1793
  { X86_INS_VMOVNTPD, "vmovntpd" },
1794
  { X86_INS_VMOVNTPS, "vmovntps" },
1795
  { X86_INS_VMOVSD, "vmovsd" },
1796
  { X86_INS_VMOVSHDUP, "vmovshdup" },
1797
  { X86_INS_VMOVSLDUP, "vmovsldup" },
1798
  { X86_INS_VMOVSS, "vmovss" },
1799
  { X86_INS_VMOVUPD, "vmovupd" },
1800
  { X86_INS_VMOVUPS, "vmovups" },
1801
  { X86_INS_VMPSADBW, "vmpsadbw" },
1802
  { X86_INS_VMPTRLD, "vmptrld" },
1803
  { X86_INS_VMPTRST, "vmptrst" },
1804
  { X86_INS_VMREAD, "vmread" },
1805
  { X86_INS_VMRESUME, "vmresume" },
1806
  { X86_INS_VMRUN, "vmrun" },
1807
  { X86_INS_VMSAVE, "vmsave" },
1808
  { X86_INS_VMULPD, "vmulpd" },
1809
  { X86_INS_VMULPS, "vmulps" },
1810
  { X86_INS_VMULSD, "vmulsd" },
1811
  { X86_INS_VMULSS, "vmulss" },
1812
  { X86_INS_VMWRITE, "vmwrite" },
1813
  { X86_INS_VMXOFF, "vmxoff" },
1814
  { X86_INS_VMXON, "vmxon" },
1815
  { X86_INS_VPABSB, "vpabsb" },
1816
  { X86_INS_VPABSD, "vpabsd" },
1817
  { X86_INS_VPABSQ, "vpabsq" },
1818
  { X86_INS_VPABSW, "vpabsw" },
1819
  { X86_INS_VPACKSSDW, "vpackssdw" },
1820
  { X86_INS_VPACKSSWB, "vpacksswb" },
1821
  { X86_INS_VPACKUSDW, "vpackusdw" },
1822
  { X86_INS_VPACKUSWB, "vpackuswb" },
1823
  { X86_INS_VPADDB, "vpaddb" },
1824
  { X86_INS_VPADDD, "vpaddd" },
1825
  { X86_INS_VPADDQ, "vpaddq" },
1826
  { X86_INS_VPADDSB, "vpaddsb" },
1827
  { X86_INS_VPADDSW, "vpaddsw" },
1828
  { X86_INS_VPADDUSB, "vpaddusb" },
1829
  { X86_INS_VPADDUSW, "vpaddusw" },
1830
  { X86_INS_VPADDW, "vpaddw" },
1831
  { X86_INS_VPALIGNR, "vpalignr" },
1832
  { X86_INS_VPANDD, "vpandd" },
1833
  { X86_INS_VPANDND, "vpandnd" },
1834
  { X86_INS_VPANDNQ, "vpandnq" },
1835
  { X86_INS_VPANDN, "vpandn" },
1836
  { X86_INS_VPANDQ, "vpandq" },
1837
  { X86_INS_VPAND, "vpand" },
1838
  { X86_INS_VPAVGB, "vpavgb" },
1839
  { X86_INS_VPAVGW, "vpavgw" },
1840
  { X86_INS_VPBLENDD, "vpblendd" },
1841
  { X86_INS_VPBLENDMB, "vpblendmb" },
1842
  { X86_INS_VPBLENDMD, "vpblendmd" },
1843
  { X86_INS_VPBLENDMQ, "vpblendmq" },
1844
  { X86_INS_VPBLENDMW, "vpblendmw" },
1845
  { X86_INS_VPBLENDVB, "vpblendvb" },
1846
  { X86_INS_VPBLENDW, "vpblendw" },
1847
  { X86_INS_VPBROADCASTB, "vpbroadcastb" },
1848
  { X86_INS_VPBROADCASTD, "vpbroadcastd" },
1849
  { X86_INS_VPBROADCASTMB2Q, "vpbroadcastmb2q" },
1850
  { X86_INS_VPBROADCASTMW2D, "vpbroadcastmw2d" },
1851
  { X86_INS_VPBROADCASTQ, "vpbroadcastq" },
1852
  { X86_INS_VPBROADCASTW, "vpbroadcastw" },
1853
  { X86_INS_VPCLMULQDQ, "vpclmulqdq" },
1854
  { X86_INS_VPCMOV, "vpcmov" },
1855
  { X86_INS_VPCMPB, "vpcmpb" },
1856
  { X86_INS_VPCMPD, "vpcmpd" },
1857
  { X86_INS_VPCMPEQB, "vpcmpeqb" },
1858
  { X86_INS_VPCMPEQD, "vpcmpeqd" },
1859
  { X86_INS_VPCMPEQQ, "vpcmpeqq" },
1860
  { X86_INS_VPCMPEQW, "vpcmpeqw" },
1861
  { X86_INS_VPCMPESTRI, "vpcmpestri" },
1862
  { X86_INS_VPCMPESTRM, "vpcmpestrm" },
1863
  { X86_INS_VPCMPGTB, "vpcmpgtb" },
1864
  { X86_INS_VPCMPGTD, "vpcmpgtd" },
1865
  { X86_INS_VPCMPGTQ, "vpcmpgtq" },
1866
  { X86_INS_VPCMPGTW, "vpcmpgtw" },
1867
  { X86_INS_VPCMPISTRI, "vpcmpistri" },
1868
  { X86_INS_VPCMPISTRM, "vpcmpistrm" },
1869
  { X86_INS_VPCMPQ, "vpcmpq" },
1870
  { X86_INS_VPCMPUB, "vpcmpub" },
1871
  { X86_INS_VPCMPUD, "vpcmpud" },
1872
  { X86_INS_VPCMPUQ, "vpcmpuq" },
1873
  { X86_INS_VPCMPUW, "vpcmpuw" },
1874
  { X86_INS_VPCMPW, "vpcmpw" },
1875
  { X86_INS_VPCOMB, "vpcomb" },
1876
  { X86_INS_VPCOMD, "vpcomd" },
1877
  { X86_INS_VPCOMPRESSD, "vpcompressd" },
1878
  { X86_INS_VPCOMPRESSQ, "vpcompressq" },
1879
  { X86_INS_VPCOMQ, "vpcomq" },
1880
  { X86_INS_VPCOMUB, "vpcomub" },
1881
  { X86_INS_VPCOMUD, "vpcomud" },
1882
  { X86_INS_VPCOMUQ, "vpcomuq" },
1883
  { X86_INS_VPCOMUW, "vpcomuw" },
1884
  { X86_INS_VPCOMW, "vpcomw" },
1885
  { X86_INS_VPCONFLICTD, "vpconflictd" },
1886
  { X86_INS_VPCONFLICTQ, "vpconflictq" },
1887
  { X86_INS_VPERM2F128, "vperm2f128" },
1888
  { X86_INS_VPERM2I128, "vperm2i128" },
1889
  { X86_INS_VPERMD, "vpermd" },
1890
  { X86_INS_VPERMI2D, "vpermi2d" },
1891
  { X86_INS_VPERMI2PD, "vpermi2pd" },
1892
  { X86_INS_VPERMI2PS, "vpermi2ps" },
1893
  { X86_INS_VPERMI2Q, "vpermi2q" },
1894
  { X86_INS_VPERMIL2PD, "vpermil2pd" },
1895
  { X86_INS_VPERMIL2PS, "vpermil2ps" },
1896
  { X86_INS_VPERMILPD, "vpermilpd" },
1897
  { X86_INS_VPERMILPS, "vpermilps" },
1898
  { X86_INS_VPERMPD, "vpermpd" },
1899
  { X86_INS_VPERMPS, "vpermps" },
1900
  { X86_INS_VPERMQ, "vpermq" },
1901
  { X86_INS_VPERMT2D, "vpermt2d" },
1902
  { X86_INS_VPERMT2PD, "vpermt2pd" },
1903
  { X86_INS_VPERMT2PS, "vpermt2ps" },
1904
  { X86_INS_VPERMT2Q, "vpermt2q" },
1905
  { X86_INS_VPEXPANDD, "vpexpandd" },
1906
  { X86_INS_VPEXPANDQ, "vpexpandq" },
1907
  { X86_INS_VPEXTRB, "vpextrb" },
1908
  { X86_INS_VPEXTRD, "vpextrd" },
1909
  { X86_INS_VPEXTRQ, "vpextrq" },
1910
  { X86_INS_VPEXTRW, "vpextrw" },
1911
  { X86_INS_VPGATHERDD, "vpgatherdd" },
1912
  { X86_INS_VPGATHERDQ, "vpgatherdq" },
1913
  { X86_INS_VPGATHERQD, "vpgatherqd" },
1914
  { X86_INS_VPGATHERQQ, "vpgatherqq" },
1915
  { X86_INS_VPHADDBD, "vphaddbd" },
1916
  { X86_INS_VPHADDBQ, "vphaddbq" },
1917
  { X86_INS_VPHADDBW, "vphaddbw" },
1918
  { X86_INS_VPHADDDQ, "vphadddq" },
1919
  { X86_INS_VPHADDD, "vphaddd" },
1920
  { X86_INS_VPHADDSW, "vphaddsw" },
1921
  { X86_INS_VPHADDUBD, "vphaddubd" },
1922
  { X86_INS_VPHADDUBQ, "vphaddubq" },
1923
  { X86_INS_VPHADDUBW, "vphaddubw" },
1924
  { X86_INS_VPHADDUDQ, "vphaddudq" },
1925
  { X86_INS_VPHADDUWD, "vphadduwd" },
1926
  { X86_INS_VPHADDUWQ, "vphadduwq" },
1927
  { X86_INS_VPHADDWD, "vphaddwd" },
1928
  { X86_INS_VPHADDWQ, "vphaddwq" },
1929
  { X86_INS_VPHADDW, "vphaddw" },
1930
  { X86_INS_VPHMINPOSUW, "vphminposuw" },
1931
  { X86_INS_VPHSUBBW, "vphsubbw" },
1932
  { X86_INS_VPHSUBDQ, "vphsubdq" },
1933
  { X86_INS_VPHSUBD, "vphsubd" },
1934
  { X86_INS_VPHSUBSW, "vphsubsw" },
1935
  { X86_INS_VPHSUBWD, "vphsubwd" },
1936
  { X86_INS_VPHSUBW, "vphsubw" },
1937
  { X86_INS_VPINSRB, "vpinsrb" },
1938
  { X86_INS_VPINSRD, "vpinsrd" },
1939
  { X86_INS_VPINSRQ, "vpinsrq" },
1940
  { X86_INS_VPINSRW, "vpinsrw" },
1941
  { X86_INS_VPLZCNTD, "vplzcntd" },
1942
  { X86_INS_VPLZCNTQ, "vplzcntq" },
1943
  { X86_INS_VPMACSDD, "vpmacsdd" },
1944
  { X86_INS_VPMACSDQH, "vpmacsdqh" },
1945
  { X86_INS_VPMACSDQL, "vpmacsdql" },
1946
  { X86_INS_VPMACSSDD, "vpmacssdd" },
1947
  { X86_INS_VPMACSSDQH, "vpmacssdqh" },
1948
  { X86_INS_VPMACSSDQL, "vpmacssdql" },
1949
  { X86_INS_VPMACSSWD, "vpmacsswd" },
1950
  { X86_INS_VPMACSSWW, "vpmacssww" },
1951
  { X86_INS_VPMACSWD, "vpmacswd" },
1952
  { X86_INS_VPMACSWW, "vpmacsww" },
1953
  { X86_INS_VPMADCSSWD, "vpmadcsswd" },
1954
  { X86_INS_VPMADCSWD, "vpmadcswd" },
1955
  { X86_INS_VPMADDUBSW, "vpmaddubsw" },
1956
  { X86_INS_VPMADDWD, "vpmaddwd" },
1957
  { X86_INS_VPMASKMOVD, "vpmaskmovd" },
1958
  { X86_INS_VPMASKMOVQ, "vpmaskmovq" },
1959
  { X86_INS_VPMAXSB, "vpmaxsb" },
1960
  { X86_INS_VPMAXSD, "vpmaxsd" },
1961
  { X86_INS_VPMAXSQ, "vpmaxsq" },
1962
  { X86_INS_VPMAXSW, "vpmaxsw" },
1963
  { X86_INS_VPMAXUB, "vpmaxub" },
1964
  { X86_INS_VPMAXUD, "vpmaxud" },
1965
  { X86_INS_VPMAXUQ, "vpmaxuq" },
1966
  { X86_INS_VPMAXUW, "vpmaxuw" },
1967
  { X86_INS_VPMINSB, "vpminsb" },
1968
  { X86_INS_VPMINSD, "vpminsd" },
1969
  { X86_INS_VPMINSQ, "vpminsq" },
1970
  { X86_INS_VPMINSW, "vpminsw" },
1971
  { X86_INS_VPMINUB, "vpminub" },
1972
  { X86_INS_VPMINUD, "vpminud" },
1973
  { X86_INS_VPMINUQ, "vpminuq" },
1974
  { X86_INS_VPMINUW, "vpminuw" },
1975
  { X86_INS_VPMOVDB, "vpmovdb" },
1976
  { X86_INS_VPMOVDW, "vpmovdw" },
1977
  { X86_INS_VPMOVM2B, "vpmovm2b" },
1978
  { X86_INS_VPMOVM2D, "vpmovm2d" },
1979
  { X86_INS_VPMOVM2Q, "vpmovm2q" },
1980
  { X86_INS_VPMOVM2W, "vpmovm2w" },
1981
  { X86_INS_VPMOVMSKB, "vpmovmskb" },
1982
  { X86_INS_VPMOVQB, "vpmovqb" },
1983
  { X86_INS_VPMOVQD, "vpmovqd" },
1984
  { X86_INS_VPMOVQW, "vpmovqw" },
1985
  { X86_INS_VPMOVSDB, "vpmovsdb" },
1986
  { X86_INS_VPMOVSDW, "vpmovsdw" },
1987
  { X86_INS_VPMOVSQB, "vpmovsqb" },
1988
  { X86_INS_VPMOVSQD, "vpmovsqd" },
1989
  { X86_INS_VPMOVSQW, "vpmovsqw" },
1990
  { X86_INS_VPMOVSXBD, "vpmovsxbd" },
1991
  { X86_INS_VPMOVSXBQ, "vpmovsxbq" },
1992
  { X86_INS_VPMOVSXBW, "vpmovsxbw" },
1993
  { X86_INS_VPMOVSXDQ, "vpmovsxdq" },
1994
  { X86_INS_VPMOVSXWD, "vpmovsxwd" },
1995
  { X86_INS_VPMOVSXWQ, "vpmovsxwq" },
1996
  { X86_INS_VPMOVUSDB, "vpmovusdb" },
1997
  { X86_INS_VPMOVUSDW, "vpmovusdw" },
1998
  { X86_INS_VPMOVUSQB, "vpmovusqb" },
1999
  { X86_INS_VPMOVUSQD, "vpmovusqd" },
2000
  { X86_INS_VPMOVUSQW, "vpmovusqw" },
2001
  { X86_INS_VPMOVZXBD, "vpmovzxbd" },
2002
  { X86_INS_VPMOVZXBQ, "vpmovzxbq" },
2003
  { X86_INS_VPMOVZXBW, "vpmovzxbw" },
2004
  { X86_INS_VPMOVZXDQ, "vpmovzxdq" },
2005
  { X86_INS_VPMOVZXWD, "vpmovzxwd" },
2006
  { X86_INS_VPMOVZXWQ, "vpmovzxwq" },
2007
  { X86_INS_VPMULDQ, "vpmuldq" },
2008
  { X86_INS_VPMULHRSW, "vpmulhrsw" },
2009
  { X86_INS_VPMULHUW, "vpmulhuw" },
2010
  { X86_INS_VPMULHW, "vpmulhw" },
2011
  { X86_INS_VPMULLD, "vpmulld" },
2012
  { X86_INS_VPMULLQ, "vpmullq" },
2013
  { X86_INS_VPMULLW, "vpmullw" },
2014
  { X86_INS_VPMULUDQ, "vpmuludq" },
2015
  { X86_INS_VPORD, "vpord" },
2016
  { X86_INS_VPORQ, "vporq" },
2017
  { X86_INS_VPOR, "vpor" },
2018
  { X86_INS_VPPERM, "vpperm" },
2019
  { X86_INS_VPROTB, "vprotb" },
2020
  { X86_INS_VPROTD, "vprotd" },
2021
  { X86_INS_VPROTQ, "vprotq" },
2022
  { X86_INS_VPROTW, "vprotw" },
2023
  { X86_INS_VPSADBW, "vpsadbw" },
2024
  { X86_INS_VPSCATTERDD, "vpscatterdd" },
2025
  { X86_INS_VPSCATTERDQ, "vpscatterdq" },
2026
  { X86_INS_VPSCATTERQD, "vpscatterqd" },
2027
  { X86_INS_VPSCATTERQQ, "vpscatterqq" },
2028
  { X86_INS_VPSHAB, "vpshab" },
2029
  { X86_INS_VPSHAD, "vpshad" },
2030
  { X86_INS_VPSHAQ, "vpshaq" },
2031
  { X86_INS_VPSHAW, "vpshaw" },
2032
  { X86_INS_VPSHLB, "vpshlb" },
2033
  { X86_INS_VPSHLD, "vpshld" },
2034
  { X86_INS_VPSHLQ, "vpshlq" },
2035
  { X86_INS_VPSHLW, "vpshlw" },
2036
  { X86_INS_VPSHUFB, "vpshufb" },
2037
  { X86_INS_VPSHUFD, "vpshufd" },
2038
  { X86_INS_VPSHUFHW, "vpshufhw" },
2039
  { X86_INS_VPSHUFLW, "vpshuflw" },
2040
  { X86_INS_VPSIGNB, "vpsignb" },
2041
  { X86_INS_VPSIGND, "vpsignd" },
2042
  { X86_INS_VPSIGNW, "vpsignw" },
2043
  { X86_INS_VPSLLDQ, "vpslldq" },
2044
  { X86_INS_VPSLLD, "vpslld" },
2045
  { X86_INS_VPSLLQ, "vpsllq" },
2046
  { X86_INS_VPSLLVD, "vpsllvd" },
2047
  { X86_INS_VPSLLVQ, "vpsllvq" },
2048
  { X86_INS_VPSLLW, "vpsllw" },
2049
  { X86_INS_VPSRAD, "vpsrad" },
2050
  { X86_INS_VPSRAQ, "vpsraq" },
2051
  { X86_INS_VPSRAVD, "vpsravd" },
2052
  { X86_INS_VPSRAVQ, "vpsravq" },
2053
  { X86_INS_VPSRAW, "vpsraw" },
2054
  { X86_INS_VPSRLDQ, "vpsrldq" },
2055
  { X86_INS_VPSRLD, "vpsrld" },
2056
  { X86_INS_VPSRLQ, "vpsrlq" },
2057
  { X86_INS_VPSRLVD, "vpsrlvd" },
2058
  { X86_INS_VPSRLVQ, "vpsrlvq" },
2059
  { X86_INS_VPSRLW, "vpsrlw" },
2060
  { X86_INS_VPSUBB, "vpsubb" },
2061
  { X86_INS_VPSUBD, "vpsubd" },
2062
  { X86_INS_VPSUBQ, "vpsubq" },
2063
  { X86_INS_VPSUBSB, "vpsubsb" },
2064
  { X86_INS_VPSUBSW, "vpsubsw" },
2065
  { X86_INS_VPSUBUSB, "vpsubusb" },
2066
  { X86_INS_VPSUBUSW, "vpsubusw" },
2067
  { X86_INS_VPSUBW, "vpsubw" },
2068
  { X86_INS_VPTESTMD, "vptestmd" },
2069
  { X86_INS_VPTESTMQ, "vptestmq" },
2070
  { X86_INS_VPTESTNMD, "vptestnmd" },
2071
  { X86_INS_VPTESTNMQ, "vptestnmq" },
2072
  { X86_INS_VPTEST, "vptest" },
2073
  { X86_INS_VPUNPCKHBW, "vpunpckhbw" },
2074
  { X86_INS_VPUNPCKHDQ, "vpunpckhdq" },
2075
  { X86_INS_VPUNPCKHQDQ, "vpunpckhqdq" },
2076
  { X86_INS_VPUNPCKHWD, "vpunpckhwd" },
2077
  { X86_INS_VPUNPCKLBW, "vpunpcklbw" },
2078
  { X86_INS_VPUNPCKLDQ, "vpunpckldq" },
2079
  { X86_INS_VPUNPCKLQDQ, "vpunpcklqdq" },
2080
  { X86_INS_VPUNPCKLWD, "vpunpcklwd" },
2081
  { X86_INS_VPXORD, "vpxord" },
2082
  { X86_INS_VPXORQ, "vpxorq" },
2083
  { X86_INS_VPXOR, "vpxor" },
2084
  { X86_INS_VRCP14PD, "vrcp14pd" },
2085
  { X86_INS_VRCP14PS, "vrcp14ps" },
2086
  { X86_INS_VRCP14SD, "vrcp14sd" },
2087
  { X86_INS_VRCP14SS, "vrcp14ss" },
2088
  { X86_INS_VRCP28PD, "vrcp28pd" },
2089
  { X86_INS_VRCP28PS, "vrcp28ps" },
2090
  { X86_INS_VRCP28SD, "vrcp28sd" },
2091
  { X86_INS_VRCP28SS, "vrcp28ss" },
2092
  { X86_INS_VRCPPS, "vrcpps" },
2093
  { X86_INS_VRCPSS, "vrcpss" },
2094
  { X86_INS_VRNDSCALEPD, "vrndscalepd" },
2095
  { X86_INS_VRNDSCALEPS, "vrndscaleps" },
2096
  { X86_INS_VRNDSCALESD, "vrndscalesd" },
2097
  { X86_INS_VRNDSCALESS, "vrndscaless" },
2098
  { X86_INS_VROUNDPD, "vroundpd" },
2099
  { X86_INS_VROUNDPS, "vroundps" },
2100
  { X86_INS_VROUNDSD, "vroundsd" },
2101
  { X86_INS_VROUNDSS, "vroundss" },
2102
  { X86_INS_VRSQRT14PD, "vrsqrt14pd" },
2103
  { X86_INS_VRSQRT14PS, "vrsqrt14ps" },
2104
  { X86_INS_VRSQRT14SD, "vrsqrt14sd" },
2105
  { X86_INS_VRSQRT14SS, "vrsqrt14ss" },
2106
  { X86_INS_VRSQRT28PD, "vrsqrt28pd" },
2107
  { X86_INS_VRSQRT28PS, "vrsqrt28ps" },
2108
  { X86_INS_VRSQRT28SD, "vrsqrt28sd" },
2109
  { X86_INS_VRSQRT28SS, "vrsqrt28ss" },
2110
  { X86_INS_VRSQRTPS, "vrsqrtps" },
2111
  { X86_INS_VRSQRTSS, "vrsqrtss" },
2112
  { X86_INS_VSCATTERDPD, "vscatterdpd" },
2113
  { X86_INS_VSCATTERDPS, "vscatterdps" },
2114
  { X86_INS_VSCATTERPF0DPD, "vscatterpf0dpd" },
2115
  { X86_INS_VSCATTERPF0DPS, "vscatterpf0dps" },
2116
  { X86_INS_VSCATTERPF0QPD, "vscatterpf0qpd" },
2117
  { X86_INS_VSCATTERPF0QPS, "vscatterpf0qps" },
2118
  { X86_INS_VSCATTERPF1DPD, "vscatterpf1dpd" },
2119
  { X86_INS_VSCATTERPF1DPS, "vscatterpf1dps" },
2120
  { X86_INS_VSCATTERPF1QPD, "vscatterpf1qpd" },
2121
  { X86_INS_VSCATTERPF1QPS, "vscatterpf1qps" },
2122
  { X86_INS_VSCATTERQPD, "vscatterqpd" },
2123
  { X86_INS_VSCATTERQPS, "vscatterqps" },
2124
  { X86_INS_VSHUFPD, "vshufpd" },
2125
  { X86_INS_VSHUFPS, "vshufps" },
2126
  { X86_INS_VSQRTPD, "vsqrtpd" },
2127
  { X86_INS_VSQRTPS, "vsqrtps" },
2128
  { X86_INS_VSQRTSD, "vsqrtsd" },
2129
  { X86_INS_VSQRTSS, "vsqrtss" },
2130
  { X86_INS_VSTMXCSR, "vstmxcsr" },
2131
  { X86_INS_VSUBPD, "vsubpd" },
2132
  { X86_INS_VSUBPS, "vsubps" },
2133
  { X86_INS_VSUBSD, "vsubsd" },
2134
  { X86_INS_VSUBSS, "vsubss" },
2135
  { X86_INS_VTESTPD, "vtestpd" },
2136
  { X86_INS_VTESTPS, "vtestps" },
2137
  { X86_INS_VUNPCKHPD, "vunpckhpd" },
2138
  { X86_INS_VUNPCKHPS, "vunpckhps" },
2139
  { X86_INS_VUNPCKLPD, "vunpcklpd" },
2140
  { X86_INS_VUNPCKLPS, "vunpcklps" },
2141
  { X86_INS_VZEROALL, "vzeroall" },
2142
  { X86_INS_VZEROUPPER, "vzeroupper" },
2143
  { X86_INS_WAIT, "wait" },
2144
  { X86_INS_WBINVD, "wbinvd" },
2145
  { X86_INS_WRFSBASE, "wrfsbase" },
2146
  { X86_INS_WRGSBASE, "wrgsbase" },
2147
  { X86_INS_WRMSR, "wrmsr" },
2148
  { X86_INS_XABORT, "xabort" },
2149
  { X86_INS_XACQUIRE, "xacquire" },
2150
  { X86_INS_XBEGIN, "xbegin" },
2151
  { X86_INS_XCHG, "xchg" },
2152
  { X86_INS_XCRYPTCBC, "xcryptcbc" },
2153
  { X86_INS_XCRYPTCFB, "xcryptcfb" },
2154
  { X86_INS_XCRYPTCTR, "xcryptctr" },
2155
  { X86_INS_XCRYPTECB, "xcryptecb" },
2156
  { X86_INS_XCRYPTOFB, "xcryptofb" },
2157
  { X86_INS_XEND, "xend" },
2158
  { X86_INS_XGETBV, "xgetbv" },
2159
  { X86_INS_XLATB, "xlatb" },
2160
  { X86_INS_XRELEASE, "xrelease" },
2161
  { X86_INS_XRSTOR, "xrstor" },
2162
  { X86_INS_XRSTOR64, "xrstor64" },
2163
  { X86_INS_XRSTORS, "xrstors" },
2164
  { X86_INS_XRSTORS64, "xrstors64" },
2165
  { X86_INS_XSAVE, "xsave" },
2166
  { X86_INS_XSAVE64, "xsave64" },
2167
  { X86_INS_XSAVEC, "xsavec" },
2168
  { X86_INS_XSAVEC64, "xsavec64" },
2169
  { X86_INS_XSAVEOPT, "xsaveopt" },
2170
  { X86_INS_XSAVEOPT64, "xsaveopt64" },
2171
  { X86_INS_XSAVES, "xsaves" },
2172
  { X86_INS_XSAVES64, "xsaves64" },
2173
  { X86_INS_XSETBV, "xsetbv" },
2174
  { X86_INS_XSHA1, "xsha1" },
2175
  { X86_INS_XSHA256, "xsha256" },
2176
  { X86_INS_XSTORE, "xstore" },
2177
  { X86_INS_XTEST, "xtest" },
2178
  { X86_INS_FDISI8087_NOP, "fdisi8087_nop" },
2179
  { X86_INS_FENI8087_NOP, "feni8087_nop" },
2180
2181
  // pseudo instructions
2182
  { X86_INS_CMPSS, "cmpss" },
2183
  { X86_INS_CMPEQSS, "cmpeqss" },
2184
  { X86_INS_CMPLTSS, "cmpltss" },
2185
  { X86_INS_CMPLESS, "cmpless" },
2186
  { X86_INS_CMPUNORDSS, "cmpunordss" },
2187
  { X86_INS_CMPNEQSS, "cmpneqss" },
2188
  { X86_INS_CMPNLTSS, "cmpnltss" },
2189
  { X86_INS_CMPNLESS, "cmpnless" },
2190
  { X86_INS_CMPORDSS, "cmpordss" },
2191
2192
  { X86_INS_CMPSD, "cmpsd" },
2193
  { X86_INS_CMPEQSD, "cmpeqsd" },
2194
  { X86_INS_CMPLTSD, "cmpltsd" },
2195
  { X86_INS_CMPLESD, "cmplesd" },
2196
  { X86_INS_CMPUNORDSD, "cmpunordsd" },
2197
  { X86_INS_CMPNEQSD, "cmpneqsd" },
2198
  { X86_INS_CMPNLTSD, "cmpnltsd" },
2199
  { X86_INS_CMPNLESD, "cmpnlesd" },
2200
  { X86_INS_CMPORDSD, "cmpordsd" },
2201
2202
  { X86_INS_CMPPS, "cmpps" },
2203
  { X86_INS_CMPEQPS, "cmpeqps" },
2204
  { X86_INS_CMPLTPS, "cmpltps" },
2205
  { X86_INS_CMPLEPS, "cmpleps" },
2206
  { X86_INS_CMPUNORDPS, "cmpunordps" },
2207
  { X86_INS_CMPNEQPS, "cmpneqps" },
2208
  { X86_INS_CMPNLTPS, "cmpnltps" },
2209
  { X86_INS_CMPNLEPS, "cmpnleps" },
2210
  { X86_INS_CMPORDPS, "cmpordps" },
2211
2212
  { X86_INS_CMPPD, "cmppd" },
2213
  { X86_INS_CMPEQPD, "cmpeqpd" },
2214
  { X86_INS_CMPLTPD, "cmpltpd" },
2215
  { X86_INS_CMPLEPD, "cmplepd" },
2216
  { X86_INS_CMPUNORDPD, "cmpunordpd" },
2217
  { X86_INS_CMPNEQPD, "cmpneqpd" },
2218
  { X86_INS_CMPNLTPD, "cmpnltpd" },
2219
  { X86_INS_CMPNLEPD, "cmpnlepd" },
2220
  { X86_INS_CMPORDPD, "cmpordpd" },
2221
2222
  { X86_INS_VCMPSS, "vcmpss" },
2223
  { X86_INS_VCMPEQSS, "vcmpeqss" },
2224
  { X86_INS_VCMPLTSS, "vcmpltss" },
2225
  { X86_INS_VCMPLESS, "vcmpless" },
2226
  { X86_INS_VCMPUNORDSS, "vcmpunordss" },
2227
  { X86_INS_VCMPNEQSS, "vcmpneqss" },
2228
  { X86_INS_VCMPNLTSS, "vcmpnltss" },
2229
  { X86_INS_VCMPNLESS, "vcmpnless" },
2230
  { X86_INS_VCMPORDSS, "vcmpordss" },
2231
  { X86_INS_VCMPEQ_UQSS, "vcmpeq_uqss" },
2232
  { X86_INS_VCMPNGESS, "vcmpngess" },
2233
  { X86_INS_VCMPNGTSS, "vcmpngtss" },
2234
  { X86_INS_VCMPFALSESS, "vcmpfalsess" },
2235
  { X86_INS_VCMPNEQ_OQSS, "vcmpneq_oqss" },
2236
  { X86_INS_VCMPGESS, "vcmpgess" },
2237
  { X86_INS_VCMPGTSS, "vcmpgtss" },
2238
  { X86_INS_VCMPTRUESS, "vcmptruess" },
2239
  { X86_INS_VCMPEQ_OSSS, "vcmpeq_osss" },
2240
  { X86_INS_VCMPLT_OQSS, "vcmplt_oqss" },
2241
  { X86_INS_VCMPLE_OQSS, "vcmple_oqss" },
2242
  { X86_INS_VCMPUNORD_SSS, "vcmpunord_sss" },
2243
  { X86_INS_VCMPNEQ_USSS, "vcmpneq_usss" },
2244
  { X86_INS_VCMPNLT_UQSS, "vcmpnlt_uqss" },
2245
  { X86_INS_VCMPNLE_UQSS, "vcmpnle_uqss" },
2246
  { X86_INS_VCMPORD_SSS, "vcmpord_sss" },
2247
  { X86_INS_VCMPEQ_USSS, "vcmpeq_usss" },
2248
  { X86_INS_VCMPNGE_UQSS, "vcmpnge_uqss" },
2249
  { X86_INS_VCMPNGT_UQSS, "vcmpngt_uqss" },
2250
  { X86_INS_VCMPFALSE_OSSS, "vcmpfalse_osss" },
2251
  { X86_INS_VCMPNEQ_OSSS, "vcmpneq_osss" },
2252
  { X86_INS_VCMPGE_OQSS, "vcmpge_oqss" },
2253
  { X86_INS_VCMPGT_OQSS, "vcmpgt_oqss" },
2254
  { X86_INS_VCMPTRUE_USSS, "vcmptrue_usss" },
2255
2256
  { X86_INS_VCMPSD, "vcmpsd" },
2257
  { X86_INS_VCMPEQSD, "vcmpeqsd" },
2258
  { X86_INS_VCMPLTSD, "vcmpltsd" },
2259
  { X86_INS_VCMPLESD, "vcmplesd" },
2260
  { X86_INS_VCMPUNORDSD, "vcmpunordsd" },
2261
  { X86_INS_VCMPNEQSD, "vcmpneqsd" },
2262
  { X86_INS_VCMPNLTSD, "vcmpnltsd" },
2263
  { X86_INS_VCMPNLESD, "vcmpnlesd" },
2264
  { X86_INS_VCMPORDSD, "vcmpordsd" },
2265
  { X86_INS_VCMPEQ_UQSD, "vcmpeq_uqsd" },
2266
  { X86_INS_VCMPNGESD, "vcmpngesd" },
2267
  { X86_INS_VCMPNGTSD, "vcmpngtsd" },
2268
  { X86_INS_VCMPFALSESD, "vcmpfalsesd" },
2269
  { X86_INS_VCMPNEQ_OQSD, "vcmpneq_oqsd" },
2270
  { X86_INS_VCMPGESD, "vcmpgesd" },
2271
  { X86_INS_VCMPGTSD, "vcmpgtsd" },
2272
  { X86_INS_VCMPTRUESD, "vcmptruesd" },
2273
  { X86_INS_VCMPEQ_OSSD, "vcmpeq_ossd" },
2274
  { X86_INS_VCMPLT_OQSD, "vcmplt_oqsd" },
2275
  { X86_INS_VCMPLE_OQSD, "vcmple_oqsd" },
2276
  { X86_INS_VCMPUNORD_SSD, "vcmpunord_ssd" },
2277
  { X86_INS_VCMPNEQ_USSD, "vcmpneq_ussd" },
2278
  { X86_INS_VCMPNLT_UQSD, "vcmpnlt_uqsd" },
2279
  { X86_INS_VCMPNLE_UQSD, "vcmpnle_uqsd" },
2280
  { X86_INS_VCMPORD_SSD, "vcmpord_ssd" },
2281
  { X86_INS_VCMPEQ_USSD, "vcmpeq_ussd" },
2282
  { X86_INS_VCMPNGE_UQSD, "vcmpnge_uqsd" },
2283
  { X86_INS_VCMPNGT_UQSD, "vcmpngt_uqsd" },
2284
  { X86_INS_VCMPFALSE_OSSD, "vcmpfalse_ossd" },
2285
  { X86_INS_VCMPNEQ_OSSD, "vcmpneq_ossd" },
2286
  { X86_INS_VCMPGE_OQSD, "vcmpge_oqsd" },
2287
  { X86_INS_VCMPGT_OQSD, "vcmpgt_oqsd" },
2288
  { X86_INS_VCMPTRUE_USSD, "vcmptrue_ussd" },
2289
2290
  { X86_INS_VCMPPS, "vcmpps" },
2291
  { X86_INS_VCMPEQPS, "vcmpeqps" },
2292
  { X86_INS_VCMPLTPS, "vcmpltps" },
2293
  { X86_INS_VCMPLEPS, "vcmpleps" },
2294
  { X86_INS_VCMPUNORDPS, "vcmpunordps" },
2295
  { X86_INS_VCMPNEQPS, "vcmpneqps" },
2296
  { X86_INS_VCMPNLTPS, "vcmpnltps" },
2297
  { X86_INS_VCMPNLEPS, "vcmpnleps" },
2298
  { X86_INS_VCMPORDPS, "vcmpordps" },
2299
  { X86_INS_VCMPEQ_UQPS, "vcmpeq_uqps" },
2300
  { X86_INS_VCMPNGEPS, "vcmpngeps" },
2301
  { X86_INS_VCMPNGTPS, "vcmpngtps" },
2302
  { X86_INS_VCMPFALSEPS, "vcmpfalseps" },
2303
  { X86_INS_VCMPNEQ_OQPS, "vcmpneq_oqps" },
2304
  { X86_INS_VCMPGEPS, "vcmpgeps" },
2305
  { X86_INS_VCMPGTPS, "vcmpgtps" },
2306
  { X86_INS_VCMPTRUEPS, "vcmptrueps" },
2307
  { X86_INS_VCMPEQ_OSPS, "vcmpeq_osps" },
2308
  { X86_INS_VCMPLT_OQPS, "vcmplt_oqps" },
2309
  { X86_INS_VCMPLE_OQPS, "vcmple_oqps" },
2310
  { X86_INS_VCMPUNORD_SPS, "vcmpunord_sps" },
2311
  { X86_INS_VCMPNEQ_USPS, "vcmpneq_usps" },
2312
  { X86_INS_VCMPNLT_UQPS, "vcmpnlt_uqps" },
2313
  { X86_INS_VCMPNLE_UQPS, "vcmpnle_uqps" },
2314
  { X86_INS_VCMPORD_SPS, "vcmpord_sps" },
2315
  { X86_INS_VCMPEQ_USPS, "vcmpeq_usps" },
2316
  { X86_INS_VCMPNGE_UQPS, "vcmpnge_uqps" },
2317
  { X86_INS_VCMPNGT_UQPS, "vcmpngt_uqps" },
2318
  { X86_INS_VCMPFALSE_OSPS, "vcmpfalse_osps" },
2319
  { X86_INS_VCMPNEQ_OSPS, "vcmpneq_osps" },
2320
  { X86_INS_VCMPGE_OQPS, "vcmpge_oqps" },
2321
  { X86_INS_VCMPGT_OQPS, "vcmpgt_oqps" },
2322
  { X86_INS_VCMPTRUE_USPS, "vcmptrue_usps" },
2323
2324
  { X86_INS_VCMPPD, "vcmppd" },
2325
  { X86_INS_VCMPEQPD, "vcmpeqpd" },
2326
  { X86_INS_VCMPLTPD, "vcmpltpd" },
2327
  { X86_INS_VCMPLEPD, "vcmplepd" },
2328
  { X86_INS_VCMPUNORDPD, "vcmpunordpd" },
2329
  { X86_INS_VCMPNEQPD, "vcmpneqpd" },
2330
  { X86_INS_VCMPNLTPD, "vcmpnltpd" },
2331
  { X86_INS_VCMPNLEPD, "vcmpnlepd" },
2332
  { X86_INS_VCMPORDPD, "vcmpordpd" },
2333
  { X86_INS_VCMPEQ_UQPD, "vcmpeq_uqpd" },
2334
  { X86_INS_VCMPNGEPD, "vcmpngepd" },
2335
  { X86_INS_VCMPNGTPD, "vcmpngtpd" },
2336
  { X86_INS_VCMPFALSEPD, "vcmpfalsepd" },
2337
  { X86_INS_VCMPNEQ_OQPD, "vcmpneq_oqpd" },
2338
  { X86_INS_VCMPGEPD, "vcmpgepd" },
2339
  { X86_INS_VCMPGTPD, "vcmpgtpd" },
2340
  { X86_INS_VCMPTRUEPD, "vcmptruepd" },
2341
  { X86_INS_VCMPEQ_OSPD, "vcmpeq_ospd" },
2342
  { X86_INS_VCMPLT_OQPD, "vcmplt_oqpd" },
2343
  { X86_INS_VCMPLE_OQPD, "vcmple_oqpd" },
2344
  { X86_INS_VCMPUNORD_SPD, "vcmpunord_spd" },
2345
  { X86_INS_VCMPNEQ_USPD, "vcmpneq_uspd" },
2346
  { X86_INS_VCMPNLT_UQPD, "vcmpnlt_uqpd" },
2347
  { X86_INS_VCMPNLE_UQPD, "vcmpnle_uqpd" },
2348
  { X86_INS_VCMPORD_SPD, "vcmpord_spd" },
2349
  { X86_INS_VCMPEQ_USPD, "vcmpeq_uspd" },
2350
  { X86_INS_VCMPNGE_UQPD, "vcmpnge_uqpd" },
2351
  { X86_INS_VCMPNGT_UQPD, "vcmpngt_uqpd" },
2352
  { X86_INS_VCMPFALSE_OSPD, "vcmpfalse_ospd" },
2353
  { X86_INS_VCMPNEQ_OSPD, "vcmpneq_ospd" },
2354
  { X86_INS_VCMPGE_OQPD, "vcmpge_oqpd" },
2355
  { X86_INS_VCMPGT_OQPD, "vcmpgt_oqpd" },
2356
  { X86_INS_VCMPTRUE_USPD, "vcmptrue_uspd" },
2357
2358
  { X86_INS_UD0, "ud0" },
2359
  { X86_INS_ENDBR32, "endbr32" },
2360
  { X86_INS_ENDBR64, "endbr64" },
2361
};
2362
#endif
2363
2364
const char *X86_insn_name(csh handle, unsigned int id)
2365
0
{
2366
0
#ifndef CAPSTONE_DIET
2367
0
  if (id >= X86_INS_ENDING)
2368
0
    return NULL;
2369
2370
0
  return insn_name_maps[id].name;
2371
#else
2372
  return NULL;
2373
#endif
2374
0
}
2375
2376
#ifndef CAPSTONE_DIET
2377
static const name_map group_name_maps[] = {
2378
  // generic groups
2379
  { X86_GRP_INVALID, NULL },
2380
  { X86_GRP_JUMP, "jump" },
2381
  { X86_GRP_CALL, "call" },
2382
  { X86_GRP_RET, "ret" },
2383
  { X86_GRP_INT, "int" },
2384
  { X86_GRP_IRET, "iret" },
2385
  { X86_GRP_PRIVILEGE, "privilege" },
2386
  { X86_GRP_BRANCH_RELATIVE, "branch_relative" },
2387
2388
  // architecture-specific groups
2389
  { X86_GRP_VM, "vm" },
2390
  { X86_GRP_3DNOW, "3dnow" },
2391
  { X86_GRP_AES, "aes" },
2392
  { X86_GRP_ADX, "adx" },
2393
  { X86_GRP_AVX, "avx" },
2394
  { X86_GRP_AVX2, "avx2" },
2395
  { X86_GRP_AVX512, "avx512" },
2396
  { X86_GRP_BMI, "bmi" },
2397
  { X86_GRP_BMI2, "bmi2" },
2398
  { X86_GRP_CMOV, "cmov" },
2399
  { X86_GRP_F16C, "fc16" },
2400
  { X86_GRP_FMA, "fma" },
2401
  { X86_GRP_FMA4, "fma4" },
2402
  { X86_GRP_FSGSBASE, "fsgsbase" },
2403
  { X86_GRP_HLE, "hle" },
2404
  { X86_GRP_MMX, "mmx" },
2405
  { X86_GRP_MODE32, "mode32" },
2406
  { X86_GRP_MODE64, "mode64" },
2407
  { X86_GRP_RTM, "rtm" },
2408
  { X86_GRP_SHA, "sha" },
2409
  { X86_GRP_SSE1, "sse1" },
2410
  { X86_GRP_SSE2, "sse2" },
2411
  { X86_GRP_SSE3, "sse3" },
2412
  { X86_GRP_SSE41, "sse41" },
2413
  { X86_GRP_SSE42, "sse42" },
2414
  { X86_GRP_SSE4A, "sse4a" },
2415
  { X86_GRP_SSSE3, "ssse3" },
2416
  { X86_GRP_PCLMUL, "pclmul" },
2417
  { X86_GRP_XOP, "xop" },
2418
  { X86_GRP_CDI, "cdi" },
2419
  { X86_GRP_ERI, "eri" },
2420
  { X86_GRP_TBM, "tbm" },
2421
  { X86_GRP_16BITMODE, "16bitmode" },
2422
  { X86_GRP_NOT64BITMODE, "not64bitmode" },
2423
  { X86_GRP_SGX,  "sgx" },
2424
  { X86_GRP_DQI,  "dqi" },
2425
  { X86_GRP_BWI,  "bwi" },
2426
  { X86_GRP_PFI,  "pfi" },
2427
  { X86_GRP_VLX,  "vlx" },
2428
  { X86_GRP_SMAP, "smap" },
2429
  { X86_GRP_NOVLX, "novlx" },
2430
  { X86_GRP_FPU, "fpu" },
2431
};
2432
#endif
2433
2434
const char *X86_group_name(csh handle, unsigned int id)
2435
0
{
2436
0
#ifndef CAPSTONE_DIET
2437
0
  return id2name(group_name_maps, ARR_SIZE(group_name_maps), id);
2438
#else
2439
  return NULL;
2440
#endif
2441
0
}
2442
2443
#define GET_INSTRINFO_ENUM
2444
#ifdef CAPSTONE_X86_REDUCE
2445
#include "X86GenInstrInfo_reduce.inc"
2446
#else
2447
#include "X86GenInstrInfo.inc"
2448
#endif
2449
2450
#ifndef CAPSTONE_X86_REDUCE
2451
static const insn_map insns[] = { // full x86 instructions
2452
  // dummy item
2453
  {
2454
    0, 0,
2455
#ifndef CAPSTONE_DIET
2456
    { 0 }, { 0 }, { 0 }, 0, 0
2457
#endif
2458
  },
2459
2460
#include "X86MappingInsn.inc"
2461
};
2462
#else // X86 reduce (defined CAPSTONE_X86_REDUCE)
2463
static insn_map insns[] = { // reduce x86 instructions
2464
  // dummy item
2465
  {
2466
    0, 0,
2467
#ifndef CAPSTONE_DIET
2468
    { 0 }, { 0 }, { 0 }, 0, 0
2469
#endif
2470
  },
2471
2472
#include "X86MappingInsn_reduce.inc"
2473
};
2474
#endif
2475
2476
#ifndef CAPSTONE_DIET
2477
// replace r1 = r2
2478
static void arr_replace(uint16_t *arr, uint8_t max, x86_reg r1, x86_reg r2)
2479
278k
{
2480
278k
  uint8_t i;
2481
2482
417k
  for(i = 0; i < max; i++) {
2483
410k
    if (arr[i] == r1) {
2484
272k
      arr[i] = r2;
2485
272k
      break;
2486
272k
    }
2487
410k
  }
2488
278k
}
2489
#endif
2490
2491
// given internal insn id, return public instruction info
2492
void X86_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
2493
36.2M
{
2494
36.2M
  int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache);
2495
36.2M
  if (i != 0) {
2496
36.2M
    insn->id = insns[i].mapid;
2497
2498
36.2M
    if (h->detail) {
2499
36.2M
#ifndef CAPSTONE_DIET
2500
36.2M
      memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
2501
36.2M
      insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use);
2502
2503
      // special cases when regs_write[] depends on arch
2504
36.2M
      switch(id) {
2505
36.2M
        default:
2506
36.2M
          memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
2507
36.2M
          insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
2508
36.2M
          break;
2509
1.31k
        case X86_RDTSC:
2510
1.31k
          if (h->mode == CS_MODE_64) {
2511
128
            memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
2512
128
            insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
2513
1.18k
          } else {
2514
1.18k
            insn->detail->regs_write[0] = X86_REG_EAX;
2515
1.18k
            insn->detail->regs_write[1] = X86_REG_EDX;
2516
1.18k
            insn->detail->regs_write_count = 2;
2517
1.18k
          }
2518
1.31k
          break;
2519
213
        case X86_RDTSCP:
2520
213
          if (h->mode == CS_MODE_64) {
2521
210
            memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
2522
210
            insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
2523
210
          } else {
2524
3
            insn->detail->regs_write[0] = X86_REG_EAX;
2525
3
            insn->detail->regs_write[1] = X86_REG_ECX;
2526
3
            insn->detail->regs_write[2] = X86_REG_EDX;
2527
3
            insn->detail->regs_write_count = 3;
2528
3
          }
2529
213
          break;
2530
36.2M
      }
2531
2532
36.2M
      switch(insn->id) {
2533
35.6M
        default:
2534
35.6M
          break;
2535
2536
35.6M
        case X86_INS_LOOP:
2537
143k
        case X86_INS_LOOPE:
2538
162k
        case X86_INS_LOOPNE:
2539
162k
          switch(h->mode) {
2540
0
            default: break;
2541
0
            case CS_MODE_16:
2542
0
                 insn->detail->regs_read[0] = X86_REG_CX;
2543
0
                 insn->detail->regs_read_count = 1;
2544
0
                 insn->detail->regs_write[0] = X86_REG_CX;
2545
0
                 insn->detail->regs_write_count = 1;
2546
0
                 break;
2547
133k
            case CS_MODE_32:
2548
133k
                 insn->detail->regs_read[0] = X86_REG_ECX;
2549
133k
                 insn->detail->regs_read_count = 1;
2550
133k
                 insn->detail->regs_write[0] = X86_REG_ECX;
2551
133k
                 insn->detail->regs_write_count = 1;
2552
133k
                 break;
2553
29.7k
            case CS_MODE_64:
2554
29.7k
                 insn->detail->regs_read[0] = X86_REG_RCX;
2555
29.7k
                 insn->detail->regs_read_count = 1;
2556
29.7k
                 insn->detail->regs_write[0] = X86_REG_RCX;
2557
29.7k
                 insn->detail->regs_write_count = 1;
2558
29.7k
                 break;
2559
162k
          }
2560
2561
          // LOOPE & LOOPNE also read EFLAGS
2562
162k
          if (insn->id != X86_INS_LOOP) {
2563
117k
            insn->detail->regs_read[1] = X86_REG_EFLAGS;
2564
117k
            insn->detail->regs_read_count = 2;
2565
117k
          }
2566
2567
162k
          break;
2568
2569
17.1k
        case X86_INS_LODSB:
2570
36.9k
        case X86_INS_LODSD:
2571
37.2k
        case X86_INS_LODSQ:
2572
38.3k
        case X86_INS_LODSW:
2573
38.3k
          switch(h->mode) {
2574
35.1k
            default:
2575
35.1k
              break;
2576
35.1k
            case CS_MODE_16:
2577
0
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_SI);
2578
0
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_SI);
2579
0
              break;
2580
3.20k
            case CS_MODE_64:
2581
3.20k
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_RSI);
2582
3.20k
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_RSI);
2583
3.20k
              break;
2584
38.3k
          }
2585
38.3k
          break;
2586
2587
38.3k
        case X86_INS_SCASB:
2588
31.1k
        case X86_INS_SCASW:
2589
31.3k
        case X86_INS_SCASQ:
2590
69.4k
        case X86_INS_STOSB:
2591
83.3k
        case X86_INS_STOSD:
2592
83.7k
        case X86_INS_STOSQ:
2593
85.8k
        case X86_INS_STOSW:
2594
85.8k
          switch(h->mode) {
2595
61.3k
            default:
2596
61.3k
              break;
2597
61.3k
            case CS_MODE_16:
2598
0
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_DI);
2599
0
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_DI);
2600
0
              break;
2601
24.4k
            case CS_MODE_64:
2602
24.4k
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_RDI);
2603
24.4k
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_RDI);
2604
24.4k
              break;
2605
85.8k
          }
2606
85.8k
          break;
2607
2608
85.8k
        case X86_INS_CMPSB:
2609
96.5k
        case X86_INS_CMPSD:
2610
96.8k
        case X86_INS_CMPSQ:
2611
134k
        case X86_INS_CMPSW:
2612
153k
        case X86_INS_MOVSB:
2613
155k
        case X86_INS_MOVSW:
2614
171k
        case X86_INS_MOVSD:
2615
194k
        case X86_INS_MOVSQ:
2616
194k
          switch(h->mode) {
2617
139k
            default:
2618
139k
              break;
2619
139k
            case CS_MODE_16:
2620
0
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_DI);
2621
0
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_DI);
2622
0
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_SI);
2623
0
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_SI);
2624
0
              break;
2625
55.8k
            case CS_MODE_64:
2626
55.8k
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_EDI, X86_REG_RDI);
2627
55.8k
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_EDI, X86_REG_RDI);
2628
55.8k
              arr_replace(insn->detail->regs_read, insn->detail->regs_read_count, X86_REG_ESI, X86_REG_RSI);
2629
55.8k
              arr_replace(insn->detail->regs_write, insn->detail->regs_write_count, X86_REG_ESI, X86_REG_RSI);
2630
55.8k
              break;
2631
194k
          }
2632
194k
          break;
2633
2634
194k
        case X86_INS_RET:
2635
63.6k
          switch(h->mode) {
2636
0
            case CS_MODE_16:
2637
0
              insn->detail->regs_write[0] = X86_REG_SP;
2638
0
              insn->detail->regs_read[0] = X86_REG_SP;
2639
0
              break;
2640
57.7k
            case CS_MODE_32:
2641
57.7k
              insn->detail->regs_write[0] = X86_REG_ESP;
2642
57.7k
              insn->detail->regs_read[0] = X86_REG_ESP;
2643
57.7k
              break;
2644
5.82k
            default:  // 64-bit
2645
5.82k
              insn->detail->regs_write[0] = X86_REG_RSP;
2646
5.82k
              insn->detail->regs_read[0] = X86_REG_RSP;
2647
5.82k
              break;
2648
63.6k
          }
2649
63.6k
          insn->detail->regs_write_count = 1;
2650
63.6k
          insn->detail->regs_read_count = 1;
2651
63.6k
          break;
2652
36.2M
      }
2653
2654
36.2M
      memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
2655
36.2M
      insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups);
2656
2657
36.2M
      if (insns[i].branch || insns[i].indirect_branch) {
2658
        // this insn also belongs to JUMP group. add JUMP group
2659
1.90M
        insn->detail->groups[insn->detail->groups_count] = X86_GRP_JUMP;
2660
1.90M
        insn->detail->groups_count++;
2661
1.90M
      }
2662
2663
36.2M
      switch (insns[i].id) {
2664
15.4k
        case X86_OUT8ir:
2665
15.7k
        case X86_OUT16ir:
2666
33.9k
        case X86_OUT32ir:
2667
33.9k
          if (insn->detail->x86.operands[0].imm == -78) {
2668
            // Writing to port 0xb2 causes an SMI on most platforms
2669
            // See: http://cs.gmu.edu/~tr-admin/papers/GMU-CS-TR-2011-8.pdf
2670
0
            insn->detail->groups[insn->detail->groups_count] = X86_GRP_INT;
2671
0
            insn->detail->groups_count++;
2672
0
          }
2673
33.9k
          break;
2674
2675
36.2M
        default:
2676
36.2M
          break;
2677
36.2M
      }
2678
36.2M
#endif
2679
36.2M
    }
2680
36.2M
  }
2681
36.2M
}
2682
2683
// map special instructions with accumulate registers.
2684
// this is needed because LLVM embeds these register names into AsmStrs[],
2685
// but not separately in operands
2686
struct insn_reg {
2687
  uint16_t insn;
2688
  x86_reg reg;
2689
  enum cs_ac_type access;
2690
};
2691
2692
struct insn_reg2 {
2693
  uint16_t insn;
2694
  x86_reg reg1, reg2;
2695
  enum cs_ac_type access1, access2;
2696
};
2697
2698
static struct insn_reg insn_regs_att[] = {
2699
  { X86_INSB, X86_REG_DX },
2700
  { X86_INSW, X86_REG_DX },
2701
  { X86_INSL, X86_REG_DX },
2702
2703
  { X86_MOV8o16a, X86_REG_AL },
2704
  { X86_MOV8o32a, X86_REG_AL },
2705
  { X86_MOV8o64a, X86_REG_AL },
2706
2707
  { X86_MOV16o16a, X86_REG_AX },
2708
  { X86_MOV16o32a, X86_REG_AX },
2709
  { X86_MOV16o64a, X86_REG_AX },
2710
2711
  { X86_MOV32o16a, X86_REG_EAX },
2712
  { X86_MOV32o32a, X86_REG_EAX },
2713
  { X86_MOV32o64a, X86_REG_EAX },
2714
2715
  { X86_MOV64o32a, X86_REG_RAX },
2716
  { X86_MOV64o64a, X86_REG_RAX },
2717
2718
  { X86_PUSHCS32, X86_REG_CS },
2719
  { X86_PUSHDS32, X86_REG_DS },
2720
  { X86_PUSHES32, X86_REG_ES },
2721
  { X86_PUSHFS32, X86_REG_FS },
2722
  { X86_PUSHGS32, X86_REG_GS },
2723
  { X86_PUSHSS32, X86_REG_SS },
2724
2725
  { X86_PUSHFS64, X86_REG_FS },
2726
  { X86_PUSHGS64, X86_REG_GS },
2727
2728
  { X86_PUSHCS16, X86_REG_CS },
2729
  { X86_PUSHDS16, X86_REG_DS },
2730
  { X86_PUSHES16, X86_REG_ES },
2731
  { X86_PUSHFS16, X86_REG_FS },
2732
  { X86_PUSHGS16, X86_REG_GS },
2733
  { X86_PUSHSS16, X86_REG_SS },
2734
2735
  { X86_POPDS32, X86_REG_DS },
2736
  { X86_POPES32, X86_REG_ES },
2737
  { X86_POPFS32, X86_REG_FS },
2738
  { X86_POPGS32, X86_REG_GS },
2739
  { X86_POPSS32, X86_REG_SS },
2740
2741
  { X86_POPFS64, X86_REG_FS },
2742
  { X86_POPGS64, X86_REG_GS },
2743
2744
  { X86_POPDS16, X86_REG_DS },
2745
  { X86_POPES16, X86_REG_ES },
2746
  { X86_POPFS16, X86_REG_FS },
2747
  { X86_POPGS16, X86_REG_GS },
2748
  { X86_POPSS16, X86_REG_SS },
2749
2750
  { X86_RCL32rCL, X86_REG_CL },
2751
  { X86_SHL8rCL, X86_REG_CL },
2752
  { X86_SHL16rCL, X86_REG_CL },
2753
  { X86_SHL32rCL, X86_REG_CL },
2754
  { X86_SHL64rCL, X86_REG_CL },
2755
  { X86_SAL8rCL, X86_REG_CL },
2756
  { X86_SAL16rCL, X86_REG_CL },
2757
  { X86_SAL32rCL, X86_REG_CL },
2758
  { X86_SAL64rCL, X86_REG_CL },
2759
  { X86_SHR8rCL, X86_REG_CL },
2760
  { X86_SHR16rCL, X86_REG_CL },
2761
  { X86_SHR32rCL, X86_REG_CL },
2762
  { X86_SHR64rCL, X86_REG_CL },
2763
  { X86_SAR8rCL, X86_REG_CL },
2764
  { X86_SAR16rCL, X86_REG_CL },
2765
  { X86_SAR32rCL, X86_REG_CL },
2766
  { X86_SAR64rCL, X86_REG_CL },
2767
  { X86_RCL8rCL, X86_REG_CL },
2768
  { X86_RCL16rCL, X86_REG_CL },
2769
  { X86_RCL32rCL, X86_REG_CL },
2770
  { X86_RCL64rCL, X86_REG_CL },
2771
  { X86_RCR8rCL, X86_REG_CL },
2772
  { X86_RCR16rCL, X86_REG_CL },
2773
  { X86_RCR32rCL, X86_REG_CL },
2774
  { X86_RCR64rCL, X86_REG_CL },
2775
  { X86_ROL8rCL, X86_REG_CL },
2776
  { X86_ROL16rCL, X86_REG_CL },
2777
  { X86_ROL32rCL, X86_REG_CL },
2778
  { X86_ROL64rCL, X86_REG_CL },
2779
  { X86_ROR8rCL, X86_REG_CL },
2780
  { X86_ROR16rCL, X86_REG_CL },
2781
  { X86_ROR32rCL, X86_REG_CL },
2782
  { X86_ROR64rCL, X86_REG_CL },
2783
  { X86_SHLD16rrCL, X86_REG_CL },
2784
  { X86_SHRD16rrCL, X86_REG_CL },
2785
  { X86_SHLD32rrCL, X86_REG_CL },
2786
  { X86_SHRD32rrCL, X86_REG_CL },
2787
  { X86_SHLD64rrCL, X86_REG_CL },
2788
  { X86_SHRD64rrCL, X86_REG_CL },
2789
  { X86_SHLD16mrCL, X86_REG_CL },
2790
  { X86_SHRD16mrCL, X86_REG_CL },
2791
  { X86_SHLD32mrCL, X86_REG_CL },
2792
  { X86_SHRD32mrCL, X86_REG_CL },
2793
  { X86_SHLD64mrCL, X86_REG_CL },
2794
  { X86_SHRD64mrCL, X86_REG_CL },
2795
2796
  { X86_OUT8ir, X86_REG_AL },
2797
  { X86_OUT16ir, X86_REG_AX },
2798
  { X86_OUT32ir, X86_REG_EAX },
2799
2800
#ifndef CAPSTONE_X86_REDUCE
2801
  { X86_SKINIT, X86_REG_EAX },
2802
  { X86_VMRUN32, X86_REG_EAX },
2803
  { X86_VMRUN64, X86_REG_RAX },
2804
  { X86_VMLOAD32, X86_REG_EAX },
2805
  { X86_VMLOAD64, X86_REG_RAX },
2806
  { X86_VMSAVE32, X86_REG_EAX },
2807
  { X86_VMSAVE64, X86_REG_RAX },
2808
2809
  { X86_FNSTSW16r, X86_REG_AX },
2810
2811
  { X86_ADD_FrST0, X86_REG_ST0 },
2812
  { X86_SUB_FrST0, X86_REG_ST0 },
2813
  { X86_SUBR_FrST0, X86_REG_ST0 },
2814
  { X86_MUL_FrST0, X86_REG_ST0 },
2815
  { X86_DIV_FrST0, X86_REG_ST0 },
2816
  { X86_DIVR_FrST0, X86_REG_ST0 },
2817
#endif
2818
};
2819
2820
static struct insn_reg insn_regs_intel[] = {
2821
  { X86_OUTSB, X86_REG_DX, CS_AC_WRITE },
2822
  { X86_OUTSW, X86_REG_DX, CS_AC_WRITE },
2823
  { X86_OUTSL, X86_REG_DX, CS_AC_WRITE },
2824
2825
  { X86_MOV8ao16, X86_REG_AL, CS_AC_WRITE },     // 16-bit A0 1020                  // mov     al, byte ptr [0x2010]
2826
  { X86_MOV8ao32, X86_REG_AL, CS_AC_WRITE },     // 32-bit A0 10203040              // mov     al, byte ptr [0x40302010]
2827
  { X86_MOV8ao64, X86_REG_AL, CS_AC_WRITE },     // 64-bit 66 A0 1020304050607080   // movabs  al, byte ptr [0x8070605040302010]
2828
2829
  { X86_MOV16ao16, X86_REG_AX, CS_AC_WRITE },    // 16-bit A1 1020                  // mov     ax, word ptr [0x2010]
2830
  { X86_MOV16ao32, X86_REG_AX, CS_AC_WRITE },    // 32-bit A1 10203040              // mov     ax, word ptr [0x40302010]
2831
  { X86_MOV16ao64, X86_REG_AX, CS_AC_WRITE },    // 64-bit 66 A1 1020304050607080   // movabs  ax, word ptr [0x8070605040302010]
2832
2833
  { X86_MOV32ao16, X86_REG_EAX, CS_AC_WRITE },   // 32-bit 67 A1 1020               // mov     eax, dword ptr [0x2010]
2834
  { X86_MOV32ao32, X86_REG_EAX, CS_AC_WRITE },   // 32-bit A1 10203040              // mov     eax, dword ptr [0x40302010]
2835
  { X86_MOV32ao64, X86_REG_EAX, CS_AC_WRITE },   // 64-bit A1 1020304050607080      // movabs  eax, dword ptr [0x8070605040302010]
2836
2837
  { X86_MOV64ao32, X86_REG_RAX, CS_AC_WRITE },   // 64-bit 48 8B04 10203040         // mov     rax, qword ptr [0x40302010]
2838
  { X86_MOV64ao64, X86_REG_RAX, CS_AC_WRITE },   // 64-bit 48 A1 1020304050607080   // movabs  rax, qword ptr [0x8070605040302010]
2839
2840
  { X86_LODSQ, X86_REG_RAX, CS_AC_WRITE },
2841
  { X86_OR32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2842
  { X86_SUB32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2843
  { X86_TEST32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2844
  { X86_ADD32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2845
  { X86_XCHG64ar, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2846
  { X86_LODSB, X86_REG_AL, CS_AC_WRITE },
2847
  { X86_AND32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2848
  { X86_IN16ri, X86_REG_AX, CS_AC_WRITE },
2849
  { X86_CMP64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2850
  { X86_XOR32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2851
  { X86_XCHG16ar, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2852
  { X86_LODSW, X86_REG_AX, CS_AC_WRITE },
2853
  { X86_AND16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2854
  { X86_ADC16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2855
  { X86_XCHG32ar64, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2856
  { X86_ADC8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2857
  { X86_CMP32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2858
  { X86_AND8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2859
  { X86_SCASW, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2860
  { X86_XOR8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2861
  { X86_SUB16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2862
  { X86_OR16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2863
  { X86_XCHG32ar, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2864
  { X86_SBB8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2865
  { X86_SCASQ, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2866
  { X86_SBB32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2867
  { X86_XOR64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2868
  { X86_SUB64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2869
  { X86_ADD64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2870
  { X86_OR8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2871
  { X86_TEST64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2872
  { X86_SBB16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2873
  { X86_TEST8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2874
  { X86_IN8ri, X86_REG_AL, CS_AC_WRITE },
2875
  { X86_TEST16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2876
  { X86_SCASL, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2877
  { X86_SUB8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2878
  { X86_ADD8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2879
  { X86_OR64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2880
  { X86_SCASB, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2881
  { X86_SBB64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2882
  { X86_ADD16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2883
  { X86_XOR16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2884
  { X86_AND64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2885
  { X86_LODSL, X86_REG_EAX, CS_AC_WRITE },
2886
  { X86_CMP8i8, X86_REG_AL, CS_AC_WRITE | CS_AC_READ },
2887
  { X86_ADC64i32, X86_REG_RAX, CS_AC_WRITE | CS_AC_READ },
2888
  { X86_CMP16i16, X86_REG_AX, CS_AC_WRITE | CS_AC_READ },
2889
  { X86_ADC32i32, X86_REG_EAX, CS_AC_WRITE | CS_AC_READ },
2890
  { X86_IN32ri, X86_REG_EAX, CS_AC_WRITE },
2891
2892
  { X86_PUSHCS32, X86_REG_CS, CS_AC_READ },
2893
  { X86_PUSHDS32, X86_REG_DS, CS_AC_READ },
2894
  { X86_PUSHES32, X86_REG_ES, CS_AC_READ },
2895
  { X86_PUSHFS32, X86_REG_FS, CS_AC_READ },
2896
  { X86_PUSHGS32, X86_REG_GS, CS_AC_READ },
2897
  { X86_PUSHSS32, X86_REG_SS, CS_AC_READ },
2898
2899
  { X86_PUSHFS64, X86_REG_FS, CS_AC_READ },
2900
  { X86_PUSHGS64, X86_REG_GS, CS_AC_READ },
2901
2902
  { X86_PUSHCS16, X86_REG_CS, CS_AC_READ },
2903
  { X86_PUSHDS16, X86_REG_DS, CS_AC_READ },
2904
  { X86_PUSHES16, X86_REG_ES, CS_AC_READ },
2905
  { X86_PUSHFS16, X86_REG_FS, CS_AC_READ },
2906
  { X86_PUSHGS16, X86_REG_GS, CS_AC_READ },
2907
  { X86_PUSHSS16, X86_REG_SS, CS_AC_READ },
2908
2909
  { X86_POPDS32, X86_REG_DS, CS_AC_WRITE },
2910
  { X86_POPES32, X86_REG_ES, CS_AC_WRITE },
2911
  { X86_POPFS32, X86_REG_FS, CS_AC_WRITE },
2912
  { X86_POPGS32, X86_REG_GS, CS_AC_WRITE },
2913
  { X86_POPSS32, X86_REG_SS, CS_AC_WRITE },
2914
2915
  { X86_POPFS64, X86_REG_FS, CS_AC_WRITE },
2916
  { X86_POPGS64, X86_REG_GS, CS_AC_WRITE },
2917
2918
  { X86_POPDS16, X86_REG_DS, CS_AC_WRITE },
2919
  { X86_POPES16, X86_REG_ES, CS_AC_WRITE },
2920
  { X86_POPFS16, X86_REG_FS, CS_AC_WRITE },
2921
  { X86_POPGS16, X86_REG_GS, CS_AC_WRITE },
2922
  { X86_POPSS16, X86_REG_SS, CS_AC_WRITE },
2923
2924
#ifndef CAPSTONE_X86_REDUCE
2925
  { X86_SKINIT, X86_REG_EAX, CS_AC_WRITE },
2926
  { X86_VMRUN32, X86_REG_EAX, CS_AC_WRITE },
2927
  { X86_VMRUN64, X86_REG_RAX, CS_AC_WRITE },
2928
  { X86_VMLOAD32, X86_REG_EAX, CS_AC_WRITE },
2929
  { X86_VMLOAD64, X86_REG_RAX, CS_AC_WRITE },
2930
  { X86_VMSAVE32, X86_REG_EAX, CS_AC_READ },
2931
  { X86_VMSAVE64, X86_REG_RAX, CS_AC_READ },
2932
2933
  { X86_FNSTSW16r, X86_REG_AX, CS_AC_WRITE },
2934
2935
  { X86_CMOVB_F, X86_REG_ST0, CS_AC_WRITE },
2936
  { X86_CMOVBE_F, X86_REG_ST0, CS_AC_WRITE },
2937
  { X86_CMOVE_F, X86_REG_ST0, CS_AC_WRITE },
2938
  { X86_CMOVP_F, X86_REG_ST0, CS_AC_WRITE },
2939
  { X86_CMOVNB_F, X86_REG_ST0, CS_AC_WRITE },
2940
  { X86_CMOVNBE_F, X86_REG_ST0, CS_AC_WRITE },
2941
  { X86_CMOVNE_F, X86_REG_ST0, CS_AC_WRITE },
2942
  { X86_CMOVNP_F, X86_REG_ST0, CS_AC_WRITE },
2943
  { X86_ST_FXCHST0r, X86_REG_ST0, CS_AC_WRITE },
2944
  { X86_ST_FXCHST0r_alt, X86_REG_ST0, CS_AC_WRITE },
2945
  { X86_ST_FCOMST0r, X86_REG_ST0, CS_AC_WRITE },
2946
  { X86_ST_FCOMPST0r, X86_REG_ST0, CS_AC_WRITE },
2947
  { X86_ST_FCOMPST0r_alt, X86_REG_ST0, CS_AC_WRITE },
2948
  { X86_ST_FPST0r, X86_REG_ST0, CS_AC_WRITE },
2949
  { X86_ST_FPST0r_alt, X86_REG_ST0, CS_AC_WRITE },
2950
  { X86_ST_FPNCEST0r, X86_REG_ST0, CS_AC_WRITE },
2951
#endif
2952
};
2953
2954
static struct insn_reg2 insn_regs_intel2[] = {
2955
  { X86_IN8rr, X86_REG_AL, X86_REG_DX, CS_AC_WRITE, CS_AC_READ },
2956
  { X86_IN16rr, X86_REG_AX, X86_REG_DX, CS_AC_WRITE, CS_AC_READ },
2957
  { X86_IN32rr, X86_REG_EAX, X86_REG_DX, CS_AC_WRITE, CS_AC_READ },
2958
2959
  { X86_OUT8rr, X86_REG_DX, X86_REG_AL, CS_AC_READ, CS_AC_READ },
2960
  { X86_OUT16rr, X86_REG_DX, X86_REG_AX, CS_AC_READ, CS_AC_READ },
2961
  { X86_OUT32rr, X86_REG_DX, X86_REG_EAX, CS_AC_READ, CS_AC_READ },
2962
2963
  { X86_INVLPGA32, X86_REG_EAX, X86_REG_ECX, CS_AC_READ, CS_AC_READ },
2964
  { X86_INVLPGA64, X86_REG_RAX, X86_REG_ECX, CS_AC_READ, CS_AC_READ },
2965
};
2966
2967
static struct insn_reg insn_regs_intel_sorted [ARR_SIZE(insn_regs_intel)];
2968
2969
// Explicitly specified calling convention with CAPSTONE_API so that it is always
2970
// compiled as __cdecl on MSVC and does not cause a compile error even when
2971
// default calling convention is __stdcall (eg. capstone_static_winkernel project)
2972
static int CAPSTONE_API regs_cmp(const void *a, const void *b)
2973
610
{
2974
610
  uint16_t l = ((struct insn_reg *)a)->insn;
2975
610
  uint16_t r = ((struct insn_reg *)b)->insn;
2976
610
  return (l - r);
2977
610
}
2978
2979
// return register of given instruction id
2980
// return 0 if not found
2981
// this is to handle instructions embedding accumulate registers into AsmStrs[]
2982
x86_reg X86_insn_reg_intel(unsigned int id, enum cs_ac_type *access)
2983
36.2M
{
2984
36.2M
  static bool intel_regs_sorted = false;
2985
36.2M
  unsigned int first = 0;
2986
36.2M
  unsigned int last = ARR_SIZE(insn_regs_intel) - 1;
2987
36.2M
  unsigned int mid;
2988
2989
36.2M
  if (!intel_regs_sorted) {
2990
1
    memcpy(insn_regs_intel_sorted, insn_regs_intel,
2991
1
        sizeof(insn_regs_intel_sorted));
2992
1
    qsort(insn_regs_intel_sorted,
2993
1
        ARR_SIZE(insn_regs_intel_sorted),
2994
1
        sizeof(struct insn_reg), regs_cmp);
2995
1
    intel_regs_sorted = true;
2996
1
  }
2997
2998
36.2M
  if (insn_regs_intel_sorted[0].insn > id ||
2999
36.2M
      insn_regs_intel_sorted[last].insn < id) {
3000
491k
    return 0;
3001
491k
  }
3002
3003
279M
  while (first <= last) {
3004
247M
    mid = (first + last) / 2;
3005
247M
    if (insn_regs_intel_sorted[mid].insn < id) {
3006
98.9M
      first = mid + 1;
3007
148M
    } else if (insn_regs_intel_sorted[mid].insn == id) {
3008
2.92M
      if (access) {
3009
2.92M
        *access = insn_regs_intel_sorted[mid].access;
3010
2.92M
      }
3011
2.92M
      return insn_regs_intel_sorted[mid].reg;
3012
145M
    } else {
3013
145M
      if (mid == 0)
3014
0
        break;
3015
145M
      last = mid - 1;
3016
145M
    }
3017
247M
  }
3018
3019
  // not found
3020
32.7M
  return 0;
3021
35.7M
}
3022
3023
bool X86_insn_reg_intel2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2)
3024
33.2M
{
3025
33.2M
  unsigned int i;
3026
3027
296M
  for (i = 0; i < ARR_SIZE(insn_regs_intel2); i++) {
3028
263M
    if (insn_regs_intel2[i].insn == id) {
3029
427k
      *reg1 = insn_regs_intel2[i].reg1;
3030
427k
      *reg2 = insn_regs_intel2[i].reg2;
3031
427k
      if (access1)
3032
427k
        *access1 = insn_regs_intel2[i].access1;
3033
427k
      if (access2)
3034
427k
        *access2 = insn_regs_intel2[i].access2;
3035
427k
      return true;
3036
427k
    }
3037
263M
  }
3038
3039
  // not found
3040
32.8M
  return false;
3041
33.2M
}
3042
3043
// ATT just reuses Intel data, but with the order of registers reversed
3044
bool X86_insn_reg_att2(unsigned int id, x86_reg *reg1, enum cs_ac_type *access1, x86_reg *reg2, enum cs_ac_type *access2)
3045
0
{
3046
0
  unsigned int i;
3047
3048
0
  for (i = 0; i < ARR_SIZE(insn_regs_intel2); i++) {
3049
0
    if (insn_regs_intel2[i].insn == id) {
3050
      // reverse order of Intel syntax registers
3051
0
      *reg1 = insn_regs_intel2[i].reg2;
3052
0
      *reg2 = insn_regs_intel2[i].reg1;
3053
0
            if (access1)
3054
0
                *access1 = insn_regs_intel2[i].access2;
3055
0
            if (access2)
3056
0
                *access2 = insn_regs_intel2[i].access1;
3057
0
      return true;
3058
0
    }
3059
0
  }
3060
3061
  // not found
3062
0
  return false;
3063
0
}
3064
3065
x86_reg X86_insn_reg_att(unsigned int id, enum cs_ac_type *access)
3066
0
{
3067
0
  unsigned int i;
3068
3069
0
  for (i = 0; i < ARR_SIZE(insn_regs_att); i++) {
3070
0
    if (insn_regs_att[i].insn == id) {
3071
0
      if (access)
3072
0
        *access = insn_regs_att[i].access;
3073
0
      return insn_regs_att[i].reg;
3074
0
    }
3075
0
  }
3076
3077
  // not found
3078
0
  return 0;
3079
0
}
3080
3081
// given MCInst's id, find out if this insn is valid for REPNE prefix
3082
static bool valid_repne(cs_struct *h, unsigned int opcode)
3083
226k
{
3084
226k
  unsigned int id;
3085
226k
  int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache);
3086
226k
  if (i != 0) {
3087
226k
    id = insns[i].mapid;
3088
226k
    switch(id) {
3089
188k
      default:
3090
188k
        return false;
3091
3092
1.43k
      case X86_INS_CMPSB:
3093
2.38k
      case X86_INS_CMPSW:
3094
2.49k
      case X86_INS_CMPSQ:
3095
3096
2.81k
      case X86_INS_SCASB:
3097
2.94k
      case X86_INS_SCASW:
3098
3.04k
      case X86_INS_SCASQ:
3099
3100
3.37k
      case X86_INS_MOVSB:
3101
5.04k
      case X86_INS_MOVSW:
3102
5.76k
      case X86_INS_MOVSD:
3103
21.3k
      case X86_INS_MOVSQ:
3104
3105
21.5k
      case X86_INS_LODSB:
3106
21.7k
      case X86_INS_LODSW:
3107
22.4k
      case X86_INS_LODSD:
3108
22.5k
      case X86_INS_LODSQ:
3109
3110
23.4k
      case X86_INS_STOSB:
3111
24.3k
      case X86_INS_STOSW:
3112
25.1k
      case X86_INS_STOSD:
3113
25.2k
      case X86_INS_STOSQ:
3114
3115
27.6k
      case X86_INS_INSB:
3116
27.9k
      case X86_INS_INSW:
3117
28.1k
      case X86_INS_INSD:
3118
3119
32.3k
      case X86_INS_OUTSB:
3120
32.5k
      case X86_INS_OUTSW:
3121
36.4k
      case X86_INS_OUTSD:
3122
3123
36.4k
        return true;
3124
3125
1.03k
      case X86_INS_CMPSD:
3126
1.03k
        if (opcode == X86_CMPSL) // REP CMPSD
3127
1.03k
          return true;
3128
0
        return false;
3129
3130
866
      case X86_INS_SCASD:
3131
866
        if (opcode == X86_SCASL) // REP SCASD
3132
866
          return true;
3133
0
        return false;
3134
226k
    }
3135
226k
  }
3136
3137
  // not found
3138
0
  return false;
3139
226k
}
3140
3141
// given MCInst's id, find out if this insn is valid for BND prefix
3142
// BND prefix is valid for CALL/JMP/RET
3143
#ifndef CAPSTONE_DIET
3144
static bool valid_bnd(cs_struct *h, unsigned int opcode)
3145
188k
{
3146
188k
  unsigned int id;
3147
188k
  int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache);
3148
188k
  if (i != 0) {
3149
188k
    id = insns[i].mapid;
3150
188k
    switch(id) {
3151
146k
      default:
3152
146k
        return false;
3153
3154
3.24k
      case X86_INS_JAE:
3155
8.00k
      case X86_INS_JA:
3156
9.20k
      case X86_INS_JBE:
3157
11.0k
      case X86_INS_JB:
3158
11.2k
      case X86_INS_JCXZ:
3159
11.2k
      case X86_INS_JECXZ:
3160
15.5k
      case X86_INS_JE:
3161
18.5k
      case X86_INS_JGE:
3162
21.5k
      case X86_INS_JG:
3163
21.7k
      case X86_INS_JLE:
3164
22.4k
      case X86_INS_JL:
3165
29.5k
      case X86_INS_JMP:
3166
29.9k
      case X86_INS_JNE:
3167
32.4k
      case X86_INS_JNO:
3168
33.4k
      case X86_INS_JNP:
3169
35.5k
      case X86_INS_JNS:
3170
36.3k
      case X86_INS_JO:
3171
38.0k
      case X86_INS_JP:
3172
38.0k
      case X86_INS_JRCXZ:
3173
38.6k
      case X86_INS_JS:
3174
3175
39.4k
      case X86_INS_CALL:
3176
40.9k
      case X86_INS_RET:
3177
41.7k
      case X86_INS_RETF:
3178
42.0k
      case X86_INS_RETFQ:
3179
42.0k
        return true;
3180
188k
    }
3181
188k
  }
3182
3183
  // not found
3184
0
  return false;
3185
188k
}
3186
#endif
3187
3188
// given MCInst's id, find out if this insn is valid for REP prefix
3189
static bool valid_rep(cs_struct *h, unsigned int opcode)
3190
275k
{
3191
275k
  unsigned int id;
3192
275k
  int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache);
3193
275k
  if (i != 0) {
3194
275k
    id = insns[i].mapid;
3195
275k
    switch(id) {
3196
255k
      default:
3197
255k
        return false;
3198
3199
1.32k
      case X86_INS_MOVSB:
3200
1.93k
      case X86_INS_MOVSW:
3201
4.18k
      case X86_INS_MOVSQ:
3202
3203
6.72k
      case X86_INS_LODSB:
3204
7.68k
      case X86_INS_LODSW:
3205
7.81k
      case X86_INS_LODSQ:
3206
3207
11.6k
      case X86_INS_STOSB:
3208
11.7k
      case X86_INS_STOSW:
3209
12.0k
      case X86_INS_STOSQ:
3210
3211
13.1k
      case X86_INS_INSB:
3212
13.4k
      case X86_INS_INSW:
3213
16.7k
      case X86_INS_INSD:
3214
3215
17.0k
      case X86_INS_OUTSB:
3216
17.2k
      case X86_INS_OUTSW:
3217
17.4k
      case X86_INS_OUTSD:
3218
17.4k
        return true;
3219
3220
      // following are some confused instructions, which have the same
3221
      // mnemonics in 128bit media instructions. Intel is horribly crazy!
3222
247
      case X86_INS_MOVSD:
3223
247
        if (opcode == X86_MOVSL) // REP MOVSD
3224
247
          return true;
3225
0
        return false;
3226
3227
896
      case X86_INS_LODSD:
3228
896
        if (opcode == X86_LODSL) // REP LODSD
3229
896
          return true;
3230
0
        return false;
3231
3232
1.27k
      case X86_INS_STOSD:
3233
1.27k
        if (opcode == X86_STOSL) // REP STOSD
3234
1.27k
          return true;
3235
0
        return false;
3236
275k
    }
3237
275k
  }
3238
3239
  // not found
3240
0
  return false;
3241
275k
}
3242
3243
// given MCInst's id, find out if this insn is valid for REPE prefix
3244
static bool valid_repe(cs_struct *h, unsigned int opcode)
3245
255k
{
3246
255k
  unsigned int id;
3247
255k
  int i = insn_find(insns, ARR_SIZE(insns), opcode, &h->insn_cache);
3248
255k
  if (i != 0) {
3249
255k
    id = insns[i].mapid;
3250
255k
    switch(id) {
3251
209k
      default:
3252
209k
        return false;
3253
3254
4.15k
      case X86_INS_CMPSB:
3255
41.0k
      case X86_INS_CMPSW:
3256
41.1k
      case X86_INS_CMPSQ:
3257
3258
41.4k
      case X86_INS_SCASB:
3259
41.5k
      case X86_INS_SCASW:
3260
41.6k
      case X86_INS_SCASQ:
3261
41.6k
        return true;
3262
3263
      // following are some confused instructions, which have the same
3264
      // mnemonics in 128bit media instructions. Intel is horribly crazy!
3265
3.58k
      case X86_INS_CMPSD:
3266
3.58k
        if (opcode == X86_CMPSL) // REP CMPSD
3267
3.58k
          return true;
3268
0
        return false;
3269
3270
1.01k
      case X86_INS_SCASD:
3271
1.01k
        if (opcode == X86_SCASL) // REP SCASD
3272
1.01k
          return true;
3273
0
        return false;
3274
255k
    }
3275
255k
  }
3276
3277
  // not found
3278
0
  return false;
3279
255k
}
3280
3281
#ifndef CAPSTONE_DIET
3282
// add *CX register to regs_read[] & regs_write[]
3283
static void add_cx(MCInst *MI)
3284
104k
{
3285
104k
  if (MI->csh->detail) {
3286
104k
    x86_reg cx;
3287
3288
104k
    if (MI->csh->mode & CS_MODE_16)
3289
0
      cx = X86_REG_CX;
3290
104k
    else if (MI->csh->mode & CS_MODE_32)
3291
80.9k
      cx = X86_REG_ECX;
3292
23.4k
    else  // 64-bit
3293
23.4k
      cx = X86_REG_RCX;
3294
3295
104k
    MI->flat_insn->detail->regs_read[MI->flat_insn->detail->regs_read_count] = cx;
3296
104k
    MI->flat_insn->detail->regs_read_count++;
3297
3298
104k
    MI->flat_insn->detail->regs_write[MI->flat_insn->detail->regs_write_count] = cx;
3299
104k
    MI->flat_insn->detail->regs_write_count++;
3300
104k
  }
3301
104k
}
3302
#endif
3303
3304
// return true if we patch the mnemonic
3305
bool X86_lockrep(MCInst *MI, SStream *O)
3306
36.2M
{
3307
36.2M
  unsigned int opcode;
3308
36.2M
  bool res = false;
3309
3310
36.2M
  switch(MI->x86_prefix[0]) {
3311
35.5M
    default:
3312
35.5M
      break;
3313
35.5M
    case 0xf0:
3314
150k
#ifndef CAPSTONE_DIET
3315
150k
      SStream_concat(O, "lock|");
3316
150k
#endif
3317
150k
      break;
3318
226k
    case 0xf2:  // repne
3319
226k
      opcode = MCInst_getOpcode(MI);
3320
226k
#ifndef CAPSTONE_DIET // only care about memonic in standard (non-diet) mode
3321
226k
      if (valid_repne(MI->csh, opcode)) {
3322
38.3k
        SStream_concat(O, "repne|");
3323
38.3k
        add_cx(MI);
3324
188k
      } else if (valid_bnd(MI->csh, opcode)) {
3325
42.0k
        SStream_concat(O, "bnd|");
3326
146k
      } else {
3327
        // invalid prefix
3328
146k
        MI->x86_prefix[0] = 0;
3329
3330
        // handle special cases
3331
146k
#ifndef CAPSTONE_X86_REDUCE
3332
146k
        if (opcode == X86_MULPDrr) {
3333
0
          MCInst_setOpcode(MI, X86_MULSDrr);
3334
0
          SStream_concat(O, "mulsd\t");
3335
0
          res = true;
3336
0
        }
3337
146k
#endif
3338
146k
      }
3339
#else // diet mode -> only patch opcode in special cases
3340
      if (!valid_repne(MI->csh, opcode)) {
3341
        MI->x86_prefix[0] = 0;
3342
      }
3343
#ifndef CAPSTONE_X86_REDUCE
3344
      // handle special cases
3345
      if (opcode == X86_MULPDrr) {
3346
        MCInst_setOpcode(MI, X86_MULSDrr);
3347
      }
3348
#endif
3349
#endif
3350
226k
      break;
3351
3352
275k
    case 0xf3:
3353
275k
      opcode = MCInst_getOpcode(MI);
3354
275k
#ifndef CAPSTONE_DIET // only care about memonic in standard (non-diet) mode
3355
275k
      if (valid_rep(MI->csh, opcode)) {
3356
19.8k
        SStream_concat(O, "rep|");
3357
19.8k
        add_cx(MI);
3358
255k
      } else if (valid_repe(MI->csh, opcode)) {
3359
46.2k
        SStream_concat(O, "repe|");
3360
46.2k
        add_cx(MI);
3361
209k
      } else {
3362
        // invalid prefix
3363
209k
        MI->x86_prefix[0] = 0;
3364
3365
        // handle special cases
3366
209k
#ifndef CAPSTONE_X86_REDUCE
3367
209k
        if (opcode == X86_MULPDrr) {
3368
0
          MCInst_setOpcode(MI, X86_MULSSrr);
3369
0
          SStream_concat(O, "mulss\t");
3370
0
          res = true;
3371
0
        }
3372
209k
#endif
3373
209k
      }
3374
#else // diet mode -> only patch opcode in special cases
3375
      if (!valid_rep(MI->csh, opcode) && !valid_repe(MI->csh, opcode)) {
3376
        MI->x86_prefix[0] = 0;
3377
      }
3378
#ifndef CAPSTONE_X86_REDUCE
3379
      // handle special cases
3380
      if (opcode == X86_MULPDrr) {
3381
        MCInst_setOpcode(MI, X86_MULSSrr);
3382
      }
3383
#endif
3384
#endif
3385
275k
      break;
3386
36.2M
  }
3387
3388
  // copy normalized prefix[] back to x86.prefix[]
3389
36.2M
  if (MI->csh->detail)
3390
36.2M
    memcpy(MI->flat_insn->detail->x86.prefix, MI->x86_prefix, ARR_SIZE(MI->x86_prefix));
3391
3392
36.2M
  return res;
3393
36.2M
}
3394
3395
void op_addReg(MCInst *MI, int reg)
3396
708k
{
3397
708k
  if (MI->csh->detail) {
3398
708k
    MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG;
3399
708k
    MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg;
3400
708k
    MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_map[reg];
3401
708k
    MI->flat_insn->detail->x86.op_count++;
3402
708k
  }
3403
3404
708k
  if (MI->op1_size == 0)
3405
33.9k
    MI->op1_size = MI->csh->regsize_map[reg];
3406
708k
}
3407
3408
void op_addImm(MCInst *MI, int v)
3409
39.8k
{
3410
39.8k
  if (MI->csh->detail) {
3411
39.8k
    MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM;
3412
39.8k
    MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = v;
3413
    // if op_count > 0, then this operand's size is taken from the destination op
3414
39.8k
    if (MI->csh->syntax != CS_OPT_SYNTAX_ATT) {
3415
39.8k
      if (MI->flat_insn->detail->x86.op_count > 0)
3416
39.8k
        MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->flat_insn->detail->x86.operands[0].size;
3417
0
      else
3418
0
        MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->imm_size;
3419
39.8k
    } else
3420
0
      MI->has_imm = true;
3421
39.8k
    MI->flat_insn->detail->x86.op_count++;
3422
39.8k
  }
3423
3424
39.8k
  if (MI->op1_size == 0)
3425
0
    MI->op1_size = MI->imm_size;
3426
39.8k
}
3427
3428
void op_addXopCC(MCInst *MI, int v)
3429
8.28k
{
3430
8.28k
  if (MI->csh->detail) {
3431
8.28k
    MI->flat_insn->detail->x86.xop_cc = v;
3432
8.28k
  }
3433
8.28k
}
3434
3435
void op_addSseCC(MCInst *MI, int v)
3436
1.26k
{
3437
1.26k
  if (MI->csh->detail) {
3438
1.26k
    MI->flat_insn->detail->x86.sse_cc = v;
3439
1.26k
  }
3440
1.26k
}
3441
3442
void op_addAvxCC(MCInst *MI, int v)
3443
14.5k
{
3444
14.5k
  if (MI->csh->detail) {
3445
14.5k
    MI->flat_insn->detail->x86.avx_cc = v;
3446
14.5k
  }
3447
14.5k
}
3448
3449
void op_addAvxRoundingMode(MCInst *MI, int v)
3450
5.25k
{
3451
5.25k
  if (MI->csh->detail) {
3452
5.25k
    MI->flat_insn->detail->x86.avx_rm = v;
3453
5.25k
  }
3454
5.25k
}
3455
3456
// below functions supply details to X86GenAsmWriter*.inc
3457
void op_addAvxZeroOpmask(MCInst *MI)
3458
8.49k
{
3459
8.49k
  if (MI->csh->detail) {
3460
    // link with the previous operand
3461
8.49k
    MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].avx_zero_opmask = true;
3462
8.49k
  }
3463
8.49k
}
3464
3465
void op_addAvxSae(MCInst *MI)
3466
12.2k
{
3467
12.2k
  if (MI->csh->detail) {
3468
12.2k
    MI->flat_insn->detail->x86.avx_sae = true;
3469
12.2k
  }
3470
12.2k
}
3471
3472
void op_addAvxBroadcast(MCInst *MI, x86_avx_bcast v)
3473
31.7k
{
3474
31.7k
  if (MI->csh->detail) {
3475
    // link with the previous operand
3476
31.7k
    MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].avx_bcast = v;
3477
31.7k
  }
3478
31.7k
}
3479
3480
#ifndef CAPSTONE_DIET
3481
// map instruction to its characteristics
3482
typedef struct insn_op {
3483
  uint64_t flags; // how this instruction update EFLAGS(arithmetic instrcutions) of FPU FLAGS(for FPU instructions)
3484
  uint8_t access[6];
3485
} insn_op;
3486
3487
static insn_op insn_ops[] = {
3488
  { /* NULL item  */
3489
    0,
3490
    { 0 }
3491
  },
3492
3493
#ifdef CAPSTONE_X86_REDUCE
3494
#include "X86MappingInsnOp_reduce.inc"
3495
#else
3496
#include "X86MappingInsnOp.inc"
3497
#endif
3498
};
3499
3500
// given internal insn id, return operand access info
3501
uint8_t *X86_get_op_access(cs_struct *h, unsigned int id, uint64_t *eflags)
3502
95.8M
{
3503
95.8M
  int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache);
3504
95.8M
  if (i != 0) {
3505
95.8M
    *eflags = insn_ops[i].flags;
3506
95.8M
    return insn_ops[i].access;
3507
95.8M
  }
3508
3509
0
  return NULL;
3510
95.8M
}
3511
3512
void X86_reg_access(const cs_insn *insn,
3513
    cs_regs regs_read, uint8_t *regs_read_count,
3514
    cs_regs regs_write, uint8_t *regs_write_count)
3515
0
{
3516
0
  uint8_t i;
3517
0
  uint8_t read_count, write_count;
3518
0
  cs_x86 *x86 = &(insn->detail->x86);
3519
3520
0
  read_count = insn->detail->regs_read_count;
3521
0
  write_count = insn->detail->regs_write_count;
3522
3523
  // implicit registers
3524
0
  memcpy(regs_read, insn->detail->regs_read, read_count * sizeof(insn->detail->regs_read[0]));
3525
0
  memcpy(regs_write, insn->detail->regs_write, write_count * sizeof(insn->detail->regs_write[0]));
3526
3527
  // explicit registers
3528
0
  for (i = 0; i < x86->op_count; i++) {
3529
0
    cs_x86_op *op = &(x86->operands[i]);
3530
0
    switch((int)op->type) {
3531
0
      case X86_OP_REG:
3532
0
        if ((op->access & CS_AC_READ) && !arr_exist(regs_read, read_count, op->reg)) {
3533
0
          regs_read[read_count] = op->reg;
3534
0
          read_count++;
3535
0
        }
3536
0
        if ((op->access & CS_AC_WRITE) && !arr_exist(regs_write, write_count, op->reg)) {
3537
0
          regs_write[write_count] = op->reg;
3538
0
          write_count++;
3539
0
        }
3540
0
        break;
3541
0
      case X86_OP_MEM:
3542
        // registers appeared in memory references always being read
3543
0
        if ((op->mem.segment != X86_REG_INVALID)) {
3544
0
          regs_read[read_count] = op->mem.segment;
3545
0
          read_count++;
3546
0
        }
3547
0
        if ((op->mem.base != X86_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.base)) {
3548
0
          regs_read[read_count] = op->mem.base;
3549
0
          read_count++;
3550
0
        }
3551
0
        if ((op->mem.index != X86_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.index)) {
3552
0
          regs_read[read_count] = op->mem.index;
3553
0
          read_count++;
3554
0
        }
3555
0
      default:
3556
0
        break;
3557
0
    }
3558
0
  }
3559
3560
0
  *regs_read_count = read_count;
3561
0
  *regs_write_count = write_count;
3562
0
}
3563
#endif
3564
3565
// map immediate size to instruction id
3566
static struct size_id {
3567
  uint8_t   enc_size;
3568
  uint8_t   size;
3569
  uint16_t  id;
3570
} x86_imm_size[] = {
3571
#include "X86ImmSize.inc"
3572
};
3573
3574
// given the instruction name, return the size of its immediate operand (or 0)
3575
uint8_t X86_immediate_size(unsigned int id, uint8_t *enc_size)
3576
5.16M
{
3577
#if 0
3578
  // linear searching
3579
  unsigned int i;
3580
3581
  for (i = 0; i < ARR_SIZE(x86_imm_size); i++) {
3582
    if (id == x86_imm_size[i].id) {
3583
      return x86_imm_size[i].size;
3584
    }
3585
  }
3586
#endif
3587
3588
  // binary searching since the IDs are sorted in order
3589
5.16M
  unsigned int left, right, m;
3590
3591
5.16M
  left = 0;
3592
5.16M
  right = ARR_SIZE(x86_imm_size) - 1;
3593
3594
43.9M
  while(left <= right) {
3595
41.3M
    m = (left + right) / 2;
3596
41.3M
    if (id == x86_imm_size[m].id) {
3597
2.57M
      if (enc_size != NULL)
3598
2.57M
        *enc_size = x86_imm_size[m].enc_size;
3599
3600
2.57M
      return x86_imm_size[m].size;
3601
2.57M
    }
3602
3603
38.7M
    if (id < x86_imm_size[m].id)
3604
19.2M
      right = m - 1;
3605
19.5M
    else
3606
19.5M
      left = m + 1;
3607
38.7M
  }
3608
3609
  // not found
3610
2.58M
  return 0;
3611
5.16M
}
3612
3613
#endif