/src/capstonenext/arch/ARM/ARMInstPrinter.h
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| 1 |  | /* Capstone Disassembly Engine, http://www.capstone-engine.org */ | 
| 2 |  | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */ | 
| 3 |  | /*    Rot127 <unisono@quyllur.org> 2022-2023 */ | 
| 4 |  | /* Automatically translated source file from LLVM. */ | 
| 5 |  |  | 
| 6 |  | /* LLVM-commit: 464bda7750a3ba9e23823fc707d7e7b6fc38438d */ | 
| 7 |  | /* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */ | 
| 8 |  |  | 
| 9 |  | /* Only small edits allowed. */ | 
| 10 |  | /* For multiple similiar edits, please create a Patch for the translator. */ | 
| 11 |  |  | 
| 12 |  | /* Capstone's C++ file translator: */ | 
| 13 |  | /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */ | 
| 14 |  |  | 
| 15 |  | //===- ARMInstPrinter.h - Convert ARM MCInst to assembly syntax -*- C++ -*-===// | 
| 16 |  | // | 
| 17 |  | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | 
| 18 |  | // See https://llvm.org/LICENSE.txt for license information. | 
| 19 |  | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | 
| 20 |  | // | 
| 21 |  | //===----------------------------------------------------------------------===// | 
| 22 |  | // | 
| 23 |  | // This class prints an ARM MCInst to a .s file. | 
| 24 |  | // | 
| 25 |  | //===----------------------------------------------------------------------===// | 
| 26 |  |  | 
| 27 |  | #ifndef CS_ARM_INSTPRINTER_H | 
| 28 |  | #define CS_ARM_INSTPRINTER_H | 
| 29 |  |  | 
| 30 |  | #include <capstone/platform.h> | 
| 31 |  | #include <stdio.h> | 
| 32 |  | #include <stdlib.h> | 
| 33 |  | #include <string.h> | 
| 34 |  |  | 
| 35 |  | #include "../../MCInst.h" | 
| 36 |  | #include "../../MCInstPrinter.h" | 
| 37 |  | #include "../../MCRegisterInfo.h" | 
| 38 |  | #include "../../SStream.h" | 
| 39 |  | #include "../../utils.h" | 
| 40 | 18.1k | #define CONCAT(a, b) CONCAT_(a, b) | 
| 41 | 18.1k | #define CONCAT_(a, b) a##_##b | 
| 42 |  |  | 
| 43 |  | bool applyTargetSpecificCLOption(const char *Opt); | 
| 44 |  | // Autogenerated by tblgen. | 
| 45 |  | void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum, SStream *O); | 
| 46 |  | void printSORegRegOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 47 |  | void printSORegImmOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 48 |  | void printAddrModeTBB(MCInst *MI, unsigned OpNum, SStream *O); | 
| 49 |  | void printAddrModeTBH(MCInst *MI, unsigned OpNum, SStream *O); | 
| 50 |  | void printAddrMode2Operand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 51 |  | void printAM2PostIndexOp(MCInst *MI, unsigned OpNum, SStream *O); | 
| 52 |  | void printAM2PreOrOffsetIndexOp(MCInst *MI, unsigned OpNum, SStream *O); | 
| 53 |  | void printAddrMode2OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 54 |  | #define DECLARE_printAddrMode3Operand(AlwaysPrintImm0) \ | 
| 55 |  |   void CONCAT(printAddrMode3Operand, \ | 
| 56 |  |         AlwaysPrintImm0)(MCInst * MI, unsigned OpNum, SStream *O); | 
| 57 |  | DECLARE_printAddrMode3Operand(false) DECLARE_printAddrMode3Operand(true) | 
| 58 |  |  | 
| 59 |  |   void printAddrMode3OffsetOperand(MCInst *MI, unsigned OpNum, | 
| 60 |  |            SStream *O); | 
| 61 |  | void printAM3PreOrOffsetIndexOp(MCInst *MI, unsigned Op, SStream *O, | 
| 62 |  |         bool AlwaysPrintImm0); | 
| 63 |  | void printPostIdxImm8Operand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 64 |  | void printPostIdxRegOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 65 |  | void printPostIdxImm8s4Operand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 66 |  | void printLdStmModeOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 67 |  | #define DECLARE_printAddrMode5Operand(AlwaysPrintImm0) \ | 
| 68 |  |   void CONCAT(printAddrMode5Operand, \ | 
| 69 |  |         AlwaysPrintImm0)(MCInst * MI, unsigned OpNum, SStream *O); | 
| 70 |  | DECLARE_printAddrMode5Operand(false) DECLARE_printAddrMode5Operand(true) | 
| 71 |  |  | 
| 72 |  | #define DECLARE_printAddrMode5FP16Operand(AlwaysPrintImm0) \ | 
| 73 |  |   void CONCAT(printAddrMode5FP16Operand, \ | 
| 74 |  |         AlwaysPrintImm0)(MCInst * MI, unsigned OpNum, SStream *O); | 
| 75 |  |   DECLARE_printAddrMode5FP16Operand(false) | 
| 76 |  |  | 
| 77 |  |     void printAddrMode6Operand(MCInst *MI, unsigned OpNum, | 
| 78 |  |              SStream *O); | 
| 79 |  | void printAddrMode7Operand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 80 |  | void printAddrMode6OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 81 |  | void printBitfieldInvMaskImmOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 82 |  | void printMemBOption(MCInst *MI, unsigned OpNum, SStream *O); | 
| 83 |  | void printInstSyncBOption(MCInst *MI, unsigned OpNum, SStream *O); | 
| 84 |  | void printTraceSyncBOption(MCInst *MI, unsigned OpNum, SStream *O); | 
| 85 |  | void printShiftImmOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 86 |  | void printPKHLSLShiftImm(MCInst *MI, unsigned OpNum, SStream *O); | 
| 87 |  | void printPKHASRShiftImm(MCInst *MI, unsigned OpNum, SStream *O); | 
| 88 |  | #define DECLARE_printAdrLabelOperand(scale) \ | 
| 89 |  |   void CONCAT(printAdrLabelOperand, scale)(MCInst * MI, unsigned OpNum, \ | 
| 90 |  |              SStream *O); | 
| 91 |  | DECLARE_printAdrLabelOperand(0) DECLARE_printAdrLabelOperand(2) | 
| 92 |  |  | 
| 93 |  | #define DEFINE_printAdrLabelOperandAddr(scale) \ | 
| 94 |  |   static inline void CONCAT(printAdrLabelOperandAddr, scale)( \ | 
| 95 |  |     MCInst * MI, uint64_t Address, unsigned OpNum, SStream *O) \ | 
| 96 | 18.1k |   { \ | 
| 97 | 18.1k |     CONCAT(printAdrLabelOperand, scale)(MI, OpNum, O); \ | 
| 98 | 18.1k |   } Unexecuted instantiation: ARMModule.c:printAdrLabelOperandAddr_0Unexecuted instantiation: ARMModule.c:printAdrLabelOperandAddr_2Unexecuted instantiation: ARMMapping.c:printAdrLabelOperandAddr_0Unexecuted instantiation: ARMMapping.c:printAdrLabelOperandAddr_2ARMInstPrinter.c:printAdrLabelOperandAddr_2| Line | Count | Source |  | 96 | 18.1k |   { \ |  | 97 | 18.1k |     CONCAT(printAdrLabelOperand, scale)(MI, OpNum, O); \ |  | 98 | 18.1k |   } | 
Unexecuted instantiation: ARMInstPrinter.c:printAdrLabelOperandAddr_0 | 
| 99 |  |   DEFINE_printAdrLabelOperandAddr(0) DEFINE_printAdrLabelOperandAddr(2) | 
| 100 |  |  | 
| 101 |  |     void printThumbS4ImmOperand(MCInst *MI, unsigned OpNum, | 
| 102 |  |               SStream *O); | 
| 103 |  | void printThumbSRImm(MCInst *MI, unsigned OpNum, SStream *O); | 
| 104 |  | void printThumbITMask(MCInst *MI, unsigned OpNum, SStream *O); | 
| 105 |  | void printThumbAddrModeRROperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 106 |  | void printThumbAddrModeImm5SOperand(MCInst *MI, unsigned OpNum, SStream *O, | 
| 107 |  |             unsigned Scale); | 
| 108 |  | void printThumbAddrModeImm5S1Operand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 109 |  | void printThumbAddrModeImm5S2Operand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 110 |  | void printThumbAddrModeImm5S4Operand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 111 |  | void printThumbAddrModeSPOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 112 |  | void printT2SOOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 113 |  | #define DECLARE_printAddrModeImm12Operand(AlwaysPrintImm0) \ | 
| 114 |  |   void CONCAT(printAddrModeImm12Operand, \ | 
| 115 |  |         AlwaysPrintImm0)(MCInst * MI, unsigned OpNum, SStream *O); | 
| 116 |  | DECLARE_printAddrModeImm12Operand(false) DECLARE_printAddrModeImm12Operand(true) | 
| 117 |  |  | 
| 118 |  | #define DECLARE_printT2AddrModeImm8Operand(AlwaysPrintImm0) \ | 
| 119 |  |   void CONCAT(printT2AddrModeImm8Operand, \ | 
| 120 |  |         AlwaysPrintImm0)(MCInst * MI, unsigned OpNum, SStream *O); | 
| 121 |  |   DECLARE_printT2AddrModeImm8Operand(true) | 
| 122 |  |     DECLARE_printT2AddrModeImm8Operand(false) | 
| 123 |  |  | 
| 124 |  | #define DECLARE_printT2AddrModeImm8s4Operand(AlwaysPrintImm0) \ | 
| 125 |  |   void CONCAT(printT2AddrModeImm8s4Operand, \ | 
| 126 |  |         AlwaysPrintImm0)(MCInst * MI, unsigned OpNum, SStream *O); | 
| 127 |  |       DECLARE_printT2AddrModeImm8s4Operand(false) | 
| 128 |  |         DECLARE_printT2AddrModeImm8s4Operand(true) | 
| 129 |  |  | 
| 130 |  |           void printT2AddrModeImm0_1020s4Operand( | 
| 131 |  |             MCInst *MI, unsigned OpNum, | 
| 132 |  |             SStream *O); | 
| 133 |  | void printT2AddrModeImm8OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 134 |  | void printT2AddrModeImm8s4OffsetOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 135 |  | void printT2AddrModeSoRegOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 136 |  | void printSetendOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 137 |  | void printCPSIMod(MCInst *MI, unsigned OpNum, SStream *O); | 
| 138 |  | void printCPSIFlag(MCInst *MI, unsigned OpNum, SStream *O); | 
| 139 |  | void printMSRMaskOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 140 |  | void printBankedRegOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 141 |  | void printMandatoryPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 142 |  | void printMandatoryRestrictedPredicateOperand(MCInst *MI, unsigned OpNum, | 
| 143 |  |                 SStream *O); | 
| 144 |  | void printMandatoryInvertedPredicateOperand(MCInst *MI, unsigned OpNum, | 
| 145 |  |               SStream *O); | 
| 146 |  | void printSBitModifierOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 147 |  | void printRegisterList(MCInst *MI, unsigned OpNum, SStream *O); | 
| 148 |  | void printNoHashImmediate(MCInst *MI, unsigned OpNum, SStream *O); | 
| 149 |  | void printPImmediate(MCInst *MI, unsigned OpNum, SStream *O); | 
| 150 |  | void printCImmediate(MCInst *MI, unsigned OpNum, SStream *O); | 
| 151 |  | void printCoprocOptionImm(MCInst *MI, unsigned OpNum, SStream *O); | 
| 152 |  | void printFPImmOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 153 |  | void printVMOVModImmOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 154 |  | void printImmPlusOneOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 155 |  | void printRotImmOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 156 |  | void printModImmOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 157 |  | void printGPRPairOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 158 |  | void printPCLabel(MCInst *MI, unsigned OpNum, SStream *O); | 
| 159 |  | void printThumbLdrLabelOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 160 |  | void printFBits16(MCInst *MI, unsigned OpNum, SStream *O); | 
| 161 |  | void printFBits32(MCInst *MI, unsigned OpNum, SStream *O); | 
| 162 |  | void printVectorIndex(MCInst *MI, unsigned OpNum, SStream *O); | 
| 163 |  | void printVectorListOne(MCInst *MI, unsigned OpNum, SStream *O); | 
| 164 |  | void printVectorListTwo(MCInst *MI, unsigned OpNum, SStream *O); | 
| 165 |  | void printVectorListTwoSpaced(MCInst *MI, unsigned OpNum, SStream *O); | 
| 166 |  | void printVectorListThree(MCInst *MI, unsigned OpNum, SStream *O); | 
| 167 |  | void printVectorListFour(MCInst *MI, unsigned OpNum, SStream *O); | 
| 168 |  | void printVectorListOneAllLanes(MCInst *MI, unsigned OpNum, SStream *O); | 
| 169 |  | void printVectorListTwoAllLanes(MCInst *MI, unsigned OpNum, SStream *O); | 
| 170 |  | void printVectorListThreeAllLanes(MCInst *MI, unsigned OpNum, SStream *O); | 
| 171 |  | void printVectorListFourAllLanes(MCInst *MI, unsigned OpNum, SStream *O); | 
| 172 |  | void printVectorListTwoSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O); | 
| 173 |  | void printVectorListThreeSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O); | 
| 174 |  | void printVectorListFourSpacedAllLanes(MCInst *MI, unsigned OpNum, SStream *O); | 
| 175 |  | void printVectorListThreeSpaced(MCInst *MI, unsigned OpNum, SStream *O); | 
| 176 |  | void printVectorListFourSpaced(MCInst *MI, unsigned OpNum, SStream *O); | 
| 177 |  | #define DECLARE_printMVEVectorList(NumRegs) \ | 
| 178 |  |   void CONCAT(printMVEVectorList, NumRegs)(MCInst * MI, unsigned OpNum, \ | 
| 179 |  |              SStream *O); | 
| 180 |  | DECLARE_printMVEVectorList(2) DECLARE_printMVEVectorList(4) | 
| 181 |  |  | 
| 182 |  | #define DECLARE_printComplexRotationOp(Angle, Remainder) \ | 
| 183 |  |   void CONCAT(printComplexRotationOp, CONCAT(Angle, Remainder))( \ | 
| 184 |  |     MCInst * MI, unsigned OpNum, SStream *O); | 
| 185 |  |   DECLARE_printComplexRotationOp(90, 0) | 
| 186 |  |     DECLARE_printComplexRotationOp(180, 90) | 
| 187 |  |  | 
| 188 |  |   // MVE | 
| 189 |  |   void printVPTPredicateOperand(MCInst *MI, unsigned OpNum, SStream *O); | 
| 190 |  | void printVPTMask(MCInst *MI, unsigned OpNum, SStream *O); | 
| 191 |  | #define DECLARE_printMveAddrModeRQOperand(shift) \ | 
| 192 |  |   void CONCAT(printMveAddrModeRQOperand, \ | 
| 193 |  |         shift)(MCInst * MI, unsigned OpNum, SStream *O); | 
| 194 |  | DECLARE_printMveAddrModeRQOperand(0) DECLARE_printMveAddrModeRQOperand(3) | 
| 195 |  |   DECLARE_printMveAddrModeRQOperand(1) | 
| 196 |  |     DECLARE_printMveAddrModeRQOperand(2) | 
| 197 |  |  | 
| 198 |  |       void printMveSaturateOp(MCInst *MI, unsigned OpNum, | 
| 199 |  |             SStream *O); | 
| 200 |  |  | 
| 201 |  | unsigned translateShiftImm(unsigned imm); | 
| 202 |  |  | 
| 203 |  | #endif // CS_ARM_INSTPRINTER_H |