/src/capstonenext/arch/SystemZ/SystemZInstPrinter.c
Line | Count | Source (jump to first uncovered line) |
1 | | //===-- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax --------===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This class prints an SystemZ MCInst to a .s file. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | |
14 | | /* Capstone Disassembly Engine */ |
15 | | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */ |
16 | | |
17 | | #ifdef CAPSTONE_HAS_SYSZ |
18 | | |
19 | | #include <stdio.h> |
20 | | #include <stdlib.h> |
21 | | #include <string.h> |
22 | | #include <capstone/platform.h> |
23 | | |
24 | | #include "SystemZInstPrinter.h" |
25 | | #include "../../MCInst.h" |
26 | | #include "../../utils.h" |
27 | | #include "../../SStream.h" |
28 | | #include "../../MCRegisterInfo.h" |
29 | | #include "../../MathExtras.h" |
30 | | #include "SystemZMapping.h" |
31 | | |
32 | | static const char *getRegisterName(unsigned RegNo); |
33 | | |
34 | | void SystemZ_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) |
35 | 45.9k | { |
36 | | /* |
37 | | if (((cs_struct *)ud)->detail != CS_OPT_ON) |
38 | | return; |
39 | | */ |
40 | 45.9k | } |
41 | | |
42 | | static void printAddress(MCInst *MI, unsigned Base, int64_t Disp, unsigned Index, SStream *O) |
43 | 19.8k | { |
44 | 19.8k | printInt64(O, Disp); |
45 | | |
46 | 19.8k | if (Base) { |
47 | 17.5k | SStream_concat0(O, "("); |
48 | 17.5k | if (Index) |
49 | 5.62k | SStream_concat(O, "%%%s, ", getRegisterName(Index)); |
50 | 17.5k | SStream_concat(O, "%%%s)", getRegisterName(Base)); |
51 | | |
52 | 17.5k | if (MI->csh->detail_opt) { |
53 | 17.5k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; |
54 | 17.5k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base); |
55 | 17.5k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index); |
56 | 17.5k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp; |
57 | 17.5k | MI->flat_insn->detail->sysz.op_count++; |
58 | 17.5k | } |
59 | 17.5k | } else if (!Index) { |
60 | 1.93k | if (MI->csh->detail_opt) { |
61 | 1.93k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
62 | 1.93k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Disp; |
63 | 1.93k | MI->flat_insn->detail->sysz.op_count++; |
64 | 1.93k | } |
65 | 1.93k | } else { |
66 | 425 | SStream_concat(O, "(%%%s)", getRegisterName(Index)); |
67 | 425 | if (MI->csh->detail_opt) { |
68 | 425 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; |
69 | 425 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base); |
70 | 425 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)SystemZ_map_register(Index); |
71 | 425 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp; |
72 | 425 | MI->flat_insn->detail->sysz.op_count++; |
73 | 425 | } |
74 | 425 | } |
75 | 19.8k | } |
76 | | |
77 | | static void _printOperand(MCInst *MI, MCOperand *MO, SStream *O) |
78 | 64.3k | { |
79 | 64.3k | if (MCOperand_isReg(MO)) { |
80 | 64.3k | unsigned reg; |
81 | | |
82 | 64.3k | reg = MCOperand_getReg(MO); |
83 | 64.3k | SStream_concat(O, "%%%s", getRegisterName(reg)); |
84 | 64.3k | reg = SystemZ_map_register(reg); |
85 | | |
86 | 64.3k | if (MI->csh->detail_opt) { |
87 | 64.3k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_REG; |
88 | 64.3k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].reg = reg; |
89 | 64.3k | MI->flat_insn->detail->sysz.op_count++; |
90 | 64.3k | } |
91 | 64.3k | } else if (MCOperand_isImm(MO)) { |
92 | 0 | int64_t Imm = MCOperand_getImm(MO); |
93 | |
|
94 | 0 | printInt64(O, Imm); |
95 | |
|
96 | 0 | if (MI->csh->detail_opt) { |
97 | 0 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
98 | 0 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Imm; |
99 | 0 | MI->flat_insn->detail->sysz.op_count++; |
100 | 0 | } |
101 | 0 | } |
102 | 64.3k | } |
103 | | |
104 | | static void printU1ImmOperand(MCInst *MI, int OpNum, SStream *O) |
105 | 109 | { |
106 | 109 | int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
107 | | // assert(isUInt<1>(Value) && "Invalid u1imm argument"); |
108 | 109 | printInt64(O, Value); |
109 | | |
110 | 109 | if (MI->csh->detail_opt) { |
111 | 109 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
112 | 109 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value; |
113 | 109 | MI->flat_insn->detail->sysz.op_count++; |
114 | 109 | } |
115 | 109 | } |
116 | | |
117 | | static void printU2ImmOperand(MCInst *MI, int OpNum, SStream *O) |
118 | 94 | { |
119 | 94 | int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
120 | | // assert(isUInt<2>(Value) && "Invalid u2imm argument"); |
121 | 94 | printInt64(O, Value); |
122 | | |
123 | 94 | if (MI->csh->detail_opt) { |
124 | 94 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
125 | 94 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value; |
126 | 94 | MI->flat_insn->detail->sysz.op_count++; |
127 | 94 | } |
128 | 94 | } |
129 | | |
130 | | static void printU3ImmOperand(MCInst *MI, int OpNum, SStream *O) |
131 | 30 | { |
132 | 30 | int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
133 | | // assert(isUInt<3>(Value) && "Invalid u4imm argument"); |
134 | 30 | printInt64(O, Value); |
135 | | |
136 | 30 | if (MI->csh->detail_opt) { |
137 | 30 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
138 | 30 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value; |
139 | 30 | MI->flat_insn->detail->sysz.op_count++; |
140 | 30 | } |
141 | 30 | } |
142 | | |
143 | | static void printU4ImmOperand(MCInst *MI, int OpNum, SStream *O) |
144 | 10.5k | { |
145 | 10.5k | int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
146 | | // assert(isUInt<4>(Value) && "Invalid u4imm argument"); |
147 | 10.5k | printInt64(O, Value); |
148 | | |
149 | 10.5k | if (MI->csh->detail_opt) { |
150 | 10.5k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
151 | 10.5k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value; |
152 | 10.5k | MI->flat_insn->detail->sysz.op_count++; |
153 | 10.5k | } |
154 | 10.5k | } |
155 | | |
156 | | static void printU6ImmOperand(MCInst *MI, int OpNum, SStream *O) |
157 | 48 | { |
158 | 48 | uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
159 | | // assert(isUInt<6>(Value) && "Invalid u6imm argument"); |
160 | | |
161 | 48 | printUInt32(O, Value); |
162 | | |
163 | 48 | if (MI->csh->detail_opt) { |
164 | 48 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
165 | 48 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; |
166 | 48 | MI->flat_insn->detail->sysz.op_count++; |
167 | 48 | } |
168 | 48 | } |
169 | | |
170 | | static void printS8ImmOperand(MCInst *MI, int OpNum, SStream *O) |
171 | 243 | { |
172 | 243 | int8_t Value = (int8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
173 | | // assert(isInt<8>(Value) && "Invalid s8imm argument"); |
174 | | |
175 | 243 | if (Value >= 0) { |
176 | 150 | if (Value > HEX_THRESHOLD) |
177 | 117 | SStream_concat(O, "0x%x", Value); |
178 | 33 | else |
179 | 33 | SStream_concat(O, "%u", Value); |
180 | 150 | } else { |
181 | 93 | if (Value < -HEX_THRESHOLD) |
182 | 70 | SStream_concat(O, "-0x%x", -Value); |
183 | 23 | else |
184 | 23 | SStream_concat(O, "-%u", -Value); |
185 | 93 | } |
186 | | |
187 | 243 | if (MI->csh->detail_opt) { |
188 | 243 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
189 | 243 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; |
190 | 243 | MI->flat_insn->detail->sysz.op_count++; |
191 | 243 | } |
192 | 243 | } |
193 | | |
194 | | static void printU8ImmOperand(MCInst *MI, int OpNum, SStream *O) |
195 | 2.12k | { |
196 | 2.12k | uint8_t Value = (uint8_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
197 | | // assert(isUInt<8>(Value) && "Invalid u8imm argument"); |
198 | | |
199 | 2.12k | if (Value > HEX_THRESHOLD) |
200 | 1.55k | SStream_concat(O, "0x%x", Value); |
201 | 577 | else |
202 | 577 | SStream_concat(O, "%u", Value); |
203 | | |
204 | 2.12k | if (MI->csh->detail_opt) { |
205 | 2.12k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
206 | 2.12k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; |
207 | 2.12k | MI->flat_insn->detail->sysz.op_count++; |
208 | 2.12k | } |
209 | 2.12k | } |
210 | | |
211 | | static void printU12ImmOperand(MCInst *MI, int OpNum, SStream *O) |
212 | 90 | { |
213 | 90 | int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
214 | | // assert(isUInt<12>(Value) && "Invalid u12imm argument"); |
215 | 90 | printInt64(O, Value); |
216 | | |
217 | 90 | if (MI->csh->detail_opt) { |
218 | 90 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
219 | 90 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value; |
220 | 90 | MI->flat_insn->detail->sysz.op_count++; |
221 | 90 | } |
222 | 90 | } |
223 | | |
224 | | static void printS16ImmOperand(MCInst *MI, int OpNum, SStream *O) |
225 | 1.04k | { |
226 | 1.04k | int16_t Value = (int16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
227 | | // assert(isInt<16>(Value) && "Invalid s16imm argument"); |
228 | | |
229 | 1.04k | if (Value >= 0) { |
230 | 218 | if (Value > HEX_THRESHOLD) |
231 | 165 | SStream_concat(O, "0x%x", Value); |
232 | 53 | else |
233 | 53 | SStream_concat(O, "%u", Value); |
234 | 831 | } else { |
235 | 831 | if (Value < -HEX_THRESHOLD) |
236 | 688 | SStream_concat(O, "-0x%x", -Value); |
237 | 143 | else |
238 | 143 | SStream_concat(O, "-%u", -Value); |
239 | 831 | } |
240 | | |
241 | 1.04k | if (MI->csh->detail_opt) { |
242 | 1.04k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
243 | 1.04k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; |
244 | 1.04k | MI->flat_insn->detail->sysz.op_count++; |
245 | 1.04k | } |
246 | 1.04k | } |
247 | | |
248 | | static void printU16ImmOperand(MCInst *MI, int OpNum, SStream *O) |
249 | 669 | { |
250 | 669 | uint16_t Value = (uint16_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
251 | | // assert(isUInt<16>(Value) && "Invalid u16imm argument"); |
252 | | |
253 | 669 | if (Value > HEX_THRESHOLD) |
254 | 637 | SStream_concat(O, "0x%x", Value); |
255 | 32 | else |
256 | 32 | SStream_concat(O, "%u", Value); |
257 | | |
258 | 669 | if (MI->csh->detail_opt) { |
259 | 669 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
260 | 669 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; |
261 | 669 | MI->flat_insn->detail->sysz.op_count++; |
262 | 669 | } |
263 | 669 | } |
264 | | |
265 | | static void printS32ImmOperand(MCInst *MI, int OpNum, SStream *O) |
266 | 537 | { |
267 | 537 | int32_t Value = (int32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
268 | | // assert(isInt<32>(Value) && "Invalid s32imm argument"); |
269 | | |
270 | 537 | printInt32(O, Value); |
271 | | |
272 | 537 | if (MI->csh->detail_opt) { |
273 | 537 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
274 | 537 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; |
275 | 537 | MI->flat_insn->detail->sysz.op_count++; |
276 | 537 | } |
277 | 537 | } |
278 | | |
279 | | static void printU32ImmOperand(MCInst *MI, int OpNum, SStream *O) |
280 | 761 | { |
281 | 761 | uint32_t Value = (uint32_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
282 | | // assert(isUInt<32>(Value) && "Invalid u32imm argument"); |
283 | | |
284 | 761 | printUInt32(O, Value); |
285 | | |
286 | 761 | if (MI->csh->detail_opt) { |
287 | 761 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
288 | 761 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = (int64_t)Value; |
289 | 761 | MI->flat_insn->detail->sysz.op_count++; |
290 | 761 | } |
291 | 761 | } |
292 | | |
293 | | static void printU48ImmOperand(MCInst *MI, int OpNum, SStream *O) |
294 | 0 | { |
295 | 0 | int64_t Value = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
296 | | // assert(isUInt<48>(Value) && "Invalid u48imm argument"); |
297 | 0 | printInt64(O, Value); |
298 | |
|
299 | 0 | if (MI->csh->detail_opt) { |
300 | 0 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
301 | 0 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Value; |
302 | 0 | MI->flat_insn->detail->sysz.op_count++; |
303 | 0 | } |
304 | 0 | } |
305 | | |
306 | | static void printPCRelOperand(MCInst *MI, int OpNum, SStream *O) |
307 | 2.37k | { |
308 | 2.37k | MCOperand *MO = MCInst_getOperand(MI, OpNum); |
309 | | |
310 | 2.37k | if (MCOperand_isImm(MO)) { |
311 | 2.37k | int64_t imm = (int64_t)MCOperand_getImm(MO); |
312 | | |
313 | 2.37k | printInt64(O, imm); |
314 | | |
315 | 2.37k | if (MI->csh->detail_opt) { |
316 | 2.37k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; |
317 | 2.37k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = imm; |
318 | 2.37k | MI->flat_insn->detail->sysz.op_count++; |
319 | 2.37k | } |
320 | 2.37k | } |
321 | 2.37k | } |
322 | | |
323 | | static void printPCRelTLSOperand(MCInst *MI, int OpNum, SStream *O) |
324 | 152 | { |
325 | | // Output the PC-relative operand. |
326 | 152 | printPCRelOperand(MI, OpNum, O); |
327 | 152 | } |
328 | | |
329 | | static void printOperand(MCInst *MI, int OpNum, SStream *O) |
330 | 64.3k | { |
331 | 64.3k | _printOperand(MI, MCInst_getOperand(MI, OpNum), O); |
332 | 64.3k | } |
333 | | |
334 | | static void printBDAddrOperand(MCInst *MI, int OpNum, SStream *O) |
335 | 12.4k | { |
336 | 12.4k | printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)), |
337 | 12.4k | MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), 0, O); |
338 | 12.4k | } |
339 | | |
340 | | static void printBDXAddrOperand(MCInst *MI, int OpNum, SStream *O) |
341 | 7.36k | { |
342 | 7.36k | printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)), |
343 | 7.36k | MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), |
344 | 7.36k | MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O); |
345 | 7.36k | } |
346 | | |
347 | | static void printBDLAddrOperand(MCInst *MI, int OpNum, SStream *O) |
348 | 4.69k | { |
349 | 4.69k | unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); |
350 | 4.69k | uint64_t Disp = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)); |
351 | 4.69k | uint64_t Length = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 2)); |
352 | | |
353 | 4.69k | if (Disp > HEX_THRESHOLD) |
354 | 4.54k | SStream_concat(O, "0x%"PRIx64, Disp); |
355 | 152 | else |
356 | 152 | SStream_concat(O, "%"PRIu64, Disp); |
357 | | |
358 | 4.69k | if (Length > HEX_THRESHOLD) |
359 | 3.62k | SStream_concat(O, "(0x%"PRIx64, Length); |
360 | 1.07k | else |
361 | 1.07k | SStream_concat(O, "(%"PRIu64, Length); |
362 | | |
363 | 4.69k | if (Base) |
364 | 3.59k | SStream_concat(O, ", %%%s", getRegisterName(Base)); |
365 | 4.69k | SStream_concat0(O, ")"); |
366 | | |
367 | 4.69k | if (MI->csh->detail_opt) { |
368 | 4.69k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; |
369 | 4.69k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base); |
370 | 4.69k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.length = Length; |
371 | 4.69k | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = (int64_t)Disp; |
372 | 4.69k | MI->flat_insn->detail->sysz.op_count++; |
373 | 4.69k | } |
374 | 4.69k | } |
375 | | |
376 | | static void printBDRAddrOperand(MCInst *MI, int OpNum, SStream *O) |
377 | 485 | { |
378 | 485 | unsigned Base = MCOperand_getReg(MCInst_getOperand(MI, OpNum)); |
379 | 485 | uint64_t Disp = (uint64_t)MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)); |
380 | 485 | uint64_t Length = MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)); |
381 | | |
382 | 485 | if (Disp > HEX_THRESHOLD) |
383 | 390 | SStream_concat(O, "0x%"PRIx64, Disp); |
384 | 95 | else |
385 | 95 | SStream_concat(O, "%"PRIu64, Disp); |
386 | | |
387 | 485 | SStream_concat0(O, "("); |
388 | 485 | SStream_concat(O, "%%%s", getRegisterName(Length)); |
389 | | |
390 | 485 | if (Base) |
391 | 339 | SStream_concat(O, ", %%%s", getRegisterName(Base)); |
392 | 485 | SStream_concat0(O, ")"); |
393 | | |
394 | 485 | if (MI->csh->detail_opt) { |
395 | 485 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; |
396 | 485 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)SystemZ_map_register(Base); |
397 | 485 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.length = (uint8_t)SystemZ_map_register(Length); |
398 | 485 | MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = (int64_t)Disp; |
399 | 485 | MI->flat_insn->detail->sysz.op_count++; |
400 | 485 | } |
401 | 485 | } |
402 | | |
403 | | static void printBDVAddrOperand(MCInst *MI, int OpNum, SStream *O) |
404 | 109 | { |
405 | 109 | printAddress(MI, MCOperand_getReg(MCInst_getOperand(MI, OpNum)), |
406 | 109 | MCOperand_getImm(MCInst_getOperand(MI, OpNum + 1)), |
407 | 109 | MCOperand_getReg(MCInst_getOperand(MI, OpNum + 2)), O); |
408 | 109 | } |
409 | | |
410 | | static void printCond4Operand(MCInst *MI, int OpNum, SStream *O) |
411 | 0 | { |
412 | 0 | static const char *const CondNames[] = { |
413 | 0 | "o", "h", "nle", "l", "nhe", "lh", "ne", |
414 | 0 | "e", "nlh", "he", "nl", "le", "nh", "no" |
415 | 0 | }; |
416 | |
|
417 | 0 | uint64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, OpNum)); |
418 | | // assert(Imm > 0 && Imm < 15 && "Invalid condition"); |
419 | 0 | SStream_concat0(O, CondNames[Imm - 1]); |
420 | |
|
421 | 0 | if (MI->csh->detail_opt) |
422 | 0 | MI->flat_insn->detail->sysz.cc = (sysz_cc)Imm; |
423 | 0 | } |
424 | | |
425 | | #define PRINT_ALIAS_INSTR |
426 | | #include "SystemZGenAsmWriter.inc" |
427 | | |
428 | | void SystemZ_printInst(MCInst *MI, SStream *O, void *Info) |
429 | 45.9k | { |
430 | 45.9k | printInstruction(MI, O, Info); |
431 | 45.9k | } |
432 | | |
433 | | #endif |