/src/capstonenext/MCInst.c
Line | Count | Source (jump to first uncovered line) |
1 | | /* Capstone Disassembly Engine */ |
2 | | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */ |
3 | | #if defined(CAPSTONE_HAS_OSXKERNEL) |
4 | | #include <Availability.h> |
5 | | #include <libkern/libkern.h> |
6 | | #else |
7 | | #include <stdio.h> |
8 | | #include <stdlib.h> |
9 | | #endif |
10 | | #include <string.h> |
11 | | #include <assert.h> |
12 | | |
13 | | #include "MCInstrDesc.h" |
14 | | #include "MCInst.h" |
15 | | #include "utils.h" |
16 | | |
17 | 1.33M | #define MCINST_CACHE (ARR_SIZE(mcInst->Operands) - 1) |
18 | | |
19 | | void MCInst_Init(MCInst *inst, cs_arch arch) |
20 | 2.44M | { |
21 | 2.44M | memset(inst, 0, sizeof(MCInst)); |
22 | | // unnecessary to initialize in loop . its expensive and inst->size should be honored |
23 | 2.44M | inst->Operands[0].Kind = kInvalid; |
24 | 2.44M | inst->Operands[0].ImmVal = 0; |
25 | | |
26 | 2.44M | inst->Opcode = 0; |
27 | 2.44M | inst->OpcodePub = 0; |
28 | 2.44M | inst->size = 0; |
29 | 2.44M | inst->has_imm = false; |
30 | 2.44M | inst->op1_size = 0; |
31 | 2.44M | inst->ac_idx = 0; |
32 | 2.44M | inst->popcode_adjust = 0; |
33 | 2.44M | inst->assembly[0] = '\0'; |
34 | 2.44M | inst->wasm_data.type = WASM_OP_INVALID; |
35 | 2.44M | inst->xAcquireRelease = 0; |
36 | 119M | for (int i = 0; i < MAX_MC_OPS; ++i) |
37 | 117M | inst->tied_op_idx[i] = -1; |
38 | 2.44M | inst->isAliasInstr = false; |
39 | 2.44M | inst->fillDetailOps = false; |
40 | 2.44M | memset(&inst->hppa_ext, 0, sizeof(inst->hppa_ext)); |
41 | | |
42 | | // Set default assembly dialect. |
43 | 2.44M | switch (arch) { |
44 | 2.36M | default: |
45 | 2.36M | break; |
46 | 2.36M | case CS_ARCH_SYSTEMZ: |
47 | 79.7k | inst->MAI.assemblerDialect = SYSTEMZASMDIALECT_AD_HLASM; |
48 | 79.7k | break; |
49 | 2.44M | } |
50 | 2.44M | } |
51 | | |
52 | | void MCInst_clear(MCInst *inst) |
53 | 2.18M | { |
54 | 2.18M | inst->size = 0; |
55 | 2.18M | } |
56 | | |
57 | | // does not free @Op |
58 | | void MCInst_insert0(MCInst *inst, int index, MCOperand *Op) |
59 | 1.33M | { |
60 | 1.33M | CS_ASSERT_RET(index < MAX_MC_OPS); |
61 | 1.33M | int i; |
62 | | |
63 | 2.32M | for(i = inst->size; i > index; i--) |
64 | | //memcpy(&(inst->Operands[i]), &(inst->Operands[i-1]), sizeof(MCOperand)); |
65 | 984k | inst->Operands[i] = inst->Operands[i-1]; |
66 | | |
67 | 1.33M | inst->Operands[index] = *Op; |
68 | 1.33M | inst->size++; |
69 | 1.33M | } |
70 | | |
71 | | void MCInst_setOpcode(MCInst *inst, unsigned Op) |
72 | 2.39M | { |
73 | 2.39M | inst->Opcode = Op; |
74 | 2.39M | } |
75 | | |
76 | | void MCInst_setOpcodePub(MCInst *inst, unsigned Op) |
77 | 27.1k | { |
78 | 27.1k | inst->OpcodePub = Op; |
79 | 27.1k | } |
80 | | |
81 | | unsigned MCInst_getOpcode(const MCInst *inst) |
82 | 21.5M | { |
83 | 21.5M | return inst->Opcode; |
84 | 21.5M | } |
85 | | |
86 | | unsigned MCInst_getOpcodePub(const MCInst *inst) |
87 | 2.55M | { |
88 | 2.55M | return inst->OpcodePub; |
89 | 2.55M | } |
90 | | |
91 | | MCOperand *MCInst_getOperand(MCInst *inst, unsigned i) |
92 | 13.0M | { |
93 | 13.0M | assert(i < MAX_MC_OPS); |
94 | 13.0M | return &inst->Operands[i]; |
95 | 13.0M | } |
96 | | |
97 | | unsigned MCInst_getNumOperands(const MCInst *inst) |
98 | 6.08M | { |
99 | 6.08M | return inst->size; |
100 | 6.08M | } |
101 | | |
102 | | // This addOperand2 function doesn't free Op |
103 | | void MCInst_addOperand2(MCInst *inst, MCOperand *Op) |
104 | 844 | { |
105 | 844 | CS_ASSERT_RET(inst->size < MAX_MC_OPS); |
106 | 844 | inst->Operands[inst->size] = *Op; |
107 | | |
108 | 844 | inst->size++; |
109 | 844 | } |
110 | | |
111 | | bool MCOperand_isValid(const MCOperand *op) |
112 | 0 | { |
113 | 0 | return op->Kind != kInvalid; |
114 | 0 | } |
115 | | |
116 | | bool MCOperand_isReg(const MCOperand *op) |
117 | 7.65M | { |
118 | 7.65M | return op->Kind == kRegister || op->MachineOperandType == kRegister; |
119 | 7.65M | } |
120 | | |
121 | | bool MCOperand_isImm(const MCOperand *op) |
122 | 2.29M | { |
123 | 2.29M | return op->Kind == kImmediate || op->MachineOperandType == kImmediate; |
124 | 2.29M | } |
125 | | |
126 | | bool MCOperand_isFPImm(const MCOperand *op) |
127 | 0 | { |
128 | 0 | return op->Kind == kFPImmediate; |
129 | 0 | } |
130 | | |
131 | | bool MCOperand_isDFPImm(const MCOperand *op) |
132 | 820 | { |
133 | 820 | return op->Kind == kDFPImmediate; |
134 | 820 | } |
135 | | |
136 | | bool MCOperand_isExpr(const MCOperand *op) |
137 | 97.0k | { |
138 | 97.0k | return op->Kind == kExpr; |
139 | 97.0k | } |
140 | | |
141 | | bool MCOperand_isInst(const MCOperand *op) |
142 | 0 | { |
143 | 0 | return op->Kind == kInst; |
144 | 0 | } |
145 | | |
146 | | /// getReg - Returns the register number. |
147 | | unsigned MCOperand_getReg(const MCOperand *op) |
148 | 8.76M | { |
149 | 8.76M | return op->RegVal; |
150 | 8.76M | } |
151 | | |
152 | | /// setReg - Set the register number. |
153 | | void MCOperand_setReg(MCOperand *op, unsigned Reg) |
154 | 8.44k | { |
155 | 8.44k | op->RegVal = Reg; |
156 | 8.44k | } |
157 | | |
158 | | int64_t MCOperand_getImm(const MCOperand *op) |
159 | 4.78M | { |
160 | 4.78M | return op->ImmVal; |
161 | 4.78M | } |
162 | | |
163 | | int64_t MCOperand_getExpr(const MCOperand *op) |
164 | 0 | { |
165 | 0 | return op->ImmVal; |
166 | 0 | } |
167 | | |
168 | | void MCOperand_setImm(MCOperand *op, int64_t Val) |
169 | 8.54k | { |
170 | 8.54k | op->ImmVal = Val; |
171 | 8.54k | } |
172 | | |
173 | | double MCOperand_getFPImm(const MCOperand *op) |
174 | 0 | { |
175 | 0 | return op->FPImmVal; |
176 | 0 | } |
177 | | |
178 | | void MCOperand_setFPImm(MCOperand *op, double Val) |
179 | 0 | { |
180 | 0 | op->FPImmVal = Val; |
181 | 0 | } |
182 | | |
183 | | MCOperand *MCOperand_CreateReg1(MCInst *mcInst, unsigned Reg) |
184 | 769k | { |
185 | 769k | MCOperand *op = &(mcInst->Operands[MCINST_CACHE]); |
186 | | |
187 | 769k | op->MachineOperandType = kRegister; |
188 | 769k | op->Kind = kRegister; |
189 | 769k | op->RegVal = Reg; |
190 | | |
191 | 769k | return op; |
192 | 769k | } |
193 | | |
194 | | void MCOperand_CreateReg0(MCInst *mcInst, unsigned Reg) |
195 | 4.36M | { |
196 | 4.36M | MCOperand *op = &(mcInst->Operands[mcInst->size]); |
197 | 4.36M | mcInst->size++; |
198 | | |
199 | 4.36M | op->MachineOperandType = kRegister; |
200 | 4.36M | op->Kind = kRegister; |
201 | 4.36M | op->RegVal = Reg; |
202 | 4.36M | } |
203 | | |
204 | | MCOperand *MCOperand_CreateImm1(MCInst *mcInst, int64_t Val) |
205 | 565k | { |
206 | 565k | MCOperand *op = &(mcInst->Operands[MCINST_CACHE]); |
207 | | |
208 | 565k | op->MachineOperandType = kImmediate; |
209 | 565k | op->Kind = kImmediate; |
210 | 565k | op->ImmVal = Val; |
211 | | |
212 | 565k | return op; |
213 | 565k | } |
214 | | |
215 | | void MCOperand_CreateImm0(MCInst *mcInst, int64_t Val) |
216 | 2.03M | { |
217 | 2.03M | assert(mcInst->size < MAX_MC_OPS); |
218 | 2.03M | MCOperand *op = &(mcInst->Operands[mcInst->size]); |
219 | 2.03M | mcInst->size++; |
220 | | |
221 | 2.03M | op->MachineOperandType = kImmediate; |
222 | 2.03M | op->Kind = kImmediate; |
223 | 2.03M | op->ImmVal = Val; |
224 | 2.03M | } |
225 | | |
226 | | /// Check if any operand of the MCInstrDesc is predicable |
227 | | bool MCInst_isPredicable(const MCInstrDesc *MIDesc) |
228 | 686k | { |
229 | 686k | const MCOperandInfo *OpInfo = MIDesc->OpInfo; |
230 | 686k | unsigned NumOps = MIDesc->NumOperands; |
231 | 2.98M | for (unsigned i = 0; i < NumOps; ++i) { |
232 | 2.94M | if (MCOperandInfo_isPredicate(&OpInfo[i])) { |
233 | 644k | return true; |
234 | 644k | } |
235 | 2.94M | } |
236 | 42.3k | return false; |
237 | 686k | } |
238 | | |
239 | | /// Checks if tied operands exist in the instruction and sets |
240 | | /// - The writeback flag in detail |
241 | | /// - Saves the indices of the tied destination operands. |
242 | | void MCInst_handleWriteback(MCInst *MI, const MCInstrDesc *InstDescTable, unsigned tbl_size) |
243 | 987k | { |
244 | 987k | const MCInstrDesc *InstDesc = NULL; |
245 | 987k | const MCOperandInfo *OpInfo = NULL; |
246 | 987k | unsigned short NumOps = 0; |
247 | 987k | InstDesc = MCInstrDesc_get(MCInst_getOpcode(MI), InstDescTable, tbl_size); |
248 | 987k | OpInfo = InstDesc->OpInfo; |
249 | 987k | NumOps = InstDesc->NumOperands; |
250 | | |
251 | 5.58M | for (unsigned i = 0; i < NumOps; ++i) { |
252 | 4.59M | if (MCOperandInfo_isTiedToOp(&OpInfo[i])) { |
253 | 205k | int idx = MCOperandInfo_getOperandConstraint( |
254 | 205k | InstDesc, i, |
255 | 205k | MCOI_TIED_TO); |
256 | | |
257 | 205k | if (idx == -1) |
258 | 0 | continue; |
259 | | |
260 | 205k | if (i >= MAX_MC_OPS) { |
261 | 0 | assert(0 && |
262 | 0 | "Maximum number of MC operands reached."); |
263 | 0 | } |
264 | 205k | MI->tied_op_idx[i] = idx; |
265 | | |
266 | 205k | if (MI->flat_insn->detail) |
267 | 205k | MI->flat_insn->detail->writeback = true; |
268 | 205k | } |
269 | 4.59M | } |
270 | 987k | } |
271 | | |
272 | | /// Check if operand with OpNum is tied by another operand |
273 | | /// (operand is tying destination). |
274 | | bool MCInst_opIsTied(const MCInst *MI, unsigned OpNum) |
275 | 3.92M | { |
276 | 3.92M | assert(OpNum < MAX_MC_OPS && "Maximum number of MC operands exceeded."); |
277 | 186M | for (int i = 0; i < MAX_MC_OPS; ++i) { |
278 | 182M | if (MI->tied_op_idx[i] == OpNum) |
279 | 140k | return true; |
280 | 182M | } |
281 | 3.78M | return false; |
282 | 3.92M | } |
283 | | |
284 | | /// Check if operand with OpNum is tying another operand |
285 | | /// (operand is tying src). |
286 | | bool MCInst_opIsTying(const MCInst *MI, unsigned OpNum) |
287 | 3.92M | { |
288 | 3.92M | assert(OpNum < MAX_MC_OPS && "Maximum number of MC operands exceeded."); |
289 | 3.92M | return MI->tied_op_idx[OpNum] != -1; |
290 | 3.92M | } |
291 | | |
292 | | /// Returns the value of the @MCInst operand at index @OpNum. |
293 | | uint64_t MCInst_getOpVal(MCInst *MI, unsigned OpNum) |
294 | 3.71M | { |
295 | 3.71M | assert(OpNum < MAX_MC_OPS); |
296 | 3.71M | MCOperand *op = MCInst_getOperand(MI, OpNum); |
297 | 3.71M | if (MCOperand_isReg(op)) |
298 | 2.63M | return MCOperand_getReg(op); |
299 | 1.08M | else if (MCOperand_isImm(op)) |
300 | 1.08M | return MCOperand_getImm(op); |
301 | 0 | else |
302 | 0 | assert(0 && "Operand type not handled in this getter."); |
303 | 0 | return MCOperand_getImm(op); |
304 | 3.71M | } |
305 | | |
306 | 1.04M | void MCInst_setIsAlias(MCInst *MI, bool Flag) { |
307 | 1.04M | assert(MI); |
308 | 1.04M | MI->isAliasInstr = Flag; |
309 | 1.04M | MI->flat_insn->is_alias = Flag; |
310 | 1.04M | } |
311 | | |
312 | | /// @brief Copies the relevant members of a temporary MCInst to |
313 | | /// the main MCInst. This is used if TryDecode was run on a temporary MCInst. |
314 | | /// @param MI The main MCInst |
315 | | /// @param TmpMI The temporary MCInst. |
316 | 0 | void MCInst_updateWithTmpMI(MCInst *MI, MCInst *TmpMI) { |
317 | 0 | MI->size = TmpMI->size; |
318 | 0 | MI->Opcode = TmpMI->Opcode; |
319 | 0 | assert(MI->size < MAX_MC_OPS); |
320 | 0 | memcpy(MI->Operands, TmpMI->Operands, sizeof(MI->Operands[0]) * MI->size); |
321 | 0 | } |
322 | | |
323 | | /// @brief Sets the softfail/illegal flag in the cs_insn. |
324 | | /// Setting it indicates the instruction can be decoded, but is invalid |
325 | | /// due to not allowed operands or an illegal context. |
326 | | /// |
327 | | /// @param MI The MCInst holding the cs_insn currently decoded. |
328 | 68.8k | void MCInst_setSoftFail(MCInst *MI) { |
329 | 68.8k | assert(MI && MI->flat_insn); |
330 | 68.8k | MI->flat_insn->illegal = true; |
331 | 68.8k | } |