Coverage Report

Created: 2025-07-01 07:03

/src/capstonenext/arch/Mips/MipsGenDisassemblerTables.inc
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Source (jump to first uncovered line)
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/* Capstone Disassembly Engine, https://www.capstone-engine.org */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
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/*    Rot127 <unisono@quyllur.org> 2022-2024 */
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/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */
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/* LLVM-commit: <commit> */
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/* LLVM-tag: <tag> */
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/* Do not edit. */
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/* Capstone's LLVM TableGen Backends: */
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/* https://github.com/capstone-engine/llvm-capstone */
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#include "../../MCInst.h"
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#include "../../cs_priv.h"
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#include "../../LEB128.h"
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// Helper function for extracting fields from encoded instructions.
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#define FieldFromInstruction(fname, InsnType) \
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static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
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{ \
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  InsnType fieldMask; \
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  if (numBits == sizeof(InsnType) * 8) \
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    fieldMask = (InsnType)(-1LL); \
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  else \
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    fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
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  return (insn & fieldMask) >> startBit; \
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}
Unexecuted instantiation: MipsDisassembler.c:fieldFromInstruction_8
MipsDisassembler.c:fieldFromInstruction_4
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static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
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{ \
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  InsnType fieldMask; \
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  if (numBits == sizeof(InsnType) * 8) \
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    fieldMask = (InsnType)(-1LL); \
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  else \
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    fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
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  return (insn & fieldMask) >> startBit; \
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}
MipsDisassembler.c:fieldFromInstruction_2
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static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \
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{ \
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  InsnType fieldMask; \
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  if (numBits == sizeof(InsnType) * 8) \
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    fieldMask = (InsnType)(-1LL); \
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  else \
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    fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \
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  return (insn & fieldMask) >> startBit; \
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}
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static bool Check(DecodeStatus *Out, const DecodeStatus In) {
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  *Out = (DecodeStatus) (*Out & In);
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  return *Out != MCDisassembler_Fail;
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}
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static const uint8_t DecoderTable16[] = {
36
/* 0 */       MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
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/* 3 */       MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 17
38
/* 8 */       MCD_OPC_CheckPredicate, 0, 92, 2, 0, // Skip to: 617
39
/* 13 */      MCD_OPC_Decode, 237, 8, 0, // Opcode: Bimm16
40
/* 17 */      MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 31
41
/* 22 */      MCD_OPC_CheckPredicate, 0, 78, 2, 0, // Skip to: 617
42
/* 27 */      MCD_OPC_Decode, 235, 8, 1, // Opcode: BeqzRxImm16
43
/* 31 */      MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 45
44
/* 36 */      MCD_OPC_CheckPredicate, 0, 64, 2, 0, // Skip to: 617
45
/* 41 */      MCD_OPC_Decode, 239, 8, 1, // Opcode: BnezRxImm16
46
/* 45 */      MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 59
47
/* 50 */      MCD_OPC_CheckPredicate, 0, 50, 2, 0, // Skip to: 617
48
/* 55 */      MCD_OPC_Decode, 138, 7, 2, // Opcode: AddiuRxRxImm16
49
/* 59 */      MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 73
50
/* 64 */      MCD_OPC_CheckPredicate, 0, 36, 2, 0, // Skip to: 617
51
/* 69 */      MCD_OPC_Decode, 195, 23, 3, // Opcode: SltiRxImm16
52
/* 73 */      MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 87
53
/* 78 */      MCD_OPC_CheckPredicate, 0, 22, 2, 0, // Skip to: 617
54
/* 83 */      MCD_OPC_Decode, 197, 23, 3, // Opcode: SltiuRxImm16
55
/* 87 */      MCD_OPC_FilterValue, 12, 73, 0, 0, // Skip to: 165
56
/* 92 */      MCD_OPC_ExtractField, 8, 3,  // Inst{10-8} ...
57
/* 95 */      MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 109
58
/* 100 */     MCD_OPC_CheckPredicate, 0, 0, 2, 0, // Skip to: 617
59
/* 105 */     MCD_OPC_Decode, 242, 8, 4, // Opcode: Bteqz16
60
/* 109 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 123
61
/* 114 */     MCD_OPC_CheckPredicate, 0, 242, 1, 0, // Skip to: 617
62
/* 119 */     MCD_OPC_Decode, 244, 8, 4, // Opcode: Btnez16
63
/* 123 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 137
64
/* 128 */     MCD_OPC_CheckPredicate, 0, 228, 1, 0, // Skip to: 617
65
/* 133 */     MCD_OPC_Decode, 141, 7, 4, // Opcode: AddiuSpImm16
66
/* 137 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 151
67
/* 142 */     MCD_OPC_CheckPredicate, 0, 214, 1, 0, // Skip to: 617
68
/* 147 */     MCD_OPC_Decode, 129, 19, 5, // Opcode: Move32R16
69
/* 151 */     MCD_OPC_FilterValue, 7, 205, 1, 0, // Skip to: 617
70
/* 156 */     MCD_OPC_CheckPredicate, 0, 200, 1, 0, // Skip to: 617
71
/* 161 */     MCD_OPC_Decode, 130, 19, 6, // Opcode: MoveR3216
72
/* 165 */     MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 179
73
/* 170 */     MCD_OPC_CheckPredicate, 0, 186, 1, 0, // Skip to: 617
74
/* 175 */     MCD_OPC_Decode, 188, 16, 3, // Opcode: LiRxImm16
75
/* 179 */     MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 193
76
/* 184 */     MCD_OPC_CheckPredicate, 0, 172, 1, 0, // Skip to: 617
77
/* 189 */     MCD_OPC_Decode, 189, 11, 3, // Opcode: CmpiRxImm16
78
/* 193 */     MCD_OPC_FilterValue, 22, 9, 0, 0, // Skip to: 207
79
/* 198 */     MCD_OPC_CheckPredicate, 0, 158, 1, 0, // Skip to: 617
80
/* 203 */     MCD_OPC_Decode, 191, 16, 7, // Opcode: LwRxPcTcp16
81
/* 207 */     MCD_OPC_FilterValue, 28, 31, 0, 0, // Skip to: 243
82
/* 212 */     MCD_OPC_ExtractField, 0, 2,  // Inst{1-0} ...
83
/* 215 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 229
84
/* 220 */     MCD_OPC_CheckPredicate, 0, 136, 1, 0, // Skip to: 617
85
/* 225 */     MCD_OPC_Decode, 143, 7, 8, // Opcode: AdduRxRyRz16
86
/* 229 */     MCD_OPC_FilterValue, 3, 127, 1, 0, // Skip to: 617
87
/* 234 */     MCD_OPC_CheckPredicate, 0, 122, 1, 0, // Skip to: 617
88
/* 239 */     MCD_OPC_Decode, 204, 23, 8, // Opcode: SubuRxRyRz16
89
/* 243 */     MCD_OPC_FilterValue, 29, 113, 1, 0, // Skip to: 617
90
/* 248 */     MCD_OPC_ExtractField, 0, 5,  // Inst{4-0} ...
91
/* 251 */     MCD_OPC_FilterValue, 0, 80, 0, 0, // Skip to: 336
92
/* 256 */     MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
93
/* 259 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 273
94
/* 264 */     MCD_OPC_CheckPredicate, 0, 92, 1, 0, // Skip to: 617
95
/* 269 */     MCD_OPC_Decode, 151, 15, 9, // Opcode: JumpLinkReg16
96
/* 273 */     MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 294
97
/* 278 */     MCD_OPC_CheckPredicate, 0, 78, 1, 0, // Skip to: 617
98
/* 283 */     MCD_OPC_CheckField, 8, 3, 0, 71, 1, 0, // Skip to: 617
99
/* 290 */     MCD_OPC_Decode, 148, 15, 10, // Opcode: JrRa16
100
/* 294 */     MCD_OPC_FilterValue, 6, 16, 0, 0, // Skip to: 315
101
/* 299 */     MCD_OPC_CheckPredicate, 0, 57, 1, 0, // Skip to: 617
102
/* 304 */     MCD_OPC_CheckField, 8, 3, 0, 50, 1, 0, // Skip to: 617
103
/* 311 */     MCD_OPC_Decode, 150, 15, 10, // Opcode: JrcRx16
104
/* 315 */     MCD_OPC_FilterValue, 5, 41, 1, 0, // Skip to: 617
105
/* 320 */     MCD_OPC_CheckPredicate, 0, 36, 1, 0, // Skip to: 617
106
/* 325 */     MCD_OPC_CheckField, 8, 3, 0, 29, 1, 0, // Skip to: 617
107
/* 332 */     MCD_OPC_Decode, 149, 15, 10, // Opcode: JrcRa16
108
/* 336 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 350
109
/* 341 */     MCD_OPC_CheckPredicate, 0, 15, 1, 0, // Skip to: 617
110
/* 346 */     MCD_OPC_Decode, 194, 23, 11, // Opcode: SltRxRy16
111
/* 350 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 364
112
/* 355 */     MCD_OPC_CheckPredicate, 0, 1, 1, 0, // Skip to: 617
113
/* 360 */     MCD_OPC_Decode, 199, 23, 11, // Opcode: SltuRxRy16
114
/* 364 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 378
115
/* 369 */     MCD_OPC_CheckPredicate, 0, 243, 0, 0, // Skip to: 617
116
/* 374 */     MCD_OPC_Decode, 193, 23, 12, // Opcode: SllvRxRy16
117
/* 378 */     MCD_OPC_FilterValue, 5, 16, 0, 0, // Skip to: 399
118
/* 383 */     MCD_OPC_CheckPredicate, 0, 229, 0, 0, // Skip to: 617
119
/* 388 */     MCD_OPC_CheckField, 5, 6, 0, 222, 0, 0, // Skip to: 617
120
/* 395 */     MCD_OPC_Decode, 241, 8, 10, // Opcode: Break16
121
/* 399 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 413
122
/* 404 */     MCD_OPC_CheckPredicate, 0, 208, 0, 0, // Skip to: 617
123
/* 409 */     MCD_OPC_Decode, 203, 23, 12, // Opcode: SrlvRxRy16
124
/* 413 */     MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 427
125
/* 418 */     MCD_OPC_CheckPredicate, 0, 194, 0, 0, // Skip to: 617
126
/* 423 */     MCD_OPC_Decode, 201, 23, 12, // Opcode: SravRxRy16
127
/* 427 */     MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 441
128
/* 432 */     MCD_OPC_CheckPredicate, 0, 180, 0, 0, // Skip to: 617
129
/* 437 */     MCD_OPC_Decode, 188, 11, 11, // Opcode: CmpRxRy16
130
/* 441 */     MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 455
131
/* 446 */     MCD_OPC_CheckPredicate, 0, 166, 0, 0, // Skip to: 617
132
/* 451 */     MCD_OPC_Decode, 144, 7, 12, // Opcode: AndRxRxRy16
133
/* 455 */     MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 469
134
/* 460 */     MCD_OPC_CheckPredicate, 0, 152, 0, 0, // Skip to: 617
135
/* 465 */     MCD_OPC_Decode, 178, 19, 12, // Opcode: OrRxRxRy16
136
/* 469 */     MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 483
137
/* 474 */     MCD_OPC_CheckPredicate, 0, 138, 0, 0, // Skip to: 617
138
/* 479 */     MCD_OPC_Decode, 187, 24, 12, // Opcode: XorRxRxRy16
139
/* 483 */     MCD_OPC_FilterValue, 15, 9, 0, 0, // Skip to: 497
140
/* 488 */     MCD_OPC_CheckPredicate, 0, 124, 0, 0, // Skip to: 617
141
/* 493 */     MCD_OPC_Decode, 162, 19, 11, // Opcode: NotRxRy16
142
/* 497 */     MCD_OPC_FilterValue, 16, 16, 0, 0, // Skip to: 518
143
/* 502 */     MCD_OPC_CheckPredicate, 0, 110, 0, 0, // Skip to: 617
144
/* 507 */     MCD_OPC_CheckField, 5, 3, 0, 103, 0, 0, // Skip to: 617
145
/* 514 */     MCD_OPC_Decode, 255, 18, 9, // Opcode: Mfhi16
146
/* 518 */     MCD_OPC_FilterValue, 17, 31, 0, 0, // Skip to: 554
147
/* 523 */     MCD_OPC_ExtractField, 5, 3,  // Inst{7-5} ...
148
/* 526 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 540
149
/* 531 */     MCD_OPC_CheckPredicate, 0, 81, 0, 0, // Skip to: 617
150
/* 536 */     MCD_OPC_Decode, 189, 23, 13, // Opcode: SebRx16
151
/* 540 */     MCD_OPC_FilterValue, 5, 72, 0, 0, // Skip to: 617
152
/* 545 */     MCD_OPC_CheckPredicate, 0, 67, 0, 0, // Skip to: 617
153
/* 550 */     MCD_OPC_Decode, 190, 23, 13, // Opcode: SehRx16
154
/* 554 */     MCD_OPC_FilterValue, 18, 16, 0, 0, // Skip to: 575
155
/* 559 */     MCD_OPC_CheckPredicate, 0, 53, 0, 0, // Skip to: 617
156
/* 564 */     MCD_OPC_CheckField, 5, 3, 0, 46, 0, 0, // Skip to: 617
157
/* 571 */     MCD_OPC_Decode, 128, 19, 9, // Opcode: Mflo16
158
/* 575 */     MCD_OPC_FilterValue, 26, 9, 0, 0, // Skip to: 589
159
/* 580 */     MCD_OPC_CheckPredicate, 0, 32, 0, 0, // Skip to: 617
160
/* 585 */     MCD_OPC_Decode, 204, 12, 11, // Opcode: DivRxRy16
161
/* 589 */     MCD_OPC_FilterValue, 27, 9, 0, 0, // Skip to: 603
162
/* 594 */     MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 617
163
/* 599 */     MCD_OPC_Decode, 205, 12, 11, // Opcode: DivuRxRy16
164
/* 603 */     MCD_OPC_FilterValue, 29, 9, 0, 0, // Skip to: 617
165
/* 608 */     MCD_OPC_CheckPredicate, 0, 4, 0, 0, // Skip to: 617
166
/* 613 */     MCD_OPC_Decode, 161, 19, 11, // Opcode: NegRxRy16
167
/* 617 */     MCD_OPC_Fail,
168
  0
169
};
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static const uint8_t DecoderTable32[] = {
172
/* 0 */       MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
173
/* 3 */       MCD_OPC_FilterValue, 1, 23, 0, 0, // Skip to: 31
174
/* 8 */       MCD_OPC_CheckPredicate, 0, 2, 2, 0, // Skip to: 527
175
/* 13 */      MCD_OPC_CheckField, 27, 5, 30, 251, 1, 0, // Skip to: 527
176
/* 20 */      MCD_OPC_CheckField, 5, 3, 0, 244, 1, 0, // Skip to: 527
177
/* 27 */      MCD_OPC_Decode, 137, 7, 14, // Opcode: AddiuRxPcImmX16
178
/* 31 */      MCD_OPC_FilterValue, 2, 23, 0, 0, // Skip to: 59
179
/* 36 */      MCD_OPC_CheckPredicate, 0, 230, 1, 0, // Skip to: 527
180
/* 41 */      MCD_OPC_CheckField, 27, 5, 30, 223, 1, 0, // Skip to: 527
181
/* 48 */      MCD_OPC_CheckField, 5, 6, 0, 216, 1, 0, // Skip to: 527
182
/* 55 */      MCD_OPC_Decode, 238, 8, 15, // Opcode: BimmX16
183
/* 59 */      MCD_OPC_FilterValue, 4, 23, 0, 0, // Skip to: 87
184
/* 64 */      MCD_OPC_CheckPredicate, 0, 202, 1, 0, // Skip to: 527
185
/* 69 */      MCD_OPC_CheckField, 27, 5, 30, 195, 1, 0, // Skip to: 527
186
/* 76 */      MCD_OPC_CheckField, 5, 3, 0, 188, 1, 0, // Skip to: 527
187
/* 83 */      MCD_OPC_Decode, 236, 8, 16, // Opcode: BeqzRxImmX16
188
/* 87 */      MCD_OPC_FilterValue, 5, 23, 0, 0, // Skip to: 115
189
/* 92 */      MCD_OPC_CheckPredicate, 0, 174, 1, 0, // Skip to: 527
190
/* 97 */      MCD_OPC_CheckField, 27, 5, 30, 167, 1, 0, // Skip to: 527
191
/* 104 */     MCD_OPC_CheckField, 5, 3, 0, 160, 1, 0, // Skip to: 527
192
/* 111 */     MCD_OPC_Decode, 240, 8, 16, // Opcode: BnezRxImmX16
193
/* 115 */     MCD_OPC_FilterValue, 12, 106, 0, 0, // Skip to: 226
194
/* 120 */     MCD_OPC_ExtractField, 27, 5,  // Inst{31-27} ...
195
/* 123 */     MCD_OPC_FilterValue, 30, 143, 1, 0, // Skip to: 527
196
/* 128 */     MCD_OPC_ExtractField, 16, 5,  // Inst{20-16} ...
197
/* 131 */     MCD_OPC_FilterValue, 0, 45, 0, 0, // Skip to: 181
198
/* 136 */     MCD_OPC_ExtractField, 0, 5,  // Inst{4-0} ...
199
/* 139 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 153
200
/* 144 */     MCD_OPC_CheckPredicate, 0, 32, 0, 0, // Skip to: 181
201
/* 149 */     MCD_OPC_Decode, 192, 23, 17, // Opcode: SllX16
202
/* 153 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 167
203
/* 158 */     MCD_OPC_CheckPredicate, 0, 18, 0, 0, // Skip to: 181
204
/* 163 */     MCD_OPC_Decode, 202, 23, 17, // Opcode: SrlX16
205
/* 167 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 181
206
/* 172 */     MCD_OPC_CheckPredicate, 0, 4, 0, 0, // Skip to: 181
207
/* 177 */     MCD_OPC_Decode, 200, 23, 17, // Opcode: SraX16
208
/* 181 */     MCD_OPC_ExtractField, 5, 6,  // Inst{10-5} ...
209
/* 184 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 198
210
/* 189 */     MCD_OPC_CheckPredicate, 0, 77, 1, 0, // Skip to: 527
211
/* 194 */     MCD_OPC_Decode, 243, 8, 18, // Opcode: BteqzX16
212
/* 198 */     MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 212
213
/* 203 */     MCD_OPC_CheckPredicate, 0, 63, 1, 0, // Skip to: 527
214
/* 208 */     MCD_OPC_Decode, 245, 8, 18, // Opcode: BtnezX16
215
/* 212 */     MCD_OPC_FilterValue, 24, 54, 1, 0, // Skip to: 527
216
/* 217 */     MCD_OPC_CheckPredicate, 0, 49, 1, 0, // Skip to: 527
217
/* 222 */     MCD_OPC_Decode, 142, 7, 18, // Opcode: AddiuSpImmX16
218
/* 226 */     MCD_OPC_FilterValue, 8, 23, 0, 0, // Skip to: 254
219
/* 231 */     MCD_OPC_CheckPredicate, 0, 35, 1, 0, // Skip to: 527
220
/* 236 */     MCD_OPC_CheckField, 27, 5, 30, 28, 1, 0, // Skip to: 527
221
/* 243 */     MCD_OPC_CheckField, 4, 1, 0, 21, 1, 0, // Skip to: 527
222
/* 250 */     MCD_OPC_Decode, 140, 7, 19, // Opcode: AddiuRxRyOffMemX16
223
/* 254 */     MCD_OPC_FilterValue, 9, 23, 0, 0, // Skip to: 282
224
/* 259 */     MCD_OPC_CheckPredicate, 0, 7, 1, 0, // Skip to: 527
225
/* 264 */     MCD_OPC_CheckField, 27, 5, 30, 0, 1, 0, // Skip to: 527
226
/* 271 */     MCD_OPC_CheckField, 5, 3, 0, 249, 0, 0, // Skip to: 527
227
/* 278 */     MCD_OPC_Decode, 136, 7, 14, // Opcode: AddiuRxImmX16
228
/* 282 */     MCD_OPC_FilterValue, 10, 23, 0, 0, // Skip to: 310
229
/* 287 */     MCD_OPC_CheckPredicate, 0, 235, 0, 0, // Skip to: 527
230
/* 292 */     MCD_OPC_CheckField, 27, 5, 30, 228, 0, 0, // Skip to: 527
231
/* 299 */     MCD_OPC_CheckField, 5, 3, 0, 221, 0, 0, // Skip to: 527
232
/* 306 */     MCD_OPC_Decode, 196, 23, 14, // Opcode: SltiRxImmX16
233
/* 310 */     MCD_OPC_FilterValue, 11, 23, 0, 0, // Skip to: 338
234
/* 315 */     MCD_OPC_CheckPredicate, 0, 207, 0, 0, // Skip to: 527
235
/* 320 */     MCD_OPC_CheckField, 27, 5, 30, 200, 0, 0, // Skip to: 527
236
/* 327 */     MCD_OPC_CheckField, 5, 3, 0, 193, 0, 0, // Skip to: 527
237
/* 334 */     MCD_OPC_Decode, 198, 23, 14, // Opcode: SltiuRxImmX16
238
/* 338 */     MCD_OPC_FilterValue, 13, 23, 0, 0, // Skip to: 366
239
/* 343 */     MCD_OPC_CheckPredicate, 0, 179, 0, 0, // Skip to: 527
240
/* 348 */     MCD_OPC_CheckField, 27, 5, 30, 172, 0, 0, // Skip to: 527
241
/* 355 */     MCD_OPC_CheckField, 5, 3, 0, 165, 0, 0, // Skip to: 527
242
/* 362 */     MCD_OPC_Decode, 190, 16, 14, // Opcode: LiRxImmX16
243
/* 366 */     MCD_OPC_FilterValue, 14, 23, 0, 0, // Skip to: 394
244
/* 371 */     MCD_OPC_CheckPredicate, 0, 151, 0, 0, // Skip to: 527
245
/* 376 */     MCD_OPC_CheckField, 27, 5, 30, 144, 0, 0, // Skip to: 527
246
/* 383 */     MCD_OPC_CheckField, 5, 3, 0, 137, 0, 0, // Skip to: 527
247
/* 390 */     MCD_OPC_Decode, 190, 11, 14, // Opcode: CmpiRxImmX16
248
/* 394 */     MCD_OPC_FilterValue, 18, 16, 0, 0, // Skip to: 415
249
/* 399 */     MCD_OPC_CheckPredicate, 0, 123, 0, 0, // Skip to: 527
250
/* 404 */     MCD_OPC_CheckField, 27, 5, 30, 116, 0, 0, // Skip to: 527
251
/* 411 */     MCD_OPC_Decode, 194, 16, 19, // Opcode: LwRxSpImmX16
252
/* 415 */     MCD_OPC_FilterValue, 22, 23, 0, 0, // Skip to: 443
253
/* 420 */     MCD_OPC_CheckPredicate, 0, 102, 0, 0, // Skip to: 527
254
/* 425 */     MCD_OPC_CheckField, 27, 5, 30, 95, 0, 0, // Skip to: 527
255
/* 432 */     MCD_OPC_CheckField, 5, 3, 0, 88, 0, 0, // Skip to: 527
256
/* 439 */     MCD_OPC_Decode, 192, 16, 20, // Opcode: LwRxPcTcpX16
257
/* 443 */     MCD_OPC_FilterValue, 24, 16, 0, 0, // Skip to: 464
258
/* 448 */     MCD_OPC_CheckPredicate, 0, 74, 0, 0, // Skip to: 527
259
/* 453 */     MCD_OPC_CheckField, 27, 5, 30, 67, 0, 0, // Skip to: 527
260
/* 460 */     MCD_OPC_Decode, 188, 23, 19, // Opcode: SbRxRyOffMemX16
261
/* 464 */     MCD_OPC_FilterValue, 25, 16, 0, 0, // Skip to: 485
262
/* 469 */     MCD_OPC_CheckPredicate, 0, 53, 0, 0, // Skip to: 527
263
/* 474 */     MCD_OPC_CheckField, 27, 5, 30, 46, 0, 0, // Skip to: 527
264
/* 481 */     MCD_OPC_Decode, 191, 23, 19, // Opcode: ShRxRyOffMemX16
265
/* 485 */     MCD_OPC_FilterValue, 26, 16, 0, 0, // Skip to: 506
266
/* 490 */     MCD_OPC_CheckPredicate, 0, 32, 0, 0, // Skip to: 527
267
/* 495 */     MCD_OPC_CheckField, 27, 5, 30, 25, 0, 0, // Skip to: 527
268
/* 502 */     MCD_OPC_Decode, 206, 23, 19, // Opcode: SwRxSpImmX16
269
/* 506 */     MCD_OPC_FilterValue, 27, 16, 0, 0, // Skip to: 527
270
/* 511 */     MCD_OPC_CheckPredicate, 0, 11, 0, 0, // Skip to: 527
271
/* 516 */     MCD_OPC_CheckField, 27, 5, 30, 4, 0, 0, // Skip to: 527
272
/* 523 */     MCD_OPC_Decode, 205, 23, 19, // Opcode: SwRxRyOffMemX16
273
/* 527 */     MCD_OPC_Fail,
274
  0
275
};
276
277
static const uint8_t DecoderTableCOP3_32[] = {
278
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
279
/* 3 */       MCD_OPC_FilterValue, 51, 9, 0, 0, // Skip to: 17
280
/* 8 */       MCD_OPC_CheckPredicate, 1, 46, 0, 0, // Skip to: 59
281
/* 13 */      MCD_OPC_Decode, 141, 16, 21, // Opcode: LWC3
282
/* 17 */      MCD_OPC_FilterValue, 55, 9, 0, 0, // Skip to: 31
283
/* 22 */      MCD_OPC_CheckPredicate, 2, 32, 0, 0, // Skip to: 59
284
/* 27 */      MCD_OPC_Decode, 188, 15, 21, // Opcode: LDC3
285
/* 31 */      MCD_OPC_FilterValue, 59, 9, 0, 0, // Skip to: 45
286
/* 36 */      MCD_OPC_CheckPredicate, 1, 18, 0, 0, // Skip to: 59
287
/* 41 */      MCD_OPC_Decode, 139, 23, 21, // Opcode: SWC3
288
/* 45 */      MCD_OPC_FilterValue, 63, 9, 0, 0, // Skip to: 59
289
/* 50 */      MCD_OPC_CheckPredicate, 2, 4, 0, 0, // Skip to: 59
290
/* 55 */      MCD_OPC_Decode, 235, 20, 21, // Opcode: SDC3
291
/* 59 */      MCD_OPC_Fail,
292
  0
293
};
294
295
static const uint8_t DecoderTableCnMips32[] = {
296
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
297
/* 3 */       MCD_OPC_FilterValue, 18, 31, 0, 0, // Skip to: 39
298
/* 8 */       MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
299
/* 11 */      MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 25
300
/* 16 */      MCD_OPC_CheckPredicate, 3, 239, 1, 0, // Skip to: 516
301
/* 21 */      MCD_OPC_Decode, 240, 11, 22, // Opcode: DMFC2_OCTEON
302
/* 25 */      MCD_OPC_FilterValue, 5, 230, 1, 0, // Skip to: 516
303
/* 30 */      MCD_OPC_CheckPredicate, 3, 225, 1, 0, // Skip to: 516
304
/* 35 */      MCD_OPC_Decode, 248, 11, 22, // Opcode: DMTC2_OCTEON
305
/* 39 */      MCD_OPC_FilterValue, 28, 160, 1, 0, // Skip to: 460
306
/* 44 */      MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
307
/* 47 */      MCD_OPC_FilterValue, 3, 16, 0, 0, // Skip to: 68
308
/* 52 */      MCD_OPC_CheckPredicate, 3, 203, 1, 0, // Skip to: 516
309
/* 57 */      MCD_OPC_CheckField, 6, 5, 0, 196, 1, 0, // Skip to: 516
310
/* 64 */      MCD_OPC_Decode, 253, 11, 23, // Opcode: DMUL
311
/* 68 */      MCD_OPC_FilterValue, 8, 16, 0, 0, // Skip to: 89
312
/* 73 */      MCD_OPC_CheckPredicate, 3, 182, 1, 0, // Skip to: 516
313
/* 78 */      MCD_OPC_CheckField, 6, 15, 0, 175, 1, 0, // Skip to: 516
314
/* 85 */      MCD_OPC_Decode, 191, 18, 24, // Opcode: MTM0
315
/* 89 */      MCD_OPC_FilterValue, 9, 16, 0, 0, // Skip to: 110
316
/* 94 */      MCD_OPC_CheckPredicate, 3, 161, 1, 0, // Skip to: 516
317
/* 99 */      MCD_OPC_CheckField, 6, 15, 0, 154, 1, 0, // Skip to: 516
318
/* 106 */     MCD_OPC_Decode, 194, 18, 24, // Opcode: MTP0
319
/* 110 */     MCD_OPC_FilterValue, 10, 16, 0, 0, // Skip to: 131
320
/* 115 */     MCD_OPC_CheckPredicate, 3, 140, 1, 0, // Skip to: 516
321
/* 120 */     MCD_OPC_CheckField, 6, 15, 0, 133, 1, 0, // Skip to: 516
322
/* 127 */     MCD_OPC_Decode, 195, 18, 24, // Opcode: MTP1
323
/* 131 */     MCD_OPC_FilterValue, 11, 16, 0, 0, // Skip to: 152
324
/* 136 */     MCD_OPC_CheckPredicate, 3, 119, 1, 0, // Skip to: 516
325
/* 141 */     MCD_OPC_CheckField, 6, 15, 0, 112, 1, 0, // Skip to: 516
326
/* 148 */     MCD_OPC_Decode, 196, 18, 24, // Opcode: MTP2
327
/* 152 */     MCD_OPC_FilterValue, 12, 16, 0, 0, // Skip to: 173
328
/* 157 */     MCD_OPC_CheckPredicate, 3, 98, 1, 0, // Skip to: 516
329
/* 162 */     MCD_OPC_CheckField, 6, 15, 0, 91, 1, 0, // Skip to: 516
330
/* 169 */     MCD_OPC_Decode, 192, 18, 24, // Opcode: MTM1
331
/* 173 */     MCD_OPC_FilterValue, 13, 16, 0, 0, // Skip to: 194
332
/* 178 */     MCD_OPC_CheckPredicate, 3, 77, 1, 0, // Skip to: 516
333
/* 183 */     MCD_OPC_CheckField, 6, 15, 0, 70, 1, 0, // Skip to: 516
334
/* 190 */     MCD_OPC_Decode, 193, 18, 24, // Opcode: MTM2
335
/* 194 */     MCD_OPC_FilterValue, 15, 16, 0, 0, // Skip to: 215
336
/* 199 */     MCD_OPC_CheckPredicate, 3, 56, 1, 0, // Skip to: 516
337
/* 204 */     MCD_OPC_CheckField, 6, 5, 0, 49, 1, 0, // Skip to: 516
338
/* 211 */     MCD_OPC_Decode, 156, 24, 23, // Opcode: VMULU
339
/* 215 */     MCD_OPC_FilterValue, 16, 16, 0, 0, // Skip to: 236
340
/* 220 */     MCD_OPC_CheckPredicate, 3, 35, 1, 0, // Skip to: 516
341
/* 225 */     MCD_OPC_CheckField, 6, 5, 0, 28, 1, 0, // Skip to: 516
342
/* 232 */     MCD_OPC_Decode, 155, 24, 23, // Opcode: VMM0
343
/* 236 */     MCD_OPC_FilterValue, 17, 16, 0, 0, // Skip to: 257
344
/* 241 */     MCD_OPC_CheckPredicate, 3, 14, 1, 0, // Skip to: 516
345
/* 246 */     MCD_OPC_CheckField, 6, 5, 0, 7, 1, 0, // Skip to: 516
346
/* 253 */     MCD_OPC_Decode, 154, 24, 23, // Opcode: V3MULU
347
/* 257 */     MCD_OPC_FilterValue, 40, 16, 0, 0, // Skip to: 278
348
/* 262 */     MCD_OPC_CheckPredicate, 3, 249, 0, 0, // Skip to: 516
349
/* 267 */     MCD_OPC_CheckField, 6, 5, 0, 242, 0, 0, // Skip to: 516
350
/* 274 */     MCD_OPC_Decode, 146, 7, 23, // Opcode: BADDu
351
/* 278 */     MCD_OPC_FilterValue, 42, 16, 0, 0, // Skip to: 299
352
/* 283 */     MCD_OPC_CheckPredicate, 3, 228, 0, 0, // Skip to: 516
353
/* 288 */     MCD_OPC_CheckField, 6, 5, 0, 221, 0, 0, // Skip to: 516
354
/* 295 */     MCD_OPC_Decode, 140, 21, 23, // Opcode: SEQ
355
/* 299 */     MCD_OPC_FilterValue, 43, 16, 0, 0, // Skip to: 320
356
/* 304 */     MCD_OPC_CheckPredicate, 3, 207, 0, 0, // Skip to: 516
357
/* 309 */     MCD_OPC_CheckField, 6, 5, 0, 200, 0, 0, // Skip to: 516
358
/* 316 */     MCD_OPC_Decode, 255, 21, 23, // Opcode: SNE
359
/* 320 */     MCD_OPC_FilterValue, 44, 23, 0, 0, // Skip to: 348
360
/* 325 */     MCD_OPC_CheckPredicate, 3, 186, 0, 0, // Skip to: 516
361
/* 330 */     MCD_OPC_CheckField, 16, 5, 0, 179, 0, 0, // Skip to: 516
362
/* 337 */     MCD_OPC_CheckField, 6, 5, 0, 172, 0, 0, // Skip to: 516
363
/* 344 */     MCD_OPC_Decode, 203, 19, 25, // Opcode: POP
364
/* 348 */     MCD_OPC_FilterValue, 45, 23, 0, 0, // Skip to: 376
365
/* 353 */     MCD_OPC_CheckPredicate, 3, 158, 0, 0, // Skip to: 516
366
/* 358 */     MCD_OPC_CheckField, 16, 5, 0, 151, 0, 0, // Skip to: 516
367
/* 365 */     MCD_OPC_CheckField, 6, 5, 0, 144, 0, 0, // Skip to: 516
368
/* 372 */     MCD_OPC_Decode, 158, 12, 26, // Opcode: DPOP
369
/* 376 */     MCD_OPC_FilterValue, 46, 9, 0, 0, // Skip to: 390
370
/* 381 */     MCD_OPC_CheckPredicate, 3, 130, 0, 0, // Skip to: 516
371
/* 386 */     MCD_OPC_Decode, 142, 21, 27, // Opcode: SEQi
372
/* 390 */     MCD_OPC_FilterValue, 47, 9, 0, 0, // Skip to: 404
373
/* 395 */     MCD_OPC_CheckPredicate, 3, 116, 0, 0, // Skip to: 516
374
/* 400 */     MCD_OPC_Decode, 128, 22, 27, // Opcode: SNEi
375
/* 404 */     MCD_OPC_FilterValue, 50, 9, 0, 0, // Skip to: 418
376
/* 409 */     MCD_OPC_CheckPredicate, 4, 102, 0, 0, // Skip to: 516
377
/* 414 */     MCD_OPC_Decode, 148, 9, 28, // Opcode: CINS
378
/* 418 */     MCD_OPC_FilterValue, 51, 9, 0, 0, // Skip to: 432
379
/* 423 */     MCD_OPC_CheckPredicate, 4, 88, 0, 0, // Skip to: 516
380
/* 428 */     MCD_OPC_Decode, 149, 9, 28, // Opcode: CINS32
381
/* 432 */     MCD_OPC_FilterValue, 58, 9, 0, 0, // Skip to: 446
382
/* 437 */     MCD_OPC_CheckPredicate, 4, 74, 0, 0, // Skip to: 516
383
/* 442 */     MCD_OPC_Decode, 252, 12, 28, // Opcode: EXTS
384
/* 446 */     MCD_OPC_FilterValue, 59, 65, 0, 0, // Skip to: 516
385
/* 451 */     MCD_OPC_CheckPredicate, 4, 60, 0, 0, // Skip to: 516
386
/* 456 */     MCD_OPC_Decode, 253, 12, 28, // Opcode: EXTS32
387
/* 460 */     MCD_OPC_FilterValue, 50, 9, 0, 0, // Skip to: 474
388
/* 465 */     MCD_OPC_CheckPredicate, 3, 46, 0, 0, // Skip to: 516
389
/* 470 */     MCD_OPC_Decode, 156, 7, 29, // Opcode: BBIT0
390
/* 474 */     MCD_OPC_FilterValue, 54, 9, 0, 0, // Skip to: 488
391
/* 479 */     MCD_OPC_CheckPredicate, 3, 32, 0, 0, // Skip to: 516
392
/* 484 */     MCD_OPC_Decode, 157, 7, 29, // Opcode: BBIT032
393
/* 488 */     MCD_OPC_FilterValue, 58, 9, 0, 0, // Skip to: 502
394
/* 493 */     MCD_OPC_CheckPredicate, 3, 18, 0, 0, // Skip to: 516
395
/* 498 */     MCD_OPC_Decode, 158, 7, 29, // Opcode: BBIT1
396
/* 502 */     MCD_OPC_FilterValue, 62, 9, 0, 0, // Skip to: 516
397
/* 507 */     MCD_OPC_CheckPredicate, 3, 4, 0, 0, // Skip to: 516
398
/* 512 */     MCD_OPC_Decode, 159, 7, 29, // Opcode: BBIT132
399
/* 516 */     MCD_OPC_Fail,
400
  0
401
};
402
403
static const uint8_t DecoderTableCnMipsP32[] = {
404
/* 0 */       MCD_OPC_ExtractField, 0, 16,  // Inst{15-0} ...
405
/* 3 */       MCD_OPC_FilterValue, 24, 16, 0, 0, // Skip to: 24
406
/* 8 */       MCD_OPC_CheckPredicate, 5, 32, 0, 0, // Skip to: 45
407
/* 13 */      MCD_OPC_CheckField, 26, 6, 28, 25, 0, 0, // Skip to: 45
408
/* 20 */      MCD_OPC_Decode, 181, 20, 30, // Opcode: SAA
409
/* 24 */      MCD_OPC_FilterValue, 25, 16, 0, 0, // Skip to: 45
410
/* 29 */      MCD_OPC_CheckPredicate, 5, 11, 0, 0, // Skip to: 45
411
/* 34 */      MCD_OPC_CheckField, 26, 6, 28, 4, 0, 0, // Skip to: 45
412
/* 41 */      MCD_OPC_Decode, 182, 20, 30, // Opcode: SAAD
413
/* 45 */      MCD_OPC_Fail,
414
  0
415
};
416
417
static const uint8_t DecoderTableMicroMips16[] = {
418
/* 0 */       MCD_OPC_ExtractField, 10, 6,  // Inst{15-10} ...
419
/* 3 */       MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 39
420
/* 8 */       MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
421
/* 11 */      MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 25
422
/* 16 */      MCD_OPC_CheckPredicate, 6, 114, 2, 0, // Skip to: 647
423
/* 21 */      MCD_OPC_Decode, 170, 6, 31, // Opcode: ADDU16_MM
424
/* 25 */      MCD_OPC_FilterValue, 1, 105, 2, 0, // Skip to: 647
425
/* 30 */      MCD_OPC_CheckPredicate, 6, 100, 2, 0, // Skip to: 647
426
/* 35 */      MCD_OPC_Decode, 223, 22, 31, // Opcode: SUBU16_MM
427
/* 39 */      MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 53
428
/* 44 */      MCD_OPC_CheckPredicate, 7, 86, 2, 0, // Skip to: 647
429
/* 49 */      MCD_OPC_Decode, 160, 15, 32, // Opcode: LBU16_MM
430
/* 53 */      MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 67
431
/* 58 */      MCD_OPC_CheckPredicate, 6, 72, 2, 0, // Skip to: 647
432
/* 63 */      MCD_OPC_Decode, 208, 17, 33, // Opcode: MOVE16_MM
433
/* 67 */      MCD_OPC_FilterValue, 9, 31, 0, 0, // Skip to: 103
434
/* 72 */      MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
435
/* 75 */      MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 89
436
/* 80 */      MCD_OPC_CheckPredicate, 6, 50, 2, 0, // Skip to: 647
437
/* 85 */      MCD_OPC_Decode, 220, 21, 34, // Opcode: SLL16_MM
438
/* 89 */      MCD_OPC_FilterValue, 1, 41, 2, 0, // Skip to: 647
439
/* 94 */      MCD_OPC_CheckPredicate, 6, 36, 2, 0, // Skip to: 647
440
/* 99 */      MCD_OPC_Decode, 161, 22, 34, // Opcode: SRL16_MM
441
/* 103 */     MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 117
442
/* 108 */     MCD_OPC_CheckPredicate, 7, 22, 2, 0, // Skip to: 647
443
/* 113 */     MCD_OPC_Decode, 212, 15, 32, // Opcode: LHU16_MM
444
/* 117 */     MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 131
445
/* 122 */     MCD_OPC_CheckPredicate, 6, 8, 2, 0, // Skip to: 647
446
/* 127 */     MCD_OPC_Decode, 221, 6, 35, // Opcode: ANDI16_MM
447
/* 131 */     MCD_OPC_FilterValue, 17, 8, 1, 0, // Skip to: 400
448
/* 136 */     MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
449
/* 139 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 153
450
/* 144 */     MCD_OPC_CheckPredicate, 6, 242, 1, 0, // Skip to: 647
451
/* 149 */     MCD_OPC_Decode, 158, 19, 36, // Opcode: NOT16_MM
452
/* 153 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 167
453
/* 158 */     MCD_OPC_CheckPredicate, 6, 228, 1, 0, // Skip to: 647
454
/* 163 */     MCD_OPC_Decode, 173, 24, 37, // Opcode: XOR16_MM
455
/* 167 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 181
456
/* 172 */     MCD_OPC_CheckPredicate, 6, 214, 1, 0, // Skip to: 647
457
/* 177 */     MCD_OPC_Decode, 217, 6, 37, // Opcode: AND16_MM
458
/* 181 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 195
459
/* 186 */     MCD_OPC_CheckPredicate, 6, 200, 1, 0, // Skip to: 647
460
/* 191 */     MCD_OPC_Decode, 164, 19, 37, // Opcode: OR16_MM
461
/* 195 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 209
462
/* 200 */     MCD_OPC_CheckPredicate, 6, 186, 1, 0, // Skip to: 647
463
/* 205 */     MCD_OPC_Decode, 154, 16, 38, // Opcode: LWM16_MM
464
/* 209 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 223
465
/* 214 */     MCD_OPC_CheckPredicate, 6, 172, 1, 0, // Skip to: 647
466
/* 219 */     MCD_OPC_Decode, 151, 23, 38, // Opcode: SWM16_MM
467
/* 223 */     MCD_OPC_FilterValue, 6, 31, 0, 0, // Skip to: 259
468
/* 228 */     MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
469
/* 231 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 245
470
/* 236 */     MCD_OPC_CheckPredicate, 6, 150, 1, 0, // Skip to: 647
471
/* 241 */     MCD_OPC_Decode, 133, 15, 39, // Opcode: JR16_MM
472
/* 245 */     MCD_OPC_FilterValue, 1, 141, 1, 0, // Skip to: 647
473
/* 250 */     MCD_OPC_CheckPredicate, 6, 136, 1, 0, // Skip to: 647
474
/* 255 */     MCD_OPC_Decode, 136, 15, 39, // Opcode: JRC16_MM
475
/* 259 */     MCD_OPC_FilterValue, 7, 31, 0, 0, // Skip to: 295
476
/* 264 */     MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
477
/* 267 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 281
478
/* 272 */     MCD_OPC_CheckPredicate, 6, 114, 1, 0, // Skip to: 647
479
/* 277 */     MCD_OPC_Decode, 237, 14, 39, // Opcode: JALR16_MM
480
/* 281 */     MCD_OPC_FilterValue, 1, 105, 1, 0, // Skip to: 647
481
/* 286 */     MCD_OPC_CheckPredicate, 6, 100, 1, 0, // Skip to: 647
482
/* 291 */     MCD_OPC_Decode, 245, 14, 39, // Opcode: JALRS16_MM
483
/* 295 */     MCD_OPC_FilterValue, 8, 16, 0, 0, // Skip to: 316
484
/* 300 */     MCD_OPC_CheckPredicate, 6, 86, 1, 0, // Skip to: 647
485
/* 305 */     MCD_OPC_CheckField, 5, 1, 0, 79, 1, 0, // Skip to: 647
486
/* 312 */     MCD_OPC_Decode, 151, 17, 39, // Opcode: MFHI16_MM
487
/* 316 */     MCD_OPC_FilterValue, 9, 16, 0, 0, // Skip to: 337
488
/* 321 */     MCD_OPC_CheckPredicate, 6, 65, 1, 0, // Skip to: 647
489
/* 326 */     MCD_OPC_CheckField, 5, 1, 0, 58, 1, 0, // Skip to: 647
490
/* 333 */     MCD_OPC_Decode, 157, 17, 39, // Opcode: MFLO16_MM
491
/* 337 */     MCD_OPC_FilterValue, 10, 16, 0, 0, // Skip to: 358
492
/* 342 */     MCD_OPC_CheckPredicate, 6, 44, 1, 0, // Skip to: 647
493
/* 347 */     MCD_OPC_CheckField, 4, 2, 0, 37, 1, 0, // Skip to: 647
494
/* 354 */     MCD_OPC_Decode, 212, 8, 40, // Opcode: BREAK16_MM
495
/* 358 */     MCD_OPC_FilterValue, 11, 16, 0, 0, // Skip to: 379
496
/* 363 */     MCD_OPC_CheckPredicate, 6, 23, 1, 0, // Skip to: 647
497
/* 368 */     MCD_OPC_CheckField, 4, 2, 0, 16, 1, 0, // Skip to: 647
498
/* 375 */     MCD_OPC_Decode, 220, 20, 40, // Opcode: SDBBP16_MM
499
/* 379 */     MCD_OPC_FilterValue, 12, 7, 1, 0, // Skip to: 647
500
/* 384 */     MCD_OPC_CheckPredicate, 6, 2, 1, 0, // Skip to: 647
501
/* 389 */     MCD_OPC_CheckField, 5, 1, 0, 251, 0, 0, // Skip to: 647
502
/* 396 */     MCD_OPC_Decode, 135, 15, 41, // Opcode: JRADDIUSP
503
/* 400 */     MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 414
504
/* 405 */     MCD_OPC_CheckPredicate, 7, 237, 0, 0, // Skip to: 647
505
/* 410 */     MCD_OPC_Decode, 168, 16, 42, // Opcode: LWSP_MM
506
/* 414 */     MCD_OPC_FilterValue, 19, 31, 0, 0, // Skip to: 450
507
/* 419 */     MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
508
/* 422 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 436
509
/* 427 */     MCD_OPC_CheckPredicate, 7, 215, 0, 0, // Skip to: 647
510
/* 432 */     MCD_OPC_Decode, 137, 6, 43, // Opcode: ADDIUS5_MM
511
/* 436 */     MCD_OPC_FilterValue, 1, 206, 0, 0, // Skip to: 647
512
/* 441 */     MCD_OPC_CheckPredicate, 7, 201, 0, 0, // Skip to: 647
513
/* 446 */     MCD_OPC_Decode, 138, 6, 44, // Opcode: ADDIUSP_MM
514
/* 450 */     MCD_OPC_FilterValue, 25, 9, 0, 0, // Skip to: 464
515
/* 455 */     MCD_OPC_CheckPredicate, 7, 187, 0, 0, // Skip to: 647
516
/* 460 */     MCD_OPC_Decode, 147, 16, 45, // Opcode: LWGP_MM
517
/* 464 */     MCD_OPC_FilterValue, 26, 9, 0, 0, // Skip to: 478
518
/* 469 */     MCD_OPC_CheckPredicate, 7, 173, 0, 0, // Skip to: 647
519
/* 474 */     MCD_OPC_Decode, 132, 16, 32, // Opcode: LW16_MM
520
/* 478 */     MCD_OPC_FilterValue, 27, 31, 0, 0, // Skip to: 514
521
/* 483 */     MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
522
/* 486 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 500
523
/* 491 */     MCD_OPC_CheckPredicate, 7, 151, 0, 0, // Skip to: 647
524
/* 496 */     MCD_OPC_Decode, 134, 6, 46, // Opcode: ADDIUR2_MM
525
/* 500 */     MCD_OPC_FilterValue, 1, 142, 0, 0, // Skip to: 647
526
/* 505 */     MCD_OPC_CheckPredicate, 7, 137, 0, 0, // Skip to: 647
527
/* 510 */     MCD_OPC_Decode, 132, 6, 47, // Opcode: ADDIUR1SP_MM
528
/* 514 */     MCD_OPC_FilterValue, 33, 16, 0, 0, // Skip to: 535
529
/* 519 */     MCD_OPC_CheckPredicate, 6, 123, 0, 0, // Skip to: 647
530
/* 524 */     MCD_OPC_CheckField, 0, 1, 0, 116, 0, 0, // Skip to: 647
531
/* 531 */     MCD_OPC_Decode, 212, 17, 48, // Opcode: MOVEP_MM
532
/* 535 */     MCD_OPC_FilterValue, 34, 9, 0, 0, // Skip to: 549
533
/* 540 */     MCD_OPC_CheckPredicate, 6, 102, 0, 0, // Skip to: 647
534
/* 545 */     MCD_OPC_Decode, 194, 20, 32, // Opcode: SB16_MM
535
/* 549 */     MCD_OPC_FilterValue, 35, 9, 0, 0, // Skip to: 563
536
/* 554 */     MCD_OPC_CheckPredicate, 6, 88, 0, 0, // Skip to: 647
537
/* 559 */     MCD_OPC_Decode, 198, 7, 49, // Opcode: BEQZ16_MM
538
/* 563 */     MCD_OPC_FilterValue, 42, 9, 0, 0, // Skip to: 577
539
/* 568 */     MCD_OPC_CheckPredicate, 6, 74, 0, 0, // Skip to: 647
540
/* 573 */     MCD_OPC_Decode, 144, 21, 32, // Opcode: SH16_MM
541
/* 577 */     MCD_OPC_FilterValue, 43, 9, 0, 0, // Skip to: 591
542
/* 582 */     MCD_OPC_CheckPredicate, 6, 60, 0, 0, // Skip to: 647
543
/* 587 */     MCD_OPC_Decode, 188, 8, 49, // Opcode: BNEZ16_MM
544
/* 591 */     MCD_OPC_FilterValue, 50, 9, 0, 0, // Skip to: 605
545
/* 596 */     MCD_OPC_CheckPredicate, 6, 46, 0, 0, // Skip to: 647
546
/* 601 */     MCD_OPC_Decode, 163, 23, 42, // Opcode: SWSP_MM
547
/* 605 */     MCD_OPC_FilterValue, 51, 9, 0, 0, // Skip to: 619
548
/* 610 */     MCD_OPC_CheckPredicate, 7, 32, 0, 0, // Skip to: 647
549
/* 615 */     MCD_OPC_Decode, 145, 7, 50, // Opcode: B16_MM
550
/* 619 */     MCD_OPC_FilterValue, 58, 9, 0, 0, // Skip to: 633
551
/* 624 */     MCD_OPC_CheckPredicate, 6, 18, 0, 0, // Skip to: 647
552
/* 629 */     MCD_OPC_Decode, 129, 23, 32, // Opcode: SW16_MM
553
/* 633 */     MCD_OPC_FilterValue, 59, 9, 0, 0, // Skip to: 647
554
/* 638 */     MCD_OPC_CheckPredicate, 6, 4, 0, 0, // Skip to: 647
555
/* 643 */     MCD_OPC_Decode, 231, 15, 51, // Opcode: LI16_MM
556
/* 647 */     MCD_OPC_Fail,
557
  0
558
};
559
560
static const uint8_t DecoderTableMicroMips32[] = {
561
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
562
/* 3 */       MCD_OPC_FilterValue, 0, 238, 14, 0, // Skip to: 3830
563
/* 8 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
564
/* 11 */      MCD_OPC_FilterValue, 0, 104, 0, 0, // Skip to: 120
565
/* 16 */      MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
566
/* 19 */      MCD_OPC_FilterValue, 0, 54, 0, 0, // Skip to: 78
567
/* 24 */      MCD_OPC_ExtractField, 11, 15,  // Inst{25-11} ...
568
/* 27 */      MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 41
569
/* 32 */      MCD_OPC_CheckPredicate, 7, 32, 0, 0, // Skip to: 69
570
/* 37 */      MCD_OPC_Decode, 186, 22, 10, // Opcode: SSNOP_MM
571
/* 41 */      MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 55
572
/* 46 */      MCD_OPC_CheckPredicate, 7, 18, 0, 0, // Skip to: 69
573
/* 51 */      MCD_OPC_Decode, 207, 12, 10, // Opcode: EHB_MM
574
/* 55 */      MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 69
575
/* 60 */      MCD_OPC_CheckPredicate, 7, 4, 0, 0, // Skip to: 69
576
/* 65 */      MCD_OPC_Decode, 182, 19, 10, // Opcode: PAUSE_MM
577
/* 69 */      MCD_OPC_CheckPredicate, 7, 101, 25, 0, // Skip to: 6575
578
/* 74 */      MCD_OPC_Decode, 235, 21, 52, // Opcode: SLL_MM
579
/* 78 */      MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 92
580
/* 83 */      MCD_OPC_CheckPredicate, 7, 87, 25, 0, // Skip to: 6575
581
/* 88 */      MCD_OPC_Decode, 182, 22, 52, // Opcode: SRL_MM
582
/* 92 */      MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 106
583
/* 97 */      MCD_OPC_CheckPredicate, 7, 73, 25, 0, // Skip to: 6575
584
/* 102 */     MCD_OPC_Decode, 157, 22, 52, // Opcode: SRA_MM
585
/* 106 */     MCD_OPC_FilterValue, 3, 64, 25, 0, // Skip to: 6575
586
/* 111 */     MCD_OPC_CheckPredicate, 7, 59, 25, 0, // Skip to: 6575
587
/* 116 */     MCD_OPC_Decode, 159, 20, 52, // Opcode: ROTR_MM
588
/* 120 */     MCD_OPC_FilterValue, 5, 227, 0, 0, // Skip to: 352
589
/* 125 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
590
/* 128 */     MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 149
591
/* 133 */     MCD_OPC_CheckPredicate, 8, 37, 25, 0, // Skip to: 6575
592
/* 138 */     MCD_OPC_CheckField, 11, 5, 0, 30, 25, 0, // Skip to: 6575
593
/* 145 */     MCD_OPC_Decode, 221, 9, 53, // Opcode: CMP_EQ_PH_MM
594
/* 149 */     MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 170
595
/* 154 */     MCD_OPC_CheckPredicate, 8, 16, 25, 0, // Skip to: 6575
596
/* 159 */     MCD_OPC_CheckField, 11, 5, 0, 9, 25, 0, // Skip to: 6575
597
/* 166 */     MCD_OPC_Decode, 235, 9, 53, // Opcode: CMP_LT_PH_MM
598
/* 170 */     MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 191
599
/* 175 */     MCD_OPC_CheckPredicate, 8, 251, 24, 0, // Skip to: 6575
600
/* 180 */     MCD_OPC_CheckField, 11, 5, 0, 244, 24, 0, // Skip to: 6575
601
/* 187 */     MCD_OPC_Decode, 229, 9, 53, // Opcode: CMP_LE_PH_MM
602
/* 191 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 205
603
/* 196 */     MCD_OPC_CheckPredicate, 9, 230, 24, 0, // Skip to: 6575
604
/* 201 */     MCD_OPC_Decode, 199, 9, 54, // Opcode: CMPGDU_EQ_QB_MMR2
605
/* 205 */     MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 219
606
/* 210 */     MCD_OPC_CheckPredicate, 9, 216, 24, 0, // Skip to: 6575
607
/* 215 */     MCD_OPC_Decode, 203, 9, 54, // Opcode: CMPGDU_LT_QB_MMR2
608
/* 219 */     MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 233
609
/* 224 */     MCD_OPC_CheckPredicate, 9, 202, 24, 0, // Skip to: 6575
610
/* 229 */     MCD_OPC_Decode, 201, 9, 54, // Opcode: CMPGDU_LE_QB_MMR2
611
/* 233 */     MCD_OPC_FilterValue, 9, 16, 0, 0, // Skip to: 254
612
/* 238 */     MCD_OPC_CheckPredicate, 8, 188, 24, 0, // Skip to: 6575
613
/* 243 */     MCD_OPC_CheckField, 11, 5, 0, 181, 24, 0, // Skip to: 6575
614
/* 250 */     MCD_OPC_Decode, 211, 9, 53, // Opcode: CMPU_EQ_QB_MM
615
/* 254 */     MCD_OPC_FilterValue, 10, 16, 0, 0, // Skip to: 275
616
/* 259 */     MCD_OPC_CheckPredicate, 8, 167, 24, 0, // Skip to: 6575
617
/* 264 */     MCD_OPC_CheckField, 11, 5, 0, 160, 24, 0, // Skip to: 6575
618
/* 271 */     MCD_OPC_Decode, 215, 9, 53, // Opcode: CMPU_LT_QB_MM
619
/* 275 */     MCD_OPC_FilterValue, 11, 16, 0, 0, // Skip to: 296
620
/* 280 */     MCD_OPC_CheckPredicate, 8, 146, 24, 0, // Skip to: 6575
621
/* 285 */     MCD_OPC_CheckField, 11, 5, 0, 139, 24, 0, // Skip to: 6575
622
/* 292 */     MCD_OPC_Decode, 213, 9, 53, // Opcode: CMPU_LE_QB_MM
623
/* 296 */     MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 310
624
/* 301 */     MCD_OPC_CheckPredicate, 8, 125, 24, 0, // Skip to: 6575
625
/* 306 */     MCD_OPC_Decode, 154, 6, 55, // Opcode: ADDQ_S_W_MM
626
/* 310 */     MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 324
627
/* 315 */     MCD_OPC_CheckPredicate, 8, 111, 24, 0, // Skip to: 6575
628
/* 320 */     MCD_OPC_Decode, 206, 22, 55, // Opcode: SUBQ_S_W_MM
629
/* 324 */     MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 338
630
/* 329 */     MCD_OPC_CheckPredicate, 8, 97, 24, 0, // Skip to: 6575
631
/* 334 */     MCD_OPC_Decode, 157, 6, 55, // Opcode: ADDSC_MM
632
/* 338 */     MCD_OPC_FilterValue, 15, 88, 24, 0, // Skip to: 6575
633
/* 343 */     MCD_OPC_CheckPredicate, 8, 83, 24, 0, // Skip to: 6575
634
/* 348 */     MCD_OPC_Decode, 194, 6, 55, // Opcode: ADDWC_MM
635
/* 352 */     MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 366
636
/* 357 */     MCD_OPC_CheckPredicate, 7, 69, 24, 0, // Skip to: 6575
637
/* 362 */     MCD_OPC_Decode, 215, 8, 56, // Opcode: BREAK_MM
638
/* 366 */     MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 380
639
/* 371 */     MCD_OPC_CheckPredicate, 6, 55, 24, 0, // Skip to: 6575
640
/* 376 */     MCD_OPC_Decode, 231, 14, 57, // Opcode: INS_MM
641
/* 380 */     MCD_OPC_FilterValue, 13, 167, 1, 0, // Skip to: 808
642
/* 385 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
643
/* 388 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 402
644
/* 393 */     MCD_OPC_CheckPredicate, 8, 33, 24, 0, // Skip to: 6575
645
/* 398 */     MCD_OPC_Decode, 150, 6, 58, // Opcode: ADDQ_PH_MM
646
/* 402 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 416
647
/* 407 */     MCD_OPC_CheckPredicate, 9, 19, 24, 0, // Skip to: 6575
648
/* 412 */     MCD_OPC_Decode, 142, 6, 58, // Opcode: ADDQH_PH_MMR2
649
/* 416 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 430
650
/* 421 */     MCD_OPC_CheckPredicate, 9, 5, 24, 0, // Skip to: 6575
651
/* 426 */     MCD_OPC_Decode, 148, 6, 55, // Opcode: ADDQH_W_MMR2
652
/* 430 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 444
653
/* 435 */     MCD_OPC_CheckPredicate, 8, 247, 23, 0, // Skip to: 6575
654
/* 440 */     MCD_OPC_Decode, 180, 6, 58, // Opcode: ADDU_QB_MM
655
/* 444 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 458
656
/* 449 */     MCD_OPC_CheckPredicate, 9, 233, 23, 0, // Skip to: 6575
657
/* 454 */     MCD_OPC_Decode, 178, 6, 58, // Opcode: ADDU_PH_MMR2
658
/* 458 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 472
659
/* 463 */     MCD_OPC_CheckPredicate, 9, 219, 23, 0, // Skip to: 6575
660
/* 468 */     MCD_OPC_Decode, 173, 6, 58, // Opcode: ADDUH_QB_MMR2
661
/* 472 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 486
662
/* 477 */     MCD_OPC_CheckPredicate, 8, 205, 23, 0, // Skip to: 6575
663
/* 482 */     MCD_OPC_Decode, 175, 21, 59, // Opcode: SHRAV_PH_MM
664
/* 486 */     MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 500
665
/* 491 */     MCD_OPC_CheckPredicate, 9, 191, 23, 0, // Skip to: 6575
666
/* 496 */     MCD_OPC_Decode, 177, 21, 59, // Opcode: SHRAV_QB_MMR2
667
/* 500 */     MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 514
668
/* 505 */     MCD_OPC_CheckPredicate, 8, 177, 23, 0, // Skip to: 6575
669
/* 510 */     MCD_OPC_Decode, 202, 22, 58, // Opcode: SUBQ_PH_MM
670
/* 514 */     MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 528
671
/* 519 */     MCD_OPC_CheckPredicate, 9, 163, 23, 0, // Skip to: 6575
672
/* 524 */     MCD_OPC_Decode, 194, 22, 58, // Opcode: SUBQH_PH_MMR2
673
/* 528 */     MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 542
674
/* 533 */     MCD_OPC_CheckPredicate, 9, 149, 23, 0, // Skip to: 6575
675
/* 538 */     MCD_OPC_Decode, 200, 22, 55, // Opcode: SUBQH_W_MMR2
676
/* 542 */     MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 556
677
/* 547 */     MCD_OPC_CheckPredicate, 8, 135, 23, 0, // Skip to: 6575
678
/* 552 */     MCD_OPC_Decode, 233, 22, 58, // Opcode: SUBU_QB_MM
679
/* 556 */     MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 570
680
/* 561 */     MCD_OPC_CheckPredicate, 9, 121, 23, 0, // Skip to: 6575
681
/* 566 */     MCD_OPC_Decode, 231, 22, 58, // Opcode: SUBU_PH_MMR2
682
/* 570 */     MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 584
683
/* 575 */     MCD_OPC_CheckPredicate, 9, 107, 23, 0, // Skip to: 6575
684
/* 580 */     MCD_OPC_Decode, 226, 22, 58, // Opcode: SUBUH_QB_MMR2
685
/* 584 */     MCD_OPC_FilterValue, 15, 9, 0, 0, // Skip to: 598
686
/* 589 */     MCD_OPC_CheckPredicate, 9, 93, 23, 0, // Skip to: 6575
687
/* 594 */     MCD_OPC_Decode, 235, 19, 60, // Opcode: PRECR_SRA_PH_W_MMR2
688
/* 598 */     MCD_OPC_FilterValue, 16, 9, 0, 0, // Skip to: 612
689
/* 603 */     MCD_OPC_CheckPredicate, 8, 79, 23, 0, // Skip to: 6575
690
/* 608 */     MCD_OPC_Decode, 152, 6, 58, // Opcode: ADDQ_S_PH_MM
691
/* 612 */     MCD_OPC_FilterValue, 17, 9, 0, 0, // Skip to: 626
692
/* 617 */     MCD_OPC_CheckPredicate, 9, 65, 23, 0, // Skip to: 6575
693
/* 622 */     MCD_OPC_Decode, 144, 6, 58, // Opcode: ADDQH_R_PH_MMR2
694
/* 626 */     MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 640
695
/* 631 */     MCD_OPC_CheckPredicate, 9, 51, 23, 0, // Skip to: 6575
696
/* 636 */     MCD_OPC_Decode, 146, 6, 55, // Opcode: ADDQH_R_W_MMR2
697
/* 640 */     MCD_OPC_FilterValue, 19, 9, 0, 0, // Skip to: 654
698
/* 645 */     MCD_OPC_CheckPredicate, 8, 37, 23, 0, // Skip to: 6575
699
/* 650 */     MCD_OPC_Decode, 184, 6, 58, // Opcode: ADDU_S_QB_MM
700
/* 654 */     MCD_OPC_FilterValue, 20, 9, 0, 0, // Skip to: 668
701
/* 659 */     MCD_OPC_CheckPredicate, 9, 23, 23, 0, // Skip to: 6575
702
/* 664 */     MCD_OPC_Decode, 182, 6, 58, // Opcode: ADDU_S_PH_MMR2
703
/* 668 */     MCD_OPC_FilterValue, 21, 9, 0, 0, // Skip to: 682
704
/* 673 */     MCD_OPC_CheckPredicate, 9, 9, 23, 0, // Skip to: 6575
705
/* 678 */     MCD_OPC_Decode, 175, 6, 58, // Opcode: ADDUH_R_QB_MMR2
706
/* 682 */     MCD_OPC_FilterValue, 22, 9, 0, 0, // Skip to: 696
707
/* 687 */     MCD_OPC_CheckPredicate, 8, 251, 22, 0, // Skip to: 6575
708
/* 692 */     MCD_OPC_Decode, 179, 21, 59, // Opcode: SHRAV_R_PH_MM
709
/* 696 */     MCD_OPC_FilterValue, 23, 9, 0, 0, // Skip to: 710
710
/* 701 */     MCD_OPC_CheckPredicate, 9, 237, 22, 0, // Skip to: 6575
711
/* 706 */     MCD_OPC_Decode, 181, 21, 59, // Opcode: SHRAV_R_QB_MMR2
712
/* 710 */     MCD_OPC_FilterValue, 24, 9, 0, 0, // Skip to: 724
713
/* 715 */     MCD_OPC_CheckPredicate, 8, 223, 22, 0, // Skip to: 6575
714
/* 720 */     MCD_OPC_Decode, 204, 22, 58, // Opcode: SUBQ_S_PH_MM
715
/* 724 */     MCD_OPC_FilterValue, 25, 9, 0, 0, // Skip to: 738
716
/* 729 */     MCD_OPC_CheckPredicate, 9, 209, 22, 0, // Skip to: 6575
717
/* 734 */     MCD_OPC_Decode, 196, 22, 58, // Opcode: SUBQH_R_PH_MMR2
718
/* 738 */     MCD_OPC_FilterValue, 26, 9, 0, 0, // Skip to: 752
719
/* 743 */     MCD_OPC_CheckPredicate, 9, 195, 22, 0, // Skip to: 6575
720
/* 748 */     MCD_OPC_Decode, 198, 22, 55, // Opcode: SUBQH_R_W_MMR2
721
/* 752 */     MCD_OPC_FilterValue, 27, 9, 0, 0, // Skip to: 766
722
/* 757 */     MCD_OPC_CheckPredicate, 8, 181, 22, 0, // Skip to: 6575
723
/* 762 */     MCD_OPC_Decode, 237, 22, 58, // Opcode: SUBU_S_QB_MM
724
/* 766 */     MCD_OPC_FilterValue, 28, 9, 0, 0, // Skip to: 780
725
/* 771 */     MCD_OPC_CheckPredicate, 9, 167, 22, 0, // Skip to: 6575
726
/* 776 */     MCD_OPC_Decode, 235, 22, 58, // Opcode: SUBU_S_PH_MMR2
727
/* 780 */     MCD_OPC_FilterValue, 29, 9, 0, 0, // Skip to: 794
728
/* 785 */     MCD_OPC_CheckPredicate, 9, 153, 22, 0, // Skip to: 6575
729
/* 790 */     MCD_OPC_Decode, 228, 22, 58, // Opcode: SUBUH_R_QB_MMR2
730
/* 794 */     MCD_OPC_FilterValue, 31, 144, 22, 0, // Skip to: 6575
731
/* 799 */     MCD_OPC_CheckPredicate, 9, 139, 22, 0, // Skip to: 6575
732
/* 804 */     MCD_OPC_Decode, 237, 19, 60, // Opcode: PRECR_SRA_R_PH_W_MMR2
733
/* 808 */     MCD_OPC_FilterValue, 14, 31, 0, 0, // Skip to: 844
734
/* 813 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
735
/* 816 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 830
736
/* 821 */     MCD_OPC_CheckPredicate, 8, 117, 22, 0, // Skip to: 6575
737
/* 826 */     MCD_OPC_Decode, 159, 21, 59, // Opcode: SHLLV_PH_MM
738
/* 830 */     MCD_OPC_FilterValue, 16, 108, 22, 0, // Skip to: 6575
739
/* 835 */     MCD_OPC_CheckPredicate, 8, 103, 22, 0, // Skip to: 6575
740
/* 840 */     MCD_OPC_Decode, 163, 21, 59, // Opcode: SHLLV_S_PH_MM
741
/* 844 */     MCD_OPC_FilterValue, 16, 213, 0, 0, // Skip to: 1062
742
/* 849 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
743
/* 852 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 866
744
/* 857 */     MCD_OPC_CheckPredicate, 7, 81, 22, 0, // Skip to: 6575
745
/* 862 */     MCD_OPC_Decode, 230, 21, 61, // Opcode: SLLV_MM
746
/* 866 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 880
747
/* 871 */     MCD_OPC_CheckPredicate, 7, 67, 22, 0, // Skip to: 6575
748
/* 876 */     MCD_OPC_Decode, 177, 22, 61, // Opcode: SRLV_MM
749
/* 880 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 894
750
/* 885 */     MCD_OPC_CheckPredicate, 7, 53, 22, 0, // Skip to: 6575
751
/* 890 */     MCD_OPC_Decode, 152, 22, 61, // Opcode: SRAV_MM
752
/* 894 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 908
753
/* 899 */     MCD_OPC_CheckPredicate, 7, 39, 22, 0, // Skip to: 6575
754
/* 904 */     MCD_OPC_Decode, 157, 20, 61, // Opcode: ROTRV_MM
755
/* 908 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 922
756
/* 913 */     MCD_OPC_CheckPredicate, 6, 25, 22, 0, // Skip to: 6575
757
/* 918 */     MCD_OPC_Decode, 199, 6, 55, // Opcode: ADD_MM
758
/* 922 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 936
759
/* 927 */     MCD_OPC_CheckPredicate, 6, 11, 22, 0, // Skip to: 6575
760
/* 932 */     MCD_OPC_Decode, 209, 6, 55, // Opcode: ADDu_MM
761
/* 936 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 950
762
/* 941 */     MCD_OPC_CheckPredicate, 6, 253, 21, 0, // Skip to: 6575
763
/* 946 */     MCD_OPC_Decode, 246, 22, 55, // Opcode: SUB_MM
764
/* 950 */     MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 964
765
/* 955 */     MCD_OPC_CheckPredicate, 6, 239, 21, 0, // Skip to: 6575
766
/* 960 */     MCD_OPC_Decode, 251, 22, 55, // Opcode: SUBu_MM
767
/* 964 */     MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 978
768
/* 969 */     MCD_OPC_CheckPredicate, 6, 225, 21, 0, // Skip to: 6575
769
/* 974 */     MCD_OPC_Decode, 245, 18, 55, // Opcode: MUL_MM
770
/* 978 */     MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 992
771
/* 983 */     MCD_OPC_CheckPredicate, 6, 211, 21, 0, // Skip to: 6575
772
/* 988 */     MCD_OPC_Decode, 227, 6, 55, // Opcode: AND_MM
773
/* 992 */     MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 1006
774
/* 997 */     MCD_OPC_CheckPredicate, 6, 197, 21, 0, // Skip to: 6575
775
/* 1002 */    MCD_OPC_Decode, 171, 19, 55, // Opcode: OR_MM
776
/* 1006 */    MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 1020
777
/* 1011 */    MCD_OPC_CheckPredicate, 6, 183, 21, 0, // Skip to: 6575
778
/* 1016 */    MCD_OPC_Decode, 154, 19, 55, // Opcode: NOR_MM
779
/* 1020 */    MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 1034
780
/* 1025 */    MCD_OPC_CheckPredicate, 6, 169, 21, 0, // Skip to: 6575
781
/* 1030 */    MCD_OPC_Decode, 180, 24, 55, // Opcode: XOR_MM
782
/* 1034 */    MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 1048
783
/* 1039 */    MCD_OPC_CheckPredicate, 7, 155, 21, 0, // Skip to: 6575
784
/* 1044 */    MCD_OPC_Decode, 244, 21, 55, // Opcode: SLT_MM
785
/* 1048 */    MCD_OPC_FilterValue, 14, 146, 21, 0, // Skip to: 6575
786
/* 1053 */    MCD_OPC_CheckPredicate, 7, 141, 21, 0, // Skip to: 6575
787
/* 1058 */    MCD_OPC_Decode, 254, 21, 55, // Opcode: SLTu_MM
788
/* 1062 */    MCD_OPC_FilterValue, 21, 199, 0, 0, // Skip to: 1266
789
/* 1067 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
790
/* 1070 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1084
791
/* 1075 */    MCD_OPC_CheckPredicate, 8, 119, 21, 0, // Skip to: 6575
792
/* 1080 */    MCD_OPC_Decode, 212, 18, 58, // Opcode: MULEU_S_PH_QBL_MM
793
/* 1084 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 1098
794
/* 1089 */    MCD_OPC_CheckPredicate, 8, 105, 21, 0, // Skip to: 6575
795
/* 1094 */    MCD_OPC_Decode, 214, 18, 58, // Opcode: MULEU_S_PH_QBR_MM
796
/* 1098 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 1112
797
/* 1103 */    MCD_OPC_CheckPredicate, 8, 91, 21, 0, // Skip to: 6575
798
/* 1108 */    MCD_OPC_Decode, 216, 18, 58, // Opcode: MULQ_RS_PH_MM
799
/* 1112 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 1126
800
/* 1117 */    MCD_OPC_CheckPredicate, 9, 77, 21, 0, // Skip to: 6575
801
/* 1122 */    MCD_OPC_Decode, 220, 18, 58, // Opcode: MULQ_S_PH_MMR2
802
/* 1126 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 1140
803
/* 1131 */    MCD_OPC_CheckPredicate, 9, 63, 21, 0, // Skip to: 6575
804
/* 1136 */    MCD_OPC_Decode, 218, 18, 55, // Opcode: MULQ_RS_W_MMR2
805
/* 1140 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 1154
806
/* 1145 */    MCD_OPC_CheckPredicate, 9, 49, 21, 0, // Skip to: 6575
807
/* 1150 */    MCD_OPC_Decode, 222, 18, 55, // Opcode: MULQ_S_W_MMR2
808
/* 1154 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 1168
809
/* 1159 */    MCD_OPC_CheckPredicate, 9, 35, 21, 0, // Skip to: 6575
810
/* 1164 */    MCD_OPC_Decode, 235, 6, 62, // Opcode: APPEND_MMR2
811
/* 1168 */    MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 1182
812
/* 1173 */    MCD_OPC_CheckPredicate, 9, 21, 21, 0, // Skip to: 6575
813
/* 1178 */    MCD_OPC_Decode, 248, 19, 62, // Opcode: PREPEND_MMR2
814
/* 1182 */    MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 1196
815
/* 1187 */    MCD_OPC_CheckPredicate, 8, 7, 21, 0, // Skip to: 6575
816
/* 1192 */    MCD_OPC_Decode, 194, 17, 55, // Opcode: MODSUB_MM
817
/* 1196 */    MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 1210
818
/* 1201 */    MCD_OPC_CheckPredicate, 8, 249, 20, 0, // Skip to: 6575
819
/* 1206 */    MCD_OPC_Decode, 183, 21, 61, // Opcode: SHRAV_R_W_MM
820
/* 1210 */    MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 1224
821
/* 1215 */    MCD_OPC_CheckPredicate, 9, 235, 20, 0, // Skip to: 6575
822
/* 1220 */    MCD_OPC_Decode, 195, 21, 59, // Opcode: SHRLV_PH_MMR2
823
/* 1224 */    MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 1238
824
/* 1229 */    MCD_OPC_CheckPredicate, 8, 221, 20, 0, // Skip to: 6575
825
/* 1234 */    MCD_OPC_Decode, 197, 21, 59, // Opcode: SHRLV_QB_MM
826
/* 1238 */    MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 1252
827
/* 1243 */    MCD_OPC_CheckPredicate, 8, 207, 20, 0, // Skip to: 6575
828
/* 1248 */    MCD_OPC_Decode, 161, 21, 59, // Opcode: SHLLV_QB_MM
829
/* 1252 */    MCD_OPC_FilterValue, 15, 198, 20, 0, // Skip to: 6575
830
/* 1257 */    MCD_OPC_CheckPredicate, 8, 193, 20, 0, // Skip to: 6575
831
/* 1262 */    MCD_OPC_Decode, 165, 21, 61, // Opcode: SHLLV_S_W_MM
832
/* 1266 */    MCD_OPC_FilterValue, 24, 45, 0, 0, // Skip to: 1316
833
/* 1271 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
834
/* 1274 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1288
835
/* 1279 */    MCD_OPC_CheckPredicate, 6, 171, 20, 0, // Skip to: 6575
836
/* 1284 */    MCD_OPC_Decode, 234, 17, 63, // Opcode: MOVN_I_MM
837
/* 1288 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 1302
838
/* 1293 */    MCD_OPC_CheckPredicate, 6, 157, 20, 0, // Skip to: 6575
839
/* 1298 */    MCD_OPC_Decode, 255, 17, 63, // Opcode: MOVZ_I_MM
840
/* 1302 */    MCD_OPC_FilterValue, 4, 148, 20, 0, // Skip to: 6575
841
/* 1307 */    MCD_OPC_CheckPredicate, 7, 143, 20, 0, // Skip to: 6575
842
/* 1312 */    MCD_OPC_Decode, 175, 16, 64, // Opcode: LWXS_MM
843
/* 1316 */    MCD_OPC_FilterValue, 29, 23, 0, 0, // Skip to: 1344
844
/* 1321 */    MCD_OPC_CheckPredicate, 8, 129, 20, 0, // Skip to: 6575
845
/* 1326 */    MCD_OPC_CheckField, 22, 4, 0, 122, 20, 0, // Skip to: 6575
846
/* 1333 */    MCD_OPC_CheckField, 6, 8, 0, 115, 20, 0, // Skip to: 6575
847
/* 1340 */    MCD_OPC_Decode, 157, 21, 65, // Opcode: SHILO_MM
848
/* 1344 */    MCD_OPC_FilterValue, 37, 73, 0, 0, // Skip to: 1422
849
/* 1349 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
850
/* 1352 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1366
851
/* 1357 */    MCD_OPC_CheckPredicate, 8, 93, 20, 0, // Skip to: 6575
852
/* 1362 */    MCD_OPC_Decode, 208, 18, 54, // Opcode: MULEQ_S_W_PHL_MM
853
/* 1366 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 1380
854
/* 1371 */    MCD_OPC_CheckPredicate, 8, 79, 20, 0, // Skip to: 6575
855
/* 1376 */    MCD_OPC_Decode, 210, 18, 54, // Opcode: MULEQ_S_W_PHR_MM
856
/* 1380 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 1394
857
/* 1385 */    MCD_OPC_CheckPredicate, 8, 65, 20, 0, // Skip to: 6575
858
/* 1390 */    MCD_OPC_Decode, 221, 15, 64, // Opcode: LHX_MM
859
/* 1394 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 1408
860
/* 1399 */    MCD_OPC_CheckPredicate, 8, 51, 20, 0, // Skip to: 6575
861
/* 1404 */    MCD_OPC_Decode, 177, 16, 64, // Opcode: LWX_MM
862
/* 1408 */    MCD_OPC_FilterValue, 8, 42, 20, 0, // Skip to: 6575
863
/* 1413 */    MCD_OPC_CheckPredicate, 8, 37, 20, 0, // Skip to: 6575
864
/* 1418 */    MCD_OPC_Decode, 164, 15, 64, // Opcode: LBUX_MM
865
/* 1422 */    MCD_OPC_FilterValue, 44, 9, 0, 0, // Skip to: 1436
866
/* 1427 */    MCD_OPC_CheckPredicate, 6, 23, 20, 0, // Skip to: 6575
867
/* 1432 */    MCD_OPC_Decode, 255, 12, 66, // Opcode: EXT_MM
868
/* 1436 */    MCD_OPC_FilterValue, 45, 143, 0, 0, // Skip to: 1584
869
/* 1441 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
870
/* 1444 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1458
871
/* 1449 */    MCD_OPC_CheckPredicate, 9, 1, 20, 0, // Skip to: 6575
872
/* 1454 */    MCD_OPC_Decode, 249, 18, 58, // Opcode: MUL_PH_MMR2
873
/* 1458 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 1472
874
/* 1463 */    MCD_OPC_CheckPredicate, 9, 243, 19, 0, // Skip to: 6575
875
/* 1468 */    MCD_OPC_Decode, 233, 19, 58, // Opcode: PRECR_QB_PH_MMR2
876
/* 1472 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1486
877
/* 1477 */    MCD_OPC_CheckPredicate, 8, 229, 19, 0, // Skip to: 6575
878
/* 1482 */    MCD_OPC_Decode, 229, 19, 58, // Opcode: PRECRQ_QB_PH_MM
879
/* 1486 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 1500
880
/* 1491 */    MCD_OPC_CheckPredicate, 8, 215, 19, 0, // Skip to: 6575
881
/* 1496 */    MCD_OPC_Decode, 227, 19, 67, // Opcode: PRECRQ_PH_W_MM
882
/* 1500 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 1514
883
/* 1505 */    MCD_OPC_CheckPredicate, 8, 201, 19, 0, // Skip to: 6575
884
/* 1510 */    MCD_OPC_Decode, 231, 19, 67, // Opcode: PRECRQ_RS_PH_W_MM
885
/* 1514 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 1528
886
/* 1519 */    MCD_OPC_CheckPredicate, 8, 187, 19, 0, // Skip to: 6575
887
/* 1524 */    MCD_OPC_Decode, 225, 19, 58, // Opcode: PRECRQU_S_QB_PH_MM
888
/* 1528 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 1542
889
/* 1533 */    MCD_OPC_CheckPredicate, 8, 173, 19, 0, // Skip to: 6575
890
/* 1538 */    MCD_OPC_Decode, 180, 19, 58, // Opcode: PACKRL_PH_MM
891
/* 1542 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 1556
892
/* 1547 */    MCD_OPC_CheckPredicate, 8, 159, 19, 0, // Skip to: 6575
893
/* 1552 */    MCD_OPC_Decode, 200, 19, 58, // Opcode: PICK_QB_MM
894
/* 1556 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 1570
895
/* 1561 */    MCD_OPC_CheckPredicate, 8, 145, 19, 0, // Skip to: 6575
896
/* 1566 */    MCD_OPC_Decode, 198, 19, 58, // Opcode: PICK_PH_MM
897
/* 1570 */    MCD_OPC_FilterValue, 16, 136, 19, 0, // Skip to: 6575
898
/* 1575 */    MCD_OPC_CheckPredicate, 9, 131, 19, 0, // Skip to: 6575
899
/* 1580 */    MCD_OPC_Decode, 254, 18, 58, // Opcode: MUL_S_PH_MMR2
900
/* 1584 */    MCD_OPC_FilterValue, 52, 45, 0, 0, // Skip to: 1634
901
/* 1589 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
902
/* 1592 */    MCD_OPC_FilterValue, 19, 16, 0, 0, // Skip to: 1613
903
/* 1597 */    MCD_OPC_CheckPredicate, 10, 109, 19, 0, // Skip to: 6575
904
/* 1602 */    MCD_OPC_CheckField, 14, 2, 0, 102, 19, 0, // Skip to: 6575
905
/* 1609 */    MCD_OPC_Decode, 149, 17, 68, // Opcode: MFHGC0_MM
906
/* 1613 */    MCD_OPC_FilterValue, 27, 93, 19, 0, // Skip to: 6575
907
/* 1618 */    MCD_OPC_CheckPredicate, 10, 88, 19, 0, // Skip to: 6575
908
/* 1623 */    MCD_OPC_CheckField, 14, 2, 0, 81, 19, 0, // Skip to: 6575
909
/* 1630 */    MCD_OPC_Decode, 178, 18, 69, // Opcode: MTHGC0_MM
910
/* 1634 */    MCD_OPC_FilterValue, 53, 109, 0, 0, // Skip to: 1748
911
/* 1639 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
912
/* 1642 */    MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 1656
913
/* 1647 */    MCD_OPC_CheckPredicate, 8, 59, 19, 0, // Skip to: 6575
914
/* 1652 */    MCD_OPC_Decode, 193, 21, 52, // Opcode: SHRA_R_W_MM
915
/* 1656 */    MCD_OPC_FilterValue, 12, 16, 0, 0, // Skip to: 1677
916
/* 1661 */    MCD_OPC_CheckPredicate, 8, 45, 19, 0, // Skip to: 6575
917
/* 1666 */    MCD_OPC_CheckField, 11, 1, 0, 38, 19, 0, // Skip to: 6575
918
/* 1673 */    MCD_OPC_Decode, 185, 21, 70, // Opcode: SHRA_PH_MM
919
/* 1677 */    MCD_OPC_FilterValue, 14, 31, 0, 0, // Skip to: 1713
920
/* 1682 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
921
/* 1685 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1699
922
/* 1690 */    MCD_OPC_CheckPredicate, 8, 16, 19, 0, // Skip to: 6575
923
/* 1695 */    MCD_OPC_Decode, 167, 21, 70, // Opcode: SHLL_PH_MM
924
/* 1699 */    MCD_OPC_FilterValue, 1, 7, 19, 0, // Skip to: 6575
925
/* 1704 */    MCD_OPC_CheckPredicate, 8, 2, 19, 0, // Skip to: 6575
926
/* 1709 */    MCD_OPC_Decode, 171, 21, 70, // Opcode: SHLL_S_PH_MM
927
/* 1713 */    MCD_OPC_FilterValue, 15, 9, 0, 0, // Skip to: 1727
928
/* 1718 */    MCD_OPC_CheckPredicate, 8, 244, 18, 0, // Skip to: 6575
929
/* 1723 */    MCD_OPC_Decode, 173, 21, 52, // Opcode: SHLL_S_W_MM
930
/* 1727 */    MCD_OPC_FilterValue, 28, 235, 18, 0, // Skip to: 6575
931
/* 1732 */    MCD_OPC_CheckPredicate, 8, 230, 18, 0, // Skip to: 6575
932
/* 1737 */    MCD_OPC_CheckField, 11, 1, 0, 223, 18, 0, // Skip to: 6575
933
/* 1744 */    MCD_OPC_Decode, 189, 21, 70, // Opcode: SHRA_R_PH_MM
934
/* 1748 */    MCD_OPC_FilterValue, 60, 8, 8, 0, // Skip to: 3809
935
/* 1753 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
936
/* 1756 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 1792
937
/* 1761 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
938
/* 1764 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1778
939
/* 1769 */    MCD_OPC_CheckPredicate, 7, 193, 18, 0, // Skip to: 6575
940
/* 1774 */    MCD_OPC_Decode, 210, 23, 71, // Opcode: TEQ_MM
941
/* 1778 */    MCD_OPC_FilterValue, 1, 184, 18, 0, // Skip to: 6575
942
/* 1783 */    MCD_OPC_CheckPredicate, 7, 179, 18, 0, // Skip to: 6575
943
/* 1788 */    MCD_OPC_Decode, 128, 24, 71, // Opcode: TLT_MM
944
/* 1792 */    MCD_OPC_FilterValue, 1, 131, 0, 0, // Skip to: 1928
945
/* 1797 */    MCD_OPC_ExtractField, 11, 2,  // Inst{12-11} ...
946
/* 1800 */    MCD_OPC_FilterValue, 0, 45, 0, 0, // Skip to: 1850
947
/* 1805 */    MCD_OPC_ExtractField, 13, 1,  // Inst{13} ...
948
/* 1808 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1829
949
/* 1813 */    MCD_OPC_CheckPredicate, 8, 149, 18, 0, // Skip to: 6575
950
/* 1818 */    MCD_OPC_CheckField, 21, 5, 0, 142, 18, 0, // Skip to: 6575
951
/* 1825 */    MCD_OPC_Decode, 154, 17, 72, // Opcode: MFHI_DSP_MM
952
/* 1829 */    MCD_OPC_FilterValue, 1, 133, 18, 0, // Skip to: 6575
953
/* 1834 */    MCD_OPC_CheckPredicate, 8, 128, 18, 0, // Skip to: 6575
954
/* 1839 */    MCD_OPC_CheckField, 21, 5, 0, 121, 18, 0, // Skip to: 6575
955
/* 1846 */    MCD_OPC_Decode, 182, 18, 73, // Opcode: MTHI_DSP_MM
956
/* 1850 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 1864
957
/* 1855 */    MCD_OPC_CheckPredicate, 8, 107, 18, 0, // Skip to: 6575
958
/* 1860 */    MCD_OPC_Decode, 169, 21, 74, // Opcode: SHLL_QB_MM
959
/* 1864 */    MCD_OPC_FilterValue, 2, 45, 0, 0, // Skip to: 1914
960
/* 1869 */    MCD_OPC_ExtractField, 13, 1,  // Inst{13} ...
961
/* 1872 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1893
962
/* 1877 */    MCD_OPC_CheckPredicate, 8, 85, 18, 0, // Skip to: 6575
963
/* 1882 */    MCD_OPC_CheckField, 21, 5, 0, 78, 18, 0, // Skip to: 6575
964
/* 1889 */    MCD_OPC_Decode, 160, 17, 72, // Opcode: MFLO_DSP_MM
965
/* 1893 */    MCD_OPC_FilterValue, 1, 69, 18, 0, // Skip to: 6575
966
/* 1898 */    MCD_OPC_CheckPredicate, 8, 64, 18, 0, // Skip to: 6575
967
/* 1903 */    MCD_OPC_CheckField, 21, 5, 0, 57, 18, 0, // Skip to: 6575
968
/* 1910 */    MCD_OPC_Decode, 189, 18, 75, // Opcode: MTLO_DSP_MM
969
/* 1914 */    MCD_OPC_FilterValue, 3, 48, 18, 0, // Skip to: 6575
970
/* 1919 */    MCD_OPC_CheckPredicate, 8, 43, 18, 0, // Skip to: 6575
971
/* 1924 */    MCD_OPC_Decode, 201, 21, 74, // Opcode: SHRL_QB_MM
972
/* 1928 */    MCD_OPC_FilterValue, 2, 101, 0, 0, // Skip to: 2034
973
/* 1933 */    MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
974
/* 1936 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1950
975
/* 1941 */    MCD_OPC_CheckPredicate, 9, 21, 18, 0, // Skip to: 6575
976
/* 1946 */    MCD_OPC_Decode, 157, 12, 76, // Opcode: DPA_W_PH_MMR2
977
/* 1950 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 1964
978
/* 1955 */    MCD_OPC_CheckPredicate, 9, 7, 18, 0, // Skip to: 6575
979
/* 1960 */    MCD_OPC_Decode, 153, 7, 77, // Opcode: BALIGN_MMR2
980
/* 1964 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 1978
981
/* 1969 */    MCD_OPC_CheckPredicate, 9, 249, 17, 0, // Skip to: 6575
982
/* 1974 */    MCD_OPC_Decode, 155, 12, 76, // Opcode: DPAX_W_PH_MMR2
983
/* 1978 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 1992
984
/* 1983 */    MCD_OPC_CheckPredicate, 8, 235, 17, 0, // Skip to: 6575
985
/* 1988 */    MCD_OPC_Decode, 151, 12, 76, // Opcode: DPAU_H_QBL_MM
986
/* 1992 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 2006
987
/* 1997 */    MCD_OPC_CheckPredicate, 8, 221, 17, 0, // Skip to: 6575
988
/* 2002 */    MCD_OPC_Decode, 234, 12, 78, // Opcode: EXTPV_MM
989
/* 2006 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 2020
990
/* 2011 */    MCD_OPC_CheckPredicate, 8, 207, 17, 0, // Skip to: 6575
991
/* 2016 */    MCD_OPC_Decode, 153, 12, 76, // Opcode: DPAU_H_QBR_MM
992
/* 2020 */    MCD_OPC_FilterValue, 7, 198, 17, 0, // Skip to: 6575
993
/* 2025 */    MCD_OPC_CheckPredicate, 8, 193, 17, 0, // Skip to: 6575
994
/* 2030 */    MCD_OPC_Decode, 231, 12, 78, // Opcode: EXTPDPV_MM
995
/* 2034 */    MCD_OPC_FilterValue, 4, 171, 0, 0, // Skip to: 2210
996
/* 2039 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
997
/* 2042 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2056
998
/* 2047 */    MCD_OPC_CheckPredicate, 9, 171, 17, 0, // Skip to: 6575
999
/* 2052 */    MCD_OPC_Decode, 248, 5, 79, // Opcode: ABSQ_S_QB_MMR2
1000
/* 2056 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2070
1001
/* 2061 */    MCD_OPC_CheckPredicate, 8, 157, 17, 0, // Skip to: 6575
1002
/* 2066 */    MCD_OPC_Decode, 246, 5, 79, // Opcode: ABSQ_S_PH_MM
1003
/* 2070 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 2084
1004
/* 2075 */    MCD_OPC_CheckPredicate, 8, 143, 17, 0, // Skip to: 6575
1005
/* 2080 */    MCD_OPC_Decode, 250, 5, 80, // Opcode: ABSQ_S_W_MM
1006
/* 2084 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 2098
1007
/* 2089 */    MCD_OPC_CheckPredicate, 8, 129, 17, 0, // Skip to: 6575
1008
/* 2094 */    MCD_OPC_Decode, 131, 8, 80, // Opcode: BITREV_MM
1009
/* 2098 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 2112
1010
/* 2103 */    MCD_OPC_CheckPredicate, 8, 115, 17, 0, // Skip to: 6575
1011
/* 2108 */    MCD_OPC_Decode, 230, 14, 81, // Opcode: INSV_MM
1012
/* 2112 */    MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 2126
1013
/* 2117 */    MCD_OPC_CheckPredicate, 8, 101, 17, 0, // Skip to: 6575
1014
/* 2122 */    MCD_OPC_Decode, 213, 19, 82, // Opcode: PRECEQ_W_PHL_MM
1015
/* 2126 */    MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 2140
1016
/* 2131 */    MCD_OPC_CheckPredicate, 8, 87, 17, 0, // Skip to: 6575
1017
/* 2136 */    MCD_OPC_Decode, 215, 19, 82, // Opcode: PRECEQ_W_PHR_MM
1018
/* 2140 */    MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 2154
1019
/* 2145 */    MCD_OPC_CheckPredicate, 8, 73, 17, 0, // Skip to: 6575
1020
/* 2150 */    MCD_OPC_Decode, 207, 19, 79, // Opcode: PRECEQU_PH_QBL_MM
1021
/* 2154 */    MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 2168
1022
/* 2159 */    MCD_OPC_CheckPredicate, 8, 59, 17, 0, // Skip to: 6575
1023
/* 2164 */    MCD_OPC_Decode, 211, 19, 79, // Opcode: PRECEQU_PH_QBR_MM
1024
/* 2168 */    MCD_OPC_FilterValue, 22, 9, 0, 0, // Skip to: 2182
1025
/* 2173 */    MCD_OPC_CheckPredicate, 8, 45, 17, 0, // Skip to: 6575
1026
/* 2178 */    MCD_OPC_Decode, 219, 19, 79, // Opcode: PRECEU_PH_QBL_MM
1027
/* 2182 */    MCD_OPC_FilterValue, 26, 9, 0, 0, // Skip to: 2196
1028
/* 2187 */    MCD_OPC_CheckPredicate, 8, 31, 17, 0, // Skip to: 6575
1029
/* 2192 */    MCD_OPC_Decode, 223, 19, 79, // Opcode: PRECEU_PH_QBR_MM
1030
/* 2196 */    MCD_OPC_FilterValue, 30, 22, 17, 0, // Skip to: 6575
1031
/* 2201 */    MCD_OPC_CheckPredicate, 8, 17, 17, 0, // Skip to: 6575
1032
/* 2206 */    MCD_OPC_Decode, 252, 19, 82, // Opcode: RADDU_W_QB_MM
1033
/* 2210 */    MCD_OPC_FilterValue, 5, 87, 0, 0, // Skip to: 2302
1034
/* 2215 */    MCD_OPC_ExtractField, 11, 15,  // Inst{25-11} ...
1035
/* 2218 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2232
1036
/* 2223 */    MCD_OPC_CheckPredicate, 10, 251, 16, 0, // Skip to: 6575
1037
/* 2228 */    MCD_OPC_Decode, 225, 23, 10, // Opcode: TLBGP_MM
1038
/* 2232 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2246
1039
/* 2237 */    MCD_OPC_CheckPredicate, 10, 237, 16, 0, // Skip to: 6575
1040
/* 2242 */    MCD_OPC_Decode, 227, 23, 10, // Opcode: TLBGR_MM
1041
/* 2246 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 2260
1042
/* 2251 */    MCD_OPC_CheckPredicate, 10, 223, 16, 0, // Skip to: 6575
1043
/* 2256 */    MCD_OPC_Decode, 229, 23, 10, // Opcode: TLBGWI_MM
1044
/* 2260 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 2274
1045
/* 2265 */    MCD_OPC_CheckPredicate, 10, 209, 16, 0, // Skip to: 6575
1046
/* 2270 */    MCD_OPC_Decode, 231, 23, 10, // Opcode: TLBGWR_MM
1047
/* 2274 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 2288
1048
/* 2279 */    MCD_OPC_CheckPredicate, 10, 195, 16, 0, // Skip to: 6575
1049
/* 2284 */    MCD_OPC_Decode, 223, 23, 10, // Opcode: TLBGINV_MM
1050
/* 2288 */    MCD_OPC_FilterValue, 10, 186, 16, 0, // Skip to: 6575
1051
/* 2293 */    MCD_OPC_CheckPredicate, 10, 181, 16, 0, // Skip to: 6575
1052
/* 2298 */    MCD_OPC_Decode, 222, 23, 10, // Opcode: TLBGINVF_MM
1053
/* 2302 */    MCD_OPC_FilterValue, 7, 31, 0, 0, // Skip to: 2338
1054
/* 2307 */    MCD_OPC_ExtractField, 11, 2,  // Inst{12-11} ...
1055
/* 2310 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2324
1056
/* 2315 */    MCD_OPC_CheckPredicate, 9, 159, 16, 0, // Skip to: 6575
1057
/* 2320 */    MCD_OPC_Decode, 187, 21, 74, // Opcode: SHRA_QB_MMR2
1058
/* 2324 */    MCD_OPC_FilterValue, 2, 150, 16, 0, // Skip to: 6575
1059
/* 2329 */    MCD_OPC_CheckPredicate, 9, 145, 16, 0, // Skip to: 6575
1060
/* 2334 */    MCD_OPC_Decode, 191, 21, 74, // Opcode: SHRA_R_QB_MMR2
1061
/* 2338 */    MCD_OPC_FilterValue, 8, 31, 0, 0, // Skip to: 2374
1062
/* 2343 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
1063
/* 2346 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2360
1064
/* 2351 */    MCD_OPC_CheckPredicate, 7, 123, 16, 0, // Skip to: 6575
1065
/* 2356 */    MCD_OPC_Decode, 219, 23, 71, // Opcode: TGE_MM
1066
/* 2360 */    MCD_OPC_FilterValue, 1, 114, 16, 0, // Skip to: 6575
1067
/* 2365 */    MCD_OPC_CheckPredicate, 7, 109, 16, 0, // Skip to: 6575
1068
/* 2370 */    MCD_OPC_Decode, 255, 23, 71, // Opcode: TLTU_MM
1069
/* 2374 */    MCD_OPC_FilterValue, 9, 101, 0, 0, // Skip to: 2480
1070
/* 2379 */    MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
1071
/* 2382 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 2403
1072
/* 2387 */    MCD_OPC_CheckPredicate, 8, 87, 16, 0, // Skip to: 6575
1073
/* 2392 */    MCD_OPC_CheckField, 21, 5, 0, 80, 16, 0, // Skip to: 6575
1074
/* 2399 */    MCD_OPC_Decode, 185, 18, 83, // Opcode: MTHLIP_MM
1075
/* 2403 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2417
1076
/* 2408 */    MCD_OPC_CheckPredicate, 8, 66, 16, 0, // Skip to: 6575
1077
/* 2413 */    MCD_OPC_Decode, 227, 16, 76, // Opcode: MAQ_S_W_PHR_MM
1078
/* 2417 */    MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 2438
1079
/* 2422 */    MCD_OPC_CheckPredicate, 8, 52, 16, 0, // Skip to: 6575
1080
/* 2427 */    MCD_OPC_CheckField, 21, 5, 0, 45, 16, 0, // Skip to: 6575
1081
/* 2434 */    MCD_OPC_Decode, 156, 21, 83, // Opcode: SHILOV_MM
1082
/* 2438 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 2452
1083
/* 2443 */    MCD_OPC_CheckPredicate, 8, 31, 16, 0, // Skip to: 6575
1084
/* 2448 */    MCD_OPC_Decode, 225, 16, 76, // Opcode: MAQ_S_W_PHL_MM
1085
/* 2452 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 2466
1086
/* 2457 */    MCD_OPC_CheckPredicate, 8, 17, 16, 0, // Skip to: 6575
1087
/* 2462 */    MCD_OPC_Decode, 223, 16, 76, // Opcode: MAQ_SA_W_PHR_MM
1088
/* 2466 */    MCD_OPC_FilterValue, 7, 8, 16, 0, // Skip to: 6575
1089
/* 2471 */    MCD_OPC_CheckPredicate, 8, 3, 16, 0, // Skip to: 6575
1090
/* 2476 */    MCD_OPC_Decode, 221, 16, 76, // Opcode: MAQ_SA_W_PHL_MM
1091
/* 2480 */    MCD_OPC_FilterValue, 10, 115, 0, 0, // Skip to: 2600
1092
/* 2485 */    MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
1093
/* 2488 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2502
1094
/* 2493 */    MCD_OPC_CheckPredicate, 8, 237, 15, 0, // Skip to: 6575
1095
/* 2498 */    MCD_OPC_Decode, 149, 12, 76, // Opcode: DPAQ_S_W_PH_MM
1096
/* 2502 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2516
1097
/* 2507 */    MCD_OPC_CheckPredicate, 8, 223, 15, 0, // Skip to: 6575
1098
/* 2512 */    MCD_OPC_Decode, 214, 16, 76, // Opcode: MADD_DSP_MM
1099
/* 2516 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2530
1100
/* 2521 */    MCD_OPC_CheckPredicate, 8, 209, 15, 0, // Skip to: 6575
1101
/* 2526 */    MCD_OPC_Decode, 147, 12, 76, // Opcode: DPAQ_SA_L_W_MM
1102
/* 2530 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 2544
1103
/* 2535 */    MCD_OPC_CheckPredicate, 8, 195, 15, 0, // Skip to: 6575
1104
/* 2540 */    MCD_OPC_Decode, 204, 16, 76, // Opcode: MADDU_DSP_MM
1105
/* 2544 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 2558
1106
/* 2549 */    MCD_OPC_CheckPredicate, 9, 181, 15, 0, // Skip to: 6575
1107
/* 2554 */    MCD_OPC_Decode, 145, 12, 76, // Opcode: DPAQX_S_W_PH_MMR2
1108
/* 2558 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 2572
1109
/* 2563 */    MCD_OPC_CheckPredicate, 8, 167, 15, 0, // Skip to: 6575
1110
/* 2568 */    MCD_OPC_Decode, 150, 18, 76, // Opcode: MSUB_DSP_MM
1111
/* 2572 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 2586
1112
/* 2577 */    MCD_OPC_CheckPredicate, 9, 153, 15, 0, // Skip to: 6575
1113
/* 2582 */    MCD_OPC_Decode, 143, 12, 76, // Opcode: DPAQX_SA_W_PH_MMR2
1114
/* 2586 */    MCD_OPC_FilterValue, 7, 144, 15, 0, // Skip to: 6575
1115
/* 2591 */    MCD_OPC_CheckPredicate, 8, 139, 15, 0, // Skip to: 6575
1116
/* 2596 */    MCD_OPC_Decode, 140, 18, 76, // Opcode: MSUBU_DSP_MM
1117
/* 2600 */    MCD_OPC_FilterValue, 12, 27, 1, 0, // Skip to: 2888
1118
/* 2605 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
1119
/* 2608 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2622
1120
/* 2613 */    MCD_OPC_CheckPredicate, 8, 117, 15, 0, // Skip to: 6575
1121
/* 2618 */    MCD_OPC_Decode, 141, 20, 84, // Opcode: REPLV_PH_MM
1122
/* 2622 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2636
1123
/* 2627 */    MCD_OPC_CheckPredicate, 8, 103, 15, 0, // Skip to: 6575
1124
/* 2632 */    MCD_OPC_Decode, 143, 20, 84, // Opcode: REPLV_QB_MM
1125
/* 2636 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 2650
1126
/* 2641 */    MCD_OPC_CheckPredicate, 7, 89, 15, 0, // Skip to: 6575
1127
/* 2646 */    MCD_OPC_Decode, 244, 20, 80, // Opcode: SEB_MM
1128
/* 2650 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 2664
1129
/* 2655 */    MCD_OPC_CheckPredicate, 7, 75, 15, 0, // Skip to: 6575
1130
/* 2660 */    MCD_OPC_Decode, 248, 20, 80, // Opcode: SEH_MM
1131
/* 2664 */    MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 2678
1132
/* 2669 */    MCD_OPC_CheckPredicate, 7, 61, 15, 0, // Skip to: 6575
1133
/* 2674 */    MCD_OPC_Decode, 173, 9, 80, // Opcode: CLO_MM
1134
/* 2678 */    MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 2692
1135
/* 2683 */    MCD_OPC_CheckPredicate, 7, 47, 15, 0, // Skip to: 6575
1136
/* 2688 */    MCD_OPC_Decode, 194, 9, 80, // Opcode: CLZ_MM
1137
/* 2692 */    MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 2706
1138
/* 2697 */    MCD_OPC_CheckPredicate, 6, 33, 15, 0, // Skip to: 6575
1139
/* 2702 */    MCD_OPC_Decode, 129, 20, 85, // Opcode: RDHWR_MM
1140
/* 2706 */    MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 2720
1141
/* 2711 */    MCD_OPC_CheckPredicate, 8, 19, 15, 0, // Skip to: 6575
1142
/* 2716 */    MCD_OPC_Decode, 206, 19, 79, // Opcode: PRECEQU_PH_QBLA_MM
1143
/* 2720 */    MCD_OPC_FilterValue, 15, 9, 0, 0, // Skip to: 2734
1144
/* 2725 */    MCD_OPC_CheckPredicate, 7, 5, 15, 0, // Skip to: 6575
1145
/* 2730 */    MCD_OPC_Decode, 170, 24, 80, // Opcode: WSBH_MM
1146
/* 2734 */    MCD_OPC_FilterValue, 17, 9, 0, 0, // Skip to: 2748
1147
/* 2739 */    MCD_OPC_CheckPredicate, 6, 247, 14, 0, // Skip to: 6575
1148
/* 2744 */    MCD_OPC_Decode, 235, 18, 86, // Opcode: MULT_MM
1149
/* 2748 */    MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 2762
1150
/* 2753 */    MCD_OPC_CheckPredicate, 8, 233, 14, 0, // Skip to: 6575
1151
/* 2758 */    MCD_OPC_Decode, 210, 19, 79, // Opcode: PRECEQU_PH_QBRA_MM
1152
/* 2762 */    MCD_OPC_FilterValue, 19, 9, 0, 0, // Skip to: 2776
1153
/* 2767 */    MCD_OPC_CheckPredicate, 6, 219, 14, 0, // Skip to: 6575
1154
/* 2772 */    MCD_OPC_Decode, 237, 18, 86, // Opcode: MULTu_MM
1155
/* 2776 */    MCD_OPC_FilterValue, 21, 9, 0, 0, // Skip to: 2790
1156
/* 2781 */    MCD_OPC_CheckPredicate, 6, 205, 14, 0, // Skip to: 6575
1157
/* 2786 */    MCD_OPC_Decode, 237, 20, 86, // Opcode: SDIV_MM
1158
/* 2790 */    MCD_OPC_FilterValue, 22, 9, 0, 0, // Skip to: 2804
1159
/* 2795 */    MCD_OPC_CheckPredicate, 8, 191, 14, 0, // Skip to: 6575
1160
/* 2800 */    MCD_OPC_Decode, 218, 19, 79, // Opcode: PRECEU_PH_QBLA_MM
1161
/* 2804 */    MCD_OPC_FilterValue, 23, 9, 0, 0, // Skip to: 2818
1162
/* 2809 */    MCD_OPC_CheckPredicate, 6, 177, 14, 0, // Skip to: 6575
1163
/* 2814 */    MCD_OPC_Decode, 153, 24, 86, // Opcode: UDIV_MM
1164
/* 2818 */    MCD_OPC_FilterValue, 25, 9, 0, 0, // Skip to: 2832
1165
/* 2823 */    MCD_OPC_CheckPredicate, 6, 163, 14, 0, // Skip to: 6575
1166
/* 2828 */    MCD_OPC_Decode, 215, 16, 86, // Opcode: MADD_MM
1167
/* 2832 */    MCD_OPC_FilterValue, 26, 9, 0, 0, // Skip to: 2846
1168
/* 2837 */    MCD_OPC_CheckPredicate, 8, 149, 14, 0, // Skip to: 6575
1169
/* 2842 */    MCD_OPC_Decode, 222, 19, 79, // Opcode: PRECEU_PH_QBRA_MM
1170
/* 2846 */    MCD_OPC_FilterValue, 27, 9, 0, 0, // Skip to: 2860
1171
/* 2851 */    MCD_OPC_CheckPredicate, 6, 135, 14, 0, // Skip to: 6575
1172
/* 2856 */    MCD_OPC_Decode, 205, 16, 86, // Opcode: MADDU_MM
1173
/* 2860 */    MCD_OPC_FilterValue, 29, 9, 0, 0, // Skip to: 2874
1174
/* 2865 */    MCD_OPC_CheckPredicate, 6, 121, 14, 0, // Skip to: 6575
1175
/* 2870 */    MCD_OPC_Decode, 151, 18, 86, // Opcode: MSUB_MM
1176
/* 2874 */    MCD_OPC_FilterValue, 31, 112, 14, 0, // Skip to: 6575
1177
/* 2879 */    MCD_OPC_CheckPredicate, 6, 107, 14, 0, // Skip to: 6575
1178
/* 2884 */    MCD_OPC_Decode, 141, 18, 86, // Opcode: MSUBU_MM
1179
/* 2888 */    MCD_OPC_FilterValue, 13, 206, 0, 0, // Skip to: 3099
1180
/* 2893 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
1181
/* 2896 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 2917
1182
/* 2901 */    MCD_OPC_CheckPredicate, 7, 85, 14, 0, // Skip to: 6575
1183
/* 2906 */    MCD_OPC_CheckField, 16, 10, 0, 78, 14, 0, // Skip to: 6575
1184
/* 2913 */    MCD_OPC_Decode, 239, 23, 10, // Opcode: TLBP_MM
1185
/* 2917 */    MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 2938
1186
/* 2922 */    MCD_OPC_CheckPredicate, 7, 64, 14, 0, // Skip to: 6575
1187
/* 2927 */    MCD_OPC_CheckField, 16, 10, 0, 57, 14, 0, // Skip to: 6575
1188
/* 2934 */    MCD_OPC_Decode, 242, 23, 10, // Opcode: TLBR_MM
1189
/* 2938 */    MCD_OPC_FilterValue, 4, 16, 0, 0, // Skip to: 2959
1190
/* 2943 */    MCD_OPC_CheckPredicate, 7, 43, 14, 0, // Skip to: 6575
1191
/* 2948 */    MCD_OPC_CheckField, 16, 10, 0, 36, 14, 0, // Skip to: 6575
1192
/* 2955 */    MCD_OPC_Decode, 245, 23, 10, // Opcode: TLBWI_MM
1193
/* 2959 */    MCD_OPC_FilterValue, 6, 16, 0, 0, // Skip to: 2980
1194
/* 2964 */    MCD_OPC_CheckPredicate, 7, 22, 14, 0, // Skip to: 6575
1195
/* 2969 */    MCD_OPC_CheckField, 16, 10, 0, 15, 14, 0, // Skip to: 6575
1196
/* 2976 */    MCD_OPC_Decode, 248, 23, 10, // Opcode: TLBWR_MM
1197
/* 2980 */    MCD_OPC_FilterValue, 13, 16, 0, 0, // Skip to: 3001
1198
/* 2985 */    MCD_OPC_CheckPredicate, 7, 1, 14, 0, // Skip to: 6575
1199
/* 2990 */    MCD_OPC_CheckField, 21, 5, 0, 250, 13, 0, // Skip to: 6575
1200
/* 2997 */    MCD_OPC_Decode, 179, 23, 87, // Opcode: SYNC_MM
1201
/* 3001 */    MCD_OPC_FilterValue, 17, 9, 0, 0, // Skip to: 3015
1202
/* 3006 */    MCD_OPC_CheckPredicate, 7, 236, 13, 0, // Skip to: 6575
1203
/* 3011 */    MCD_OPC_Decode, 184, 23, 88, // Opcode: SYSCALL_MM
1204
/* 3015 */    MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 3029
1205
/* 3020 */    MCD_OPC_CheckPredicate, 7, 222, 13, 0, // Skip to: 6575
1206
/* 3025 */    MCD_OPC_Decode, 162, 24, 88, // Opcode: WAIT_MM
1207
/* 3029 */    MCD_OPC_FilterValue, 24, 9, 0, 0, // Skip to: 3043
1208
/* 3034 */    MCD_OPC_CheckPredicate, 10, 208, 13, 0, // Skip to: 6575
1209
/* 3039 */    MCD_OPC_Decode, 203, 14, 88, // Opcode: HYPCALL_MM
1210
/* 3043 */    MCD_OPC_FilterValue, 27, 9, 0, 0, // Skip to: 3057
1211
/* 3048 */    MCD_OPC_CheckPredicate, 7, 194, 13, 0, // Skip to: 6575
1212
/* 3053 */    MCD_OPC_Decode, 223, 20, 88, // Opcode: SDBBP_MM
1213
/* 3057 */    MCD_OPC_FilterValue, 28, 16, 0, 0, // Skip to: 3078
1214
/* 3062 */    MCD_OPC_CheckPredicate, 7, 180, 13, 0, // Skip to: 6575
1215
/* 3067 */    MCD_OPC_CheckField, 16, 10, 0, 173, 13, 0, // Skip to: 6575
1216
/* 3074 */    MCD_OPC_Decode, 207, 11, 10, // Opcode: DERET_MM
1217
/* 3078 */    MCD_OPC_FilterValue, 30, 164, 13, 0, // Skip to: 6575
1218
/* 3083 */    MCD_OPC_CheckPredicate, 7, 159, 13, 0, // Skip to: 6575
1219
/* 3088 */    MCD_OPC_CheckField, 16, 10, 0, 152, 13, 0, // Skip to: 6575
1220
/* 3095 */    MCD_OPC_Decode, 220, 12, 10, // Opcode: ERET_MM
1221
/* 3099 */    MCD_OPC_FilterValue, 15, 16, 0, 0, // Skip to: 3120
1222
/* 3104 */    MCD_OPC_CheckPredicate, 9, 138, 13, 0, // Skip to: 6575
1223
/* 3109 */    MCD_OPC_CheckField, 11, 1, 0, 131, 13, 0, // Skip to: 6575
1224
/* 3116 */    MCD_OPC_Decode, 199, 21, 70, // Opcode: SHRL_PH_MMR2
1225
/* 3120 */    MCD_OPC_FilterValue, 16, 31, 0, 0, // Skip to: 3156
1226
/* 3125 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
1227
/* 3128 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3142
1228
/* 3133 */    MCD_OPC_CheckPredicate, 7, 109, 13, 0, // Skip to: 6575
1229
/* 3138 */    MCD_OPC_Decode, 218, 23, 71, // Opcode: TGEU_MM
1230
/* 3142 */    MCD_OPC_FilterValue, 1, 100, 13, 0, // Skip to: 6575
1231
/* 3147 */    MCD_OPC_CheckPredicate, 7, 95, 13, 0, // Skip to: 6575
1232
/* 3152 */    MCD_OPC_Decode, 132, 24, 71, // Opcode: TNE_MM
1233
/* 3156 */    MCD_OPC_FilterValue, 18, 115, 0, 0, // Skip to: 3276
1234
/* 3161 */    MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
1235
/* 3164 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3178
1236
/* 3169 */    MCD_OPC_CheckPredicate, 9, 73, 13, 0, // Skip to: 6575
1237
/* 3174 */    MCD_OPC_Decode, 180, 12, 76, // Opcode: DPS_W_PH_MMR2
1238
/* 3178 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3192
1239
/* 3183 */    MCD_OPC_CheckPredicate, 8, 59, 13, 0, // Skip to: 6575
1240
/* 3188 */    MCD_OPC_Decode, 234, 18, 89, // Opcode: MULT_DSP_MM
1241
/* 3192 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3206
1242
/* 3197 */    MCD_OPC_CheckPredicate, 9, 45, 13, 0, // Skip to: 6575
1243
/* 3202 */    MCD_OPC_Decode, 178, 12, 76, // Opcode: DPSX_W_PH_MMR2
1244
/* 3206 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 3220
1245
/* 3211 */    MCD_OPC_CheckPredicate, 8, 31, 13, 0, // Skip to: 6575
1246
/* 3216 */    MCD_OPC_Decode, 232, 18, 89, // Opcode: MULTU_DSP_MM
1247
/* 3220 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 3234
1248
/* 3225 */    MCD_OPC_CheckPredicate, 8, 17, 13, 0, // Skip to: 6575
1249
/* 3230 */    MCD_OPC_Decode, 174, 12, 76, // Opcode: DPSU_H_QBL_MM
1250
/* 3234 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 3248
1251
/* 3239 */    MCD_OPC_CheckPredicate, 9, 3, 13, 0, // Skip to: 6575
1252
/* 3244 */    MCD_OPC_Decode, 229, 18, 76, // Opcode: MULSA_W_PH_MMR2
1253
/* 3248 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 3262
1254
/* 3253 */    MCD_OPC_CheckPredicate, 8, 245, 12, 0, // Skip to: 6575
1255
/* 3258 */    MCD_OPC_Decode, 176, 12, 76, // Opcode: DPSU_H_QBR_MM
1256
/* 3262 */    MCD_OPC_FilterValue, 7, 236, 12, 0, // Skip to: 6575
1257
/* 3267 */    MCD_OPC_CheckPredicate, 8, 231, 12, 0, // Skip to: 6575
1258
/* 3272 */    MCD_OPC_Decode, 227, 18, 76, // Opcode: MULSAQ_S_W_PH_MM
1259
/* 3276 */    MCD_OPC_FilterValue, 19, 16, 0, 0, // Skip to: 3297
1260
/* 3281 */    MCD_OPC_CheckPredicate, 10, 217, 12, 0, // Skip to: 6575
1261
/* 3286 */    MCD_OPC_CheckField, 14, 2, 0, 210, 12, 0, // Skip to: 6575
1262
/* 3293 */    MCD_OPC_Decode, 139, 17, 68, // Opcode: MFGC0_MM
1263
/* 3297 */    MCD_OPC_FilterValue, 20, 31, 0, 0, // Skip to: 3333
1264
/* 3302 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
1265
/* 3305 */    MCD_OPC_FilterValue, 25, 9, 0, 0, // Skip to: 3319
1266
/* 3310 */    MCD_OPC_CheckPredicate, 7, 188, 12, 0, // Skip to: 6575
1267
/* 3315 */    MCD_OPC_Decode, 146, 9, 90, // Opcode: CFC2_MM
1268
/* 3319 */    MCD_OPC_FilterValue, 27, 179, 12, 0, // Skip to: 6575
1269
/* 3324 */    MCD_OPC_CheckPredicate, 7, 174, 12, 0, // Skip to: 6575
1270
/* 3329 */    MCD_OPC_Decode, 181, 10, 91, // Opcode: CTC2_MM
1271
/* 3333 */    MCD_OPC_FilterValue, 21, 87, 0, 0, // Skip to: 3425
1272
/* 3338 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
1273
/* 3341 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 3362
1274
/* 3346 */    MCD_OPC_CheckPredicate, 6, 152, 12, 0, // Skip to: 6575
1275
/* 3351 */    MCD_OPC_CheckField, 21, 5, 0, 145, 12, 0, // Skip to: 6575
1276
/* 3358 */    MCD_OPC_Decode, 155, 17, 92, // Opcode: MFHI_MM
1277
/* 3362 */    MCD_OPC_FilterValue, 3, 16, 0, 0, // Skip to: 3383
1278
/* 3367 */    MCD_OPC_CheckPredicate, 6, 131, 12, 0, // Skip to: 6575
1279
/* 3372 */    MCD_OPC_CheckField, 21, 5, 0, 124, 12, 0, // Skip to: 6575
1280
/* 3379 */    MCD_OPC_Decode, 161, 17, 92, // Opcode: MFLO_MM
1281
/* 3383 */    MCD_OPC_FilterValue, 5, 16, 0, 0, // Skip to: 3404
1282
/* 3388 */    MCD_OPC_CheckPredicate, 6, 110, 12, 0, // Skip to: 6575
1283
/* 3393 */    MCD_OPC_CheckField, 21, 5, 0, 103, 12, 0, // Skip to: 6575
1284
/* 3400 */    MCD_OPC_Decode, 183, 18, 92, // Opcode: MTHI_MM
1285
/* 3404 */    MCD_OPC_FilterValue, 7, 94, 12, 0, // Skip to: 6575
1286
/* 3409 */    MCD_OPC_CheckPredicate, 6, 89, 12, 0, // Skip to: 6575
1287
/* 3414 */    MCD_OPC_CheckField, 21, 5, 0, 82, 12, 0, // Skip to: 6575
1288
/* 3421 */    MCD_OPC_Decode, 190, 18, 92, // Opcode: MTLO_MM
1289
/* 3425 */    MCD_OPC_FilterValue, 23, 16, 0, 0, // Skip to: 3446
1290
/* 3430 */    MCD_OPC_CheckPredicate, 8, 68, 12, 0, // Skip to: 6575
1291
/* 3435 */    MCD_OPC_CheckField, 11, 2, 0, 61, 12, 0, // Skip to: 6575
1292
/* 3442 */    MCD_OPC_Decode, 147, 20, 93, // Opcode: REPL_QB_MM
1293
/* 3446 */    MCD_OPC_FilterValue, 25, 115, 0, 0, // Skip to: 3566
1294
/* 3451 */    MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
1295
/* 3454 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3468
1296
/* 3459 */    MCD_OPC_CheckPredicate, 8, 39, 12, 0, // Skip to: 6575
1297
/* 3464 */    MCD_OPC_Decode, 254, 19, 94, // Opcode: RDDSP_MM
1298
/* 3468 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3482
1299
/* 3473 */    MCD_OPC_CheckPredicate, 8, 25, 12, 0, // Skip to: 6575
1300
/* 3478 */    MCD_OPC_Decode, 251, 12, 95, // Opcode: EXTR_W_MM
1301
/* 3482 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3496
1302
/* 3487 */    MCD_OPC_CheckPredicate, 8, 11, 12, 0, // Skip to: 6575
1303
/* 3492 */    MCD_OPC_Decode, 166, 24, 94, // Opcode: WRDSP_MM
1304
/* 3496 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 3510
1305
/* 3501 */    MCD_OPC_CheckPredicate, 8, 253, 11, 0, // Skip to: 6575
1306
/* 3506 */    MCD_OPC_Decode, 247, 12, 95, // Opcode: EXTR_R_W_MM
1307
/* 3510 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 3524
1308
/* 3515 */    MCD_OPC_CheckPredicate, 8, 239, 11, 0, // Skip to: 6575
1309
/* 3520 */    MCD_OPC_Decode, 235, 12, 95, // Opcode: EXTP_MM
1310
/* 3524 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 3538
1311
/* 3529 */    MCD_OPC_CheckPredicate, 8, 225, 11, 0, // Skip to: 6575
1312
/* 3534 */    MCD_OPC_Decode, 245, 12, 95, // Opcode: EXTR_RS_W_MM
1313
/* 3538 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 3552
1314
/* 3543 */    MCD_OPC_CheckPredicate, 8, 211, 11, 0, // Skip to: 6575
1315
/* 3548 */    MCD_OPC_Decode, 232, 12, 95, // Opcode: EXTPDP_MM
1316
/* 3552 */    MCD_OPC_FilterValue, 7, 202, 11, 0, // Skip to: 6575
1317
/* 3557 */    MCD_OPC_CheckPredicate, 8, 197, 11, 0, // Skip to: 6575
1318
/* 3562 */    MCD_OPC_Decode, 249, 12, 95, // Opcode: EXTR_S_H_MM
1319
/* 3566 */    MCD_OPC_FilterValue, 26, 115, 0, 0, // Skip to: 3686
1320
/* 3571 */    MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
1321
/* 3574 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 3588
1322
/* 3579 */    MCD_OPC_CheckPredicate, 8, 175, 11, 0, // Skip to: 6575
1323
/* 3584 */    MCD_OPC_Decode, 166, 12, 76, // Opcode: DPSQ_S_W_PH_MM
1324
/* 3588 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3602
1325
/* 3593 */    MCD_OPC_CheckPredicate, 8, 161, 11, 0, // Skip to: 6575
1326
/* 3598 */    MCD_OPC_Decode, 243, 12, 78, // Opcode: EXTRV_W_MM
1327
/* 3602 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 3616
1328
/* 3607 */    MCD_OPC_CheckPredicate, 8, 147, 11, 0, // Skip to: 6575
1329
/* 3612 */    MCD_OPC_Decode, 164, 12, 76, // Opcode: DPSQ_SA_L_W_MM
1330
/* 3616 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 3630
1331
/* 3621 */    MCD_OPC_CheckPredicate, 8, 133, 11, 0, // Skip to: 6575
1332
/* 3626 */    MCD_OPC_Decode, 239, 12, 78, // Opcode: EXTRV_R_W_MM
1333
/* 3630 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 3644
1334
/* 3635 */    MCD_OPC_CheckPredicate, 9, 119, 11, 0, // Skip to: 6575
1335
/* 3640 */    MCD_OPC_Decode, 162, 12, 76, // Opcode: DPSQX_S_W_PH_MMR2
1336
/* 3644 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 3658
1337
/* 3649 */    MCD_OPC_CheckPredicate, 8, 105, 11, 0, // Skip to: 6575
1338
/* 3654 */    MCD_OPC_Decode, 237, 12, 78, // Opcode: EXTRV_RS_W_MM
1339
/* 3658 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 3672
1340
/* 3663 */    MCD_OPC_CheckPredicate, 9, 91, 11, 0, // Skip to: 6575
1341
/* 3668 */    MCD_OPC_Decode, 160, 12, 76, // Opcode: DPSQX_SA_W_PH_MMR2
1342
/* 3672 */    MCD_OPC_FilterValue, 7, 82, 11, 0, // Skip to: 6575
1343
/* 3677 */    MCD_OPC_CheckPredicate, 8, 77, 11, 0, // Skip to: 6575
1344
/* 3682 */    MCD_OPC_Decode, 241, 12, 78, // Opcode: EXTRV_S_H_MM
1345
/* 3686 */    MCD_OPC_FilterValue, 27, 16, 0, 0, // Skip to: 3707
1346
/* 3691 */    MCD_OPC_CheckPredicate, 10, 63, 11, 0, // Skip to: 6575
1347
/* 3696 */    MCD_OPC_CheckField, 14, 2, 0, 56, 11, 0, // Skip to: 6575
1348
/* 3703 */    MCD_OPC_Decode, 168, 18, 69, // Opcode: MTGC0_MM
1349
/* 3707 */    MCD_OPC_FilterValue, 28, 47, 0, 0, // Skip to: 3759
1350
/* 3712 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
1351
/* 3715 */    MCD_OPC_FilterValue, 1, 25, 0, 0, // Skip to: 3745
1352
/* 3720 */    MCD_OPC_CheckPredicate, 6, 11, 0, 0, // Skip to: 3736
1353
/* 3725 */    MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 3736
1354
/* 3732 */    MCD_OPC_Decode, 144, 15, 92, // Opcode: JR_MM
1355
/* 3736 */    MCD_OPC_CheckPredicate, 6, 18, 11, 0, // Skip to: 6575
1356
/* 3741 */    MCD_OPC_Decode, 249, 14, 80, // Opcode: JALR_MM
1357
/* 3745 */    MCD_OPC_FilterValue, 9, 9, 11, 0, // Skip to: 6575
1358
/* 3750 */    MCD_OPC_CheckPredicate, 6, 4, 11, 0, // Skip to: 6575
1359
/* 3755 */    MCD_OPC_Decode, 246, 14, 80, // Opcode: JALRS_MM
1360
/* 3759 */    MCD_OPC_FilterValue, 29, 251, 10, 0, // Skip to: 6575
1361
/* 3764 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
1362
/* 3767 */    MCD_OPC_FilterValue, 8, 16, 0, 0, // Skip to: 3788
1363
/* 3772 */    MCD_OPC_CheckPredicate, 7, 238, 10, 0, // Skip to: 6575
1364
/* 3777 */    MCD_OPC_CheckField, 21, 5, 0, 231, 10, 0, // Skip to: 6575
1365
/* 3784 */    MCD_OPC_Decode, 232, 11, 92, // Opcode: DI_MM
1366
/* 3788 */    MCD_OPC_FilterValue, 10, 222, 10, 0, // Skip to: 6575
1367
/* 3793 */    MCD_OPC_CheckPredicate, 7, 217, 10, 0, // Skip to: 6575
1368
/* 3798 */    MCD_OPC_CheckField, 21, 5, 0, 210, 10, 0, // Skip to: 6575
1369
/* 3805 */    MCD_OPC_Decode, 211, 12, 92, // Opcode: EI_MM
1370
/* 3809 */    MCD_OPC_FilterValue, 61, 201, 10, 0, // Skip to: 6575
1371
/* 3814 */    MCD_OPC_CheckPredicate, 8, 196, 10, 0, // Skip to: 6575
1372
/* 3819 */    MCD_OPC_CheckField, 6, 5, 0, 189, 10, 0, // Skip to: 6575
1373
/* 3826 */    MCD_OPC_Decode, 145, 20, 96, // Opcode: REPL_PH_MM
1374
/* 3830 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 3844
1375
/* 3835 */    MCD_OPC_CheckPredicate, 6, 175, 10, 0, // Skip to: 6575
1376
/* 3840 */    MCD_OPC_Decode, 203, 6, 97, // Opcode: ADDi_MM
1377
/* 3844 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 3858
1378
/* 3849 */    MCD_OPC_CheckPredicate, 7, 161, 10, 0, // Skip to: 6575
1379
/* 3854 */    MCD_OPC_Decode, 178, 15, 98, // Opcode: LBu_MM
1380
/* 3858 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 3872
1381
/* 3863 */    MCD_OPC_CheckPredicate, 7, 147, 10, 0, // Skip to: 6575
1382
/* 3868 */    MCD_OPC_Decode, 202, 20, 98, // Opcode: SB_MM
1383
/* 3872 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 3886
1384
/* 3877 */    MCD_OPC_CheckPredicate, 7, 133, 10, 0, // Skip to: 6575
1385
/* 3882 */    MCD_OPC_Decode, 170, 15, 98, // Opcode: LB_MM
1386
/* 3886 */    MCD_OPC_FilterValue, 8, 73, 0, 0, // Skip to: 3964
1387
/* 3891 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
1388
/* 3894 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 3908
1389
/* 3899 */    MCD_OPC_CheckPredicate, 7, 111, 10, 0, // Skip to: 6575
1390
/* 3904 */    MCD_OPC_Decode, 161, 16, 99, // Opcode: LWP_MM
1391
/* 3908 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 3922
1392
/* 3913 */    MCD_OPC_CheckPredicate, 7, 97, 10, 0, // Skip to: 6575
1393
/* 3918 */    MCD_OPC_Decode, 156, 16, 99, // Opcode: LWM32_MM
1394
/* 3922 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 3936
1395
/* 3927 */    MCD_OPC_CheckPredicate, 6, 83, 10, 0, // Skip to: 6575
1396
/* 3932 */    MCD_OPC_Decode, 249, 8, 100, // Opcode: CACHE_MM
1397
/* 3936 */    MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 3950
1398
/* 3941 */    MCD_OPC_CheckPredicate, 7, 69, 10, 0, // Skip to: 6575
1399
/* 3946 */    MCD_OPC_Decode, 156, 23, 99, // Opcode: SWP_MM
1400
/* 3950 */    MCD_OPC_FilterValue, 13, 60, 10, 0, // Skip to: 6575
1401
/* 3955 */    MCD_OPC_CheckPredicate, 7, 55, 10, 0, // Skip to: 6575
1402
/* 3960 */    MCD_OPC_Decode, 153, 23, 99, // Opcode: SWM32_MM
1403
/* 3964 */    MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 3978
1404
/* 3969 */    MCD_OPC_CheckPredicate, 6, 41, 10, 0, // Skip to: 6575
1405
/* 3974 */    MCD_OPC_Decode, 205, 6, 97, // Opcode: ADDiu_MM
1406
/* 3978 */    MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 3992
1407
/* 3983 */    MCD_OPC_CheckPredicate, 7, 27, 10, 0, // Skip to: 6575
1408
/* 3988 */    MCD_OPC_Decode, 230, 15, 98, // Opcode: LHu_MM
1409
/* 3992 */    MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 4006
1410
/* 3997 */    MCD_OPC_CheckPredicate, 7, 13, 10, 0, // Skip to: 6575
1411
/* 4002 */    MCD_OPC_Decode, 204, 21, 98, // Opcode: SH_MM
1412
/* 4006 */    MCD_OPC_FilterValue, 15, 9, 0, 0, // Skip to: 4020
1413
/* 4011 */    MCD_OPC_CheckPredicate, 7, 255, 9, 0, // Skip to: 6575
1414
/* 4016 */    MCD_OPC_Decode, 223, 15, 98, // Opcode: LH_MM
1415
/* 4020 */    MCD_OPC_FilterValue, 16, 83, 1, 0, // Skip to: 4364
1416
/* 4025 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
1417
/* 4028 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4042
1418
/* 4033 */    MCD_OPC_CheckPredicate, 6, 233, 9, 0, // Skip to: 6575
1419
/* 4038 */    MCD_OPC_Decode, 165, 8, 101, // Opcode: BLTZ_MM
1420
/* 4042 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 4056
1421
/* 4047 */    MCD_OPC_CheckPredicate, 6, 219, 9, 0, // Skip to: 6575
1422
/* 4052 */    MCD_OPC_Decode, 160, 8, 101, // Opcode: BLTZAL_MM
1423
/* 4056 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 4070
1424
/* 4061 */    MCD_OPC_CheckPredicate, 6, 205, 9, 0, // Skip to: 6575
1425
/* 4066 */    MCD_OPC_Decode, 231, 7, 101, // Opcode: BGEZ_MM
1426
/* 4070 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 4084
1427
/* 4075 */    MCD_OPC_CheckPredicate, 6, 191, 9, 0, // Skip to: 6575
1428
/* 4080 */    MCD_OPC_Decode, 226, 7, 101, // Opcode: BGEZAL_MM
1429
/* 4084 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 4098
1430
/* 4089 */    MCD_OPC_CheckPredicate, 6, 177, 9, 0, // Skip to: 6575
1431
/* 4094 */    MCD_OPC_Decode, 142, 8, 101, // Opcode: BLEZ_MM
1432
/* 4098 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 4112
1433
/* 4103 */    MCD_OPC_CheckPredicate, 6, 163, 9, 0, // Skip to: 6575
1434
/* 4108 */    MCD_OPC_Decode, 195, 8, 101, // Opcode: BNEZC_MM
1435
/* 4112 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 4126
1436
/* 4117 */    MCD_OPC_CheckPredicate, 6, 149, 9, 0, // Skip to: 6575
1437
/* 4122 */    MCD_OPC_Decode, 240, 7, 101, // Opcode: BGTZ_MM
1438
/* 4126 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 4140
1439
/* 4131 */    MCD_OPC_CheckPredicate, 6, 135, 9, 0, // Skip to: 6575
1440
/* 4136 */    MCD_OPC_Decode, 205, 7, 101, // Opcode: BEQZC_MM
1441
/* 4140 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 4154
1442
/* 4145 */    MCD_OPC_CheckPredicate, 6, 121, 9, 0, // Skip to: 6575
1443
/* 4150 */    MCD_OPC_Decode, 253, 23, 102, // Opcode: TLTI_MM
1444
/* 4154 */    MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 4168
1445
/* 4159 */    MCD_OPC_CheckPredicate, 6, 107, 9, 0, // Skip to: 6575
1446
/* 4164 */    MCD_OPC_Decode, 216, 23, 102, // Opcode: TGEI_MM
1447
/* 4168 */    MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 4182
1448
/* 4173 */    MCD_OPC_CheckPredicate, 6, 93, 9, 0, // Skip to: 6575
1449
/* 4178 */    MCD_OPC_Decode, 252, 23, 102, // Opcode: TLTIU_MM
1450
/* 4182 */    MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 4196
1451
/* 4187 */    MCD_OPC_CheckPredicate, 6, 79, 9, 0, // Skip to: 6575
1452
/* 4192 */    MCD_OPC_Decode, 215, 23, 102, // Opcode: TGEIU_MM
1453
/* 4196 */    MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 4210
1454
/* 4201 */    MCD_OPC_CheckPredicate, 6, 65, 9, 0, // Skip to: 6575
1455
/* 4206 */    MCD_OPC_Decode, 131, 24, 102, // Opcode: TNEI_MM
1456
/* 4210 */    MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 4224
1457
/* 4215 */    MCD_OPC_CheckPredicate, 6, 51, 9, 0, // Skip to: 6575
1458
/* 4220 */    MCD_OPC_Decode, 130, 16, 103, // Opcode: LUi_MM
1459
/* 4224 */    MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 4238
1460
/* 4229 */    MCD_OPC_CheckPredicate, 6, 37, 9, 0, // Skip to: 6575
1461
/* 4234 */    MCD_OPC_Decode, 209, 23, 102, // Opcode: TEQI_MM
1462
/* 4238 */    MCD_OPC_FilterValue, 16, 9, 0, 0, // Skip to: 4252
1463
/* 4243 */    MCD_OPC_CheckPredicate, 6, 23, 9, 0, // Skip to: 6575
1464
/* 4248 */    MCD_OPC_Decode, 175, 23, 104, // Opcode: SYNCI_MM
1465
/* 4252 */    MCD_OPC_FilterValue, 17, 9, 0, 0, // Skip to: 4266
1466
/* 4257 */    MCD_OPC_CheckPredicate, 6, 9, 9, 0, // Skip to: 6575
1467
/* 4262 */    MCD_OPC_Decode, 159, 8, 101, // Opcode: BLTZALS_MM
1468
/* 4266 */    MCD_OPC_FilterValue, 19, 9, 0, 0, // Skip to: 4280
1469
/* 4271 */    MCD_OPC_CheckPredicate, 6, 251, 8, 0, // Skip to: 6575
1470
/* 4276 */    MCD_OPC_Decode, 225, 7, 101, // Opcode: BGEZALS_MM
1471
/* 4280 */    MCD_OPC_FilterValue, 25, 16, 0, 0, // Skip to: 4301
1472
/* 4285 */    MCD_OPC_CheckPredicate, 11, 237, 8, 0, // Skip to: 6575
1473
/* 4290 */    MCD_OPC_CheckField, 16, 5, 0, 230, 8, 0, // Skip to: 6575
1474
/* 4297 */    MCD_OPC_Decode, 209, 8, 105, // Opcode: BPOSGE32C_MMR3
1475
/* 4301 */    MCD_OPC_FilterValue, 27, 16, 0, 0, // Skip to: 4322
1476
/* 4306 */    MCD_OPC_CheckPredicate, 12, 216, 8, 0, // Skip to: 6575
1477
/* 4311 */    MCD_OPC_CheckField, 16, 5, 0, 209, 8, 0, // Skip to: 6575
1478
/* 4318 */    MCD_OPC_Decode, 210, 8, 106, // Opcode: BPOSGE32_MM
1479
/* 4322 */    MCD_OPC_FilterValue, 28, 16, 0, 0, // Skip to: 4343
1480
/* 4327 */    MCD_OPC_CheckPredicate, 13, 195, 8, 0, // Skip to: 6575
1481
/* 4332 */    MCD_OPC_CheckField, 16, 2, 0, 188, 8, 0, // Skip to: 6575
1482
/* 4339 */    MCD_OPC_Decode, 168, 7, 107, // Opcode: BC1F_MM
1483
/* 4343 */    MCD_OPC_FilterValue, 29, 179, 8, 0, // Skip to: 6575
1484
/* 4348 */    MCD_OPC_CheckPredicate, 13, 174, 8, 0, // Skip to: 6575
1485
/* 4353 */    MCD_OPC_CheckField, 16, 2, 0, 167, 8, 0, // Skip to: 6575
1486
/* 4360 */    MCD_OPC_Decode, 173, 7, 107, // Opcode: BC1T_MM
1487
/* 4364 */    MCD_OPC_FilterValue, 20, 9, 0, 0, // Skip to: 4378
1488
/* 4369 */    MCD_OPC_CheckPredicate, 6, 153, 8, 0, // Skip to: 6575
1489
/* 4374 */    MCD_OPC_Decode, 177, 19, 108, // Opcode: ORi_MM
1490
/* 4378 */    MCD_OPC_FilterValue, 21, 234, 5, 0, // Skip to: 5897
1491
/* 4383 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
1492
/* 4386 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 4400
1493
/* 4391 */    MCD_OPC_CheckPredicate, 14, 131, 8, 0, // Skip to: 6575
1494
/* 4396 */    MCD_OPC_Decode, 219, 16, 109, // Opcode: MADD_S_MM
1495
/* 4400 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 4414
1496
/* 4405 */    MCD_OPC_CheckPredicate, 14, 117, 8, 0, // Skip to: 6575
1497
/* 4410 */    MCD_OPC_Decode, 143, 19, 109, // Opcode: NMADD_S_MM
1498
/* 4414 */    MCD_OPC_FilterValue, 8, 59, 0, 0, // Skip to: 4478
1499
/* 4419 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
1500
/* 4422 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 4436
1501
/* 4427 */    MCD_OPC_CheckPredicate, 13, 95, 8, 0, // Skip to: 6575
1502
/* 4432 */    MCD_OPC_Decode, 173, 16, 110, // Opcode: LWXC1_MM
1503
/* 4436 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 4450
1504
/* 4441 */    MCD_OPC_CheckPredicate, 13, 81, 8, 0, // Skip to: 6575
1505
/* 4446 */    MCD_OPC_Decode, 166, 23, 110, // Opcode: SWXC1_MM
1506
/* 4450 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 4464
1507
/* 4455 */    MCD_OPC_CheckPredicate, 15, 67, 8, 0, // Skip to: 6575
1508
/* 4460 */    MCD_OPC_Decode, 255, 15, 111, // Opcode: LUXC1_MM
1509
/* 4464 */    MCD_OPC_FilterValue, 6, 58, 8, 0, // Skip to: 6575
1510
/* 4469 */    MCD_OPC_CheckPredicate, 15, 53, 8, 0, // Skip to: 6575
1511
/* 4474 */    MCD_OPC_Decode, 255, 22, 111, // Opcode: SUXC1_MM
1512
/* 4478 */    MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 4492
1513
/* 4483 */    MCD_OPC_CheckPredicate, 16, 39, 8, 0, // Skip to: 6575
1514
/* 4488 */    MCD_OPC_Decode, 211, 16, 112, // Opcode: MADD_D32_MM
1515
/* 4492 */    MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 4506
1516
/* 4497 */    MCD_OPC_CheckPredicate, 16, 25, 8, 0, // Skip to: 6575
1517
/* 4502 */    MCD_OPC_Decode, 140, 19, 112, // Opcode: NMADD_D32_MM
1518
/* 4506 */    MCD_OPC_FilterValue, 32, 101, 0, 0, // Skip to: 4612
1519
/* 4511 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
1520
/* 4514 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 4535
1521
/* 4519 */    MCD_OPC_CheckPredicate, 13, 3, 8, 0, // Skip to: 6575
1522
/* 4524 */    MCD_OPC_CheckField, 11, 2, 0, 252, 7, 0, // Skip to: 6575
1523
/* 4531 */    MCD_OPC_Decode, 224, 17, 113, // Opcode: MOVF_S_MM
1524
/* 4535 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 4556
1525
/* 4540 */    MCD_OPC_CheckPredicate, 13, 238, 7, 0, // Skip to: 6575
1526
/* 4545 */    MCD_OPC_CheckField, 11, 2, 0, 231, 7, 0, // Skip to: 6575
1527
/* 4552 */    MCD_OPC_Decode, 245, 17, 113, // Opcode: MOVT_S_MM
1528
/* 4556 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 4570
1529
/* 4561 */    MCD_OPC_CheckPredicate, 6, 217, 7, 0, // Skip to: 6575
1530
/* 4566 */    MCD_OPC_Decode, 241, 19, 114, // Opcode: PREFX_MM
1531
/* 4570 */    MCD_OPC_FilterValue, 8, 16, 0, 0, // Skip to: 4591
1532
/* 4575 */    MCD_OPC_CheckPredicate, 17, 203, 7, 0, // Skip to: 6575
1533
/* 4580 */    MCD_OPC_CheckField, 11, 2, 0, 196, 7, 0, // Skip to: 6575
1534
/* 4587 */    MCD_OPC_Decode, 218, 17, 115, // Opcode: MOVF_D32_MM
1535
/* 4591 */    MCD_OPC_FilterValue, 9, 187, 7, 0, // Skip to: 6575
1536
/* 4596 */    MCD_OPC_CheckPredicate, 17, 182, 7, 0, // Skip to: 6575
1537
/* 4601 */    MCD_OPC_CheckField, 11, 2, 0, 175, 7, 0, // Skip to: 6575
1538
/* 4608 */    MCD_OPC_Decode, 239, 17, 115, // Opcode: MOVT_D32_MM
1539
/* 4612 */    MCD_OPC_FilterValue, 33, 9, 0, 0, // Skip to: 4626
1540
/* 4617 */    MCD_OPC_CheckPredicate, 14, 161, 7, 0, // Skip to: 6575
1541
/* 4622 */    MCD_OPC_Decode, 155, 18, 109, // Opcode: MSUB_S_MM
1542
/* 4626 */    MCD_OPC_FilterValue, 34, 9, 0, 0, // Skip to: 4640
1543
/* 4631 */    MCD_OPC_CheckPredicate, 14, 147, 7, 0, // Skip to: 6575
1544
/* 4636 */    MCD_OPC_Decode, 148, 19, 109, // Opcode: NMSUB_S_MM
1545
/* 4640 */    MCD_OPC_FilterValue, 41, 9, 0, 0, // Skip to: 4654
1546
/* 4645 */    MCD_OPC_CheckPredicate, 16, 133, 7, 0, // Skip to: 6575
1547
/* 4650 */    MCD_OPC_Decode, 147, 18, 112, // Opcode: MSUB_D32_MM
1548
/* 4654 */    MCD_OPC_FilterValue, 42, 9, 0, 0, // Skip to: 4668
1549
/* 4659 */    MCD_OPC_CheckPredicate, 16, 119, 7, 0, // Skip to: 6575
1550
/* 4664 */    MCD_OPC_Decode, 145, 19, 112, // Opcode: NMSUB_D32_MM
1551
/* 4668 */    MCD_OPC_FilterValue, 48, 59, 0, 0, // Skip to: 4732
1552
/* 4673 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
1553
/* 4676 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 4690
1554
/* 4681 */    MCD_OPC_CheckPredicate, 18, 97, 7, 0, // Skip to: 6575
1555
/* 4686 */    MCD_OPC_Decode, 138, 13, 116, // Opcode: FADD_D32_MM
1556
/* 4690 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 4704
1557
/* 4695 */    MCD_OPC_CheckPredicate, 18, 83, 7, 0, // Skip to: 6575
1558
/* 4700 */    MCD_OPC_Decode, 156, 14, 116, // Opcode: FSUB_D32_MM
1559
/* 4704 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 4718
1560
/* 4709 */    MCD_OPC_CheckPredicate, 18, 69, 7, 0, // Skip to: 6575
1561
/* 4714 */    MCD_OPC_Decode, 239, 13, 116, // Opcode: FMUL_D32_MM
1562
/* 4718 */    MCD_OPC_FilterValue, 7, 60, 7, 0, // Skip to: 6575
1563
/* 4723 */    MCD_OPC_CheckPredicate, 18, 55, 7, 0, // Skip to: 6575
1564
/* 4728 */    MCD_OPC_Decode, 177, 13, 116, // Opcode: FDIV_D32_MM
1565
/* 4732 */    MCD_OPC_FilterValue, 56, 59, 0, 0, // Skip to: 4796
1566
/* 4737 */    MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
1567
/* 4740 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4754
1568
/* 4745 */    MCD_OPC_CheckPredicate, 13, 33, 7, 0, // Skip to: 6575
1569
/* 4750 */    MCD_OPC_Decode, 236, 17, 117, // Opcode: MOVN_I_S_MM
1570
/* 4754 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 4768
1571
/* 4759 */    MCD_OPC_CheckPredicate, 13, 19, 7, 0, // Skip to: 6575
1572
/* 4764 */    MCD_OPC_Decode, 129, 18, 117, // Opcode: MOVZ_I_S_MM
1573
/* 4768 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 4782
1574
/* 4773 */    MCD_OPC_CheckPredicate, 17, 5, 7, 0, // Skip to: 6575
1575
/* 4778 */    MCD_OPC_Decode, 230, 17, 118, // Opcode: MOVN_I_D32_MM
1576
/* 4782 */    MCD_OPC_FilterValue, 5, 252, 6, 0, // Skip to: 6575
1577
/* 4787 */    MCD_OPC_CheckPredicate, 17, 247, 6, 0, // Skip to: 6575
1578
/* 4792 */    MCD_OPC_Decode, 251, 17, 118, // Opcode: MOVZ_I_D32_MM
1579
/* 4796 */    MCD_OPC_FilterValue, 59, 96, 2, 0, // Skip to: 5409
1580
/* 4801 */    MCD_OPC_ExtractField, 6, 7,  // Inst{12-6} ...
1581
/* 4804 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 4825
1582
/* 4809 */    MCD_OPC_CheckPredicate, 19, 225, 6, 0, // Skip to: 6575
1583
/* 4814 */    MCD_OPC_CheckField, 13, 3, 1, 218, 6, 0, // Skip to: 6575
1584
/* 4821 */    MCD_OPC_Decode, 134, 17, 119, // Opcode: MFC1_MM
1585
/* 4825 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 4846
1586
/* 4830 */    MCD_OPC_CheckPredicate, 18, 204, 6, 0, // Skip to: 6575
1587
/* 4835 */    MCD_OPC_CheckField, 13, 3, 1, 197, 6, 0, // Skip to: 6575
1588
/* 4842 */    MCD_OPC_Decode, 228, 13, 120, // Opcode: FMOV_D32_MM
1589
/* 4846 */    MCD_OPC_FilterValue, 4, 31, 0, 0, // Skip to: 4882
1590
/* 4851 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1591
/* 4854 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4868
1592
/* 4859 */    MCD_OPC_CheckPredicate, 20, 175, 6, 0, // Skip to: 6575
1593
/* 4864 */    MCD_OPC_Decode, 197, 10, 121, // Opcode: CVT_L_S_MM
1594
/* 4868 */    MCD_OPC_FilterValue, 2, 166, 6, 0, // Skip to: 6575
1595
/* 4873 */    MCD_OPC_CheckPredicate, 20, 161, 6, 0, // Skip to: 6575
1596
/* 4878 */    MCD_OPC_Decode, 194, 10, 122, // Opcode: CVT_L_D64_MM
1597
/* 4882 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 4896
1598
/* 4887 */    MCD_OPC_CheckPredicate, 13, 147, 6, 0, // Skip to: 6575
1599
/* 4892 */    MCD_OPC_Decode, 222, 17, 123, // Opcode: MOVF_I_MM
1600
/* 4896 */    MCD_OPC_FilterValue, 8, 31, 0, 0, // Skip to: 4932
1601
/* 4901 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1602
/* 4904 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4918
1603
/* 4909 */    MCD_OPC_CheckPredicate, 19, 125, 6, 0, // Skip to: 6575
1604
/* 4914 */    MCD_OPC_Decode, 178, 20, 124, // Opcode: RSQRT_S_MM
1605
/* 4918 */    MCD_OPC_FilterValue, 2, 116, 6, 0, // Skip to: 6575
1606
/* 4923 */    MCD_OPC_CheckPredicate, 18, 111, 6, 0, // Skip to: 6575
1607
/* 4928 */    MCD_OPC_Decode, 174, 20, 120, // Opcode: RSQRT_D32_MM
1608
/* 4932 */    MCD_OPC_FilterValue, 13, 31, 0, 0, // Skip to: 4968
1609
/* 4937 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1610
/* 4940 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 4954
1611
/* 4945 */    MCD_OPC_CheckPredicate, 19, 89, 6, 0, // Skip to: 6575
1612
/* 4950 */    MCD_OPC_Decode, 135, 13, 124, // Opcode: FABS_S_MM
1613
/* 4954 */    MCD_OPC_FilterValue, 1, 80, 6, 0, // Skip to: 6575
1614
/* 4959 */    MCD_OPC_CheckPredicate, 18, 75, 6, 0, // Skip to: 6575
1615
/* 4964 */    MCD_OPC_Decode, 131, 13, 120, // Opcode: FABS_D32_MM
1616
/* 4968 */    MCD_OPC_FilterValue, 32, 16, 0, 0, // Skip to: 4989
1617
/* 4973 */    MCD_OPC_CheckPredicate, 19, 61, 6, 0, // Skip to: 6575
1618
/* 4978 */    MCD_OPC_CheckField, 13, 3, 1, 54, 6, 0, // Skip to: 6575
1619
/* 4985 */    MCD_OPC_Decode, 163, 18, 125, // Opcode: MTC1_MM
1620
/* 4989 */    MCD_OPC_FilterValue, 36, 31, 0, 0, // Skip to: 5025
1621
/* 4994 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1622
/* 4997 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5011
1623
/* 5002 */    MCD_OPC_CheckPredicate, 19, 32, 6, 0, // Skip to: 6575
1624
/* 5007 */    MCD_OPC_Decode, 218, 10, 124, // Opcode: CVT_W_S_MM
1625
/* 5011 */    MCD_OPC_FilterValue, 2, 23, 6, 0, // Skip to: 6575
1626
/* 5016 */    MCD_OPC_CheckPredicate, 18, 18, 6, 0, // Skip to: 6575
1627
/* 5021 */    MCD_OPC_Decode, 214, 10, 126, // Opcode: CVT_W_D32_MM
1628
/* 5025 */    MCD_OPC_FilterValue, 37, 9, 0, 0, // Skip to: 5039
1629
/* 5030 */    MCD_OPC_CheckPredicate, 13, 4, 6, 0, // Skip to: 6575
1630
/* 5035 */    MCD_OPC_Decode, 243, 17, 123, // Opcode: MOVT_I_MM
1631
/* 5039 */    MCD_OPC_FilterValue, 40, 31, 0, 0, // Skip to: 5075
1632
/* 5044 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1633
/* 5047 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5061
1634
/* 5052 */    MCD_OPC_CheckPredicate, 19, 238, 5, 0, // Skip to: 6575
1635
/* 5057 */    MCD_OPC_Decode, 152, 14, 124, // Opcode: FSQRT_S_MM
1636
/* 5061 */    MCD_OPC_FilterValue, 2, 229, 5, 0, // Skip to: 6575
1637
/* 5066 */    MCD_OPC_CheckPredicate, 18, 224, 5, 0, // Skip to: 6575
1638
/* 5071 */    MCD_OPC_Decode, 148, 14, 120, // Opcode: FSQRT_D32_MM
1639
/* 5075 */    MCD_OPC_FilterValue, 44, 59, 0, 0, // Skip to: 5139
1640
/* 5080 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1641
/* 5083 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5097
1642
/* 5088 */    MCD_OPC_CheckPredicate, 19, 202, 5, 0, // Skip to: 6575
1643
/* 5093 */    MCD_OPC_Decode, 215, 13, 124, // Opcode: FLOOR_W_S_MM
1644
/* 5097 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 5111
1645
/* 5102 */    MCD_OPC_CheckPredicate, 19, 188, 5, 0, // Skip to: 6575
1646
/* 5107 */    MCD_OPC_Decode, 143, 24, 124, // Opcode: TRUNC_W_S_MM
1647
/* 5111 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 5125
1648
/* 5116 */    MCD_OPC_CheckPredicate, 18, 174, 5, 0, // Skip to: 6575
1649
/* 5121 */    MCD_OPC_Decode, 213, 13, 126, // Opcode: FLOOR_W_MM
1650
/* 5125 */    MCD_OPC_FilterValue, 3, 165, 5, 0, // Skip to: 6575
1651
/* 5130 */    MCD_OPC_CheckPredicate, 18, 160, 5, 0, // Skip to: 6575
1652
/* 5135 */    MCD_OPC_Decode, 141, 24, 126, // Opcode: TRUNC_W_MM
1653
/* 5139 */    MCD_OPC_FilterValue, 45, 16, 0, 0, // Skip to: 5160
1654
/* 5144 */    MCD_OPC_CheckPredicate, 18, 146, 5, 0, // Skip to: 6575
1655
/* 5149 */    MCD_OPC_CheckField, 13, 3, 1, 139, 5, 0, // Skip to: 6575
1656
/* 5156 */    MCD_OPC_Decode, 248, 13, 120, // Opcode: FNEG_D32_MM
1657
/* 5160 */    MCD_OPC_FilterValue, 64, 32, 0, 0, // Skip to: 5197
1658
/* 5165 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1659
/* 5168 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5182
1660
/* 5173 */    MCD_OPC_CheckPredicate, 19, 117, 5, 0, // Skip to: 6575
1661
/* 5178 */    MCD_OPC_Decode, 145, 9, 127, // Opcode: CFC1_MM
1662
/* 5182 */    MCD_OPC_FilterValue, 1, 108, 5, 0, // Skip to: 6575
1663
/* 5187 */    MCD_OPC_CheckPredicate, 18, 103, 5, 0, // Skip to: 6575
1664
/* 5192 */    MCD_OPC_Decode, 144, 17, 128, 1, // Opcode: MFHC1_D32_MM
1665
/* 5197 */    MCD_OPC_FilterValue, 72, 31, 0, 0, // Skip to: 5233
1666
/* 5202 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1667
/* 5205 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5219
1668
/* 5210 */    MCD_OPC_CheckPredicate, 19, 80, 5, 0, // Skip to: 6575
1669
/* 5215 */    MCD_OPC_Decode, 139, 20, 124, // Opcode: RECIP_S_MM
1670
/* 5219 */    MCD_OPC_FilterValue, 2, 71, 5, 0, // Skip to: 6575
1671
/* 5224 */    MCD_OPC_CheckPredicate, 18, 66, 5, 0, // Skip to: 6575
1672
/* 5229 */    MCD_OPC_Decode, 135, 20, 120, // Opcode: RECIP_D32_MM
1673
/* 5233 */    MCD_OPC_FilterValue, 77, 33, 0, 0, // Skip to: 5271
1674
/* 5238 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1675
/* 5241 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5256
1676
/* 5246 */    MCD_OPC_CheckPredicate, 18, 44, 5, 0, // Skip to: 6575
1677
/* 5251 */    MCD_OPC_Decode, 184, 10, 129, 1, // Opcode: CVT_D32_S_MM
1678
/* 5256 */    MCD_OPC_FilterValue, 1, 34, 5, 0, // Skip to: 6575
1679
/* 5261 */    MCD_OPC_CheckPredicate, 18, 29, 5, 0, // Skip to: 6575
1680
/* 5266 */    MCD_OPC_Decode, 186, 10, 129, 1, // Opcode: CVT_D32_W_MM
1681
/* 5271 */    MCD_OPC_FilterValue, 96, 33, 0, 0, // Skip to: 5309
1682
/* 5276 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1683
/* 5279 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5294
1684
/* 5284 */    MCD_OPC_CheckPredicate, 19, 6, 5, 0, // Skip to: 6575
1685
/* 5289 */    MCD_OPC_Decode, 180, 10, 130, 1, // Opcode: CTC1_MM
1686
/* 5294 */    MCD_OPC_FilterValue, 1, 252, 4, 0, // Skip to: 6575
1687
/* 5299 */    MCD_OPC_CheckPredicate, 18, 247, 4, 0, // Skip to: 6575
1688
/* 5304 */    MCD_OPC_Decode, 173, 18, 131, 1, // Opcode: MTHC1_D32_MM
1689
/* 5309 */    MCD_OPC_FilterValue, 108, 59, 0, 0, // Skip to: 5373
1690
/* 5314 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1691
/* 5317 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5331
1692
/* 5322 */    MCD_OPC_CheckPredicate, 19, 224, 4, 0, // Skip to: 6575
1693
/* 5327 */    MCD_OPC_Decode, 134, 9, 124, // Opcode: CEIL_W_S_MM
1694
/* 5331 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 5345
1695
/* 5336 */    MCD_OPC_CheckPredicate, 19, 210, 4, 0, // Skip to: 6575
1696
/* 5341 */    MCD_OPC_Decode, 171, 20, 124, // Opcode: ROUND_W_S_MM
1697
/* 5345 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 5359
1698
/* 5350 */    MCD_OPC_CheckPredicate, 18, 196, 4, 0, // Skip to: 6575
1699
/* 5355 */    MCD_OPC_Decode, 132, 9, 126, // Opcode: CEIL_W_MM
1700
/* 5359 */    MCD_OPC_FilterValue, 3, 187, 4, 0, // Skip to: 6575
1701
/* 5364 */    MCD_OPC_CheckPredicate, 18, 182, 4, 0, // Skip to: 6575
1702
/* 5369 */    MCD_OPC_Decode, 169, 20, 126, // Opcode: ROUND_W_MM
1703
/* 5373 */    MCD_OPC_FilterValue, 109, 173, 4, 0, // Skip to: 6575
1704
/* 5378 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
1705
/* 5381 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5395
1706
/* 5386 */    MCD_OPC_CheckPredicate, 18, 160, 4, 0, // Skip to: 6575
1707
/* 5391 */    MCD_OPC_Decode, 203, 10, 126, // Opcode: CVT_S_D32_MM
1708
/* 5395 */    MCD_OPC_FilterValue, 1, 151, 4, 0, // Skip to: 6575
1709
/* 5400 */    MCD_OPC_CheckPredicate, 19, 146, 4, 0, // Skip to: 6575
1710
/* 5405 */    MCD_OPC_Decode, 211, 10, 124, // Opcode: CVT_S_W_MM
1711
/* 5409 */    MCD_OPC_FilterValue, 60, 137, 4, 0, // Skip to: 6575
1712
/* 5414 */    MCD_OPC_ExtractField, 6, 7,  // Inst{12-6} ...
1713
/* 5417 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5432
1714
/* 5422 */    MCD_OPC_CheckPredicate, 13, 124, 4, 0, // Skip to: 6575
1715
/* 5427 */    MCD_OPC_Decode, 231, 10, 132, 1, // Opcode: C_F_S_MM
1716
/* 5432 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5447
1717
/* 5437 */    MCD_OPC_CheckPredicate, 13, 109, 4, 0, // Skip to: 6575
1718
/* 5442 */    MCD_OPC_Decode, 187, 11, 132, 1, // Opcode: C_UN_S_MM
1719
/* 5447 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 5462
1720
/* 5452 */    MCD_OPC_CheckPredicate, 13, 94, 4, 0, // Skip to: 6575
1721
/* 5457 */    MCD_OPC_Decode, 225, 10, 132, 1, // Opcode: C_EQ_S_MM
1722
/* 5462 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 5477
1723
/* 5467 */    MCD_OPC_CheckPredicate, 13, 79, 4, 0, // Skip to: 6575
1724
/* 5472 */    MCD_OPC_Decode, 169, 11, 132, 1, // Opcode: C_UEQ_S_MM
1725
/* 5477 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 5492
1726
/* 5482 */    MCD_OPC_CheckPredicate, 13, 64, 4, 0, // Skip to: 6575
1727
/* 5487 */    MCD_OPC_Decode, 151, 11, 132, 1, // Opcode: C_OLT_S_MM
1728
/* 5492 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 5507
1729
/* 5497 */    MCD_OPC_CheckPredicate, 13, 49, 4, 0, // Skip to: 6575
1730
/* 5502 */    MCD_OPC_Decode, 181, 11, 132, 1, // Opcode: C_ULT_S_MM
1731
/* 5507 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 5522
1732
/* 5512 */    MCD_OPC_CheckPredicate, 13, 34, 4, 0, // Skip to: 6575
1733
/* 5517 */    MCD_OPC_Decode, 145, 11, 132, 1, // Opcode: C_OLE_S_MM
1734
/* 5522 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 5537
1735
/* 5527 */    MCD_OPC_CheckPredicate, 13, 19, 4, 0, // Skip to: 6575
1736
/* 5532 */    MCD_OPC_Decode, 175, 11, 132, 1, // Opcode: C_ULE_S_MM
1737
/* 5537 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 5552
1738
/* 5542 */    MCD_OPC_CheckPredicate, 13, 4, 4, 0, // Skip to: 6575
1739
/* 5547 */    MCD_OPC_Decode, 163, 11, 132, 1, // Opcode: C_SF_S_MM
1740
/* 5552 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 5567
1741
/* 5557 */    MCD_OPC_CheckPredicate, 13, 245, 3, 0, // Skip to: 6575
1742
/* 5562 */    MCD_OPC_Decode, 255, 10, 132, 1, // Opcode: C_NGLE_S_MM
1743
/* 5567 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 5582
1744
/* 5572 */    MCD_OPC_CheckPredicate, 13, 230, 3, 0, // Skip to: 6575
1745
/* 5577 */    MCD_OPC_Decode, 157, 11, 132, 1, // Opcode: C_SEQ_S_MM
1746
/* 5582 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 5597
1747
/* 5587 */    MCD_OPC_CheckPredicate, 13, 215, 3, 0, // Skip to: 6575
1748
/* 5592 */    MCD_OPC_Decode, 133, 11, 132, 1, // Opcode: C_NGL_S_MM
1749
/* 5597 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 5612
1750
/* 5602 */    MCD_OPC_CheckPredicate, 13, 200, 3, 0, // Skip to: 6575
1751
/* 5607 */    MCD_OPC_Decode, 243, 10, 132, 1, // Opcode: C_LT_S_MM
1752
/* 5612 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5627
1753
/* 5617 */    MCD_OPC_CheckPredicate, 13, 185, 3, 0, // Skip to: 6575
1754
/* 5622 */    MCD_OPC_Decode, 249, 10, 132, 1, // Opcode: C_NGE_S_MM
1755
/* 5627 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 5642
1756
/* 5632 */    MCD_OPC_CheckPredicate, 13, 170, 3, 0, // Skip to: 6575
1757
/* 5637 */    MCD_OPC_Decode, 237, 10, 132, 1, // Opcode: C_LE_S_MM
1758
/* 5642 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5657
1759
/* 5647 */    MCD_OPC_CheckPredicate, 13, 155, 3, 0, // Skip to: 6575
1760
/* 5652 */    MCD_OPC_Decode, 139, 11, 132, 1, // Opcode: C_NGT_S_MM
1761
/* 5657 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 5672
1762
/* 5662 */    MCD_OPC_CheckPredicate, 17, 140, 3, 0, // Skip to: 6575
1763
/* 5667 */    MCD_OPC_Decode, 227, 10, 133, 1, // Opcode: C_F_D32_MM
1764
/* 5672 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 5687
1765
/* 5677 */    MCD_OPC_CheckPredicate, 17, 125, 3, 0, // Skip to: 6575
1766
/* 5682 */    MCD_OPC_Decode, 183, 11, 133, 1, // Opcode: C_UN_D32_MM
1767
/* 5687 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 5702
1768
/* 5692 */    MCD_OPC_CheckPredicate, 17, 110, 3, 0, // Skip to: 6575
1769
/* 5697 */    MCD_OPC_Decode, 221, 10, 133, 1, // Opcode: C_EQ_D32_MM
1770
/* 5702 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 5717
1771
/* 5707 */    MCD_OPC_CheckPredicate, 17, 95, 3, 0, // Skip to: 6575
1772
/* 5712 */    MCD_OPC_Decode, 165, 11, 133, 1, // Opcode: C_UEQ_D32_MM
1773
/* 5717 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 5732
1774
/* 5722 */    MCD_OPC_CheckPredicate, 17, 80, 3, 0, // Skip to: 6575
1775
/* 5727 */    MCD_OPC_Decode, 147, 11, 133, 1, // Opcode: C_OLT_D32_MM
1776
/* 5732 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 5747
1777
/* 5737 */    MCD_OPC_CheckPredicate, 17, 65, 3, 0, // Skip to: 6575
1778
/* 5742 */    MCD_OPC_Decode, 177, 11, 133, 1, // Opcode: C_ULT_D32_MM
1779
/* 5747 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 5762
1780
/* 5752 */    MCD_OPC_CheckPredicate, 17, 50, 3, 0, // Skip to: 6575
1781
/* 5757 */    MCD_OPC_Decode, 141, 11, 133, 1, // Opcode: C_OLE_D32_MM
1782
/* 5762 */    MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 5777
1783
/* 5767 */    MCD_OPC_CheckPredicate, 17, 35, 3, 0, // Skip to: 6575
1784
/* 5772 */    MCD_OPC_Decode, 171, 11, 133, 1, // Opcode: C_ULE_D32_MM
1785
/* 5777 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 5792
1786
/* 5782 */    MCD_OPC_CheckPredicate, 17, 20, 3, 0, // Skip to: 6575
1787
/* 5787 */    MCD_OPC_Decode, 159, 11, 133, 1, // Opcode: C_SF_D32_MM
1788
/* 5792 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 5807
1789
/* 5797 */    MCD_OPC_CheckPredicate, 17, 5, 3, 0, // Skip to: 6575
1790
/* 5802 */    MCD_OPC_Decode, 251, 10, 133, 1, // Opcode: C_NGLE_D32_MM
1791
/* 5807 */    MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 5822
1792
/* 5812 */    MCD_OPC_CheckPredicate, 17, 246, 2, 0, // Skip to: 6575
1793
/* 5817 */    MCD_OPC_Decode, 153, 11, 133, 1, // Opcode: C_SEQ_D32_MM
1794
/* 5822 */    MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 5837
1795
/* 5827 */    MCD_OPC_CheckPredicate, 17, 231, 2, 0, // Skip to: 6575
1796
/* 5832 */    MCD_OPC_Decode, 129, 11, 133, 1, // Opcode: C_NGL_D32_MM
1797
/* 5837 */    MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 5852
1798
/* 5842 */    MCD_OPC_CheckPredicate, 17, 216, 2, 0, // Skip to: 6575
1799
/* 5847 */    MCD_OPC_Decode, 239, 10, 133, 1, // Opcode: C_LT_D32_MM
1800
/* 5852 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 5867
1801
/* 5857 */    MCD_OPC_CheckPredicate, 17, 201, 2, 0, // Skip to: 6575
1802
/* 5862 */    MCD_OPC_Decode, 245, 10, 133, 1, // Opcode: C_NGE_D32_MM
1803
/* 5867 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 5882
1804
/* 5872 */    MCD_OPC_CheckPredicate, 17, 186, 2, 0, // Skip to: 6575
1805
/* 5877 */    MCD_OPC_Decode, 233, 10, 133, 1, // Opcode: C_LE_D32_MM
1806
/* 5882 */    MCD_OPC_FilterValue, 31, 176, 2, 0, // Skip to: 6575
1807
/* 5887 */    MCD_OPC_CheckPredicate, 17, 171, 2, 0, // Skip to: 6575
1808
/* 5892 */    MCD_OPC_Decode, 135, 11, 133, 1, // Opcode: C_NGT_D32_MM
1809
/* 5897 */    MCD_OPC_FilterValue, 22, 48, 0, 0, // Skip to: 5950
1810
/* 5902 */    MCD_OPC_ExtractField, 0, 11,  // Inst{10-0} ...
1811
/* 5905 */    MCD_OPC_FilterValue, 197, 1, 9, 0, 0, // Skip to: 5920
1812
/* 5911 */    MCD_OPC_CheckPredicate, 8, 147, 2, 0, // Skip to: 6575
1813
/* 5916 */    MCD_OPC_Decode, 205, 9, 54, // Opcode: CMPGU_EQ_QB_MM
1814
/* 5920 */    MCD_OPC_FilterValue, 133, 2, 9, 0, 0, // Skip to: 5935
1815
/* 5926 */    MCD_OPC_CheckPredicate, 8, 132, 2, 0, // Skip to: 6575
1816
/* 5931 */    MCD_OPC_Decode, 209, 9, 54, // Opcode: CMPGU_LT_QB_MM
1817
/* 5935 */    MCD_OPC_FilterValue, 197, 2, 122, 2, 0, // Skip to: 6575
1818
/* 5941 */    MCD_OPC_CheckPredicate, 8, 117, 2, 0, // Skip to: 6575
1819
/* 5946 */    MCD_OPC_Decode, 207, 9, 54, // Opcode: CMPGU_LE_QB_MM
1820
/* 5950 */    MCD_OPC_FilterValue, 24, 115, 1, 0, // Skip to: 6326
1821
/* 5955 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
1822
/* 5958 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 5972
1823
/* 5963 */    MCD_OPC_CheckPredicate, 6, 95, 2, 0, // Skip to: 6575
1824
/* 5968 */    MCD_OPC_Decode, 153, 16, 99, // Opcode: LWL_MM
1825
/* 5972 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 5986
1826
/* 5977 */    MCD_OPC_CheckPredicate, 6, 81, 2, 0, // Skip to: 6575
1827
/* 5982 */    MCD_OPC_Decode, 166, 16, 99, // Opcode: LWR_MM
1828
/* 5986 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 6000
1829
/* 5991 */    MCD_OPC_CheckPredicate, 6, 67, 2, 0, // Skip to: 6575
1830
/* 5996 */    MCD_OPC_Decode, 242, 19, 100, // Opcode: PREF_MM
1831
/* 6000 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 6014
1832
/* 6005 */    MCD_OPC_CheckPredicate, 6, 53, 2, 0, // Skip to: 6575
1833
/* 6010 */    MCD_OPC_Decode, 243, 15, 99, // Opcode: LL_MM
1834
/* 6014 */    MCD_OPC_FilterValue, 6, 123, 0, 0, // Skip to: 6142
1835
/* 6019 */    MCD_OPC_ExtractField, 9, 3,  // Inst{11-9} ...
1836
/* 6022 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6037
1837
/* 6027 */    MCD_OPC_CheckPredicate, 21, 31, 2, 0, // Skip to: 6575
1838
/* 6032 */    MCD_OPC_Decode, 177, 15, 134, 1, // Opcode: LBuE_MM
1839
/* 6037 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 6052
1840
/* 6042 */    MCD_OPC_CheckPredicate, 21, 16, 2, 0, // Skip to: 6575
1841
/* 6047 */    MCD_OPC_Decode, 229, 15, 134, 1, // Opcode: LHuE_MM
1842
/* 6052 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 6067
1843
/* 6057 */    MCD_OPC_CheckPredicate, 22, 1, 2, 0, // Skip to: 6575
1844
/* 6062 */    MCD_OPC_Decode, 152, 16, 134, 1, // Opcode: LWLE_MM
1845
/* 6067 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 6082
1846
/* 6072 */    MCD_OPC_CheckPredicate, 22, 242, 1, 0, // Skip to: 6575
1847
/* 6077 */    MCD_OPC_Decode, 165, 16, 134, 1, // Opcode: LWRE_MM
1848
/* 6082 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 6097
1849
/* 6087 */    MCD_OPC_CheckPredicate, 21, 227, 1, 0, // Skip to: 6575
1850
/* 6092 */    MCD_OPC_Decode, 158, 15, 134, 1, // Opcode: LBE_MM
1851
/* 6097 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 6112
1852
/* 6102 */    MCD_OPC_CheckPredicate, 21, 212, 1, 0, // Skip to: 6575
1853
/* 6107 */    MCD_OPC_Decode, 210, 15, 134, 1, // Opcode: LHE_MM
1854
/* 6112 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 6127
1855
/* 6117 */    MCD_OPC_CheckPredicate, 21, 197, 1, 0, // Skip to: 6575
1856
/* 6122 */    MCD_OPC_Decode, 241, 15, 134, 1, // Opcode: LLE_MM
1857
/* 6127 */    MCD_OPC_FilterValue, 7, 187, 1, 0, // Skip to: 6575
1858
/* 6132 */    MCD_OPC_CheckPredicate, 21, 182, 1, 0, // Skip to: 6575
1859
/* 6137 */    MCD_OPC_Decode, 145, 16, 134, 1, // Opcode: LWE_MM
1860
/* 6142 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 6156
1861
/* 6147 */    MCD_OPC_CheckPredicate, 6, 167, 1, 0, // Skip to: 6575
1862
/* 6152 */    MCD_OPC_Decode, 150, 23, 99, // Opcode: SWL_MM
1863
/* 6156 */    MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 6170
1864
/* 6161 */    MCD_OPC_CheckPredicate, 6, 153, 1, 0, // Skip to: 6575
1865
/* 6166 */    MCD_OPC_Decode, 161, 23, 99, // Opcode: SWR_MM
1866
/* 6170 */    MCD_OPC_FilterValue, 10, 123, 0, 0, // Skip to: 6298
1867
/* 6175 */    MCD_OPC_ExtractField, 9, 3,  // Inst{11-9} ...
1868
/* 6178 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6193
1869
/* 6183 */    MCD_OPC_CheckPredicate, 22, 131, 1, 0, // Skip to: 6575
1870
/* 6188 */    MCD_OPC_Decode, 149, 23, 134, 1, // Opcode: SWLE_MM
1871
/* 6193 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 6208
1872
/* 6198 */    MCD_OPC_CheckPredicate, 22, 116, 1, 0, // Skip to: 6575
1873
/* 6203 */    MCD_OPC_Decode, 160, 23, 134, 1, // Opcode: SWRE_MM
1874
/* 6208 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 6223
1875
/* 6213 */    MCD_OPC_CheckPredicate, 21, 101, 1, 0, // Skip to: 6575
1876
/* 6218 */    MCD_OPC_Decode, 240, 19, 135, 1, // Opcode: PREFE_MM
1877
/* 6223 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 6238
1878
/* 6228 */    MCD_OPC_CheckPredicate, 21, 86, 1, 0, // Skip to: 6575
1879
/* 6233 */    MCD_OPC_Decode, 248, 8, 135, 1, // Opcode: CACHEE_MM
1880
/* 6238 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 6253
1881
/* 6243 */    MCD_OPC_CheckPredicate, 21, 71, 1, 0, // Skip to: 6575
1882
/* 6248 */    MCD_OPC_Decode, 199, 20, 134, 1, // Opcode: SBE_MM
1883
/* 6253 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 6268
1884
/* 6258 */    MCD_OPC_CheckPredicate, 21, 56, 1, 0, // Skip to: 6575
1885
/* 6263 */    MCD_OPC_Decode, 149, 21, 134, 1, // Opcode: SHE_MM
1886
/* 6268 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 6283
1887
/* 6273 */    MCD_OPC_CheckPredicate, 21, 41, 1, 0, // Skip to: 6575
1888
/* 6278 */    MCD_OPC_Decode, 212, 20, 134, 1, // Opcode: SCE_MM
1889
/* 6283 */    MCD_OPC_FilterValue, 7, 31, 1, 0, // Skip to: 6575
1890
/* 6288 */    MCD_OPC_CheckPredicate, 21, 26, 1, 0, // Skip to: 6575
1891
/* 6293 */    MCD_OPC_Decode, 143, 23, 134, 1, // Opcode: SWE_MM
1892
/* 6298 */    MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 6312
1893
/* 6303 */    MCD_OPC_CheckPredicate, 6, 11, 1, 0, // Skip to: 6575
1894
/* 6308 */    MCD_OPC_Decode, 214, 20, 99, // Opcode: SC_MM
1895
/* 6312 */    MCD_OPC_FilterValue, 14, 2, 1, 0, // Skip to: 6575
1896
/* 6317 */    MCD_OPC_CheckPredicate, 6, 253, 0, 0, // Skip to: 6575
1897
/* 6322 */    MCD_OPC_Decode, 170, 16, 99, // Opcode: LWU_MM
1898
/* 6326 */    MCD_OPC_FilterValue, 28, 9, 0, 0, // Skip to: 6340
1899
/* 6331 */    MCD_OPC_CheckPredicate, 6, 239, 0, 0, // Skip to: 6575
1900
/* 6336 */    MCD_OPC_Decode, 186, 24, 108, // Opcode: XORi_MM
1901
/* 6340 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 6355
1902
/* 6345 */    MCD_OPC_CheckPredicate, 6, 225, 0, 0, // Skip to: 6575
1903
/* 6350 */    MCD_OPC_Decode, 250, 14, 136, 1, // Opcode: JALS_MM
1904
/* 6355 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 6370
1905
/* 6360 */    MCD_OPC_CheckPredicate, 6, 210, 0, 0, // Skip to: 6575
1906
/* 6365 */    MCD_OPC_Decode, 130, 6, 137, 1, // Opcode: ADDIUPC_MM
1907
/* 6370 */    MCD_OPC_FilterValue, 36, 9, 0, 0, // Skip to: 6384
1908
/* 6375 */    MCD_OPC_CheckPredicate, 7, 195, 0, 0, // Skip to: 6575
1909
/* 6380 */    MCD_OPC_Decode, 248, 21, 97, // Opcode: SLTi_MM
1910
/* 6384 */    MCD_OPC_FilterValue, 37, 10, 0, 0, // Skip to: 6399
1911
/* 6389 */    MCD_OPC_CheckPredicate, 6, 181, 0, 0, // Skip to: 6575
1912
/* 6394 */    MCD_OPC_Decode, 208, 7, 138, 1, // Opcode: BEQ_MM
1913
/* 6399 */    MCD_OPC_FilterValue, 38, 10, 0, 0, // Skip to: 6414
1914
/* 6404 */    MCD_OPC_CheckPredicate, 19, 166, 0, 0, // Skip to: 6575
1915
/* 6409 */    MCD_OPC_Decode, 135, 23, 139, 1, // Opcode: SWC1_MM
1916
/* 6414 */    MCD_OPC_FilterValue, 39, 10, 0, 0, // Skip to: 6429
1917
/* 6419 */    MCD_OPC_CheckPredicate, 19, 151, 0, 0, // Skip to: 6575
1918
/* 6424 */    MCD_OPC_Decode, 137, 16, 139, 1, // Opcode: LWC1_MM
1919
/* 6429 */    MCD_OPC_FilterValue, 44, 9, 0, 0, // Skip to: 6443
1920
/* 6434 */    MCD_OPC_CheckPredicate, 7, 136, 0, 0, // Skip to: 6575
1921
/* 6439 */    MCD_OPC_Decode, 251, 21, 97, // Opcode: SLTiu_MM
1922
/* 6443 */    MCD_OPC_FilterValue, 45, 10, 0, 0, // Skip to: 6458
1923
/* 6448 */    MCD_OPC_CheckPredicate, 6, 122, 0, 0, // Skip to: 6575
1924
/* 6453 */    MCD_OPC_Decode, 198, 8, 138, 1, // Opcode: BNE_MM
1925
/* 6458 */    MCD_OPC_FilterValue, 46, 10, 0, 0, // Skip to: 6473
1926
/* 6463 */    MCD_OPC_CheckPredicate, 18, 107, 0, 0, // Skip to: 6575
1927
/* 6468 */    MCD_OPC_Decode, 230, 20, 139, 1, // Opcode: SDC1_MM_D32
1928
/* 6473 */    MCD_OPC_FilterValue, 47, 10, 0, 0, // Skip to: 6488
1929
/* 6478 */    MCD_OPC_CheckPredicate, 18, 92, 0, 0, // Skip to: 6575
1930
/* 6483 */    MCD_OPC_Decode, 183, 15, 139, 1, // Opcode: LDC1_MM_D32
1931
/* 6488 */    MCD_OPC_FilterValue, 52, 9, 0, 0, // Skip to: 6502
1932
/* 6493 */    MCD_OPC_CheckPredicate, 6, 77, 0, 0, // Skip to: 6575
1933
/* 6498 */    MCD_OPC_Decode, 233, 6, 108, // Opcode: ANDi_MM
1934
/* 6502 */    MCD_OPC_FilterValue, 53, 10, 0, 0, // Skip to: 6517
1935
/* 6507 */    MCD_OPC_CheckPredicate, 6, 63, 0, 0, // Skip to: 6575
1936
/* 6512 */    MCD_OPC_Decode, 145, 15, 136, 1, // Opcode: J_MM
1937
/* 6517 */    MCD_OPC_FilterValue, 60, 10, 0, 0, // Skip to: 6532
1938
/* 6522 */    MCD_OPC_CheckPredicate, 6, 48, 0, 0, // Skip to: 6575
1939
/* 6527 */    MCD_OPC_Decode, 252, 14, 140, 1, // Opcode: JALX_MM
1940
/* 6532 */    MCD_OPC_FilterValue, 61, 10, 0, 0, // Skip to: 6547
1941
/* 6537 */    MCD_OPC_CheckPredicate, 6, 33, 0, 0, // Skip to: 6575
1942
/* 6542 */    MCD_OPC_Decode, 253, 14, 136, 1, // Opcode: JAL_MM
1943
/* 6547 */    MCD_OPC_FilterValue, 62, 9, 0, 0, // Skip to: 6561
1944
/* 6552 */    MCD_OPC_CheckPredicate, 7, 18, 0, 0, // Skip to: 6575
1945
/* 6557 */    MCD_OPC_Decode, 169, 23, 98, // Opcode: SW_MM
1946
/* 6561 */    MCD_OPC_FilterValue, 63, 9, 0, 0, // Skip to: 6575
1947
/* 6566 */    MCD_OPC_CheckPredicate, 7, 4, 0, 0, // Skip to: 6575
1948
/* 6571 */    MCD_OPC_Decode, 179, 16, 98, // Opcode: LW_MM
1949
/* 6575 */    MCD_OPC_Fail,
1950
  0
1951
};
1952
1953
static const uint8_t DecoderTableMicroMipsDSP32[] = {
1954
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
1955
/* 3 */       MCD_OPC_FilterValue, 62, 10, 0, 0, // Skip to: 18
1956
/* 8 */       MCD_OPC_CheckPredicate, 8, 20, 0, 0, // Skip to: 33
1957
/* 13 */      MCD_OPC_Decode, 141, 23, 141, 1, // Opcode: SWDSP_MM
1958
/* 18 */      MCD_OPC_FilterValue, 63, 10, 0, 0, // Skip to: 33
1959
/* 23 */      MCD_OPC_CheckPredicate, 8, 5, 0, 0, // Skip to: 33
1960
/* 28 */      MCD_OPC_Decode, 143, 16, 141, 1, // Opcode: LWDSP_MM
1961
/* 33 */      MCD_OPC_Fail,
1962
  0
1963
};
1964
1965
static const uint8_t DecoderTableMicroMipsFP6432[] = {
1966
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
1967
/* 3 */       MCD_OPC_FilterValue, 21, 39, 1, 0, // Skip to: 303
1968
/* 8 */       MCD_OPC_ExtractField, 0, 11,  // Inst{10-0} ...
1969
/* 11 */      MCD_OPC_FilterValue, 59, 48, 0, 0, // Skip to: 64
1970
/* 16 */      MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
1971
/* 19 */      MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 34
1972
/* 24 */      MCD_OPC_CheckPredicate, 20, 48, 1, 0, // Skip to: 333
1973
/* 29 */      MCD_OPC_Decode, 162, 18, 142, 1, // Opcode: MTC1_D64_MM
1974
/* 34 */      MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 49
1975
/* 39 */      MCD_OPC_CheckPredicate, 20, 33, 1, 0, // Skip to: 333
1976
/* 44 */      MCD_OPC_Decode, 146, 17, 143, 1, // Opcode: MFHC1_D64_MM
1977
/* 49 */      MCD_OPC_FilterValue, 7, 23, 1, 0, // Skip to: 333
1978
/* 54 */      MCD_OPC_CheckPredicate, 20, 18, 1, 0, // Skip to: 333
1979
/* 59 */      MCD_OPC_Decode, 175, 18, 144, 1, // Opcode: MTHC1_D64_MM
1980
/* 64 */      MCD_OPC_FilterValue, 123, 16, 0, 0, // Skip to: 85
1981
/* 69 */      MCD_OPC_CheckPredicate, 20, 3, 1, 0, // Skip to: 333
1982
/* 74 */      MCD_OPC_CheckField, 11, 5, 4, 252, 0, 0, // Skip to: 333
1983
/* 81 */      MCD_OPC_Decode, 230, 13, 122, // Opcode: FMOV_D64_MM
1984
/* 85 */      MCD_OPC_FilterValue, 176, 2, 10, 0, 0, // Skip to: 101
1985
/* 91 */      MCD_OPC_CheckPredicate, 20, 237, 0, 0, // Skip to: 333
1986
/* 96 */      MCD_OPC_Decode, 140, 13, 145, 1, // Opcode: FADD_D64_MM
1987
/* 101 */     MCD_OPC_FilterValue, 187, 2, 17, 0, 0, // Skip to: 124
1988
/* 107 */     MCD_OPC_CheckPredicate, 20, 221, 0, 0, // Skip to: 333
1989
/* 112 */     MCD_OPC_CheckField, 11, 5, 9, 214, 0, 0, // Skip to: 333
1990
/* 119 */     MCD_OPC_Decode, 216, 10, 146, 1, // Opcode: CVT_W_D64_MM
1991
/* 124 */     MCD_OPC_FilterValue, 240, 2, 10, 0, 0, // Skip to: 140
1992
/* 130 */     MCD_OPC_CheckPredicate, 20, 198, 0, 0, // Skip to: 333
1993
/* 135 */     MCD_OPC_Decode, 158, 14, 145, 1, // Opcode: FSUB_D64_MM
1994
/* 140 */     MCD_OPC_FilterValue, 176, 3, 10, 0, 0, // Skip to: 156
1995
/* 146 */     MCD_OPC_CheckPredicate, 20, 182, 0, 0, // Skip to: 333
1996
/* 151 */     MCD_OPC_Decode, 241, 13, 145, 1, // Opcode: FMUL_D64_MM
1997
/* 156 */     MCD_OPC_FilterValue, 240, 3, 10, 0, 0, // Skip to: 172
1998
/* 162 */     MCD_OPC_CheckPredicate, 20, 166, 0, 0, // Skip to: 333
1999
/* 167 */     MCD_OPC_Decode, 179, 13, 145, 1, // Opcode: FDIV_D64_MM
2000
/* 172 */     MCD_OPC_FilterValue, 187, 4, 45, 0, 0, // Skip to: 223
2001
/* 178 */     MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
2002
/* 181 */     MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 195
2003
/* 186 */     MCD_OPC_CheckPredicate, 20, 142, 0, 0, // Skip to: 333
2004
/* 191 */     MCD_OPC_Decode, 176, 20, 122, // Opcode: RSQRT_D64_MM
2005
/* 195 */     MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 209
2006
/* 200 */     MCD_OPC_CheckPredicate, 20, 128, 0, 0, // Skip to: 333
2007
/* 205 */     MCD_OPC_Decode, 150, 14, 122, // Opcode: FSQRT_D64_MM
2008
/* 209 */     MCD_OPC_FilterValue, 10, 119, 0, 0, // Skip to: 333
2009
/* 214 */     MCD_OPC_CheckPredicate, 20, 114, 0, 0, // Skip to: 333
2010
/* 219 */     MCD_OPC_Decode, 137, 20, 122, // Opcode: RECIP_D64_MM
2011
/* 223 */     MCD_OPC_FilterValue, 251, 6, 104, 0, 0, // Skip to: 333
2012
/* 229 */     MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
2013
/* 232 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 246
2014
/* 237 */     MCD_OPC_CheckPredicate, 20, 91, 0, 0, // Skip to: 333
2015
/* 242 */     MCD_OPC_Decode, 189, 10, 121, // Opcode: CVT_D64_S_MM
2016
/* 246 */     MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 261
2017
/* 251 */     MCD_OPC_CheckPredicate, 20, 77, 0, 0, // Skip to: 333
2018
/* 256 */     MCD_OPC_Decode, 205, 10, 146, 1, // Opcode: CVT_S_D64_MM
2019
/* 261 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 275
2020
/* 266 */     MCD_OPC_CheckPredicate, 20, 62, 0, 0, // Skip to: 333
2021
/* 271 */     MCD_OPC_Decode, 133, 13, 122, // Opcode: FABS_D64_MM
2022
/* 275 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 289
2023
/* 280 */     MCD_OPC_CheckPredicate, 20, 48, 0, 0, // Skip to: 333
2024
/* 285 */     MCD_OPC_Decode, 250, 13, 122, // Opcode: FNEG_D64_MM
2025
/* 289 */     MCD_OPC_FilterValue, 6, 39, 0, 0, // Skip to: 333
2026
/* 294 */     MCD_OPC_CheckPredicate, 20, 34, 0, 0, // Skip to: 333
2027
/* 299 */     MCD_OPC_Decode, 191, 10, 121, // Opcode: CVT_D64_W_MM
2028
/* 303 */     MCD_OPC_FilterValue, 46, 10, 0, 0, // Skip to: 318
2029
/* 308 */     MCD_OPC_CheckPredicate, 23, 20, 0, 0, // Skip to: 333
2030
/* 313 */     MCD_OPC_Decode, 229, 20, 139, 1, // Opcode: SDC1_D64_MMR6
2031
/* 318 */     MCD_OPC_FilterValue, 47, 10, 0, 0, // Skip to: 333
2032
/* 323 */     MCD_OPC_CheckPredicate, 23, 5, 0, 0, // Skip to: 333
2033
/* 328 */     MCD_OPC_Decode, 182, 15, 139, 1, // Opcode: LDC1_D64_MMR6
2034
/* 333 */     MCD_OPC_Fail,
2035
  0
2036
};
2037
2038
static const uint8_t DecoderTableMicroMipsR616[] = {
2039
/* 0 */       MCD_OPC_ExtractField, 10, 6,  // Inst{15-10} ...
2040
/* 3 */       MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 41
2041
/* 8 */       MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
2042
/* 11 */      MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 26
2043
/* 16 */      MCD_OPC_CheckPredicate, 24, 173, 1, 0, // Skip to: 450
2044
/* 21 */      MCD_OPC_Decode, 171, 6, 147, 1, // Opcode: ADDU16_MMR6
2045
/* 26 */      MCD_OPC_FilterValue, 1, 163, 1, 0, // Skip to: 450
2046
/* 31 */      MCD_OPC_CheckPredicate, 24, 158, 1, 0, // Skip to: 450
2047
/* 36 */      MCD_OPC_Decode, 224, 22, 147, 1, // Opcode: SUBU16_MMR6
2048
/* 41 */      MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 55
2049
/* 46 */      MCD_OPC_CheckPredicate, 24, 143, 1, 0, // Skip to: 450
2050
/* 51 */      MCD_OPC_Decode, 209, 17, 33, // Opcode: MOVE16_MMR6
2051
/* 55 */      MCD_OPC_FilterValue, 9, 31, 0, 0, // Skip to: 91
2052
/* 60 */      MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
2053
/* 63 */      MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 77
2054
/* 68 */      MCD_OPC_CheckPredicate, 24, 121, 1, 0, // Skip to: 450
2055
/* 73 */      MCD_OPC_Decode, 221, 21, 34, // Opcode: SLL16_MMR6
2056
/* 77 */      MCD_OPC_FilterValue, 1, 112, 1, 0, // Skip to: 450
2057
/* 82 */      MCD_OPC_CheckPredicate, 24, 107, 1, 0, // Skip to: 450
2058
/* 87 */      MCD_OPC_Decode, 162, 22, 34, // Opcode: SRL16_MMR6
2059
/* 91 */      MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 105
2060
/* 96 */      MCD_OPC_CheckPredicate, 24, 93, 1, 0, // Skip to: 450
2061
/* 101 */     MCD_OPC_Decode, 222, 6, 35, // Opcode: ANDI16_MMR6
2062
/* 105 */     MCD_OPC_FilterValue, 17, 228, 0, 0, // Skip to: 338
2063
/* 110 */     MCD_OPC_ExtractField, 2, 1,  // Inst{2} ...
2064
/* 113 */     MCD_OPC_FilterValue, 0, 206, 0, 0, // Skip to: 324
2065
/* 118 */     MCD_OPC_ExtractField, 0, 2,  // Inst{1-0} ...
2066
/* 121 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 159
2067
/* 126 */     MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
2068
/* 129 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 144
2069
/* 134 */     MCD_OPC_CheckPredicate, 24, 55, 1, 0, // Skip to: 450
2070
/* 139 */     MCD_OPC_Decode, 159, 19, 148, 1, // Opcode: NOT16_MMR6
2071
/* 144 */     MCD_OPC_FilterValue, 1, 45, 1, 0, // Skip to: 450
2072
/* 149 */     MCD_OPC_CheckPredicate, 24, 40, 1, 0, // Skip to: 450
2073
/* 154 */     MCD_OPC_Decode, 174, 24, 149, 1, // Opcode: XOR16_MMR6
2074
/* 159 */     MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 197
2075
/* 164 */     MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
2076
/* 167 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 182
2077
/* 172 */     MCD_OPC_CheckPredicate, 24, 17, 1, 0, // Skip to: 450
2078
/* 177 */     MCD_OPC_Decode, 218, 6, 149, 1, // Opcode: AND16_MMR6
2079
/* 182 */     MCD_OPC_FilterValue, 1, 7, 1, 0, // Skip to: 450
2080
/* 187 */     MCD_OPC_CheckPredicate, 24, 2, 1, 0, // Skip to: 450
2081
/* 192 */     MCD_OPC_Decode, 165, 19, 149, 1, // Opcode: OR16_MMR6
2082
/* 197 */     MCD_OPC_FilterValue, 2, 31, 0, 0, // Skip to: 233
2083
/* 202 */     MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
2084
/* 205 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 219
2085
/* 210 */     MCD_OPC_CheckPredicate, 24, 235, 0, 0, // Skip to: 450
2086
/* 215 */     MCD_OPC_Decode, 155, 16, 38, // Opcode: LWM16_MMR6
2087
/* 219 */     MCD_OPC_FilterValue, 1, 226, 0, 0, // Skip to: 450
2088
/* 224 */     MCD_OPC_CheckPredicate, 24, 221, 0, 0, // Skip to: 450
2089
/* 229 */     MCD_OPC_Decode, 152, 23, 38, // Opcode: SWM16_MMR6
2090
/* 233 */     MCD_OPC_FilterValue, 3, 212, 0, 0, // Skip to: 450
2091
/* 238 */     MCD_OPC_ExtractField, 3, 2,  // Inst{4-3} ...
2092
/* 241 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 256
2093
/* 246 */     MCD_OPC_CheckPredicate, 24, 199, 0, 0, // Skip to: 450
2094
/* 251 */     MCD_OPC_Decode, 137, 15, 150, 1, // Opcode: JRC16_MMR6
2095
/* 256 */     MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 271
2096
/* 261 */     MCD_OPC_CheckPredicate, 24, 184, 0, 0, // Skip to: 450
2097
/* 266 */     MCD_OPC_Decode, 239, 14, 150, 1, // Opcode: JALRC16_MMR6
2098
/* 271 */     MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 286
2099
/* 276 */     MCD_OPC_CheckPredicate, 24, 169, 0, 0, // Skip to: 450
2100
/* 281 */     MCD_OPC_Decode, 138, 15, 151, 1, // Opcode: JRCADDIUSP_MMR6
2101
/* 286 */     MCD_OPC_FilterValue, 3, 159, 0, 0, // Skip to: 450
2102
/* 291 */     MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
2103
/* 294 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 309
2104
/* 299 */     MCD_OPC_CheckPredicate, 24, 146, 0, 0, // Skip to: 450
2105
/* 304 */     MCD_OPC_Decode, 213, 8, 152, 1, // Opcode: BREAK16_MMR6
2106
/* 309 */     MCD_OPC_FilterValue, 1, 136, 0, 0, // Skip to: 450
2107
/* 314 */     MCD_OPC_CheckPredicate, 24, 131, 0, 0, // Skip to: 450
2108
/* 319 */     MCD_OPC_Decode, 221, 20, 152, 1, // Opcode: SDBBP16_MMR6
2109
/* 324 */     MCD_OPC_FilterValue, 1, 121, 0, 0, // Skip to: 450
2110
/* 329 */     MCD_OPC_CheckPredicate, 24, 116, 0, 0, // Skip to: 450
2111
/* 334 */     MCD_OPC_Decode, 213, 17, 48, // Opcode: MOVEP_MMR6
2112
/* 338 */     MCD_OPC_FilterValue, 34, 9, 0, 0, // Skip to: 352
2113
/* 343 */     MCD_OPC_CheckPredicate, 24, 102, 0, 0, // Skip to: 450
2114
/* 348 */     MCD_OPC_Decode, 195, 20, 32, // Opcode: SB16_MMR6
2115
/* 352 */     MCD_OPC_FilterValue, 35, 9, 0, 0, // Skip to: 366
2116
/* 357 */     MCD_OPC_CheckPredicate, 24, 88, 0, 0, // Skip to: 450
2117
/* 362 */     MCD_OPC_Decode, 202, 7, 49, // Opcode: BEQZC16_MMR6
2118
/* 366 */     MCD_OPC_FilterValue, 42, 9, 0, 0, // Skip to: 380
2119
/* 371 */     MCD_OPC_CheckPredicate, 24, 74, 0, 0, // Skip to: 450
2120
/* 376 */     MCD_OPC_Decode, 145, 21, 32, // Opcode: SH16_MMR6
2121
/* 380 */     MCD_OPC_FilterValue, 43, 9, 0, 0, // Skip to: 394
2122
/* 385 */     MCD_OPC_CheckPredicate, 24, 60, 0, 0, // Skip to: 450
2123
/* 390 */     MCD_OPC_Decode, 192, 8, 49, // Opcode: BNEZC16_MMR6
2124
/* 394 */     MCD_OPC_FilterValue, 50, 9, 0, 0, // Skip to: 408
2125
/* 399 */     MCD_OPC_CheckPredicate, 24, 46, 0, 0, // Skip to: 450
2126
/* 404 */     MCD_OPC_Decode, 164, 23, 42, // Opcode: SWSP_MMR6
2127
/* 408 */     MCD_OPC_FilterValue, 51, 9, 0, 0, // Skip to: 422
2128
/* 413 */     MCD_OPC_CheckPredicate, 24, 32, 0, 0, // Skip to: 450
2129
/* 418 */     MCD_OPC_Decode, 162, 7, 50, // Opcode: BC16_MMR6
2130
/* 422 */     MCD_OPC_FilterValue, 58, 9, 0, 0, // Skip to: 436
2131
/* 427 */     MCD_OPC_CheckPredicate, 24, 18, 0, 0, // Skip to: 450
2132
/* 432 */     MCD_OPC_Decode, 130, 23, 32, // Opcode: SW16_MMR6
2133
/* 436 */     MCD_OPC_FilterValue, 59, 9, 0, 0, // Skip to: 450
2134
/* 441 */     MCD_OPC_CheckPredicate, 24, 4, 0, 0, // Skip to: 450
2135
/* 446 */     MCD_OPC_Decode, 232, 15, 51, // Opcode: LI16_MMR6
2136
/* 450 */     MCD_OPC_Fail,
2137
  0
2138
};
2139
2140
static const uint8_t DecoderTableMicroMipsR632[] = {
2141
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
2142
/* 3 */       MCD_OPC_FilterValue, 0, 98, 4, 0, // Skip to: 1130
2143
/* 8 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
2144
/* 11 */      MCD_OPC_FilterValue, 0, 112, 0, 0, // Skip to: 128
2145
/* 16 */      MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2146
/* 19 */      MCD_OPC_FilterValue, 0, 54, 0, 0, // Skip to: 78
2147
/* 24 */      MCD_OPC_ExtractField, 11, 15,  // Inst{25-11} ...
2148
/* 27 */      MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 41
2149
/* 32 */      MCD_OPC_CheckPredicate, 24, 32, 0, 0, // Skip to: 69
2150
/* 37 */      MCD_OPC_Decode, 187, 22, 10, // Opcode: SSNOP_MMR6
2151
/* 41 */      MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 55
2152
/* 46 */      MCD_OPC_CheckPredicate, 24, 18, 0, 0, // Skip to: 69
2153
/* 51 */      MCD_OPC_Decode, 208, 12, 10, // Opcode: EHB_MMR6
2154
/* 55 */      MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 69
2155
/* 60 */      MCD_OPC_CheckPredicate, 24, 4, 0, 0, // Skip to: 69
2156
/* 65 */      MCD_OPC_Decode, 183, 19, 10, // Opcode: PAUSE_MMR6
2157
/* 69 */      MCD_OPC_CheckPredicate, 24, 80, 12, 0, // Skip to: 3226
2158
/* 74 */      MCD_OPC_Decode, 236, 21, 52, // Opcode: SLL_MMR6
2159
/* 78 */      MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 92
2160
/* 83 */      MCD_OPC_CheckPredicate, 24, 66, 12, 0, // Skip to: 3226
2161
/* 88 */      MCD_OPC_Decode, 254, 20, 55, // Opcode: SELEQZ_MMR6
2162
/* 92 */      MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 106
2163
/* 97 */      MCD_OPC_CheckPredicate, 24, 52, 12, 0, // Skip to: 3226
2164
/* 102 */     MCD_OPC_Decode, 133, 21, 55, // Opcode: SELNEZ_MMR6
2165
/* 106 */     MCD_OPC_FilterValue, 7, 43, 12, 0, // Skip to: 3226
2166
/* 111 */     MCD_OPC_CheckPredicate, 24, 38, 12, 0, // Skip to: 3226
2167
/* 116 */     MCD_OPC_CheckField, 14, 2, 0, 31, 12, 0, // Skip to: 3226
2168
/* 123 */     MCD_OPC_Decode, 130, 20, 153, 1, // Opcode: RDHWR_MMR6
2169
/* 128 */     MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 142
2170
/* 133 */     MCD_OPC_CheckPredicate, 24, 16, 12, 0, // Skip to: 3226
2171
/* 138 */     MCD_OPC_Decode, 216, 8, 56, // Opcode: BREAK_MMR6
2172
/* 142 */     MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 156
2173
/* 147 */     MCD_OPC_CheckPredicate, 24, 2, 12, 0, // Skip to: 3226
2174
/* 152 */     MCD_OPC_Decode, 232, 14, 57, // Opcode: INS_MMR6
2175
/* 156 */     MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 178
2176
/* 161 */     MCD_OPC_CheckPredicate, 24, 244, 11, 0, // Skip to: 3226
2177
/* 166 */     MCD_OPC_CheckField, 6, 3, 0, 237, 11, 0, // Skip to: 3226
2178
/* 173 */     MCD_OPC_Decode, 248, 15, 154, 1, // Opcode: LSA_MMR6
2179
/* 178 */     MCD_OPC_FilterValue, 16, 136, 0, 0, // Skip to: 319
2180
/* 183 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2181
/* 186 */     MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 207
2182
/* 191 */     MCD_OPC_CheckPredicate, 24, 214, 11, 0, // Skip to: 3226
2183
/* 196 */     MCD_OPC_CheckField, 16, 5, 0, 207, 11, 0, // Skip to: 3226
2184
/* 203 */     MCD_OPC_Decode, 195, 9, 25, // Opcode: CLZ_MMR6
2185
/* 207 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 221
2186
/* 212 */     MCD_OPC_CheckPredicate, 24, 193, 11, 0, // Skip to: 3226
2187
/* 217 */     MCD_OPC_Decode, 200, 6, 55, // Opcode: ADD_MMR6
2188
/* 221 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 235
2189
/* 226 */     MCD_OPC_CheckPredicate, 24, 179, 11, 0, // Skip to: 3226
2190
/* 231 */     MCD_OPC_Decode, 176, 6, 55, // Opcode: ADDU_MMR6
2191
/* 235 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 249
2192
/* 240 */     MCD_OPC_CheckPredicate, 24, 165, 11, 0, // Skip to: 3226
2193
/* 245 */     MCD_OPC_Decode, 247, 22, 55, // Opcode: SUB_MMR6
2194
/* 249 */     MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 263
2195
/* 254 */     MCD_OPC_CheckPredicate, 24, 151, 11, 0, // Skip to: 3226
2196
/* 259 */     MCD_OPC_Decode, 229, 22, 55, // Opcode: SUBU_MMR6
2197
/* 263 */     MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 277
2198
/* 268 */     MCD_OPC_CheckPredicate, 24, 137, 11, 0, // Skip to: 3226
2199
/* 273 */     MCD_OPC_Decode, 228, 6, 55, // Opcode: AND_MMR6
2200
/* 277 */     MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 291
2201
/* 282 */     MCD_OPC_CheckPredicate, 24, 123, 11, 0, // Skip to: 3226
2202
/* 287 */     MCD_OPC_Decode, 172, 19, 55, // Opcode: OR_MMR6
2203
/* 291 */     MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 305
2204
/* 296 */     MCD_OPC_CheckPredicate, 24, 109, 11, 0, // Skip to: 3226
2205
/* 301 */     MCD_OPC_Decode, 155, 19, 55, // Opcode: NOR_MMR6
2206
/* 305 */     MCD_OPC_FilterValue, 12, 100, 11, 0, // Skip to: 3226
2207
/* 310 */     MCD_OPC_CheckPredicate, 24, 95, 11, 0, // Skip to: 3226
2208
/* 315 */     MCD_OPC_Decode, 181, 24, 55, // Opcode: XOR_MMR6
2209
/* 319 */     MCD_OPC_FilterValue, 24, 115, 0, 0, // Skip to: 439
2210
/* 324 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2211
/* 327 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 341
2212
/* 332 */     MCD_OPC_CheckPredicate, 24, 73, 11, 0, // Skip to: 3226
2213
/* 337 */     MCD_OPC_Decode, 246, 18, 55, // Opcode: MUL_MMR6
2214
/* 341 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 355
2215
/* 346 */     MCD_OPC_CheckPredicate, 24, 59, 11, 0, // Skip to: 3226
2216
/* 351 */     MCD_OPC_Decode, 203, 18, 55, // Opcode: MUH_MMR6
2217
/* 355 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 369
2218
/* 360 */     MCD_OPC_CheckPredicate, 24, 45, 11, 0, // Skip to: 3226
2219
/* 365 */     MCD_OPC_Decode, 239, 18, 55, // Opcode: MULU_MMR6
2220
/* 369 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 383
2221
/* 374 */     MCD_OPC_CheckPredicate, 24, 31, 11, 0, // Skip to: 3226
2222
/* 379 */     MCD_OPC_Decode, 201, 18, 55, // Opcode: MUHU_MMR6
2223
/* 383 */     MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 397
2224
/* 388 */     MCD_OPC_CheckPredicate, 24, 17, 11, 0, // Skip to: 3226
2225
/* 393 */     MCD_OPC_Decode, 222, 11, 55, // Opcode: DIV_MMR6
2226
/* 397 */     MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 411
2227
/* 402 */     MCD_OPC_CheckPredicate, 24, 3, 11, 0, // Skip to: 3226
2228
/* 407 */     MCD_OPC_Decode, 198, 17, 55, // Opcode: MOD_MMR6
2229
/* 411 */     MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 425
2230
/* 416 */     MCD_OPC_CheckPredicate, 24, 245, 10, 0, // Skip to: 3226
2231
/* 421 */     MCD_OPC_Decode, 220, 11, 55, // Opcode: DIVU_MMR6
2232
/* 425 */     MCD_OPC_FilterValue, 7, 236, 10, 0, // Skip to: 3226
2233
/* 430 */     MCD_OPC_CheckPredicate, 24, 231, 10, 0, // Skip to: 3226
2234
/* 435 */     MCD_OPC_Decode, 196, 17, 55, // Opcode: MODU_MMR6
2235
/* 439 */     MCD_OPC_FilterValue, 31, 17, 0, 0, // Skip to: 461
2236
/* 444 */     MCD_OPC_CheckPredicate, 24, 217, 10, 0, // Skip to: 3226
2237
/* 449 */     MCD_OPC_CheckField, 6, 3, 0, 210, 10, 0, // Skip to: 3226
2238
/* 456 */     MCD_OPC_Decode, 212, 6, 155, 1, // Opcode: ALIGN_MMR6
2239
/* 461 */     MCD_OPC_FilterValue, 44, 9, 0, 0, // Skip to: 475
2240
/* 466 */     MCD_OPC_CheckPredicate, 24, 195, 10, 0, // Skip to: 3226
2241
/* 471 */     MCD_OPC_Decode, 128, 13, 66, // Opcode: EXT_MMR6
2242
/* 475 */     MCD_OPC_FilterValue, 52, 45, 0, 0, // Skip to: 525
2243
/* 480 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2244
/* 483 */     MCD_OPC_FilterValue, 3, 16, 0, 0, // Skip to: 504
2245
/* 488 */     MCD_OPC_CheckPredicate, 24, 173, 10, 0, // Skip to: 3226
2246
/* 493 */     MCD_OPC_CheckField, 14, 2, 0, 166, 10, 0, // Skip to: 3226
2247
/* 500 */     MCD_OPC_Decode, 141, 17, 68, // Opcode: MFHC0_MMR6
2248
/* 504 */     MCD_OPC_FilterValue, 11, 157, 10, 0, // Skip to: 3226
2249
/* 509 */     MCD_OPC_CheckPredicate, 24, 152, 10, 0, // Skip to: 3226
2250
/* 514 */     MCD_OPC_CheckField, 14, 2, 0, 145, 10, 0, // Skip to: 3226
2251
/* 521 */     MCD_OPC_Decode, 170, 18, 69, // Opcode: MTHC0_MMR6
2252
/* 525 */     MCD_OPC_FilterValue, 60, 66, 2, 0, // Skip to: 1108
2253
/* 530 */     MCD_OPC_ExtractField, 14, 2,  // Inst{15-14} ...
2254
/* 533 */     MCD_OPC_FilterValue, 0, 138, 0, 0, // Skip to: 676
2255
/* 538 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2256
/* 541 */     MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 555
2257
/* 546 */     MCD_OPC_CheckPredicate, 24, 115, 10, 0, // Skip to: 3226
2258
/* 551 */     MCD_OPC_Decode, 130, 17, 68, // Opcode: MFC0_MMR6
2259
/* 555 */     MCD_OPC_FilterValue, 5, 45, 0, 0, // Skip to: 605
2260
/* 560 */     MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
2261
/* 563 */     MCD_OPC_FilterValue, 3, 16, 0, 0, // Skip to: 584
2262
/* 568 */     MCD_OPC_CheckPredicate, 24, 93, 10, 0, // Skip to: 3226
2263
/* 573 */     MCD_OPC_CheckField, 21, 5, 0, 86, 10, 0, // Skip to: 3226
2264
/* 580 */     MCD_OPC_Decode, 203, 12, 92, // Opcode: DVP_MMR6
2265
/* 584 */     MCD_OPC_FilterValue, 7, 77, 10, 0, // Skip to: 3226
2266
/* 589 */     MCD_OPC_CheckPredicate, 24, 72, 10, 0, // Skip to: 3226
2267
/* 594 */     MCD_OPC_CheckField, 21, 5, 0, 65, 10, 0, // Skip to: 3226
2268
/* 601 */     MCD_OPC_Decode, 226, 12, 92, // Opcode: EVP_MMR6
2269
/* 605 */     MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 619
2270
/* 610 */     MCD_OPC_CheckPredicate, 24, 51, 10, 0, // Skip to: 3226
2271
/* 615 */     MCD_OPC_Decode, 158, 18, 69, // Opcode: MTC0_MMR6
2272
/* 619 */     MCD_OPC_FilterValue, 12, 16, 0, 0, // Skip to: 640
2273
/* 624 */     MCD_OPC_CheckPredicate, 24, 37, 10, 0, // Skip to: 3226
2274
/* 629 */     MCD_OPC_CheckField, 11, 3, 1, 30, 10, 0, // Skip to: 3226
2275
/* 636 */     MCD_OPC_Decode, 133, 8, 86, // Opcode: BITSWAP_MMR6
2276
/* 640 */     MCD_OPC_FilterValue, 28, 21, 10, 0, // Skip to: 3226
2277
/* 645 */     MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
2278
/* 648 */     MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 662
2279
/* 653 */     MCD_OPC_CheckPredicate, 24, 8, 10, 0, // Skip to: 3226
2280
/* 658 */     MCD_OPC_Decode, 243, 14, 80, // Opcode: JALRC_MMR6
2281
/* 662 */     MCD_OPC_FilterValue, 3, 255, 9, 0, // Skip to: 3226
2282
/* 667 */     MCD_OPC_CheckPredicate, 24, 250, 9, 0, // Skip to: 3226
2283
/* 672 */     MCD_OPC_Decode, 242, 14, 80, // Opcode: JALRC_HB_MMR6
2284
/* 676 */     MCD_OPC_FilterValue, 1, 10, 1, 0, // Skip to: 947
2285
/* 681 */     MCD_OPC_ExtractField, 11, 3,  // Inst{13-11} ...
2286
/* 684 */     MCD_OPC_FilterValue, 0, 45, 0, 0, // Skip to: 734
2287
/* 689 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2288
/* 692 */     MCD_OPC_FilterValue, 13, 16, 0, 0, // Skip to: 713
2289
/* 697 */     MCD_OPC_CheckPredicate, 24, 220, 9, 0, // Skip to: 3226
2290
/* 702 */     MCD_OPC_CheckField, 16, 10, 0, 213, 9, 0, // Skip to: 3226
2291
/* 709 */     MCD_OPC_Decode, 236, 23, 10, // Opcode: TLBINV_MMR6
2292
/* 713 */     MCD_OPC_FilterValue, 29, 204, 9, 0, // Skip to: 3226
2293
/* 718 */     MCD_OPC_CheckPredicate, 24, 199, 9, 0, // Skip to: 3226
2294
/* 723 */     MCD_OPC_CheckField, 21, 5, 0, 192, 9, 0, // Skip to: 3226
2295
/* 730 */     MCD_OPC_Decode, 233, 11, 92, // Opcode: DI_MMR6
2296
/* 734 */     MCD_OPC_FilterValue, 1, 31, 0, 0, // Skip to: 770
2297
/* 739 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2298
/* 742 */     MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 756
2299
/* 747 */     MCD_OPC_CheckPredicate, 24, 170, 9, 0, // Skip to: 3226
2300
/* 752 */     MCD_OPC_Decode, 174, 9, 80, // Opcode: CLO_MMR6
2301
/* 756 */     MCD_OPC_FilterValue, 20, 161, 9, 0, // Skip to: 3226
2302
/* 761 */     MCD_OPC_CheckPredicate, 24, 156, 9, 0, // Skip to: 3226
2303
/* 766 */     MCD_OPC_Decode, 137, 17, 90, // Opcode: MFC2_MMR6
2304
/* 770 */     MCD_OPC_FilterValue, 2, 45, 0, 0, // Skip to: 820
2305
/* 775 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2306
/* 778 */     MCD_OPC_FilterValue, 13, 16, 0, 0, // Skip to: 799
2307
/* 783 */     MCD_OPC_CheckPredicate, 24, 134, 9, 0, // Skip to: 3226
2308
/* 788 */     MCD_OPC_CheckField, 16, 10, 0, 127, 9, 0, // Skip to: 3226
2309
/* 795 */     MCD_OPC_Decode, 234, 23, 10, // Opcode: TLBINVF_MMR6
2310
/* 799 */     MCD_OPC_FilterValue, 29, 118, 9, 0, // Skip to: 3226
2311
/* 804 */     MCD_OPC_CheckPredicate, 24, 113, 9, 0, // Skip to: 3226
2312
/* 809 */     MCD_OPC_CheckField, 21, 5, 0, 106, 9, 0, // Skip to: 3226
2313
/* 816 */     MCD_OPC_Decode, 212, 12, 92, // Opcode: EI_MMR6
2314
/* 820 */     MCD_OPC_FilterValue, 3, 16, 0, 0, // Skip to: 841
2315
/* 825 */     MCD_OPC_CheckPredicate, 24, 92, 9, 0, // Skip to: 3226
2316
/* 830 */     MCD_OPC_CheckField, 6, 5, 20, 85, 9, 0, // Skip to: 3226
2317
/* 837 */     MCD_OPC_Decode, 166, 18, 91, // Opcode: MTC2_MMR6
2318
/* 841 */     MCD_OPC_FilterValue, 4, 23, 0, 0, // Skip to: 869
2319
/* 846 */     MCD_OPC_CheckPredicate, 25, 71, 9, 0, // Skip to: 3226
2320
/* 851 */     MCD_OPC_CheckField, 21, 5, 0, 64, 9, 0, // Skip to: 3226
2321
/* 858 */     MCD_OPC_CheckField, 6, 5, 5, 57, 9, 0, // Skip to: 3226
2322
/* 865 */     MCD_OPC_Decode, 185, 14, 92, // Opcode: GINVI_MMR6
2323
/* 869 */     MCD_OPC_FilterValue, 5, 23, 0, 0, // Skip to: 897
2324
/* 874 */     MCD_OPC_CheckPredicate, 24, 43, 9, 0, // Skip to: 3226
2325
/* 879 */     MCD_OPC_CheckField, 21, 5, 0, 36, 9, 0, // Skip to: 3226
2326
/* 886 */     MCD_OPC_CheckField, 6, 5, 13, 29, 9, 0, // Skip to: 3226
2327
/* 893 */     MCD_OPC_Decode, 180, 23, 87, // Opcode: SYNC_MMR6
2328
/* 897 */     MCD_OPC_FilterValue, 6, 24, 0, 0, // Skip to: 926
2329
/* 902 */     MCD_OPC_CheckPredicate, 25, 15, 9, 0, // Skip to: 3226
2330
/* 907 */     MCD_OPC_CheckField, 21, 5, 0, 8, 9, 0, // Skip to: 3226
2331
/* 914 */     MCD_OPC_CheckField, 6, 3, 5, 1, 9, 0, // Skip to: 3226
2332
/* 921 */     MCD_OPC_Decode, 188, 14, 156, 1, // Opcode: GINVT_MMR6
2333
/* 926 */     MCD_OPC_FilterValue, 7, 247, 8, 0, // Skip to: 3226
2334
/* 931 */     MCD_OPC_CheckPredicate, 24, 242, 8, 0, // Skip to: 3226
2335
/* 936 */     MCD_OPC_CheckField, 6, 5, 12, 235, 8, 0, // Skip to: 3226
2336
/* 943 */     MCD_OPC_Decode, 171, 24, 80, // Opcode: WSBH_MMR6
2337
/* 947 */     MCD_OPC_FilterValue, 2, 45, 0, 0, // Skip to: 997
2338
/* 952 */     MCD_OPC_ExtractField, 6, 8,  // Inst{13-6} ...
2339
/* 955 */     MCD_OPC_FilterValue, 52, 9, 0, 0, // Skip to: 969
2340
/* 960 */     MCD_OPC_CheckPredicate, 24, 213, 8, 0, // Skip to: 3226
2341
/* 965 */     MCD_OPC_Decode, 147, 17, 90, // Opcode: MFHC2_MMR6
2342
/* 969 */     MCD_OPC_FilterValue, 77, 9, 0, 0, // Skip to: 983
2343
/* 974 */     MCD_OPC_CheckPredicate, 24, 199, 8, 0, // Skip to: 3226
2344
/* 979 */     MCD_OPC_Decode, 163, 24, 88, // Opcode: WAIT_MMR6
2345
/* 983 */     MCD_OPC_FilterValue, 116, 190, 8, 0, // Skip to: 3226
2346
/* 988 */     MCD_OPC_CheckPredicate, 24, 185, 8, 0, // Skip to: 3226
2347
/* 993 */     MCD_OPC_Decode, 176, 18, 91, // Opcode: MTHC2_MMR6
2348
/* 997 */     MCD_OPC_FilterValue, 3, 176, 8, 0, // Skip to: 3226
2349
/* 1002 */    MCD_OPC_ExtractField, 6, 8,  // Inst{13-6} ...
2350
/* 1005 */    MCD_OPC_FilterValue, 109, 9, 0, 0, // Skip to: 1019
2351
/* 1010 */    MCD_OPC_CheckPredicate, 24, 163, 8, 0, // Skip to: 3226
2352
/* 1015 */    MCD_OPC_Decode, 224, 20, 88, // Opcode: SDBBP_MMR6
2353
/* 1019 */    MCD_OPC_FilterValue, 133, 1, 9, 0, 0, // Skip to: 1034
2354
/* 1025 */    MCD_OPC_CheckPredicate, 24, 148, 8, 0, // Skip to: 3226
2355
/* 1030 */    MCD_OPC_Decode, 132, 20, 80, // Opcode: RDPGPR_MMR6
2356
/* 1034 */    MCD_OPC_FilterValue, 141, 1, 16, 0, 0, // Skip to: 1056
2357
/* 1040 */    MCD_OPC_CheckPredicate, 24, 133, 8, 0, // Skip to: 3226
2358
/* 1045 */    MCD_OPC_CheckField, 16, 10, 0, 126, 8, 0, // Skip to: 3226
2359
/* 1052 */    MCD_OPC_Decode, 208, 11, 10, // Opcode: DERET_MMR6
2360
/* 1056 */    MCD_OPC_FilterValue, 197, 1, 9, 0, 0, // Skip to: 1071
2361
/* 1062 */    MCD_OPC_CheckPredicate, 24, 111, 8, 0, // Skip to: 3226
2362
/* 1067 */    MCD_OPC_Decode, 167, 24, 80, // Opcode: WRPGPR_MMR6
2363
/* 1071 */    MCD_OPC_FilterValue, 205, 1, 101, 8, 0, // Skip to: 3226
2364
/* 1077 */    MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
2365
/* 1080 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1094
2366
/* 1085 */    MCD_OPC_CheckPredicate, 24, 88, 8, 0, // Skip to: 3226
2367
/* 1090 */    MCD_OPC_Decode, 221, 12, 10, // Opcode: ERET_MMR6
2368
/* 1094 */    MCD_OPC_FilterValue, 1, 79, 8, 0, // Skip to: 3226
2369
/* 1099 */    MCD_OPC_CheckPredicate, 24, 74, 8, 0, // Skip to: 3226
2370
/* 1104 */    MCD_OPC_Decode, 218, 12, 10, // Opcode: ERETNC_MMR6
2371
/* 1108 */    MCD_OPC_FilterValue, 63, 65, 8, 0, // Skip to: 3226
2372
/* 1113 */    MCD_OPC_CheckPredicate, 24, 60, 8, 0, // Skip to: 3226
2373
/* 1118 */    MCD_OPC_CheckField, 22, 4, 0, 53, 8, 0, // Skip to: 3226
2374
/* 1125 */    MCD_OPC_Decode, 209, 21, 157, 1, // Opcode: SIGRIE_MMR6
2375
/* 1130 */    MCD_OPC_FilterValue, 4, 26, 0, 0, // Skip to: 1161
2376
/* 1135 */    MCD_OPC_CheckPredicate, 24, 12, 0, 0, // Skip to: 1152
2377
/* 1140 */    MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 1152
2378
/* 1147 */    MCD_OPC_Decode, 251, 15, 158, 1, // Opcode: LUI_MMR6
2379
/* 1152 */    MCD_OPC_CheckPredicate, 24, 21, 8, 0, // Skip to: 3226
2380
/* 1157 */    MCD_OPC_Decode, 247, 6, 108, // Opcode: AUI_MMR6
2381
/* 1161 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 1176
2382
/* 1166 */    MCD_OPC_CheckPredicate, 24, 7, 8, 0, // Skip to: 3226
2383
/* 1171 */    MCD_OPC_Decode, 166, 15, 159, 1, // Opcode: LBU_MMR6
2384
/* 1176 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 1190
2385
/* 1181 */    MCD_OPC_CheckPredicate, 24, 248, 7, 0, // Skip to: 3226
2386
/* 1186 */    MCD_OPC_Decode, 203, 20, 98, // Opcode: SB_MMR6
2387
/* 1190 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 1205
2388
/* 1195 */    MCD_OPC_CheckPredicate, 24, 234, 7, 0, // Skip to: 3226
2389
/* 1200 */    MCD_OPC_Decode, 171, 15, 159, 1, // Opcode: LB_MMR6
2390
/* 1205 */    MCD_OPC_FilterValue, 8, 105, 0, 0, // Skip to: 1315
2391
/* 1210 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
2392
/* 1213 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1235
2393
/* 1218 */    MCD_OPC_CheckPredicate, 24, 211, 7, 0, // Skip to: 3226
2394
/* 1223 */    MCD_OPC_CheckField, 11, 1, 0, 204, 7, 0, // Skip to: 3226
2395
/* 1230 */    MCD_OPC_Decode, 139, 16, 160, 1, // Opcode: LWC2_MMR6
2396
/* 1235 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 1257
2397
/* 1240 */    MCD_OPC_CheckPredicate, 24, 189, 7, 0, // Skip to: 3226
2398
/* 1245 */    MCD_OPC_CheckField, 11, 1, 0, 182, 7, 0, // Skip to: 3226
2399
/* 1252 */    MCD_OPC_Decode, 186, 15, 160, 1, // Opcode: LDC2_MMR6
2400
/* 1257 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 1271
2401
/* 1262 */    MCD_OPC_CheckPredicate, 24, 167, 7, 0, // Skip to: 3226
2402
/* 1267 */    MCD_OPC_Decode, 250, 8, 100, // Opcode: CACHE_MMR6
2403
/* 1271 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 1293
2404
/* 1276 */    MCD_OPC_CheckPredicate, 24, 153, 7, 0, // Skip to: 3226
2405
/* 1281 */    MCD_OPC_CheckField, 11, 1, 0, 146, 7, 0, // Skip to: 3226
2406
/* 1288 */    MCD_OPC_Decode, 137, 23, 160, 1, // Opcode: SWC2_MMR6
2407
/* 1293 */    MCD_OPC_FilterValue, 10, 136, 7, 0, // Skip to: 3226
2408
/* 1298 */    MCD_OPC_CheckPredicate, 24, 131, 7, 0, // Skip to: 3226
2409
/* 1303 */    MCD_OPC_CheckField, 11, 1, 0, 124, 7, 0, // Skip to: 3226
2410
/* 1310 */    MCD_OPC_Decode, 233, 20, 160, 1, // Opcode: SDC2_MMR6
2411
/* 1315 */    MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 1329
2412
/* 1320 */    MCD_OPC_CheckPredicate, 24, 109, 7, 0, // Skip to: 3226
2413
/* 1325 */    MCD_OPC_Decode, 139, 6, 97, // Opcode: ADDIU_MMR6
2414
/* 1329 */    MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 1343
2415
/* 1334 */    MCD_OPC_CheckPredicate, 24, 95, 7, 0, // Skip to: 3226
2416
/* 1339 */    MCD_OPC_Decode, 205, 21, 98, // Opcode: SH_MMR6
2417
/* 1343 */    MCD_OPC_FilterValue, 16, 78, 0, 0, // Skip to: 1426
2418
/* 1348 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
2419
/* 1351 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 1366
2420
/* 1356 */    MCD_OPC_CheckPredicate, 26, 73, 7, 0, // Skip to: 3226
2421
/* 1361 */    MCD_OPC_Decode, 165, 7, 161, 1, // Opcode: BC1EQZC_MMR6
2422
/* 1366 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 1381
2423
/* 1371 */    MCD_OPC_CheckPredicate, 26, 58, 7, 0, // Skip to: 3226
2424
/* 1376 */    MCD_OPC_Decode, 170, 7, 161, 1, // Opcode: BC1NEZC_MMR6
2425
/* 1381 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1396
2426
/* 1386 */    MCD_OPC_CheckPredicate, 24, 43, 7, 0, // Skip to: 3226
2427
/* 1391 */    MCD_OPC_Decode, 175, 7, 162, 1, // Opcode: BC2EQZC_MMR6
2428
/* 1396 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 1411
2429
/* 1401 */    MCD_OPC_CheckPredicate, 24, 28, 7, 0, // Skip to: 3226
2430
/* 1406 */    MCD_OPC_Decode, 177, 7, 162, 1, // Opcode: BC2NEZC_MMR6
2431
/* 1411 */    MCD_OPC_FilterValue, 12, 18, 7, 0, // Skip to: 3226
2432
/* 1416 */    MCD_OPC_CheckPredicate, 24, 13, 7, 0, // Skip to: 3226
2433
/* 1421 */    MCD_OPC_Decode, 176, 23, 163, 1, // Opcode: SYNCI_MMR6
2434
/* 1426 */    MCD_OPC_FilterValue, 20, 9, 0, 0, // Skip to: 1440
2435
/* 1431 */    MCD_OPC_CheckPredicate, 24, 254, 6, 0, // Skip to: 3226
2436
/* 1436 */    MCD_OPC_Decode, 169, 19, 108, // Opcode: ORI_MMR6
2437
/* 1440 */    MCD_OPC_FilterValue, 21, 87, 5, 0, // Skip to: 2812
2438
/* 1445 */    MCD_OPC_ExtractField, 0, 11,  // Inst{10-0} ...
2439
/* 1448 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1463
2440
/* 1453 */    MCD_OPC_CheckPredicate, 26, 232, 6, 0, // Skip to: 3226
2441
/* 1458 */    MCD_OPC_Decode, 186, 17, 164, 1, // Opcode: MIN_S_MMR6
2442
/* 1463 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 1478
2443
/* 1468 */    MCD_OPC_CheckPredicate, 26, 217, 6, 0, // Skip to: 3226
2444
/* 1473 */    MCD_OPC_Decode, 217, 9, 165, 1, // Opcode: CMP_AF_S_MMR6
2445
/* 1478 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 1493
2446
/* 1483 */    MCD_OPC_CheckPredicate, 26, 202, 6, 0, // Skip to: 3226
2447
/* 1488 */    MCD_OPC_Decode, 250, 16, 164, 1, // Opcode: MAX_S_MMR6
2448
/* 1493 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 1508
2449
/* 1498 */    MCD_OPC_CheckPredicate, 26, 187, 6, 0, // Skip to: 3226
2450
/* 1503 */    MCD_OPC_Decode, 216, 9, 166, 1, // Opcode: CMP_AF_D_MMR6
2451
/* 1508 */    MCD_OPC_FilterValue, 32, 17, 0, 0, // Skip to: 1530
2452
/* 1513 */    MCD_OPC_CheckPredicate, 24, 172, 6, 0, // Skip to: 3226
2453
/* 1518 */    MCD_OPC_CheckField, 11, 5, 0, 165, 6, 0, // Skip to: 3226
2454
/* 1525 */    MCD_OPC_Decode, 154, 20, 167, 1, // Opcode: RINT_S_MMR6
2455
/* 1530 */    MCD_OPC_FilterValue, 35, 10, 0, 0, // Skip to: 1545
2456
/* 1535 */    MCD_OPC_CheckPredicate, 26, 150, 6, 0, // Skip to: 3226
2457
/* 1540 */    MCD_OPC_Decode, 167, 17, 164, 1, // Opcode: MINA_S_MMR6
2458
/* 1545 */    MCD_OPC_FilterValue, 43, 10, 0, 0, // Skip to: 1560
2459
/* 1550 */    MCD_OPC_CheckPredicate, 26, 135, 6, 0, // Skip to: 3226
2460
/* 1555 */    MCD_OPC_Decode, 231, 16, 164, 1, // Opcode: MAXA_S_MMR6
2461
/* 1560 */    MCD_OPC_FilterValue, 48, 10, 0, 0, // Skip to: 1575
2462
/* 1565 */    MCD_OPC_CheckPredicate, 26, 120, 6, 0, // Skip to: 3226
2463
/* 1570 */    MCD_OPC_Decode, 144, 13, 168, 1, // Opcode: FADD_S_MMR6
2464
/* 1575 */    MCD_OPC_FilterValue, 56, 10, 0, 0, // Skip to: 1590
2465
/* 1580 */    MCD_OPC_CheckPredicate, 24, 105, 6, 0, // Skip to: 3226
2466
/* 1585 */    MCD_OPC_Decode, 128, 21, 164, 1, // Opcode: SELEQZ_S_MMR6
2467
/* 1590 */    MCD_OPC_FilterValue, 59, 31, 0, 0, // Skip to: 1626
2468
/* 1595 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
2469
/* 1598 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 1612
2470
/* 1603 */    MCD_OPC_CheckPredicate, 26, 82, 6, 0, // Skip to: 3226
2471
/* 1608 */    MCD_OPC_Decode, 135, 17, 119, // Opcode: MFC1_MMR6
2472
/* 1612 */    MCD_OPC_FilterValue, 5, 73, 6, 0, // Skip to: 3226
2473
/* 1617 */    MCD_OPC_CheckPredicate, 26, 68, 6, 0, // Skip to: 3226
2474
/* 1622 */    MCD_OPC_Decode, 164, 18, 125, // Opcode: MTC1_MMR6
2475
/* 1626 */    MCD_OPC_FilterValue, 69, 10, 0, 0, // Skip to: 1641
2476
/* 1631 */    MCD_OPC_CheckPredicate, 26, 54, 6, 0, // Skip to: 3226
2477
/* 1636 */    MCD_OPC_Decode, 157, 10, 165, 1, // Opcode: CMP_UN_S_MMR6
2478
/* 1641 */    MCD_OPC_FilterValue, 85, 10, 0, 0, // Skip to: 1656
2479
/* 1646 */    MCD_OPC_CheckPredicate, 26, 39, 6, 0, // Skip to: 3226
2480
/* 1651 */    MCD_OPC_Decode, 155, 10, 166, 1, // Opcode: CMP_UN_D_MMR6
2481
/* 1656 */    MCD_OPC_FilterValue, 96, 17, 0, 0, // Skip to: 1678
2482
/* 1661 */    MCD_OPC_CheckPredicate, 24, 24, 6, 0, // Skip to: 3226
2483
/* 1666 */    MCD_OPC_CheckField, 11, 5, 0, 17, 6, 0, // Skip to: 3226
2484
/* 1673 */    MCD_OPC_Decode, 155, 9, 167, 1, // Opcode: CLASS_S_MMR6
2485
/* 1678 */    MCD_OPC_FilterValue, 112, 10, 0, 0, // Skip to: 1693
2486
/* 1683 */    MCD_OPC_CheckPredicate, 26, 2, 6, 0, // Skip to: 3226
2487
/* 1688 */    MCD_OPC_Decode, 162, 14, 168, 1, // Opcode: FSUB_S_MMR6
2488
/* 1693 */    MCD_OPC_FilterValue, 120, 10, 0, 0, // Skip to: 1708
2489
/* 1698 */    MCD_OPC_CheckPredicate, 24, 243, 5, 0, // Skip to: 3226
2490
/* 1703 */    MCD_OPC_Decode, 135, 21, 164, 1, // Opcode: SELNEZ_S_MMR6
2491
/* 1708 */    MCD_OPC_FilterValue, 123, 31, 0, 0, // Skip to: 1744
2492
/* 1713 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
2493
/* 1716 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1730
2494
/* 1721 */    MCD_OPC_CheckPredicate, 26, 220, 5, 0, // Skip to: 3226
2495
/* 1726 */    MCD_OPC_Decode, 234, 13, 124, // Opcode: FMOV_S_MMR6
2496
/* 1730 */    MCD_OPC_FilterValue, 4, 211, 5, 0, // Skip to: 3226
2497
/* 1735 */    MCD_OPC_CheckPredicate, 26, 206, 5, 0, // Skip to: 3226
2498
/* 1740 */    MCD_OPC_Decode, 231, 13, 122, // Opcode: FMOV_D_MMR6
2499
/* 1744 */    MCD_OPC_FilterValue, 133, 1, 10, 0, 0, // Skip to: 1760
2500
/* 1750 */    MCD_OPC_CheckPredicate, 26, 191, 5, 0, // Skip to: 3226
2501
/* 1755 */    MCD_OPC_Decode, 223, 9, 165, 1, // Opcode: CMP_EQ_S_MMR6
2502
/* 1760 */    MCD_OPC_FilterValue, 149, 1, 10, 0, 0, // Skip to: 1776
2503
/* 1766 */    MCD_OPC_CheckPredicate, 26, 175, 5, 0, // Skip to: 3226
2504
/* 1771 */    MCD_OPC_Decode, 219, 9, 166, 1, // Opcode: CMP_EQ_D_MMR6
2505
/* 1776 */    MCD_OPC_FilterValue, 176, 1, 10, 0, 0, // Skip to: 1792
2506
/* 1782 */    MCD_OPC_CheckPredicate, 26, 159, 5, 0, // Skip to: 3226
2507
/* 1787 */    MCD_OPC_Decode, 245, 13, 168, 1, // Opcode: FMUL_S_MMR6
2508
/* 1792 */    MCD_OPC_FilterValue, 184, 1, 10, 0, 0, // Skip to: 1808
2509
/* 1798 */    MCD_OPC_CheckPredicate, 24, 143, 5, 0, // Skip to: 3226
2510
/* 1803 */    MCD_OPC_Decode, 139, 21, 169, 1, // Opcode: SEL_S_MMR6
2511
/* 1808 */    MCD_OPC_FilterValue, 197, 1, 10, 0, 0, // Skip to: 1824
2512
/* 1814 */    MCD_OPC_CheckPredicate, 26, 127, 5, 0, // Skip to: 3226
2513
/* 1819 */    MCD_OPC_Decode, 145, 10, 165, 1, // Opcode: CMP_UEQ_S_MMR6
2514
/* 1824 */    MCD_OPC_FilterValue, 213, 1, 10, 0, 0, // Skip to: 1840
2515
/* 1830 */    MCD_OPC_CheckPredicate, 26, 111, 5, 0, // Skip to: 3226
2516
/* 1835 */    MCD_OPC_Decode, 143, 10, 166, 1, // Opcode: CMP_UEQ_D_MMR6
2517
/* 1840 */    MCD_OPC_FilterValue, 240, 1, 10, 0, 0, // Skip to: 1856
2518
/* 1846 */    MCD_OPC_CheckPredicate, 26, 95, 5, 0, // Skip to: 3226
2519
/* 1851 */    MCD_OPC_Decode, 182, 13, 168, 1, // Opcode: FDIV_S_MMR6
2520
/* 1856 */    MCD_OPC_FilterValue, 133, 2, 10, 0, 0, // Skip to: 1872
2521
/* 1862 */    MCD_OPC_CheckPredicate, 26, 79, 5, 0, // Skip to: 3226
2522
/* 1867 */    MCD_OPC_Decode, 237, 9, 165, 1, // Opcode: CMP_LT_S_MMR6
2523
/* 1872 */    MCD_OPC_FilterValue, 149, 2, 10, 0, 0, // Skip to: 1888
2524
/* 1878 */    MCD_OPC_CheckPredicate, 26, 63, 5, 0, // Skip to: 3226
2525
/* 1883 */    MCD_OPC_Decode, 233, 9, 166, 1, // Opcode: CMP_LT_D_MMR6
2526
/* 1888 */    MCD_OPC_FilterValue, 187, 2, 45, 0, 0, // Skip to: 1939
2527
/* 1894 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
2528
/* 1897 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 1911
2529
/* 1902 */    MCD_OPC_CheckPredicate, 26, 39, 5, 0, // Skip to: 3226
2530
/* 1907 */    MCD_OPC_Decode, 198, 10, 121, // Opcode: CVT_L_S_MMR6
2531
/* 1911 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 1925
2532
/* 1916 */    MCD_OPC_CheckPredicate, 26, 25, 5, 0, // Skip to: 3226
2533
/* 1921 */    MCD_OPC_Decode, 219, 10, 124, // Opcode: CVT_W_S_MMR6
2534
/* 1925 */    MCD_OPC_FilterValue, 8, 16, 5, 0, // Skip to: 3226
2535
/* 1930 */    MCD_OPC_CheckPredicate, 26, 11, 5, 0, // Skip to: 3226
2536
/* 1935 */    MCD_OPC_Decode, 195, 10, 122, // Opcode: CVT_L_D_MMR6
2537
/* 1939 */    MCD_OPC_FilterValue, 197, 2, 10, 0, 0, // Skip to: 1955
2538
/* 1945 */    MCD_OPC_CheckPredicate, 26, 252, 4, 0, // Skip to: 3226
2539
/* 1950 */    MCD_OPC_Decode, 153, 10, 165, 1, // Opcode: CMP_ULT_S_MMR6
2540
/* 1955 */    MCD_OPC_FilterValue, 213, 2, 10, 0, 0, // Skip to: 1971
2541
/* 1961 */    MCD_OPC_CheckPredicate, 26, 236, 4, 0, // Skip to: 3226
2542
/* 1966 */    MCD_OPC_Decode, 151, 10, 166, 1, // Opcode: CMP_ULT_D_MMR6
2543
/* 1971 */    MCD_OPC_FilterValue, 133, 3, 10, 0, 0, // Skip to: 1987
2544
/* 1977 */    MCD_OPC_CheckPredicate, 26, 220, 4, 0, // Skip to: 3226
2545
/* 1982 */    MCD_OPC_Decode, 231, 9, 165, 1, // Opcode: CMP_LE_S_MMR6
2546
/* 1987 */    MCD_OPC_FilterValue, 149, 3, 10, 0, 0, // Skip to: 2003
2547
/* 1993 */    MCD_OPC_CheckPredicate, 26, 204, 4, 0, // Skip to: 3226
2548
/* 1998 */    MCD_OPC_Decode, 227, 9, 166, 1, // Opcode: CMP_LE_D_MMR6
2549
/* 2003 */    MCD_OPC_FilterValue, 184, 3, 10, 0, 0, // Skip to: 2019
2550
/* 2009 */    MCD_OPC_CheckPredicate, 26, 188, 4, 0, // Skip to: 3226
2551
/* 2014 */    MCD_OPC_Decode, 199, 16, 170, 1, // Opcode: MADDF_S_MMR6
2552
/* 2019 */    MCD_OPC_FilterValue, 197, 3, 10, 0, 0, // Skip to: 2035
2553
/* 2025 */    MCD_OPC_CheckPredicate, 26, 172, 4, 0, // Skip to: 3226
2554
/* 2030 */    MCD_OPC_Decode, 149, 10, 165, 1, // Opcode: CMP_ULE_S_MMR6
2555
/* 2035 */    MCD_OPC_FilterValue, 213, 3, 10, 0, 0, // Skip to: 2051
2556
/* 2041 */    MCD_OPC_CheckPredicate, 26, 156, 4, 0, // Skip to: 3226
2557
/* 2046 */    MCD_OPC_Decode, 147, 10, 166, 1, // Opcode: CMP_ULE_D_MMR6
2558
/* 2051 */    MCD_OPC_FilterValue, 248, 3, 10, 0, 0, // Skip to: 2067
2559
/* 2057 */    MCD_OPC_CheckPredicate, 26, 140, 4, 0, // Skip to: 3226
2560
/* 2062 */    MCD_OPC_Decode, 135, 18, 170, 1, // Opcode: MSUBF_S_MMR6
2561
/* 2067 */    MCD_OPC_FilterValue, 131, 4, 10, 0, 0, // Skip to: 2083
2562
/* 2073 */    MCD_OPC_CheckPredicate, 26, 124, 4, 0, // Skip to: 3226
2563
/* 2078 */    MCD_OPC_Decode, 181, 17, 145, 1, // Opcode: MIN_D_MMR6
2564
/* 2083 */    MCD_OPC_FilterValue, 133, 4, 10, 0, 0, // Skip to: 2099
2565
/* 2089 */    MCD_OPC_CheckPredicate, 26, 108, 4, 0, // Skip to: 3226
2566
/* 2094 */    MCD_OPC_Decode, 241, 9, 165, 1, // Opcode: CMP_SAF_S_MMR6
2567
/* 2099 */    MCD_OPC_FilterValue, 139, 4, 10, 0, 0, // Skip to: 2115
2568
/* 2105 */    MCD_OPC_CheckPredicate, 26, 92, 4, 0, // Skip to: 3226
2569
/* 2110 */    MCD_OPC_Decode, 245, 16, 145, 1, // Opcode: MAX_D_MMR6
2570
/* 2115 */    MCD_OPC_FilterValue, 149, 4, 10, 0, 0, // Skip to: 2131
2571
/* 2121 */    MCD_OPC_CheckPredicate, 26, 76, 4, 0, // Skip to: 3226
2572
/* 2126 */    MCD_OPC_Decode, 239, 9, 166, 1, // Opcode: CMP_SAF_D_MMR6
2573
/* 2131 */    MCD_OPC_FilterValue, 160, 4, 17, 0, 0, // Skip to: 2154
2574
/* 2137 */    MCD_OPC_CheckPredicate, 24, 60, 4, 0, // Skip to: 3226
2575
/* 2142 */    MCD_OPC_CheckField, 11, 5, 0, 53, 4, 0, // Skip to: 3226
2576
/* 2149 */    MCD_OPC_Decode, 152, 20, 171, 1, // Opcode: RINT_D_MMR6
2577
/* 2154 */    MCD_OPC_FilterValue, 163, 4, 10, 0, 0, // Skip to: 2170
2578
/* 2160 */    MCD_OPC_CheckPredicate, 26, 37, 4, 0, // Skip to: 3226
2579
/* 2165 */    MCD_OPC_Decode, 165, 17, 145, 1, // Opcode: MINA_D_MMR6
2580
/* 2170 */    MCD_OPC_FilterValue, 171, 4, 10, 0, 0, // Skip to: 2186
2581
/* 2176 */    MCD_OPC_CheckPredicate, 26, 21, 4, 0, // Skip to: 3226
2582
/* 2181 */    MCD_OPC_Decode, 229, 16, 145, 1, // Opcode: MAXA_D_MMR6
2583
/* 2186 */    MCD_OPC_FilterValue, 184, 4, 10, 0, 0, // Skip to: 2202
2584
/* 2192 */    MCD_OPC_CheckPredicate, 24, 5, 4, 0, // Skip to: 3226
2585
/* 2197 */    MCD_OPC_Decode, 253, 20, 145, 1, // Opcode: SELEQZ_D_MMR6
2586
/* 2202 */    MCD_OPC_FilterValue, 197, 4, 10, 0, 0, // Skip to: 2218
2587
/* 2208 */    MCD_OPC_CheckPredicate, 26, 245, 3, 0, // Skip to: 3226
2588
/* 2213 */    MCD_OPC_Decode, 141, 10, 165, 1, // Opcode: CMP_SUN_S_MMR6
2589
/* 2218 */    MCD_OPC_FilterValue, 213, 4, 10, 0, 0, // Skip to: 2234
2590
/* 2224 */    MCD_OPC_CheckPredicate, 26, 229, 3, 0, // Skip to: 3226
2591
/* 2229 */    MCD_OPC_Decode, 139, 10, 166, 1, // Opcode: CMP_SUN_D_MMR6
2592
/* 2234 */    MCD_OPC_FilterValue, 224, 4, 17, 0, 0, // Skip to: 2257
2593
/* 2240 */    MCD_OPC_CheckPredicate, 24, 213, 3, 0, // Skip to: 3226
2594
/* 2245 */    MCD_OPC_CheckField, 11, 5, 0, 206, 3, 0, // Skip to: 3226
2595
/* 2252 */    MCD_OPC_Decode, 153, 9, 171, 1, // Opcode: CLASS_D_MMR6
2596
/* 2257 */    MCD_OPC_FilterValue, 248, 4, 10, 0, 0, // Skip to: 2273
2597
/* 2263 */    MCD_OPC_CheckPredicate, 24, 190, 3, 0, // Skip to: 3226
2598
/* 2268 */    MCD_OPC_Decode, 132, 21, 145, 1, // Opcode: SELNEZ_D_MMR6
2599
/* 2273 */    MCD_OPC_FilterValue, 133, 5, 10, 0, 0, // Skip to: 2289
2600
/* 2279 */    MCD_OPC_CheckPredicate, 26, 174, 3, 0, // Skip to: 3226
2601
/* 2284 */    MCD_OPC_Decode, 245, 9, 165, 1, // Opcode: CMP_SEQ_S_MMR6
2602
/* 2289 */    MCD_OPC_FilterValue, 149, 5, 10, 0, 0, // Skip to: 2305
2603
/* 2295 */    MCD_OPC_CheckPredicate, 26, 158, 3, 0, // Skip to: 3226
2604
/* 2300 */    MCD_OPC_Decode, 243, 9, 166, 1, // Opcode: CMP_SEQ_D_MMR6
2605
/* 2305 */    MCD_OPC_FilterValue, 184, 5, 10, 0, 0, // Skip to: 2321
2606
/* 2311 */    MCD_OPC_CheckPredicate, 24, 142, 3, 0, // Skip to: 3226
2607
/* 2316 */    MCD_OPC_Decode, 137, 21, 172, 1, // Opcode: SEL_D_MMR6
2608
/* 2321 */    MCD_OPC_FilterValue, 197, 5, 10, 0, 0, // Skip to: 2337
2609
/* 2327 */    MCD_OPC_CheckPredicate, 26, 126, 3, 0, // Skip to: 3226
2610
/* 2332 */    MCD_OPC_Decode, 129, 10, 165, 1, // Opcode: CMP_SUEQ_S_MMR6
2611
/* 2337 */    MCD_OPC_FilterValue, 213, 5, 10, 0, 0, // Skip to: 2353
2612
/* 2343 */    MCD_OPC_CheckPredicate, 26, 110, 3, 0, // Skip to: 3226
2613
/* 2348 */    MCD_OPC_Decode, 255, 9, 166, 1, // Opcode: CMP_SUEQ_D_MMR6
2614
/* 2353 */    MCD_OPC_FilterValue, 133, 6, 10, 0, 0, // Skip to: 2369
2615
/* 2359 */    MCD_OPC_CheckPredicate, 26, 94, 3, 0, // Skip to: 3226
2616
/* 2364 */    MCD_OPC_Decode, 253, 9, 165, 1, // Opcode: CMP_SLT_S_MMR6
2617
/* 2369 */    MCD_OPC_FilterValue, 149, 6, 10, 0, 0, // Skip to: 2385
2618
/* 2375 */    MCD_OPC_CheckPredicate, 26, 78, 3, 0, // Skip to: 3226
2619
/* 2380 */    MCD_OPC_Decode, 251, 9, 166, 1, // Opcode: CMP_SLT_D_MMR6
2620
/* 2385 */    MCD_OPC_FilterValue, 187, 6, 228, 0, 0, // Skip to: 2619
2621
/* 2391 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
2622
/* 2394 */    MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 2408
2623
/* 2399 */    MCD_OPC_CheckPredicate, 26, 54, 3, 0, // Skip to: 3226
2624
/* 2404 */    MCD_OPC_Decode, 209, 13, 121, // Opcode: FLOOR_L_S_MMR6
2625
/* 2408 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2422
2626
/* 2413 */    MCD_OPC_CheckPredicate, 26, 40, 3, 0, // Skip to: 3226
2627
/* 2418 */    MCD_OPC_Decode, 216, 13, 124, // Opcode: FLOOR_W_S_MMR6
2628
/* 2422 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2436
2629
/* 2427 */    MCD_OPC_CheckPredicate, 26, 26, 3, 0, // Skip to: 3226
2630
/* 2432 */    MCD_OPC_Decode, 128, 9, 121, // Opcode: CEIL_L_S_MMR6
2631
/* 2436 */    MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 2450
2632
/* 2441 */    MCD_OPC_CheckPredicate, 26, 12, 3, 0, // Skip to: 3226
2633
/* 2446 */    MCD_OPC_Decode, 135, 9, 124, // Opcode: CEIL_W_S_MMR6
2634
/* 2450 */    MCD_OPC_FilterValue, 4, 9, 0, 0, // Skip to: 2464
2635
/* 2455 */    MCD_OPC_CheckPredicate, 26, 254, 2, 0, // Skip to: 3226
2636
/* 2460 */    MCD_OPC_Decode, 137, 24, 121, // Opcode: TRUNC_L_S_MMR6
2637
/* 2464 */    MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 2478
2638
/* 2469 */    MCD_OPC_CheckPredicate, 26, 240, 2, 0, // Skip to: 3226
2639
/* 2474 */    MCD_OPC_Decode, 144, 24, 124, // Opcode: TRUNC_W_S_MMR6
2640
/* 2478 */    MCD_OPC_FilterValue, 6, 9, 0, 0, // Skip to: 2492
2641
/* 2483 */    MCD_OPC_CheckPredicate, 26, 226, 2, 0, // Skip to: 3226
2642
/* 2488 */    MCD_OPC_Decode, 165, 20, 121, // Opcode: ROUND_L_S_MMR6
2643
/* 2492 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 2506
2644
/* 2497 */    MCD_OPC_CheckPredicate, 26, 212, 2, 0, // Skip to: 3226
2645
/* 2502 */    MCD_OPC_Decode, 172, 20, 124, // Opcode: ROUND_W_S_MMR6
2646
/* 2506 */    MCD_OPC_FilterValue, 8, 9, 0, 0, // Skip to: 2520
2647
/* 2511 */    MCD_OPC_CheckPredicate, 26, 198, 2, 0, // Skip to: 3226
2648
/* 2516 */    MCD_OPC_Decode, 207, 13, 122, // Opcode: FLOOR_L_D_MMR6
2649
/* 2520 */    MCD_OPC_FilterValue, 9, 9, 0, 0, // Skip to: 2534
2650
/* 2525 */    MCD_OPC_CheckPredicate, 26, 184, 2, 0, // Skip to: 3226
2651
/* 2530 */    MCD_OPC_Decode, 212, 13, 126, // Opcode: FLOOR_W_D_MMR6
2652
/* 2534 */    MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 2548
2653
/* 2539 */    MCD_OPC_CheckPredicate, 26, 170, 2, 0, // Skip to: 3226
2654
/* 2544 */    MCD_OPC_Decode, 254, 8, 122, // Opcode: CEIL_L_D_MMR6
2655
/* 2548 */    MCD_OPC_FilterValue, 11, 9, 0, 0, // Skip to: 2562
2656
/* 2553 */    MCD_OPC_CheckPredicate, 26, 156, 2, 0, // Skip to: 3226
2657
/* 2558 */    MCD_OPC_Decode, 131, 9, 126, // Opcode: CEIL_W_D_MMR6
2658
/* 2562 */    MCD_OPC_FilterValue, 12, 9, 0, 0, // Skip to: 2576
2659
/* 2567 */    MCD_OPC_CheckPredicate, 26, 142, 2, 0, // Skip to: 3226
2660
/* 2572 */    MCD_OPC_Decode, 135, 24, 122, // Opcode: TRUNC_L_D_MMR6
2661
/* 2576 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 2591
2662
/* 2581 */    MCD_OPC_CheckPredicate, 26, 128, 2, 0, // Skip to: 3226
2663
/* 2586 */    MCD_OPC_Decode, 140, 24, 146, 1, // Opcode: TRUNC_W_D_MMR6
2664
/* 2591 */    MCD_OPC_FilterValue, 14, 9, 0, 0, // Skip to: 2605
2665
/* 2596 */    MCD_OPC_CheckPredicate, 26, 113, 2, 0, // Skip to: 3226
2666
/* 2601 */    MCD_OPC_Decode, 163, 20, 122, // Opcode: ROUND_L_D_MMR6
2667
/* 2605 */    MCD_OPC_FilterValue, 15, 104, 2, 0, // Skip to: 3226
2668
/* 2610 */    MCD_OPC_CheckPredicate, 26, 99, 2, 0, // Skip to: 3226
2669
/* 2615 */    MCD_OPC_Decode, 168, 20, 122, // Opcode: ROUND_W_D_MMR6
2670
/* 2619 */    MCD_OPC_FilterValue, 197, 6, 10, 0, 0, // Skip to: 2635
2671
/* 2625 */    MCD_OPC_CheckPredicate, 26, 84, 2, 0, // Skip to: 3226
2672
/* 2630 */    MCD_OPC_Decode, 137, 10, 165, 1, // Opcode: CMP_SULT_S_MMR6
2673
/* 2635 */    MCD_OPC_FilterValue, 213, 6, 10, 0, 0, // Skip to: 2651
2674
/* 2641 */    MCD_OPC_CheckPredicate, 26, 68, 2, 0, // Skip to: 3226
2675
/* 2646 */    MCD_OPC_Decode, 135, 10, 166, 1, // Opcode: CMP_SULT_D_MMR6
2676
/* 2651 */    MCD_OPC_FilterValue, 251, 6, 59, 0, 0, // Skip to: 2716
2677
/* 2657 */    MCD_OPC_ExtractField, 11, 5,  // Inst{15-11} ...
2678
/* 2660 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 2674
2679
/* 2665 */    MCD_OPC_CheckPredicate, 26, 44, 2, 0, // Skip to: 3226
2680
/* 2670 */    MCD_OPC_Decode, 253, 13, 124, // Opcode: FNEG_S_MMR6
2681
/* 2674 */    MCD_OPC_FilterValue, 7, 9, 0, 0, // Skip to: 2688
2682
/* 2679 */    MCD_OPC_CheckPredicate, 26, 30, 2, 0, // Skip to: 3226
2683
/* 2684 */    MCD_OPC_Decode, 212, 10, 124, // Opcode: CVT_S_W_MMR6
2684
/* 2688 */    MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 2702
2685
/* 2693 */    MCD_OPC_CheckPredicate, 23, 16, 2, 0, // Skip to: 3226
2686
/* 2698 */    MCD_OPC_Decode, 192, 10, 122, // Opcode: CVT_D_L_MMR6
2687
/* 2702 */    MCD_OPC_FilterValue, 11, 7, 2, 0, // Skip to: 3226
2688
/* 2707 */    MCD_OPC_CheckPredicate, 23, 2, 2, 0, // Skip to: 3226
2689
/* 2712 */    MCD_OPC_Decode, 207, 10, 121, // Opcode: CVT_S_L_MMR6
2690
/* 2716 */    MCD_OPC_FilterValue, 133, 7, 10, 0, 0, // Skip to: 2732
2691
/* 2722 */    MCD_OPC_CheckPredicate, 26, 243, 1, 0, // Skip to: 3226
2692
/* 2727 */    MCD_OPC_Decode, 249, 9, 165, 1, // Opcode: CMP_SLE_S_MMR6
2693
/* 2732 */    MCD_OPC_FilterValue, 149, 7, 10, 0, 0, // Skip to: 2748
2694
/* 2738 */    MCD_OPC_CheckPredicate, 26, 227, 1, 0, // Skip to: 3226
2695
/* 2743 */    MCD_OPC_Decode, 247, 9, 166, 1, // Opcode: CMP_SLE_D_MMR6
2696
/* 2748 */    MCD_OPC_FilterValue, 184, 7, 10, 0, 0, // Skip to: 2764
2697
/* 2754 */    MCD_OPC_CheckPredicate, 26, 211, 1, 0, // Skip to: 3226
2698
/* 2759 */    MCD_OPC_Decode, 197, 16, 172, 1, // Opcode: MADDF_D_MMR6
2699
/* 2764 */    MCD_OPC_FilterValue, 197, 7, 10, 0, 0, // Skip to: 2780
2700
/* 2770 */    MCD_OPC_CheckPredicate, 26, 195, 1, 0, // Skip to: 3226
2701
/* 2775 */    MCD_OPC_Decode, 133, 10, 165, 1, // Opcode: CMP_SULE_S_MMR6
2702
/* 2780 */    MCD_OPC_FilterValue, 213, 7, 10, 0, 0, // Skip to: 2796
2703
/* 2786 */    MCD_OPC_CheckPredicate, 26, 179, 1, 0, // Skip to: 3226
2704
/* 2791 */    MCD_OPC_Decode, 131, 10, 166, 1, // Opcode: CMP_SULE_D_MMR6
2705
/* 2796 */    MCD_OPC_FilterValue, 248, 7, 168, 1, 0, // Skip to: 3226
2706
/* 2802 */    MCD_OPC_CheckPredicate, 26, 163, 1, 0, // Skip to: 3226
2707
/* 2807 */    MCD_OPC_Decode, 133, 18, 172, 1, // Opcode: MSUBF_D_MMR6
2708
/* 2812 */    MCD_OPC_FilterValue, 24, 61, 0, 0, // Skip to: 2878
2709
/* 2817 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
2710
/* 2820 */    MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 2834
2711
/* 2825 */    MCD_OPC_CheckPredicate, 24, 140, 1, 0, // Skip to: 3226
2712
/* 2830 */    MCD_OPC_Decode, 243, 19, 100, // Opcode: PREF_MMR6
2713
/* 2834 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 2856
2714
/* 2839 */    MCD_OPC_CheckPredicate, 24, 126, 1, 0, // Skip to: 3226
2715
/* 2844 */    MCD_OPC_CheckField, 9, 3, 0, 119, 1, 0, // Skip to: 3226
2716
/* 2851 */    MCD_OPC_Decode, 244, 15, 134, 1, // Opcode: LL_MMR6
2717
/* 2856 */    MCD_OPC_FilterValue, 11, 109, 1, 0, // Skip to: 3226
2718
/* 2861 */    MCD_OPC_CheckPredicate, 24, 104, 1, 0, // Skip to: 3226
2719
/* 2866 */    MCD_OPC_CheckField, 9, 3, 0, 97, 1, 0, // Skip to: 3226
2720
/* 2873 */    MCD_OPC_Decode, 215, 20, 134, 1, // Opcode: SC_MMR6
2721
/* 2878 */    MCD_OPC_FilterValue, 28, 9, 0, 0, // Skip to: 2892
2722
/* 2883 */    MCD_OPC_CheckPredicate, 24, 82, 1, 0, // Skip to: 3226
2723
/* 2888 */    MCD_OPC_Decode, 178, 24, 108, // Opcode: XORI_MMR6
2724
/* 2892 */    MCD_OPC_FilterValue, 29, 27, 0, 0, // Skip to: 2924
2725
/* 2897 */    MCD_OPC_CheckPredicate, 24, 12, 0, 0, // Skip to: 2914
2726
/* 2902 */    MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 2914
2727
/* 2909 */    MCD_OPC_Decode, 200, 7, 173, 1, // Opcode: BEQZALC_MMR6
2728
/* 2914 */    MCD_OPC_CheckPredicate, 24, 51, 1, 0, // Skip to: 3226
2729
/* 2919 */    MCD_OPC_Decode, 193, 7, 173, 1, // Opcode: BEQC_MMR6
2730
/* 2924 */    MCD_OPC_FilterValue, 30, 71, 0, 0, // Skip to: 3000
2731
/* 2929 */    MCD_OPC_ExtractField, 19, 2,  // Inst{20-19} ...
2732
/* 2932 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2947
2733
/* 2937 */    MCD_OPC_CheckPredicate, 24, 28, 1, 0, // Skip to: 3226
2734
/* 2942 */    MCD_OPC_Decode, 131, 6, 174, 1, // Opcode: ADDIUPC_MMR6
2735
/* 2947 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2962
2736
/* 2952 */    MCD_OPC_CheckPredicate, 24, 13, 1, 0, // Skip to: 3226
2737
/* 2957 */    MCD_OPC_Decode, 159, 16, 174, 1, // Opcode: LWPC_MMR6
2738
/* 2962 */    MCD_OPC_FilterValue, 3, 3, 1, 0, // Skip to: 3226
2739
/* 2967 */    MCD_OPC_ExtractField, 16, 3,  // Inst{18-16} ...
2740
/* 2970 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 2985
2741
/* 2975 */    MCD_OPC_CheckPredicate, 24, 246, 0, 0, // Skip to: 3226
2742
/* 2980 */    MCD_OPC_Decode, 246, 6, 175, 1, // Opcode: AUIPC_MMR6
2743
/* 2985 */    MCD_OPC_FilterValue, 7, 236, 0, 0, // Skip to: 3226
2744
/* 2990 */    MCD_OPC_CheckPredicate, 24, 231, 0, 0, // Skip to: 3226
2745
/* 2995 */    MCD_OPC_Decode, 214, 6, 175, 1, // Opcode: ALUIPC_MMR6
2746
/* 3000 */    MCD_OPC_FilterValue, 31, 27, 0, 0, // Skip to: 3032
2747
/* 3005 */    MCD_OPC_CheckPredicate, 24, 12, 0, 0, // Skip to: 3022
2748
/* 3010 */    MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 3022
2749
/* 3017 */    MCD_OPC_Decode, 190, 8, 176, 1, // Opcode: BNEZALC_MMR6
2750
/* 3022 */    MCD_OPC_CheckPredicate, 24, 199, 0, 0, // Skip to: 3226
2751
/* 3027 */    MCD_OPC_Decode, 175, 8, 176, 1, // Opcode: BNEC_MMR6
2752
/* 3032 */    MCD_OPC_FilterValue, 32, 26, 0, 0, // Skip to: 3063
2753
/* 3037 */    MCD_OPC_CheckPredicate, 24, 11, 0, 0, // Skip to: 3053
2754
/* 3042 */    MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 3053
2755
/* 3049 */    MCD_OPC_Decode, 128, 15, 103, // Opcode: JIALC_MMR6
2756
/* 3053 */    MCD_OPC_CheckPredicate, 24, 168, 0, 0, // Skip to: 3226
2757
/* 3058 */    MCD_OPC_Decode, 206, 7, 177, 1, // Opcode: BEQZC_MMR6
2758
/* 3063 */    MCD_OPC_FilterValue, 37, 10, 0, 0, // Skip to: 3078
2759
/* 3068 */    MCD_OPC_CheckPredicate, 24, 153, 0, 0, // Skip to: 3226
2760
/* 3073 */    MCD_OPC_Decode, 186, 7, 178, 1, // Opcode: BC_MMR6
2761
/* 3078 */    MCD_OPC_FilterValue, 40, 26, 0, 0, // Skip to: 3109
2762
/* 3083 */    MCD_OPC_CheckPredicate, 24, 11, 0, 0, // Skip to: 3099
2763
/* 3088 */    MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 3099
2764
/* 3095 */    MCD_OPC_Decode, 131, 15, 103, // Opcode: JIC_MMR6
2765
/* 3099 */    MCD_OPC_CheckPredicate, 24, 122, 0, 0, // Skip to: 3226
2766
/* 3104 */    MCD_OPC_Decode, 196, 8, 177, 1, // Opcode: BNEZC_MMR6
2767
/* 3109 */    MCD_OPC_FilterValue, 45, 10, 0, 0, // Skip to: 3124
2768
/* 3114 */    MCD_OPC_CheckPredicate, 24, 107, 0, 0, // Skip to: 3226
2769
/* 3119 */    MCD_OPC_Decode, 150, 7, 178, 1, // Opcode: BALC_MMR6
2770
/* 3124 */    MCD_OPC_FilterValue, 48, 10, 0, 0, // Skip to: 3139
2771
/* 3129 */    MCD_OPC_CheckPredicate, 24, 92, 0, 0, // Skip to: 3226
2772
/* 3134 */    MCD_OPC_Decode, 217, 7, 179, 1, // Opcode: BGEUC_MMR6
2773
/* 3139 */    MCD_OPC_FilterValue, 52, 9, 0, 0, // Skip to: 3153
2774
/* 3144 */    MCD_OPC_CheckPredicate, 24, 77, 0, 0, // Skip to: 3226
2775
/* 3149 */    MCD_OPC_Decode, 225, 6, 108, // Opcode: ANDI_MMR6
2776
/* 3153 */    MCD_OPC_FilterValue, 53, 10, 0, 0, // Skip to: 3168
2777
/* 3158 */    MCD_OPC_CheckPredicate, 24, 63, 0, 0, // Skip to: 3226
2778
/* 3163 */    MCD_OPC_Decode, 145, 8, 180, 1, // Opcode: BLTC_MMR6
2779
/* 3168 */    MCD_OPC_FilterValue, 56, 10, 0, 0, // Skip to: 3183
2780
/* 3173 */    MCD_OPC_CheckPredicate, 24, 48, 0, 0, // Skip to: 3226
2781
/* 3178 */    MCD_OPC_Decode, 151, 8, 181, 1, // Opcode: BLTUC_MMR6
2782
/* 3183 */    MCD_OPC_FilterValue, 61, 10, 0, 0, // Skip to: 3198
2783
/* 3188 */    MCD_OPC_CheckPredicate, 24, 33, 0, 0, // Skip to: 3226
2784
/* 3193 */    MCD_OPC_Decode, 211, 7, 182, 1, // Opcode: BGEC_MMR6
2785
/* 3198 */    MCD_OPC_FilterValue, 62, 9, 0, 0, // Skip to: 3212
2786
/* 3203 */    MCD_OPC_CheckPredicate, 24, 18, 0, 0, // Skip to: 3226
2787
/* 3208 */    MCD_OPC_Decode, 170, 23, 98, // Opcode: SW_MMR6
2788
/* 3212 */    MCD_OPC_FilterValue, 63, 9, 0, 0, // Skip to: 3226
2789
/* 3217 */    MCD_OPC_CheckPredicate, 24, 4, 0, 0, // Skip to: 3226
2790
/* 3222 */    MCD_OPC_Decode, 180, 16, 98, // Opcode: LW_MMR6
2791
/* 3226 */    MCD_OPC_Fail,
2792
  0
2793
};
2794
2795
static const uint8_t DecoderTableMicroMipsR6_Ambiguous32[] = {
2796
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
2797
/* 3 */       MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 18
2798
/* 8 */       MCD_OPC_CheckPredicate, 24, 84, 0, 0, // Skip to: 97
2799
/* 13 */      MCD_OPC_Decode, 207, 8, 173, 1, // Opcode: BOVC_MMR6
2800
/* 18 */      MCD_OPC_FilterValue, 31, 10, 0, 0, // Skip to: 33
2801
/* 23 */      MCD_OPC_CheckPredicate, 24, 69, 0, 0, // Skip to: 97
2802
/* 28 */      MCD_OPC_Decode, 200, 8, 176, 1, // Opcode: BNVC_MMR6
2803
/* 33 */      MCD_OPC_FilterValue, 48, 27, 0, 0, // Skip to: 65
2804
/* 38 */      MCD_OPC_CheckPredicate, 24, 12, 0, 0, // Skip to: 55
2805
/* 43 */      MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 55
2806
/* 50 */      MCD_OPC_Decode, 137, 8, 179, 1, // Opcode: BLEZALC_MMR6
2807
/* 55 */      MCD_OPC_CheckPredicate, 24, 37, 0, 0, // Skip to: 97
2808
/* 60 */      MCD_OPC_Decode, 223, 7, 179, 1, // Opcode: BGEZALC_MMR6
2809
/* 65 */      MCD_OPC_FilterValue, 56, 27, 0, 0, // Skip to: 97
2810
/* 70 */      MCD_OPC_CheckPredicate, 24, 12, 0, 0, // Skip to: 87
2811
/* 75 */      MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 87
2812
/* 82 */      MCD_OPC_Decode, 235, 7, 181, 1, // Opcode: BGTZALC_MMR6
2813
/* 87 */      MCD_OPC_CheckPredicate, 24, 5, 0, 0, // Skip to: 97
2814
/* 92 */      MCD_OPC_Decode, 157, 8, 181, 1, // Opcode: BLTZALC_MMR6
2815
/* 97 */      MCD_OPC_Fail,
2816
  0
2817
};
2818
2819
static const uint8_t DecoderTableMips32[] = {
2820
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
2821
/* 3 */       MCD_OPC_FilterValue, 0, 101, 4, 0, // Skip to: 1133
2822
/* 8 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
2823
/* 11 */      MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 79
2824
/* 16 */      MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
2825
/* 19 */      MCD_OPC_FilterValue, 0, 178, 66, 0, // Skip to: 17098
2826
/* 24 */      MCD_OPC_ExtractField, 6, 15,  // Inst{20-6} ...
2827
/* 27 */      MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 41
2828
/* 32 */      MCD_OPC_CheckPredicate, 27, 32, 0, 0, // Skip to: 69
2829
/* 37 */      MCD_OPC_Decode, 185, 22, 10, // Opcode: SSNOP
2830
/* 41 */      MCD_OPC_FilterValue, 3, 9, 0, 0, // Skip to: 55
2831
/* 46 */      MCD_OPC_CheckPredicate, 27, 18, 0, 0, // Skip to: 69
2832
/* 51 */      MCD_OPC_Decode, 206, 12, 10, // Opcode: EHB
2833
/* 55 */      MCD_OPC_FilterValue, 5, 9, 0, 0, // Skip to: 69
2834
/* 60 */      MCD_OPC_CheckPredicate, 28, 4, 0, 0, // Skip to: 69
2835
/* 65 */      MCD_OPC_Decode, 181, 19, 10, // Opcode: PAUSE
2836
/* 69 */      MCD_OPC_CheckPredicate, 27, 128, 66, 0, // Skip to: 17098
2837
/* 74 */      MCD_OPC_Decode, 219, 21, 183, 1, // Opcode: SLL
2838
/* 79 */      MCD_OPC_FilterValue, 1, 47, 0, 0, // Skip to: 131
2839
/* 84 */      MCD_OPC_ExtractField, 16, 2,  // Inst{17-16} ...
2840
/* 87 */      MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 109
2841
/* 92 */      MCD_OPC_CheckPredicate, 29, 105, 66, 0, // Skip to: 17098
2842
/* 97 */      MCD_OPC_CheckField, 6, 5, 0, 98, 66, 0, // Skip to: 17098
2843
/* 104 */     MCD_OPC_Decode, 220, 17, 184, 1, // Opcode: MOVF_I
2844
/* 109 */     MCD_OPC_FilterValue, 1, 88, 66, 0, // Skip to: 17098
2845
/* 114 */     MCD_OPC_CheckPredicate, 29, 83, 66, 0, // Skip to: 17098
2846
/* 119 */     MCD_OPC_CheckField, 6, 5, 0, 76, 66, 0, // Skip to: 17098
2847
/* 126 */     MCD_OPC_Decode, 241, 17, 184, 1, // Opcode: MOVT_I
2848
/* 131 */     MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 169
2849
/* 136 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
2850
/* 139 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 154
2851
/* 144 */     MCD_OPC_CheckPredicate, 27, 53, 66, 0, // Skip to: 17098
2852
/* 149 */     MCD_OPC_Decode, 160, 22, 183, 1, // Opcode: SRL
2853
/* 154 */     MCD_OPC_FilterValue, 1, 43, 66, 0, // Skip to: 17098
2854
/* 159 */     MCD_OPC_CheckPredicate, 28, 38, 66, 0, // Skip to: 17098
2855
/* 164 */     MCD_OPC_Decode, 155, 20, 183, 1, // Opcode: ROTR
2856
/* 169 */     MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 191
2857
/* 174 */     MCD_OPC_CheckPredicate, 27, 23, 66, 0, // Skip to: 17098
2858
/* 179 */     MCD_OPC_CheckField, 21, 5, 0, 16, 66, 0, // Skip to: 17098
2859
/* 186 */     MCD_OPC_Decode, 138, 22, 183, 1, // Opcode: SRA
2860
/* 191 */     MCD_OPC_FilterValue, 4, 16, 0, 0, // Skip to: 212
2861
/* 196 */     MCD_OPC_CheckPredicate, 27, 1, 66, 0, // Skip to: 17098
2862
/* 201 */     MCD_OPC_CheckField, 6, 5, 0, 250, 65, 0, // Skip to: 17098
2863
/* 208 */     MCD_OPC_Decode, 229, 21, 55, // Opcode: SLLV
2864
/* 212 */     MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 234
2865
/* 217 */     MCD_OPC_CheckPredicate, 30, 236, 65, 0, // Skip to: 17098
2866
/* 222 */     MCD_OPC_CheckField, 8, 3, 0, 229, 65, 0, // Skip to: 17098
2867
/* 229 */     MCD_OPC_Decode, 247, 15, 185, 1, // Opcode: LSA
2868
/* 234 */     MCD_OPC_FilterValue, 6, 31, 0, 0, // Skip to: 270
2869
/* 239 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2870
/* 242 */     MCD_OPC_FilterValue, 0, 9, 0, 0, // Skip to: 256
2871
/* 247 */     MCD_OPC_CheckPredicate, 27, 206, 65, 0, // Skip to: 17098
2872
/* 252 */     MCD_OPC_Decode, 176, 22, 55, // Opcode: SRLV
2873
/* 256 */     MCD_OPC_FilterValue, 1, 197, 65, 0, // Skip to: 17098
2874
/* 261 */     MCD_OPC_CheckPredicate, 28, 192, 65, 0, // Skip to: 17098
2875
/* 266 */     MCD_OPC_Decode, 156, 20, 55, // Opcode: ROTRV
2876
/* 270 */     MCD_OPC_FilterValue, 7, 16, 0, 0, // Skip to: 291
2877
/* 275 */     MCD_OPC_CheckPredicate, 27, 178, 65, 0, // Skip to: 17098
2878
/* 280 */     MCD_OPC_CheckField, 6, 5, 0, 171, 65, 0, // Skip to: 17098
2879
/* 287 */     MCD_OPC_Decode, 151, 22, 55, // Opcode: SRAV
2880
/* 291 */     MCD_OPC_FilterValue, 8, 33, 0, 0, // Skip to: 329
2881
/* 296 */     MCD_OPC_ExtractField, 6, 15,  // Inst{20-6} ...
2882
/* 299 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 314
2883
/* 304 */     MCD_OPC_CheckPredicate, 31, 149, 65, 0, // Skip to: 17098
2884
/* 309 */     MCD_OPC_Decode, 132, 15, 186, 1, // Opcode: JR
2885
/* 314 */     MCD_OPC_FilterValue, 16, 139, 65, 0, // Skip to: 17098
2886
/* 319 */     MCD_OPC_CheckPredicate, 32, 134, 65, 0, // Skip to: 17098
2887
/* 324 */     MCD_OPC_Decode, 140, 15, 186, 1, // Opcode: JR_HB
2888
/* 329 */     MCD_OPC_FilterValue, 9, 45, 0, 0, // Skip to: 379
2889
/* 334 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2890
/* 337 */     MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 358
2891
/* 342 */     MCD_OPC_CheckPredicate, 33, 111, 65, 0, // Skip to: 17098
2892
/* 347 */     MCD_OPC_CheckField, 16, 5, 0, 104, 65, 0, // Skip to: 17098
2893
/* 354 */     MCD_OPC_Decode, 236, 14, 25, // Opcode: JALR
2894
/* 358 */     MCD_OPC_FilterValue, 16, 95, 65, 0, // Skip to: 17098
2895
/* 363 */     MCD_OPC_CheckPredicate, 34, 90, 65, 0, // Skip to: 17098
2896
/* 368 */     MCD_OPC_CheckField, 16, 5, 0, 83, 65, 0, // Skip to: 17098
2897
/* 375 */     MCD_OPC_Decode, 247, 14, 25, // Opcode: JALR_HB
2898
/* 379 */     MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 401
2899
/* 384 */     MCD_OPC_CheckPredicate, 35, 69, 65, 0, // Skip to: 17098
2900
/* 389 */     MCD_OPC_CheckField, 6, 5, 0, 62, 65, 0, // Skip to: 17098
2901
/* 396 */     MCD_OPC_Decode, 253, 17, 187, 1, // Opcode: MOVZ_I_I
2902
/* 401 */     MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 423
2903
/* 406 */     MCD_OPC_CheckPredicate, 35, 47, 65, 0, // Skip to: 17098
2904
/* 411 */     MCD_OPC_CheckField, 6, 5, 0, 40, 65, 0, // Skip to: 17098
2905
/* 418 */     MCD_OPC_Decode, 232, 17, 187, 1, // Opcode: MOVN_I_I
2906
/* 423 */     MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 438
2907
/* 428 */     MCD_OPC_CheckPredicate, 27, 25, 65, 0, // Skip to: 17098
2908
/* 433 */     MCD_OPC_Decode, 182, 23, 188, 1, // Opcode: SYSCALL
2909
/* 438 */     MCD_OPC_FilterValue, 13, 9, 0, 0, // Skip to: 452
2910
/* 443 */     MCD_OPC_CheckPredicate, 27, 10, 65, 0, // Skip to: 17098
2911
/* 448 */     MCD_OPC_Decode, 211, 8, 56, // Opcode: BREAK
2912
/* 452 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 467
2913
/* 457 */     MCD_OPC_CheckPredicate, 36, 252, 64, 0, // Skip to: 17098
2914
/* 462 */     MCD_OPC_Decode, 173, 23, 189, 1, // Opcode: SYNC
2915
/* 467 */     MCD_OPC_FilterValue, 16, 51, 0, 0, // Skip to: 523
2916
/* 472 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2917
/* 475 */     MCD_OPC_FilterValue, 0, 234, 64, 0, // Skip to: 17098
2918
/* 480 */     MCD_OPC_ExtractField, 16, 5,  // Inst{20-16} ...
2919
/* 483 */     MCD_OPC_FilterValue, 0, 226, 64, 0, // Skip to: 17098
2920
/* 488 */     MCD_OPC_ExtractField, 23, 3,  // Inst{25-23} ...
2921
/* 491 */     MCD_OPC_FilterValue, 0, 218, 64, 0, // Skip to: 17098
2922
/* 496 */     MCD_OPC_CheckPredicate, 31, 12, 0, 0, // Skip to: 513
2923
/* 501 */     MCD_OPC_CheckField, 21, 2, 0, 5, 0, 0, // Skip to: 513
2924
/* 508 */     MCD_OPC_Decode, 150, 17, 190, 1, // Opcode: MFHI
2925
/* 513 */     MCD_OPC_CheckPredicate, 37, 196, 64, 0, // Skip to: 17098
2926
/* 518 */     MCD_OPC_Decode, 153, 17, 191, 1, // Opcode: MFHI_DSP
2927
/* 523 */     MCD_OPC_FilterValue, 17, 43, 0, 0, // Skip to: 571
2928
/* 528 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2929
/* 531 */     MCD_OPC_FilterValue, 0, 178, 64, 0, // Skip to: 17098
2930
/* 536 */     MCD_OPC_ExtractField, 13, 8,  // Inst{20-13} ...
2931
/* 539 */     MCD_OPC_FilterValue, 0, 170, 64, 0, // Skip to: 17098
2932
/* 544 */     MCD_OPC_CheckPredicate, 31, 12, 0, 0, // Skip to: 561
2933
/* 549 */     MCD_OPC_CheckField, 11, 2, 0, 5, 0, 0, // Skip to: 561
2934
/* 556 */     MCD_OPC_Decode, 179, 18, 186, 1, // Opcode: MTHI
2935
/* 561 */     MCD_OPC_CheckPredicate, 37, 148, 64, 0, // Skip to: 17098
2936
/* 566 */     MCD_OPC_Decode, 181, 18, 192, 1, // Opcode: MTHI_DSP
2937
/* 571 */     MCD_OPC_FilterValue, 18, 51, 0, 0, // Skip to: 627
2938
/* 576 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2939
/* 579 */     MCD_OPC_FilterValue, 0, 130, 64, 0, // Skip to: 17098
2940
/* 584 */     MCD_OPC_ExtractField, 16, 5,  // Inst{20-16} ...
2941
/* 587 */     MCD_OPC_FilterValue, 0, 122, 64, 0, // Skip to: 17098
2942
/* 592 */     MCD_OPC_ExtractField, 23, 3,  // Inst{25-23} ...
2943
/* 595 */     MCD_OPC_FilterValue, 0, 114, 64, 0, // Skip to: 17098
2944
/* 600 */     MCD_OPC_CheckPredicate, 31, 12, 0, 0, // Skip to: 617
2945
/* 605 */     MCD_OPC_CheckField, 21, 2, 0, 5, 0, 0, // Skip to: 617
2946
/* 612 */     MCD_OPC_Decode, 156, 17, 190, 1, // Opcode: MFLO
2947
/* 617 */     MCD_OPC_CheckPredicate, 37, 92, 64, 0, // Skip to: 17098
2948
/* 622 */     MCD_OPC_Decode, 159, 17, 191, 1, // Opcode: MFLO_DSP
2949
/* 627 */     MCD_OPC_FilterValue, 19, 43, 0, 0, // Skip to: 675
2950
/* 632 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2951
/* 635 */     MCD_OPC_FilterValue, 0, 74, 64, 0, // Skip to: 17098
2952
/* 640 */     MCD_OPC_ExtractField, 13, 8,  // Inst{20-13} ...
2953
/* 643 */     MCD_OPC_FilterValue, 0, 66, 64, 0, // Skip to: 17098
2954
/* 648 */     MCD_OPC_CheckPredicate, 31, 12, 0, 0, // Skip to: 665
2955
/* 653 */     MCD_OPC_CheckField, 11, 2, 0, 5, 0, 0, // Skip to: 665
2956
/* 660 */     MCD_OPC_Decode, 186, 18, 186, 1, // Opcode: MTLO
2957
/* 665 */     MCD_OPC_CheckPredicate, 37, 44, 64, 0, // Skip to: 17098
2958
/* 670 */     MCD_OPC_Decode, 188, 18, 193, 1, // Opcode: MTLO_DSP
2959
/* 675 */     MCD_OPC_FilterValue, 21, 17, 0, 0, // Skip to: 697
2960
/* 680 */     MCD_OPC_CheckPredicate, 38, 29, 64, 0, // Skip to: 17098
2961
/* 685 */     MCD_OPC_CheckField, 8, 3, 0, 22, 64, 0, // Skip to: 17098
2962
/* 692 */     MCD_OPC_Decode, 235, 11, 194, 1, // Opcode: DLSA
2963
/* 697 */     MCD_OPC_FilterValue, 24, 42, 0, 0, // Skip to: 744
2964
/* 702 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2965
/* 705 */     MCD_OPC_FilterValue, 0, 4, 64, 0, // Skip to: 17098
2966
/* 710 */     MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
2967
/* 713 */     MCD_OPC_FilterValue, 0, 252, 63, 0, // Skip to: 17098
2968
/* 718 */     MCD_OPC_CheckPredicate, 31, 11, 0, 0, // Skip to: 734
2969
/* 723 */     MCD_OPC_CheckField, 11, 2, 0, 4, 0, 0, // Skip to: 734
2970
/* 730 */     MCD_OPC_Decode, 230, 18, 80, // Opcode: MULT
2971
/* 734 */     MCD_OPC_CheckPredicate, 37, 231, 63, 0, // Skip to: 17098
2972
/* 739 */     MCD_OPC_Decode, 233, 18, 195, 1, // Opcode: MULT_DSP
2973
/* 744 */     MCD_OPC_FilterValue, 25, 42, 0, 0, // Skip to: 791
2974
/* 749 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
2975
/* 752 */     MCD_OPC_FilterValue, 0, 213, 63, 0, // Skip to: 17098
2976
/* 757 */     MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
2977
/* 760 */     MCD_OPC_FilterValue, 0, 205, 63, 0, // Skip to: 17098
2978
/* 765 */     MCD_OPC_CheckPredicate, 31, 11, 0, 0, // Skip to: 781
2979
/* 770 */     MCD_OPC_CheckField, 11, 2, 0, 4, 0, 0, // Skip to: 781
2980
/* 777 */     MCD_OPC_Decode, 236, 18, 80, // Opcode: MULTu
2981
/* 781 */     MCD_OPC_CheckPredicate, 37, 184, 63, 0, // Skip to: 17098
2982
/* 786 */     MCD_OPC_Decode, 231, 18, 195, 1, // Opcode: MULTU_DSP
2983
/* 791 */     MCD_OPC_FilterValue, 26, 16, 0, 0, // Skip to: 812
2984
/* 796 */     MCD_OPC_CheckPredicate, 31, 169, 63, 0, // Skip to: 17098
2985
/* 801 */     MCD_OPC_CheckField, 6, 10, 0, 162, 63, 0, // Skip to: 17098
2986
/* 808 */     MCD_OPC_Decode, 236, 20, 80, // Opcode: SDIV
2987
/* 812 */     MCD_OPC_FilterValue, 27, 16, 0, 0, // Skip to: 833
2988
/* 817 */     MCD_OPC_CheckPredicate, 31, 148, 63, 0, // Skip to: 17098
2989
/* 822 */     MCD_OPC_CheckField, 6, 10, 0, 141, 63, 0, // Skip to: 17098
2990
/* 829 */     MCD_OPC_Decode, 152, 24, 80, // Opcode: UDIV
2991
/* 833 */     MCD_OPC_FilterValue, 32, 16, 0, 0, // Skip to: 854
2992
/* 838 */     MCD_OPC_CheckPredicate, 27, 127, 63, 0, // Skip to: 17098
2993
/* 843 */     MCD_OPC_CheckField, 6, 5, 0, 120, 63, 0, // Skip to: 17098
2994
/* 850 */     MCD_OPC_Decode, 251, 5, 61, // Opcode: ADD
2995
/* 854 */     MCD_OPC_FilterValue, 33, 16, 0, 0, // Skip to: 875
2996
/* 859 */     MCD_OPC_CheckPredicate, 27, 106, 63, 0, // Skip to: 17098
2997
/* 864 */     MCD_OPC_CheckField, 6, 5, 0, 99, 63, 0, // Skip to: 17098
2998
/* 871 */     MCD_OPC_Decode, 206, 6, 61, // Opcode: ADDu
2999
/* 875 */     MCD_OPC_FilterValue, 34, 16, 0, 0, // Skip to: 896
3000
/* 880 */     MCD_OPC_CheckPredicate, 27, 85, 63, 0, // Skip to: 17098
3001
/* 885 */     MCD_OPC_CheckField, 6, 5, 0, 78, 63, 0, // Skip to: 17098
3002
/* 892 */     MCD_OPC_Decode, 192, 22, 61, // Opcode: SUB
3003
/* 896 */     MCD_OPC_FilterValue, 35, 16, 0, 0, // Skip to: 917
3004
/* 901 */     MCD_OPC_CheckPredicate, 27, 64, 63, 0, // Skip to: 17098
3005
/* 906 */     MCD_OPC_CheckField, 6, 5, 0, 57, 63, 0, // Skip to: 17098
3006
/* 913 */     MCD_OPC_Decode, 249, 22, 61, // Opcode: SUBu
3007
/* 917 */     MCD_OPC_FilterValue, 36, 16, 0, 0, // Skip to: 938
3008
/* 922 */     MCD_OPC_CheckPredicate, 27, 43, 63, 0, // Skip to: 17098
3009
/* 927 */     MCD_OPC_CheckField, 6, 5, 0, 36, 63, 0, // Skip to: 17098
3010
/* 934 */     MCD_OPC_Decode, 216, 6, 61, // Opcode: AND
3011
/* 938 */     MCD_OPC_FilterValue, 37, 16, 0, 0, // Skip to: 959
3012
/* 943 */     MCD_OPC_CheckPredicate, 27, 22, 63, 0, // Skip to: 17098
3013
/* 948 */     MCD_OPC_CheckField, 6, 5, 0, 15, 63, 0, // Skip to: 17098
3014
/* 955 */     MCD_OPC_Decode, 163, 19, 61, // Opcode: OR
3015
/* 959 */     MCD_OPC_FilterValue, 38, 16, 0, 0, // Skip to: 980
3016
/* 964 */     MCD_OPC_CheckPredicate, 27, 1, 63, 0, // Skip to: 17098
3017
/* 969 */     MCD_OPC_CheckField, 6, 5, 0, 250, 62, 0, // Skip to: 17098
3018
/* 976 */     MCD_OPC_Decode, 172, 24, 61, // Opcode: XOR
3019
/* 980 */     MCD_OPC_FilterValue, 39, 16, 0, 0, // Skip to: 1001
3020
/* 985 */     MCD_OPC_CheckPredicate, 27, 236, 62, 0, // Skip to: 17098
3021
/* 990 */     MCD_OPC_CheckField, 6, 5, 0, 229, 62, 0, // Skip to: 17098
3022
/* 997 */     MCD_OPC_Decode, 151, 19, 61, // Opcode: NOR
3023
/* 1001 */    MCD_OPC_FilterValue, 42, 16, 0, 0, // Skip to: 1022
3024
/* 1006 */    MCD_OPC_CheckPredicate, 27, 215, 62, 0, // Skip to: 17098
3025
/* 1011 */    MCD_OPC_CheckField, 6, 5, 0, 208, 62, 0, // Skip to: 17098
3026
/* 1018 */    MCD_OPC_Decode, 239, 21, 61, // Opcode: SLT
3027
/* 1022 */    MCD_OPC_FilterValue, 43, 16, 0, 0, // Skip to: 1043
3028
/* 1027 */    MCD_OPC_CheckPredicate, 27, 194, 62, 0, // Skip to: 17098
3029
/* 1032 */    MCD_OPC_CheckField, 6, 5, 0, 187, 62, 0, // Skip to: 17098
3030
/* 1039 */    MCD_OPC_Decode, 252, 21, 61, // Opcode: SLTu
3031
/* 1043 */    MCD_OPC_FilterValue, 48, 10, 0, 0, // Skip to: 1058
3032
/* 1048 */    MCD_OPC_CheckPredicate, 36, 173, 62, 0, // Skip to: 17098
3033
/* 1053 */    MCD_OPC_Decode, 212, 23, 196, 1, // Opcode: TGE
3034
/* 1058 */    MCD_OPC_FilterValue, 49, 10, 0, 0, // Skip to: 1073
3035
/* 1063 */    MCD_OPC_CheckPredicate, 36, 158, 62, 0, // Skip to: 17098
3036
/* 1068 */    MCD_OPC_Decode, 217, 23, 196, 1, // Opcode: TGEU
3037
/* 1073 */    MCD_OPC_FilterValue, 50, 10, 0, 0, // Skip to: 1088
3038
/* 1078 */    MCD_OPC_CheckPredicate, 36, 143, 62, 0, // Skip to: 17098
3039
/* 1083 */    MCD_OPC_Decode, 250, 23, 196, 1, // Opcode: TLT
3040
/* 1088 */    MCD_OPC_FilterValue, 51, 10, 0, 0, // Skip to: 1103
3041
/* 1093 */    MCD_OPC_CheckPredicate, 36, 128, 62, 0, // Skip to: 17098
3042
/* 1098 */    MCD_OPC_Decode, 254, 23, 196, 1, // Opcode: TLTU
3043
/* 1103 */    MCD_OPC_FilterValue, 52, 10, 0, 0, // Skip to: 1118
3044
/* 1108 */    MCD_OPC_CheckPredicate, 36, 113, 62, 0, // Skip to: 17098
3045
/* 1113 */    MCD_OPC_Decode, 207, 23, 196, 1, // Opcode: TEQ
3046
/* 1118 */    MCD_OPC_FilterValue, 54, 103, 62, 0, // Skip to: 17098
3047
/* 1123 */    MCD_OPC_CheckPredicate, 36, 98, 62, 0, // Skip to: 17098
3048
/* 1128 */    MCD_OPC_Decode, 129, 24, 196, 1, // Opcode: TNE
3049
/* 1133 */    MCD_OPC_FilterValue, 1, 250, 0, 0, // Skip to: 1388
3050
/* 1138 */    MCD_OPC_ExtractField, 16, 5,  // Inst{20-16} ...
3051
/* 1141 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1156
3052
/* 1146 */    MCD_OPC_CheckPredicate, 27, 75, 62, 0, // Skip to: 17098
3053
/* 1151 */    MCD_OPC_Decode, 153, 8, 197, 1, // Opcode: BLTZ
3054
/* 1156 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 1171
3055
/* 1161 */    MCD_OPC_CheckPredicate, 27, 60, 62, 0, // Skip to: 17098
3056
/* 1166 */    MCD_OPC_Decode, 219, 7, 197, 1, // Opcode: BGEZ
3057
/* 1171 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1186
3058
/* 1176 */    MCD_OPC_CheckPredicate, 39, 45, 62, 0, // Skip to: 17098
3059
/* 1181 */    MCD_OPC_Decode, 164, 8, 197, 1, // Opcode: BLTZL
3060
/* 1186 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1201
3061
/* 1191 */    MCD_OPC_CheckPredicate, 39, 30, 62, 0, // Skip to: 17098
3062
/* 1196 */    MCD_OPC_Decode, 230, 7, 197, 1, // Opcode: BGEZL
3063
/* 1201 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 1216
3064
/* 1206 */    MCD_OPC_CheckPredicate, 39, 15, 62, 0, // Skip to: 17098
3065
/* 1211 */    MCD_OPC_Decode, 213, 23, 175, 1, // Opcode: TGEI
3066
/* 1216 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 1231
3067
/* 1221 */    MCD_OPC_CheckPredicate, 39, 0, 62, 0, // Skip to: 17098
3068
/* 1226 */    MCD_OPC_Decode, 214, 23, 175, 1, // Opcode: TGEIU
3069
/* 1231 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1246
3070
/* 1236 */    MCD_OPC_CheckPredicate, 39, 241, 61, 0, // Skip to: 17098
3071
/* 1241 */    MCD_OPC_Decode, 251, 23, 175, 1, // Opcode: TLTI
3072
/* 1246 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 1261
3073
/* 1251 */    MCD_OPC_CheckPredicate, 39, 226, 61, 0, // Skip to: 17098
3074
/* 1256 */    MCD_OPC_Decode, 145, 24, 175, 1, // Opcode: TTLTIU
3075
/* 1261 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 1276
3076
/* 1266 */    MCD_OPC_CheckPredicate, 39, 211, 61, 0, // Skip to: 17098
3077
/* 1271 */    MCD_OPC_Decode, 208, 23, 175, 1, // Opcode: TEQI
3078
/* 1276 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 1291
3079
/* 1281 */    MCD_OPC_CheckPredicate, 39, 196, 61, 0, // Skip to: 17098
3080
/* 1286 */    MCD_OPC_Decode, 130, 24, 175, 1, // Opcode: TNEI
3081
/* 1291 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 1306
3082
/* 1296 */    MCD_OPC_CheckPredicate, 31, 181, 61, 0, // Skip to: 17098
3083
/* 1301 */    MCD_OPC_Decode, 155, 8, 197, 1, // Opcode: BLTZAL
3084
/* 1306 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 1321
3085
/* 1311 */    MCD_OPC_CheckPredicate, 31, 166, 61, 0, // Skip to: 17098
3086
/* 1316 */    MCD_OPC_Decode, 221, 7, 197, 1, // Opcode: BGEZAL
3087
/* 1321 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 1336
3088
/* 1326 */    MCD_OPC_CheckPredicate, 39, 151, 61, 0, // Skip to: 17098
3089
/* 1331 */    MCD_OPC_Decode, 158, 8, 197, 1, // Opcode: BLTZALL
3090
/* 1336 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 1351
3091
/* 1341 */    MCD_OPC_CheckPredicate, 39, 136, 61, 0, // Skip to: 17098
3092
/* 1346 */    MCD_OPC_Decode, 224, 7, 197, 1, // Opcode: BGEZALL
3093
/* 1351 */    MCD_OPC_FilterValue, 28, 17, 0, 0, // Skip to: 1373
3094
/* 1356 */    MCD_OPC_CheckPredicate, 40, 121, 61, 0, // Skip to: 17098
3095
/* 1361 */    MCD_OPC_CheckField, 21, 5, 0, 114, 61, 0, // Skip to: 17098
3096
/* 1368 */    MCD_OPC_Decode, 208, 8, 198, 1, // Opcode: BPOSGE32
3097
/* 1373 */    MCD_OPC_FilterValue, 31, 104, 61, 0, // Skip to: 17098
3098
/* 1378 */    MCD_OPC_CheckPredicate, 28, 99, 61, 0, // Skip to: 17098
3099
/* 1383 */    MCD_OPC_Decode, 174, 23, 199, 1, // Opcode: SYNCI
3100
/* 1388 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1403
3101
/* 1393 */    MCD_OPC_CheckPredicate, 27, 84, 61, 0, // Skip to: 17098
3102
/* 1398 */    MCD_OPC_Decode, 234, 14, 200, 1, // Opcode: J
3103
/* 1403 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1418
3104
/* 1408 */    MCD_OPC_CheckPredicate, 27, 69, 61, 0, // Skip to: 17098
3105
/* 1413 */    MCD_OPC_Decode, 235, 14, 200, 1, // Opcode: JAL
3106
/* 1418 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 1433
3107
/* 1423 */    MCD_OPC_CheckPredicate, 27, 54, 61, 0, // Skip to: 17098
3108
/* 1428 */    MCD_OPC_Decode, 188, 7, 201, 1, // Opcode: BEQ
3109
/* 1433 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 1448
3110
/* 1438 */    MCD_OPC_CheckPredicate, 27, 39, 61, 0, // Skip to: 17098
3111
/* 1443 */    MCD_OPC_Decode, 170, 8, 201, 1, // Opcode: BNE
3112
/* 1448 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 1470
3113
/* 1453 */    MCD_OPC_CheckPredicate, 27, 24, 61, 0, // Skip to: 17098
3114
/* 1458 */    MCD_OPC_CheckField, 16, 5, 0, 17, 61, 0, // Skip to: 17098
3115
/* 1465 */    MCD_OPC_Decode, 134, 8, 197, 1, // Opcode: BLEZ
3116
/* 1470 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 1492
3117
/* 1475 */    MCD_OPC_CheckPredicate, 27, 2, 61, 0, // Skip to: 17098
3118
/* 1480 */    MCD_OPC_CheckField, 16, 5, 0, 251, 60, 0, // Skip to: 17098
3119
/* 1487 */    MCD_OPC_Decode, 232, 7, 197, 1, // Opcode: BGTZ
3120
/* 1492 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 1507
3121
/* 1497 */    MCD_OPC_CheckPredicate, 31, 236, 60, 0, // Skip to: 17098
3122
/* 1502 */    MCD_OPC_Decode, 202, 6, 202, 1, // Opcode: ADDi
3123
/* 1507 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 1522
3124
/* 1512 */    MCD_OPC_CheckPredicate, 27, 221, 60, 0, // Skip to: 17098
3125
/* 1517 */    MCD_OPC_Decode, 204, 6, 202, 1, // Opcode: ADDiu
3126
/* 1522 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1537
3127
/* 1527 */    MCD_OPC_CheckPredicate, 27, 206, 60, 0, // Skip to: 17098
3128
/* 1532 */    MCD_OPC_Decode, 246, 21, 202, 1, // Opcode: SLTi
3129
/* 1537 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 1552
3130
/* 1542 */    MCD_OPC_CheckPredicate, 27, 191, 60, 0, // Skip to: 17098
3131
/* 1547 */    MCD_OPC_Decode, 249, 21, 202, 1, // Opcode: SLTiu
3132
/* 1552 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 1567
3133
/* 1557 */    MCD_OPC_CheckPredicate, 27, 176, 60, 0, // Skip to: 17098
3134
/* 1562 */    MCD_OPC_Decode, 231, 6, 203, 1, // Opcode: ANDi
3135
/* 1567 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1582
3136
/* 1572 */    MCD_OPC_CheckPredicate, 27, 161, 60, 0, // Skip to: 17098
3137
/* 1577 */    MCD_OPC_Decode, 175, 19, 203, 1, // Opcode: ORi
3138
/* 1582 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 1597
3139
/* 1587 */    MCD_OPC_CheckPredicate, 27, 146, 60, 0, // Skip to: 17098
3140
/* 1592 */    MCD_OPC_Decode, 184, 24, 203, 1, // Opcode: XORi
3141
/* 1597 */    MCD_OPC_FilterValue, 15, 16, 0, 0, // Skip to: 1618
3142
/* 1602 */    MCD_OPC_CheckPredicate, 27, 131, 60, 0, // Skip to: 17098
3143
/* 1607 */    MCD_OPC_CheckField, 21, 5, 0, 124, 60, 0, // Skip to: 17098
3144
/* 1614 */    MCD_OPC_Decode, 128, 16, 103, // Opcode: LUi
3145
/* 1618 */    MCD_OPC_FilterValue, 16, 187, 2, 0, // Skip to: 2322
3146
/* 1623 */    MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
3147
/* 1626 */    MCD_OPC_FilterValue, 0, 190, 1, 0, // Skip to: 2077
3148
/* 1631 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
3149
/* 1634 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 1656
3150
/* 1639 */    MCD_OPC_CheckPredicate, 27, 94, 60, 0, // Skip to: 17098
3151
/* 1644 */    MCD_OPC_CheckField, 4, 7, 0, 87, 60, 0, // Skip to: 17098
3152
/* 1651 */    MCD_OPC_Decode, 128, 17, 204, 1, // Opcode: MFC0
3153
/* 1656 */    MCD_OPC_FilterValue, 3, 63, 0, 0, // Skip to: 1724
3154
/* 1661 */    MCD_OPC_ExtractField, 4, 7,  // Inst{10-4} ...
3155
/* 1664 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1679
3156
/* 1669 */    MCD_OPC_CheckPredicate, 41, 64, 60, 0, // Skip to: 17098
3157
/* 1674 */    MCD_OPC_Decode, 138, 17, 204, 1, // Opcode: MFGC0
3158
/* 1679 */    MCD_OPC_FilterValue, 32, 10, 0, 0, // Skip to: 1694
3159
/* 1684 */    MCD_OPC_CheckPredicate, 41, 49, 60, 0, // Skip to: 17098
3160
/* 1689 */    MCD_OPC_Decode, 167, 18, 205, 1, // Opcode: MTGC0
3161
/* 1694 */    MCD_OPC_FilterValue, 64, 10, 0, 0, // Skip to: 1709
3162
/* 1699 */    MCD_OPC_CheckPredicate, 41, 34, 60, 0, // Skip to: 17098
3163
/* 1704 */    MCD_OPC_Decode, 148, 17, 204, 1, // Opcode: MFHGC0
3164
/* 1709 */    MCD_OPC_FilterValue, 96, 24, 60, 0, // Skip to: 17098
3165
/* 1714 */    MCD_OPC_CheckPredicate, 41, 19, 60, 0, // Skip to: 17098
3166
/* 1719 */    MCD_OPC_Decode, 177, 18, 205, 1, // Opcode: MTHGC0
3167
/* 1724 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 1746
3168
/* 1729 */    MCD_OPC_CheckPredicate, 27, 4, 60, 0, // Skip to: 17098
3169
/* 1734 */    MCD_OPC_CheckField, 4, 7, 0, 253, 59, 0, // Skip to: 17098
3170
/* 1741 */    MCD_OPC_Decode, 156, 18, 205, 1, // Opcode: MTC0
3171
/* 1746 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 1768
3172
/* 1751 */    MCD_OPC_CheckPredicate, 42, 238, 59, 0, // Skip to: 17098
3173
/* 1756 */    MCD_OPC_CheckField, 6, 5, 0, 231, 59, 0, // Skip to: 17098
3174
/* 1763 */    MCD_OPC_Decode, 162, 17, 206, 1, // Opcode: MFTR
3175
/* 1768 */    MCD_OPC_FilterValue, 11, 133, 0, 0, // Skip to: 1906
3176
/* 1773 */    MCD_OPC_ExtractField, 4, 12,  // Inst{15-4} ...
3177
/* 1776 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1797
3178
/* 1781 */    MCD_OPC_CheckPredicate, 42, 208, 59, 0, // Skip to: 17098
3179
/* 1786 */    MCD_OPC_CheckField, 0, 3, 1, 201, 59, 0, // Skip to: 17098
3180
/* 1793 */    MCD_OPC_Decode, 201, 12, 92, // Opcode: DVPE
3181
/* 1797 */    MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 1818
3182
/* 1802 */    MCD_OPC_CheckPredicate, 42, 187, 59, 0, // Skip to: 17098
3183
/* 1807 */    MCD_OPC_CheckField, 0, 3, 1, 180, 59, 0, // Skip to: 17098
3184
/* 1814 */    MCD_OPC_Decode, 224, 12, 92, // Opcode: EVPE
3185
/* 1818 */    MCD_OPC_FilterValue, 188, 1, 16, 0, 0, // Skip to: 1840
3186
/* 1824 */    MCD_OPC_CheckPredicate, 42, 165, 59, 0, // Skip to: 17098
3187
/* 1829 */    MCD_OPC_CheckField, 0, 3, 1, 158, 59, 0, // Skip to: 17098
3188
/* 1836 */    MCD_OPC_Decode, 244, 11, 92, // Opcode: DMT
3189
/* 1840 */    MCD_OPC_FilterValue, 190, 1, 16, 0, 0, // Skip to: 1862
3190
/* 1846 */    MCD_OPC_CheckPredicate, 42, 143, 59, 0, // Skip to: 17098
3191
/* 1851 */    MCD_OPC_CheckField, 0, 3, 1, 136, 59, 0, // Skip to: 17098
3192
/* 1858 */    MCD_OPC_Decode, 214, 12, 92, // Opcode: EMT
3193
/* 1862 */    MCD_OPC_FilterValue, 128, 12, 16, 0, 0, // Skip to: 1884
3194
/* 1868 */    MCD_OPC_CheckPredicate, 28, 121, 59, 0, // Skip to: 17098
3195
/* 1873 */    MCD_OPC_CheckField, 0, 3, 0, 114, 59, 0, // Skip to: 17098
3196
/* 1880 */    MCD_OPC_Decode, 214, 11, 92, // Opcode: DI
3197
/* 1884 */    MCD_OPC_FilterValue, 130, 12, 104, 59, 0, // Skip to: 17098
3198
/* 1890 */    MCD_OPC_CheckPredicate, 28, 99, 59, 0, // Skip to: 17098
3199
/* 1895 */    MCD_OPC_CheckField, 0, 3, 0, 92, 59, 0, // Skip to: 17098
3200
/* 1902 */    MCD_OPC_Decode, 210, 12, 92, // Opcode: EI
3201
/* 1906 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 1928
3202
/* 1911 */    MCD_OPC_CheckPredicate, 42, 78, 59, 0, // Skip to: 17098
3203
/* 1916 */    MCD_OPC_CheckField, 6, 5, 0, 71, 59, 0, // Skip to: 17098
3204
/* 1923 */    MCD_OPC_Decode, 197, 18, 206, 1, // Opcode: MTTR
3205
/* 1928 */    MCD_OPC_FilterValue, 16, 61, 59, 0, // Skip to: 17098
3206
/* 1933 */    MCD_OPC_ExtractField, 0, 3,  // Inst{2-0} ...
3207
/* 1936 */    MCD_OPC_FilterValue, 0, 31, 0, 0, // Skip to: 1972
3208
/* 1941 */    MCD_OPC_ExtractField, 4, 17,  // Inst{20-4} ...
3209
/* 1944 */    MCD_OPC_FilterValue, 1, 9, 0, 0, // Skip to: 1958
3210
/* 1949 */    MCD_OPC_CheckPredicate, 41, 40, 59, 0, // Skip to: 17098
3211
/* 1954 */    MCD_OPC_Decode, 224, 23, 10, // Opcode: TLBGP
3212
/* 1958 */    MCD_OPC_FilterValue, 2, 31, 59, 0, // Skip to: 17098
3213
/* 1963 */    MCD_OPC_CheckPredicate, 43, 26, 59, 0, // Skip to: 17098
3214
/* 1968 */    MCD_OPC_Decode, 161, 24, 10, // Opcode: WAIT
3215
/* 1972 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 1993
3216
/* 1977 */    MCD_OPC_CheckPredicate, 27, 12, 59, 0, // Skip to: 17098
3217
/* 1982 */    MCD_OPC_CheckField, 4, 17, 0, 5, 59, 0, // Skip to: 17098
3218
/* 1989 */    MCD_OPC_Decode, 241, 23, 10, // Opcode: TLBR
3219
/* 1993 */    MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 2014
3220
/* 1998 */    MCD_OPC_CheckPredicate, 27, 247, 58, 0, // Skip to: 17098
3221
/* 2003 */    MCD_OPC_CheckField, 4, 17, 0, 240, 58, 0, // Skip to: 17098
3222
/* 2010 */    MCD_OPC_Decode, 244, 23, 10, // Opcode: TLBWI
3223
/* 2014 */    MCD_OPC_FilterValue, 3, 16, 0, 0, // Skip to: 2035
3224
/* 2019 */    MCD_OPC_CheckPredicate, 44, 226, 58, 0, // Skip to: 17098
3225
/* 2024 */    MCD_OPC_CheckField, 4, 17, 0, 219, 58, 0, // Skip to: 17098
3226
/* 2031 */    MCD_OPC_Decode, 232, 23, 10, // Opcode: TLBINV
3227
/* 2035 */    MCD_OPC_FilterValue, 4, 16, 0, 0, // Skip to: 2056
3228
/* 2040 */    MCD_OPC_CheckPredicate, 44, 205, 58, 0, // Skip to: 17098
3229
/* 2045 */    MCD_OPC_CheckField, 4, 17, 0, 198, 58, 0, // Skip to: 17098
3230
/* 2052 */    MCD_OPC_Decode, 233, 23, 10, // Opcode: TLBINVF
3231
/* 2056 */    MCD_OPC_FilterValue, 6, 189, 58, 0, // Skip to: 17098
3232
/* 2061 */    MCD_OPC_CheckPredicate, 27, 184, 58, 0, // Skip to: 17098
3233
/* 2066 */    MCD_OPC_CheckField, 4, 17, 0, 177, 58, 0, // Skip to: 17098
3234
/* 2073 */    MCD_OPC_Decode, 247, 23, 10, // Opcode: TLBWR
3235
/* 2077 */    MCD_OPC_FilterValue, 1, 168, 58, 0, // Skip to: 17098
3236
/* 2082 */    MCD_OPC_ExtractField, 0, 3,  // Inst{2-0} ...
3237
/* 2085 */    MCD_OPC_FilterValue, 0, 88, 0, 0, // Skip to: 2178
3238
/* 2090 */    MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
3239
/* 2093 */    MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 2116
3240
/* 2098 */    MCD_OPC_CheckPredicate, 27, 147, 58, 0, // Skip to: 17098
3241
/* 2103 */    MCD_OPC_CheckField, 6, 20, 128, 128, 32, 138, 58, 0, // Skip to: 17098
3242
/* 2112 */    MCD_OPC_Decode, 238, 23, 10, // Opcode: TLBP
3243
/* 2116 */    MCD_OPC_FilterValue, 1, 35, 0, 0, // Skip to: 2156
3244
/* 2121 */    MCD_OPC_ExtractField, 6, 20,  // Inst{25-6} ...
3245
/* 2124 */    MCD_OPC_FilterValue, 128, 128, 32, 9, 0, 0, // Skip to: 2140
3246
/* 2131 */    MCD_OPC_CheckPredicate, 43, 114, 58, 0, // Skip to: 17098
3247
/* 2136 */    MCD_OPC_Decode, 216, 12, 10, // Opcode: ERET
3248
/* 2140 */    MCD_OPC_FilterValue, 129, 128, 32, 103, 58, 0, // Skip to: 17098
3249
/* 2147 */    MCD_OPC_CheckPredicate, 45, 98, 58, 0, // Skip to: 17098
3250
/* 2152 */    MCD_OPC_Decode, 217, 12, 10, // Opcode: ERETNC
3251
/* 2156 */    MCD_OPC_FilterValue, 2, 89, 58, 0, // Skip to: 17098
3252
/* 2161 */    MCD_OPC_CheckPredicate, 41, 84, 58, 0, // Skip to: 17098
3253
/* 2166 */    MCD_OPC_CheckField, 25, 1, 1, 77, 58, 0, // Skip to: 17098
3254
/* 2173 */    MCD_OPC_Decode, 202, 14, 207, 1, // Opcode: HYPCALL
3255
/* 2178 */    MCD_OPC_FilterValue, 1, 19, 0, 0, // Skip to: 2202
3256
/* 2183 */    MCD_OPC_CheckPredicate, 41, 62, 58, 0, // Skip to: 17098
3257
/* 2188 */    MCD_OPC_CheckField, 4, 22, 128, 128, 128, 1, 52, 58, 0, // Skip to: 17098
3258
/* 2198 */    MCD_OPC_Decode, 226, 23, 10, // Opcode: TLBGR
3259
/* 2202 */    MCD_OPC_FilterValue, 2, 19, 0, 0, // Skip to: 2226
3260
/* 2207 */    MCD_OPC_CheckPredicate, 41, 38, 58, 0, // Skip to: 17098
3261
/* 2212 */    MCD_OPC_CheckField, 4, 22, 128, 128, 128, 1, 28, 58, 0, // Skip to: 17098
3262
/* 2222 */    MCD_OPC_Decode, 228, 23, 10, // Opcode: TLBGWI
3263
/* 2226 */    MCD_OPC_FilterValue, 3, 19, 0, 0, // Skip to: 2250
3264
/* 2231 */    MCD_OPC_CheckPredicate, 41, 14, 58, 0, // Skip to: 17098
3265
/* 2236 */    MCD_OPC_CheckField, 4, 22, 128, 128, 128, 1, 4, 58, 0, // Skip to: 17098
3266
/* 2246 */    MCD_OPC_Decode, 220, 23, 10, // Opcode: TLBGINV
3267
/* 2250 */    MCD_OPC_FilterValue, 4, 19, 0, 0, // Skip to: 2274
3268
/* 2255 */    MCD_OPC_CheckPredicate, 41, 246, 57, 0, // Skip to: 17098
3269
/* 2260 */    MCD_OPC_CheckField, 4, 22, 128, 128, 128, 1, 236, 57, 0, // Skip to: 17098
3270
/* 2270 */    MCD_OPC_Decode, 221, 23, 10, // Opcode: TLBGINVF
3271
/* 2274 */    MCD_OPC_FilterValue, 6, 19, 0, 0, // Skip to: 2298
3272
/* 2279 */    MCD_OPC_CheckPredicate, 41, 222, 57, 0, // Skip to: 17098
3273
/* 2284 */    MCD_OPC_CheckField, 4, 22, 128, 128, 128, 1, 212, 57, 0, // Skip to: 17098
3274
/* 2294 */    MCD_OPC_Decode, 230, 23, 10, // Opcode: TLBGWR
3275
/* 2298 */    MCD_OPC_FilterValue, 7, 203, 57, 0, // Skip to: 17098
3276
/* 2303 */    MCD_OPC_CheckPredicate, 46, 198, 57, 0, // Skip to: 17098
3277
/* 2308 */    MCD_OPC_CheckField, 4, 22, 129, 128, 128, 1, 188, 57, 0, // Skip to: 17098
3278
/* 2318 */    MCD_OPC_Decode, 206, 11, 10, // Opcode: DERET
3279
/* 2322 */    MCD_OPC_FilterValue, 17, 205, 7, 0, // Skip to: 4324
3280
/* 2327 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
3281
/* 2330 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2352
3282
/* 2335 */    MCD_OPC_CheckPredicate, 47, 166, 57, 0, // Skip to: 17098
3283
/* 2340 */    MCD_OPC_CheckField, 0, 11, 0, 159, 57, 0, // Skip to: 17098
3284
/* 2347 */    MCD_OPC_Decode, 132, 17, 208, 1, // Opcode: MFC1
3285
/* 2352 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 2374
3286
/* 2357 */    MCD_OPC_CheckPredicate, 48, 144, 57, 0, // Skip to: 17098
3287
/* 2362 */    MCD_OPC_CheckField, 0, 11, 0, 137, 57, 0, // Skip to: 17098
3288
/* 2369 */    MCD_OPC_Decode, 238, 11, 209, 1, // Opcode: DMFC1
3289
/* 2374 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 2396
3290
/* 2379 */    MCD_OPC_CheckPredicate, 47, 122, 57, 0, // Skip to: 17098
3291
/* 2384 */    MCD_OPC_CheckField, 0, 11, 0, 115, 57, 0, // Skip to: 17098
3292
/* 2391 */    MCD_OPC_Decode, 144, 9, 210, 1, // Opcode: CFC1
3293
/* 2396 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 2418
3294
/* 2401 */    MCD_OPC_CheckPredicate, 49, 100, 57, 0, // Skip to: 17098
3295
/* 2406 */    MCD_OPC_CheckField, 0, 11, 0, 93, 57, 0, // Skip to: 17098
3296
/* 2413 */    MCD_OPC_Decode, 143, 17, 211, 1, // Opcode: MFHC1_D32
3297
/* 2418 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 2440
3298
/* 2423 */    MCD_OPC_CheckPredicate, 47, 78, 57, 0, // Skip to: 17098
3299
/* 2428 */    MCD_OPC_CheckField, 0, 11, 0, 71, 57, 0, // Skip to: 17098
3300
/* 2435 */    MCD_OPC_Decode, 160, 18, 212, 1, // Opcode: MTC1
3301
/* 2440 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 2462
3302
/* 2445 */    MCD_OPC_CheckPredicate, 48, 56, 57, 0, // Skip to: 17098
3303
/* 2450 */    MCD_OPC_CheckField, 0, 11, 0, 49, 57, 0, // Skip to: 17098
3304
/* 2457 */    MCD_OPC_Decode, 246, 11, 213, 1, // Opcode: DMTC1
3305
/* 2462 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 2484
3306
/* 2467 */    MCD_OPC_CheckPredicate, 47, 34, 57, 0, // Skip to: 17098
3307
/* 2472 */    MCD_OPC_CheckField, 0, 11, 0, 27, 57, 0, // Skip to: 17098
3308
/* 2479 */    MCD_OPC_Decode, 179, 10, 214, 1, // Opcode: CTC1
3309
/* 2484 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 2506
3310
/* 2489 */    MCD_OPC_CheckPredicate, 49, 12, 57, 0, // Skip to: 17098
3311
/* 2494 */    MCD_OPC_CheckField, 0, 11, 0, 5, 57, 0, // Skip to: 17098
3312
/* 2501 */    MCD_OPC_Decode, 172, 18, 215, 1, // Opcode: MTHC1_D32
3313
/* 2506 */    MCD_OPC_FilterValue, 8, 63, 0, 0, // Skip to: 2574
3314
/* 2511 */    MCD_OPC_ExtractField, 16, 2,  // Inst{17-16} ...
3315
/* 2514 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2529
3316
/* 2519 */    MCD_OPC_CheckPredicate, 50, 238, 56, 0, // Skip to: 17098
3317
/* 2524 */    MCD_OPC_Decode, 166, 7, 216, 1, // Opcode: BC1F
3318
/* 2529 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2544
3319
/* 2534 */    MCD_OPC_CheckPredicate, 50, 223, 56, 0, // Skip to: 17098
3320
/* 2539 */    MCD_OPC_Decode, 171, 7, 216, 1, // Opcode: BC1T
3321
/* 2544 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2559
3322
/* 2549 */    MCD_OPC_CheckPredicate, 51, 208, 56, 0, // Skip to: 17098
3323
/* 2554 */    MCD_OPC_Decode, 167, 7, 216, 1, // Opcode: BC1FL
3324
/* 2559 */    MCD_OPC_FilterValue, 3, 198, 56, 0, // Skip to: 17098
3325
/* 2564 */    MCD_OPC_CheckPredicate, 51, 193, 56, 0, // Skip to: 17098
3326
/* 2569 */    MCD_OPC_Decode, 172, 7, 216, 1, // Opcode: BC1TL
3327
/* 2574 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 2589
3328
/* 2579 */    MCD_OPC_CheckPredicate, 30, 178, 56, 0, // Skip to: 17098
3329
/* 2584 */    MCD_OPC_Decode, 233, 8, 217, 1, // Opcode: BZ_V
3330
/* 2589 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 2604
3331
/* 2594 */    MCD_OPC_CheckPredicate, 30, 163, 56, 0, // Skip to: 17098
3332
/* 2599 */    MCD_OPC_Decode, 204, 8, 217, 1, // Opcode: BNZ_V
3333
/* 2604 */    MCD_OPC_FilterValue, 16, 1, 3, 0, // Skip to: 3378
3334
/* 2609 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
3335
/* 2612 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2627
3336
/* 2617 */    MCD_OPC_CheckPredicate, 47, 140, 56, 0, // Skip to: 17098
3337
/* 2622 */    MCD_OPC_Decode, 142, 13, 218, 1, // Opcode: FADD_S
3338
/* 2627 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2642
3339
/* 2632 */    MCD_OPC_CheckPredicate, 47, 125, 56, 0, // Skip to: 17098
3340
/* 2637 */    MCD_OPC_Decode, 160, 14, 218, 1, // Opcode: FSUB_S
3341
/* 2642 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2657
3342
/* 2647 */    MCD_OPC_CheckPredicate, 47, 110, 56, 0, // Skip to: 17098
3343
/* 2652 */    MCD_OPC_Decode, 243, 13, 218, 1, // Opcode: FMUL_S
3344
/* 2657 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 2672
3345
/* 2662 */    MCD_OPC_CheckPredicate, 47, 95, 56, 0, // Skip to: 17098
3346
/* 2667 */    MCD_OPC_Decode, 180, 13, 218, 1, // Opcode: FDIV_S
3347
/* 2672 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 2694
3348
/* 2677 */    MCD_OPC_CheckPredicate, 52, 80, 56, 0, // Skip to: 17098
3349
/* 2682 */    MCD_OPC_CheckField, 16, 5, 0, 73, 56, 0, // Skip to: 17098
3350
/* 2689 */    MCD_OPC_Decode, 151, 14, 219, 1, // Opcode: FSQRT_S
3351
/* 2694 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 2716
3352
/* 2699 */    MCD_OPC_CheckPredicate, 47, 58, 56, 0, // Skip to: 17098
3353
/* 2704 */    MCD_OPC_CheckField, 16, 5, 0, 51, 56, 0, // Skip to: 17098
3354
/* 2711 */    MCD_OPC_Decode, 134, 13, 219, 1, // Opcode: FABS_S
3355
/* 2716 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 2738
3356
/* 2721 */    MCD_OPC_CheckPredicate, 47, 36, 56, 0, // Skip to: 17098
3357
/* 2726 */    MCD_OPC_CheckField, 16, 5, 0, 29, 56, 0, // Skip to: 17098
3358
/* 2733 */    MCD_OPC_Decode, 232, 13, 219, 1, // Opcode: FMOV_S
3359
/* 2738 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 2760
3360
/* 2743 */    MCD_OPC_CheckPredicate, 53, 14, 56, 0, // Skip to: 17098
3361
/* 2748 */    MCD_OPC_CheckField, 16, 5, 0, 7, 56, 0, // Skip to: 17098
3362
/* 2755 */    MCD_OPC_Decode, 251, 13, 219, 1, // Opcode: FNEG_S
3363
/* 2760 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 2782
3364
/* 2765 */    MCD_OPC_CheckPredicate, 52, 248, 55, 0, // Skip to: 17098
3365
/* 2770 */    MCD_OPC_CheckField, 16, 5, 0, 241, 55, 0, // Skip to: 17098
3366
/* 2777 */    MCD_OPC_Decode, 170, 20, 219, 1, // Opcode: ROUND_W_S
3367
/* 2782 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 2804
3368
/* 2787 */    MCD_OPC_CheckPredicate, 52, 226, 55, 0, // Skip to: 17098
3369
/* 2792 */    MCD_OPC_CheckField, 16, 5, 0, 219, 55, 0, // Skip to: 17098
3370
/* 2799 */    MCD_OPC_Decode, 142, 24, 219, 1, // Opcode: TRUNC_W_S
3371
/* 2804 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 2826
3372
/* 2809 */    MCD_OPC_CheckPredicate, 52, 204, 55, 0, // Skip to: 17098
3373
/* 2814 */    MCD_OPC_CheckField, 16, 5, 0, 197, 55, 0, // Skip to: 17098
3374
/* 2821 */    MCD_OPC_Decode, 133, 9, 219, 1, // Opcode: CEIL_W_S
3375
/* 2826 */    MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 2848
3376
/* 2831 */    MCD_OPC_CheckPredicate, 52, 182, 55, 0, // Skip to: 17098
3377
/* 2836 */    MCD_OPC_CheckField, 16, 5, 0, 175, 55, 0, // Skip to: 17098
3378
/* 2843 */    MCD_OPC_Decode, 214, 13, 219, 1, // Opcode: FLOOR_W_S
3379
/* 2848 */    MCD_OPC_FilterValue, 17, 33, 0, 0, // Skip to: 2886
3380
/* 2853 */    MCD_OPC_ExtractField, 16, 2,  // Inst{17-16} ...
3381
/* 2856 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2871
3382
/* 2861 */    MCD_OPC_CheckPredicate, 29, 152, 55, 0, // Skip to: 17098
3383
/* 2866 */    MCD_OPC_Decode, 223, 17, 220, 1, // Opcode: MOVF_S
3384
/* 2871 */    MCD_OPC_FilterValue, 1, 142, 55, 0, // Skip to: 17098
3385
/* 2876 */    MCD_OPC_CheckPredicate, 29, 137, 55, 0, // Skip to: 17098
3386
/* 2881 */    MCD_OPC_Decode, 244, 17, 220, 1, // Opcode: MOVT_S
3387
/* 2886 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 2901
3388
/* 2891 */    MCD_OPC_CheckPredicate, 29, 122, 55, 0, // Skip to: 17098
3389
/* 2896 */    MCD_OPC_Decode, 128, 18, 221, 1, // Opcode: MOVZ_I_S
3390
/* 2901 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 2916
3391
/* 2906 */    MCD_OPC_CheckPredicate, 29, 107, 55, 0, // Skip to: 17098
3392
/* 2911 */    MCD_OPC_Decode, 235, 17, 221, 1, // Opcode: MOVN_I_S
3393
/* 2916 */    MCD_OPC_FilterValue, 21, 17, 0, 0, // Skip to: 2938
3394
/* 2921 */    MCD_OPC_CheckPredicate, 54, 92, 55, 0, // Skip to: 17098
3395
/* 2926 */    MCD_OPC_CheckField, 16, 5, 0, 85, 55, 0, // Skip to: 17098
3396
/* 2933 */    MCD_OPC_Decode, 138, 20, 219, 1, // Opcode: RECIP_S
3397
/* 2938 */    MCD_OPC_FilterValue, 22, 17, 0, 0, // Skip to: 2960
3398
/* 2943 */    MCD_OPC_CheckPredicate, 54, 70, 55, 0, // Skip to: 17098
3399
/* 2948 */    MCD_OPC_CheckField, 16, 5, 0, 63, 55, 0, // Skip to: 17098
3400
/* 2955 */    MCD_OPC_Decode, 177, 20, 219, 1, // Opcode: RSQRT_S
3401
/* 2960 */    MCD_OPC_FilterValue, 33, 17, 0, 0, // Skip to: 2982
3402
/* 2965 */    MCD_OPC_CheckPredicate, 55, 48, 55, 0, // Skip to: 17098
3403
/* 2970 */    MCD_OPC_CheckField, 16, 5, 0, 41, 55, 0, // Skip to: 17098
3404
/* 2977 */    MCD_OPC_Decode, 183, 10, 222, 1, // Opcode: CVT_D32_S
3405
/* 2982 */    MCD_OPC_FilterValue, 36, 17, 0, 0, // Skip to: 3004
3406
/* 2987 */    MCD_OPC_CheckPredicate, 47, 26, 55, 0, // Skip to: 17098
3407
/* 2992 */    MCD_OPC_CheckField, 16, 5, 0, 19, 55, 0, // Skip to: 17098
3408
/* 2999 */    MCD_OPC_Decode, 217, 10, 219, 1, // Opcode: CVT_W_S
3409
/* 3004 */    MCD_OPC_FilterValue, 37, 17, 0, 0, // Skip to: 3026
3410
/* 3009 */    MCD_OPC_CheckPredicate, 56, 4, 55, 0, // Skip to: 17098
3411
/* 3014 */    MCD_OPC_CheckField, 16, 5, 0, 253, 54, 0, // Skip to: 17098
3412
/* 3021 */    MCD_OPC_Decode, 196, 10, 223, 1, // Opcode: CVT_L_S
3413
/* 3026 */    MCD_OPC_FilterValue, 48, 17, 0, 0, // Skip to: 3048
3414
/* 3031 */    MCD_OPC_CheckPredicate, 50, 238, 54, 0, // Skip to: 17098
3415
/* 3036 */    MCD_OPC_CheckField, 6, 2, 0, 231, 54, 0, // Skip to: 17098
3416
/* 3043 */    MCD_OPC_Decode, 230, 10, 224, 1, // Opcode: C_F_S
3417
/* 3048 */    MCD_OPC_FilterValue, 49, 17, 0, 0, // Skip to: 3070
3418
/* 3053 */    MCD_OPC_CheckPredicate, 50, 216, 54, 0, // Skip to: 17098
3419
/* 3058 */    MCD_OPC_CheckField, 6, 2, 0, 209, 54, 0, // Skip to: 17098
3420
/* 3065 */    MCD_OPC_Decode, 186, 11, 224, 1, // Opcode: C_UN_S
3421
/* 3070 */    MCD_OPC_FilterValue, 50, 17, 0, 0, // Skip to: 3092
3422
/* 3075 */    MCD_OPC_CheckPredicate, 50, 194, 54, 0, // Skip to: 17098
3423
/* 3080 */    MCD_OPC_CheckField, 6, 2, 0, 187, 54, 0, // Skip to: 17098
3424
/* 3087 */    MCD_OPC_Decode, 224, 10, 224, 1, // Opcode: C_EQ_S
3425
/* 3092 */    MCD_OPC_FilterValue, 51, 17, 0, 0, // Skip to: 3114
3426
/* 3097 */    MCD_OPC_CheckPredicate, 50, 172, 54, 0, // Skip to: 17098
3427
/* 3102 */    MCD_OPC_CheckField, 6, 2, 0, 165, 54, 0, // Skip to: 17098
3428
/* 3109 */    MCD_OPC_Decode, 168, 11, 224, 1, // Opcode: C_UEQ_S
3429
/* 3114 */    MCD_OPC_FilterValue, 52, 17, 0, 0, // Skip to: 3136
3430
/* 3119 */    MCD_OPC_CheckPredicate, 50, 150, 54, 0, // Skip to: 17098
3431
/* 3124 */    MCD_OPC_CheckField, 6, 2, 0, 143, 54, 0, // Skip to: 17098
3432
/* 3131 */    MCD_OPC_Decode, 150, 11, 224, 1, // Opcode: C_OLT_S
3433
/* 3136 */    MCD_OPC_FilterValue, 53, 17, 0, 0, // Skip to: 3158
3434
/* 3141 */    MCD_OPC_CheckPredicate, 50, 128, 54, 0, // Skip to: 17098
3435
/* 3146 */    MCD_OPC_CheckField, 6, 2, 0, 121, 54, 0, // Skip to: 17098
3436
/* 3153 */    MCD_OPC_Decode, 180, 11, 224, 1, // Opcode: C_ULT_S
3437
/* 3158 */    MCD_OPC_FilterValue, 54, 17, 0, 0, // Skip to: 3180
3438
/* 3163 */    MCD_OPC_CheckPredicate, 50, 106, 54, 0, // Skip to: 17098
3439
/* 3168 */    MCD_OPC_CheckField, 6, 2, 0, 99, 54, 0, // Skip to: 17098
3440
/* 3175 */    MCD_OPC_Decode, 144, 11, 224, 1, // Opcode: C_OLE_S
3441
/* 3180 */    MCD_OPC_FilterValue, 55, 17, 0, 0, // Skip to: 3202
3442
/* 3185 */    MCD_OPC_CheckPredicate, 50, 84, 54, 0, // Skip to: 17098
3443
/* 3190 */    MCD_OPC_CheckField, 6, 2, 0, 77, 54, 0, // Skip to: 17098
3444
/* 3197 */    MCD_OPC_Decode, 174, 11, 224, 1, // Opcode: C_ULE_S
3445
/* 3202 */    MCD_OPC_FilterValue, 56, 17, 0, 0, // Skip to: 3224
3446
/* 3207 */    MCD_OPC_CheckPredicate, 50, 62, 54, 0, // Skip to: 17098
3447
/* 3212 */    MCD_OPC_CheckField, 6, 2, 0, 55, 54, 0, // Skip to: 17098
3448
/* 3219 */    MCD_OPC_Decode, 162, 11, 224, 1, // Opcode: C_SF_S
3449
/* 3224 */    MCD_OPC_FilterValue, 57, 17, 0, 0, // Skip to: 3246
3450
/* 3229 */    MCD_OPC_CheckPredicate, 50, 40, 54, 0, // Skip to: 17098
3451
/* 3234 */    MCD_OPC_CheckField, 6, 2, 0, 33, 54, 0, // Skip to: 17098
3452
/* 3241 */    MCD_OPC_Decode, 254, 10, 224, 1, // Opcode: C_NGLE_S
3453
/* 3246 */    MCD_OPC_FilterValue, 58, 17, 0, 0, // Skip to: 3268
3454
/* 3251 */    MCD_OPC_CheckPredicate, 50, 18, 54, 0, // Skip to: 17098
3455
/* 3256 */    MCD_OPC_CheckField, 6, 2, 0, 11, 54, 0, // Skip to: 17098
3456
/* 3263 */    MCD_OPC_Decode, 156, 11, 224, 1, // Opcode: C_SEQ_S
3457
/* 3268 */    MCD_OPC_FilterValue, 59, 17, 0, 0, // Skip to: 3290
3458
/* 3273 */    MCD_OPC_CheckPredicate, 50, 252, 53, 0, // Skip to: 17098
3459
/* 3278 */    MCD_OPC_CheckField, 6, 2, 0, 245, 53, 0, // Skip to: 17098
3460
/* 3285 */    MCD_OPC_Decode, 132, 11, 224, 1, // Opcode: C_NGL_S
3461
/* 3290 */    MCD_OPC_FilterValue, 60, 17, 0, 0, // Skip to: 3312
3462
/* 3295 */    MCD_OPC_CheckPredicate, 50, 230, 53, 0, // Skip to: 17098
3463
/* 3300 */    MCD_OPC_CheckField, 6, 2, 0, 223, 53, 0, // Skip to: 17098
3464
/* 3307 */    MCD_OPC_Decode, 242, 10, 224, 1, // Opcode: C_LT_S
3465
/* 3312 */    MCD_OPC_FilterValue, 61, 17, 0, 0, // Skip to: 3334
3466
/* 3317 */    MCD_OPC_CheckPredicate, 50, 208, 53, 0, // Skip to: 17098
3467
/* 3322 */    MCD_OPC_CheckField, 6, 2, 0, 201, 53, 0, // Skip to: 17098
3468
/* 3329 */    MCD_OPC_Decode, 248, 10, 224, 1, // Opcode: C_NGE_S
3469
/* 3334 */    MCD_OPC_FilterValue, 62, 17, 0, 0, // Skip to: 3356
3470
/* 3339 */    MCD_OPC_CheckPredicate, 50, 186, 53, 0, // Skip to: 17098
3471
/* 3344 */    MCD_OPC_CheckField, 6, 2, 0, 179, 53, 0, // Skip to: 17098
3472
/* 3351 */    MCD_OPC_Decode, 236, 10, 224, 1, // Opcode: C_LE_S
3473
/* 3356 */    MCD_OPC_FilterValue, 63, 169, 53, 0, // Skip to: 17098
3474
/* 3361 */    MCD_OPC_CheckPredicate, 50, 164, 53, 0, // Skip to: 17098
3475
/* 3366 */    MCD_OPC_CheckField, 6, 2, 0, 157, 53, 0, // Skip to: 17098
3476
/* 3373 */    MCD_OPC_Decode, 138, 11, 224, 1, // Opcode: C_NGT_S
3477
/* 3378 */    MCD_OPC_FilterValue, 17, 1, 3, 0, // Skip to: 4152
3478
/* 3383 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
3479
/* 3386 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 3401
3480
/* 3391 */    MCD_OPC_CheckPredicate, 55, 134, 53, 0, // Skip to: 17098
3481
/* 3396 */    MCD_OPC_Decode, 137, 13, 225, 1, // Opcode: FADD_D32
3482
/* 3401 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 3416
3483
/* 3406 */    MCD_OPC_CheckPredicate, 55, 119, 53, 0, // Skip to: 17098
3484
/* 3411 */    MCD_OPC_Decode, 155, 14, 225, 1, // Opcode: FSUB_D32
3485
/* 3416 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 3431
3486
/* 3421 */    MCD_OPC_CheckPredicate, 55, 104, 53, 0, // Skip to: 17098
3487
/* 3426 */    MCD_OPC_Decode, 238, 13, 225, 1, // Opcode: FMUL_D32
3488
/* 3431 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 3446
3489
/* 3436 */    MCD_OPC_CheckPredicate, 55, 89, 53, 0, // Skip to: 17098
3490
/* 3441 */    MCD_OPC_Decode, 176, 13, 225, 1, // Opcode: FDIV_D32
3491
/* 3446 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 3468
3492
/* 3451 */    MCD_OPC_CheckPredicate, 57, 74, 53, 0, // Skip to: 17098
3493
/* 3456 */    MCD_OPC_CheckField, 16, 5, 0, 67, 53, 0, // Skip to: 17098
3494
/* 3463 */    MCD_OPC_Decode, 147, 14, 226, 1, // Opcode: FSQRT_D32
3495
/* 3468 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 3490
3496
/* 3473 */    MCD_OPC_CheckPredicate, 55, 52, 53, 0, // Skip to: 17098
3497
/* 3478 */    MCD_OPC_CheckField, 16, 5, 0, 45, 53, 0, // Skip to: 17098
3498
/* 3485 */    MCD_OPC_Decode, 130, 13, 226, 1, // Opcode: FABS_D32
3499
/* 3490 */    MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 3512
3500
/* 3495 */    MCD_OPC_CheckPredicate, 55, 30, 53, 0, // Skip to: 17098
3501
/* 3500 */    MCD_OPC_CheckField, 16, 5, 0, 23, 53, 0, // Skip to: 17098
3502
/* 3507 */    MCD_OPC_Decode, 227, 13, 226, 1, // Opcode: FMOV_D32
3503
/* 3512 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 3534
3504
/* 3517 */    MCD_OPC_CheckPredicate, 55, 8, 53, 0, // Skip to: 17098
3505
/* 3522 */    MCD_OPC_CheckField, 16, 5, 0, 1, 53, 0, // Skip to: 17098
3506
/* 3529 */    MCD_OPC_Decode, 247, 13, 226, 1, // Opcode: FNEG_D32
3507
/* 3534 */    MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 3556
3508
/* 3539 */    MCD_OPC_CheckPredicate, 57, 242, 52, 0, // Skip to: 17098
3509
/* 3544 */    MCD_OPC_CheckField, 16, 5, 0, 235, 52, 0, // Skip to: 17098
3510
/* 3551 */    MCD_OPC_Decode, 166, 20, 227, 1, // Opcode: ROUND_W_D32
3511
/* 3556 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 3578
3512
/* 3561 */    MCD_OPC_CheckPredicate, 57, 220, 52, 0, // Skip to: 17098
3513
/* 3566 */    MCD_OPC_CheckField, 16, 5, 0, 213, 52, 0, // Skip to: 17098
3514
/* 3573 */    MCD_OPC_Decode, 138, 24, 227, 1, // Opcode: TRUNC_W_D32
3515
/* 3578 */    MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 3600
3516
/* 3583 */    MCD_OPC_CheckPredicate, 57, 198, 52, 0, // Skip to: 17098
3517
/* 3588 */    MCD_OPC_CheckField, 16, 5, 0, 191, 52, 0, // Skip to: 17098
3518
/* 3595 */    MCD_OPC_Decode, 129, 9, 227, 1, // Opcode: CEIL_W_D32
3519
/* 3600 */    MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 3622
3520
/* 3605 */    MCD_OPC_CheckPredicate, 57, 176, 52, 0, // Skip to: 17098
3521
/* 3610 */    MCD_OPC_CheckField, 16, 5, 0, 169, 52, 0, // Skip to: 17098
3522
/* 3617 */    MCD_OPC_Decode, 210, 13, 227, 1, // Opcode: FLOOR_W_D32
3523
/* 3622 */    MCD_OPC_FilterValue, 17, 33, 0, 0, // Skip to: 3660
3524
/* 3627 */    MCD_OPC_ExtractField, 16, 2,  // Inst{17-16} ...
3525
/* 3630 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 3645
3526
/* 3635 */    MCD_OPC_CheckPredicate, 58, 146, 52, 0, // Skip to: 17098
3527
/* 3640 */    MCD_OPC_Decode, 217, 17, 228, 1, // Opcode: MOVF_D32
3528
/* 3645 */    MCD_OPC_FilterValue, 1, 136, 52, 0, // Skip to: 17098
3529
/* 3650 */    MCD_OPC_CheckPredicate, 58, 131, 52, 0, // Skip to: 17098
3530
/* 3655 */    MCD_OPC_Decode, 238, 17, 228, 1, // Opcode: MOVT_D32
3531
/* 3660 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 3675
3532
/* 3665 */    MCD_OPC_CheckPredicate, 58, 116, 52, 0, // Skip to: 17098
3533
/* 3670 */    MCD_OPC_Decode, 250, 17, 229, 1, // Opcode: MOVZ_I_D32
3534
/* 3675 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 3690
3535
/* 3680 */    MCD_OPC_CheckPredicate, 58, 101, 52, 0, // Skip to: 17098
3536
/* 3685 */    MCD_OPC_Decode, 229, 17, 229, 1, // Opcode: MOVN_I_D32
3537
/* 3690 */    MCD_OPC_FilterValue, 21, 17, 0, 0, // Skip to: 3712
3538
/* 3695 */    MCD_OPC_CheckPredicate, 59, 86, 52, 0, // Skip to: 17098
3539
/* 3700 */    MCD_OPC_CheckField, 16, 5, 0, 79, 52, 0, // Skip to: 17098
3540
/* 3707 */    MCD_OPC_Decode, 134, 20, 226, 1, // Opcode: RECIP_D32
3541
/* 3712 */    MCD_OPC_FilterValue, 22, 17, 0, 0, // Skip to: 3734
3542
/* 3717 */    MCD_OPC_CheckPredicate, 59, 64, 52, 0, // Skip to: 17098
3543
/* 3722 */    MCD_OPC_CheckField, 16, 5, 0, 57, 52, 0, // Skip to: 17098
3544
/* 3729 */    MCD_OPC_Decode, 173, 20, 226, 1, // Opcode: RSQRT_D32
3545
/* 3734 */    MCD_OPC_FilterValue, 32, 17, 0, 0, // Skip to: 3756
3546
/* 3739 */    MCD_OPC_CheckPredicate, 55, 42, 52, 0, // Skip to: 17098
3547
/* 3744 */    MCD_OPC_CheckField, 16, 5, 0, 35, 52, 0, // Skip to: 17098
3548
/* 3751 */    MCD_OPC_Decode, 202, 10, 227, 1, // Opcode: CVT_S_D32
3549
/* 3756 */    MCD_OPC_FilterValue, 36, 17, 0, 0, // Skip to: 3778
3550
/* 3761 */    MCD_OPC_CheckPredicate, 55, 20, 52, 0, // Skip to: 17098
3551
/* 3766 */    MCD_OPC_CheckField, 16, 5, 0, 13, 52, 0, // Skip to: 17098
3552
/* 3773 */    MCD_OPC_Decode, 213, 10, 227, 1, // Opcode: CVT_W_D32
3553
/* 3778 */    MCD_OPC_FilterValue, 37, 17, 0, 0, // Skip to: 3800
3554
/* 3783 */    MCD_OPC_CheckPredicate, 56, 254, 51, 0, // Skip to: 17098
3555
/* 3788 */    MCD_OPC_CheckField, 16, 5, 0, 247, 51, 0, // Skip to: 17098
3556
/* 3795 */    MCD_OPC_Decode, 193, 10, 230, 1, // Opcode: CVT_L_D64
3557
/* 3800 */    MCD_OPC_FilterValue, 48, 17, 0, 0, // Skip to: 3822
3558
/* 3805 */    MCD_OPC_CheckPredicate, 60, 232, 51, 0, // Skip to: 17098
3559
/* 3810 */    MCD_OPC_CheckField, 6, 2, 0, 225, 51, 0, // Skip to: 17098
3560
/* 3817 */    MCD_OPC_Decode, 226, 10, 231, 1, // Opcode: C_F_D32
3561
/* 3822 */    MCD_OPC_FilterValue, 49, 17, 0, 0, // Skip to: 3844
3562
/* 3827 */    MCD_OPC_CheckPredicate, 60, 210, 51, 0, // Skip to: 17098
3563
/* 3832 */    MCD_OPC_CheckField, 6, 2, 0, 203, 51, 0, // Skip to: 17098
3564
/* 3839 */    MCD_OPC_Decode, 182, 11, 231, 1, // Opcode: C_UN_D32
3565
/* 3844 */    MCD_OPC_FilterValue, 50, 17, 0, 0, // Skip to: 3866
3566
/* 3849 */    MCD_OPC_CheckPredicate, 60, 188, 51, 0, // Skip to: 17098
3567
/* 3854 */    MCD_OPC_CheckField, 6, 2, 0, 181, 51, 0, // Skip to: 17098
3568
/* 3861 */    MCD_OPC_Decode, 220, 10, 231, 1, // Opcode: C_EQ_D32
3569
/* 3866 */    MCD_OPC_FilterValue, 51, 17, 0, 0, // Skip to: 3888
3570
/* 3871 */    MCD_OPC_CheckPredicate, 60, 166, 51, 0, // Skip to: 17098
3571
/* 3876 */    MCD_OPC_CheckField, 6, 2, 0, 159, 51, 0, // Skip to: 17098
3572
/* 3883 */    MCD_OPC_Decode, 164, 11, 231, 1, // Opcode: C_UEQ_D32
3573
/* 3888 */    MCD_OPC_FilterValue, 52, 17, 0, 0, // Skip to: 3910
3574
/* 3893 */    MCD_OPC_CheckPredicate, 60, 144, 51, 0, // Skip to: 17098
3575
/* 3898 */    MCD_OPC_CheckField, 6, 2, 0, 137, 51, 0, // Skip to: 17098
3576
/* 3905 */    MCD_OPC_Decode, 146, 11, 231, 1, // Opcode: C_OLT_D32
3577
/* 3910 */    MCD_OPC_FilterValue, 53, 17, 0, 0, // Skip to: 3932
3578
/* 3915 */    MCD_OPC_CheckPredicate, 60, 122, 51, 0, // Skip to: 17098
3579
/* 3920 */    MCD_OPC_CheckField, 6, 2, 0, 115, 51, 0, // Skip to: 17098
3580
/* 3927 */    MCD_OPC_Decode, 176, 11, 231, 1, // Opcode: C_ULT_D32
3581
/* 3932 */    MCD_OPC_FilterValue, 54, 17, 0, 0, // Skip to: 3954
3582
/* 3937 */    MCD_OPC_CheckPredicate, 60, 100, 51, 0, // Skip to: 17098
3583
/* 3942 */    MCD_OPC_CheckField, 6, 2, 0, 93, 51, 0, // Skip to: 17098
3584
/* 3949 */    MCD_OPC_Decode, 140, 11, 231, 1, // Opcode: C_OLE_D32
3585
/* 3954 */    MCD_OPC_FilterValue, 55, 17, 0, 0, // Skip to: 3976
3586
/* 3959 */    MCD_OPC_CheckPredicate, 60, 78, 51, 0, // Skip to: 17098
3587
/* 3964 */    MCD_OPC_CheckField, 6, 2, 0, 71, 51, 0, // Skip to: 17098
3588
/* 3971 */    MCD_OPC_Decode, 170, 11, 231, 1, // Opcode: C_ULE_D32
3589
/* 3976 */    MCD_OPC_FilterValue, 56, 17, 0, 0, // Skip to: 3998
3590
/* 3981 */    MCD_OPC_CheckPredicate, 60, 56, 51, 0, // Skip to: 17098
3591
/* 3986 */    MCD_OPC_CheckField, 6, 2, 0, 49, 51, 0, // Skip to: 17098
3592
/* 3993 */    MCD_OPC_Decode, 158, 11, 231, 1, // Opcode: C_SF_D32
3593
/* 3998 */    MCD_OPC_FilterValue, 57, 17, 0, 0, // Skip to: 4020
3594
/* 4003 */    MCD_OPC_CheckPredicate, 60, 34, 51, 0, // Skip to: 17098
3595
/* 4008 */    MCD_OPC_CheckField, 6, 2, 0, 27, 51, 0, // Skip to: 17098
3596
/* 4015 */    MCD_OPC_Decode, 250, 10, 231, 1, // Opcode: C_NGLE_D32
3597
/* 4020 */    MCD_OPC_FilterValue, 58, 17, 0, 0, // Skip to: 4042
3598
/* 4025 */    MCD_OPC_CheckPredicate, 60, 12, 51, 0, // Skip to: 17098
3599
/* 4030 */    MCD_OPC_CheckField, 6, 2, 0, 5, 51, 0, // Skip to: 17098
3600
/* 4037 */    MCD_OPC_Decode, 152, 11, 231, 1, // Opcode: C_SEQ_D32
3601
/* 4042 */    MCD_OPC_FilterValue, 59, 17, 0, 0, // Skip to: 4064
3602
/* 4047 */    MCD_OPC_CheckPredicate, 60, 246, 50, 0, // Skip to: 17098
3603
/* 4052 */    MCD_OPC_CheckField, 6, 2, 0, 239, 50, 0, // Skip to: 17098
3604
/* 4059 */    MCD_OPC_Decode, 128, 11, 231, 1, // Opcode: C_NGL_D32
3605
/* 4064 */    MCD_OPC_FilterValue, 60, 17, 0, 0, // Skip to: 4086
3606
/* 4069 */    MCD_OPC_CheckPredicate, 60, 224, 50, 0, // Skip to: 17098
3607
/* 4074 */    MCD_OPC_CheckField, 6, 2, 0, 217, 50, 0, // Skip to: 17098
3608
/* 4081 */    MCD_OPC_Decode, 238, 10, 231, 1, // Opcode: C_LT_D32
3609
/* 4086 */    MCD_OPC_FilterValue, 61, 17, 0, 0, // Skip to: 4108
3610
/* 4091 */    MCD_OPC_CheckPredicate, 60, 202, 50, 0, // Skip to: 17098
3611
/* 4096 */    MCD_OPC_CheckField, 6, 2, 0, 195, 50, 0, // Skip to: 17098
3612
/* 4103 */    MCD_OPC_Decode, 244, 10, 231, 1, // Opcode: C_NGE_D32
3613
/* 4108 */    MCD_OPC_FilterValue, 62, 17, 0, 0, // Skip to: 4130
3614
/* 4113 */    MCD_OPC_CheckPredicate, 60, 180, 50, 0, // Skip to: 17098
3615
/* 4118 */    MCD_OPC_CheckField, 6, 2, 0, 173, 50, 0, // Skip to: 17098
3616
/* 4125 */    MCD_OPC_Decode, 232, 10, 231, 1, // Opcode: C_LE_D32
3617
/* 4130 */    MCD_OPC_FilterValue, 63, 163, 50, 0, // Skip to: 17098
3618
/* 4135 */    MCD_OPC_CheckPredicate, 60, 158, 50, 0, // Skip to: 17098
3619
/* 4140 */    MCD_OPC_CheckField, 6, 2, 0, 151, 50, 0, // Skip to: 17098
3620
/* 4147 */    MCD_OPC_Decode, 134, 11, 231, 1, // Opcode: C_NGT_D32
3621
/* 4152 */    MCD_OPC_FilterValue, 20, 47, 0, 0, // Skip to: 4204
3622
/* 4157 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
3623
/* 4160 */    MCD_OPC_FilterValue, 32, 17, 0, 0, // Skip to: 4182
3624
/* 4165 */    MCD_OPC_CheckPredicate, 47, 128, 50, 0, // Skip to: 17098
3625
/* 4170 */    MCD_OPC_CheckField, 16, 5, 0, 121, 50, 0, // Skip to: 17098
3626
/* 4177 */    MCD_OPC_Decode, 210, 10, 219, 1, // Opcode: CVT_S_W
3627
/* 4182 */    MCD_OPC_FilterValue, 33, 111, 50, 0, // Skip to: 17098
3628
/* 4187 */    MCD_OPC_CheckPredicate, 55, 106, 50, 0, // Skip to: 17098
3629
/* 4192 */    MCD_OPC_CheckField, 16, 5, 0, 99, 50, 0, // Skip to: 17098
3630
/* 4199 */    MCD_OPC_Decode, 185, 10, 222, 1, // Opcode: CVT_D32_W
3631
/* 4204 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 4219
3632
/* 4209 */    MCD_OPC_CheckPredicate, 30, 84, 50, 0, // Skip to: 17098
3633
/* 4214 */    MCD_OPC_Decode, 230, 8, 217, 1, // Opcode: BZ_B
3634
/* 4219 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 4234
3635
/* 4224 */    MCD_OPC_CheckPredicate, 30, 69, 50, 0, // Skip to: 17098
3636
/* 4229 */    MCD_OPC_Decode, 232, 8, 232, 1, // Opcode: BZ_H
3637
/* 4234 */    MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 4249
3638
/* 4239 */    MCD_OPC_CheckPredicate, 30, 54, 50, 0, // Skip to: 17098
3639
/* 4244 */    MCD_OPC_Decode, 234, 8, 233, 1, // Opcode: BZ_W
3640
/* 4249 */    MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 4264
3641
/* 4254 */    MCD_OPC_CheckPredicate, 30, 39, 50, 0, // Skip to: 17098
3642
/* 4259 */    MCD_OPC_Decode, 231, 8, 234, 1, // Opcode: BZ_D
3643
/* 4264 */    MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 4279
3644
/* 4269 */    MCD_OPC_CheckPredicate, 30, 24, 50, 0, // Skip to: 17098
3645
/* 4274 */    MCD_OPC_Decode, 201, 8, 217, 1, // Opcode: BNZ_B
3646
/* 4279 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 4294
3647
/* 4284 */    MCD_OPC_CheckPredicate, 30, 9, 50, 0, // Skip to: 17098
3648
/* 4289 */    MCD_OPC_Decode, 203, 8, 232, 1, // Opcode: BNZ_H
3649
/* 4294 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 4309
3650
/* 4299 */    MCD_OPC_CheckPredicate, 30, 250, 49, 0, // Skip to: 17098
3651
/* 4304 */    MCD_OPC_Decode, 205, 8, 233, 1, // Opcode: BNZ_W
3652
/* 4309 */    MCD_OPC_FilterValue, 31, 240, 49, 0, // Skip to: 17098
3653
/* 4314 */    MCD_OPC_CheckPredicate, 30, 235, 49, 0, // Skip to: 17098
3654
/* 4319 */    MCD_OPC_Decode, 202, 8, 234, 1, // Opcode: BNZ_D
3655
/* 4324 */    MCD_OPC_FilterValue, 18, 47, 0, 0, // Skip to: 4376
3656
/* 4329 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
3657
/* 4332 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4354
3658
/* 4337 */    MCD_OPC_CheckPredicate, 27, 212, 49, 0, // Skip to: 17098
3659
/* 4342 */    MCD_OPC_CheckField, 3, 8, 0, 205, 49, 0, // Skip to: 17098
3660
/* 4349 */    MCD_OPC_Decode, 136, 17, 235, 1, // Opcode: MFC2
3661
/* 4354 */    MCD_OPC_FilterValue, 4, 195, 49, 0, // Skip to: 17098
3662
/* 4359 */    MCD_OPC_CheckPredicate, 27, 190, 49, 0, // Skip to: 17098
3663
/* 4364 */    MCD_OPC_CheckField, 3, 8, 0, 183, 49, 0, // Skip to: 17098
3664
/* 4371 */    MCD_OPC_Decode, 165, 18, 236, 1, // Opcode: MTC2
3665
/* 4376 */    MCD_OPC_FilterValue, 19, 255, 0, 0, // Skip to: 4636
3666
/* 4381 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
3667
/* 4384 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 4406
3668
/* 4389 */    MCD_OPC_CheckPredicate, 61, 160, 49, 0, // Skip to: 17098
3669
/* 4394 */    MCD_OPC_CheckField, 11, 5, 0, 153, 49, 0, // Skip to: 17098
3670
/* 4401 */    MCD_OPC_Decode, 172, 16, 237, 1, // Opcode: LWXC1
3671
/* 4406 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 4428
3672
/* 4411 */    MCD_OPC_CheckPredicate, 62, 138, 49, 0, // Skip to: 17098
3673
/* 4416 */    MCD_OPC_CheckField, 11, 5, 0, 131, 49, 0, // Skip to: 17098
3674
/* 4423 */    MCD_OPC_Decode, 196, 15, 238, 1, // Opcode: LDXC1
3675
/* 4428 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 4450
3676
/* 4433 */    MCD_OPC_CheckPredicate, 63, 116, 49, 0, // Skip to: 17098
3677
/* 4438 */    MCD_OPC_CheckField, 11, 5, 0, 109, 49, 0, // Skip to: 17098
3678
/* 4445 */    MCD_OPC_Decode, 253, 15, 238, 1, // Opcode: LUXC1
3679
/* 4450 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 4472
3680
/* 4455 */    MCD_OPC_CheckPredicate, 61, 94, 49, 0, // Skip to: 17098
3681
/* 4460 */    MCD_OPC_CheckField, 6, 5, 0, 87, 49, 0, // Skip to: 17098
3682
/* 4467 */    MCD_OPC_Decode, 165, 23, 239, 1, // Opcode: SWXC1
3683
/* 4472 */    MCD_OPC_FilterValue, 9, 17, 0, 0, // Skip to: 4494
3684
/* 4477 */    MCD_OPC_CheckPredicate, 62, 72, 49, 0, // Skip to: 17098
3685
/* 4482 */    MCD_OPC_CheckField, 6, 5, 0, 65, 49, 0, // Skip to: 17098
3686
/* 4489 */    MCD_OPC_Decode, 240, 20, 240, 1, // Opcode: SDXC1
3687
/* 4494 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 4516
3688
/* 4499 */    MCD_OPC_CheckPredicate, 63, 50, 49, 0, // Skip to: 17098
3689
/* 4504 */    MCD_OPC_CheckField, 6, 5, 0, 43, 49, 0, // Skip to: 17098
3690
/* 4511 */    MCD_OPC_Decode, 253, 22, 240, 1, // Opcode: SUXC1
3691
/* 4516 */    MCD_OPC_FilterValue, 32, 10, 0, 0, // Skip to: 4531
3692
/* 4521 */    MCD_OPC_CheckPredicate, 64, 28, 49, 0, // Skip to: 17098
3693
/* 4526 */    MCD_OPC_Decode, 218, 16, 241, 1, // Opcode: MADD_S
3694
/* 4531 */    MCD_OPC_FilterValue, 33, 10, 0, 0, // Skip to: 4546
3695
/* 4536 */    MCD_OPC_CheckPredicate, 65, 13, 49, 0, // Skip to: 17098
3696
/* 4541 */    MCD_OPC_Decode, 210, 16, 242, 1, // Opcode: MADD_D32
3697
/* 4546 */    MCD_OPC_FilterValue, 40, 10, 0, 0, // Skip to: 4561
3698
/* 4551 */    MCD_OPC_CheckPredicate, 64, 254, 48, 0, // Skip to: 17098
3699
/* 4556 */    MCD_OPC_Decode, 154, 18, 241, 1, // Opcode: MSUB_S
3700
/* 4561 */    MCD_OPC_FilterValue, 41, 10, 0, 0, // Skip to: 4576
3701
/* 4566 */    MCD_OPC_CheckPredicate, 65, 239, 48, 0, // Skip to: 17098
3702
/* 4571 */    MCD_OPC_Decode, 146, 18, 242, 1, // Opcode: MSUB_D32
3703
/* 4576 */    MCD_OPC_FilterValue, 48, 10, 0, 0, // Skip to: 4591
3704
/* 4581 */    MCD_OPC_CheckPredicate, 66, 224, 48, 0, // Skip to: 17098
3705
/* 4586 */    MCD_OPC_Decode, 142, 19, 241, 1, // Opcode: NMADD_S
3706
/* 4591 */    MCD_OPC_FilterValue, 49, 10, 0, 0, // Skip to: 4606
3707
/* 4596 */    MCD_OPC_CheckPredicate, 67, 209, 48, 0, // Skip to: 17098
3708
/* 4601 */    MCD_OPC_Decode, 139, 19, 242, 1, // Opcode: NMADD_D32
3709
/* 4606 */    MCD_OPC_FilterValue, 56, 10, 0, 0, // Skip to: 4621
3710
/* 4611 */    MCD_OPC_CheckPredicate, 66, 194, 48, 0, // Skip to: 17098
3711
/* 4616 */    MCD_OPC_Decode, 147, 19, 241, 1, // Opcode: NMSUB_S
3712
/* 4621 */    MCD_OPC_FilterValue, 57, 184, 48, 0, // Skip to: 17098
3713
/* 4626 */    MCD_OPC_CheckPredicate, 67, 179, 48, 0, // Skip to: 17098
3714
/* 4631 */    MCD_OPC_Decode, 144, 19, 242, 1, // Opcode: NMSUB_D32
3715
/* 4636 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 4651
3716
/* 4641 */    MCD_OPC_CheckPredicate, 39, 164, 48, 0, // Skip to: 17098
3717
/* 4646 */    MCD_OPC_Decode, 197, 7, 201, 1, // Opcode: BEQL
3718
/* 4651 */    MCD_OPC_FilterValue, 21, 107, 0, 0, // Skip to: 4763
3719
/* 4656 */    MCD_OPC_ExtractField, 0, 16,  // Inst{15-0} ...
3720
/* 4659 */    MCD_OPC_FilterValue, 123, 9, 0, 0, // Skip to: 4673
3721
/* 4664 */    MCD_OPC_CheckPredicate, 19, 19, 0, 0, // Skip to: 4688
3722
/* 4669 */    MCD_OPC_Decode, 233, 13, 124, // Opcode: FMOV_S_MM
3723
/* 4673 */    MCD_OPC_FilterValue, 251, 22, 9, 0, 0, // Skip to: 4688
3724
/* 4679 */    MCD_OPC_CheckPredicate, 19, 4, 0, 0, // Skip to: 4688
3725
/* 4684 */    MCD_OPC_Decode, 252, 13, 124, // Opcode: FNEG_S_MM
3726
/* 4688 */    MCD_OPC_ExtractField, 0, 11,  // Inst{10-0} ...
3727
/* 4691 */    MCD_OPC_FilterValue, 48, 10, 0, 0, // Skip to: 4706
3728
/* 4696 */    MCD_OPC_CheckPredicate, 19, 52, 0, 0, // Skip to: 4753
3729
/* 4701 */    MCD_OPC_Decode, 143, 13, 164, 1, // Opcode: FADD_S_MM
3730
/* 4706 */    MCD_OPC_FilterValue, 112, 10, 0, 0, // Skip to: 4721
3731
/* 4711 */    MCD_OPC_CheckPredicate, 19, 37, 0, 0, // Skip to: 4753
3732
/* 4716 */    MCD_OPC_Decode, 161, 14, 164, 1, // Opcode: FSUB_S_MM
3733
/* 4721 */    MCD_OPC_FilterValue, 176, 1, 10, 0, 0, // Skip to: 4737
3734
/* 4727 */    MCD_OPC_CheckPredicate, 19, 21, 0, 0, // Skip to: 4753
3735
/* 4732 */    MCD_OPC_Decode, 244, 13, 164, 1, // Opcode: FMUL_S_MM
3736
/* 4737 */    MCD_OPC_FilterValue, 240, 1, 10, 0, 0, // Skip to: 4753
3737
/* 4743 */    MCD_OPC_CheckPredicate, 19, 5, 0, 0, // Skip to: 4753
3738
/* 4748 */    MCD_OPC_Decode, 181, 13, 164, 1, // Opcode: FDIV_S_MM
3739
/* 4753 */    MCD_OPC_CheckPredicate, 39, 52, 48, 0, // Skip to: 17098
3740
/* 4758 */    MCD_OPC_Decode, 187, 8, 201, 1, // Opcode: BNEL
3741
/* 4763 */    MCD_OPC_FilterValue, 22, 17, 0, 0, // Skip to: 4785
3742
/* 4768 */    MCD_OPC_CheckPredicate, 39, 37, 48, 0, // Skip to: 17098
3743
/* 4773 */    MCD_OPC_CheckField, 16, 5, 0, 30, 48, 0, // Skip to: 17098
3744
/* 4780 */    MCD_OPC_Decode, 141, 8, 197, 1, // Opcode: BLEZL
3745
/* 4785 */    MCD_OPC_FilterValue, 23, 17, 0, 0, // Skip to: 4807
3746
/* 4790 */    MCD_OPC_CheckPredicate, 39, 15, 48, 0, // Skip to: 17098
3747
/* 4795 */    MCD_OPC_CheckField, 16, 5, 0, 8, 48, 0, // Skip to: 17098
3748
/* 4802 */    MCD_OPC_Decode, 239, 7, 197, 1, // Opcode: BGTZL
3749
/* 4807 */    MCD_OPC_FilterValue, 28, 15, 1, 0, // Skip to: 5083
3750
/* 4812 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
3751
/* 4815 */    MCD_OPC_FilterValue, 0, 42, 0, 0, // Skip to: 4862
3752
/* 4820 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
3753
/* 4823 */    MCD_OPC_FilterValue, 0, 238, 47, 0, // Skip to: 17098
3754
/* 4828 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
3755
/* 4831 */    MCD_OPC_FilterValue, 0, 230, 47, 0, // Skip to: 17098
3756
/* 4836 */    MCD_OPC_CheckPredicate, 68, 11, 0, 0, // Skip to: 4852
3757
/* 4841 */    MCD_OPC_CheckField, 11, 2, 0, 4, 0, 0, // Skip to: 4852
3758
/* 4848 */    MCD_OPC_Decode, 195, 16, 80, // Opcode: MADD
3759
/* 4852 */    MCD_OPC_CheckPredicate, 37, 209, 47, 0, // Skip to: 17098
3760
/* 4857 */    MCD_OPC_Decode, 213, 16, 243, 1, // Opcode: MADD_DSP
3761
/* 4862 */    MCD_OPC_FilterValue, 1, 42, 0, 0, // Skip to: 4909
3762
/* 4867 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
3763
/* 4870 */    MCD_OPC_FilterValue, 0, 191, 47, 0, // Skip to: 17098
3764
/* 4875 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
3765
/* 4878 */    MCD_OPC_FilterValue, 0, 183, 47, 0, // Skip to: 17098
3766
/* 4883 */    MCD_OPC_CheckPredicate, 68, 11, 0, 0, // Skip to: 4899
3767
/* 4888 */    MCD_OPC_CheckField, 11, 2, 0, 4, 0, 0, // Skip to: 4899
3768
/* 4895 */    MCD_OPC_Decode, 202, 16, 80, // Opcode: MADDU
3769
/* 4899 */    MCD_OPC_CheckPredicate, 37, 162, 47, 0, // Skip to: 17098
3770
/* 4904 */    MCD_OPC_Decode, 203, 16, 243, 1, // Opcode: MADDU_DSP
3771
/* 4909 */    MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 4930
3772
/* 4914 */    MCD_OPC_CheckPredicate, 68, 147, 47, 0, // Skip to: 17098
3773
/* 4919 */    MCD_OPC_CheckField, 6, 5, 0, 140, 47, 0, // Skip to: 17098
3774
/* 4926 */    MCD_OPC_Decode, 205, 18, 61, // Opcode: MUL
3775
/* 4930 */    MCD_OPC_FilterValue, 4, 42, 0, 0, // Skip to: 4977
3776
/* 4935 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
3777
/* 4938 */    MCD_OPC_FilterValue, 0, 123, 47, 0, // Skip to: 17098
3778
/* 4943 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
3779
/* 4946 */    MCD_OPC_FilterValue, 0, 115, 47, 0, // Skip to: 17098
3780
/* 4951 */    MCD_OPC_CheckPredicate, 68, 11, 0, 0, // Skip to: 4967
3781
/* 4956 */    MCD_OPC_CheckField, 11, 2, 0, 4, 0, 0, // Skip to: 4967
3782
/* 4963 */    MCD_OPC_Decode, 131, 18, 80, // Opcode: MSUB
3783
/* 4967 */    MCD_OPC_CheckPredicate, 37, 94, 47, 0, // Skip to: 17098
3784
/* 4972 */    MCD_OPC_Decode, 149, 18, 243, 1, // Opcode: MSUB_DSP
3785
/* 4977 */    MCD_OPC_FilterValue, 5, 42, 0, 0, // Skip to: 5024
3786
/* 4982 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
3787
/* 4985 */    MCD_OPC_FilterValue, 0, 76, 47, 0, // Skip to: 17098
3788
/* 4990 */    MCD_OPC_ExtractField, 13, 3,  // Inst{15-13} ...
3789
/* 4993 */    MCD_OPC_FilterValue, 0, 68, 47, 0, // Skip to: 17098
3790
/* 4998 */    MCD_OPC_CheckPredicate, 68, 11, 0, 0, // Skip to: 5014
3791
/* 5003 */    MCD_OPC_CheckField, 11, 2, 0, 4, 0, 0, // Skip to: 5014
3792
/* 5010 */    MCD_OPC_Decode, 138, 18, 80, // Opcode: MSUBU
3793
/* 5014 */    MCD_OPC_CheckPredicate, 37, 47, 47, 0, // Skip to: 17098
3794
/* 5019 */    MCD_OPC_Decode, 139, 18, 243, 1, // Opcode: MSUBU_DSP
3795
/* 5024 */    MCD_OPC_FilterValue, 32, 17, 0, 0, // Skip to: 5046
3796
/* 5029 */    MCD_OPC_CheckPredicate, 68, 32, 47, 0, // Skip to: 17098
3797
/* 5034 */    MCD_OPC_CheckField, 6, 5, 0, 25, 47, 0, // Skip to: 17098
3798
/* 5041 */    MCD_OPC_Decode, 193, 9, 244, 1, // Opcode: CLZ
3799
/* 5046 */    MCD_OPC_FilterValue, 33, 17, 0, 0, // Skip to: 5068
3800
/* 5051 */    MCD_OPC_CheckPredicate, 68, 10, 47, 0, // Skip to: 17098
3801
/* 5056 */    MCD_OPC_CheckField, 6, 5, 0, 3, 47, 0, // Skip to: 17098
3802
/* 5063 */    MCD_OPC_Decode, 172, 9, 244, 1, // Opcode: CLO
3803
/* 5068 */    MCD_OPC_FilterValue, 63, 249, 46, 0, // Skip to: 17098
3804
/* 5073 */    MCD_OPC_CheckPredicate, 68, 244, 46, 0, // Skip to: 17098
3805
/* 5078 */    MCD_OPC_Decode, 219, 20, 188, 1, // Opcode: SDBBP
3806
/* 5083 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 5098
3807
/* 5088 */    MCD_OPC_CheckPredicate, 68, 229, 46, 0, // Skip to: 17098
3808
/* 5093 */    MCD_OPC_Decode, 251, 14, 200, 1, // Opcode: JALX
3809
/* 5098 */    MCD_OPC_FilterValue, 30, 201, 32, 0, // Skip to: 13496
3810
/* 5103 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
3811
/* 5106 */    MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 5174
3812
/* 5111 */    MCD_OPC_ExtractField, 24, 2,  // Inst{25-24} ...
3813
/* 5114 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5129
3814
/* 5119 */    MCD_OPC_CheckPredicate, 30, 198, 46, 0, // Skip to: 17098
3815
/* 5124 */    MCD_OPC_Decode, 224, 6, 245, 1, // Opcode: ANDI_B
3816
/* 5129 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5144
3817
/* 5134 */    MCD_OPC_CheckPredicate, 30, 183, 46, 0, // Skip to: 17098
3818
/* 5139 */    MCD_OPC_Decode, 168, 19, 245, 1, // Opcode: ORI_B
3819
/* 5144 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 5159
3820
/* 5149 */    MCD_OPC_CheckPredicate, 30, 168, 46, 0, // Skip to: 17098
3821
/* 5154 */    MCD_OPC_Decode, 153, 19, 245, 1, // Opcode: NORI_B
3822
/* 5159 */    MCD_OPC_FilterValue, 3, 158, 46, 0, // Skip to: 17098
3823
/* 5164 */    MCD_OPC_CheckPredicate, 30, 153, 46, 0, // Skip to: 17098
3824
/* 5169 */    MCD_OPC_Decode, 177, 24, 245, 1, // Opcode: XORI_B
3825
/* 5174 */    MCD_OPC_FilterValue, 1, 48, 0, 0, // Skip to: 5227
3826
/* 5179 */    MCD_OPC_ExtractField, 24, 2,  // Inst{25-24} ...
3827
/* 5182 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5197
3828
/* 5187 */    MCD_OPC_CheckPredicate, 30, 130, 46, 0, // Skip to: 17098
3829
/* 5192 */    MCD_OPC_Decode, 166, 8, 246, 1, // Opcode: BMNZI_B
3830
/* 5197 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5212
3831
/* 5202 */    MCD_OPC_CheckPredicate, 30, 115, 46, 0, // Skip to: 17098
3832
/* 5207 */    MCD_OPC_Decode, 168, 8, 246, 1, // Opcode: BMZI_B
3833
/* 5212 */    MCD_OPC_FilterValue, 2, 105, 46, 0, // Skip to: 17098
3834
/* 5217 */    MCD_OPC_CheckPredicate, 30, 100, 46, 0, // Skip to: 17098
3835
/* 5222 */    MCD_OPC_Decode, 219, 8, 246, 1, // Opcode: BSELI_B
3836
/* 5227 */    MCD_OPC_FilterValue, 2, 48, 0, 0, // Skip to: 5280
3837
/* 5232 */    MCD_OPC_ExtractField, 24, 2,  // Inst{25-24} ...
3838
/* 5235 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5250
3839
/* 5240 */    MCD_OPC_CheckPredicate, 30, 77, 46, 0, // Skip to: 17098
3840
/* 5245 */    MCD_OPC_Decode, 150, 21, 245, 1, // Opcode: SHF_B
3841
/* 5250 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5265
3842
/* 5255 */    MCD_OPC_CheckPredicate, 30, 62, 46, 0, // Skip to: 17098
3843
/* 5260 */    MCD_OPC_Decode, 151, 21, 247, 1, // Opcode: SHF_H
3844
/* 5265 */    MCD_OPC_FilterValue, 2, 52, 46, 0, // Skip to: 17098
3845
/* 5270 */    MCD_OPC_CheckPredicate, 30, 47, 46, 0, // Skip to: 17098
3846
/* 5275 */    MCD_OPC_Decode, 152, 21, 248, 1, // Opcode: SHF_W
3847
/* 5280 */    MCD_OPC_FilterValue, 6, 107, 1, 0, // Skip to: 5648
3848
/* 5285 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
3849
/* 5288 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5303
3850
/* 5293 */    MCD_OPC_CheckPredicate, 30, 24, 46, 0, // Skip to: 17098
3851
/* 5298 */    MCD_OPC_Decode, 185, 6, 249, 1, // Opcode: ADDVI_B
3852
/* 5303 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5318
3853
/* 5308 */    MCD_OPC_CheckPredicate, 30, 9, 46, 0, // Skip to: 17098
3854
/* 5313 */    MCD_OPC_Decode, 187, 6, 250, 1, // Opcode: ADDVI_H
3855
/* 5318 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 5333
3856
/* 5323 */    MCD_OPC_CheckPredicate, 30, 250, 45, 0, // Skip to: 17098
3857
/* 5328 */    MCD_OPC_Decode, 188, 6, 251, 1, // Opcode: ADDVI_W
3858
/* 5333 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 5348
3859
/* 5338 */    MCD_OPC_CheckPredicate, 30, 235, 45, 0, // Skip to: 17098
3860
/* 5343 */    MCD_OPC_Decode, 186, 6, 252, 1, // Opcode: ADDVI_D
3861
/* 5348 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 5363
3862
/* 5353 */    MCD_OPC_CheckPredicate, 30, 220, 45, 0, // Skip to: 17098
3863
/* 5358 */    MCD_OPC_Decode, 238, 22, 249, 1, // Opcode: SUBVI_B
3864
/* 5363 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 5378
3865
/* 5368 */    MCD_OPC_CheckPredicate, 30, 205, 45, 0, // Skip to: 17098
3866
/* 5373 */    MCD_OPC_Decode, 240, 22, 250, 1, // Opcode: SUBVI_H
3867
/* 5378 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 5393
3868
/* 5383 */    MCD_OPC_CheckPredicate, 30, 190, 45, 0, // Skip to: 17098
3869
/* 5388 */    MCD_OPC_Decode, 241, 22, 251, 1, // Opcode: SUBVI_W
3870
/* 5393 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 5408
3871
/* 5398 */    MCD_OPC_CheckPredicate, 30, 175, 45, 0, // Skip to: 17098
3872
/* 5403 */    MCD_OPC_Decode, 239, 22, 252, 1, // Opcode: SUBVI_D
3873
/* 5408 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 5423
3874
/* 5413 */    MCD_OPC_CheckPredicate, 30, 160, 45, 0, // Skip to: 17098
3875
/* 5418 */    MCD_OPC_Decode, 232, 16, 249, 1, // Opcode: MAXI_S_B
3876
/* 5423 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 5438
3877
/* 5428 */    MCD_OPC_CheckPredicate, 30, 145, 45, 0, // Skip to: 17098
3878
/* 5433 */    MCD_OPC_Decode, 234, 16, 250, 1, // Opcode: MAXI_S_H
3879
/* 5438 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 5453
3880
/* 5443 */    MCD_OPC_CheckPredicate, 30, 130, 45, 0, // Skip to: 17098
3881
/* 5448 */    MCD_OPC_Decode, 235, 16, 251, 1, // Opcode: MAXI_S_W
3882
/* 5453 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 5468
3883
/* 5458 */    MCD_OPC_CheckPredicate, 30, 115, 45, 0, // Skip to: 17098
3884
/* 5463 */    MCD_OPC_Decode, 233, 16, 252, 1, // Opcode: MAXI_S_D
3885
/* 5468 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 5483
3886
/* 5473 */    MCD_OPC_CheckPredicate, 30, 100, 45, 0, // Skip to: 17098
3887
/* 5478 */    MCD_OPC_Decode, 236, 16, 249, 1, // Opcode: MAXI_U_B
3888
/* 5483 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5498
3889
/* 5488 */    MCD_OPC_CheckPredicate, 30, 85, 45, 0, // Skip to: 17098
3890
/* 5493 */    MCD_OPC_Decode, 238, 16, 250, 1, // Opcode: MAXI_U_H
3891
/* 5498 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 5513
3892
/* 5503 */    MCD_OPC_CheckPredicate, 30, 70, 45, 0, // Skip to: 17098
3893
/* 5508 */    MCD_OPC_Decode, 239, 16, 251, 1, // Opcode: MAXI_U_W
3894
/* 5513 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5528
3895
/* 5518 */    MCD_OPC_CheckPredicate, 30, 55, 45, 0, // Skip to: 17098
3896
/* 5523 */    MCD_OPC_Decode, 237, 16, 252, 1, // Opcode: MAXI_U_D
3897
/* 5528 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 5543
3898
/* 5533 */    MCD_OPC_CheckPredicate, 30, 40, 45, 0, // Skip to: 17098
3899
/* 5538 */    MCD_OPC_Decode, 168, 17, 249, 1, // Opcode: MINI_S_B
3900
/* 5543 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 5558
3901
/* 5548 */    MCD_OPC_CheckPredicate, 30, 25, 45, 0, // Skip to: 17098
3902
/* 5553 */    MCD_OPC_Decode, 170, 17, 250, 1, // Opcode: MINI_S_H
3903
/* 5558 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 5573
3904
/* 5563 */    MCD_OPC_CheckPredicate, 30, 10, 45, 0, // Skip to: 17098
3905
/* 5568 */    MCD_OPC_Decode, 171, 17, 251, 1, // Opcode: MINI_S_W
3906
/* 5573 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 5588
3907
/* 5578 */    MCD_OPC_CheckPredicate, 30, 251, 44, 0, // Skip to: 17098
3908
/* 5583 */    MCD_OPC_Decode, 169, 17, 252, 1, // Opcode: MINI_S_D
3909
/* 5588 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 5603
3910
/* 5593 */    MCD_OPC_CheckPredicate, 30, 236, 44, 0, // Skip to: 17098
3911
/* 5598 */    MCD_OPC_Decode, 172, 17, 249, 1, // Opcode: MINI_U_B
3912
/* 5603 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 5618
3913
/* 5608 */    MCD_OPC_CheckPredicate, 30, 221, 44, 0, // Skip to: 17098
3914
/* 5613 */    MCD_OPC_Decode, 174, 17, 250, 1, // Opcode: MINI_U_H
3915
/* 5618 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 5633
3916
/* 5623 */    MCD_OPC_CheckPredicate, 30, 206, 44, 0, // Skip to: 17098
3917
/* 5628 */    MCD_OPC_Decode, 175, 17, 251, 1, // Opcode: MINI_U_W
3918
/* 5633 */    MCD_OPC_FilterValue, 23, 196, 44, 0, // Skip to: 17098
3919
/* 5638 */    MCD_OPC_CheckPredicate, 30, 191, 44, 0, // Skip to: 17098
3920
/* 5643 */    MCD_OPC_Decode, 173, 17, 252, 1, // Opcode: MINI_U_D
3921
/* 5648 */    MCD_OPC_FilterValue, 7, 107, 1, 0, // Skip to: 6016
3922
/* 5653 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
3923
/* 5656 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 5671
3924
/* 5661 */    MCD_OPC_CheckPredicate, 30, 168, 44, 0, // Skip to: 17098
3925
/* 5666 */    MCD_OPC_Decode, 136, 9, 249, 1, // Opcode: CEQI_B
3926
/* 5671 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 5686
3927
/* 5676 */    MCD_OPC_CheckPredicate, 30, 153, 44, 0, // Skip to: 17098
3928
/* 5681 */    MCD_OPC_Decode, 138, 9, 250, 1, // Opcode: CEQI_H
3929
/* 5686 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 5701
3930
/* 5691 */    MCD_OPC_CheckPredicate, 30, 138, 44, 0, // Skip to: 17098
3931
/* 5696 */    MCD_OPC_Decode, 139, 9, 251, 1, // Opcode: CEQI_W
3932
/* 5701 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 5716
3933
/* 5706 */    MCD_OPC_CheckPredicate, 30, 123, 44, 0, // Skip to: 17098
3934
/* 5711 */    MCD_OPC_Decode, 137, 9, 252, 1, // Opcode: CEQI_D
3935
/* 5716 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 5731
3936
/* 5721 */    MCD_OPC_CheckPredicate, 30, 108, 44, 0, // Skip to: 17098
3937
/* 5726 */    MCD_OPC_Decode, 177, 9, 249, 1, // Opcode: CLTI_S_B
3938
/* 5731 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 5746
3939
/* 5736 */    MCD_OPC_CheckPredicate, 30, 93, 44, 0, // Skip to: 17098
3940
/* 5741 */    MCD_OPC_Decode, 179, 9, 250, 1, // Opcode: CLTI_S_H
3941
/* 5746 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 5761
3942
/* 5751 */    MCD_OPC_CheckPredicate, 30, 78, 44, 0, // Skip to: 17098
3943
/* 5756 */    MCD_OPC_Decode, 180, 9, 251, 1, // Opcode: CLTI_S_W
3944
/* 5761 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 5776
3945
/* 5766 */    MCD_OPC_CheckPredicate, 30, 63, 44, 0, // Skip to: 17098
3946
/* 5771 */    MCD_OPC_Decode, 178, 9, 252, 1, // Opcode: CLTI_S_D
3947
/* 5776 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 5791
3948
/* 5781 */    MCD_OPC_CheckPredicate, 30, 48, 44, 0, // Skip to: 17098
3949
/* 5786 */    MCD_OPC_Decode, 181, 9, 249, 1, // Opcode: CLTI_U_B
3950
/* 5791 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 5806
3951
/* 5796 */    MCD_OPC_CheckPredicate, 30, 33, 44, 0, // Skip to: 17098
3952
/* 5801 */    MCD_OPC_Decode, 183, 9, 250, 1, // Opcode: CLTI_U_H
3953
/* 5806 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 5821
3954
/* 5811 */    MCD_OPC_CheckPredicate, 30, 18, 44, 0, // Skip to: 17098
3955
/* 5816 */    MCD_OPC_Decode, 184, 9, 251, 1, // Opcode: CLTI_U_W
3956
/* 5821 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 5836
3957
/* 5826 */    MCD_OPC_CheckPredicate, 30, 3, 44, 0, // Skip to: 17098
3958
/* 5831 */    MCD_OPC_Decode, 182, 9, 252, 1, // Opcode: CLTI_U_D
3959
/* 5836 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 5851
3960
/* 5841 */    MCD_OPC_CheckPredicate, 30, 244, 43, 0, // Skip to: 17098
3961
/* 5846 */    MCD_OPC_Decode, 156, 9, 249, 1, // Opcode: CLEI_S_B
3962
/* 5851 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 5866
3963
/* 5856 */    MCD_OPC_CheckPredicate, 30, 229, 43, 0, // Skip to: 17098
3964
/* 5861 */    MCD_OPC_Decode, 158, 9, 250, 1, // Opcode: CLEI_S_H
3965
/* 5866 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 5881
3966
/* 5871 */    MCD_OPC_CheckPredicate, 30, 214, 43, 0, // Skip to: 17098
3967
/* 5876 */    MCD_OPC_Decode, 159, 9, 251, 1, // Opcode: CLEI_S_W
3968
/* 5881 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 5896
3969
/* 5886 */    MCD_OPC_CheckPredicate, 30, 199, 43, 0, // Skip to: 17098
3970
/* 5891 */    MCD_OPC_Decode, 157, 9, 252, 1, // Opcode: CLEI_S_D
3971
/* 5896 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 5911
3972
/* 5901 */    MCD_OPC_CheckPredicate, 30, 184, 43, 0, // Skip to: 17098
3973
/* 5906 */    MCD_OPC_Decode, 160, 9, 249, 1, // Opcode: CLEI_U_B
3974
/* 5911 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 5926
3975
/* 5916 */    MCD_OPC_CheckPredicate, 30, 169, 43, 0, // Skip to: 17098
3976
/* 5921 */    MCD_OPC_Decode, 162, 9, 250, 1, // Opcode: CLEI_U_H
3977
/* 5926 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 5941
3978
/* 5931 */    MCD_OPC_CheckPredicate, 30, 154, 43, 0, // Skip to: 17098
3979
/* 5936 */    MCD_OPC_Decode, 163, 9, 251, 1, // Opcode: CLEI_U_W
3980
/* 5941 */    MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 5956
3981
/* 5946 */    MCD_OPC_CheckPredicate, 30, 139, 43, 0, // Skip to: 17098
3982
/* 5951 */    MCD_OPC_Decode, 161, 9, 252, 1, // Opcode: CLEI_U_D
3983
/* 5956 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 5971
3984
/* 5961 */    MCD_OPC_CheckPredicate, 30, 124, 43, 0, // Skip to: 17098
3985
/* 5966 */    MCD_OPC_Decode, 189, 15, 253, 1, // Opcode: LDI_B
3986
/* 5971 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 5986
3987
/* 5976 */    MCD_OPC_CheckPredicate, 30, 109, 43, 0, // Skip to: 17098
3988
/* 5981 */    MCD_OPC_Decode, 191, 15, 254, 1, // Opcode: LDI_H
3989
/* 5986 */    MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 6001
3990
/* 5991 */    MCD_OPC_CheckPredicate, 30, 94, 43, 0, // Skip to: 17098
3991
/* 5996 */    MCD_OPC_Decode, 192, 15, 255, 1, // Opcode: LDI_W
3992
/* 6001 */    MCD_OPC_FilterValue, 27, 84, 43, 0, // Skip to: 17098
3993
/* 6006 */    MCD_OPC_CheckPredicate, 30, 79, 43, 0, // Skip to: 17098
3994
/* 6011 */    MCD_OPC_Decode, 190, 15, 128, 2, // Opcode: LDI_D
3995
/* 6016 */    MCD_OPC_FilterValue, 9, 155, 2, 0, // Skip to: 6688
3996
/* 6021 */    MCD_OPC_ExtractField, 22, 4,  // Inst{25-22} ...
3997
/* 6024 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6039
3998
/* 6029 */    MCD_OPC_CheckPredicate, 30, 56, 43, 0, // Skip to: 17098
3999
/* 6034 */    MCD_OPC_Decode, 226, 21, 129, 2, // Opcode: SLLI_D
4000
/* 6039 */    MCD_OPC_FilterValue, 1, 63, 0, 0, // Skip to: 6107
4001
/* 6044 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4002
/* 6047 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6062
4003
/* 6052 */    MCD_OPC_CheckPredicate, 30, 33, 43, 0, // Skip to: 17098
4004
/* 6057 */    MCD_OPC_Decode, 228, 21, 251, 1, // Opcode: SLLI_W
4005
/* 6062 */    MCD_OPC_FilterValue, 1, 23, 43, 0, // Skip to: 17098
4006
/* 6067 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4007
/* 6070 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6085
4008
/* 6075 */    MCD_OPC_CheckPredicate, 30, 10, 43, 0, // Skip to: 17098
4009
/* 6080 */    MCD_OPC_Decode, 227, 21, 130, 2, // Opcode: SLLI_H
4010
/* 6085 */    MCD_OPC_FilterValue, 1, 0, 43, 0, // Skip to: 17098
4011
/* 6090 */    MCD_OPC_CheckPredicate, 30, 251, 42, 0, // Skip to: 17098
4012
/* 6095 */    MCD_OPC_CheckField, 19, 1, 0, 244, 42, 0, // Skip to: 17098
4013
/* 6102 */    MCD_OPC_Decode, 225, 21, 131, 2, // Opcode: SLLI_B
4014
/* 6107 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 6122
4015
/* 6112 */    MCD_OPC_CheckPredicate, 30, 229, 42, 0, // Skip to: 17098
4016
/* 6117 */    MCD_OPC_Decode, 140, 22, 129, 2, // Opcode: SRAI_D
4017
/* 6122 */    MCD_OPC_FilterValue, 3, 63, 0, 0, // Skip to: 6190
4018
/* 6127 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4019
/* 6130 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6145
4020
/* 6135 */    MCD_OPC_CheckPredicate, 30, 206, 42, 0, // Skip to: 17098
4021
/* 6140 */    MCD_OPC_Decode, 142, 22, 251, 1, // Opcode: SRAI_W
4022
/* 6145 */    MCD_OPC_FilterValue, 1, 196, 42, 0, // Skip to: 17098
4023
/* 6150 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4024
/* 6153 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6168
4025
/* 6158 */    MCD_OPC_CheckPredicate, 30, 183, 42, 0, // Skip to: 17098
4026
/* 6163 */    MCD_OPC_Decode, 141, 22, 130, 2, // Opcode: SRAI_H
4027
/* 6168 */    MCD_OPC_FilterValue, 1, 173, 42, 0, // Skip to: 17098
4028
/* 6173 */    MCD_OPC_CheckPredicate, 30, 168, 42, 0, // Skip to: 17098
4029
/* 6178 */    MCD_OPC_CheckField, 19, 1, 0, 161, 42, 0, // Skip to: 17098
4030
/* 6185 */    MCD_OPC_Decode, 139, 22, 131, 2, // Opcode: SRAI_B
4031
/* 6190 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 6205
4032
/* 6195 */    MCD_OPC_CheckPredicate, 30, 146, 42, 0, // Skip to: 17098
4033
/* 6200 */    MCD_OPC_Decode, 165, 22, 129, 2, // Opcode: SRLI_D
4034
/* 6205 */    MCD_OPC_FilterValue, 5, 63, 0, 0, // Skip to: 6273
4035
/* 6210 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4036
/* 6213 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6228
4037
/* 6218 */    MCD_OPC_CheckPredicate, 30, 123, 42, 0, // Skip to: 17098
4038
/* 6223 */    MCD_OPC_Decode, 167, 22, 251, 1, // Opcode: SRLI_W
4039
/* 6228 */    MCD_OPC_FilterValue, 1, 113, 42, 0, // Skip to: 17098
4040
/* 6233 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4041
/* 6236 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6251
4042
/* 6241 */    MCD_OPC_CheckPredicate, 30, 100, 42, 0, // Skip to: 17098
4043
/* 6246 */    MCD_OPC_Decode, 166, 22, 130, 2, // Opcode: SRLI_H
4044
/* 6251 */    MCD_OPC_FilterValue, 1, 90, 42, 0, // Skip to: 17098
4045
/* 6256 */    MCD_OPC_CheckPredicate, 30, 85, 42, 0, // Skip to: 17098
4046
/* 6261 */    MCD_OPC_CheckField, 19, 1, 0, 78, 42, 0, // Skip to: 17098
4047
/* 6268 */    MCD_OPC_Decode, 164, 22, 131, 2, // Opcode: SRLI_B
4048
/* 6273 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 6288
4049
/* 6278 */    MCD_OPC_CheckPredicate, 30, 63, 42, 0, // Skip to: 17098
4050
/* 6283 */    MCD_OPC_Decode, 179, 7, 129, 2, // Opcode: BCLRI_D
4051
/* 6288 */    MCD_OPC_FilterValue, 7, 63, 0, 0, // Skip to: 6356
4052
/* 6293 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4053
/* 6296 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6311
4054
/* 6301 */    MCD_OPC_CheckPredicate, 30, 40, 42, 0, // Skip to: 17098
4055
/* 6306 */    MCD_OPC_Decode, 181, 7, 251, 1, // Opcode: BCLRI_W
4056
/* 6311 */    MCD_OPC_FilterValue, 1, 30, 42, 0, // Skip to: 17098
4057
/* 6316 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4058
/* 6319 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6334
4059
/* 6324 */    MCD_OPC_CheckPredicate, 30, 17, 42, 0, // Skip to: 17098
4060
/* 6329 */    MCD_OPC_Decode, 180, 7, 130, 2, // Opcode: BCLRI_H
4061
/* 6334 */    MCD_OPC_FilterValue, 1, 7, 42, 0, // Skip to: 17098
4062
/* 6339 */    MCD_OPC_CheckPredicate, 30, 2, 42, 0, // Skip to: 17098
4063
/* 6344 */    MCD_OPC_CheckField, 19, 1, 0, 251, 41, 0, // Skip to: 17098
4064
/* 6351 */    MCD_OPC_Decode, 178, 7, 131, 2, // Opcode: BCLRI_B
4065
/* 6356 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 6371
4066
/* 6361 */    MCD_OPC_CheckPredicate, 30, 236, 41, 0, // Skip to: 17098
4067
/* 6366 */    MCD_OPC_Decode, 222, 8, 129, 2, // Opcode: BSETI_D
4068
/* 6371 */    MCD_OPC_FilterValue, 9, 63, 0, 0, // Skip to: 6439
4069
/* 6376 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4070
/* 6379 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6394
4071
/* 6384 */    MCD_OPC_CheckPredicate, 30, 213, 41, 0, // Skip to: 17098
4072
/* 6389 */    MCD_OPC_Decode, 224, 8, 251, 1, // Opcode: BSETI_W
4073
/* 6394 */    MCD_OPC_FilterValue, 1, 203, 41, 0, // Skip to: 17098
4074
/* 6399 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4075
/* 6402 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6417
4076
/* 6407 */    MCD_OPC_CheckPredicate, 30, 190, 41, 0, // Skip to: 17098
4077
/* 6412 */    MCD_OPC_Decode, 223, 8, 130, 2, // Opcode: BSETI_H
4078
/* 6417 */    MCD_OPC_FilterValue, 1, 180, 41, 0, // Skip to: 17098
4079
/* 6422 */    MCD_OPC_CheckPredicate, 30, 175, 41, 0, // Skip to: 17098
4080
/* 6427 */    MCD_OPC_CheckField, 19, 1, 0, 168, 41, 0, // Skip to: 17098
4081
/* 6434 */    MCD_OPC_Decode, 221, 8, 131, 2, // Opcode: BSETI_B
4082
/* 6439 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 6454
4083
/* 6444 */    MCD_OPC_CheckPredicate, 30, 153, 41, 0, // Skip to: 17098
4084
/* 6449 */    MCD_OPC_Decode, 179, 8, 129, 2, // Opcode: BNEGI_D
4085
/* 6454 */    MCD_OPC_FilterValue, 11, 63, 0, 0, // Skip to: 6522
4086
/* 6459 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4087
/* 6462 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6477
4088
/* 6467 */    MCD_OPC_CheckPredicate, 30, 130, 41, 0, // Skip to: 17098
4089
/* 6472 */    MCD_OPC_Decode, 181, 8, 251, 1, // Opcode: BNEGI_W
4090
/* 6477 */    MCD_OPC_FilterValue, 1, 120, 41, 0, // Skip to: 17098
4091
/* 6482 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4092
/* 6485 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6500
4093
/* 6490 */    MCD_OPC_CheckPredicate, 30, 107, 41, 0, // Skip to: 17098
4094
/* 6495 */    MCD_OPC_Decode, 180, 8, 130, 2, // Opcode: BNEGI_H
4095
/* 6500 */    MCD_OPC_FilterValue, 1, 97, 41, 0, // Skip to: 17098
4096
/* 6505 */    MCD_OPC_CheckPredicate, 30, 92, 41, 0, // Skip to: 17098
4097
/* 6510 */    MCD_OPC_CheckField, 19, 1, 0, 85, 41, 0, // Skip to: 17098
4098
/* 6517 */    MCD_OPC_Decode, 178, 8, 131, 2, // Opcode: BNEGI_B
4099
/* 6522 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 6537
4100
/* 6527 */    MCD_OPC_CheckPredicate, 30, 70, 41, 0, // Skip to: 17098
4101
/* 6532 */    MCD_OPC_Decode, 242, 7, 132, 2, // Opcode: BINSLI_D
4102
/* 6537 */    MCD_OPC_FilterValue, 13, 63, 0, 0, // Skip to: 6605
4103
/* 6542 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4104
/* 6545 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6560
4105
/* 6550 */    MCD_OPC_CheckPredicate, 30, 47, 41, 0, // Skip to: 17098
4106
/* 6555 */    MCD_OPC_Decode, 244, 7, 133, 2, // Opcode: BINSLI_W
4107
/* 6560 */    MCD_OPC_FilterValue, 1, 37, 41, 0, // Skip to: 17098
4108
/* 6565 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4109
/* 6568 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6583
4110
/* 6573 */    MCD_OPC_CheckPredicate, 30, 24, 41, 0, // Skip to: 17098
4111
/* 6578 */    MCD_OPC_Decode, 243, 7, 134, 2, // Opcode: BINSLI_H
4112
/* 6583 */    MCD_OPC_FilterValue, 1, 14, 41, 0, // Skip to: 17098
4113
/* 6588 */    MCD_OPC_CheckPredicate, 30, 9, 41, 0, // Skip to: 17098
4114
/* 6593 */    MCD_OPC_CheckField, 19, 1, 0, 2, 41, 0, // Skip to: 17098
4115
/* 6600 */    MCD_OPC_Decode, 241, 7, 135, 2, // Opcode: BINSLI_B
4116
/* 6605 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 6620
4117
/* 6610 */    MCD_OPC_CheckPredicate, 30, 243, 40, 0, // Skip to: 17098
4118
/* 6615 */    MCD_OPC_Decode, 250, 7, 132, 2, // Opcode: BINSRI_D
4119
/* 6620 */    MCD_OPC_FilterValue, 15, 233, 40, 0, // Skip to: 17098
4120
/* 6625 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4121
/* 6628 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6643
4122
/* 6633 */    MCD_OPC_CheckPredicate, 30, 220, 40, 0, // Skip to: 17098
4123
/* 6638 */    MCD_OPC_Decode, 252, 7, 133, 2, // Opcode: BINSRI_W
4124
/* 6643 */    MCD_OPC_FilterValue, 1, 210, 40, 0, // Skip to: 17098
4125
/* 6648 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4126
/* 6651 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6666
4127
/* 6656 */    MCD_OPC_CheckPredicate, 30, 197, 40, 0, // Skip to: 17098
4128
/* 6661 */    MCD_OPC_Decode, 251, 7, 134, 2, // Opcode: BINSRI_H
4129
/* 6666 */    MCD_OPC_FilterValue, 1, 187, 40, 0, // Skip to: 17098
4130
/* 6671 */    MCD_OPC_CheckPredicate, 30, 182, 40, 0, // Skip to: 17098
4131
/* 6676 */    MCD_OPC_CheckField, 19, 1, 0, 175, 40, 0, // Skip to: 17098
4132
/* 6683 */    MCD_OPC_Decode, 249, 7, 135, 2, // Opcode: BINSRI_B
4133
/* 6688 */    MCD_OPC_FilterValue, 10, 79, 1, 0, // Skip to: 7028
4134
/* 6693 */    MCD_OPC_ExtractField, 22, 4,  // Inst{25-22} ...
4135
/* 6696 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6711
4136
/* 6701 */    MCD_OPC_CheckPredicate, 30, 152, 40, 0, // Skip to: 17098
4137
/* 6706 */    MCD_OPC_Decode, 184, 20, 129, 2, // Opcode: SAT_S_D
4138
/* 6711 */    MCD_OPC_FilterValue, 1, 63, 0, 0, // Skip to: 6779
4139
/* 6716 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4140
/* 6719 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6734
4141
/* 6724 */    MCD_OPC_CheckPredicate, 30, 129, 40, 0, // Skip to: 17098
4142
/* 6729 */    MCD_OPC_Decode, 186, 20, 251, 1, // Opcode: SAT_S_W
4143
/* 6734 */    MCD_OPC_FilterValue, 1, 119, 40, 0, // Skip to: 17098
4144
/* 6739 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4145
/* 6742 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6757
4146
/* 6747 */    MCD_OPC_CheckPredicate, 30, 106, 40, 0, // Skip to: 17098
4147
/* 6752 */    MCD_OPC_Decode, 185, 20, 130, 2, // Opcode: SAT_S_H
4148
/* 6757 */    MCD_OPC_FilterValue, 1, 96, 40, 0, // Skip to: 17098
4149
/* 6762 */    MCD_OPC_CheckPredicate, 30, 91, 40, 0, // Skip to: 17098
4150
/* 6767 */    MCD_OPC_CheckField, 19, 1, 0, 84, 40, 0, // Skip to: 17098
4151
/* 6774 */    MCD_OPC_Decode, 183, 20, 131, 2, // Opcode: SAT_S_B
4152
/* 6779 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 6794
4153
/* 6784 */    MCD_OPC_CheckPredicate, 30, 69, 40, 0, // Skip to: 17098
4154
/* 6789 */    MCD_OPC_Decode, 188, 20, 129, 2, // Opcode: SAT_U_D
4155
/* 6794 */    MCD_OPC_FilterValue, 3, 63, 0, 0, // Skip to: 6862
4156
/* 6799 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4157
/* 6802 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6817
4158
/* 6807 */    MCD_OPC_CheckPredicate, 30, 46, 40, 0, // Skip to: 17098
4159
/* 6812 */    MCD_OPC_Decode, 190, 20, 251, 1, // Opcode: SAT_U_W
4160
/* 6817 */    MCD_OPC_FilterValue, 1, 36, 40, 0, // Skip to: 17098
4161
/* 6822 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4162
/* 6825 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6840
4163
/* 6830 */    MCD_OPC_CheckPredicate, 30, 23, 40, 0, // Skip to: 17098
4164
/* 6835 */    MCD_OPC_Decode, 189, 20, 130, 2, // Opcode: SAT_U_H
4165
/* 6840 */    MCD_OPC_FilterValue, 1, 13, 40, 0, // Skip to: 17098
4166
/* 6845 */    MCD_OPC_CheckPredicate, 30, 8, 40, 0, // Skip to: 17098
4167
/* 6850 */    MCD_OPC_CheckField, 19, 1, 0, 1, 40, 0, // Skip to: 17098
4168
/* 6857 */    MCD_OPC_Decode, 187, 20, 131, 2, // Opcode: SAT_U_B
4169
/* 6862 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 6877
4170
/* 6867 */    MCD_OPC_CheckPredicate, 30, 242, 39, 0, // Skip to: 17098
4171
/* 6872 */    MCD_OPC_Decode, 144, 22, 129, 2, // Opcode: SRARI_D
4172
/* 6877 */    MCD_OPC_FilterValue, 5, 63, 0, 0, // Skip to: 6945
4173
/* 6882 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4174
/* 6885 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6900
4175
/* 6890 */    MCD_OPC_CheckPredicate, 30, 219, 39, 0, // Skip to: 17098
4176
/* 6895 */    MCD_OPC_Decode, 146, 22, 251, 1, // Opcode: SRARI_W
4177
/* 6900 */    MCD_OPC_FilterValue, 1, 209, 39, 0, // Skip to: 17098
4178
/* 6905 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4179
/* 6908 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6923
4180
/* 6913 */    MCD_OPC_CheckPredicate, 30, 196, 39, 0, // Skip to: 17098
4181
/* 6918 */    MCD_OPC_Decode, 145, 22, 130, 2, // Opcode: SRARI_H
4182
/* 6923 */    MCD_OPC_FilterValue, 1, 186, 39, 0, // Skip to: 17098
4183
/* 6928 */    MCD_OPC_CheckPredicate, 30, 181, 39, 0, // Skip to: 17098
4184
/* 6933 */    MCD_OPC_CheckField, 19, 1, 0, 174, 39, 0, // Skip to: 17098
4185
/* 6940 */    MCD_OPC_Decode, 143, 22, 131, 2, // Opcode: SRARI_B
4186
/* 6945 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 6960
4187
/* 6950 */    MCD_OPC_CheckPredicate, 30, 159, 39, 0, // Skip to: 17098
4188
/* 6955 */    MCD_OPC_Decode, 169, 22, 129, 2, // Opcode: SRLRI_D
4189
/* 6960 */    MCD_OPC_FilterValue, 7, 149, 39, 0, // Skip to: 17098
4190
/* 6965 */    MCD_OPC_ExtractField, 21, 1,  // Inst{21} ...
4191
/* 6968 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 6983
4192
/* 6973 */    MCD_OPC_CheckPredicate, 30, 136, 39, 0, // Skip to: 17098
4193
/* 6978 */    MCD_OPC_Decode, 171, 22, 251, 1, // Opcode: SRLRI_W
4194
/* 6983 */    MCD_OPC_FilterValue, 1, 126, 39, 0, // Skip to: 17098
4195
/* 6988 */    MCD_OPC_ExtractField, 20, 1,  // Inst{20} ...
4196
/* 6991 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7006
4197
/* 6996 */    MCD_OPC_CheckPredicate, 30, 113, 39, 0, // Skip to: 17098
4198
/* 7001 */    MCD_OPC_Decode, 170, 22, 130, 2, // Opcode: SRLRI_H
4199
/* 7006 */    MCD_OPC_FilterValue, 1, 103, 39, 0, // Skip to: 17098
4200
/* 7011 */    MCD_OPC_CheckPredicate, 30, 98, 39, 0, // Skip to: 17098
4201
/* 7016 */    MCD_OPC_CheckField, 19, 1, 0, 91, 39, 0, // Skip to: 17098
4202
/* 7023 */    MCD_OPC_Decode, 168, 22, 131, 2, // Opcode: SRLRI_B
4203
/* 7028 */    MCD_OPC_FilterValue, 13, 227, 1, 0, // Skip to: 7516
4204
/* 7033 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4205
/* 7036 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7051
4206
/* 7041 */    MCD_OPC_CheckPredicate, 30, 68, 39, 0, // Skip to: 17098
4207
/* 7046 */    MCD_OPC_Decode, 232, 21, 136, 2, // Opcode: SLL_B
4208
/* 7051 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7066
4209
/* 7056 */    MCD_OPC_CheckPredicate, 30, 53, 39, 0, // Skip to: 17098
4210
/* 7061 */    MCD_OPC_Decode, 234, 21, 137, 2, // Opcode: SLL_H
4211
/* 7066 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 7081
4212
/* 7071 */    MCD_OPC_CheckPredicate, 30, 38, 39, 0, // Skip to: 17098
4213
/* 7076 */    MCD_OPC_Decode, 238, 21, 138, 2, // Opcode: SLL_W
4214
/* 7081 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 7096
4215
/* 7086 */    MCD_OPC_CheckPredicate, 30, 23, 39, 0, // Skip to: 17098
4216
/* 7091 */    MCD_OPC_Decode, 233, 21, 139, 2, // Opcode: SLL_D
4217
/* 7096 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 7111
4218
/* 7101 */    MCD_OPC_CheckPredicate, 30, 8, 39, 0, // Skip to: 17098
4219
/* 7106 */    MCD_OPC_Decode, 154, 22, 136, 2, // Opcode: SRA_B
4220
/* 7111 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 7126
4221
/* 7116 */    MCD_OPC_CheckPredicate, 30, 249, 38, 0, // Skip to: 17098
4222
/* 7121 */    MCD_OPC_Decode, 156, 22, 137, 2, // Opcode: SRA_H
4223
/* 7126 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 7141
4224
/* 7131 */    MCD_OPC_CheckPredicate, 30, 234, 38, 0, // Skip to: 17098
4225
/* 7136 */    MCD_OPC_Decode, 159, 22, 138, 2, // Opcode: SRA_W
4226
/* 7141 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 7156
4227
/* 7146 */    MCD_OPC_CheckPredicate, 30, 219, 38, 0, // Skip to: 17098
4228
/* 7151 */    MCD_OPC_Decode, 155, 22, 139, 2, // Opcode: SRA_D
4229
/* 7156 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 7171
4230
/* 7161 */    MCD_OPC_CheckPredicate, 30, 204, 38, 0, // Skip to: 17098
4231
/* 7166 */    MCD_OPC_Decode, 179, 22, 136, 2, // Opcode: SRL_B
4232
/* 7171 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 7186
4233
/* 7176 */    MCD_OPC_CheckPredicate, 30, 189, 38, 0, // Skip to: 17098
4234
/* 7181 */    MCD_OPC_Decode, 181, 22, 137, 2, // Opcode: SRL_H
4235
/* 7186 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 7201
4236
/* 7191 */    MCD_OPC_CheckPredicate, 30, 174, 38, 0, // Skip to: 17098
4237
/* 7196 */    MCD_OPC_Decode, 184, 22, 138, 2, // Opcode: SRL_W
4238
/* 7201 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 7216
4239
/* 7206 */    MCD_OPC_CheckPredicate, 30, 159, 38, 0, // Skip to: 17098
4240
/* 7211 */    MCD_OPC_Decode, 180, 22, 139, 2, // Opcode: SRL_D
4241
/* 7216 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 7231
4242
/* 7221 */    MCD_OPC_CheckPredicate, 30, 144, 38, 0, // Skip to: 17098
4243
/* 7226 */    MCD_OPC_Decode, 182, 7, 136, 2, // Opcode: BCLR_B
4244
/* 7231 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 7246
4245
/* 7236 */    MCD_OPC_CheckPredicate, 30, 129, 38, 0, // Skip to: 17098
4246
/* 7241 */    MCD_OPC_Decode, 184, 7, 137, 2, // Opcode: BCLR_H
4247
/* 7246 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 7261
4248
/* 7251 */    MCD_OPC_CheckPredicate, 30, 114, 38, 0, // Skip to: 17098
4249
/* 7256 */    MCD_OPC_Decode, 185, 7, 138, 2, // Opcode: BCLR_W
4250
/* 7261 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 7276
4251
/* 7266 */    MCD_OPC_CheckPredicate, 30, 99, 38, 0, // Skip to: 17098
4252
/* 7271 */    MCD_OPC_Decode, 183, 7, 139, 2, // Opcode: BCLR_D
4253
/* 7276 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 7291
4254
/* 7281 */    MCD_OPC_CheckPredicate, 30, 84, 38, 0, // Skip to: 17098
4255
/* 7286 */    MCD_OPC_Decode, 225, 8, 136, 2, // Opcode: BSET_B
4256
/* 7291 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 7306
4257
/* 7296 */    MCD_OPC_CheckPredicate, 30, 69, 38, 0, // Skip to: 17098
4258
/* 7301 */    MCD_OPC_Decode, 227, 8, 137, 2, // Opcode: BSET_H
4259
/* 7306 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 7321
4260
/* 7311 */    MCD_OPC_CheckPredicate, 30, 54, 38, 0, // Skip to: 17098
4261
/* 7316 */    MCD_OPC_Decode, 228, 8, 138, 2, // Opcode: BSET_W
4262
/* 7321 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 7336
4263
/* 7326 */    MCD_OPC_CheckPredicate, 30, 39, 38, 0, // Skip to: 17098
4264
/* 7331 */    MCD_OPC_Decode, 226, 8, 139, 2, // Opcode: BSET_D
4265
/* 7336 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 7351
4266
/* 7341 */    MCD_OPC_CheckPredicate, 30, 24, 38, 0, // Skip to: 17098
4267
/* 7346 */    MCD_OPC_Decode, 182, 8, 136, 2, // Opcode: BNEG_B
4268
/* 7351 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 7366
4269
/* 7356 */    MCD_OPC_CheckPredicate, 30, 9, 38, 0, // Skip to: 17098
4270
/* 7361 */    MCD_OPC_Decode, 184, 8, 137, 2, // Opcode: BNEG_H
4271
/* 7366 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 7381
4272
/* 7371 */    MCD_OPC_CheckPredicate, 30, 250, 37, 0, // Skip to: 17098
4273
/* 7376 */    MCD_OPC_Decode, 185, 8, 138, 2, // Opcode: BNEG_W
4274
/* 7381 */    MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 7396
4275
/* 7386 */    MCD_OPC_CheckPredicate, 30, 235, 37, 0, // Skip to: 17098
4276
/* 7391 */    MCD_OPC_Decode, 183, 8, 139, 2, // Opcode: BNEG_D
4277
/* 7396 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 7411
4278
/* 7401 */    MCD_OPC_CheckPredicate, 30, 220, 37, 0, // Skip to: 17098
4279
/* 7406 */    MCD_OPC_Decode, 245, 7, 140, 2, // Opcode: BINSL_B
4280
/* 7411 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 7426
4281
/* 7416 */    MCD_OPC_CheckPredicate, 30, 205, 37, 0, // Skip to: 17098
4282
/* 7421 */    MCD_OPC_Decode, 247, 7, 141, 2, // Opcode: BINSL_H
4283
/* 7426 */    MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 7441
4284
/* 7431 */    MCD_OPC_CheckPredicate, 30, 190, 37, 0, // Skip to: 17098
4285
/* 7436 */    MCD_OPC_Decode, 248, 7, 142, 2, // Opcode: BINSL_W
4286
/* 7441 */    MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 7456
4287
/* 7446 */    MCD_OPC_CheckPredicate, 30, 175, 37, 0, // Skip to: 17098
4288
/* 7451 */    MCD_OPC_Decode, 246, 7, 143, 2, // Opcode: BINSL_D
4289
/* 7456 */    MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 7471
4290
/* 7461 */    MCD_OPC_CheckPredicate, 30, 160, 37, 0, // Skip to: 17098
4291
/* 7466 */    MCD_OPC_Decode, 253, 7, 140, 2, // Opcode: BINSR_B
4292
/* 7471 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 7486
4293
/* 7476 */    MCD_OPC_CheckPredicate, 30, 145, 37, 0, // Skip to: 17098
4294
/* 7481 */    MCD_OPC_Decode, 255, 7, 141, 2, // Opcode: BINSR_H
4295
/* 7486 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 7501
4296
/* 7491 */    MCD_OPC_CheckPredicate, 30, 130, 37, 0, // Skip to: 17098
4297
/* 7496 */    MCD_OPC_Decode, 128, 8, 142, 2, // Opcode: BINSR_W
4298
/* 7501 */    MCD_OPC_FilterValue, 31, 120, 37, 0, // Skip to: 17098
4299
/* 7506 */    MCD_OPC_CheckPredicate, 30, 115, 37, 0, // Skip to: 17098
4300
/* 7511 */    MCD_OPC_Decode, 254, 7, 143, 2, // Opcode: BINSR_D
4301
/* 7516 */    MCD_OPC_FilterValue, 14, 227, 1, 0, // Skip to: 8004
4302
/* 7521 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4303
/* 7524 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 7539
4304
/* 7529 */    MCD_OPC_CheckPredicate, 30, 92, 37, 0, // Skip to: 17098
4305
/* 7534 */    MCD_OPC_Decode, 189, 6, 136, 2, // Opcode: ADDV_B
4306
/* 7539 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 7554
4307
/* 7544 */    MCD_OPC_CheckPredicate, 30, 77, 37, 0, // Skip to: 17098
4308
/* 7549 */    MCD_OPC_Decode, 191, 6, 137, 2, // Opcode: ADDV_H
4309
/* 7554 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 7569
4310
/* 7559 */    MCD_OPC_CheckPredicate, 30, 62, 37, 0, // Skip to: 17098
4311
/* 7564 */    MCD_OPC_Decode, 192, 6, 138, 2, // Opcode: ADDV_W
4312
/* 7569 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 7584
4313
/* 7574 */    MCD_OPC_CheckPredicate, 30, 47, 37, 0, // Skip to: 17098
4314
/* 7579 */    MCD_OPC_Decode, 190, 6, 139, 2, // Opcode: ADDV_D
4315
/* 7584 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 7599
4316
/* 7589 */    MCD_OPC_CheckPredicate, 30, 32, 37, 0, // Skip to: 17098
4317
/* 7594 */    MCD_OPC_Decode, 242, 22, 136, 2, // Opcode: SUBV_B
4318
/* 7599 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 7614
4319
/* 7604 */    MCD_OPC_CheckPredicate, 30, 17, 37, 0, // Skip to: 17098
4320
/* 7609 */    MCD_OPC_Decode, 244, 22, 137, 2, // Opcode: SUBV_H
4321
/* 7614 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 7629
4322
/* 7619 */    MCD_OPC_CheckPredicate, 30, 2, 37, 0, // Skip to: 17098
4323
/* 7624 */    MCD_OPC_Decode, 245, 22, 138, 2, // Opcode: SUBV_W
4324
/* 7629 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 7644
4325
/* 7634 */    MCD_OPC_CheckPredicate, 30, 243, 36, 0, // Skip to: 17098
4326
/* 7639 */    MCD_OPC_Decode, 243, 22, 139, 2, // Opcode: SUBV_D
4327
/* 7644 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 7659
4328
/* 7649 */    MCD_OPC_CheckPredicate, 30, 228, 36, 0, // Skip to: 17098
4329
/* 7654 */    MCD_OPC_Decode, 247, 16, 136, 2, // Opcode: MAX_S_B
4330
/* 7659 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 7674
4331
/* 7664 */    MCD_OPC_CheckPredicate, 30, 213, 36, 0, // Skip to: 17098
4332
/* 7669 */    MCD_OPC_Decode, 249, 16, 137, 2, // Opcode: MAX_S_H
4333
/* 7674 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 7689
4334
/* 7679 */    MCD_OPC_CheckPredicate, 30, 198, 36, 0, // Skip to: 17098
4335
/* 7684 */    MCD_OPC_Decode, 251, 16, 138, 2, // Opcode: MAX_S_W
4336
/* 7689 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 7704
4337
/* 7694 */    MCD_OPC_CheckPredicate, 30, 183, 36, 0, // Skip to: 17098
4338
/* 7699 */    MCD_OPC_Decode, 248, 16, 139, 2, // Opcode: MAX_S_D
4339
/* 7704 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 7719
4340
/* 7709 */    MCD_OPC_CheckPredicate, 30, 168, 36, 0, // Skip to: 17098
4341
/* 7714 */    MCD_OPC_Decode, 252, 16, 136, 2, // Opcode: MAX_U_B
4342
/* 7719 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 7734
4343
/* 7724 */    MCD_OPC_CheckPredicate, 30, 153, 36, 0, // Skip to: 17098
4344
/* 7729 */    MCD_OPC_Decode, 254, 16, 137, 2, // Opcode: MAX_U_H
4345
/* 7734 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 7749
4346
/* 7739 */    MCD_OPC_CheckPredicate, 30, 138, 36, 0, // Skip to: 17098
4347
/* 7744 */    MCD_OPC_Decode, 255, 16, 138, 2, // Opcode: MAX_U_W
4348
/* 7749 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 7764
4349
/* 7754 */    MCD_OPC_CheckPredicate, 30, 123, 36, 0, // Skip to: 17098
4350
/* 7759 */    MCD_OPC_Decode, 253, 16, 139, 2, // Opcode: MAX_U_D
4351
/* 7764 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 7779
4352
/* 7769 */    MCD_OPC_CheckPredicate, 30, 108, 36, 0, // Skip to: 17098
4353
/* 7774 */    MCD_OPC_Decode, 183, 17, 136, 2, // Opcode: MIN_S_B
4354
/* 7779 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 7794
4355
/* 7784 */    MCD_OPC_CheckPredicate, 30, 93, 36, 0, // Skip to: 17098
4356
/* 7789 */    MCD_OPC_Decode, 185, 17, 137, 2, // Opcode: MIN_S_H
4357
/* 7794 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 7809
4358
/* 7799 */    MCD_OPC_CheckPredicate, 30, 78, 36, 0, // Skip to: 17098
4359
/* 7804 */    MCD_OPC_Decode, 187, 17, 138, 2, // Opcode: MIN_S_W
4360
/* 7809 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 7824
4361
/* 7814 */    MCD_OPC_CheckPredicate, 30, 63, 36, 0, // Skip to: 17098
4362
/* 7819 */    MCD_OPC_Decode, 184, 17, 139, 2, // Opcode: MIN_S_D
4363
/* 7824 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 7839
4364
/* 7829 */    MCD_OPC_CheckPredicate, 30, 48, 36, 0, // Skip to: 17098
4365
/* 7834 */    MCD_OPC_Decode, 188, 17, 136, 2, // Opcode: MIN_U_B
4366
/* 7839 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 7854
4367
/* 7844 */    MCD_OPC_CheckPredicate, 30, 33, 36, 0, // Skip to: 17098
4368
/* 7849 */    MCD_OPC_Decode, 190, 17, 137, 2, // Opcode: MIN_U_H
4369
/* 7854 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 7869
4370
/* 7859 */    MCD_OPC_CheckPredicate, 30, 18, 36, 0, // Skip to: 17098
4371
/* 7864 */    MCD_OPC_Decode, 191, 17, 138, 2, // Opcode: MIN_U_W
4372
/* 7869 */    MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 7884
4373
/* 7874 */    MCD_OPC_CheckPredicate, 30, 3, 36, 0, // Skip to: 17098
4374
/* 7879 */    MCD_OPC_Decode, 189, 17, 139, 2, // Opcode: MIN_U_D
4375
/* 7884 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 7899
4376
/* 7889 */    MCD_OPC_CheckPredicate, 30, 244, 35, 0, // Skip to: 17098
4377
/* 7894 */    MCD_OPC_Decode, 240, 16, 136, 2, // Opcode: MAX_A_B
4378
/* 7899 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 7914
4379
/* 7904 */    MCD_OPC_CheckPredicate, 30, 229, 35, 0, // Skip to: 17098
4380
/* 7909 */    MCD_OPC_Decode, 242, 16, 137, 2, // Opcode: MAX_A_H
4381
/* 7914 */    MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 7929
4382
/* 7919 */    MCD_OPC_CheckPredicate, 30, 214, 35, 0, // Skip to: 17098
4383
/* 7924 */    MCD_OPC_Decode, 243, 16, 138, 2, // Opcode: MAX_A_W
4384
/* 7929 */    MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 7944
4385
/* 7934 */    MCD_OPC_CheckPredicate, 30, 199, 35, 0, // Skip to: 17098
4386
/* 7939 */    MCD_OPC_Decode, 241, 16, 139, 2, // Opcode: MAX_A_D
4387
/* 7944 */    MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 7959
4388
/* 7949 */    MCD_OPC_CheckPredicate, 30, 184, 35, 0, // Skip to: 17098
4389
/* 7954 */    MCD_OPC_Decode, 176, 17, 136, 2, // Opcode: MIN_A_B
4390
/* 7959 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 7974
4391
/* 7964 */    MCD_OPC_CheckPredicate, 30, 169, 35, 0, // Skip to: 17098
4392
/* 7969 */    MCD_OPC_Decode, 178, 17, 137, 2, // Opcode: MIN_A_H
4393
/* 7974 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 7989
4394
/* 7979 */    MCD_OPC_CheckPredicate, 30, 154, 35, 0, // Skip to: 17098
4395
/* 7984 */    MCD_OPC_Decode, 179, 17, 138, 2, // Opcode: MIN_A_W
4396
/* 7989 */    MCD_OPC_FilterValue, 31, 144, 35, 0, // Skip to: 17098
4397
/* 7994 */    MCD_OPC_CheckPredicate, 30, 139, 35, 0, // Skip to: 17098
4398
/* 7999 */    MCD_OPC_Decode, 177, 17, 139, 2, // Opcode: MIN_A_D
4399
/* 8004 */    MCD_OPC_FilterValue, 15, 47, 1, 0, // Skip to: 8312
4400
/* 8009 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4401
/* 8012 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 8027
4402
/* 8017 */    MCD_OPC_CheckPredicate, 30, 116, 35, 0, // Skip to: 17098
4403
/* 8022 */    MCD_OPC_Decode, 140, 9, 136, 2, // Opcode: CEQ_B
4404
/* 8027 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 8042
4405
/* 8032 */    MCD_OPC_CheckPredicate, 30, 101, 35, 0, // Skip to: 17098
4406
/* 8037 */    MCD_OPC_Decode, 142, 9, 137, 2, // Opcode: CEQ_H
4407
/* 8042 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 8057
4408
/* 8047 */    MCD_OPC_CheckPredicate, 30, 86, 35, 0, // Skip to: 17098
4409
/* 8052 */    MCD_OPC_Decode, 143, 9, 138, 2, // Opcode: CEQ_W
4410
/* 8057 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 8072
4411
/* 8062 */    MCD_OPC_CheckPredicate, 30, 71, 35, 0, // Skip to: 17098
4412
/* 8067 */    MCD_OPC_Decode, 141, 9, 139, 2, // Opcode: CEQ_D
4413
/* 8072 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 8087
4414
/* 8077 */    MCD_OPC_CheckPredicate, 30, 56, 35, 0, // Skip to: 17098
4415
/* 8082 */    MCD_OPC_Decode, 185, 9, 136, 2, // Opcode: CLT_S_B
4416
/* 8087 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 8102
4417
/* 8092 */    MCD_OPC_CheckPredicate, 30, 41, 35, 0, // Skip to: 17098
4418
/* 8097 */    MCD_OPC_Decode, 187, 9, 137, 2, // Opcode: CLT_S_H
4419
/* 8102 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 8117
4420
/* 8107 */    MCD_OPC_CheckPredicate, 30, 26, 35, 0, // Skip to: 17098
4421
/* 8112 */    MCD_OPC_Decode, 188, 9, 138, 2, // Opcode: CLT_S_W
4422
/* 8117 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 8132
4423
/* 8122 */    MCD_OPC_CheckPredicate, 30, 11, 35, 0, // Skip to: 17098
4424
/* 8127 */    MCD_OPC_Decode, 186, 9, 139, 2, // Opcode: CLT_S_D
4425
/* 8132 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 8147
4426
/* 8137 */    MCD_OPC_CheckPredicate, 30, 252, 34, 0, // Skip to: 17098
4427
/* 8142 */    MCD_OPC_Decode, 189, 9, 136, 2, // Opcode: CLT_U_B
4428
/* 8147 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 8162
4429
/* 8152 */    MCD_OPC_CheckPredicate, 30, 237, 34, 0, // Skip to: 17098
4430
/* 8157 */    MCD_OPC_Decode, 191, 9, 137, 2, // Opcode: CLT_U_H
4431
/* 8162 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 8177
4432
/* 8167 */    MCD_OPC_CheckPredicate, 30, 222, 34, 0, // Skip to: 17098
4433
/* 8172 */    MCD_OPC_Decode, 192, 9, 138, 2, // Opcode: CLT_U_W
4434
/* 8177 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 8192
4435
/* 8182 */    MCD_OPC_CheckPredicate, 30, 207, 34, 0, // Skip to: 17098
4436
/* 8187 */    MCD_OPC_Decode, 190, 9, 139, 2, // Opcode: CLT_U_D
4437
/* 8192 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 8207
4438
/* 8197 */    MCD_OPC_CheckPredicate, 30, 192, 34, 0, // Skip to: 17098
4439
/* 8202 */    MCD_OPC_Decode, 164, 9, 136, 2, // Opcode: CLE_S_B
4440
/* 8207 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 8222
4441
/* 8212 */    MCD_OPC_CheckPredicate, 30, 177, 34, 0, // Skip to: 17098
4442
/* 8217 */    MCD_OPC_Decode, 166, 9, 137, 2, // Opcode: CLE_S_H
4443
/* 8222 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 8237
4444
/* 8227 */    MCD_OPC_CheckPredicate, 30, 162, 34, 0, // Skip to: 17098
4445
/* 8232 */    MCD_OPC_Decode, 167, 9, 138, 2, // Opcode: CLE_S_W
4446
/* 8237 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 8252
4447
/* 8242 */    MCD_OPC_CheckPredicate, 30, 147, 34, 0, // Skip to: 17098
4448
/* 8247 */    MCD_OPC_Decode, 165, 9, 139, 2, // Opcode: CLE_S_D
4449
/* 8252 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 8267
4450
/* 8257 */    MCD_OPC_CheckPredicate, 30, 132, 34, 0, // Skip to: 17098
4451
/* 8262 */    MCD_OPC_Decode, 168, 9, 136, 2, // Opcode: CLE_U_B
4452
/* 8267 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 8282
4453
/* 8272 */    MCD_OPC_CheckPredicate, 30, 117, 34, 0, // Skip to: 17098
4454
/* 8277 */    MCD_OPC_Decode, 170, 9, 137, 2, // Opcode: CLE_U_H
4455
/* 8282 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 8297
4456
/* 8287 */    MCD_OPC_CheckPredicate, 30, 102, 34, 0, // Skip to: 17098
4457
/* 8292 */    MCD_OPC_Decode, 171, 9, 138, 2, // Opcode: CLE_U_W
4458
/* 8297 */    MCD_OPC_FilterValue, 23, 92, 34, 0, // Skip to: 17098
4459
/* 8302 */    MCD_OPC_CheckPredicate, 30, 87, 34, 0, // Skip to: 17098
4460
/* 8307 */    MCD_OPC_Decode, 169, 9, 139, 2, // Opcode: CLE_U_D
4461
/* 8312 */    MCD_OPC_FilterValue, 16, 227, 1, 0, // Skip to: 8800
4462
/* 8317 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4463
/* 8320 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 8335
4464
/* 8325 */    MCD_OPC_CheckPredicate, 30, 64, 34, 0, // Skip to: 17098
4465
/* 8330 */    MCD_OPC_Decode, 195, 6, 136, 2, // Opcode: ADD_A_B
4466
/* 8335 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 8350
4467
/* 8340 */    MCD_OPC_CheckPredicate, 30, 49, 34, 0, // Skip to: 17098
4468
/* 8345 */    MCD_OPC_Decode, 197, 6, 137, 2, // Opcode: ADD_A_H
4469
/* 8350 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 8365
4470
/* 8355 */    MCD_OPC_CheckPredicate, 30, 34, 34, 0, // Skip to: 17098
4471
/* 8360 */    MCD_OPC_Decode, 198, 6, 138, 2, // Opcode: ADD_A_W
4472
/* 8365 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 8380
4473
/* 8370 */    MCD_OPC_CheckPredicate, 30, 19, 34, 0, // Skip to: 17098
4474
/* 8375 */    MCD_OPC_Decode, 196, 6, 139, 2, // Opcode: ADD_A_D
4475
/* 8380 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 8395
4476
/* 8385 */    MCD_OPC_CheckPredicate, 30, 4, 34, 0, // Skip to: 17098
4477
/* 8390 */    MCD_OPC_Decode, 158, 6, 136, 2, // Opcode: ADDS_A_B
4478
/* 8395 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 8410
4479
/* 8400 */    MCD_OPC_CheckPredicate, 30, 245, 33, 0, // Skip to: 17098
4480
/* 8405 */    MCD_OPC_Decode, 160, 6, 137, 2, // Opcode: ADDS_A_H
4481
/* 8410 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 8425
4482
/* 8415 */    MCD_OPC_CheckPredicate, 30, 230, 33, 0, // Skip to: 17098
4483
/* 8420 */    MCD_OPC_Decode, 161, 6, 138, 2, // Opcode: ADDS_A_W
4484
/* 8425 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 8440
4485
/* 8430 */    MCD_OPC_CheckPredicate, 30, 215, 33, 0, // Skip to: 17098
4486
/* 8435 */    MCD_OPC_Decode, 159, 6, 139, 2, // Opcode: ADDS_A_D
4487
/* 8440 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 8455
4488
/* 8445 */    MCD_OPC_CheckPredicate, 30, 200, 33, 0, // Skip to: 17098
4489
/* 8450 */    MCD_OPC_Decode, 162, 6, 136, 2, // Opcode: ADDS_S_B
4490
/* 8455 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 8470
4491
/* 8460 */    MCD_OPC_CheckPredicate, 30, 185, 33, 0, // Skip to: 17098
4492
/* 8465 */    MCD_OPC_Decode, 164, 6, 137, 2, // Opcode: ADDS_S_H
4493
/* 8470 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 8485
4494
/* 8475 */    MCD_OPC_CheckPredicate, 30, 170, 33, 0, // Skip to: 17098
4495
/* 8480 */    MCD_OPC_Decode, 165, 6, 138, 2, // Opcode: ADDS_S_W
4496
/* 8485 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 8500
4497
/* 8490 */    MCD_OPC_CheckPredicate, 30, 155, 33, 0, // Skip to: 17098
4498
/* 8495 */    MCD_OPC_Decode, 163, 6, 139, 2, // Opcode: ADDS_S_D
4499
/* 8500 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 8515
4500
/* 8505 */    MCD_OPC_CheckPredicate, 30, 140, 33, 0, // Skip to: 17098
4501
/* 8510 */    MCD_OPC_Decode, 166, 6, 136, 2, // Opcode: ADDS_U_B
4502
/* 8515 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 8530
4503
/* 8520 */    MCD_OPC_CheckPredicate, 30, 125, 33, 0, // Skip to: 17098
4504
/* 8525 */    MCD_OPC_Decode, 168, 6, 137, 2, // Opcode: ADDS_U_H
4505
/* 8530 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 8545
4506
/* 8535 */    MCD_OPC_CheckPredicate, 30, 110, 33, 0, // Skip to: 17098
4507
/* 8540 */    MCD_OPC_Decode, 169, 6, 138, 2, // Opcode: ADDS_U_W
4508
/* 8545 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 8560
4509
/* 8550 */    MCD_OPC_CheckPredicate, 30, 95, 33, 0, // Skip to: 17098
4510
/* 8555 */    MCD_OPC_Decode, 167, 6, 139, 2, // Opcode: ADDS_U_D
4511
/* 8560 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 8575
4512
/* 8565 */    MCD_OPC_CheckPredicate, 30, 80, 33, 0, // Skip to: 17098
4513
/* 8570 */    MCD_OPC_Decode, 128, 7, 136, 2, // Opcode: AVE_S_B
4514
/* 8575 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 8590
4515
/* 8580 */    MCD_OPC_CheckPredicate, 30, 65, 33, 0, // Skip to: 17098
4516
/* 8585 */    MCD_OPC_Decode, 130, 7, 137, 2, // Opcode: AVE_S_H
4517
/* 8590 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 8605
4518
/* 8595 */    MCD_OPC_CheckPredicate, 30, 50, 33, 0, // Skip to: 17098
4519
/* 8600 */    MCD_OPC_Decode, 131, 7, 138, 2, // Opcode: AVE_S_W
4520
/* 8605 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 8620
4521
/* 8610 */    MCD_OPC_CheckPredicate, 30, 35, 33, 0, // Skip to: 17098
4522
/* 8615 */    MCD_OPC_Decode, 129, 7, 139, 2, // Opcode: AVE_S_D
4523
/* 8620 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 8635
4524
/* 8625 */    MCD_OPC_CheckPredicate, 30, 20, 33, 0, // Skip to: 17098
4525
/* 8630 */    MCD_OPC_Decode, 132, 7, 136, 2, // Opcode: AVE_U_B
4526
/* 8635 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 8650
4527
/* 8640 */    MCD_OPC_CheckPredicate, 30, 5, 33, 0, // Skip to: 17098
4528
/* 8645 */    MCD_OPC_Decode, 134, 7, 137, 2, // Opcode: AVE_U_H
4529
/* 8650 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 8665
4530
/* 8655 */    MCD_OPC_CheckPredicate, 30, 246, 32, 0, // Skip to: 17098
4531
/* 8660 */    MCD_OPC_Decode, 135, 7, 138, 2, // Opcode: AVE_U_W
4532
/* 8665 */    MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 8680
4533
/* 8670 */    MCD_OPC_CheckPredicate, 30, 231, 32, 0, // Skip to: 17098
4534
/* 8675 */    MCD_OPC_Decode, 133, 7, 139, 2, // Opcode: AVE_U_D
4535
/* 8680 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 8695
4536
/* 8685 */    MCD_OPC_CheckPredicate, 30, 216, 32, 0, // Skip to: 17098
4537
/* 8690 */    MCD_OPC_Decode, 248, 6, 136, 2, // Opcode: AVER_S_B
4538
/* 8695 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 8710
4539
/* 8700 */    MCD_OPC_CheckPredicate, 30, 201, 32, 0, // Skip to: 17098
4540
/* 8705 */    MCD_OPC_Decode, 250, 6, 137, 2, // Opcode: AVER_S_H
4541
/* 8710 */    MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 8725
4542
/* 8715 */    MCD_OPC_CheckPredicate, 30, 186, 32, 0, // Skip to: 17098
4543
/* 8720 */    MCD_OPC_Decode, 251, 6, 138, 2, // Opcode: AVER_S_W
4544
/* 8725 */    MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 8740
4545
/* 8730 */    MCD_OPC_CheckPredicate, 30, 171, 32, 0, // Skip to: 17098
4546
/* 8735 */    MCD_OPC_Decode, 249, 6, 139, 2, // Opcode: AVER_S_D
4547
/* 8740 */    MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 8755
4548
/* 8745 */    MCD_OPC_CheckPredicate, 30, 156, 32, 0, // Skip to: 17098
4549
/* 8750 */    MCD_OPC_Decode, 252, 6, 136, 2, // Opcode: AVER_U_B
4550
/* 8755 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 8770
4551
/* 8760 */    MCD_OPC_CheckPredicate, 30, 141, 32, 0, // Skip to: 17098
4552
/* 8765 */    MCD_OPC_Decode, 254, 6, 137, 2, // Opcode: AVER_U_H
4553
/* 8770 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 8785
4554
/* 8775 */    MCD_OPC_CheckPredicate, 30, 126, 32, 0, // Skip to: 17098
4555
/* 8780 */    MCD_OPC_Decode, 255, 6, 138, 2, // Opcode: AVER_U_W
4556
/* 8785 */    MCD_OPC_FilterValue, 31, 116, 32, 0, // Skip to: 17098
4557
/* 8790 */    MCD_OPC_CheckPredicate, 30, 111, 32, 0, // Skip to: 17098
4558
/* 8795 */    MCD_OPC_Decode, 253, 6, 139, 2, // Opcode: AVER_U_D
4559
/* 8800 */    MCD_OPC_FilterValue, 17, 107, 1, 0, // Skip to: 9168
4560
/* 8805 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4561
/* 8808 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 8823
4562
/* 8813 */    MCD_OPC_CheckPredicate, 30, 88, 32, 0, // Skip to: 17098
4563
/* 8818 */    MCD_OPC_Decode, 215, 22, 136, 2, // Opcode: SUBS_S_B
4564
/* 8823 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 8838
4565
/* 8828 */    MCD_OPC_CheckPredicate, 30, 73, 32, 0, // Skip to: 17098
4566
/* 8833 */    MCD_OPC_Decode, 217, 22, 137, 2, // Opcode: SUBS_S_H
4567
/* 8838 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 8853
4568
/* 8843 */    MCD_OPC_CheckPredicate, 30, 58, 32, 0, // Skip to: 17098
4569
/* 8848 */    MCD_OPC_Decode, 218, 22, 138, 2, // Opcode: SUBS_S_W
4570
/* 8853 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 8868
4571
/* 8858 */    MCD_OPC_CheckPredicate, 30, 43, 32, 0, // Skip to: 17098
4572
/* 8863 */    MCD_OPC_Decode, 216, 22, 139, 2, // Opcode: SUBS_S_D
4573
/* 8868 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 8883
4574
/* 8873 */    MCD_OPC_CheckPredicate, 30, 28, 32, 0, // Skip to: 17098
4575
/* 8878 */    MCD_OPC_Decode, 219, 22, 136, 2, // Opcode: SUBS_U_B
4576
/* 8883 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 8898
4577
/* 8888 */    MCD_OPC_CheckPredicate, 30, 13, 32, 0, // Skip to: 17098
4578
/* 8893 */    MCD_OPC_Decode, 221, 22, 137, 2, // Opcode: SUBS_U_H
4579
/* 8898 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 8913
4580
/* 8903 */    MCD_OPC_CheckPredicate, 30, 254, 31, 0, // Skip to: 17098
4581
/* 8908 */    MCD_OPC_Decode, 222, 22, 138, 2, // Opcode: SUBS_U_W
4582
/* 8913 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 8928
4583
/* 8918 */    MCD_OPC_CheckPredicate, 30, 239, 31, 0, // Skip to: 17098
4584
/* 8923 */    MCD_OPC_Decode, 220, 22, 139, 2, // Opcode: SUBS_U_D
4585
/* 8928 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 8943
4586
/* 8933 */    MCD_OPC_CheckPredicate, 30, 224, 31, 0, // Skip to: 17098
4587
/* 8938 */    MCD_OPC_Decode, 207, 22, 136, 2, // Opcode: SUBSUS_U_B
4588
/* 8943 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 8958
4589
/* 8948 */    MCD_OPC_CheckPredicate, 30, 209, 31, 0, // Skip to: 17098
4590
/* 8953 */    MCD_OPC_Decode, 209, 22, 137, 2, // Opcode: SUBSUS_U_H
4591
/* 8958 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 8973
4592
/* 8963 */    MCD_OPC_CheckPredicate, 30, 194, 31, 0, // Skip to: 17098
4593
/* 8968 */    MCD_OPC_Decode, 210, 22, 138, 2, // Opcode: SUBSUS_U_W
4594
/* 8973 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 8988
4595
/* 8978 */    MCD_OPC_CheckPredicate, 30, 179, 31, 0, // Skip to: 17098
4596
/* 8983 */    MCD_OPC_Decode, 208, 22, 139, 2, // Opcode: SUBSUS_U_D
4597
/* 8988 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 9003
4598
/* 8993 */    MCD_OPC_CheckPredicate, 30, 164, 31, 0, // Skip to: 17098
4599
/* 8998 */    MCD_OPC_Decode, 211, 22, 136, 2, // Opcode: SUBSUU_S_B
4600
/* 9003 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 9018
4601
/* 9008 */    MCD_OPC_CheckPredicate, 30, 149, 31, 0, // Skip to: 17098
4602
/* 9013 */    MCD_OPC_Decode, 213, 22, 137, 2, // Opcode: SUBSUU_S_H
4603
/* 9018 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 9033
4604
/* 9023 */    MCD_OPC_CheckPredicate, 30, 134, 31, 0, // Skip to: 17098
4605
/* 9028 */    MCD_OPC_Decode, 214, 22, 138, 2, // Opcode: SUBSUU_S_W
4606
/* 9033 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 9048
4607
/* 9038 */    MCD_OPC_CheckPredicate, 30, 119, 31, 0, // Skip to: 17098
4608
/* 9043 */    MCD_OPC_Decode, 212, 22, 139, 2, // Opcode: SUBSUU_S_D
4609
/* 9048 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 9063
4610
/* 9053 */    MCD_OPC_CheckPredicate, 30, 104, 31, 0, // Skip to: 17098
4611
/* 9058 */    MCD_OPC_Decode, 236, 6, 136, 2, // Opcode: ASUB_S_B
4612
/* 9063 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 9078
4613
/* 9068 */    MCD_OPC_CheckPredicate, 30, 89, 31, 0, // Skip to: 17098
4614
/* 9073 */    MCD_OPC_Decode, 238, 6, 137, 2, // Opcode: ASUB_S_H
4615
/* 9078 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 9093
4616
/* 9083 */    MCD_OPC_CheckPredicate, 30, 74, 31, 0, // Skip to: 17098
4617
/* 9088 */    MCD_OPC_Decode, 239, 6, 138, 2, // Opcode: ASUB_S_W
4618
/* 9093 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 9108
4619
/* 9098 */    MCD_OPC_CheckPredicate, 30, 59, 31, 0, // Skip to: 17098
4620
/* 9103 */    MCD_OPC_Decode, 237, 6, 139, 2, // Opcode: ASUB_S_D
4621
/* 9108 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 9123
4622
/* 9113 */    MCD_OPC_CheckPredicate, 30, 44, 31, 0, // Skip to: 17098
4623
/* 9118 */    MCD_OPC_Decode, 240, 6, 136, 2, // Opcode: ASUB_U_B
4624
/* 9123 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 9138
4625
/* 9128 */    MCD_OPC_CheckPredicate, 30, 29, 31, 0, // Skip to: 17098
4626
/* 9133 */    MCD_OPC_Decode, 242, 6, 137, 2, // Opcode: ASUB_U_H
4627
/* 9138 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 9153
4628
/* 9143 */    MCD_OPC_CheckPredicate, 30, 14, 31, 0, // Skip to: 17098
4629
/* 9148 */    MCD_OPC_Decode, 243, 6, 138, 2, // Opcode: ASUB_U_W
4630
/* 9153 */    MCD_OPC_FilterValue, 23, 4, 31, 0, // Skip to: 17098
4631
/* 9158 */    MCD_OPC_CheckPredicate, 30, 255, 30, 0, // Skip to: 17098
4632
/* 9163 */    MCD_OPC_Decode, 241, 6, 139, 2, // Opcode: ASUB_U_D
4633
/* 9168 */    MCD_OPC_FilterValue, 18, 167, 1, 0, // Skip to: 9596
4634
/* 9173 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4635
/* 9176 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 9191
4636
/* 9181 */    MCD_OPC_CheckPredicate, 30, 232, 30, 0, // Skip to: 17098
4637
/* 9186 */    MCD_OPC_Decode, 241, 18, 136, 2, // Opcode: MULV_B
4638
/* 9191 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 9206
4639
/* 9196 */    MCD_OPC_CheckPredicate, 30, 217, 30, 0, // Skip to: 17098
4640
/* 9201 */    MCD_OPC_Decode, 243, 18, 137, 2, // Opcode: MULV_H
4641
/* 9206 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 9221
4642
/* 9211 */    MCD_OPC_CheckPredicate, 30, 202, 30, 0, // Skip to: 17098
4643
/* 9216 */    MCD_OPC_Decode, 244, 18, 138, 2, // Opcode: MULV_W
4644
/* 9221 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 9236
4645
/* 9226 */    MCD_OPC_CheckPredicate, 30, 187, 30, 0, // Skip to: 17098
4646
/* 9231 */    MCD_OPC_Decode, 242, 18, 139, 2, // Opcode: MULV_D
4647
/* 9236 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 9251
4648
/* 9241 */    MCD_OPC_CheckPredicate, 30, 172, 30, 0, // Skip to: 17098
4649
/* 9246 */    MCD_OPC_Decode, 206, 16, 140, 2, // Opcode: MADDV_B
4650
/* 9251 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 9266
4651
/* 9256 */    MCD_OPC_CheckPredicate, 30, 157, 30, 0, // Skip to: 17098
4652
/* 9261 */    MCD_OPC_Decode, 208, 16, 141, 2, // Opcode: MADDV_H
4653
/* 9266 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 9281
4654
/* 9271 */    MCD_OPC_CheckPredicate, 30, 142, 30, 0, // Skip to: 17098
4655
/* 9276 */    MCD_OPC_Decode, 209, 16, 142, 2, // Opcode: MADDV_W
4656
/* 9281 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 9296
4657
/* 9286 */    MCD_OPC_CheckPredicate, 30, 127, 30, 0, // Skip to: 17098
4658
/* 9291 */    MCD_OPC_Decode, 207, 16, 143, 2, // Opcode: MADDV_D
4659
/* 9296 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 9311
4660
/* 9301 */    MCD_OPC_CheckPredicate, 30, 112, 30, 0, // Skip to: 17098
4661
/* 9306 */    MCD_OPC_Decode, 142, 18, 140, 2, // Opcode: MSUBV_B
4662
/* 9311 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 9326
4663
/* 9316 */    MCD_OPC_CheckPredicate, 30, 97, 30, 0, // Skip to: 17098
4664
/* 9321 */    MCD_OPC_Decode, 144, 18, 141, 2, // Opcode: MSUBV_H
4665
/* 9326 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 9341
4666
/* 9331 */    MCD_OPC_CheckPredicate, 30, 82, 30, 0, // Skip to: 17098
4667
/* 9336 */    MCD_OPC_Decode, 145, 18, 142, 2, // Opcode: MSUBV_W
4668
/* 9341 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 9356
4669
/* 9346 */    MCD_OPC_CheckPredicate, 30, 67, 30, 0, // Skip to: 17098
4670
/* 9351 */    MCD_OPC_Decode, 143, 18, 143, 2, // Opcode: MSUBV_D
4671
/* 9356 */    MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 9371
4672
/* 9361 */    MCD_OPC_CheckPredicate, 30, 52, 30, 0, // Skip to: 17098
4673
/* 9366 */    MCD_OPC_Decode, 224, 11, 136, 2, // Opcode: DIV_S_B
4674
/* 9371 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 9386
4675
/* 9376 */    MCD_OPC_CheckPredicate, 30, 37, 30, 0, // Skip to: 17098
4676
/* 9381 */    MCD_OPC_Decode, 226, 11, 137, 2, // Opcode: DIV_S_H
4677
/* 9386 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 9401
4678
/* 9391 */    MCD_OPC_CheckPredicate, 30, 22, 30, 0, // Skip to: 17098
4679
/* 9396 */    MCD_OPC_Decode, 227, 11, 138, 2, // Opcode: DIV_S_W
4680
/* 9401 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 9416
4681
/* 9406 */    MCD_OPC_CheckPredicate, 30, 7, 30, 0, // Skip to: 17098
4682
/* 9411 */    MCD_OPC_Decode, 225, 11, 139, 2, // Opcode: DIV_S_D
4683
/* 9416 */    MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 9431
4684
/* 9421 */    MCD_OPC_CheckPredicate, 30, 248, 29, 0, // Skip to: 17098
4685
/* 9426 */    MCD_OPC_Decode, 228, 11, 136, 2, // Opcode: DIV_U_B
4686
/* 9431 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 9446
4687
/* 9436 */    MCD_OPC_CheckPredicate, 30, 233, 29, 0, // Skip to: 17098
4688
/* 9441 */    MCD_OPC_Decode, 230, 11, 137, 2, // Opcode: DIV_U_H
4689
/* 9446 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 9461
4690
/* 9451 */    MCD_OPC_CheckPredicate, 30, 218, 29, 0, // Skip to: 17098
4691
/* 9456 */    MCD_OPC_Decode, 231, 11, 138, 2, // Opcode: DIV_U_W
4692
/* 9461 */    MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 9476
4693
/* 9466 */    MCD_OPC_CheckPredicate, 30, 203, 29, 0, // Skip to: 17098
4694
/* 9471 */    MCD_OPC_Decode, 229, 11, 139, 2, // Opcode: DIV_U_D
4695
/* 9476 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 9491
4696
/* 9481 */    MCD_OPC_CheckPredicate, 30, 188, 29, 0, // Skip to: 17098
4697
/* 9486 */    MCD_OPC_Decode, 200, 17, 136, 2, // Opcode: MOD_S_B
4698
/* 9491 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 9506
4699
/* 9496 */    MCD_OPC_CheckPredicate, 30, 173, 29, 0, // Skip to: 17098
4700
/* 9501 */    MCD_OPC_Decode, 202, 17, 137, 2, // Opcode: MOD_S_H
4701
/* 9506 */    MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 9521
4702
/* 9511 */    MCD_OPC_CheckPredicate, 30, 158, 29, 0, // Skip to: 17098
4703
/* 9516 */    MCD_OPC_Decode, 203, 17, 138, 2, // Opcode: MOD_S_W
4704
/* 9521 */    MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 9536
4705
/* 9526 */    MCD_OPC_CheckPredicate, 30, 143, 29, 0, // Skip to: 17098
4706
/* 9531 */    MCD_OPC_Decode, 201, 17, 139, 2, // Opcode: MOD_S_D
4707
/* 9536 */    MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 9551
4708
/* 9541 */    MCD_OPC_CheckPredicate, 30, 128, 29, 0, // Skip to: 17098
4709
/* 9546 */    MCD_OPC_Decode, 204, 17, 136, 2, // Opcode: MOD_U_B
4710
/* 9551 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 9566
4711
/* 9556 */    MCD_OPC_CheckPredicate, 30, 113, 29, 0, // Skip to: 17098
4712
/* 9561 */    MCD_OPC_Decode, 206, 17, 137, 2, // Opcode: MOD_U_H
4713
/* 9566 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 9581
4714
/* 9571 */    MCD_OPC_CheckPredicate, 30, 98, 29, 0, // Skip to: 17098
4715
/* 9576 */    MCD_OPC_Decode, 207, 17, 138, 2, // Opcode: MOD_U_W
4716
/* 9581 */    MCD_OPC_FilterValue, 31, 88, 29, 0, // Skip to: 17098
4717
/* 9586 */    MCD_OPC_CheckPredicate, 30, 83, 29, 0, // Skip to: 17098
4718
/* 9591 */    MCD_OPC_Decode, 205, 17, 139, 2, // Opcode: MOD_U_D
4719
/* 9596 */    MCD_OPC_FilterValue, 19, 17, 1, 0, // Skip to: 9874
4720
/* 9601 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4721
/* 9604 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 9619
4722
/* 9609 */    MCD_OPC_CheckPredicate, 30, 60, 29, 0, // Skip to: 17098
4723
/* 9614 */    MCD_OPC_Decode, 131, 12, 144, 2, // Opcode: DOTP_S_H
4724
/* 9619 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 9634
4725
/* 9624 */    MCD_OPC_CheckPredicate, 30, 45, 29, 0, // Skip to: 17098
4726
/* 9629 */    MCD_OPC_Decode, 132, 12, 145, 2, // Opcode: DOTP_S_W
4727
/* 9634 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 9649
4728
/* 9639 */    MCD_OPC_CheckPredicate, 30, 30, 29, 0, // Skip to: 17098
4729
/* 9644 */    MCD_OPC_Decode, 130, 12, 146, 2, // Opcode: DOTP_S_D
4730
/* 9649 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 9664
4731
/* 9654 */    MCD_OPC_CheckPredicate, 30, 15, 29, 0, // Skip to: 17098
4732
/* 9659 */    MCD_OPC_Decode, 134, 12, 144, 2, // Opcode: DOTP_U_H
4733
/* 9664 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 9679
4734
/* 9669 */    MCD_OPC_CheckPredicate, 30, 0, 29, 0, // Skip to: 17098
4735
/* 9674 */    MCD_OPC_Decode, 135, 12, 145, 2, // Opcode: DOTP_U_W
4736
/* 9679 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 9694
4737
/* 9684 */    MCD_OPC_CheckPredicate, 30, 241, 28, 0, // Skip to: 17098
4738
/* 9689 */    MCD_OPC_Decode, 133, 12, 146, 2, // Opcode: DOTP_U_D
4739
/* 9694 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 9709
4740
/* 9699 */    MCD_OPC_CheckPredicate, 30, 226, 28, 0, // Skip to: 17098
4741
/* 9704 */    MCD_OPC_Decode, 137, 12, 147, 2, // Opcode: DPADD_S_H
4742
/* 9709 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 9724
4743
/* 9714 */    MCD_OPC_CheckPredicate, 30, 211, 28, 0, // Skip to: 17098
4744
/* 9719 */    MCD_OPC_Decode, 138, 12, 148, 2, // Opcode: DPADD_S_W
4745
/* 9724 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 9739
4746
/* 9729 */    MCD_OPC_CheckPredicate, 30, 196, 28, 0, // Skip to: 17098
4747
/* 9734 */    MCD_OPC_Decode, 136, 12, 149, 2, // Opcode: DPADD_S_D
4748
/* 9739 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 9754
4749
/* 9744 */    MCD_OPC_CheckPredicate, 30, 181, 28, 0, // Skip to: 17098
4750
/* 9749 */    MCD_OPC_Decode, 140, 12, 147, 2, // Opcode: DPADD_U_H
4751
/* 9754 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 9769
4752
/* 9759 */    MCD_OPC_CheckPredicate, 30, 166, 28, 0, // Skip to: 17098
4753
/* 9764 */    MCD_OPC_Decode, 141, 12, 148, 2, // Opcode: DPADD_U_W
4754
/* 9769 */    MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 9784
4755
/* 9774 */    MCD_OPC_CheckPredicate, 30, 151, 28, 0, // Skip to: 17098
4756
/* 9779 */    MCD_OPC_Decode, 139, 12, 149, 2, // Opcode: DPADD_U_D
4757
/* 9784 */    MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 9799
4758
/* 9789 */    MCD_OPC_CheckPredicate, 30, 136, 28, 0, // Skip to: 17098
4759
/* 9794 */    MCD_OPC_Decode, 168, 12, 147, 2, // Opcode: DPSUB_S_H
4760
/* 9799 */    MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 9814
4761
/* 9804 */    MCD_OPC_CheckPredicate, 30, 121, 28, 0, // Skip to: 17098
4762
/* 9809 */    MCD_OPC_Decode, 169, 12, 148, 2, // Opcode: DPSUB_S_W
4763
/* 9814 */    MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 9829
4764
/* 9819 */    MCD_OPC_CheckPredicate, 30, 106, 28, 0, // Skip to: 17098
4765
/* 9824 */    MCD_OPC_Decode, 167, 12, 149, 2, // Opcode: DPSUB_S_D
4766
/* 9829 */    MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 9844
4767
/* 9834 */    MCD_OPC_CheckPredicate, 30, 91, 28, 0, // Skip to: 17098
4768
/* 9839 */    MCD_OPC_Decode, 171, 12, 147, 2, // Opcode: DPSUB_U_H
4769
/* 9844 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 9859
4770
/* 9849 */    MCD_OPC_CheckPredicate, 30, 76, 28, 0, // Skip to: 17098
4771
/* 9854 */    MCD_OPC_Decode, 172, 12, 148, 2, // Opcode: DPSUB_U_W
4772
/* 9859 */    MCD_OPC_FilterValue, 23, 66, 28, 0, // Skip to: 17098
4773
/* 9864 */    MCD_OPC_CheckPredicate, 30, 61, 28, 0, // Skip to: 17098
4774
/* 9869 */    MCD_OPC_Decode, 170, 12, 149, 2, // Opcode: DPSUB_U_D
4775
/* 9874 */    MCD_OPC_FilterValue, 20, 227, 1, 0, // Skip to: 10362
4776
/* 9879 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4777
/* 9882 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 9897
4778
/* 9887 */    MCD_OPC_CheckPredicate, 30, 38, 28, 0, // Skip to: 17098
4779
/* 9892 */    MCD_OPC_Decode, 215, 21, 150, 2, // Opcode: SLD_B
4780
/* 9897 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 9912
4781
/* 9902 */    MCD_OPC_CheckPredicate, 30, 23, 28, 0, // Skip to: 17098
4782
/* 9907 */    MCD_OPC_Decode, 217, 21, 151, 2, // Opcode: SLD_H
4783
/* 9912 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 9927
4784
/* 9917 */    MCD_OPC_CheckPredicate, 30, 8, 28, 0, // Skip to: 17098
4785
/* 9922 */    MCD_OPC_Decode, 218, 21, 152, 2, // Opcode: SLD_W
4786
/* 9927 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 9942
4787
/* 9932 */    MCD_OPC_CheckPredicate, 30, 249, 27, 0, // Skip to: 17098
4788
/* 9937 */    MCD_OPC_Decode, 216, 21, 153, 2, // Opcode: SLD_D
4789
/* 9942 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 9957
4790
/* 9947 */    MCD_OPC_CheckPredicate, 30, 234, 27, 0, // Skip to: 17098
4791
/* 9952 */    MCD_OPC_Decode, 134, 22, 154, 2, // Opcode: SPLAT_B
4792
/* 9957 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 9972
4793
/* 9962 */    MCD_OPC_CheckPredicate, 30, 219, 27, 0, // Skip to: 17098
4794
/* 9967 */    MCD_OPC_Decode, 136, 22, 155, 2, // Opcode: SPLAT_H
4795
/* 9972 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 9987
4796
/* 9977 */    MCD_OPC_CheckPredicate, 30, 204, 27, 0, // Skip to: 17098
4797
/* 9982 */    MCD_OPC_Decode, 137, 22, 156, 2, // Opcode: SPLAT_W
4798
/* 9987 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 10002
4799
/* 9992 */    MCD_OPC_CheckPredicate, 30, 189, 27, 0, // Skip to: 17098
4800
/* 9997 */    MCD_OPC_Decode, 135, 22, 157, 2, // Opcode: SPLAT_D
4801
/* 10002 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 10017
4802
/* 10007 */   MCD_OPC_CheckPredicate, 30, 174, 27, 0, // Skip to: 17098
4803
/* 10012 */   MCD_OPC_Decode, 185, 19, 136, 2, // Opcode: PCKEV_B
4804
/* 10017 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 10032
4805
/* 10022 */   MCD_OPC_CheckPredicate, 30, 159, 27, 0, // Skip to: 17098
4806
/* 10027 */   MCD_OPC_Decode, 187, 19, 137, 2, // Opcode: PCKEV_H
4807
/* 10032 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 10047
4808
/* 10037 */   MCD_OPC_CheckPredicate, 30, 144, 27, 0, // Skip to: 17098
4809
/* 10042 */   MCD_OPC_Decode, 188, 19, 138, 2, // Opcode: PCKEV_W
4810
/* 10047 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 10062
4811
/* 10052 */   MCD_OPC_CheckPredicate, 30, 129, 27, 0, // Skip to: 17098
4812
/* 10057 */   MCD_OPC_Decode, 186, 19, 139, 2, // Opcode: PCKEV_D
4813
/* 10062 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 10077
4814
/* 10067 */   MCD_OPC_CheckPredicate, 30, 114, 27, 0, // Skip to: 17098
4815
/* 10072 */   MCD_OPC_Decode, 189, 19, 136, 2, // Opcode: PCKOD_B
4816
/* 10077 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 10092
4817
/* 10082 */   MCD_OPC_CheckPredicate, 30, 99, 27, 0, // Skip to: 17098
4818
/* 10087 */   MCD_OPC_Decode, 191, 19, 137, 2, // Opcode: PCKOD_H
4819
/* 10092 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 10107
4820
/* 10097 */   MCD_OPC_CheckPredicate, 30, 84, 27, 0, // Skip to: 17098
4821
/* 10102 */   MCD_OPC_Decode, 192, 19, 138, 2, // Opcode: PCKOD_W
4822
/* 10107 */   MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 10122
4823
/* 10112 */   MCD_OPC_CheckPredicate, 30, 69, 27, 0, // Skip to: 17098
4824
/* 10117 */   MCD_OPC_Decode, 190, 19, 139, 2, // Opcode: PCKOD_D
4825
/* 10122 */   MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 10137
4826
/* 10127 */   MCD_OPC_CheckPredicate, 30, 54, 27, 0, // Skip to: 17098
4827
/* 10132 */   MCD_OPC_Decode, 208, 14, 136, 2, // Opcode: ILVL_B
4828
/* 10137 */   MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 10152
4829
/* 10142 */   MCD_OPC_CheckPredicate, 30, 39, 27, 0, // Skip to: 17098
4830
/* 10147 */   MCD_OPC_Decode, 210, 14, 137, 2, // Opcode: ILVL_H
4831
/* 10152 */   MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 10167
4832
/* 10157 */   MCD_OPC_CheckPredicate, 30, 24, 27, 0, // Skip to: 17098
4833
/* 10162 */   MCD_OPC_Decode, 211, 14, 138, 2, // Opcode: ILVL_W
4834
/* 10167 */   MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 10182
4835
/* 10172 */   MCD_OPC_CheckPredicate, 30, 9, 27, 0, // Skip to: 17098
4836
/* 10177 */   MCD_OPC_Decode, 209, 14, 139, 2, // Opcode: ILVL_D
4837
/* 10182 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 10197
4838
/* 10187 */   MCD_OPC_CheckPredicate, 30, 250, 26, 0, // Skip to: 17098
4839
/* 10192 */   MCD_OPC_Decode, 216, 14, 136, 2, // Opcode: ILVR_B
4840
/* 10197 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 10212
4841
/* 10202 */   MCD_OPC_CheckPredicate, 30, 235, 26, 0, // Skip to: 17098
4842
/* 10207 */   MCD_OPC_Decode, 218, 14, 137, 2, // Opcode: ILVR_H
4843
/* 10212 */   MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 10227
4844
/* 10217 */   MCD_OPC_CheckPredicate, 30, 220, 26, 0, // Skip to: 17098
4845
/* 10222 */   MCD_OPC_Decode, 219, 14, 138, 2, // Opcode: ILVR_W
4846
/* 10227 */   MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 10242
4847
/* 10232 */   MCD_OPC_CheckPredicate, 30, 205, 26, 0, // Skip to: 17098
4848
/* 10237 */   MCD_OPC_Decode, 217, 14, 139, 2, // Opcode: ILVR_D
4849
/* 10242 */   MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 10257
4850
/* 10247 */   MCD_OPC_CheckPredicate, 30, 190, 26, 0, // Skip to: 17098
4851
/* 10252 */   MCD_OPC_Decode, 204, 14, 136, 2, // Opcode: ILVEV_B
4852
/* 10257 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 10272
4853
/* 10262 */   MCD_OPC_CheckPredicate, 30, 175, 26, 0, // Skip to: 17098
4854
/* 10267 */   MCD_OPC_Decode, 206, 14, 137, 2, // Opcode: ILVEV_H
4855
/* 10272 */   MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 10287
4856
/* 10277 */   MCD_OPC_CheckPredicate, 30, 160, 26, 0, // Skip to: 17098
4857
/* 10282 */   MCD_OPC_Decode, 207, 14, 138, 2, // Opcode: ILVEV_W
4858
/* 10287 */   MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 10302
4859
/* 10292 */   MCD_OPC_CheckPredicate, 30, 145, 26, 0, // Skip to: 17098
4860
/* 10297 */   MCD_OPC_Decode, 205, 14, 139, 2, // Opcode: ILVEV_D
4861
/* 10302 */   MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 10317
4862
/* 10307 */   MCD_OPC_CheckPredicate, 30, 130, 26, 0, // Skip to: 17098
4863
/* 10312 */   MCD_OPC_Decode, 212, 14, 136, 2, // Opcode: ILVOD_B
4864
/* 10317 */   MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 10332
4865
/* 10322 */   MCD_OPC_CheckPredicate, 30, 115, 26, 0, // Skip to: 17098
4866
/* 10327 */   MCD_OPC_Decode, 214, 14, 137, 2, // Opcode: ILVOD_H
4867
/* 10332 */   MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 10347
4868
/* 10337 */   MCD_OPC_CheckPredicate, 30, 100, 26, 0, // Skip to: 17098
4869
/* 10342 */   MCD_OPC_Decode, 215, 14, 138, 2, // Opcode: ILVOD_W
4870
/* 10347 */   MCD_OPC_FilterValue, 31, 90, 26, 0, // Skip to: 17098
4871
/* 10352 */   MCD_OPC_CheckPredicate, 30, 85, 26, 0, // Skip to: 17098
4872
/* 10357 */   MCD_OPC_Decode, 213, 14, 139, 2, // Opcode: ILVOD_D
4873
/* 10362 */   MCD_OPC_FilterValue, 21, 107, 1, 0, // Skip to: 10730
4874
/* 10367 */   MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
4875
/* 10370 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 10385
4876
/* 10375 */   MCD_OPC_CheckPredicate, 30, 62, 26, 0, // Skip to: 17098
4877
/* 10380 */   MCD_OPC_Decode, 157, 24, 140, 2, // Opcode: VSHF_B
4878
/* 10385 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 10400
4879
/* 10390 */   MCD_OPC_CheckPredicate, 30, 47, 26, 0, // Skip to: 17098
4880
/* 10395 */   MCD_OPC_Decode, 159, 24, 141, 2, // Opcode: VSHF_H
4881
/* 10400 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 10415
4882
/* 10405 */   MCD_OPC_CheckPredicate, 30, 32, 26, 0, // Skip to: 17098
4883
/* 10410 */   MCD_OPC_Decode, 160, 24, 142, 2, // Opcode: VSHF_W
4884
/* 10415 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 10430
4885
/* 10420 */   MCD_OPC_CheckPredicate, 30, 17, 26, 0, // Skip to: 17098
4886
/* 10425 */   MCD_OPC_Decode, 158, 24, 143, 2, // Opcode: VSHF_D
4887
/* 10430 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 10445
4888
/* 10435 */   MCD_OPC_CheckPredicate, 30, 2, 26, 0, // Skip to: 17098
4889
/* 10440 */   MCD_OPC_Decode, 147, 22, 136, 2, // Opcode: SRAR_B
4890
/* 10445 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 10460
4891
/* 10450 */   MCD_OPC_CheckPredicate, 30, 243, 25, 0, // Skip to: 17098
4892
/* 10455 */   MCD_OPC_Decode, 149, 22, 137, 2, // Opcode: SRAR_H
4893
/* 10460 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 10475
4894
/* 10465 */   MCD_OPC_CheckPredicate, 30, 228, 25, 0, // Skip to: 17098
4895
/* 10470 */   MCD_OPC_Decode, 150, 22, 138, 2, // Opcode: SRAR_W
4896
/* 10475 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 10490
4897
/* 10480 */   MCD_OPC_CheckPredicate, 30, 213, 25, 0, // Skip to: 17098
4898
/* 10485 */   MCD_OPC_Decode, 148, 22, 139, 2, // Opcode: SRAR_D
4899
/* 10490 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 10505
4900
/* 10495 */   MCD_OPC_CheckPredicate, 30, 198, 25, 0, // Skip to: 17098
4901
/* 10500 */   MCD_OPC_Decode, 172, 22, 136, 2, // Opcode: SRLR_B
4902
/* 10505 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 10520
4903
/* 10510 */   MCD_OPC_CheckPredicate, 30, 183, 25, 0, // Skip to: 17098
4904
/* 10515 */   MCD_OPC_Decode, 174, 22, 137, 2, // Opcode: SRLR_H
4905
/* 10520 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 10535
4906
/* 10525 */   MCD_OPC_CheckPredicate, 30, 168, 25, 0, // Skip to: 17098
4907
/* 10530 */   MCD_OPC_Decode, 175, 22, 138, 2, // Opcode: SRLR_W
4908
/* 10535 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 10550
4909
/* 10540 */   MCD_OPC_CheckPredicate, 30, 153, 25, 0, // Skip to: 17098
4910
/* 10545 */   MCD_OPC_Decode, 173, 22, 139, 2, // Opcode: SRLR_D
4911
/* 10550 */   MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 10565
4912
/* 10555 */   MCD_OPC_CheckPredicate, 30, 138, 25, 0, // Skip to: 17098
4913
/* 10560 */   MCD_OPC_Decode, 191, 14, 144, 2, // Opcode: HADD_S_H
4914
/* 10565 */   MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 10580
4915
/* 10570 */   MCD_OPC_CheckPredicate, 30, 123, 25, 0, // Skip to: 17098
4916
/* 10575 */   MCD_OPC_Decode, 192, 14, 145, 2, // Opcode: HADD_S_W
4917
/* 10580 */   MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 10595
4918
/* 10585 */   MCD_OPC_CheckPredicate, 30, 108, 25, 0, // Skip to: 17098
4919
/* 10590 */   MCD_OPC_Decode, 190, 14, 146, 2, // Opcode: HADD_S_D
4920
/* 10595 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 10610
4921
/* 10600 */   MCD_OPC_CheckPredicate, 30, 93, 25, 0, // Skip to: 17098
4922
/* 10605 */   MCD_OPC_Decode, 194, 14, 144, 2, // Opcode: HADD_U_H
4923
/* 10610 */   MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 10625
4924
/* 10615 */   MCD_OPC_CheckPredicate, 30, 78, 25, 0, // Skip to: 17098
4925
/* 10620 */   MCD_OPC_Decode, 195, 14, 145, 2, // Opcode: HADD_U_W
4926
/* 10625 */   MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 10640
4927
/* 10630 */   MCD_OPC_CheckPredicate, 30, 63, 25, 0, // Skip to: 17098
4928
/* 10635 */   MCD_OPC_Decode, 193, 14, 146, 2, // Opcode: HADD_U_D
4929
/* 10640 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 10655
4930
/* 10645 */   MCD_OPC_CheckPredicate, 30, 48, 25, 0, // Skip to: 17098
4931
/* 10650 */   MCD_OPC_Decode, 197, 14, 144, 2, // Opcode: HSUB_S_H
4932
/* 10655 */   MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 10670
4933
/* 10660 */   MCD_OPC_CheckPredicate, 30, 33, 25, 0, // Skip to: 17098
4934
/* 10665 */   MCD_OPC_Decode, 198, 14, 145, 2, // Opcode: HSUB_S_W
4935
/* 10670 */   MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 10685
4936
/* 10675 */   MCD_OPC_CheckPredicate, 30, 18, 25, 0, // Skip to: 17098
4937
/* 10680 */   MCD_OPC_Decode, 196, 14, 146, 2, // Opcode: HSUB_S_D
4938
/* 10685 */   MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 10700
4939
/* 10690 */   MCD_OPC_CheckPredicate, 30, 3, 25, 0, // Skip to: 17098
4940
/* 10695 */   MCD_OPC_Decode, 200, 14, 144, 2, // Opcode: HSUB_U_H
4941
/* 10700 */   MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 10715
4942
/* 10705 */   MCD_OPC_CheckPredicate, 30, 244, 24, 0, // Skip to: 17098
4943
/* 10710 */   MCD_OPC_Decode, 201, 14, 145, 2, // Opcode: HSUB_U_W
4944
/* 10715 */   MCD_OPC_FilterValue, 31, 234, 24, 0, // Skip to: 17098
4945
/* 10720 */   MCD_OPC_CheckPredicate, 30, 229, 24, 0, // Skip to: 17098
4946
/* 10725 */   MCD_OPC_Decode, 199, 14, 146, 2, // Opcode: HSUB_U_D
4947
/* 10730 */   MCD_OPC_FilterValue, 25, 26, 2, 0, // Skip to: 11273
4948
/* 10735 */   MCD_OPC_ExtractField, 20, 6,  // Inst{25-20} ...
4949
/* 10738 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 10753
4950
/* 10743 */   MCD_OPC_CheckPredicate, 30, 206, 24, 0, // Skip to: 17098
4951
/* 10748 */   MCD_OPC_Decode, 211, 21, 158, 2, // Opcode: SLDI_B
4952
/* 10753 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 10775
4953
/* 10758 */   MCD_OPC_CheckPredicate, 30, 191, 24, 0, // Skip to: 17098
4954
/* 10763 */   MCD_OPC_CheckField, 19, 1, 0, 184, 24, 0, // Skip to: 17098
4955
/* 10770 */   MCD_OPC_Decode, 213, 21, 159, 2, // Opcode: SLDI_H
4956
/* 10775 */   MCD_OPC_FilterValue, 3, 62, 0, 0, // Skip to: 10842
4957
/* 10780 */   MCD_OPC_ExtractField, 18, 2,  // Inst{19-18} ...
4958
/* 10783 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 10798
4959
/* 10788 */   MCD_OPC_CheckPredicate, 30, 161, 24, 0, // Skip to: 17098
4960
/* 10793 */   MCD_OPC_Decode, 214, 21, 160, 2, // Opcode: SLDI_W
4961
/* 10798 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 10820
4962
/* 10803 */   MCD_OPC_CheckPredicate, 30, 146, 24, 0, // Skip to: 17098
4963
/* 10808 */   MCD_OPC_CheckField, 17, 1, 0, 139, 24, 0, // Skip to: 17098
4964
/* 10815 */   MCD_OPC_Decode, 212, 21, 161, 2, // Opcode: SLDI_D
4965
/* 10820 */   MCD_OPC_FilterValue, 3, 129, 24, 0, // Skip to: 17098
4966
/* 10825 */   MCD_OPC_CheckPredicate, 30, 124, 24, 0, // Skip to: 17098
4967
/* 10830 */   MCD_OPC_CheckField, 16, 2, 2, 117, 24, 0, // Skip to: 17098
4968
/* 10837 */   MCD_OPC_Decode, 182, 10, 162, 2, // Opcode: CTCMSA
4969
/* 10842 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 10857
4970
/* 10847 */   MCD_OPC_CheckPredicate, 30, 102, 24, 0, // Skip to: 17098
4971
/* 10852 */   MCD_OPC_Decode, 130, 22, 163, 2, // Opcode: SPLATI_B
4972
/* 10857 */   MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 10879
4973
/* 10862 */   MCD_OPC_CheckPredicate, 30, 87, 24, 0, // Skip to: 17098
4974
/* 10867 */   MCD_OPC_CheckField, 19, 1, 0, 80, 24, 0, // Skip to: 17098
4975
/* 10874 */   MCD_OPC_Decode, 132, 22, 164, 2, // Opcode: SPLATI_H
4976
/* 10879 */   MCD_OPC_FilterValue, 7, 62, 0, 0, // Skip to: 10946
4977
/* 10884 */   MCD_OPC_ExtractField, 18, 2,  // Inst{19-18} ...
4978
/* 10887 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 10902
4979
/* 10892 */   MCD_OPC_CheckPredicate, 30, 57, 24, 0, // Skip to: 17098
4980
/* 10897 */   MCD_OPC_Decode, 133, 22, 165, 2, // Opcode: SPLATI_W
4981
/* 10902 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 10924
4982
/* 10907 */   MCD_OPC_CheckPredicate, 30, 42, 24, 0, // Skip to: 17098
4983
/* 10912 */   MCD_OPC_CheckField, 17, 1, 0, 35, 24, 0, // Skip to: 17098
4984
/* 10919 */   MCD_OPC_Decode, 131, 22, 166, 2, // Opcode: SPLATI_D
4985
/* 10924 */   MCD_OPC_FilterValue, 3, 25, 24, 0, // Skip to: 17098
4986
/* 10929 */   MCD_OPC_CheckPredicate, 30, 20, 24, 0, // Skip to: 17098
4987
/* 10934 */   MCD_OPC_CheckField, 16, 2, 2, 13, 24, 0, // Skip to: 17098
4988
/* 10941 */   MCD_OPC_Decode, 147, 9, 167, 2, // Opcode: CFCMSA
4989
/* 10946 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 10961
4990
/* 10951 */   MCD_OPC_CheckPredicate, 30, 254, 23, 0, // Skip to: 17098
4991
/* 10956 */   MCD_OPC_Decode, 158, 10, 168, 2, // Opcode: COPY_S_B
4992
/* 10961 */   MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 10983
4993
/* 10966 */   MCD_OPC_CheckPredicate, 30, 239, 23, 0, // Skip to: 17098
4994
/* 10971 */   MCD_OPC_CheckField, 19, 1, 0, 232, 23, 0, // Skip to: 17098
4995
/* 10978 */   MCD_OPC_Decode, 160, 10, 169, 2, // Opcode: COPY_S_H
4996
/* 10983 */   MCD_OPC_FilterValue, 11, 62, 0, 0, // Skip to: 11050
4997
/* 10988 */   MCD_OPC_ExtractField, 18, 2,  // Inst{19-18} ...
4998
/* 10991 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 11006
4999
/* 10996 */   MCD_OPC_CheckPredicate, 30, 209, 23, 0, // Skip to: 17098
5000
/* 11001 */   MCD_OPC_Decode, 161, 10, 170, 2, // Opcode: COPY_S_W
5001
/* 11006 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 11028
5002
/* 11011 */   MCD_OPC_CheckPredicate, 38, 194, 23, 0, // Skip to: 17098
5003
/* 11016 */   MCD_OPC_CheckField, 17, 1, 0, 187, 23, 0, // Skip to: 17098
5004
/* 11023 */   MCD_OPC_Decode, 159, 10, 171, 2, // Opcode: COPY_S_D
5005
/* 11028 */   MCD_OPC_FilterValue, 3, 177, 23, 0, // Skip to: 17098
5006
/* 11033 */   MCD_OPC_CheckPredicate, 30, 172, 23, 0, // Skip to: 17098
5007
/* 11038 */   MCD_OPC_CheckField, 16, 2, 2, 165, 23, 0, // Skip to: 17098
5008
/* 11045 */   MCD_OPC_Decode, 216, 17, 172, 2, // Opcode: MOVE_V
5009
/* 11050 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 11065
5010
/* 11055 */   MCD_OPC_CheckPredicate, 30, 150, 23, 0, // Skip to: 17098
5011
/* 11060 */   MCD_OPC_Decode, 162, 10, 168, 2, // Opcode: COPY_U_B
5012
/* 11065 */   MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 11087
5013
/* 11070 */   MCD_OPC_CheckPredicate, 30, 135, 23, 0, // Skip to: 17098
5014
/* 11075 */   MCD_OPC_CheckField, 19, 1, 0, 128, 23, 0, // Skip to: 17098
5015
/* 11082 */   MCD_OPC_Decode, 163, 10, 169, 2, // Opcode: COPY_U_H
5016
/* 11087 */   MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 11109
5017
/* 11092 */   MCD_OPC_CheckPredicate, 38, 113, 23, 0, // Skip to: 17098
5018
/* 11097 */   MCD_OPC_CheckField, 18, 2, 0, 106, 23, 0, // Skip to: 17098
5019
/* 11104 */   MCD_OPC_Decode, 164, 10, 170, 2, // Opcode: COPY_U_W
5020
/* 11109 */   MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 11124
5021
/* 11114 */   MCD_OPC_CheckPredicate, 30, 91, 23, 0, // Skip to: 17098
5022
/* 11119 */   MCD_OPC_Decode, 221, 14, 173, 2, // Opcode: INSERT_B
5023
/* 11124 */   MCD_OPC_FilterValue, 18, 17, 0, 0, // Skip to: 11146
5024
/* 11129 */   MCD_OPC_CheckPredicate, 30, 76, 23, 0, // Skip to: 17098
5025
/* 11134 */   MCD_OPC_CheckField, 19, 1, 0, 69, 23, 0, // Skip to: 17098
5026
/* 11141 */   MCD_OPC_Decode, 223, 14, 174, 2, // Opcode: INSERT_H
5027
/* 11146 */   MCD_OPC_FilterValue, 19, 40, 0, 0, // Skip to: 11191
5028
/* 11151 */   MCD_OPC_ExtractField, 18, 2,  // Inst{19-18} ...
5029
/* 11154 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 11169
5030
/* 11159 */   MCD_OPC_CheckPredicate, 30, 46, 23, 0, // Skip to: 17098
5031
/* 11164 */   MCD_OPC_Decode, 224, 14, 175, 2, // Opcode: INSERT_W
5032
/* 11169 */   MCD_OPC_FilterValue, 2, 36, 23, 0, // Skip to: 17098
5033
/* 11174 */   MCD_OPC_CheckPredicate, 38, 31, 23, 0, // Skip to: 17098
5034
/* 11179 */   MCD_OPC_CheckField, 17, 1, 0, 24, 23, 0, // Skip to: 17098
5035
/* 11186 */   MCD_OPC_Decode, 222, 14, 176, 2, // Opcode: INSERT_D
5036
/* 11191 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 11206
5037
/* 11196 */   MCD_OPC_CheckPredicate, 30, 9, 23, 0, // Skip to: 17098
5038
/* 11201 */   MCD_OPC_Decode, 226, 14, 177, 2, // Opcode: INSVE_B
5039
/* 11206 */   MCD_OPC_FilterValue, 22, 17, 0, 0, // Skip to: 11228
5040
/* 11211 */   MCD_OPC_CheckPredicate, 30, 250, 22, 0, // Skip to: 17098
5041
/* 11216 */   MCD_OPC_CheckField, 19, 1, 0, 243, 22, 0, // Skip to: 17098
5042
/* 11223 */   MCD_OPC_Decode, 228, 14, 177, 2, // Opcode: INSVE_H
5043
/* 11228 */   MCD_OPC_FilterValue, 23, 233, 22, 0, // Skip to: 17098
5044
/* 11233 */   MCD_OPC_ExtractField, 18, 2,  // Inst{19-18} ...
5045
/* 11236 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 11251
5046
/* 11241 */   MCD_OPC_CheckPredicate, 30, 220, 22, 0, // Skip to: 17098
5047
/* 11246 */   MCD_OPC_Decode, 229, 14, 177, 2, // Opcode: INSVE_W
5048
/* 11251 */   MCD_OPC_FilterValue, 2, 210, 22, 0, // Skip to: 17098
5049
/* 11256 */   MCD_OPC_CheckPredicate, 30, 205, 22, 0, // Skip to: 17098
5050
/* 11261 */   MCD_OPC_CheckField, 17, 1, 0, 198, 22, 0, // Skip to: 17098
5051
/* 11268 */   MCD_OPC_Decode, 227, 14, 177, 2, // Opcode: INSVE_D
5052
/* 11273 */   MCD_OPC_FilterValue, 26, 227, 1, 0, // Skip to: 11761
5053
/* 11278 */   MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
5054
/* 11281 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 11296
5055
/* 11286 */   MCD_OPC_CheckPredicate, 30, 175, 22, 0, // Skip to: 17098
5056
/* 11291 */   MCD_OPC_Decode, 147, 13, 138, 2, // Opcode: FCAF_W
5057
/* 11296 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 11311
5058
/* 11301 */   MCD_OPC_CheckPredicate, 30, 160, 22, 0, // Skip to: 17098
5059
/* 11306 */   MCD_OPC_Decode, 146, 13, 139, 2, // Opcode: FCAF_D
5060
/* 11311 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 11326
5061
/* 11316 */   MCD_OPC_CheckPredicate, 30, 145, 22, 0, // Skip to: 17098
5062
/* 11321 */   MCD_OPC_Decode, 174, 13, 138, 2, // Opcode: FCUN_W
5063
/* 11326 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 11341
5064
/* 11331 */   MCD_OPC_CheckPredicate, 30, 130, 22, 0, // Skip to: 17098
5065
/* 11336 */   MCD_OPC_Decode, 173, 13, 139, 2, // Opcode: FCUN_D
5066
/* 11341 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 11356
5067
/* 11346 */   MCD_OPC_CheckPredicate, 30, 115, 22, 0, // Skip to: 17098
5068
/* 11351 */   MCD_OPC_Decode, 149, 13, 138, 2, // Opcode: FCEQ_W
5069
/* 11356 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 11371
5070
/* 11361 */   MCD_OPC_CheckPredicate, 30, 100, 22, 0, // Skip to: 17098
5071
/* 11366 */   MCD_OPC_Decode, 148, 13, 139, 2, // Opcode: FCEQ_D
5072
/* 11371 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 11386
5073
/* 11376 */   MCD_OPC_CheckPredicate, 30, 85, 22, 0, // Skip to: 17098
5074
/* 11381 */   MCD_OPC_Decode, 166, 13, 138, 2, // Opcode: FCUEQ_W
5075
/* 11386 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 11401
5076
/* 11391 */   MCD_OPC_CheckPredicate, 30, 70, 22, 0, // Skip to: 17098
5077
/* 11396 */   MCD_OPC_Decode, 165, 13, 139, 2, // Opcode: FCUEQ_D
5078
/* 11401 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 11416
5079
/* 11406 */   MCD_OPC_CheckPredicate, 30, 55, 22, 0, // Skip to: 17098
5080
/* 11411 */   MCD_OPC_Decode, 155, 13, 138, 2, // Opcode: FCLT_W
5081
/* 11416 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 11431
5082
/* 11421 */   MCD_OPC_CheckPredicate, 30, 40, 22, 0, // Skip to: 17098
5083
/* 11426 */   MCD_OPC_Decode, 154, 13, 139, 2, // Opcode: FCLT_D
5084
/* 11431 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 11446
5085
/* 11436 */   MCD_OPC_CheckPredicate, 30, 25, 22, 0, // Skip to: 17098
5086
/* 11441 */   MCD_OPC_Decode, 170, 13, 138, 2, // Opcode: FCULT_W
5087
/* 11446 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 11461
5088
/* 11451 */   MCD_OPC_CheckPredicate, 30, 10, 22, 0, // Skip to: 17098
5089
/* 11456 */   MCD_OPC_Decode, 169, 13, 139, 2, // Opcode: FCULT_D
5090
/* 11461 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 11476
5091
/* 11466 */   MCD_OPC_CheckPredicate, 30, 251, 21, 0, // Skip to: 17098
5092
/* 11471 */   MCD_OPC_Decode, 153, 13, 138, 2, // Opcode: FCLE_W
5093
/* 11476 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 11491
5094
/* 11481 */   MCD_OPC_CheckPredicate, 30, 236, 21, 0, // Skip to: 17098
5095
/* 11486 */   MCD_OPC_Decode, 152, 13, 139, 2, // Opcode: FCLE_D
5096
/* 11491 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 11506
5097
/* 11496 */   MCD_OPC_CheckPredicate, 30, 221, 21, 0, // Skip to: 17098
5098
/* 11501 */   MCD_OPC_Decode, 168, 13, 138, 2, // Opcode: FCULE_W
5099
/* 11506 */   MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 11521
5100
/* 11511 */   MCD_OPC_CheckPredicate, 30, 206, 21, 0, // Skip to: 17098
5101
/* 11516 */   MCD_OPC_Decode, 167, 13, 139, 2, // Opcode: FCULE_D
5102
/* 11521 */   MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 11536
5103
/* 11526 */   MCD_OPC_CheckPredicate, 30, 191, 21, 0, // Skip to: 17098
5104
/* 11531 */   MCD_OPC_Decode, 135, 14, 138, 2, // Opcode: FSAF_W
5105
/* 11536 */   MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 11551
5106
/* 11541 */   MCD_OPC_CheckPredicate, 30, 176, 21, 0, // Skip to: 17098
5107
/* 11546 */   MCD_OPC_Decode, 134, 14, 139, 2, // Opcode: FSAF_D
5108
/* 11551 */   MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 11566
5109
/* 11556 */   MCD_OPC_CheckPredicate, 30, 161, 21, 0, // Skip to: 17098
5110
/* 11561 */   MCD_OPC_Decode, 173, 14, 138, 2, // Opcode: FSUN_W
5111
/* 11566 */   MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 11581
5112
/* 11571 */   MCD_OPC_CheckPredicate, 30, 146, 21, 0, // Skip to: 17098
5113
/* 11576 */   MCD_OPC_Decode, 172, 14, 139, 2, // Opcode: FSUN_D
5114
/* 11581 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 11596
5115
/* 11586 */   MCD_OPC_CheckPredicate, 30, 131, 21, 0, // Skip to: 17098
5116
/* 11591 */   MCD_OPC_Decode, 137, 14, 138, 2, // Opcode: FSEQ_W
5117
/* 11596 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 11611
5118
/* 11601 */   MCD_OPC_CheckPredicate, 30, 116, 21, 0, // Skip to: 17098
5119
/* 11606 */   MCD_OPC_Decode, 136, 14, 139, 2, // Opcode: FSEQ_D
5120
/* 11611 */   MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 11626
5121
/* 11616 */   MCD_OPC_CheckPredicate, 30, 101, 21, 0, // Skip to: 17098
5122
/* 11621 */   MCD_OPC_Decode, 165, 14, 138, 2, // Opcode: FSUEQ_W
5123
/* 11626 */   MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 11641
5124
/* 11631 */   MCD_OPC_CheckPredicate, 30, 86, 21, 0, // Skip to: 17098
5125
/* 11636 */   MCD_OPC_Decode, 164, 14, 139, 2, // Opcode: FSUEQ_D
5126
/* 11641 */   MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 11656
5127
/* 11646 */   MCD_OPC_CheckPredicate, 30, 71, 21, 0, // Skip to: 17098
5128
/* 11651 */   MCD_OPC_Decode, 141, 14, 138, 2, // Opcode: FSLT_W
5129
/* 11656 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 11671
5130
/* 11661 */   MCD_OPC_CheckPredicate, 30, 56, 21, 0, // Skip to: 17098
5131
/* 11666 */   MCD_OPC_Decode, 140, 14, 139, 2, // Opcode: FSLT_D
5132
/* 11671 */   MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 11686
5133
/* 11676 */   MCD_OPC_CheckPredicate, 30, 41, 21, 0, // Skip to: 17098
5134
/* 11681 */   MCD_OPC_Decode, 169, 14, 138, 2, // Opcode: FSULT_W
5135
/* 11686 */   MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 11701
5136
/* 11691 */   MCD_OPC_CheckPredicate, 30, 26, 21, 0, // Skip to: 17098
5137
/* 11696 */   MCD_OPC_Decode, 168, 14, 139, 2, // Opcode: FSULT_D
5138
/* 11701 */   MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 11716
5139
/* 11706 */   MCD_OPC_CheckPredicate, 30, 11, 21, 0, // Skip to: 17098
5140
/* 11711 */   MCD_OPC_Decode, 139, 14, 138, 2, // Opcode: FSLE_W
5141
/* 11716 */   MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 11731
5142
/* 11721 */   MCD_OPC_CheckPredicate, 30, 252, 20, 0, // Skip to: 17098
5143
/* 11726 */   MCD_OPC_Decode, 138, 14, 139, 2, // Opcode: FSLE_D
5144
/* 11731 */   MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 11746
5145
/* 11736 */   MCD_OPC_CheckPredicate, 30, 237, 20, 0, // Skip to: 17098
5146
/* 11741 */   MCD_OPC_Decode, 167, 14, 138, 2, // Opcode: FSULE_W
5147
/* 11746 */   MCD_OPC_FilterValue, 31, 227, 20, 0, // Skip to: 17098
5148
/* 11751 */   MCD_OPC_CheckPredicate, 30, 222, 20, 0, // Skip to: 17098
5149
/* 11756 */   MCD_OPC_Decode, 166, 14, 139, 2, // Opcode: FSULE_D
5150
/* 11761 */   MCD_OPC_FilterValue, 27, 137, 1, 0, // Skip to: 12159
5151
/* 11766 */   MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
5152
/* 11769 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 11784
5153
/* 11774 */   MCD_OPC_CheckPredicate, 30, 199, 20, 0, // Skip to: 17098
5154
/* 11779 */   MCD_OPC_Decode, 145, 13, 138, 2, // Opcode: FADD_W
5155
/* 11784 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 11799
5156
/* 11789 */   MCD_OPC_CheckPredicate, 30, 184, 20, 0, // Skip to: 17098
5157
/* 11794 */   MCD_OPC_Decode, 136, 13, 139, 2, // Opcode: FADD_D
5158
/* 11799 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 11814
5159
/* 11804 */   MCD_OPC_CheckPredicate, 30, 169, 20, 0, // Skip to: 17098
5160
/* 11809 */   MCD_OPC_Decode, 163, 14, 138, 2, // Opcode: FSUB_W
5161
/* 11814 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 11829
5162
/* 11819 */   MCD_OPC_CheckPredicate, 30, 154, 20, 0, // Skip to: 17098
5163
/* 11824 */   MCD_OPC_Decode, 154, 14, 139, 2, // Opcode: FSUB_D
5164
/* 11829 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 11844
5165
/* 11834 */   MCD_OPC_CheckPredicate, 30, 139, 20, 0, // Skip to: 17098
5166
/* 11839 */   MCD_OPC_Decode, 246, 13, 138, 2, // Opcode: FMUL_W
5167
/* 11844 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 11859
5168
/* 11849 */   MCD_OPC_CheckPredicate, 30, 124, 20, 0, // Skip to: 17098
5169
/* 11854 */   MCD_OPC_Decode, 237, 13, 139, 2, // Opcode: FMUL_D
5170
/* 11859 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 11874
5171
/* 11864 */   MCD_OPC_CheckPredicate, 30, 109, 20, 0, // Skip to: 17098
5172
/* 11869 */   MCD_OPC_Decode, 183, 13, 138, 2, // Opcode: FDIV_W
5173
/* 11874 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 11889
5174
/* 11879 */   MCD_OPC_CheckPredicate, 30, 94, 20, 0, // Skip to: 17098
5175
/* 11884 */   MCD_OPC_Decode, 175, 13, 139, 2, // Opcode: FDIV_D
5176
/* 11889 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 11904
5177
/* 11894 */   MCD_OPC_CheckPredicate, 30, 79, 20, 0, // Skip to: 17098
5178
/* 11899 */   MCD_OPC_Decode, 218, 13, 142, 2, // Opcode: FMADD_W
5179
/* 11904 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 11919
5180
/* 11909 */   MCD_OPC_CheckPredicate, 30, 64, 20, 0, // Skip to: 17098
5181
/* 11914 */   MCD_OPC_Decode, 217, 13, 143, 2, // Opcode: FMADD_D
5182
/* 11919 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 11934
5183
/* 11924 */   MCD_OPC_CheckPredicate, 30, 49, 20, 0, // Skip to: 17098
5184
/* 11929 */   MCD_OPC_Decode, 236, 13, 142, 2, // Opcode: FMSUB_W
5185
/* 11934 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 11949
5186
/* 11939 */   MCD_OPC_CheckPredicate, 30, 34, 20, 0, // Skip to: 17098
5187
/* 11944 */   MCD_OPC_Decode, 235, 13, 143, 2, // Opcode: FMSUB_D
5188
/* 11949 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 11964
5189
/* 11954 */   MCD_OPC_CheckPredicate, 30, 19, 20, 0, // Skip to: 17098
5190
/* 11959 */   MCD_OPC_Decode, 187, 13, 138, 2, // Opcode: FEXP2_W
5191
/* 11964 */   MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 11979
5192
/* 11969 */   MCD_OPC_CheckPredicate, 30, 4, 20, 0, // Skip to: 17098
5193
/* 11974 */   MCD_OPC_Decode, 186, 13, 139, 2, // Opcode: FEXP2_D
5194
/* 11979 */   MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 11994
5195
/* 11984 */   MCD_OPC_CheckPredicate, 30, 245, 19, 0, // Skip to: 17098
5196
/* 11989 */   MCD_OPC_Decode, 184, 13, 178, 2, // Opcode: FEXDO_H
5197
/* 11994 */   MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 12009
5198
/* 11999 */   MCD_OPC_CheckPredicate, 30, 230, 19, 0, // Skip to: 17098
5199
/* 12004 */   MCD_OPC_Decode, 185, 13, 179, 2, // Opcode: FEXDO_W
5200
/* 12009 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 12024
5201
/* 12014 */   MCD_OPC_CheckPredicate, 30, 215, 19, 0, // Skip to: 17098
5202
/* 12019 */   MCD_OPC_Decode, 178, 14, 178, 2, // Opcode: FTQ_H
5203
/* 12024 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 12039
5204
/* 12029 */   MCD_OPC_CheckPredicate, 30, 200, 19, 0, // Skip to: 17098
5205
/* 12034 */   MCD_OPC_Decode, 179, 14, 179, 2, // Opcode: FTQ_W
5206
/* 12039 */   MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 12054
5207
/* 12044 */   MCD_OPC_CheckPredicate, 30, 185, 19, 0, // Skip to: 17098
5208
/* 12049 */   MCD_OPC_Decode, 226, 13, 138, 2, // Opcode: FMIN_W
5209
/* 12054 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 12069
5210
/* 12059 */   MCD_OPC_CheckPredicate, 30, 170, 19, 0, // Skip to: 17098
5211
/* 12064 */   MCD_OPC_Decode, 225, 13, 139, 2, // Opcode: FMIN_D
5212
/* 12069 */   MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 12084
5213
/* 12074 */   MCD_OPC_CheckPredicate, 30, 155, 19, 0, // Skip to: 17098
5214
/* 12079 */   MCD_OPC_Decode, 224, 13, 138, 2, // Opcode: FMIN_A_W
5215
/* 12084 */   MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 12099
5216
/* 12089 */   MCD_OPC_CheckPredicate, 30, 140, 19, 0, // Skip to: 17098
5217
/* 12094 */   MCD_OPC_Decode, 223, 13, 139, 2, // Opcode: FMIN_A_D
5218
/* 12099 */   MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 12114
5219
/* 12104 */   MCD_OPC_CheckPredicate, 30, 125, 19, 0, // Skip to: 17098
5220
/* 12109 */   MCD_OPC_Decode, 222, 13, 138, 2, // Opcode: FMAX_W
5221
/* 12114 */   MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 12129
5222
/* 12119 */   MCD_OPC_CheckPredicate, 30, 110, 19, 0, // Skip to: 17098
5223
/* 12124 */   MCD_OPC_Decode, 221, 13, 139, 2, // Opcode: FMAX_D
5224
/* 12129 */   MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 12144
5225
/* 12134 */   MCD_OPC_CheckPredicate, 30, 95, 19, 0, // Skip to: 17098
5226
/* 12139 */   MCD_OPC_Decode, 220, 13, 138, 2, // Opcode: FMAX_A_W
5227
/* 12144 */   MCD_OPC_FilterValue, 31, 85, 19, 0, // Skip to: 17098
5228
/* 12149 */   MCD_OPC_CheckPredicate, 30, 80, 19, 0, // Skip to: 17098
5229
/* 12154 */   MCD_OPC_Decode, 219, 13, 139, 2, // Opcode: FMAX_A_D
5230
/* 12159 */   MCD_OPC_FilterValue, 28, 107, 1, 0, // Skip to: 12527
5231
/* 12164 */   MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
5232
/* 12167 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 12182
5233
/* 12172 */   MCD_OPC_CheckPredicate, 30, 57, 19, 0, // Skip to: 17098
5234
/* 12177 */   MCD_OPC_Decode, 164, 13, 138, 2, // Opcode: FCOR_W
5235
/* 12182 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 12197
5236
/* 12187 */   MCD_OPC_CheckPredicate, 30, 42, 19, 0, // Skip to: 17098
5237
/* 12192 */   MCD_OPC_Decode, 163, 13, 139, 2, // Opcode: FCOR_D
5238
/* 12197 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 12212
5239
/* 12202 */   MCD_OPC_CheckPredicate, 30, 27, 19, 0, // Skip to: 17098
5240
/* 12207 */   MCD_OPC_Decode, 172, 13, 138, 2, // Opcode: FCUNE_W
5241
/* 12212 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 12227
5242
/* 12217 */   MCD_OPC_CheckPredicate, 30, 12, 19, 0, // Skip to: 17098
5243
/* 12222 */   MCD_OPC_Decode, 171, 13, 139, 2, // Opcode: FCUNE_D
5244
/* 12227 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 12242
5245
/* 12232 */   MCD_OPC_CheckPredicate, 30, 253, 18, 0, // Skip to: 17098
5246
/* 12237 */   MCD_OPC_Decode, 162, 13, 138, 2, // Opcode: FCNE_W
5247
/* 12242 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 12257
5248
/* 12247 */   MCD_OPC_CheckPredicate, 30, 238, 18, 0, // Skip to: 17098
5249
/* 12252 */   MCD_OPC_Decode, 161, 13, 139, 2, // Opcode: FCNE_D
5250
/* 12257 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 12272
5251
/* 12262 */   MCD_OPC_CheckPredicate, 30, 223, 18, 0, // Skip to: 17098
5252
/* 12267 */   MCD_OPC_Decode, 250, 18, 137, 2, // Opcode: MUL_Q_H
5253
/* 12272 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 12287
5254
/* 12277 */   MCD_OPC_CheckPredicate, 30, 208, 18, 0, // Skip to: 17098
5255
/* 12282 */   MCD_OPC_Decode, 251, 18, 138, 2, // Opcode: MUL_Q_W
5256
/* 12287 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 12302
5257
/* 12292 */   MCD_OPC_CheckPredicate, 30, 193, 18, 0, // Skip to: 17098
5258
/* 12297 */   MCD_OPC_Decode, 216, 16, 141, 2, // Opcode: MADD_Q_H
5259
/* 12302 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 12317
5260
/* 12307 */   MCD_OPC_CheckPredicate, 30, 178, 18, 0, // Skip to: 17098
5261
/* 12312 */   MCD_OPC_Decode, 217, 16, 142, 2, // Opcode: MADD_Q_W
5262
/* 12317 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 12332
5263
/* 12322 */   MCD_OPC_CheckPredicate, 30, 163, 18, 0, // Skip to: 17098
5264
/* 12327 */   MCD_OPC_Decode, 152, 18, 141, 2, // Opcode: MSUB_Q_H
5265
/* 12332 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 12347
5266
/* 12337 */   MCD_OPC_CheckPredicate, 30, 148, 18, 0, // Skip to: 17098
5267
/* 12342 */   MCD_OPC_Decode, 153, 18, 142, 2, // Opcode: MSUB_Q_W
5268
/* 12347 */   MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 12362
5269
/* 12352 */   MCD_OPC_CheckPredicate, 30, 133, 18, 0, // Skip to: 17098
5270
/* 12357 */   MCD_OPC_Decode, 145, 14, 138, 2, // Opcode: FSOR_W
5271
/* 12362 */   MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 12377
5272
/* 12367 */   MCD_OPC_CheckPredicate, 30, 118, 18, 0, // Skip to: 17098
5273
/* 12372 */   MCD_OPC_Decode, 144, 14, 139, 2, // Opcode: FSOR_D
5274
/* 12377 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 12392
5275
/* 12382 */   MCD_OPC_CheckPredicate, 30, 103, 18, 0, // Skip to: 17098
5276
/* 12387 */   MCD_OPC_Decode, 171, 14, 138, 2, // Opcode: FSUNE_W
5277
/* 12392 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 12407
5278
/* 12397 */   MCD_OPC_CheckPredicate, 30, 88, 18, 0, // Skip to: 17098
5279
/* 12402 */   MCD_OPC_Decode, 170, 14, 139, 2, // Opcode: FSUNE_D
5280
/* 12407 */   MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 12422
5281
/* 12412 */   MCD_OPC_CheckPredicate, 30, 73, 18, 0, // Skip to: 17098
5282
/* 12417 */   MCD_OPC_Decode, 143, 14, 138, 2, // Opcode: FSNE_W
5283
/* 12422 */   MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 12437
5284
/* 12427 */   MCD_OPC_CheckPredicate, 30, 58, 18, 0, // Skip to: 17098
5285
/* 12432 */   MCD_OPC_Decode, 142, 14, 139, 2, // Opcode: FSNE_D
5286
/* 12437 */   MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 12452
5287
/* 12442 */   MCD_OPC_CheckPredicate, 30, 43, 18, 0, // Skip to: 17098
5288
/* 12447 */   MCD_OPC_Decode, 224, 18, 137, 2, // Opcode: MULR_Q_H
5289
/* 12452 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 12467
5290
/* 12457 */   MCD_OPC_CheckPredicate, 30, 28, 18, 0, // Skip to: 17098
5291
/* 12462 */   MCD_OPC_Decode, 225, 18, 138, 2, // Opcode: MULR_Q_W
5292
/* 12467 */   MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 12482
5293
/* 12472 */   MCD_OPC_CheckPredicate, 30, 13, 18, 0, // Skip to: 17098
5294
/* 12477 */   MCD_OPC_Decode, 200, 16, 141, 2, // Opcode: MADDR_Q_H
5295
/* 12482 */   MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 12497
5296
/* 12487 */   MCD_OPC_CheckPredicate, 30, 254, 17, 0, // Skip to: 17098
5297
/* 12492 */   MCD_OPC_Decode, 201, 16, 142, 2, // Opcode: MADDR_Q_W
5298
/* 12497 */   MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 12512
5299
/* 12502 */   MCD_OPC_CheckPredicate, 30, 239, 17, 0, // Skip to: 17098
5300
/* 12507 */   MCD_OPC_Decode, 136, 18, 141, 2, // Opcode: MSUBR_Q_H
5301
/* 12512 */   MCD_OPC_FilterValue, 29, 229, 17, 0, // Skip to: 17098
5302
/* 12517 */   MCD_OPC_CheckPredicate, 30, 224, 17, 0, // Skip to: 17098
5303
/* 12522 */   MCD_OPC_Decode, 137, 18, 142, 2, // Opcode: MSUBR_Q_W
5304
/* 12527 */   MCD_OPC_FilterValue, 30, 76, 3, 0, // Skip to: 13376
5305
/* 12532 */   MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
5306
/* 12535 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12550
5307
/* 12540 */   MCD_OPC_CheckPredicate, 30, 201, 17, 0, // Skip to: 17098
5308
/* 12545 */   MCD_OPC_Decode, 230, 6, 136, 2, // Opcode: AND_V
5309
/* 12550 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 12565
5310
/* 12555 */   MCD_OPC_CheckPredicate, 30, 186, 17, 0, // Skip to: 17098
5311
/* 12560 */   MCD_OPC_Decode, 174, 19, 136, 2, // Opcode: OR_V
5312
/* 12565 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 12580
5313
/* 12570 */   MCD_OPC_CheckPredicate, 30, 171, 17, 0, // Skip to: 17098
5314
/* 12575 */   MCD_OPC_Decode, 157, 19, 136, 2, // Opcode: NOR_V
5315
/* 12580 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 12595
5316
/* 12585 */   MCD_OPC_CheckPredicate, 30, 156, 17, 0, // Skip to: 17098
5317
/* 12590 */   MCD_OPC_Decode, 183, 24, 136, 2, // Opcode: XOR_V
5318
/* 12595 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 12610
5319
/* 12600 */   MCD_OPC_CheckPredicate, 30, 141, 17, 0, // Skip to: 17098
5320
/* 12605 */   MCD_OPC_Decode, 167, 8, 140, 2, // Opcode: BMNZ_V
5321
/* 12610 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 12625
5322
/* 12615 */   MCD_OPC_CheckPredicate, 30, 126, 17, 0, // Skip to: 17098
5323
/* 12620 */   MCD_OPC_Decode, 169, 8, 140, 2, // Opcode: BMZ_V
5324
/* 12625 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 12640
5325
/* 12630 */   MCD_OPC_CheckPredicate, 30, 111, 17, 0, // Skip to: 17098
5326
/* 12635 */   MCD_OPC_Decode, 220, 8, 140, 2, // Opcode: BSEL_V
5327
/* 12640 */   MCD_OPC_FilterValue, 24, 243, 0, 0, // Skip to: 12888
5328
/* 12645 */   MCD_OPC_ExtractField, 16, 5,  // Inst{20-16} ...
5329
/* 12648 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12663
5330
/* 12653 */   MCD_OPC_CheckPredicate, 30, 88, 17, 0, // Skip to: 17098
5331
/* 12658 */   MCD_OPC_Decode, 200, 13, 180, 2, // Opcode: FILL_B
5332
/* 12663 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 12678
5333
/* 12668 */   MCD_OPC_CheckPredicate, 30, 73, 17, 0, // Skip to: 17098
5334
/* 12673 */   MCD_OPC_Decode, 202, 13, 181, 2, // Opcode: FILL_H
5335
/* 12678 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 12693
5336
/* 12683 */   MCD_OPC_CheckPredicate, 30, 58, 17, 0, // Skip to: 17098
5337
/* 12688 */   MCD_OPC_Decode, 203, 13, 182, 2, // Opcode: FILL_W
5338
/* 12693 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 12708
5339
/* 12698 */   MCD_OPC_CheckPredicate, 38, 43, 17, 0, // Skip to: 17098
5340
/* 12703 */   MCD_OPC_Decode, 201, 13, 183, 2, // Opcode: FILL_D
5341
/* 12708 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 12723
5342
/* 12713 */   MCD_OPC_CheckPredicate, 30, 28, 17, 0, // Skip to: 17098
5343
/* 12718 */   MCD_OPC_Decode, 193, 19, 172, 2, // Opcode: PCNT_B
5344
/* 12723 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 12738
5345
/* 12728 */   MCD_OPC_CheckPredicate, 30, 13, 17, 0, // Skip to: 17098
5346
/* 12733 */   MCD_OPC_Decode, 195, 19, 184, 2, // Opcode: PCNT_H
5347
/* 12738 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 12753
5348
/* 12743 */   MCD_OPC_CheckPredicate, 30, 254, 16, 0, // Skip to: 17098
5349
/* 12748 */   MCD_OPC_Decode, 196, 19, 185, 2, // Opcode: PCNT_W
5350
/* 12753 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 12768
5351
/* 12758 */   MCD_OPC_CheckPredicate, 30, 239, 16, 0, // Skip to: 17098
5352
/* 12763 */   MCD_OPC_Decode, 194, 19, 186, 2, // Opcode: PCNT_D
5353
/* 12768 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 12783
5354
/* 12773 */   MCD_OPC_CheckPredicate, 30, 224, 16, 0, // Skip to: 17098
5355
/* 12778 */   MCD_OPC_Decode, 131, 19, 172, 2, // Opcode: NLOC_B
5356
/* 12783 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 12798
5357
/* 12788 */   MCD_OPC_CheckPredicate, 30, 209, 16, 0, // Skip to: 17098
5358
/* 12793 */   MCD_OPC_Decode, 133, 19, 184, 2, // Opcode: NLOC_H
5359
/* 12798 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 12813
5360
/* 12803 */   MCD_OPC_CheckPredicate, 30, 194, 16, 0, // Skip to: 17098
5361
/* 12808 */   MCD_OPC_Decode, 134, 19, 185, 2, // Opcode: NLOC_W
5362
/* 12813 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 12828
5363
/* 12818 */   MCD_OPC_CheckPredicate, 30, 179, 16, 0, // Skip to: 17098
5364
/* 12823 */   MCD_OPC_Decode, 132, 19, 186, 2, // Opcode: NLOC_D
5365
/* 12828 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 12843
5366
/* 12833 */   MCD_OPC_CheckPredicate, 30, 164, 16, 0, // Skip to: 17098
5367
/* 12838 */   MCD_OPC_Decode, 135, 19, 172, 2, // Opcode: NLZC_B
5368
/* 12843 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 12858
5369
/* 12848 */   MCD_OPC_CheckPredicate, 30, 149, 16, 0, // Skip to: 17098
5370
/* 12853 */   MCD_OPC_Decode, 137, 19, 184, 2, // Opcode: NLZC_H
5371
/* 12858 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 12873
5372
/* 12863 */   MCD_OPC_CheckPredicate, 30, 134, 16, 0, // Skip to: 17098
5373
/* 12868 */   MCD_OPC_Decode, 138, 19, 185, 2, // Opcode: NLZC_W
5374
/* 12873 */   MCD_OPC_FilterValue, 15, 124, 16, 0, // Skip to: 17098
5375
/* 12878 */   MCD_OPC_CheckPredicate, 30, 119, 16, 0, // Skip to: 17098
5376
/* 12883 */   MCD_OPC_Decode, 136, 19, 186, 2, // Opcode: NLZC_D
5377
/* 12888 */   MCD_OPC_FilterValue, 25, 109, 16, 0, // Skip to: 17098
5378
/* 12893 */   MCD_OPC_ExtractField, 16, 5,  // Inst{20-16} ...
5379
/* 12896 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 12911
5380
/* 12901 */   MCD_OPC_CheckPredicate, 30, 96, 16, 0, // Skip to: 17098
5381
/* 12906 */   MCD_OPC_Decode, 151, 13, 185, 2, // Opcode: FCLASS_W
5382
/* 12911 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 12926
5383
/* 12916 */   MCD_OPC_CheckPredicate, 30, 81, 16, 0, // Skip to: 17098
5384
/* 12921 */   MCD_OPC_Decode, 150, 13, 186, 2, // Opcode: FCLASS_D
5385
/* 12926 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 12941
5386
/* 12931 */   MCD_OPC_CheckPredicate, 30, 66, 16, 0, // Skip to: 17098
5387
/* 12936 */   MCD_OPC_Decode, 181, 14, 185, 2, // Opcode: FTRUNC_S_W
5388
/* 12941 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 12956
5389
/* 12946 */   MCD_OPC_CheckPredicate, 30, 51, 16, 0, // Skip to: 17098
5390
/* 12951 */   MCD_OPC_Decode, 180, 14, 186, 2, // Opcode: FTRUNC_S_D
5391
/* 12956 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 12971
5392
/* 12961 */   MCD_OPC_CheckPredicate, 30, 36, 16, 0, // Skip to: 17098
5393
/* 12966 */   MCD_OPC_Decode, 183, 14, 185, 2, // Opcode: FTRUNC_U_W
5394
/* 12971 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 12986
5395
/* 12976 */   MCD_OPC_CheckPredicate, 30, 21, 16, 0, // Skip to: 17098
5396
/* 12981 */   MCD_OPC_Decode, 182, 14, 186, 2, // Opcode: FTRUNC_U_D
5397
/* 12986 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 13001
5398
/* 12991 */   MCD_OPC_CheckPredicate, 30, 6, 16, 0, // Skip to: 17098
5399
/* 12996 */   MCD_OPC_Decode, 153, 14, 185, 2, // Opcode: FSQRT_W
5400
/* 13001 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 13016
5401
/* 13006 */   MCD_OPC_CheckPredicate, 30, 247, 15, 0, // Skip to: 17098
5402
/* 13011 */   MCD_OPC_Decode, 146, 14, 186, 2, // Opcode: FSQRT_D
5403
/* 13016 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 13031
5404
/* 13021 */   MCD_OPC_CheckPredicate, 30, 232, 15, 0, // Skip to: 17098
5405
/* 13026 */   MCD_OPC_Decode, 133, 14, 185, 2, // Opcode: FRSQRT_W
5406
/* 13031 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 13046
5407
/* 13036 */   MCD_OPC_CheckPredicate, 30, 217, 15, 0, // Skip to: 17098
5408
/* 13041 */   MCD_OPC_Decode, 132, 14, 186, 2, // Opcode: FRSQRT_D
5409
/* 13046 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 13061
5410
/* 13051 */   MCD_OPC_CheckPredicate, 30, 202, 15, 0, // Skip to: 17098
5411
/* 13056 */   MCD_OPC_Decode, 129, 14, 185, 2, // Opcode: FRCP_W
5412
/* 13061 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 13076
5413
/* 13066 */   MCD_OPC_CheckPredicate, 30, 187, 15, 0, // Skip to: 17098
5414
/* 13071 */   MCD_OPC_Decode, 128, 14, 186, 2, // Opcode: FRCP_D
5415
/* 13076 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 13091
5416
/* 13081 */   MCD_OPC_CheckPredicate, 30, 172, 15, 0, // Skip to: 17098
5417
/* 13086 */   MCD_OPC_Decode, 131, 14, 185, 2, // Opcode: FRINT_W
5418
/* 13091 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 13106
5419
/* 13096 */   MCD_OPC_CheckPredicate, 30, 157, 15, 0, // Skip to: 17098
5420
/* 13101 */   MCD_OPC_Decode, 130, 14, 186, 2, // Opcode: FRINT_D
5421
/* 13106 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 13121
5422
/* 13111 */   MCD_OPC_CheckPredicate, 30, 142, 15, 0, // Skip to: 17098
5423
/* 13116 */   MCD_OPC_Decode, 205, 13, 185, 2, // Opcode: FLOG2_W
5424
/* 13121 */   MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 13136
5425
/* 13126 */   MCD_OPC_CheckPredicate, 30, 127, 15, 0, // Skip to: 17098
5426
/* 13131 */   MCD_OPC_Decode, 204, 13, 186, 2, // Opcode: FLOG2_D
5427
/* 13136 */   MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 13151
5428
/* 13141 */   MCD_OPC_CheckPredicate, 30, 112, 15, 0, // Skip to: 17098
5429
/* 13146 */   MCD_OPC_Decode, 189, 13, 187, 2, // Opcode: FEXUPL_W
5430
/* 13151 */   MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 13166
5431
/* 13156 */   MCD_OPC_CheckPredicate, 30, 97, 15, 0, // Skip to: 17098
5432
/* 13161 */   MCD_OPC_Decode, 188, 13, 188, 2, // Opcode: FEXUPL_D
5433
/* 13166 */   MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 13181
5434
/* 13171 */   MCD_OPC_CheckPredicate, 30, 82, 15, 0, // Skip to: 17098
5435
/* 13176 */   MCD_OPC_Decode, 191, 13, 187, 2, // Opcode: FEXUPR_W
5436
/* 13181 */   MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 13196
5437
/* 13186 */   MCD_OPC_CheckPredicate, 30, 67, 15, 0, // Skip to: 17098
5438
/* 13191 */   MCD_OPC_Decode, 190, 13, 188, 2, // Opcode: FEXUPR_D
5439
/* 13196 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 13211
5440
/* 13201 */   MCD_OPC_CheckPredicate, 30, 52, 15, 0, // Skip to: 17098
5441
/* 13206 */   MCD_OPC_Decode, 197, 13, 187, 2, // Opcode: FFQL_W
5442
/* 13211 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 13226
5443
/* 13216 */   MCD_OPC_CheckPredicate, 30, 37, 15, 0, // Skip to: 17098
5444
/* 13221 */   MCD_OPC_Decode, 196, 13, 188, 2, // Opcode: FFQL_D
5445
/* 13226 */   MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 13241
5446
/* 13231 */   MCD_OPC_CheckPredicate, 30, 22, 15, 0, // Skip to: 17098
5447
/* 13236 */   MCD_OPC_Decode, 199, 13, 187, 2, // Opcode: FFQR_W
5448
/* 13241 */   MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 13256
5449
/* 13246 */   MCD_OPC_CheckPredicate, 30, 7, 15, 0, // Skip to: 17098
5450
/* 13251 */   MCD_OPC_Decode, 198, 13, 188, 2, // Opcode: FFQR_D
5451
/* 13256 */   MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 13271
5452
/* 13261 */   MCD_OPC_CheckPredicate, 30, 248, 14, 0, // Skip to: 17098
5453
/* 13266 */   MCD_OPC_Decode, 175, 14, 185, 2, // Opcode: FTINT_S_W
5454
/* 13271 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 13286
5455
/* 13276 */   MCD_OPC_CheckPredicate, 30, 233, 14, 0, // Skip to: 17098
5456
/* 13281 */   MCD_OPC_Decode, 174, 14, 186, 2, // Opcode: FTINT_S_D
5457
/* 13286 */   MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 13301
5458
/* 13291 */   MCD_OPC_CheckPredicate, 30, 218, 14, 0, // Skip to: 17098
5459
/* 13296 */   MCD_OPC_Decode, 177, 14, 185, 2, // Opcode: FTINT_U_W
5460
/* 13301 */   MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 13316
5461
/* 13306 */   MCD_OPC_CheckPredicate, 30, 203, 14, 0, // Skip to: 17098
5462
/* 13311 */   MCD_OPC_Decode, 176, 14, 186, 2, // Opcode: FTINT_U_D
5463
/* 13316 */   MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 13331
5464
/* 13321 */   MCD_OPC_CheckPredicate, 30, 188, 14, 0, // Skip to: 17098
5465
/* 13326 */   MCD_OPC_Decode, 193, 13, 185, 2, // Opcode: FFINT_S_W
5466
/* 13331 */   MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 13346
5467
/* 13336 */   MCD_OPC_CheckPredicate, 30, 173, 14, 0, // Skip to: 17098
5468
/* 13341 */   MCD_OPC_Decode, 192, 13, 186, 2, // Opcode: FFINT_S_D
5469
/* 13346 */   MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 13361
5470
/* 13351 */   MCD_OPC_CheckPredicate, 30, 158, 14, 0, // Skip to: 17098
5471
/* 13356 */   MCD_OPC_Decode, 195, 13, 185, 2, // Opcode: FFINT_U_W
5472
/* 13361 */   MCD_OPC_FilterValue, 31, 148, 14, 0, // Skip to: 17098
5473
/* 13366 */   MCD_OPC_CheckPredicate, 30, 143, 14, 0, // Skip to: 17098
5474
/* 13371 */   MCD_OPC_Decode, 194, 13, 186, 2, // Opcode: FFINT_U_D
5475
/* 13376 */   MCD_OPC_FilterValue, 32, 10, 0, 0, // Skip to: 13391
5476
/* 13381 */   MCD_OPC_CheckPredicate, 30, 128, 14, 0, // Skip to: 17098
5477
/* 13386 */   MCD_OPC_Decode, 198, 15, 189, 2, // Opcode: LD_B
5478
/* 13391 */   MCD_OPC_FilterValue, 33, 10, 0, 0, // Skip to: 13406
5479
/* 13396 */   MCD_OPC_CheckPredicate, 30, 113, 14, 0, // Skip to: 17098
5480
/* 13401 */   MCD_OPC_Decode, 200, 15, 189, 2, // Opcode: LD_H
5481
/* 13406 */   MCD_OPC_FilterValue, 34, 10, 0, 0, // Skip to: 13421
5482
/* 13411 */   MCD_OPC_CheckPredicate, 30, 98, 14, 0, // Skip to: 17098
5483
/* 13416 */   MCD_OPC_Decode, 201, 15, 189, 2, // Opcode: LD_W
5484
/* 13421 */   MCD_OPC_FilterValue, 35, 10, 0, 0, // Skip to: 13436
5485
/* 13426 */   MCD_OPC_CheckPredicate, 30, 83, 14, 0, // Skip to: 17098
5486
/* 13431 */   MCD_OPC_Decode, 199, 15, 189, 2, // Opcode: LD_D
5487
/* 13436 */   MCD_OPC_FilterValue, 36, 10, 0, 0, // Skip to: 13451
5488
/* 13441 */   MCD_OPC_CheckPredicate, 30, 68, 14, 0, // Skip to: 17098
5489
/* 13446 */   MCD_OPC_Decode, 188, 22, 189, 2, // Opcode: ST_B
5490
/* 13451 */   MCD_OPC_FilterValue, 37, 10, 0, 0, // Skip to: 13466
5491
/* 13456 */   MCD_OPC_CheckPredicate, 30, 53, 14, 0, // Skip to: 17098
5492
/* 13461 */   MCD_OPC_Decode, 190, 22, 189, 2, // Opcode: ST_H
5493
/* 13466 */   MCD_OPC_FilterValue, 38, 10, 0, 0, // Skip to: 13481
5494
/* 13471 */   MCD_OPC_CheckPredicate, 30, 38, 14, 0, // Skip to: 17098
5495
/* 13476 */   MCD_OPC_Decode, 191, 22, 189, 2, // Opcode: ST_W
5496
/* 13481 */   MCD_OPC_FilterValue, 39, 28, 14, 0, // Skip to: 17098
5497
/* 13486 */   MCD_OPC_CheckPredicate, 30, 23, 14, 0, // Skip to: 17098
5498
/* 13491 */   MCD_OPC_Decode, 189, 22, 189, 2, // Opcode: ST_D
5499
/* 13496 */   MCD_OPC_FilterValue, 31, 165, 12, 0, // Skip to: 16738
5500
/* 13501 */   MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
5501
/* 13504 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13519
5502
/* 13509 */   MCD_OPC_CheckPredicate, 28, 0, 14, 0, // Skip to: 17098
5503
/* 13514 */   MCD_OPC_Decode, 227, 12, 190, 2, // Opcode: EXT
5504
/* 13519 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 13534
5505
/* 13524 */   MCD_OPC_CheckPredicate, 28, 241, 13, 0, // Skip to: 17098
5506
/* 13529 */   MCD_OPC_Decode, 220, 14, 191, 2, // Opcode: INS
5507
/* 13534 */   MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 13556
5508
/* 13539 */   MCD_OPC_CheckPredicate, 42, 226, 13, 0, // Skip to: 17098
5509
/* 13544 */   MCD_OPC_CheckField, 6, 5, 0, 219, 13, 0, // Skip to: 17098
5510
/* 13551 */   MCD_OPC_Decode, 254, 13, 192, 2, // Opcode: FORK
5511
/* 13556 */   MCD_OPC_FilterValue, 9, 23, 0, 0, // Skip to: 13584
5512
/* 13561 */   MCD_OPC_CheckPredicate, 42, 204, 13, 0, // Skip to: 17098
5513
/* 13566 */   MCD_OPC_CheckField, 16, 5, 0, 197, 13, 0, // Skip to: 17098
5514
/* 13573 */   MCD_OPC_CheckField, 6, 5, 0, 190, 13, 0, // Skip to: 17098
5515
/* 13580 */   MCD_OPC_Decode, 188, 24, 25, // Opcode: YIELD
5516
/* 13584 */   MCD_OPC_FilterValue, 10, 48, 0, 0, // Skip to: 13637
5517
/* 13589 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5518
/* 13592 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13607
5519
/* 13597 */   MCD_OPC_CheckPredicate, 37, 168, 13, 0, // Skip to: 17098
5520
/* 13602 */   MCD_OPC_Decode, 171, 16, 193, 2, // Opcode: LWX
5521
/* 13607 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 13622
5522
/* 13612 */   MCD_OPC_CheckPredicate, 37, 153, 13, 0, // Skip to: 17098
5523
/* 13617 */   MCD_OPC_Decode, 219, 15, 193, 2, // Opcode: LHX
5524
/* 13622 */   MCD_OPC_FilterValue, 6, 143, 13, 0, // Skip to: 17098
5525
/* 13627 */   MCD_OPC_CheckPredicate, 37, 138, 13, 0, // Skip to: 17098
5526
/* 13632 */   MCD_OPC_Decode, 163, 15, 193, 2, // Opcode: LBUX
5527
/* 13637 */   MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 13659
5528
/* 13642 */   MCD_OPC_CheckPredicate, 37, 123, 13, 0, // Skip to: 17098
5529
/* 13647 */   MCD_OPC_CheckField, 6, 10, 0, 116, 13, 0, // Skip to: 17098
5530
/* 13654 */   MCD_OPC_Decode, 225, 14, 194, 2, // Opcode: INSV
5531
/* 13659 */   MCD_OPC_FilterValue, 16, 109, 1, 0, // Skip to: 14029
5532
/* 13664 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5533
/* 13667 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 13682
5534
/* 13672 */   MCD_OPC_CheckPredicate, 37, 93, 13, 0, // Skip to: 17098
5535
/* 13677 */   MCD_OPC_Decode, 179, 6, 195, 2, // Opcode: ADDU_QB
5536
/* 13682 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 13697
5537
/* 13687 */   MCD_OPC_CheckPredicate, 37, 78, 13, 0, // Skip to: 17098
5538
/* 13692 */   MCD_OPC_Decode, 232, 22, 195, 2, // Opcode: SUBU_QB
5539
/* 13697 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 13712
5540
/* 13702 */   MCD_OPC_CheckPredicate, 37, 63, 13, 0, // Skip to: 17098
5541
/* 13707 */   MCD_OPC_Decode, 183, 6, 195, 2, // Opcode: ADDU_S_QB
5542
/* 13712 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 13727
5543
/* 13717 */   MCD_OPC_CheckPredicate, 37, 48, 13, 0, // Skip to: 17098
5544
/* 13722 */   MCD_OPC_Decode, 236, 22, 195, 2, // Opcode: SUBU_S_QB
5545
/* 13727 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 13742
5546
/* 13732 */   MCD_OPC_CheckPredicate, 37, 33, 13, 0, // Skip to: 17098
5547
/* 13737 */   MCD_OPC_Decode, 211, 18, 195, 2, // Opcode: MULEU_S_PH_QBL
5548
/* 13742 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 13757
5549
/* 13747 */   MCD_OPC_CheckPredicate, 37, 18, 13, 0, // Skip to: 17098
5550
/* 13752 */   MCD_OPC_Decode, 213, 18, 195, 2, // Opcode: MULEU_S_PH_QBR
5551
/* 13757 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 13772
5552
/* 13762 */   MCD_OPC_CheckPredicate, 69, 3, 13, 0, // Skip to: 17098
5553
/* 13767 */   MCD_OPC_Decode, 177, 6, 195, 2, // Opcode: ADDU_PH
5554
/* 13772 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 13787
5555
/* 13777 */   MCD_OPC_CheckPredicate, 69, 244, 12, 0, // Skip to: 17098
5556
/* 13782 */   MCD_OPC_Decode, 230, 22, 195, 2, // Opcode: SUBU_PH
5557
/* 13787 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 13802
5558
/* 13792 */   MCD_OPC_CheckPredicate, 37, 229, 12, 0, // Skip to: 17098
5559
/* 13797 */   MCD_OPC_Decode, 149, 6, 195, 2, // Opcode: ADDQ_PH
5560
/* 13802 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 13817
5561
/* 13807 */   MCD_OPC_CheckPredicate, 37, 214, 12, 0, // Skip to: 17098
5562
/* 13812 */   MCD_OPC_Decode, 201, 22, 195, 2, // Opcode: SUBQ_PH
5563
/* 13817 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 13832
5564
/* 13822 */   MCD_OPC_CheckPredicate, 69, 199, 12, 0, // Skip to: 17098
5565
/* 13827 */   MCD_OPC_Decode, 181, 6, 195, 2, // Opcode: ADDU_S_PH
5566
/* 13832 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 13847
5567
/* 13837 */   MCD_OPC_CheckPredicate, 69, 184, 12, 0, // Skip to: 17098
5568
/* 13842 */   MCD_OPC_Decode, 234, 22, 195, 2, // Opcode: SUBU_S_PH
5569
/* 13847 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 13862
5570
/* 13852 */   MCD_OPC_CheckPredicate, 37, 169, 12, 0, // Skip to: 17098
5571
/* 13857 */   MCD_OPC_Decode, 151, 6, 195, 2, // Opcode: ADDQ_S_PH
5572
/* 13862 */   MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 13877
5573
/* 13867 */   MCD_OPC_CheckPredicate, 37, 154, 12, 0, // Skip to: 17098
5574
/* 13872 */   MCD_OPC_Decode, 203, 22, 195, 2, // Opcode: SUBQ_S_PH
5575
/* 13877 */   MCD_OPC_FilterValue, 16, 9, 0, 0, // Skip to: 13891
5576
/* 13882 */   MCD_OPC_CheckPredicate, 37, 139, 12, 0, // Skip to: 17098
5577
/* 13887 */   MCD_OPC_Decode, 156, 6, 61, // Opcode: ADDSC
5578
/* 13891 */   MCD_OPC_FilterValue, 17, 9, 0, 0, // Skip to: 13905
5579
/* 13896 */   MCD_OPC_CheckPredicate, 37, 125, 12, 0, // Skip to: 17098
5580
/* 13901 */   MCD_OPC_Decode, 193, 6, 61, // Opcode: ADDWC
5581
/* 13905 */   MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 13919
5582
/* 13910 */   MCD_OPC_CheckPredicate, 37, 111, 12, 0, // Skip to: 17098
5583
/* 13915 */   MCD_OPC_Decode, 193, 17, 61, // Opcode: MODSUB
5584
/* 13919 */   MCD_OPC_FilterValue, 20, 17, 0, 0, // Skip to: 13941
5585
/* 13924 */   MCD_OPC_CheckPredicate, 37, 97, 12, 0, // Skip to: 17098
5586
/* 13929 */   MCD_OPC_CheckField, 16, 5, 0, 90, 12, 0, // Skip to: 17098
5587
/* 13936 */   MCD_OPC_Decode, 251, 19, 196, 2, // Opcode: RADDU_W_QB
5588
/* 13941 */   MCD_OPC_FilterValue, 22, 9, 0, 0, // Skip to: 13955
5589
/* 13946 */   MCD_OPC_CheckPredicate, 37, 75, 12, 0, // Skip to: 17098
5590
/* 13951 */   MCD_OPC_Decode, 153, 6, 61, // Opcode: ADDQ_S_W
5591
/* 13955 */   MCD_OPC_FilterValue, 23, 9, 0, 0, // Skip to: 13969
5592
/* 13960 */   MCD_OPC_CheckPredicate, 37, 61, 12, 0, // Skip to: 17098
5593
/* 13965 */   MCD_OPC_Decode, 205, 22, 61, // Opcode: SUBQ_S_W
5594
/* 13969 */   MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 13984
5595
/* 13974 */   MCD_OPC_CheckPredicate, 37, 47, 12, 0, // Skip to: 17098
5596
/* 13979 */   MCD_OPC_Decode, 207, 18, 197, 2, // Opcode: MULEQ_S_W_PHL
5597
/* 13984 */   MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 13999
5598
/* 13989 */   MCD_OPC_CheckPredicate, 37, 32, 12, 0, // Skip to: 17098
5599
/* 13994 */   MCD_OPC_Decode, 209, 18, 197, 2, // Opcode: MULEQ_S_W_PHR
5600
/* 13999 */   MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 14014
5601
/* 14004 */   MCD_OPC_CheckPredicate, 69, 17, 12, 0, // Skip to: 17098
5602
/* 14009 */   MCD_OPC_Decode, 219, 18, 195, 2, // Opcode: MULQ_S_PH
5603
/* 14014 */   MCD_OPC_FilterValue, 31, 7, 12, 0, // Skip to: 17098
5604
/* 14019 */   MCD_OPC_CheckPredicate, 37, 2, 12, 0, // Skip to: 17098
5605
/* 14024 */   MCD_OPC_Decode, 215, 18, 195, 2, // Opcode: MULQ_RS_PH
5606
/* 14029 */   MCD_OPC_FilterValue, 17, 113, 1, 0, // Skip to: 14403
5607
/* 14034 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5608
/* 14037 */   MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 14058
5609
/* 14042 */   MCD_OPC_CheckPredicate, 37, 235, 11, 0, // Skip to: 17098
5610
/* 14047 */   MCD_OPC_CheckField, 11, 5, 0, 228, 11, 0, // Skip to: 17098
5611
/* 14054 */   MCD_OPC_Decode, 210, 9, 79, // Opcode: CMPU_EQ_QB
5612
/* 14058 */   MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 14079
5613
/* 14063 */   MCD_OPC_CheckPredicate, 37, 214, 11, 0, // Skip to: 17098
5614
/* 14068 */   MCD_OPC_CheckField, 11, 5, 0, 207, 11, 0, // Skip to: 17098
5615
/* 14075 */   MCD_OPC_Decode, 214, 9, 79, // Opcode: CMPU_LT_QB
5616
/* 14079 */   MCD_OPC_FilterValue, 2, 16, 0, 0, // Skip to: 14100
5617
/* 14084 */   MCD_OPC_CheckPredicate, 37, 193, 11, 0, // Skip to: 17098
5618
/* 14089 */   MCD_OPC_CheckField, 11, 5, 0, 186, 11, 0, // Skip to: 17098
5619
/* 14096 */   MCD_OPC_Decode, 212, 9, 79, // Opcode: CMPU_LE_QB
5620
/* 14100 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 14115
5621
/* 14105 */   MCD_OPC_CheckPredicate, 37, 172, 11, 0, // Skip to: 17098
5622
/* 14110 */   MCD_OPC_Decode, 199, 19, 195, 2, // Opcode: PICK_QB
5623
/* 14115 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 14130
5624
/* 14120 */   MCD_OPC_CheckPredicate, 37, 157, 11, 0, // Skip to: 17098
5625
/* 14125 */   MCD_OPC_Decode, 204, 9, 197, 2, // Opcode: CMPGU_EQ_QB
5626
/* 14130 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 14145
5627
/* 14135 */   MCD_OPC_CheckPredicate, 37, 142, 11, 0, // Skip to: 17098
5628
/* 14140 */   MCD_OPC_Decode, 208, 9, 197, 2, // Opcode: CMPGU_LT_QB
5629
/* 14145 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 14160
5630
/* 14150 */   MCD_OPC_CheckPredicate, 37, 127, 11, 0, // Skip to: 17098
5631
/* 14155 */   MCD_OPC_Decode, 206, 9, 197, 2, // Opcode: CMPGU_LE_QB
5632
/* 14160 */   MCD_OPC_FilterValue, 8, 16, 0, 0, // Skip to: 14181
5633
/* 14165 */   MCD_OPC_CheckPredicate, 37, 112, 11, 0, // Skip to: 17098
5634
/* 14170 */   MCD_OPC_CheckField, 11, 5, 0, 105, 11, 0, // Skip to: 17098
5635
/* 14177 */   MCD_OPC_Decode, 220, 9, 79, // Opcode: CMP_EQ_PH
5636
/* 14181 */   MCD_OPC_FilterValue, 9, 16, 0, 0, // Skip to: 14202
5637
/* 14186 */   MCD_OPC_CheckPredicate, 37, 91, 11, 0, // Skip to: 17098
5638
/* 14191 */   MCD_OPC_CheckField, 11, 5, 0, 84, 11, 0, // Skip to: 17098
5639
/* 14198 */   MCD_OPC_Decode, 234, 9, 79, // Opcode: CMP_LT_PH
5640
/* 14202 */   MCD_OPC_FilterValue, 10, 16, 0, 0, // Skip to: 14223
5641
/* 14207 */   MCD_OPC_CheckPredicate, 37, 70, 11, 0, // Skip to: 17098
5642
/* 14212 */   MCD_OPC_CheckField, 11, 5, 0, 63, 11, 0, // Skip to: 17098
5643
/* 14219 */   MCD_OPC_Decode, 228, 9, 79, // Opcode: CMP_LE_PH
5644
/* 14223 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 14238
5645
/* 14228 */   MCD_OPC_CheckPredicate, 37, 49, 11, 0, // Skip to: 17098
5646
/* 14233 */   MCD_OPC_Decode, 197, 19, 195, 2, // Opcode: PICK_PH
5647
/* 14238 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 14253
5648
/* 14243 */   MCD_OPC_CheckPredicate, 37, 34, 11, 0, // Skip to: 17098
5649
/* 14248 */   MCD_OPC_Decode, 228, 19, 195, 2, // Opcode: PRECRQ_QB_PH
5650
/* 14253 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 14268
5651
/* 14258 */   MCD_OPC_CheckPredicate, 69, 19, 11, 0, // Skip to: 17098
5652
/* 14263 */   MCD_OPC_Decode, 232, 19, 195, 2, // Opcode: PRECR_QB_PH
5653
/* 14268 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 14283
5654
/* 14273 */   MCD_OPC_CheckPredicate, 37, 4, 11, 0, // Skip to: 17098
5655
/* 14278 */   MCD_OPC_Decode, 179, 19, 195, 2, // Opcode: PACKRL_PH
5656
/* 14283 */   MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 14298
5657
/* 14288 */   MCD_OPC_CheckPredicate, 37, 245, 10, 0, // Skip to: 17098
5658
/* 14293 */   MCD_OPC_Decode, 224, 19, 195, 2, // Opcode: PRECRQU_S_QB_PH
5659
/* 14298 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 14313
5660
/* 14303 */   MCD_OPC_CheckPredicate, 37, 230, 10, 0, // Skip to: 17098
5661
/* 14308 */   MCD_OPC_Decode, 226, 19, 198, 2, // Opcode: PRECRQ_PH_W
5662
/* 14313 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 14328
5663
/* 14318 */   MCD_OPC_CheckPredicate, 37, 215, 10, 0, // Skip to: 17098
5664
/* 14323 */   MCD_OPC_Decode, 230, 19, 198, 2, // Opcode: PRECRQ_RS_PH_W
5665
/* 14328 */   MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 14343
5666
/* 14333 */   MCD_OPC_CheckPredicate, 69, 200, 10, 0, // Skip to: 17098
5667
/* 14338 */   MCD_OPC_Decode, 198, 9, 197, 2, // Opcode: CMPGDU_EQ_QB
5668
/* 14343 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 14358
5669
/* 14348 */   MCD_OPC_CheckPredicate, 69, 185, 10, 0, // Skip to: 17098
5670
/* 14353 */   MCD_OPC_Decode, 202, 9, 197, 2, // Opcode: CMPGDU_LT_QB
5671
/* 14358 */   MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 14373
5672
/* 14363 */   MCD_OPC_CheckPredicate, 69, 170, 10, 0, // Skip to: 17098
5673
/* 14368 */   MCD_OPC_Decode, 200, 9, 197, 2, // Opcode: CMPGDU_LE_QB
5674
/* 14373 */   MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 14388
5675
/* 14378 */   MCD_OPC_CheckPredicate, 69, 155, 10, 0, // Skip to: 17098
5676
/* 14383 */   MCD_OPC_Decode, 234, 19, 199, 2, // Opcode: PRECR_SRA_PH_W
5677
/* 14388 */   MCD_OPC_FilterValue, 31, 145, 10, 0, // Skip to: 17098
5678
/* 14393 */   MCD_OPC_CheckPredicate, 69, 140, 10, 0, // Skip to: 17098
5679
/* 14398 */   MCD_OPC_Decode, 236, 19, 199, 2, // Opcode: PRECR_SRA_R_PH_W
5680
/* 14403 */   MCD_OPC_FilterValue, 18, 128, 1, 0, // Skip to: 14792
5681
/* 14408 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5682
/* 14411 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 14433
5683
/* 14416 */   MCD_OPC_CheckPredicate, 69, 117, 10, 0, // Skip to: 17098
5684
/* 14421 */   MCD_OPC_CheckField, 21, 5, 0, 110, 10, 0, // Skip to: 17098
5685
/* 14428 */   MCD_OPC_Decode, 247, 5, 200, 2, // Opcode: ABSQ_S_QB
5686
/* 14433 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 14448
5687
/* 14438 */   MCD_OPC_CheckPredicate, 37, 95, 10, 0, // Skip to: 17098
5688
/* 14443 */   MCD_OPC_Decode, 146, 20, 201, 2, // Opcode: REPL_QB
5689
/* 14448 */   MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 14470
5690
/* 14453 */   MCD_OPC_CheckPredicate, 37, 80, 10, 0, // Skip to: 17098
5691
/* 14458 */   MCD_OPC_CheckField, 21, 5, 0, 73, 10, 0, // Skip to: 17098
5692
/* 14465 */   MCD_OPC_Decode, 142, 20, 202, 2, // Opcode: REPLV_QB
5693
/* 14470 */   MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 14492
5694
/* 14475 */   MCD_OPC_CheckPredicate, 37, 58, 10, 0, // Skip to: 17098
5695
/* 14480 */   MCD_OPC_CheckField, 21, 5, 0, 51, 10, 0, // Skip to: 17098
5696
/* 14487 */   MCD_OPC_Decode, 204, 19, 200, 2, // Opcode: PRECEQU_PH_QBL
5697
/* 14492 */   MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 14514
5698
/* 14497 */   MCD_OPC_CheckPredicate, 37, 36, 10, 0, // Skip to: 17098
5699
/* 14502 */   MCD_OPC_CheckField, 21, 5, 0, 29, 10, 0, // Skip to: 17098
5700
/* 14509 */   MCD_OPC_Decode, 208, 19, 200, 2, // Opcode: PRECEQU_PH_QBR
5701
/* 14514 */   MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 14536
5702
/* 14519 */   MCD_OPC_CheckPredicate, 37, 14, 10, 0, // Skip to: 17098
5703
/* 14524 */   MCD_OPC_CheckField, 21, 5, 0, 7, 10, 0, // Skip to: 17098
5704
/* 14531 */   MCD_OPC_Decode, 205, 19, 200, 2, // Opcode: PRECEQU_PH_QBLA
5705
/* 14536 */   MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 14558
5706
/* 14541 */   MCD_OPC_CheckPredicate, 37, 248, 9, 0, // Skip to: 17098
5707
/* 14546 */   MCD_OPC_CheckField, 21, 5, 0, 241, 9, 0, // Skip to: 17098
5708
/* 14553 */   MCD_OPC_Decode, 209, 19, 200, 2, // Opcode: PRECEQU_PH_QBRA
5709
/* 14558 */   MCD_OPC_FilterValue, 9, 17, 0, 0, // Skip to: 14580
5710
/* 14563 */   MCD_OPC_CheckPredicate, 37, 226, 9, 0, // Skip to: 17098
5711
/* 14568 */   MCD_OPC_CheckField, 21, 5, 0, 219, 9, 0, // Skip to: 17098
5712
/* 14575 */   MCD_OPC_Decode, 245, 5, 200, 2, // Opcode: ABSQ_S_PH
5713
/* 14580 */   MCD_OPC_FilterValue, 10, 9, 0, 0, // Skip to: 14594
5714
/* 14585 */   MCD_OPC_CheckPredicate, 37, 204, 9, 0, // Skip to: 17098
5715
/* 14590 */   MCD_OPC_Decode, 144, 20, 96, // Opcode: REPL_PH
5716
/* 14594 */   MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 14616
5717
/* 14599 */   MCD_OPC_CheckPredicate, 37, 190, 9, 0, // Skip to: 17098
5718
/* 14604 */   MCD_OPC_CheckField, 21, 5, 0, 183, 9, 0, // Skip to: 17098
5719
/* 14611 */   MCD_OPC_Decode, 140, 20, 202, 2, // Opcode: REPLV_PH
5720
/* 14616 */   MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 14638
5721
/* 14621 */   MCD_OPC_CheckPredicate, 37, 168, 9, 0, // Skip to: 17098
5722
/* 14626 */   MCD_OPC_CheckField, 21, 5, 0, 161, 9, 0, // Skip to: 17098
5723
/* 14633 */   MCD_OPC_Decode, 212, 19, 203, 2, // Opcode: PRECEQ_W_PHL
5724
/* 14638 */   MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 14660
5725
/* 14643 */   MCD_OPC_CheckPredicate, 37, 146, 9, 0, // Skip to: 17098
5726
/* 14648 */   MCD_OPC_CheckField, 21, 5, 0, 139, 9, 0, // Skip to: 17098
5727
/* 14655 */   MCD_OPC_Decode, 214, 19, 203, 2, // Opcode: PRECEQ_W_PHR
5728
/* 14660 */   MCD_OPC_FilterValue, 17, 17, 0, 0, // Skip to: 14682
5729
/* 14665 */   MCD_OPC_CheckPredicate, 37, 124, 9, 0, // Skip to: 17098
5730
/* 14670 */   MCD_OPC_CheckField, 21, 5, 0, 117, 9, 0, // Skip to: 17098
5731
/* 14677 */   MCD_OPC_Decode, 249, 5, 204, 2, // Opcode: ABSQ_S_W
5732
/* 14682 */   MCD_OPC_FilterValue, 27, 17, 0, 0, // Skip to: 14704
5733
/* 14687 */   MCD_OPC_CheckPredicate, 37, 102, 9, 0, // Skip to: 17098
5734
/* 14692 */   MCD_OPC_CheckField, 21, 5, 0, 95, 9, 0, // Skip to: 17098
5735
/* 14699 */   MCD_OPC_Decode, 129, 8, 204, 2, // Opcode: BITREV
5736
/* 14704 */   MCD_OPC_FilterValue, 28, 17, 0, 0, // Skip to: 14726
5737
/* 14709 */   MCD_OPC_CheckPredicate, 37, 80, 9, 0, // Skip to: 17098
5738
/* 14714 */   MCD_OPC_CheckField, 21, 5, 0, 73, 9, 0, // Skip to: 17098
5739
/* 14721 */   MCD_OPC_Decode, 216, 19, 200, 2, // Opcode: PRECEU_PH_QBL
5740
/* 14726 */   MCD_OPC_FilterValue, 29, 17, 0, 0, // Skip to: 14748
5741
/* 14731 */   MCD_OPC_CheckPredicate, 37, 58, 9, 0, // Skip to: 17098
5742
/* 14736 */   MCD_OPC_CheckField, 21, 5, 0, 51, 9, 0, // Skip to: 17098
5743
/* 14743 */   MCD_OPC_Decode, 220, 19, 200, 2, // Opcode: PRECEU_PH_QBR
5744
/* 14748 */   MCD_OPC_FilterValue, 30, 17, 0, 0, // Skip to: 14770
5745
/* 14753 */   MCD_OPC_CheckPredicate, 37, 36, 9, 0, // Skip to: 17098
5746
/* 14758 */   MCD_OPC_CheckField, 21, 5, 0, 29, 9, 0, // Skip to: 17098
5747
/* 14765 */   MCD_OPC_Decode, 217, 19, 200, 2, // Opcode: PRECEU_PH_QBLA
5748
/* 14770 */   MCD_OPC_FilterValue, 31, 19, 9, 0, // Skip to: 17098
5749
/* 14775 */   MCD_OPC_CheckPredicate, 37, 14, 9, 0, // Skip to: 17098
5750
/* 14780 */   MCD_OPC_CheckField, 21, 5, 0, 7, 9, 0, // Skip to: 17098
5751
/* 14787 */   MCD_OPC_Decode, 221, 19, 200, 2, // Opcode: PRECEU_PH_QBRA
5752
/* 14792 */   MCD_OPC_FilterValue, 19, 75, 1, 0, // Skip to: 15128
5753
/* 14797 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5754
/* 14800 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 14815
5755
/* 14805 */   MCD_OPC_CheckPredicate, 37, 240, 8, 0, // Skip to: 17098
5756
/* 14810 */   MCD_OPC_Decode, 168, 21, 205, 2, // Opcode: SHLL_QB
5757
/* 14815 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 14830
5758
/* 14820 */   MCD_OPC_CheckPredicate, 37, 225, 8, 0, // Skip to: 17098
5759
/* 14825 */   MCD_OPC_Decode, 200, 21, 205, 2, // Opcode: SHRL_QB
5760
/* 14830 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 14845
5761
/* 14835 */   MCD_OPC_CheckPredicate, 37, 210, 8, 0, // Skip to: 17098
5762
/* 14840 */   MCD_OPC_Decode, 160, 21, 206, 2, // Opcode: SHLLV_QB
5763
/* 14845 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 14860
5764
/* 14850 */   MCD_OPC_CheckPredicate, 37, 195, 8, 0, // Skip to: 17098
5765
/* 14855 */   MCD_OPC_Decode, 196, 21, 206, 2, // Opcode: SHRLV_QB
5766
/* 14860 */   MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 14875
5767
/* 14865 */   MCD_OPC_CheckPredicate, 69, 180, 8, 0, // Skip to: 17098
5768
/* 14870 */   MCD_OPC_Decode, 186, 21, 205, 2, // Opcode: SHRA_QB
5769
/* 14875 */   MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 14890
5770
/* 14880 */   MCD_OPC_CheckPredicate, 69, 165, 8, 0, // Skip to: 17098
5771
/* 14885 */   MCD_OPC_Decode, 190, 21, 205, 2, // Opcode: SHRA_R_QB
5772
/* 14890 */   MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 14905
5773
/* 14895 */   MCD_OPC_CheckPredicate, 69, 150, 8, 0, // Skip to: 17098
5774
/* 14900 */   MCD_OPC_Decode, 176, 21, 206, 2, // Opcode: SHRAV_QB
5775
/* 14905 */   MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 14920
5776
/* 14910 */   MCD_OPC_CheckPredicate, 69, 135, 8, 0, // Skip to: 17098
5777
/* 14915 */   MCD_OPC_Decode, 180, 21, 206, 2, // Opcode: SHRAV_R_QB
5778
/* 14920 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 14935
5779
/* 14925 */   MCD_OPC_CheckPredicate, 37, 120, 8, 0, // Skip to: 17098
5780
/* 14930 */   MCD_OPC_Decode, 166, 21, 205, 2, // Opcode: SHLL_PH
5781
/* 14935 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 14950
5782
/* 14940 */   MCD_OPC_CheckPredicate, 37, 105, 8, 0, // Skip to: 17098
5783
/* 14945 */   MCD_OPC_Decode, 184, 21, 205, 2, // Opcode: SHRA_PH
5784
/* 14950 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 14965
5785
/* 14955 */   MCD_OPC_CheckPredicate, 37, 90, 8, 0, // Skip to: 17098
5786
/* 14960 */   MCD_OPC_Decode, 158, 21, 206, 2, // Opcode: SHLLV_PH
5787
/* 14965 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 14980
5788
/* 14970 */   MCD_OPC_CheckPredicate, 37, 75, 8, 0, // Skip to: 17098
5789
/* 14975 */   MCD_OPC_Decode, 174, 21, 206, 2, // Opcode: SHRAV_PH
5790
/* 14980 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 14995
5791
/* 14985 */   MCD_OPC_CheckPredicate, 37, 60, 8, 0, // Skip to: 17098
5792
/* 14990 */   MCD_OPC_Decode, 170, 21, 205, 2, // Opcode: SHLL_S_PH
5793
/* 14995 */   MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 15010
5794
/* 15000 */   MCD_OPC_CheckPredicate, 37, 45, 8, 0, // Skip to: 17098
5795
/* 15005 */   MCD_OPC_Decode, 188, 21, 205, 2, // Opcode: SHRA_R_PH
5796
/* 15010 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 15025
5797
/* 15015 */   MCD_OPC_CheckPredicate, 37, 30, 8, 0, // Skip to: 17098
5798
/* 15020 */   MCD_OPC_Decode, 162, 21, 206, 2, // Opcode: SHLLV_S_PH
5799
/* 15025 */   MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 15040
5800
/* 15030 */   MCD_OPC_CheckPredicate, 37, 15, 8, 0, // Skip to: 17098
5801
/* 15035 */   MCD_OPC_Decode, 178, 21, 206, 2, // Opcode: SHRAV_R_PH
5802
/* 15040 */   MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 15055
5803
/* 15045 */   MCD_OPC_CheckPredicate, 37, 0, 8, 0, // Skip to: 17098
5804
/* 15050 */   MCD_OPC_Decode, 172, 21, 207, 2, // Opcode: SHLL_S_W
5805
/* 15055 */   MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 15070
5806
/* 15060 */   MCD_OPC_CheckPredicate, 37, 241, 7, 0, // Skip to: 17098
5807
/* 15065 */   MCD_OPC_Decode, 192, 21, 207, 2, // Opcode: SHRA_R_W
5808
/* 15070 */   MCD_OPC_FilterValue, 22, 9, 0, 0, // Skip to: 15084
5809
/* 15075 */   MCD_OPC_CheckPredicate, 37, 226, 7, 0, // Skip to: 17098
5810
/* 15080 */   MCD_OPC_Decode, 164, 21, 55, // Opcode: SHLLV_S_W
5811
/* 15084 */   MCD_OPC_FilterValue, 23, 9, 0, 0, // Skip to: 15098
5812
/* 15089 */   MCD_OPC_CheckPredicate, 37, 212, 7, 0, // Skip to: 17098
5813
/* 15094 */   MCD_OPC_Decode, 182, 21, 55, // Opcode: SHRAV_R_W
5814
/* 15098 */   MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 15113
5815
/* 15103 */   MCD_OPC_CheckPredicate, 69, 198, 7, 0, // Skip to: 17098
5816
/* 15108 */   MCD_OPC_Decode, 198, 21, 205, 2, // Opcode: SHRL_PH
5817
/* 15113 */   MCD_OPC_FilterValue, 27, 188, 7, 0, // Skip to: 17098
5818
/* 15118 */   MCD_OPC_CheckPredicate, 69, 183, 7, 0, // Skip to: 17098
5819
/* 15123 */   MCD_OPC_Decode, 194, 21, 206, 2, // Opcode: SHRLV_PH
5820
/* 15128 */   MCD_OPC_FilterValue, 24, 237, 0, 0, // Skip to: 15370
5821
/* 15133 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5822
/* 15136 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 15151
5823
/* 15141 */   MCD_OPC_CheckPredicate, 69, 160, 7, 0, // Skip to: 17098
5824
/* 15146 */   MCD_OPC_Decode, 172, 6, 195, 2, // Opcode: ADDUH_QB
5825
/* 15151 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 15166
5826
/* 15156 */   MCD_OPC_CheckPredicate, 69, 145, 7, 0, // Skip to: 17098
5827
/* 15161 */   MCD_OPC_Decode, 225, 22, 195, 2, // Opcode: SUBUH_QB
5828
/* 15166 */   MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 15181
5829
/* 15171 */   MCD_OPC_CheckPredicate, 69, 130, 7, 0, // Skip to: 17098
5830
/* 15176 */   MCD_OPC_Decode, 174, 6, 195, 2, // Opcode: ADDUH_R_QB
5831
/* 15181 */   MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 15196
5832
/* 15186 */   MCD_OPC_CheckPredicate, 69, 115, 7, 0, // Skip to: 17098
5833
/* 15191 */   MCD_OPC_Decode, 227, 22, 195, 2, // Opcode: SUBUH_R_QB
5834
/* 15196 */   MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 15211
5835
/* 15201 */   MCD_OPC_CheckPredicate, 69, 100, 7, 0, // Skip to: 17098
5836
/* 15206 */   MCD_OPC_Decode, 141, 6, 195, 2, // Opcode: ADDQH_PH
5837
/* 15211 */   MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 15226
5838
/* 15216 */   MCD_OPC_CheckPredicate, 69, 85, 7, 0, // Skip to: 17098
5839
/* 15221 */   MCD_OPC_Decode, 193, 22, 195, 2, // Opcode: SUBQH_PH
5840
/* 15226 */   MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 15241
5841
/* 15231 */   MCD_OPC_CheckPredicate, 69, 70, 7, 0, // Skip to: 17098
5842
/* 15236 */   MCD_OPC_Decode, 143, 6, 195, 2, // Opcode: ADDQH_R_PH
5843
/* 15241 */   MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 15256
5844
/* 15246 */   MCD_OPC_CheckPredicate, 69, 55, 7, 0, // Skip to: 17098
5845
/* 15251 */   MCD_OPC_Decode, 195, 22, 195, 2, // Opcode: SUBQH_R_PH
5846
/* 15256 */   MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 15271
5847
/* 15261 */   MCD_OPC_CheckPredicate, 69, 40, 7, 0, // Skip to: 17098
5848
/* 15266 */   MCD_OPC_Decode, 248, 18, 195, 2, // Opcode: MUL_PH
5849
/* 15271 */   MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 15286
5850
/* 15276 */   MCD_OPC_CheckPredicate, 69, 25, 7, 0, // Skip to: 17098
5851
/* 15281 */   MCD_OPC_Decode, 253, 18, 195, 2, // Opcode: MUL_S_PH
5852
/* 15286 */   MCD_OPC_FilterValue, 16, 9, 0, 0, // Skip to: 15300
5853
/* 15291 */   MCD_OPC_CheckPredicate, 69, 10, 7, 0, // Skip to: 17098
5854
/* 15296 */   MCD_OPC_Decode, 147, 6, 61, // Opcode: ADDQH_W
5855
/* 15300 */   MCD_OPC_FilterValue, 17, 9, 0, 0, // Skip to: 15314
5856
/* 15305 */   MCD_OPC_CheckPredicate, 69, 252, 6, 0, // Skip to: 17098
5857
/* 15310 */   MCD_OPC_Decode, 199, 22, 61, // Opcode: SUBQH_W
5858
/* 15314 */   MCD_OPC_FilterValue, 18, 9, 0, 0, // Skip to: 15328
5859
/* 15319 */   MCD_OPC_CheckPredicate, 69, 238, 6, 0, // Skip to: 17098
5860
/* 15324 */   MCD_OPC_Decode, 145, 6, 61, // Opcode: ADDQH_R_W
5861
/* 15328 */   MCD_OPC_FilterValue, 19, 9, 0, 0, // Skip to: 15342
5862
/* 15333 */   MCD_OPC_CheckPredicate, 69, 224, 6, 0, // Skip to: 17098
5863
/* 15338 */   MCD_OPC_Decode, 197, 22, 61, // Opcode: SUBQH_R_W
5864
/* 15342 */   MCD_OPC_FilterValue, 22, 9, 0, 0, // Skip to: 15356
5865
/* 15347 */   MCD_OPC_CheckPredicate, 69, 210, 6, 0, // Skip to: 17098
5866
/* 15352 */   MCD_OPC_Decode, 221, 18, 61, // Opcode: MULQ_S_W
5867
/* 15356 */   MCD_OPC_FilterValue, 23, 201, 6, 0, // Skip to: 17098
5868
/* 15361 */   MCD_OPC_CheckPredicate, 69, 196, 6, 0, // Skip to: 17098
5869
/* 15366 */   MCD_OPC_Decode, 217, 18, 61, // Opcode: MULQ_RS_W
5870
/* 15370 */   MCD_OPC_FilterValue, 25, 17, 0, 0, // Skip to: 15392
5871
/* 15375 */   MCD_OPC_CheckPredicate, 70, 182, 6, 0, // Skip to: 17098
5872
/* 15380 */   MCD_OPC_CheckField, 6, 1, 0, 175, 6, 0, // Skip to: 17098
5873
/* 15387 */   MCD_OPC_Decode, 151, 16, 208, 2, // Opcode: LWLE
5874
/* 15392 */   MCD_OPC_FilterValue, 26, 17, 0, 0, // Skip to: 15414
5875
/* 15397 */   MCD_OPC_CheckPredicate, 70, 160, 6, 0, // Skip to: 17098
5876
/* 15402 */   MCD_OPC_CheckField, 6, 1, 0, 153, 6, 0, // Skip to: 17098
5877
/* 15409 */   MCD_OPC_Decode, 164, 16, 208, 2, // Opcode: LWRE
5878
/* 15414 */   MCD_OPC_FilterValue, 27, 17, 0, 0, // Skip to: 15436
5879
/* 15419 */   MCD_OPC_CheckPredicate, 44, 138, 6, 0, // Skip to: 17098
5880
/* 15424 */   MCD_OPC_CheckField, 6, 1, 0, 131, 6, 0, // Skip to: 17098
5881
/* 15431 */   MCD_OPC_Decode, 247, 8, 209, 2, // Opcode: CACHEE
5882
/* 15436 */   MCD_OPC_FilterValue, 28, 17, 0, 0, // Skip to: 15458
5883
/* 15441 */   MCD_OPC_CheckPredicate, 44, 116, 6, 0, // Skip to: 17098
5884
/* 15446 */   MCD_OPC_CheckField, 6, 1, 0, 109, 6, 0, // Skip to: 17098
5885
/* 15453 */   MCD_OPC_Decode, 198, 20, 208, 2, // Opcode: SBE
5886
/* 15458 */   MCD_OPC_FilterValue, 29, 17, 0, 0, // Skip to: 15480
5887
/* 15463 */   MCD_OPC_CheckPredicate, 44, 94, 6, 0, // Skip to: 17098
5888
/* 15468 */   MCD_OPC_CheckField, 6, 1, 0, 87, 6, 0, // Skip to: 17098
5889
/* 15475 */   MCD_OPC_Decode, 148, 21, 208, 2, // Opcode: SHE
5890
/* 15480 */   MCD_OPC_FilterValue, 30, 17, 0, 0, // Skip to: 15502
5891
/* 15485 */   MCD_OPC_CheckPredicate, 44, 72, 6, 0, // Skip to: 17098
5892
/* 15490 */   MCD_OPC_CheckField, 6, 1, 0, 65, 6, 0, // Skip to: 17098
5893
/* 15497 */   MCD_OPC_Decode, 211, 20, 208, 2, // Opcode: SCE
5894
/* 15502 */   MCD_OPC_FilterValue, 31, 17, 0, 0, // Skip to: 15524
5895
/* 15507 */   MCD_OPC_CheckPredicate, 44, 50, 6, 0, // Skip to: 17098
5896
/* 15512 */   MCD_OPC_CheckField, 6, 1, 0, 43, 6, 0, // Skip to: 17098
5897
/* 15519 */   MCD_OPC_Decode, 142, 23, 208, 2, // Opcode: SWE
5898
/* 15524 */   MCD_OPC_FilterValue, 32, 69, 0, 0, // Skip to: 15598
5899
/* 15529 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5900
/* 15532 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 15554
5901
/* 15537 */   MCD_OPC_CheckPredicate, 28, 20, 6, 0, // Skip to: 17098
5902
/* 15542 */   MCD_OPC_CheckField, 21, 5, 0, 13, 6, 0, // Skip to: 17098
5903
/* 15549 */   MCD_OPC_Decode, 169, 24, 204, 2, // Opcode: WSBH
5904
/* 15554 */   MCD_OPC_FilterValue, 16, 17, 0, 0, // Skip to: 15576
5905
/* 15559 */   MCD_OPC_CheckPredicate, 28, 254, 5, 0, // Skip to: 17098
5906
/* 15564 */   MCD_OPC_CheckField, 21, 5, 0, 247, 5, 0, // Skip to: 17098
5907
/* 15571 */   MCD_OPC_Decode, 242, 20, 204, 2, // Opcode: SEB
5908
/* 15576 */   MCD_OPC_FilterValue, 24, 237, 5, 0, // Skip to: 17098
5909
/* 15581 */   MCD_OPC_CheckPredicate, 28, 232, 5, 0, // Skip to: 17098
5910
/* 15586 */   MCD_OPC_CheckField, 21, 5, 0, 225, 5, 0, // Skip to: 17098
5911
/* 15593 */   MCD_OPC_Decode, 246, 20, 204, 2, // Opcode: SEH
5912
/* 15598 */   MCD_OPC_FilterValue, 33, 17, 0, 0, // Skip to: 15620
5913
/* 15603 */   MCD_OPC_CheckPredicate, 70, 210, 5, 0, // Skip to: 17098
5914
/* 15608 */   MCD_OPC_CheckField, 6, 1, 0, 203, 5, 0, // Skip to: 17098
5915
/* 15615 */   MCD_OPC_Decode, 148, 23, 208, 2, // Opcode: SWLE
5916
/* 15620 */   MCD_OPC_FilterValue, 34, 17, 0, 0, // Skip to: 15642
5917
/* 15625 */   MCD_OPC_CheckPredicate, 70, 188, 5, 0, // Skip to: 17098
5918
/* 15630 */   MCD_OPC_CheckField, 6, 1, 0, 181, 5, 0, // Skip to: 17098
5919
/* 15637 */   MCD_OPC_Decode, 159, 23, 208, 2, // Opcode: SWRE
5920
/* 15642 */   MCD_OPC_FilterValue, 35, 17, 0, 0, // Skip to: 15664
5921
/* 15647 */   MCD_OPC_CheckPredicate, 44, 166, 5, 0, // Skip to: 17098
5922
/* 15652 */   MCD_OPC_CheckField, 6, 1, 0, 159, 5, 0, // Skip to: 17098
5923
/* 15659 */   MCD_OPC_Decode, 239, 19, 209, 2, // Opcode: PREFE
5924
/* 15664 */   MCD_OPC_FilterValue, 40, 17, 0, 0, // Skip to: 15686
5925
/* 15669 */   MCD_OPC_CheckPredicate, 44, 144, 5, 0, // Skip to: 17098
5926
/* 15674 */   MCD_OPC_CheckField, 6, 1, 0, 137, 5, 0, // Skip to: 17098
5927
/* 15681 */   MCD_OPC_Decode, 176, 15, 208, 2, // Opcode: LBuE
5928
/* 15686 */   MCD_OPC_FilterValue, 41, 17, 0, 0, // Skip to: 15708
5929
/* 15691 */   MCD_OPC_CheckPredicate, 44, 122, 5, 0, // Skip to: 17098
5930
/* 15696 */   MCD_OPC_CheckField, 6, 1, 0, 115, 5, 0, // Skip to: 17098
5931
/* 15703 */   MCD_OPC_Decode, 228, 15, 208, 2, // Opcode: LHuE
5932
/* 15708 */   MCD_OPC_FilterValue, 44, 17, 0, 0, // Skip to: 15730
5933
/* 15713 */   MCD_OPC_CheckPredicate, 44, 100, 5, 0, // Skip to: 17098
5934
/* 15718 */   MCD_OPC_CheckField, 6, 1, 0, 93, 5, 0, // Skip to: 17098
5935
/* 15725 */   MCD_OPC_Decode, 157, 15, 208, 2, // Opcode: LBE
5936
/* 15730 */   MCD_OPC_FilterValue, 45, 17, 0, 0, // Skip to: 15752
5937
/* 15735 */   MCD_OPC_CheckPredicate, 44, 78, 5, 0, // Skip to: 17098
5938
/* 15740 */   MCD_OPC_CheckField, 6, 1, 0, 71, 5, 0, // Skip to: 17098
5939
/* 15747 */   MCD_OPC_Decode, 209, 15, 208, 2, // Opcode: LHE
5940
/* 15752 */   MCD_OPC_FilterValue, 46, 17, 0, 0, // Skip to: 15774
5941
/* 15757 */   MCD_OPC_CheckPredicate, 44, 56, 5, 0, // Skip to: 17098
5942
/* 15762 */   MCD_OPC_CheckField, 6, 1, 0, 49, 5, 0, // Skip to: 17098
5943
/* 15769 */   MCD_OPC_Decode, 240, 15, 208, 2, // Opcode: LLE
5944
/* 15774 */   MCD_OPC_FilterValue, 47, 17, 0, 0, // Skip to: 15796
5945
/* 15779 */   MCD_OPC_CheckPredicate, 44, 34, 5, 0, // Skip to: 17098
5946
/* 15784 */   MCD_OPC_CheckField, 6, 1, 0, 27, 5, 0, // Skip to: 17098
5947
/* 15791 */   MCD_OPC_Decode, 144, 16, 208, 2, // Opcode: LWE
5948
/* 15796 */   MCD_OPC_FilterValue, 48, 231, 1, 0, // Skip to: 16288
5949
/* 15801 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
5950
/* 15804 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 15826
5951
/* 15809 */   MCD_OPC_CheckPredicate, 69, 4, 5, 0, // Skip to: 17098
5952
/* 15814 */   MCD_OPC_CheckField, 13, 3, 0, 253, 4, 0, // Skip to: 17098
5953
/* 15821 */   MCD_OPC_Decode, 156, 12, 243, 1, // Opcode: DPA_W_PH
5954
/* 15826 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 15848
5955
/* 15831 */   MCD_OPC_CheckPredicate, 69, 238, 4, 0, // Skip to: 17098
5956
/* 15836 */   MCD_OPC_CheckField, 13, 3, 0, 231, 4, 0, // Skip to: 17098
5957
/* 15843 */   MCD_OPC_Decode, 179, 12, 243, 1, // Opcode: DPS_W_PH
5958
/* 15848 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 15870
5959
/* 15853 */   MCD_OPC_CheckPredicate, 69, 216, 4, 0, // Skip to: 17098
5960
/* 15858 */   MCD_OPC_CheckField, 13, 3, 0, 209, 4, 0, // Skip to: 17098
5961
/* 15865 */   MCD_OPC_Decode, 228, 18, 243, 1, // Opcode: MULSA_W_PH
5962
/* 15870 */   MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 15892
5963
/* 15875 */   MCD_OPC_CheckPredicate, 37, 194, 4, 0, // Skip to: 17098
5964
/* 15880 */   MCD_OPC_CheckField, 13, 3, 0, 187, 4, 0, // Skip to: 17098
5965
/* 15887 */   MCD_OPC_Decode, 150, 12, 243, 1, // Opcode: DPAU_H_QBL
5966
/* 15892 */   MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 15914
5967
/* 15897 */   MCD_OPC_CheckPredicate, 37, 172, 4, 0, // Skip to: 17098
5968
/* 15902 */   MCD_OPC_CheckField, 13, 3, 0, 165, 4, 0, // Skip to: 17098
5969
/* 15909 */   MCD_OPC_Decode, 148, 12, 243, 1, // Opcode: DPAQ_S_W_PH
5970
/* 15914 */   MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 15936
5971
/* 15919 */   MCD_OPC_CheckPredicate, 37, 150, 4, 0, // Skip to: 17098
5972
/* 15924 */   MCD_OPC_CheckField, 13, 3, 0, 143, 4, 0, // Skip to: 17098
5973
/* 15931 */   MCD_OPC_Decode, 165, 12, 243, 1, // Opcode: DPSQ_S_W_PH
5974
/* 15936 */   MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 15958
5975
/* 15941 */   MCD_OPC_CheckPredicate, 37, 128, 4, 0, // Skip to: 17098
5976
/* 15946 */   MCD_OPC_CheckField, 13, 3, 0, 121, 4, 0, // Skip to: 17098
5977
/* 15953 */   MCD_OPC_Decode, 226, 18, 243, 1, // Opcode: MULSAQ_S_W_PH
5978
/* 15958 */   MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 15980
5979
/* 15963 */   MCD_OPC_CheckPredicate, 37, 106, 4, 0, // Skip to: 17098
5980
/* 15968 */   MCD_OPC_CheckField, 13, 3, 0, 99, 4, 0, // Skip to: 17098
5981
/* 15975 */   MCD_OPC_Decode, 152, 12, 243, 1, // Opcode: DPAU_H_QBR
5982
/* 15980 */   MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 16002
5983
/* 15985 */   MCD_OPC_CheckPredicate, 69, 84, 4, 0, // Skip to: 17098
5984
/* 15990 */   MCD_OPC_CheckField, 13, 3, 0, 77, 4, 0, // Skip to: 17098
5985
/* 15997 */   MCD_OPC_Decode, 154, 12, 243, 1, // Opcode: DPAX_W_PH
5986
/* 16002 */   MCD_OPC_FilterValue, 9, 17, 0, 0, // Skip to: 16024
5987
/* 16007 */   MCD_OPC_CheckPredicate, 69, 62, 4, 0, // Skip to: 17098
5988
/* 16012 */   MCD_OPC_CheckField, 13, 3, 0, 55, 4, 0, // Skip to: 17098
5989
/* 16019 */   MCD_OPC_Decode, 177, 12, 243, 1, // Opcode: DPSX_W_PH
5990
/* 16024 */   MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 16046
5991
/* 16029 */   MCD_OPC_CheckPredicate, 37, 40, 4, 0, // Skip to: 17098
5992
/* 16034 */   MCD_OPC_CheckField, 13, 3, 0, 33, 4, 0, // Skip to: 17098
5993
/* 16041 */   MCD_OPC_Decode, 173, 12, 243, 1, // Opcode: DPSU_H_QBL
5994
/* 16046 */   MCD_OPC_FilterValue, 12, 17, 0, 0, // Skip to: 16068
5995
/* 16051 */   MCD_OPC_CheckPredicate, 37, 18, 4, 0, // Skip to: 17098
5996
/* 16056 */   MCD_OPC_CheckField, 13, 3, 0, 11, 4, 0, // Skip to: 17098
5997
/* 16063 */   MCD_OPC_Decode, 146, 12, 243, 1, // Opcode: DPAQ_SA_L_W
5998
/* 16068 */   MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 16090
5999
/* 16073 */   MCD_OPC_CheckPredicate, 37, 252, 3, 0, // Skip to: 17098
6000
/* 16078 */   MCD_OPC_CheckField, 13, 3, 0, 245, 3, 0, // Skip to: 17098
6001
/* 16085 */   MCD_OPC_Decode, 163, 12, 243, 1, // Opcode: DPSQ_SA_L_W
6002
/* 16090 */   MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 16112
6003
/* 16095 */   MCD_OPC_CheckPredicate, 37, 230, 3, 0, // Skip to: 17098
6004
/* 16100 */   MCD_OPC_CheckField, 13, 3, 0, 223, 3, 0, // Skip to: 17098
6005
/* 16107 */   MCD_OPC_Decode, 175, 12, 243, 1, // Opcode: DPSU_H_QBR
6006
/* 16112 */   MCD_OPC_FilterValue, 16, 17, 0, 0, // Skip to: 16134
6007
/* 16117 */   MCD_OPC_CheckPredicate, 37, 208, 3, 0, // Skip to: 17098
6008
/* 16122 */   MCD_OPC_CheckField, 13, 3, 0, 201, 3, 0, // Skip to: 17098
6009
/* 16129 */   MCD_OPC_Decode, 220, 16, 243, 1, // Opcode: MAQ_SA_W_PHL
6010
/* 16134 */   MCD_OPC_FilterValue, 18, 17, 0, 0, // Skip to: 16156
6011
/* 16139 */   MCD_OPC_CheckPredicate, 37, 186, 3, 0, // Skip to: 17098
6012
/* 16144 */   MCD_OPC_CheckField, 13, 3, 0, 179, 3, 0, // Skip to: 17098
6013
/* 16151 */   MCD_OPC_Decode, 222, 16, 243, 1, // Opcode: MAQ_SA_W_PHR
6014
/* 16156 */   MCD_OPC_FilterValue, 20, 17, 0, 0, // Skip to: 16178
6015
/* 16161 */   MCD_OPC_CheckPredicate, 37, 164, 3, 0, // Skip to: 17098
6016
/* 16166 */   MCD_OPC_CheckField, 13, 3, 0, 157, 3, 0, // Skip to: 17098
6017
/* 16173 */   MCD_OPC_Decode, 224, 16, 243, 1, // Opcode: MAQ_S_W_PHL
6018
/* 16178 */   MCD_OPC_FilterValue, 22, 17, 0, 0, // Skip to: 16200
6019
/* 16183 */   MCD_OPC_CheckPredicate, 37, 142, 3, 0, // Skip to: 17098
6020
/* 16188 */   MCD_OPC_CheckField, 13, 3, 0, 135, 3, 0, // Skip to: 17098
6021
/* 16195 */   MCD_OPC_Decode, 226, 16, 243, 1, // Opcode: MAQ_S_W_PHR
6022
/* 16200 */   MCD_OPC_FilterValue, 24, 17, 0, 0, // Skip to: 16222
6023
/* 16205 */   MCD_OPC_CheckPredicate, 69, 120, 3, 0, // Skip to: 17098
6024
/* 16210 */   MCD_OPC_CheckField, 13, 3, 0, 113, 3, 0, // Skip to: 17098
6025
/* 16217 */   MCD_OPC_Decode, 144, 12, 243, 1, // Opcode: DPAQX_S_W_PH
6026
/* 16222 */   MCD_OPC_FilterValue, 25, 17, 0, 0, // Skip to: 16244
6027
/* 16227 */   MCD_OPC_CheckPredicate, 69, 98, 3, 0, // Skip to: 17098
6028
/* 16232 */   MCD_OPC_CheckField, 13, 3, 0, 91, 3, 0, // Skip to: 17098
6029
/* 16239 */   MCD_OPC_Decode, 161, 12, 243, 1, // Opcode: DPSQX_S_W_PH
6030
/* 16244 */   MCD_OPC_FilterValue, 26, 17, 0, 0, // Skip to: 16266
6031
/* 16249 */   MCD_OPC_CheckPredicate, 69, 76, 3, 0, // Skip to: 17098
6032
/* 16254 */   MCD_OPC_CheckField, 13, 3, 0, 69, 3, 0, // Skip to: 17098
6033
/* 16261 */   MCD_OPC_Decode, 142, 12, 243, 1, // Opcode: DPAQX_SA_W_PH
6034
/* 16266 */   MCD_OPC_FilterValue, 27, 59, 3, 0, // Skip to: 17098
6035
/* 16271 */   MCD_OPC_CheckPredicate, 69, 54, 3, 0, // Skip to: 17098
6036
/* 16276 */   MCD_OPC_CheckField, 13, 3, 0, 47, 3, 0, // Skip to: 17098
6037
/* 16283 */   MCD_OPC_Decode, 159, 12, 243, 1, // Opcode: DPSQX_SA_W_PH
6038
/* 16288 */   MCD_OPC_FilterValue, 49, 48, 0, 0, // Skip to: 16341
6039
/* 16293 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6040
/* 16296 */   MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 16311
6041
/* 16301 */   MCD_OPC_CheckPredicate, 69, 24, 3, 0, // Skip to: 17098
6042
/* 16306 */   MCD_OPC_Decode, 234, 6, 210, 2, // Opcode: APPEND
6043
/* 16311 */   MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 16326
6044
/* 16316 */   MCD_OPC_CheckPredicate, 69, 9, 3, 0, // Skip to: 17098
6045
/* 16321 */   MCD_OPC_Decode, 247, 19, 210, 2, // Opcode: PREPEND
6046
/* 16326 */   MCD_OPC_FilterValue, 16, 255, 2, 0, // Skip to: 17098
6047
/* 16331 */   MCD_OPC_CheckPredicate, 69, 250, 2, 0, // Skip to: 17098
6048
/* 16336 */   MCD_OPC_Decode, 152, 7, 210, 2, // Opcode: BALIGN
6049
/* 16341 */   MCD_OPC_FilterValue, 56, 107, 1, 0, // Skip to: 16709
6050
/* 16346 */   MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6051
/* 16349 */   MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 16371
6052
/* 16354 */   MCD_OPC_CheckPredicate, 37, 227, 2, 0, // Skip to: 17098
6053
/* 16359 */   MCD_OPC_CheckField, 13, 3, 0, 220, 2, 0, // Skip to: 17098
6054
/* 16366 */   MCD_OPC_Decode, 250, 12, 211, 2, // Opcode: EXTR_W
6055
/* 16371 */   MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 16393
6056
/* 16376 */   MCD_OPC_CheckPredicate, 37, 205, 2, 0, // Skip to: 17098
6057
/* 16381 */   MCD_OPC_CheckField, 13, 3, 0, 198, 2, 0, // Skip to: 17098
6058
/* 16388 */   MCD_OPC_Decode, 242, 12, 212, 2, // Opcode: EXTRV_W
6059
/* 16393 */   MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 16415
6060
/* 16398 */   MCD_OPC_CheckPredicate, 37, 183, 2, 0, // Skip to: 17098
6061
/* 16403 */   MCD_OPC_CheckField, 13, 3, 0, 176, 2, 0, // Skip to: 17098
6062
/* 16410 */   MCD_OPC_Decode, 228, 12, 211, 2, // Opcode: EXTP
6063
/* 16415 */   MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 16437
6064
/* 16420 */   MCD_OPC_CheckPredicate, 37, 161, 2, 0, // Skip to: 17098
6065
/* 16425 */   MCD_OPC_CheckField, 13, 3, 0, 154, 2, 0, // Skip to: 17098
6066
/* 16432 */   MCD_OPC_Decode, 233, 12, 212, 2, // Opcode: EXTPV
6067
/* 16437 */   MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 16459
6068
/* 16442 */   MCD_OPC_CheckPredicate, 37, 139, 2, 0, // Skip to: 17098
6069
/* 16447 */   MCD_OPC_CheckField, 13, 3, 0, 132, 2, 0, // Skip to: 17098
6070
/* 16454 */   MCD_OPC_Decode, 246, 12, 211, 2, // Opcode: EXTR_R_W
6071
/* 16459 */   MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 16481
6072
/* 16464 */   MCD_OPC_CheckPredicate, 37, 117, 2, 0, // Skip to: 17098
6073
/* 16469 */   MCD_OPC_CheckField, 13, 3, 0, 110, 2, 0, // Skip to: 17098
6074
/* 16476 */   MCD_OPC_Decode, 238, 12, 212, 2, // Opcode: EXTRV_R_W
6075
/* 16481 */   MCD_OPC_FilterValue, 6, 17, 0, 0, // Skip to: 16503
6076
/* 16486 */   MCD_OPC_CheckPredicate, 37, 95, 2, 0, // Skip to: 17098
6077
/* 16491 */   MCD_OPC_CheckField, 13, 3, 0, 88, 2, 0, // Skip to: 17098
6078
/* 16498 */   MCD_OPC_Decode, 244, 12, 211, 2, // Opcode: EXTR_RS_W
6079
/* 16503 */   MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 16525
6080
/* 16508 */   MCD_OPC_CheckPredicate, 37, 73, 2, 0, // Skip to: 17098
6081
/* 16513 */   MCD_OPC_CheckField, 13, 3, 0, 66, 2, 0, // Skip to: 17098
6082
/* 16520 */   MCD_OPC_Decode, 236, 12, 212, 2, // Opcode: EXTRV_RS_W
6083
/* 16525 */   MCD_OPC_FilterValue, 10, 17, 0, 0, // Skip to: 16547
6084
/* 16530 */   MCD_OPC_CheckPredicate, 37, 51, 2, 0, // Skip to: 17098
6085
/* 16535 */   MCD_OPC_CheckField, 13, 3, 0, 44, 2, 0, // Skip to: 17098
6086
/* 16542 */   MCD_OPC_Decode, 229, 12, 211, 2, // Opcode: EXTPDP
6087
/* 16547 */   MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 16569
6088
/* 16552 */   MCD_OPC_CheckPredicate, 37, 29, 2, 0, // Skip to: 17098
6089
/* 16557 */   MCD_OPC_CheckField, 13, 3, 0, 22, 2, 0, // Skip to: 17098
6090
/* 16564 */   MCD_OPC_Decode, 230, 12, 212, 2, // Opcode: EXTPDPV
6091
/* 16569 */   MCD_OPC_FilterValue, 14, 17, 0, 0, // Skip to: 16591
6092
/* 16574 */   MCD_OPC_CheckPredicate, 37, 7, 2, 0, // Skip to: 17098
6093
/* 16579 */   MCD_OPC_CheckField, 13, 3, 0, 0, 2, 0, // Skip to: 17098
6094
/* 16586 */   MCD_OPC_Decode, 248, 12, 211, 2, // Opcode: EXTR_S_H
6095
/* 16591 */   MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 16613
6096
/* 16596 */   MCD_OPC_CheckPredicate, 37, 241, 1, 0, // Skip to: 17098
6097
/* 16601 */   MCD_OPC_CheckField, 13, 3, 0, 234, 1, 0, // Skip to: 17098
6098
/* 16608 */   MCD_OPC_Decode, 240, 12, 212, 2, // Opcode: EXTRV_S_H
6099
/* 16613 */   MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 16628
6100
/* 16618 */   MCD_OPC_CheckPredicate, 37, 219, 1, 0, // Skip to: 17098
6101
/* 16623 */   MCD_OPC_Decode, 253, 19, 213, 2, // Opcode: RDDSP
6102
/* 16628 */   MCD_OPC_FilterValue, 19, 10, 0, 0, // Skip to: 16643
6103
/* 16633 */   MCD_OPC_CheckPredicate, 40, 204, 1, 0, // Skip to: 17098
6104
/* 16638 */   MCD_OPC_Decode, 165, 24, 214, 2, // Opcode: WRDSP
6105
/* 16643 */   MCD_OPC_FilterValue, 26, 17, 0, 0, // Skip to: 16665
6106
/* 16648 */   MCD_OPC_CheckPredicate, 37, 189, 1, 0, // Skip to: 17098
6107
/* 16653 */   MCD_OPC_CheckField, 13, 7, 0, 182, 1, 0, // Skip to: 17098
6108
/* 16660 */   MCD_OPC_Decode, 154, 21, 215, 2, // Opcode: SHILO
6109
/* 16665 */   MCD_OPC_FilterValue, 27, 17, 0, 0, // Skip to: 16687
6110
/* 16670 */   MCD_OPC_CheckPredicate, 37, 167, 1, 0, // Skip to: 17098
6111
/* 16675 */   MCD_OPC_CheckField, 13, 8, 0, 160, 1, 0, // Skip to: 17098
6112
/* 16682 */   MCD_OPC_Decode, 155, 21, 216, 2, // Opcode: SHILOV
6113
/* 16687 */   MCD_OPC_FilterValue, 31, 150, 1, 0, // Skip to: 17098
6114
/* 16692 */   MCD_OPC_CheckPredicate, 37, 145, 1, 0, // Skip to: 17098
6115
/* 16697 */   MCD_OPC_CheckField, 13, 8, 0, 138, 1, 0, // Skip to: 17098
6116
/* 16704 */   MCD_OPC_Decode, 184, 18, 216, 2, // Opcode: MTHLIP
6117
/* 16709 */   MCD_OPC_FilterValue, 59, 128, 1, 0, // Skip to: 17098
6118
/* 16714 */   MCD_OPC_CheckPredicate, 27, 123, 1, 0, // Skip to: 17098
6119
/* 16719 */   MCD_OPC_CheckField, 21, 5, 0, 116, 1, 0, // Skip to: 17098
6120
/* 16726 */   MCD_OPC_CheckField, 9, 2, 0, 109, 1, 0, // Skip to: 17098
6121
/* 16733 */   MCD_OPC_Decode, 255, 19, 217, 2, // Opcode: RDHWR
6122
/* 16738 */   MCD_OPC_FilterValue, 32, 10, 0, 0, // Skip to: 16753
6123
/* 16743 */   MCD_OPC_CheckPredicate, 27, 94, 1, 0, // Skip to: 17098
6124
/* 16748 */   MCD_OPC_Decode, 154, 15, 141, 1, // Opcode: LB
6125
/* 16753 */   MCD_OPC_FilterValue, 33, 10, 0, 0, // Skip to: 16768
6126
/* 16758 */   MCD_OPC_CheckPredicate, 27, 79, 1, 0, // Skip to: 17098
6127
/* 16763 */   MCD_OPC_Decode, 206, 15, 141, 1, // Opcode: LH
6128
/* 16768 */   MCD_OPC_FilterValue, 34, 10, 0, 0, // Skip to: 16783
6129
/* 16773 */   MCD_OPC_CheckPredicate, 31, 64, 1, 0, // Skip to: 17098
6130
/* 16778 */   MCD_OPC_Decode, 149, 16, 141, 1, // Opcode: LWL
6131
/* 16783 */   MCD_OPC_FilterValue, 35, 10, 0, 0, // Skip to: 16798
6132
/* 16788 */   MCD_OPC_CheckPredicate, 27, 49, 1, 0, // Skip to: 17098
6133
/* 16793 */   MCD_OPC_Decode, 131, 16, 141, 1, // Opcode: LW
6134
/* 16798 */   MCD_OPC_FilterValue, 36, 10, 0, 0, // Skip to: 16813
6135
/* 16803 */   MCD_OPC_CheckPredicate, 27, 34, 1, 0, // Skip to: 17098
6136
/* 16808 */   MCD_OPC_Decode, 174, 15, 141, 1, // Opcode: LBu
6137
/* 16813 */   MCD_OPC_FilterValue, 37, 10, 0, 0, // Skip to: 16828
6138
/* 16818 */   MCD_OPC_CheckPredicate, 27, 19, 1, 0, // Skip to: 17098
6139
/* 16823 */   MCD_OPC_Decode, 226, 15, 141, 1, // Opcode: LHu
6140
/* 16828 */   MCD_OPC_FilterValue, 38, 10, 0, 0, // Skip to: 16843
6141
/* 16833 */   MCD_OPC_CheckPredicate, 31, 4, 1, 0, // Skip to: 17098
6142
/* 16838 */   MCD_OPC_Decode, 162, 16, 141, 1, // Opcode: LWR
6143
/* 16843 */   MCD_OPC_FilterValue, 40, 10, 0, 0, // Skip to: 16858
6144
/* 16848 */   MCD_OPC_CheckPredicate, 27, 245, 0, 0, // Skip to: 17098
6145
/* 16853 */   MCD_OPC_Decode, 193, 20, 141, 1, // Opcode: SB
6146
/* 16858 */   MCD_OPC_FilterValue, 41, 10, 0, 0, // Skip to: 16873
6147
/* 16863 */   MCD_OPC_CheckPredicate, 27, 230, 0, 0, // Skip to: 17098
6148
/* 16868 */   MCD_OPC_Decode, 143, 21, 141, 1, // Opcode: SH
6149
/* 16873 */   MCD_OPC_FilterValue, 42, 10, 0, 0, // Skip to: 16888
6150
/* 16878 */   MCD_OPC_CheckPredicate, 31, 215, 0, 0, // Skip to: 17098
6151
/* 16883 */   MCD_OPC_Decode, 146, 23, 141, 1, // Opcode: SWL
6152
/* 16888 */   MCD_OPC_FilterValue, 43, 10, 0, 0, // Skip to: 16903
6153
/* 16893 */   MCD_OPC_CheckPredicate, 27, 200, 0, 0, // Skip to: 17098
6154
/* 16898 */   MCD_OPC_Decode, 128, 23, 141, 1, // Opcode: SW
6155
/* 16903 */   MCD_OPC_FilterValue, 46, 10, 0, 0, // Skip to: 16918
6156
/* 16908 */   MCD_OPC_CheckPredicate, 31, 185, 0, 0, // Skip to: 17098
6157
/* 16913 */   MCD_OPC_Decode, 157, 23, 141, 1, // Opcode: SWR
6158
/* 16918 */   MCD_OPC_FilterValue, 47, 10, 0, 0, // Skip to: 16933
6159
/* 16923 */   MCD_OPC_CheckPredicate, 71, 170, 0, 0, // Skip to: 17098
6160
/* 16928 */   MCD_OPC_Decode, 246, 8, 218, 2, // Opcode: CACHE
6161
/* 16933 */   MCD_OPC_FilterValue, 48, 10, 0, 0, // Skip to: 16948
6162
/* 16938 */   MCD_OPC_CheckPredicate, 72, 155, 0, 0, // Skip to: 17098
6163
/* 16943 */   MCD_OPC_Decode, 235, 15, 141, 1, // Opcode: LL
6164
/* 16948 */   MCD_OPC_FilterValue, 49, 10, 0, 0, // Skip to: 16963
6165
/* 16953 */   MCD_OPC_CheckPredicate, 47, 140, 0, 0, // Skip to: 17098
6166
/* 16958 */   MCD_OPC_Decode, 136, 16, 219, 2, // Opcode: LWC1
6167
/* 16963 */   MCD_OPC_FilterValue, 50, 10, 0, 0, // Skip to: 16978
6168
/* 16968 */   MCD_OPC_CheckPredicate, 31, 125, 0, 0, // Skip to: 17098
6169
/* 16973 */   MCD_OPC_Decode, 138, 16, 220, 2, // Opcode: LWC2
6170
/* 16978 */   MCD_OPC_FilterValue, 51, 10, 0, 0, // Skip to: 16993
6171
/* 16983 */   MCD_OPC_CheckPredicate, 71, 110, 0, 0, // Skip to: 17098
6172
/* 16988 */   MCD_OPC_Decode, 238, 19, 218, 2, // Opcode: PREF
6173
/* 16993 */   MCD_OPC_FilterValue, 53, 10, 0, 0, // Skip to: 17008
6174
/* 16998 */   MCD_OPC_CheckPredicate, 57, 95, 0, 0, // Skip to: 17098
6175
/* 17003 */   MCD_OPC_Decode, 180, 15, 219, 2, // Opcode: LDC1
6176
/* 17008 */   MCD_OPC_FilterValue, 54, 10, 0, 0, // Skip to: 17023
6177
/* 17013 */   MCD_OPC_CheckPredicate, 39, 80, 0, 0, // Skip to: 17098
6178
/* 17018 */   MCD_OPC_Decode, 185, 15, 220, 2, // Opcode: LDC2
6179
/* 17023 */   MCD_OPC_FilterValue, 56, 10, 0, 0, // Skip to: 17038
6180
/* 17028 */   MCD_OPC_CheckPredicate, 72, 65, 0, 0, // Skip to: 17098
6181
/* 17033 */   MCD_OPC_Decode, 206, 20, 141, 1, // Opcode: SC
6182
/* 17038 */   MCD_OPC_FilterValue, 57, 10, 0, 0, // Skip to: 17053
6183
/* 17043 */   MCD_OPC_CheckPredicate, 47, 50, 0, 0, // Skip to: 17098
6184
/* 17048 */   MCD_OPC_Decode, 134, 23, 219, 2, // Opcode: SWC1
6185
/* 17053 */   MCD_OPC_FilterValue, 58, 10, 0, 0, // Skip to: 17068
6186
/* 17058 */   MCD_OPC_CheckPredicate, 31, 35, 0, 0, // Skip to: 17098
6187
/* 17063 */   MCD_OPC_Decode, 136, 23, 220, 2, // Opcode: SWC2
6188
/* 17068 */   MCD_OPC_FilterValue, 61, 10, 0, 0, // Skip to: 17083
6189
/* 17073 */   MCD_OPC_CheckPredicate, 57, 20, 0, 0, // Skip to: 17098
6190
/* 17078 */   MCD_OPC_Decode, 227, 20, 219, 2, // Opcode: SDC1
6191
/* 17083 */   MCD_OPC_FilterValue, 62, 10, 0, 0, // Skip to: 17098
6192
/* 17088 */   MCD_OPC_CheckPredicate, 39, 5, 0, 0, // Skip to: 17098
6193
/* 17093 */   MCD_OPC_Decode, 232, 20, 220, 2, // Opcode: SDC2
6194
/* 17098 */   MCD_OPC_Fail,
6195
  0
6196
};
6197
6198
static const uint8_t DecoderTableMips32_64_PTR6432[] = {
6199
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
6200
/* 3 */       MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 24
6201
/* 8 */       MCD_OPC_CheckPredicate, 73, 41, 0, 0, // Skip to: 54
6202
/* 13 */      MCD_OPC_CheckField, 0, 21, 8, 34, 0, 0, // Skip to: 54
6203
/* 20 */      MCD_OPC_Decode, 134, 15, 24, // Opcode: JR64
6204
/* 24 */      MCD_OPC_FilterValue, 48, 10, 0, 0, // Skip to: 39
6205
/* 29 */      MCD_OPC_CheckPredicate, 74, 20, 0, 0, // Skip to: 54
6206
/* 34 */      MCD_OPC_Decode, 236, 15, 141, 1, // Opcode: LL64
6207
/* 39 */      MCD_OPC_FilterValue, 56, 10, 0, 0, // Skip to: 54
6208
/* 44 */      MCD_OPC_CheckPredicate, 74, 5, 0, 0, // Skip to: 54
6209
/* 49 */      MCD_OPC_Decode, 207, 20, 141, 1, // Opcode: SC64
6210
/* 54 */      MCD_OPC_Fail,
6211
  0
6212
};
6213
6214
static const uint8_t DecoderTableMips32r6_64r632[] = {
6215
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
6216
/* 3 */       MCD_OPC_FilterValue, 0, 14, 2, 0, // Skip to: 534
6217
/* 8 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6218
/* 11 */      MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 33
6219
/* 16 */      MCD_OPC_CheckPredicate, 75, 133, 9, 0, // Skip to: 2458
6220
/* 21 */      MCD_OPC_CheckField, 8, 3, 0, 126, 9, 0, // Skip to: 2458
6221
/* 28 */      MCD_OPC_Decode, 250, 15, 185, 1, // Opcode: LSA_R6
6222
/* 33 */      MCD_OPC_FilterValue, 9, 17, 0, 0, // Skip to: 55
6223
/* 38 */      MCD_OPC_CheckPredicate, 75, 111, 9, 0, // Skip to: 2458
6224
/* 43 */      MCD_OPC_CheckField, 6, 15, 16, 104, 9, 0, // Skip to: 2458
6225
/* 50 */      MCD_OPC_Decode, 143, 15, 186, 1, // Opcode: JR_HB_R6
6226
/* 55 */      MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 70
6227
/* 60 */      MCD_OPC_CheckPredicate, 76, 89, 9, 0, // Skip to: 2458
6228
/* 65 */      MCD_OPC_Decode, 226, 20, 188, 1, // Opcode: SDBBP_R6
6229
/* 70 */      MCD_OPC_FilterValue, 16, 23, 0, 0, // Skip to: 98
6230
/* 75 */      MCD_OPC_CheckPredicate, 75, 74, 9, 0, // Skip to: 2458
6231
/* 80 */      MCD_OPC_CheckField, 16, 5, 0, 67, 9, 0, // Skip to: 2458
6232
/* 87 */      MCD_OPC_CheckField, 6, 5, 1, 60, 9, 0, // Skip to: 2458
6233
/* 94 */      MCD_OPC_Decode, 197, 9, 25, // Opcode: CLZ_R6
6234
/* 98 */      MCD_OPC_FilterValue, 17, 23, 0, 0, // Skip to: 126
6235
/* 103 */     MCD_OPC_CheckPredicate, 75, 46, 9, 0, // Skip to: 2458
6236
/* 108 */     MCD_OPC_CheckField, 16, 5, 0, 39, 9, 0, // Skip to: 2458
6237
/* 115 */     MCD_OPC_CheckField, 6, 5, 1, 32, 9, 0, // Skip to: 2458
6238
/* 122 */     MCD_OPC_Decode, 176, 9, 25, // Opcode: CLO_R6
6239
/* 126 */     MCD_OPC_FilterValue, 18, 23, 0, 0, // Skip to: 154
6240
/* 131 */     MCD_OPC_CheckPredicate, 77, 18, 9, 0, // Skip to: 2458
6241
/* 136 */     MCD_OPC_CheckField, 16, 5, 0, 11, 9, 0, // Skip to: 2458
6242
/* 143 */     MCD_OPC_CheckField, 6, 5, 1, 4, 9, 0, // Skip to: 2458
6243
/* 150 */     MCD_OPC_Decode, 203, 11, 26, // Opcode: DCLZ_R6
6244
/* 154 */     MCD_OPC_FilterValue, 19, 23, 0, 0, // Skip to: 182
6245
/* 159 */     MCD_OPC_CheckPredicate, 77, 246, 8, 0, // Skip to: 2458
6246
/* 164 */     MCD_OPC_CheckField, 16, 5, 0, 239, 8, 0, // Skip to: 2458
6247
/* 171 */     MCD_OPC_CheckField, 6, 5, 1, 232, 8, 0, // Skip to: 2458
6248
/* 178 */     MCD_OPC_Decode, 201, 11, 26, // Opcode: DCLO_R6
6249
/* 182 */     MCD_OPC_FilterValue, 21, 17, 0, 0, // Skip to: 204
6250
/* 187 */     MCD_OPC_CheckPredicate, 77, 218, 8, 0, // Skip to: 2458
6251
/* 192 */     MCD_OPC_CheckField, 8, 3, 0, 211, 8, 0, // Skip to: 2458
6252
/* 199 */     MCD_OPC_Decode, 236, 11, 194, 1, // Opcode: DLSA_R6
6253
/* 204 */     MCD_OPC_FilterValue, 24, 31, 0, 0, // Skip to: 240
6254
/* 209 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6255
/* 212 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 226
6256
/* 217 */     MCD_OPC_CheckPredicate, 76, 188, 8, 0, // Skip to: 2458
6257
/* 222 */     MCD_OPC_Decode, 252, 18, 61, // Opcode: MUL_R6
6258
/* 226 */     MCD_OPC_FilterValue, 3, 179, 8, 0, // Skip to: 2458
6259
/* 231 */     MCD_OPC_CheckPredicate, 76, 174, 8, 0, // Skip to: 2458
6260
/* 236 */     MCD_OPC_Decode, 199, 18, 61, // Opcode: MUH
6261
/* 240 */     MCD_OPC_FilterValue, 25, 31, 0, 0, // Skip to: 276
6262
/* 245 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6263
/* 248 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 262
6264
/* 253 */     MCD_OPC_CheckPredicate, 76, 152, 8, 0, // Skip to: 2458
6265
/* 258 */     MCD_OPC_Decode, 238, 18, 61, // Opcode: MULU
6266
/* 262 */     MCD_OPC_FilterValue, 3, 143, 8, 0, // Skip to: 2458
6267
/* 267 */     MCD_OPC_CheckPredicate, 76, 138, 8, 0, // Skip to: 2458
6268
/* 272 */     MCD_OPC_Decode, 200, 18, 61, // Opcode: MUHU
6269
/* 276 */     MCD_OPC_FilterValue, 26, 31, 0, 0, // Skip to: 312
6270
/* 281 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6271
/* 284 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 298
6272
/* 289 */     MCD_OPC_CheckPredicate, 76, 116, 8, 0, // Skip to: 2458
6273
/* 294 */     MCD_OPC_Decode, 218, 11, 61, // Opcode: DIV
6274
/* 298 */     MCD_OPC_FilterValue, 3, 107, 8, 0, // Skip to: 2458
6275
/* 303 */     MCD_OPC_CheckPredicate, 76, 102, 8, 0, // Skip to: 2458
6276
/* 308 */     MCD_OPC_Decode, 192, 17, 61, // Opcode: MOD
6277
/* 312 */     MCD_OPC_FilterValue, 27, 31, 0, 0, // Skip to: 348
6278
/* 317 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6279
/* 320 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 334
6280
/* 325 */     MCD_OPC_CheckPredicate, 76, 80, 8, 0, // Skip to: 2458
6281
/* 330 */     MCD_OPC_Decode, 219, 11, 61, // Opcode: DIVU
6282
/* 334 */     MCD_OPC_FilterValue, 3, 71, 8, 0, // Skip to: 2458
6283
/* 339 */     MCD_OPC_CheckPredicate, 76, 66, 8, 0, // Skip to: 2458
6284
/* 344 */     MCD_OPC_Decode, 195, 17, 61, // Opcode: MODU
6285
/* 348 */     MCD_OPC_FilterValue, 28, 31, 0, 0, // Skip to: 384
6286
/* 353 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6287
/* 356 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 370
6288
/* 361 */     MCD_OPC_CheckPredicate, 77, 44, 8, 0, // Skip to: 2458
6289
/* 366 */     MCD_OPC_Decode, 129, 12, 23, // Opcode: DMUL_R6
6290
/* 370 */     MCD_OPC_FilterValue, 3, 35, 8, 0, // Skip to: 2458
6291
/* 375 */     MCD_OPC_CheckPredicate, 77, 30, 8, 0, // Skip to: 2458
6292
/* 380 */     MCD_OPC_Decode, 251, 11, 23, // Opcode: DMUH
6293
/* 384 */     MCD_OPC_FilterValue, 29, 31, 0, 0, // Skip to: 420
6294
/* 389 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6295
/* 392 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 406
6296
/* 397 */     MCD_OPC_CheckPredicate, 77, 8, 8, 0, // Skip to: 2458
6297
/* 402 */     MCD_OPC_Decode, 128, 12, 23, // Opcode: DMULU
6298
/* 406 */     MCD_OPC_FilterValue, 3, 255, 7, 0, // Skip to: 2458
6299
/* 411 */     MCD_OPC_CheckPredicate, 77, 250, 7, 0, // Skip to: 2458
6300
/* 416 */     MCD_OPC_Decode, 252, 11, 23, // Opcode: DMUHU
6301
/* 420 */     MCD_OPC_FilterValue, 30, 31, 0, 0, // Skip to: 456
6302
/* 425 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6303
/* 428 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 442
6304
/* 433 */     MCD_OPC_CheckPredicate, 77, 228, 7, 0, // Skip to: 2458
6305
/* 438 */     MCD_OPC_Decode, 204, 11, 23, // Opcode: DDIV
6306
/* 442 */     MCD_OPC_FilterValue, 3, 219, 7, 0, // Skip to: 2458
6307
/* 447 */     MCD_OPC_CheckPredicate, 77, 214, 7, 0, // Skip to: 2458
6308
/* 452 */     MCD_OPC_Decode, 242, 11, 23, // Opcode: DMOD
6309
/* 456 */     MCD_OPC_FilterValue, 31, 31, 0, 0, // Skip to: 492
6310
/* 461 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6311
/* 464 */     MCD_OPC_FilterValue, 2, 9, 0, 0, // Skip to: 478
6312
/* 469 */     MCD_OPC_CheckPredicate, 77, 192, 7, 0, // Skip to: 2458
6313
/* 474 */     MCD_OPC_Decode, 205, 11, 23, // Opcode: DDIVU
6314
/* 478 */     MCD_OPC_FilterValue, 3, 183, 7, 0, // Skip to: 2458
6315
/* 483 */     MCD_OPC_CheckPredicate, 77, 178, 7, 0, // Skip to: 2458
6316
/* 488 */     MCD_OPC_Decode, 243, 11, 23, // Opcode: DMODU
6317
/* 492 */     MCD_OPC_FilterValue, 53, 16, 0, 0, // Skip to: 513
6318
/* 497 */     MCD_OPC_CheckPredicate, 78, 164, 7, 0, // Skip to: 2458
6319
/* 502 */     MCD_OPC_CheckField, 6, 5, 0, 157, 7, 0, // Skip to: 2458
6320
/* 509 */     MCD_OPC_Decode, 250, 20, 61, // Opcode: SELEQZ
6321
/* 513 */     MCD_OPC_FilterValue, 55, 148, 7, 0, // Skip to: 2458
6322
/* 518 */     MCD_OPC_CheckPredicate, 78, 143, 7, 0, // Skip to: 2458
6323
/* 523 */     MCD_OPC_CheckField, 6, 5, 0, 136, 7, 0, // Skip to: 2458
6324
/* 530 */     MCD_OPC_Decode, 129, 21, 61, // Opcode: SELNEZ
6325
/* 534 */     MCD_OPC_FilterValue, 1, 77, 0, 0, // Skip to: 616
6326
/* 539 */     MCD_OPC_ExtractField, 16, 5,  // Inst{20-16} ...
6327
/* 542 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 557
6328
/* 547 */     MCD_OPC_CheckPredicate, 77, 114, 7, 0, // Skip to: 2458
6329
/* 552 */     MCD_OPC_Decode, 195, 11, 221, 2, // Opcode: DAHI
6330
/* 557 */     MCD_OPC_FilterValue, 17, 17, 0, 0, // Skip to: 579
6331
/* 562 */     MCD_OPC_CheckPredicate, 75, 99, 7, 0, // Skip to: 2458
6332
/* 567 */     MCD_OPC_CheckField, 21, 5, 0, 92, 7, 0, // Skip to: 2458
6333
/* 574 */     MCD_OPC_Decode, 147, 7, 198, 1, // Opcode: BAL
6334
/* 579 */     MCD_OPC_FilterValue, 23, 17, 0, 0, // Skip to: 601
6335
/* 584 */     MCD_OPC_CheckPredicate, 76, 77, 7, 0, // Skip to: 2458
6336
/* 589 */     MCD_OPC_CheckField, 21, 5, 0, 70, 7, 0, // Skip to: 2458
6337
/* 596 */     MCD_OPC_Decode, 208, 21, 222, 2, // Opcode: SIGRIE
6338
/* 601 */     MCD_OPC_FilterValue, 30, 60, 7, 0, // Skip to: 2458
6339
/* 606 */     MCD_OPC_CheckPredicate, 77, 55, 7, 0, // Skip to: 2458
6340
/* 611 */     MCD_OPC_Decode, 197, 11, 221, 2, // Opcode: DATI
6341
/* 616 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 631
6342
/* 621 */     MCD_OPC_CheckPredicate, 76, 40, 7, 0, // Skip to: 2458
6343
/* 626 */     MCD_OPC_Decode, 222, 7, 223, 2, // Opcode: BGEZALC
6344
/* 631 */     MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 646
6345
/* 636 */     MCD_OPC_CheckPredicate, 76, 25, 7, 0, // Skip to: 2458
6346
/* 641 */     MCD_OPC_Decode, 156, 8, 224, 2, // Opcode: BLTZALC
6347
/* 646 */     MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 661
6348
/* 651 */     MCD_OPC_CheckPredicate, 76, 10, 7, 0, // Skip to: 2458
6349
/* 656 */     MCD_OPC_Decode, 190, 7, 225, 2, // Opcode: BEQC
6350
/* 661 */     MCD_OPC_FilterValue, 15, 10, 0, 0, // Skip to: 676
6351
/* 666 */     MCD_OPC_CheckPredicate, 75, 251, 6, 0, // Skip to: 2458
6352
/* 671 */     MCD_OPC_Decode, 244, 6, 203, 1, // Opcode: AUI
6353
/* 676 */     MCD_OPC_FilterValue, 16, 45, 0, 0, // Skip to: 726
6354
/* 681 */     MCD_OPC_ExtractField, 0, 16,  // Inst{15-0} ...
6355
/* 684 */     MCD_OPC_FilterValue, 4, 16, 0, 0, // Skip to: 705
6356
/* 689 */     MCD_OPC_CheckPredicate, 75, 228, 6, 0, // Skip to: 2458
6357
/* 694 */     MCD_OPC_CheckField, 21, 5, 11, 221, 6, 0, // Skip to: 2458
6358
/* 701 */     MCD_OPC_Decode, 223, 12, 92, // Opcode: EVP
6359
/* 705 */     MCD_OPC_FilterValue, 36, 212, 6, 0, // Skip to: 2458
6360
/* 710 */     MCD_OPC_CheckPredicate, 75, 207, 6, 0, // Skip to: 2458
6361
/* 715 */     MCD_OPC_CheckField, 21, 5, 11, 200, 6, 0, // Skip to: 2458
6362
/* 722 */     MCD_OPC_Decode, 200, 12, 92, // Opcode: DVP
6363
/* 726 */     MCD_OPC_FilterValue, 17, 135, 3, 0, // Skip to: 1634
6364
/* 731 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
6365
/* 734 */     MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 749
6366
/* 739 */     MCD_OPC_CheckPredicate, 79, 178, 6, 0, // Skip to: 2458
6367
/* 744 */     MCD_OPC_Decode, 164, 7, 226, 2, // Opcode: BC1EQZ
6368
/* 749 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 764
6369
/* 754 */     MCD_OPC_CheckPredicate, 79, 163, 6, 0, // Skip to: 2458
6370
/* 759 */     MCD_OPC_Decode, 169, 7, 226, 2, // Opcode: BC1NEZ
6371
/* 764 */     MCD_OPC_FilterValue, 16, 182, 0, 0, // Skip to: 951
6372
/* 769 */     MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6373
/* 772 */     MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 787
6374
/* 777 */     MCD_OPC_CheckPredicate, 79, 140, 6, 0, // Skip to: 2458
6375
/* 782 */     MCD_OPC_Decode, 138, 21, 227, 2, // Opcode: SEL_S
6376
/* 787 */     MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 802
6377
/* 792 */     MCD_OPC_CheckPredicate, 79, 125, 6, 0, // Skip to: 2458
6378
/* 797 */     MCD_OPC_Decode, 255, 20, 218, 1, // Opcode: SELEQZ_S
6379
/* 802 */     MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 817
6380
/* 807 */     MCD_OPC_CheckPredicate, 79, 110, 6, 0, // Skip to: 2458
6381
/* 812 */     MCD_OPC_Decode, 134, 21, 218, 1, // Opcode: SELNEZ_S
6382
/* 817 */     MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 832
6383
/* 822 */     MCD_OPC_CheckPredicate, 79, 95, 6, 0, // Skip to: 2458
6384
/* 827 */     MCD_OPC_Decode, 198, 16, 228, 2, // Opcode: MADDF_S
6385
/* 832 */     MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 847
6386
/* 837 */     MCD_OPC_CheckPredicate, 79, 80, 6, 0, // Skip to: 2458
6387
/* 842 */     MCD_OPC_Decode, 134, 18, 228, 2, // Opcode: MSUBF_S
6388
/* 847 */     MCD_OPC_FilterValue, 26, 17, 0, 0, // Skip to: 869
6389
/* 852 */     MCD_OPC_CheckPredicate, 79, 65, 6, 0, // Skip to: 2458
6390
/* 857 */     MCD_OPC_CheckField, 16, 5, 0, 58, 6, 0, // Skip to: 2458
6391
/* 864 */     MCD_OPC_Decode, 153, 20, 219, 1, // Opcode: RINT_S
6392
/* 869 */     MCD_OPC_FilterValue, 27, 17, 0, 0, // Skip to: 891
6393
/* 874 */     MCD_OPC_CheckPredicate, 79, 43, 6, 0, // Skip to: 2458
6394
/* 879 */     MCD_OPC_CheckField, 16, 5, 0, 36, 6, 0, // Skip to: 2458
6395
/* 886 */     MCD_OPC_Decode, 154, 9, 219, 1, // Opcode: CLASS_S
6396
/* 891 */     MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 906
6397
/* 896 */     MCD_OPC_CheckPredicate, 79, 21, 6, 0, // Skip to: 2458
6398
/* 901 */     MCD_OPC_Decode, 182, 17, 218, 1, // Opcode: MIN_S
6399
/* 906 */     MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 921
6400
/* 911 */     MCD_OPC_CheckPredicate, 79, 6, 6, 0, // Skip to: 2458
6401
/* 916 */     MCD_OPC_Decode, 246, 16, 218, 1, // Opcode: MAX_S
6402
/* 921 */     MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 936
6403
/* 926 */     MCD_OPC_CheckPredicate, 79, 247, 5, 0, // Skip to: 2458
6404
/* 931 */     MCD_OPC_Decode, 166, 17, 218, 1, // Opcode: MINA_S
6405
/* 936 */     MCD_OPC_FilterValue, 31, 237, 5, 0, // Skip to: 2458
6406
/* 941 */     MCD_OPC_CheckPredicate, 79, 232, 5, 0, // Skip to: 2458
6407
/* 946 */     MCD_OPC_Decode, 230, 16, 218, 1, // Opcode: MAXA_S
6408
/* 951 */     MCD_OPC_FilterValue, 17, 182, 0, 0, // Skip to: 1138
6409
/* 956 */     MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6410
/* 959 */     MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 974
6411
/* 964 */     MCD_OPC_CheckPredicate, 79, 209, 5, 0, // Skip to: 2458
6412
/* 969 */     MCD_OPC_Decode, 136, 21, 229, 2, // Opcode: SEL_D
6413
/* 974 */     MCD_OPC_FilterValue, 20, 10, 0, 0, // Skip to: 989
6414
/* 979 */     MCD_OPC_CheckPredicate, 79, 194, 5, 0, // Skip to: 2458
6415
/* 984 */     MCD_OPC_Decode, 252, 20, 230, 2, // Opcode: SELEQZ_D
6416
/* 989 */     MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 1004
6417
/* 994 */     MCD_OPC_CheckPredicate, 79, 179, 5, 0, // Skip to: 2458
6418
/* 999 */     MCD_OPC_Decode, 131, 21, 230, 2, // Opcode: SELNEZ_D
6419
/* 1004 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 1019
6420
/* 1009 */    MCD_OPC_CheckPredicate, 79, 164, 5, 0, // Skip to: 2458
6421
/* 1014 */    MCD_OPC_Decode, 196, 16, 229, 2, // Opcode: MADDF_D
6422
/* 1019 */    MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 1034
6423
/* 1024 */    MCD_OPC_CheckPredicate, 79, 149, 5, 0, // Skip to: 2458
6424
/* 1029 */    MCD_OPC_Decode, 132, 18, 229, 2, // Opcode: MSUBF_D
6425
/* 1034 */    MCD_OPC_FilterValue, 26, 17, 0, 0, // Skip to: 1056
6426
/* 1039 */    MCD_OPC_CheckPredicate, 79, 134, 5, 0, // Skip to: 2458
6427
/* 1044 */    MCD_OPC_CheckField, 16, 5, 0, 127, 5, 0, // Skip to: 2458
6428
/* 1051 */    MCD_OPC_Decode, 151, 20, 230, 1, // Opcode: RINT_D
6429
/* 1056 */    MCD_OPC_FilterValue, 27, 17, 0, 0, // Skip to: 1078
6430
/* 1061 */    MCD_OPC_CheckPredicate, 79, 112, 5, 0, // Skip to: 2458
6431
/* 1066 */    MCD_OPC_CheckField, 16, 5, 0, 105, 5, 0, // Skip to: 2458
6432
/* 1073 */    MCD_OPC_Decode, 152, 9, 230, 1, // Opcode: CLASS_D
6433
/* 1078 */    MCD_OPC_FilterValue, 28, 10, 0, 0, // Skip to: 1093
6434
/* 1083 */    MCD_OPC_CheckPredicate, 79, 90, 5, 0, // Skip to: 2458
6435
/* 1088 */    MCD_OPC_Decode, 180, 17, 230, 2, // Opcode: MIN_D
6436
/* 1093 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 1108
6437
/* 1098 */    MCD_OPC_CheckPredicate, 79, 75, 5, 0, // Skip to: 2458
6438
/* 1103 */    MCD_OPC_Decode, 244, 16, 230, 2, // Opcode: MAX_D
6439
/* 1108 */    MCD_OPC_FilterValue, 30, 10, 0, 0, // Skip to: 1123
6440
/* 1113 */    MCD_OPC_CheckPredicate, 79, 60, 5, 0, // Skip to: 2458
6441
/* 1118 */    MCD_OPC_Decode, 164, 17, 230, 2, // Opcode: MINA_D
6442
/* 1123 */    MCD_OPC_FilterValue, 31, 50, 5, 0, // Skip to: 2458
6443
/* 1128 */    MCD_OPC_CheckPredicate, 79, 45, 5, 0, // Skip to: 2458
6444
/* 1133 */    MCD_OPC_Decode, 228, 16, 230, 2, // Opcode: MAXA_D
6445
/* 1138 */    MCD_OPC_FilterValue, 20, 243, 0, 0, // Skip to: 1386
6446
/* 1143 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6447
/* 1146 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1161
6448
/* 1151 */    MCD_OPC_CheckPredicate, 79, 22, 5, 0, // Skip to: 2458
6449
/* 1156 */    MCD_OPC_Decode, 225, 9, 231, 2, // Opcode: CMP_F_S
6450
/* 1161 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 1176
6451
/* 1166 */    MCD_OPC_CheckPredicate, 79, 7, 5, 0, // Skip to: 2458
6452
/* 1171 */    MCD_OPC_Decode, 156, 10, 231, 2, // Opcode: CMP_UN_S
6453
/* 1176 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1191
6454
/* 1181 */    MCD_OPC_CheckPredicate, 79, 248, 4, 0, // Skip to: 2458
6455
/* 1186 */    MCD_OPC_Decode, 222, 9, 231, 2, // Opcode: CMP_EQ_S
6456
/* 1191 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1206
6457
/* 1196 */    MCD_OPC_CheckPredicate, 79, 233, 4, 0, // Skip to: 2458
6458
/* 1201 */    MCD_OPC_Decode, 144, 10, 231, 2, // Opcode: CMP_UEQ_S
6459
/* 1206 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 1221
6460
/* 1211 */    MCD_OPC_CheckPredicate, 79, 218, 4, 0, // Skip to: 2458
6461
/* 1216 */    MCD_OPC_Decode, 236, 9, 231, 2, // Opcode: CMP_LT_S
6462
/* 1221 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 1236
6463
/* 1226 */    MCD_OPC_CheckPredicate, 79, 203, 4, 0, // Skip to: 2458
6464
/* 1231 */    MCD_OPC_Decode, 152, 10, 231, 2, // Opcode: CMP_ULT_S
6465
/* 1236 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 1251
6466
/* 1241 */    MCD_OPC_CheckPredicate, 79, 188, 4, 0, // Skip to: 2458
6467
/* 1246 */    MCD_OPC_Decode, 230, 9, 231, 2, // Opcode: CMP_LE_S
6468
/* 1251 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 1266
6469
/* 1256 */    MCD_OPC_CheckPredicate, 79, 173, 4, 0, // Skip to: 2458
6470
/* 1261 */    MCD_OPC_Decode, 148, 10, 231, 2, // Opcode: CMP_ULE_S
6471
/* 1266 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 1281
6472
/* 1271 */    MCD_OPC_CheckPredicate, 79, 158, 4, 0, // Skip to: 2458
6473
/* 1276 */    MCD_OPC_Decode, 240, 9, 231, 2, // Opcode: CMP_SAF_S
6474
/* 1281 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 1296
6475
/* 1286 */    MCD_OPC_CheckPredicate, 79, 143, 4, 0, // Skip to: 2458
6476
/* 1291 */    MCD_OPC_Decode, 140, 10, 231, 2, // Opcode: CMP_SUN_S
6477
/* 1296 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1311
6478
/* 1301 */    MCD_OPC_CheckPredicate, 79, 128, 4, 0, // Skip to: 2458
6479
/* 1306 */    MCD_OPC_Decode, 244, 9, 231, 2, // Opcode: CMP_SEQ_S
6480
/* 1311 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 1326
6481
/* 1316 */    MCD_OPC_CheckPredicate, 79, 113, 4, 0, // Skip to: 2458
6482
/* 1321 */    MCD_OPC_Decode, 128, 10, 231, 2, // Opcode: CMP_SUEQ_S
6483
/* 1326 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 1341
6484
/* 1331 */    MCD_OPC_CheckPredicate, 79, 98, 4, 0, // Skip to: 2458
6485
/* 1336 */    MCD_OPC_Decode, 252, 9, 231, 2, // Opcode: CMP_SLT_S
6486
/* 1341 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1356
6487
/* 1346 */    MCD_OPC_CheckPredicate, 79, 83, 4, 0, // Skip to: 2458
6488
/* 1351 */    MCD_OPC_Decode, 136, 10, 231, 2, // Opcode: CMP_SULT_S
6489
/* 1356 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 1371
6490
/* 1361 */    MCD_OPC_CheckPredicate, 79, 68, 4, 0, // Skip to: 2458
6491
/* 1366 */    MCD_OPC_Decode, 248, 9, 231, 2, // Opcode: CMP_SLE_S
6492
/* 1371 */    MCD_OPC_FilterValue, 15, 58, 4, 0, // Skip to: 2458
6493
/* 1376 */    MCD_OPC_CheckPredicate, 79, 53, 4, 0, // Skip to: 2458
6494
/* 1381 */    MCD_OPC_Decode, 132, 10, 231, 2, // Opcode: CMP_SULE_S
6495
/* 1386 */    MCD_OPC_FilterValue, 21, 43, 4, 0, // Skip to: 2458
6496
/* 1391 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6497
/* 1394 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1409
6498
/* 1399 */    MCD_OPC_CheckPredicate, 79, 30, 4, 0, // Skip to: 2458
6499
/* 1404 */    MCD_OPC_Decode, 224, 9, 232, 2, // Opcode: CMP_F_D
6500
/* 1409 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 1424
6501
/* 1414 */    MCD_OPC_CheckPredicate, 79, 15, 4, 0, // Skip to: 2458
6502
/* 1419 */    MCD_OPC_Decode, 154, 10, 232, 2, // Opcode: CMP_UN_D
6503
/* 1424 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1439
6504
/* 1429 */    MCD_OPC_CheckPredicate, 79, 0, 4, 0, // Skip to: 2458
6505
/* 1434 */    MCD_OPC_Decode, 218, 9, 232, 2, // Opcode: CMP_EQ_D
6506
/* 1439 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1454
6507
/* 1444 */    MCD_OPC_CheckPredicate, 79, 241, 3, 0, // Skip to: 2458
6508
/* 1449 */    MCD_OPC_Decode, 142, 10, 232, 2, // Opcode: CMP_UEQ_D
6509
/* 1454 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 1469
6510
/* 1459 */    MCD_OPC_CheckPredicate, 79, 226, 3, 0, // Skip to: 2458
6511
/* 1464 */    MCD_OPC_Decode, 232, 9, 232, 2, // Opcode: CMP_LT_D
6512
/* 1469 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 1484
6513
/* 1474 */    MCD_OPC_CheckPredicate, 79, 211, 3, 0, // Skip to: 2458
6514
/* 1479 */    MCD_OPC_Decode, 150, 10, 232, 2, // Opcode: CMP_ULT_D
6515
/* 1484 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 1499
6516
/* 1489 */    MCD_OPC_CheckPredicate, 79, 196, 3, 0, // Skip to: 2458
6517
/* 1494 */    MCD_OPC_Decode, 226, 9, 232, 2, // Opcode: CMP_LE_D
6518
/* 1499 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 1514
6519
/* 1504 */    MCD_OPC_CheckPredicate, 79, 181, 3, 0, // Skip to: 2458
6520
/* 1509 */    MCD_OPC_Decode, 146, 10, 232, 2, // Opcode: CMP_ULE_D
6521
/* 1514 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 1529
6522
/* 1519 */    MCD_OPC_CheckPredicate, 79, 166, 3, 0, // Skip to: 2458
6523
/* 1524 */    MCD_OPC_Decode, 238, 9, 232, 2, // Opcode: CMP_SAF_D
6524
/* 1529 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 1544
6525
/* 1534 */    MCD_OPC_CheckPredicate, 79, 151, 3, 0, // Skip to: 2458
6526
/* 1539 */    MCD_OPC_Decode, 138, 10, 232, 2, // Opcode: CMP_SUN_D
6527
/* 1544 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1559
6528
/* 1549 */    MCD_OPC_CheckPredicate, 79, 136, 3, 0, // Skip to: 2458
6529
/* 1554 */    MCD_OPC_Decode, 242, 9, 232, 2, // Opcode: CMP_SEQ_D
6530
/* 1559 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 1574
6531
/* 1564 */    MCD_OPC_CheckPredicate, 79, 121, 3, 0, // Skip to: 2458
6532
/* 1569 */    MCD_OPC_Decode, 254, 9, 232, 2, // Opcode: CMP_SUEQ_D
6533
/* 1574 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 1589
6534
/* 1579 */    MCD_OPC_CheckPredicate, 79, 106, 3, 0, // Skip to: 2458
6535
/* 1584 */    MCD_OPC_Decode, 250, 9, 232, 2, // Opcode: CMP_SLT_D
6536
/* 1589 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1604
6537
/* 1594 */    MCD_OPC_CheckPredicate, 79, 91, 3, 0, // Skip to: 2458
6538
/* 1599 */    MCD_OPC_Decode, 134, 10, 232, 2, // Opcode: CMP_SULT_D
6539
/* 1604 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 1619
6540
/* 1609 */    MCD_OPC_CheckPredicate, 79, 76, 3, 0, // Skip to: 2458
6541
/* 1614 */    MCD_OPC_Decode, 246, 9, 232, 2, // Opcode: CMP_SLE_D
6542
/* 1619 */    MCD_OPC_FilterValue, 15, 66, 3, 0, // Skip to: 2458
6543
/* 1624 */    MCD_OPC_CheckPredicate, 79, 61, 3, 0, // Skip to: 2458
6544
/* 1629 */    MCD_OPC_Decode, 130, 10, 232, 2, // Opcode: CMP_SULE_D
6545
/* 1634 */    MCD_OPC_FilterValue, 18, 93, 0, 0, // Skip to: 1732
6546
/* 1639 */    MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
6547
/* 1642 */    MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 1657
6548
/* 1647 */    MCD_OPC_CheckPredicate, 76, 38, 3, 0, // Skip to: 2458
6549
/* 1652 */    MCD_OPC_Decode, 174, 7, 233, 2, // Opcode: BC2EQZ
6550
/* 1657 */    MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 1672
6551
/* 1662 */    MCD_OPC_CheckPredicate, 76, 23, 3, 0, // Skip to: 2458
6552
/* 1667 */    MCD_OPC_Decode, 140, 16, 234, 2, // Opcode: LWC2_R6
6553
/* 1672 */    MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 1687
6554
/* 1677 */    MCD_OPC_CheckPredicate, 76, 8, 3, 0, // Skip to: 2458
6555
/* 1682 */    MCD_OPC_Decode, 138, 23, 234, 2, // Opcode: SWC2_R6
6556
/* 1687 */    MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 1702
6557
/* 1692 */    MCD_OPC_CheckPredicate, 76, 249, 2, 0, // Skip to: 2458
6558
/* 1697 */    MCD_OPC_Decode, 176, 7, 233, 2, // Opcode: BC2NEZ
6559
/* 1702 */    MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 1717
6560
/* 1707 */    MCD_OPC_CheckPredicate, 76, 234, 2, 0, // Skip to: 2458
6561
/* 1712 */    MCD_OPC_Decode, 187, 15, 234, 2, // Opcode: LDC2_R6
6562
/* 1717 */    MCD_OPC_FilterValue, 15, 224, 2, 0, // Skip to: 2458
6563
/* 1722 */    MCD_OPC_CheckPredicate, 76, 219, 2, 0, // Skip to: 2458
6564
/* 1727 */    MCD_OPC_Decode, 234, 20, 234, 2, // Opcode: SDC2_R6
6565
/* 1732 */    MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 1747
6566
/* 1737 */    MCD_OPC_CheckPredicate, 76, 204, 2, 0, // Skip to: 2458
6567
/* 1742 */    MCD_OPC_Decode, 227, 7, 235, 2, // Opcode: BGEZC
6568
/* 1747 */    MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 1762
6569
/* 1752 */    MCD_OPC_CheckPredicate, 76, 189, 2, 0, // Skip to: 2458
6570
/* 1757 */    MCD_OPC_Decode, 161, 8, 236, 2, // Opcode: BLTZC
6571
/* 1762 */    MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 1777
6572
/* 1767 */    MCD_OPC_CheckPredicate, 76, 174, 2, 0, // Skip to: 2458
6573
/* 1772 */    MCD_OPC_Decode, 172, 8, 237, 2, // Opcode: BNEC
6574
/* 1777 */    MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 1792
6575
/* 1782 */    MCD_OPC_CheckPredicate, 77, 159, 2, 0, // Skip to: 2458
6576
/* 1787 */    MCD_OPC_Decode, 198, 11, 238, 2, // Opcode: DAUI
6577
/* 1792 */    MCD_OPC_FilterValue, 31, 135, 1, 0, // Skip to: 2188
6578
/* 1797 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6579
/* 1800 */    MCD_OPC_FilterValue, 15, 123, 0, 0, // Skip to: 1928
6580
/* 1805 */    MCD_OPC_ExtractField, 6, 10,  // Inst{15-6} ...
6581
/* 1808 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1823
6582
/* 1813 */    MCD_OPC_CheckPredicate, 80, 128, 2, 0, // Skip to: 2458
6583
/* 1818 */    MCD_OPC_Decode, 165, 10, 239, 2, // Opcode: CRC32B
6584
/* 1823 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 1838
6585
/* 1828 */    MCD_OPC_CheckPredicate, 80, 113, 2, 0, // Skip to: 2458
6586
/* 1833 */    MCD_OPC_Decode, 175, 10, 239, 2, // Opcode: CRC32H
6587
/* 1838 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1853
6588
/* 1843 */    MCD_OPC_CheckPredicate, 80, 98, 2, 0, // Skip to: 2458
6589
/* 1848 */    MCD_OPC_Decode, 177, 10, 239, 2, // Opcode: CRC32W
6590
/* 1853 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1868
6591
/* 1858 */    MCD_OPC_CheckPredicate, 81, 83, 2, 0, // Skip to: 2458
6592
/* 1863 */    MCD_OPC_Decode, 174, 10, 239, 2, // Opcode: CRC32D
6593
/* 1868 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 1883
6594
/* 1873 */    MCD_OPC_CheckPredicate, 80, 68, 2, 0, // Skip to: 2458
6595
/* 1878 */    MCD_OPC_Decode, 167, 10, 239, 2, // Opcode: CRC32CB
6596
/* 1883 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 1898
6597
/* 1888 */    MCD_OPC_CheckPredicate, 80, 53, 2, 0, // Skip to: 2458
6598
/* 1893 */    MCD_OPC_Decode, 170, 10, 239, 2, // Opcode: CRC32CH
6599
/* 1898 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 1913
6600
/* 1903 */    MCD_OPC_CheckPredicate, 80, 38, 2, 0, // Skip to: 2458
6601
/* 1908 */    MCD_OPC_Decode, 172, 10, 239, 2, // Opcode: CRC32CW
6602
/* 1913 */    MCD_OPC_FilterValue, 7, 28, 2, 0, // Skip to: 2458
6603
/* 1918 */    MCD_OPC_CheckPredicate, 81, 23, 2, 0, // Skip to: 2458
6604
/* 1923 */    MCD_OPC_Decode, 169, 10, 239, 2, // Opcode: CRC32CD
6605
/* 1928 */    MCD_OPC_FilterValue, 32, 47, 0, 0, // Skip to: 1980
6606
/* 1933 */    MCD_OPC_ExtractField, 8, 3,  // Inst{10-8} ...
6607
/* 1936 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 1965
6608
/* 1941 */    MCD_OPC_CheckPredicate, 75, 0, 2, 0, // Skip to: 2458
6609
/* 1946 */    MCD_OPC_CheckField, 21, 5, 0, 249, 1, 0, // Skip to: 2458
6610
/* 1953 */    MCD_OPC_CheckField, 6, 2, 0, 242, 1, 0, // Skip to: 2458
6611
/* 1960 */    MCD_OPC_Decode, 132, 8, 204, 2, // Opcode: BITSWAP
6612
/* 1965 */    MCD_OPC_FilterValue, 2, 232, 1, 0, // Skip to: 2458
6613
/* 1970 */    MCD_OPC_CheckPredicate, 75, 227, 1, 0, // Skip to: 2458
6614
/* 1975 */    MCD_OPC_Decode, 211, 6, 240, 2, // Opcode: ALIGN
6615
/* 1980 */    MCD_OPC_FilterValue, 36, 47, 0, 0, // Skip to: 2032
6616
/* 1985 */    MCD_OPC_ExtractField, 9, 2,  // Inst{10-9} ...
6617
/* 1988 */    MCD_OPC_FilterValue, 0, 24, 0, 0, // Skip to: 2017
6618
/* 1993 */    MCD_OPC_CheckPredicate, 77, 204, 1, 0, // Skip to: 2458
6619
/* 1998 */    MCD_OPC_CheckField, 21, 5, 0, 197, 1, 0, // Skip to: 2458
6620
/* 2005 */    MCD_OPC_CheckField, 6, 3, 0, 190, 1, 0, // Skip to: 2458
6621
/* 2012 */    MCD_OPC_Decode, 199, 11, 241, 2, // Opcode: DBITSWAP
6622
/* 2017 */    MCD_OPC_FilterValue, 1, 180, 1, 0, // Skip to: 2458
6623
/* 2022 */    MCD_OPC_CheckPredicate, 77, 175, 1, 0, // Skip to: 2458
6624
/* 2027 */    MCD_OPC_Decode, 196, 11, 242, 2, // Opcode: DALIGN
6625
/* 2032 */    MCD_OPC_FilterValue, 37, 17, 0, 0, // Skip to: 2054
6626
/* 2037 */    MCD_OPC_CheckPredicate, 76, 160, 1, 0, // Skip to: 2458
6627
/* 2042 */    MCD_OPC_CheckField, 6, 1, 0, 153, 1, 0, // Skip to: 2458
6628
/* 2049 */    MCD_OPC_Decode, 252, 8, 209, 2, // Opcode: CACHE_R6
6629
/* 2054 */    MCD_OPC_FilterValue, 38, 10, 0, 0, // Skip to: 2069
6630
/* 2059 */    MCD_OPC_CheckPredicate, 82, 138, 1, 0, // Skip to: 2458
6631
/* 2064 */    MCD_OPC_Decode, 217, 20, 243, 2, // Opcode: SC_R6
6632
/* 2069 */    MCD_OPC_FilterValue, 39, 10, 0, 0, // Skip to: 2084
6633
/* 2074 */    MCD_OPC_CheckPredicate, 75, 123, 1, 0, // Skip to: 2458
6634
/* 2079 */    MCD_OPC_Decode, 210, 20, 243, 2, // Opcode: SCD_R6
6635
/* 2084 */    MCD_OPC_FilterValue, 53, 17, 0, 0, // Skip to: 2106
6636
/* 2089 */    MCD_OPC_CheckPredicate, 76, 108, 1, 0, // Skip to: 2458
6637
/* 2094 */    MCD_OPC_CheckField, 6, 1, 0, 101, 1, 0, // Skip to: 2458
6638
/* 2101 */    MCD_OPC_Decode, 245, 19, 209, 2, // Opcode: PREF_R6
6639
/* 2106 */    MCD_OPC_FilterValue, 54, 10, 0, 0, // Skip to: 2121
6640
/* 2111 */    MCD_OPC_CheckPredicate, 82, 86, 1, 0, // Skip to: 2458
6641
/* 2116 */    MCD_OPC_Decode, 246, 15, 243, 2, // Opcode: LL_R6
6642
/* 2121 */    MCD_OPC_FilterValue, 55, 10, 0, 0, // Skip to: 2136
6643
/* 2126 */    MCD_OPC_CheckPredicate, 77, 71, 1, 0, // Skip to: 2458
6644
/* 2131 */    MCD_OPC_Decode, 239, 15, 243, 2, // Opcode: LLD_R6
6645
/* 2136 */    MCD_OPC_FilterValue, 61, 61, 1, 0, // Skip to: 2458
6646
/* 2141 */    MCD_OPC_ExtractField, 6, 2,  // Inst{7-6} ...
6647
/* 2144 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2166
6648
/* 2149 */    MCD_OPC_CheckPredicate, 83, 48, 1, 0, // Skip to: 2458
6649
/* 2154 */    MCD_OPC_CheckField, 8, 13, 0, 41, 1, 0, // Skip to: 2458
6650
/* 2161 */    MCD_OPC_Decode, 184, 14, 186, 1, // Opcode: GINVI
6651
/* 2166 */    MCD_OPC_FilterValue, 2, 31, 1, 0, // Skip to: 2458
6652
/* 2171 */    MCD_OPC_CheckPredicate, 83, 26, 1, 0, // Skip to: 2458
6653
/* 2176 */    MCD_OPC_CheckField, 10, 11, 0, 19, 1, 0, // Skip to: 2458
6654
/* 2183 */    MCD_OPC_Decode, 187, 14, 244, 2, // Opcode: GINVT
6655
/* 2188 */    MCD_OPC_FilterValue, 50, 10, 0, 0, // Skip to: 2203
6656
/* 2193 */    MCD_OPC_CheckPredicate, 76, 4, 1, 0, // Skip to: 2458
6657
/* 2198 */    MCD_OPC_Decode, 161, 7, 245, 2, // Opcode: BC
6658
/* 2203 */    MCD_OPC_FilterValue, 53, 27, 0, 0, // Skip to: 2235
6659
/* 2208 */    MCD_OPC_CheckPredicate, 24, 12, 0, 0, // Skip to: 2225
6660
/* 2213 */    MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 2225
6661
/* 2220 */    MCD_OPC_Decode, 238, 7, 180, 1, // Opcode: BGTZC_MMR6
6662
/* 2225 */    MCD_OPC_CheckPredicate, 24, 228, 0, 0, // Skip to: 2458
6663
/* 2230 */    MCD_OPC_Decode, 163, 8, 180, 1, // Opcode: BLTZC_MMR6
6664
/* 2235 */    MCD_OPC_FilterValue, 54, 26, 0, 0, // Skip to: 2266
6665
/* 2240 */    MCD_OPC_CheckPredicate, 75, 11, 0, 0, // Skip to: 2256
6666
/* 2245 */    MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 2256
6667
/* 2252 */    MCD_OPC_Decode, 129, 15, 103, // Opcode: JIC
6668
/* 2256 */    MCD_OPC_CheckPredicate, 76, 197, 0, 0, // Skip to: 2458
6669
/* 2261 */    MCD_OPC_Decode, 201, 7, 246, 2, // Opcode: BEQZC
6670
/* 2266 */    MCD_OPC_FilterValue, 58, 10, 0, 0, // Skip to: 2281
6671
/* 2271 */    MCD_OPC_CheckPredicate, 75, 182, 0, 0, // Skip to: 2458
6672
/* 2276 */    MCD_OPC_Decode, 148, 7, 245, 2, // Opcode: BALC
6673
/* 2281 */    MCD_OPC_FilterValue, 59, 109, 0, 0, // Skip to: 2395
6674
/* 2286 */    MCD_OPC_ExtractField, 19, 2,  // Inst{20-19} ...
6675
/* 2289 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2304
6676
/* 2294 */    MCD_OPC_CheckPredicate, 75, 159, 0, 0, // Skip to: 2458
6677
/* 2299 */    MCD_OPC_Decode, 129, 6, 174, 1, // Opcode: ADDIUPC
6678
/* 2304 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2319
6679
/* 2309 */    MCD_OPC_CheckPredicate, 75, 144, 0, 0, // Skip to: 2458
6680
/* 2314 */    MCD_OPC_Decode, 158, 16, 174, 1, // Opcode: LWPC
6681
/* 2319 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2334
6682
/* 2324 */    MCD_OPC_CheckPredicate, 84, 129, 0, 0, // Skip to: 2458
6683
/* 2329 */    MCD_OPC_Decode, 169, 16, 174, 1, // Opcode: LWUPC
6684
/* 2334 */    MCD_OPC_FilterValue, 3, 119, 0, 0, // Skip to: 2458
6685
/* 2339 */    MCD_OPC_ExtractField, 18, 1,  // Inst{18} ...
6686
/* 2342 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2357
6687
/* 2347 */    MCD_OPC_CheckPredicate, 84, 106, 0, 0, // Skip to: 2458
6688
/* 2352 */    MCD_OPC_Decode, 194, 15, 247, 2, // Opcode: LDPC
6689
/* 2357 */    MCD_OPC_FilterValue, 1, 96, 0, 0, // Skip to: 2458
6690
/* 2362 */    MCD_OPC_ExtractField, 16, 2,  // Inst{17-16} ...
6691
/* 2365 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2380
6692
/* 2370 */    MCD_OPC_CheckPredicate, 75, 83, 0, 0, // Skip to: 2458
6693
/* 2375 */    MCD_OPC_Decode, 245, 6, 175, 1, // Opcode: AUIPC
6694
/* 2380 */    MCD_OPC_FilterValue, 3, 73, 0, 0, // Skip to: 2458
6695
/* 2385 */    MCD_OPC_CheckPredicate, 75, 68, 0, 0, // Skip to: 2458
6696
/* 2390 */    MCD_OPC_Decode, 213, 6, 175, 1, // Opcode: ALUIPC
6697
/* 2395 */    MCD_OPC_FilterValue, 61, 27, 0, 0, // Skip to: 2427
6698
/* 2400 */    MCD_OPC_CheckPredicate, 24, 12, 0, 0, // Skip to: 2417
6699
/* 2405 */    MCD_OPC_CheckField, 16, 5, 0, 5, 0, 0, // Skip to: 2417
6700
/* 2412 */    MCD_OPC_Decode, 140, 8, 182, 1, // Opcode: BLEZC_MMR6
6701
/* 2417 */    MCD_OPC_CheckPredicate, 24, 36, 0, 0, // Skip to: 2458
6702
/* 2422 */    MCD_OPC_Decode, 229, 7, 182, 1, // Opcode: BGEZC_MMR6
6703
/* 2427 */    MCD_OPC_FilterValue, 62, 26, 0, 0, // Skip to: 2458
6704
/* 2432 */    MCD_OPC_CheckPredicate, 75, 11, 0, 0, // Skip to: 2448
6705
/* 2437 */    MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 2448
6706
/* 2444 */    MCD_OPC_Decode, 254, 14, 103, // Opcode: JIALC
6707
/* 2448 */    MCD_OPC_CheckPredicate, 76, 5, 0, 0, // Skip to: 2458
6708
/* 2453 */    MCD_OPC_Decode, 191, 8, 246, 2, // Opcode: BNEZC
6709
/* 2458 */    MCD_OPC_Fail,
6710
  0
6711
};
6712
6713
static const uint8_t DecoderTableMips32r6_64r6_Ambiguous32[] = {
6714
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
6715
/* 3 */       MCD_OPC_FilterValue, 6, 27, 0, 0, // Skip to: 35
6716
/* 8 */       MCD_OPC_CheckPredicate, 76, 12, 0, 0, // Skip to: 25
6717
/* 13 */      MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 25
6718
/* 20 */      MCD_OPC_Decode, 136, 8, 223, 2, // Opcode: BLEZALC
6719
/* 25 */      MCD_OPC_CheckPredicate, 76, 165, 0, 0, // Skip to: 195
6720
/* 30 */      MCD_OPC_Decode, 215, 7, 223, 2, // Opcode: BGEUC
6721
/* 35 */      MCD_OPC_FilterValue, 7, 27, 0, 0, // Skip to: 67
6722
/* 40 */      MCD_OPC_CheckPredicate, 76, 12, 0, 0, // Skip to: 57
6723
/* 45 */      MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 57
6724
/* 52 */      MCD_OPC_Decode, 234, 7, 224, 2, // Opcode: BGTZALC
6725
/* 57 */      MCD_OPC_CheckPredicate, 76, 133, 0, 0, // Skip to: 195
6726
/* 62 */      MCD_OPC_Decode, 149, 8, 224, 2, // Opcode: BLTUC
6727
/* 67 */      MCD_OPC_FilterValue, 8, 27, 0, 0, // Skip to: 99
6728
/* 72 */      MCD_OPC_CheckPredicate, 76, 12, 0, 0, // Skip to: 89
6729
/* 77 */      MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 89
6730
/* 84 */      MCD_OPC_Decode, 199, 7, 237, 2, // Opcode: BEQZALC
6731
/* 89 */      MCD_OPC_CheckPredicate, 76, 101, 0, 0, // Skip to: 195
6732
/* 94 */      MCD_OPC_Decode, 206, 8, 225, 2, // Opcode: BOVC
6733
/* 99 */      MCD_OPC_FilterValue, 22, 27, 0, 0, // Skip to: 131
6734
/* 104 */     MCD_OPC_CheckPredicate, 76, 12, 0, 0, // Skip to: 121
6735
/* 109 */     MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 121
6736
/* 116 */     MCD_OPC_Decode, 138, 8, 235, 2, // Opcode: BLEZC
6737
/* 121 */     MCD_OPC_CheckPredicate, 76, 69, 0, 0, // Skip to: 195
6738
/* 126 */     MCD_OPC_Decode, 209, 7, 235, 2, // Opcode: BGEC
6739
/* 131 */     MCD_OPC_FilterValue, 23, 27, 0, 0, // Skip to: 163
6740
/* 136 */     MCD_OPC_CheckPredicate, 76, 12, 0, 0, // Skip to: 153
6741
/* 141 */     MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 153
6742
/* 148 */     MCD_OPC_Decode, 236, 7, 236, 2, // Opcode: BGTZC
6743
/* 153 */     MCD_OPC_CheckPredicate, 76, 37, 0, 0, // Skip to: 195
6744
/* 158 */     MCD_OPC_Decode, 143, 8, 236, 2, // Opcode: BLTC
6745
/* 163 */     MCD_OPC_FilterValue, 24, 27, 0, 0, // Skip to: 195
6746
/* 168 */     MCD_OPC_CheckPredicate, 76, 12, 0, 0, // Skip to: 185
6747
/* 173 */     MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 185
6748
/* 180 */     MCD_OPC_Decode, 189, 8, 237, 2, // Opcode: BNEZALC
6749
/* 185 */     MCD_OPC_CheckPredicate, 76, 5, 0, 0, // Skip to: 195
6750
/* 190 */     MCD_OPC_Decode, 199, 8, 237, 2, // Opcode: BNVC
6751
/* 195 */     MCD_OPC_Fail,
6752
  0
6753
};
6754
6755
static const uint8_t DecoderTableMips32r6_64r6_BranchZero32[] = {
6756
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
6757
/* 3 */       MCD_OPC_FilterValue, 22, 10, 0, 0, // Skip to: 18
6758
/* 8 */       MCD_OPC_CheckPredicate, 85, 20, 0, 0, // Skip to: 33
6759
/* 13 */      MCD_OPC_Decode, 228, 7, 235, 2, // Opcode: BGEZC64
6760
/* 18 */      MCD_OPC_FilterValue, 23, 10, 0, 0, // Skip to: 33
6761
/* 23 */      MCD_OPC_CheckPredicate, 85, 5, 0, 0, // Skip to: 33
6762
/* 28 */      MCD_OPC_Decode, 162, 8, 236, 2, // Opcode: BLTZC64
6763
/* 33 */      MCD_OPC_Fail,
6764
  0
6765
};
6766
6767
static const uint8_t DecoderTableMips32r6_64r6_GP6432[] = {
6768
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
6769
/* 3 */       MCD_OPC_FilterValue, 0, 53, 0, 0, // Skip to: 61
6770
/* 8 */       MCD_OPC_ExtractField, 0, 11,  // Inst{10-0} ...
6771
/* 11 */      MCD_OPC_FilterValue, 53, 9, 0, 0, // Skip to: 25
6772
/* 16 */      MCD_OPC_CheckPredicate, 86, 226, 0, 0, // Skip to: 247
6773
/* 21 */      MCD_OPC_Decode, 251, 20, 23, // Opcode: SELEQZ64
6774
/* 25 */      MCD_OPC_FilterValue, 55, 9, 0, 0, // Skip to: 39
6775
/* 30 */      MCD_OPC_CheckPredicate, 86, 212, 0, 0, // Skip to: 247
6776
/* 35 */      MCD_OPC_Decode, 130, 21, 23, // Opcode: SELNEZ64
6777
/* 39 */      MCD_OPC_FilterValue, 137, 8, 202, 0, 0, // Skip to: 247
6778
/* 45 */      MCD_OPC_CheckPredicate, 75, 197, 0, 0, // Skip to: 247
6779
/* 50 */      MCD_OPC_CheckField, 11, 10, 0, 190, 0, 0, // Skip to: 247
6780
/* 57 */      MCD_OPC_Decode, 142, 15, 24, // Opcode: JR_HB64_R6
6781
/* 61 */      MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 76
6782
/* 66 */      MCD_OPC_CheckPredicate, 85, 176, 0, 0, // Skip to: 247
6783
/* 71 */      MCD_OPC_Decode, 216, 7, 223, 2, // Opcode: BGEUC64
6784
/* 76 */      MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 91
6785
/* 81 */      MCD_OPC_CheckPredicate, 85, 161, 0, 0, // Skip to: 247
6786
/* 86 */      MCD_OPC_Decode, 150, 8, 224, 2, // Opcode: BLTUC64
6787
/* 91 */      MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 106
6788
/* 96 */      MCD_OPC_CheckPredicate, 85, 146, 0, 0, // Skip to: 247
6789
/* 101 */     MCD_OPC_Decode, 192, 7, 225, 2, // Opcode: BEQC64
6790
/* 106 */     MCD_OPC_FilterValue, 22, 27, 0, 0, // Skip to: 138
6791
/* 111 */     MCD_OPC_CheckPredicate, 85, 12, 0, 0, // Skip to: 128
6792
/* 116 */     MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 128
6793
/* 123 */     MCD_OPC_Decode, 139, 8, 235, 2, // Opcode: BLEZC64
6794
/* 128 */     MCD_OPC_CheckPredicate, 85, 114, 0, 0, // Skip to: 247
6795
/* 133 */     MCD_OPC_Decode, 210, 7, 235, 2, // Opcode: BGEC64
6796
/* 138 */     MCD_OPC_FilterValue, 23, 27, 0, 0, // Skip to: 170
6797
/* 143 */     MCD_OPC_CheckPredicate, 85, 12, 0, 0, // Skip to: 160
6798
/* 148 */     MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 160
6799
/* 155 */     MCD_OPC_Decode, 237, 7, 236, 2, // Opcode: BGTZC64
6800
/* 160 */     MCD_OPC_CheckPredicate, 85, 82, 0, 0, // Skip to: 247
6801
/* 165 */     MCD_OPC_Decode, 144, 8, 236, 2, // Opcode: BLTC64
6802
/* 170 */     MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 185
6803
/* 175 */     MCD_OPC_CheckPredicate, 85, 67, 0, 0, // Skip to: 247
6804
/* 180 */     MCD_OPC_Decode, 174, 8, 237, 2, // Opcode: BNEC64
6805
/* 185 */     MCD_OPC_FilterValue, 54, 26, 0, 0, // Skip to: 216
6806
/* 190 */     MCD_OPC_CheckPredicate, 85, 11, 0, 0, // Skip to: 206
6807
/* 195 */     MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 206
6808
/* 202 */     MCD_OPC_Decode, 130, 15, 22, // Opcode: JIC64
6809
/* 206 */     MCD_OPC_CheckPredicate, 85, 36, 0, 0, // Skip to: 247
6810
/* 211 */     MCD_OPC_Decode, 204, 7, 248, 2, // Opcode: BEQZC64
6811
/* 216 */     MCD_OPC_FilterValue, 62, 26, 0, 0, // Skip to: 247
6812
/* 221 */     MCD_OPC_CheckPredicate, 85, 11, 0, 0, // Skip to: 237
6813
/* 226 */     MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 237
6814
/* 233 */     MCD_OPC_Decode, 255, 14, 22, // Opcode: JIALC64
6815
/* 237 */     MCD_OPC_CheckPredicate, 85, 5, 0, 0, // Skip to: 247
6816
/* 242 */     MCD_OPC_Decode, 194, 8, 248, 2, // Opcode: BNEZC64
6817
/* 247 */     MCD_OPC_Fail,
6818
  0
6819
};
6820
6821
static const uint8_t DecoderTableMips32r6_64r6_PTR6432[] = {
6822
/* 0 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6823
/* 3 */       MCD_OPC_FilterValue, 38, 17, 0, 0, // Skip to: 25
6824
/* 8 */       MCD_OPC_CheckPredicate, 87, 34, 0, 0, // Skip to: 47
6825
/* 13 */      MCD_OPC_CheckField, 26, 6, 31, 27, 0, 0, // Skip to: 47
6826
/* 20 */      MCD_OPC_Decode, 208, 20, 243, 2, // Opcode: SC64_R6
6827
/* 25 */      MCD_OPC_FilterValue, 54, 17, 0, 0, // Skip to: 47
6828
/* 30 */      MCD_OPC_CheckPredicate, 87, 12, 0, 0, // Skip to: 47
6829
/* 35 */      MCD_OPC_CheckField, 26, 6, 31, 5, 0, 0, // Skip to: 47
6830
/* 42 */      MCD_OPC_Decode, 237, 15, 243, 2, // Opcode: LL64_R6
6831
/* 47 */      MCD_OPC_Fail,
6832
  0
6833
};
6834
6835
static const uint8_t DecoderTableMips6432[] = {
6836
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
6837
/* 3 */       MCD_OPC_FilterValue, 0, 236, 1, 0, // Skip to: 500
6838
/* 8 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
6839
/* 11 */      MCD_OPC_FilterValue, 8, 16, 0, 0, // Skip to: 32
6840
/* 16 */      MCD_OPC_CheckPredicate, 88, 244, 4, 0, // Skip to: 1289
6841
/* 21 */      MCD_OPC_CheckField, 6, 15, 16, 237, 4, 0, // Skip to: 1289
6842
/* 28 */      MCD_OPC_Decode, 141, 15, 24, // Opcode: JR_HB64
6843
/* 32 */      MCD_OPC_FilterValue, 9, 45, 0, 0, // Skip to: 82
6844
/* 37 */      MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6845
/* 40 */      MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 61
6846
/* 45 */      MCD_OPC_CheckPredicate, 89, 215, 4, 0, // Skip to: 1289
6847
/* 50 */      MCD_OPC_CheckField, 16, 5, 0, 208, 4, 0, // Skip to: 1289
6848
/* 57 */      MCD_OPC_Decode, 238, 14, 26, // Opcode: JALR64
6849
/* 61 */      MCD_OPC_FilterValue, 16, 199, 4, 0, // Skip to: 1289
6850
/* 66 */      MCD_OPC_CheckPredicate, 90, 194, 4, 0, // Skip to: 1289
6851
/* 71 */      MCD_OPC_CheckField, 16, 5, 0, 187, 4, 0, // Skip to: 1289
6852
/* 78 */      MCD_OPC_Decode, 248, 14, 26, // Opcode: JALR_HB64
6853
/* 82 */      MCD_OPC_FilterValue, 20, 17, 0, 0, // Skip to: 104
6854
/* 87 */      MCD_OPC_CheckPredicate, 91, 173, 4, 0, // Skip to: 1289
6855
/* 92 */      MCD_OPC_CheckField, 6, 5, 0, 166, 4, 0, // Skip to: 1289
6856
/* 99 */      MCD_OPC_Decode, 190, 12, 249, 2, // Opcode: DSLLV
6857
/* 104 */     MCD_OPC_FilterValue, 22, 33, 0, 0, // Skip to: 142
6858
/* 109 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
6859
/* 112 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 127
6860
/* 117 */     MCD_OPC_CheckPredicate, 91, 143, 4, 0, // Skip to: 1289
6861
/* 122 */     MCD_OPC_Decode, 196, 12, 249, 2, // Opcode: DSRLV
6862
/* 127 */     MCD_OPC_FilterValue, 1, 133, 4, 0, // Skip to: 1289
6863
/* 132 */     MCD_OPC_CheckPredicate, 90, 128, 4, 0, // Skip to: 1289
6864
/* 137 */     MCD_OPC_Decode, 183, 12, 249, 2, // Opcode: DROTRV
6865
/* 142 */     MCD_OPC_FilterValue, 23, 17, 0, 0, // Skip to: 164
6866
/* 147 */     MCD_OPC_CheckPredicate, 91, 113, 4, 0, // Skip to: 1289
6867
/* 152 */     MCD_OPC_CheckField, 6, 5, 0, 106, 4, 0, // Skip to: 1289
6868
/* 159 */     MCD_OPC_Decode, 193, 12, 249, 2, // Opcode: DSRAV
6869
/* 164 */     MCD_OPC_FilterValue, 28, 17, 0, 0, // Skip to: 186
6870
/* 169 */     MCD_OPC_CheckPredicate, 92, 91, 4, 0, // Skip to: 1289
6871
/* 174 */     MCD_OPC_CheckField, 6, 10, 0, 84, 4, 0, // Skip to: 1289
6872
/* 181 */     MCD_OPC_Decode, 254, 11, 250, 2, // Opcode: DMULT
6873
/* 186 */     MCD_OPC_FilterValue, 29, 17, 0, 0, // Skip to: 208
6874
/* 191 */     MCD_OPC_CheckPredicate, 92, 69, 4, 0, // Skip to: 1289
6875
/* 196 */     MCD_OPC_CheckField, 6, 10, 0, 62, 4, 0, // Skip to: 1289
6876
/* 203 */     MCD_OPC_Decode, 255, 11, 250, 2, // Opcode: DMULTu
6877
/* 208 */     MCD_OPC_FilterValue, 30, 17, 0, 0, // Skip to: 230
6878
/* 213 */     MCD_OPC_CheckPredicate, 92, 47, 4, 0, // Skip to: 1289
6879
/* 218 */     MCD_OPC_CheckField, 6, 10, 0, 40, 4, 0, // Skip to: 1289
6880
/* 225 */     MCD_OPC_Decode, 185, 12, 250, 2, // Opcode: DSDIV
6881
/* 230 */     MCD_OPC_FilterValue, 31, 17, 0, 0, // Skip to: 252
6882
/* 235 */     MCD_OPC_CheckPredicate, 92, 25, 4, 0, // Skip to: 1289
6883
/* 240 */     MCD_OPC_CheckField, 6, 10, 0, 18, 4, 0, // Skip to: 1289
6884
/* 247 */     MCD_OPC_Decode, 199, 12, 250, 2, // Opcode: DUDIV
6885
/* 252 */     MCD_OPC_FilterValue, 44, 16, 0, 0, // Skip to: 273
6886
/* 257 */     MCD_OPC_CheckPredicate, 91, 3, 4, 0, // Skip to: 1289
6887
/* 262 */     MCD_OPC_CheckField, 6, 5, 0, 252, 3, 0, // Skip to: 1289
6888
/* 269 */     MCD_OPC_Decode, 191, 11, 23, // Opcode: DADD
6889
/* 273 */     MCD_OPC_FilterValue, 45, 16, 0, 0, // Skip to: 294
6890
/* 278 */     MCD_OPC_CheckPredicate, 91, 238, 3, 0, // Skip to: 1289
6891
/* 283 */     MCD_OPC_CheckField, 6, 5, 0, 231, 3, 0, // Skip to: 1289
6892
/* 290 */     MCD_OPC_Decode, 194, 11, 23, // Opcode: DADDu
6893
/* 294 */     MCD_OPC_FilterValue, 46, 16, 0, 0, // Skip to: 315
6894
/* 299 */     MCD_OPC_CheckPredicate, 91, 217, 3, 0, // Skip to: 1289
6895
/* 304 */     MCD_OPC_CheckField, 6, 5, 0, 210, 3, 0, // Skip to: 1289
6896
/* 311 */     MCD_OPC_Decode, 197, 12, 23, // Opcode: DSUB
6897
/* 315 */     MCD_OPC_FilterValue, 47, 16, 0, 0, // Skip to: 336
6898
/* 320 */     MCD_OPC_CheckPredicate, 91, 196, 3, 0, // Skip to: 1289
6899
/* 325 */     MCD_OPC_CheckField, 6, 5, 0, 189, 3, 0, // Skip to: 1289
6900
/* 332 */     MCD_OPC_Decode, 198, 12, 23, // Opcode: DSUBu
6901
/* 336 */     MCD_OPC_FilterValue, 56, 17, 0, 0, // Skip to: 358
6902
/* 341 */     MCD_OPC_CheckPredicate, 91, 175, 3, 0, // Skip to: 1289
6903
/* 346 */     MCD_OPC_CheckField, 21, 5, 0, 168, 3, 0, // Skip to: 1289
6904
/* 353 */     MCD_OPC_Decode, 187, 12, 251, 2, // Opcode: DSLL
6905
/* 358 */     MCD_OPC_FilterValue, 58, 33, 0, 0, // Skip to: 396
6906
/* 363 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
6907
/* 366 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 381
6908
/* 371 */     MCD_OPC_CheckPredicate, 91, 145, 3, 0, // Skip to: 1289
6909
/* 376 */     MCD_OPC_Decode, 194, 12, 251, 2, // Opcode: DSRL
6910
/* 381 */     MCD_OPC_FilterValue, 1, 135, 3, 0, // Skip to: 1289
6911
/* 386 */     MCD_OPC_CheckPredicate, 90, 130, 3, 0, // Skip to: 1289
6912
/* 391 */     MCD_OPC_Decode, 181, 12, 251, 2, // Opcode: DROTR
6913
/* 396 */     MCD_OPC_FilterValue, 59, 17, 0, 0, // Skip to: 418
6914
/* 401 */     MCD_OPC_CheckPredicate, 91, 115, 3, 0, // Skip to: 1289
6915
/* 406 */     MCD_OPC_CheckField, 21, 5, 0, 108, 3, 0, // Skip to: 1289
6916
/* 413 */     MCD_OPC_Decode, 191, 12, 251, 2, // Opcode: DSRA
6917
/* 418 */     MCD_OPC_FilterValue, 60, 17, 0, 0, // Skip to: 440
6918
/* 423 */     MCD_OPC_CheckPredicate, 91, 93, 3, 0, // Skip to: 1289
6919
/* 428 */     MCD_OPC_CheckField, 21, 5, 0, 86, 3, 0, // Skip to: 1289
6920
/* 435 */     MCD_OPC_Decode, 188, 12, 251, 2, // Opcode: DSLL32
6921
/* 440 */     MCD_OPC_FilterValue, 62, 33, 0, 0, // Skip to: 478
6922
/* 445 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
6923
/* 448 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 463
6924
/* 453 */     MCD_OPC_CheckPredicate, 91, 63, 3, 0, // Skip to: 1289
6925
/* 458 */     MCD_OPC_Decode, 195, 12, 251, 2, // Opcode: DSRL32
6926
/* 463 */     MCD_OPC_FilterValue, 1, 53, 3, 0, // Skip to: 1289
6927
/* 468 */     MCD_OPC_CheckPredicate, 90, 48, 3, 0, // Skip to: 1289
6928
/* 473 */     MCD_OPC_Decode, 182, 12, 251, 2, // Opcode: DROTR32
6929
/* 478 */     MCD_OPC_FilterValue, 63, 38, 3, 0, // Skip to: 1289
6930
/* 483 */     MCD_OPC_CheckPredicate, 91, 33, 3, 0, // Skip to: 1289
6931
/* 488 */     MCD_OPC_CheckField, 21, 5, 0, 26, 3, 0, // Skip to: 1289
6932
/* 495 */     MCD_OPC_Decode, 192, 12, 251, 2, // Opcode: DSRA32
6933
/* 500 */     MCD_OPC_FilterValue, 16, 85, 0, 0, // Skip to: 590
6934
/* 505 */     MCD_OPC_ExtractField, 3, 8,  // Inst{10-3} ...
6935
/* 508 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 546
6936
/* 513 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
6937
/* 516 */     MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 531
6938
/* 521 */     MCD_OPC_CheckPredicate, 93, 251, 2, 0, // Skip to: 1289
6939
/* 526 */     MCD_OPC_Decode, 237, 11, 252, 2, // Opcode: DMFC0
6940
/* 531 */     MCD_OPC_FilterValue, 5, 241, 2, 0, // Skip to: 1289
6941
/* 536 */     MCD_OPC_CheckPredicate, 93, 236, 2, 0, // Skip to: 1289
6942
/* 541 */     MCD_OPC_Decode, 245, 11, 253, 2, // Opcode: DMTC0
6943
/* 546 */     MCD_OPC_FilterValue, 32, 17, 0, 0, // Skip to: 568
6944
/* 551 */     MCD_OPC_CheckPredicate, 94, 221, 2, 0, // Skip to: 1289
6945
/* 556 */     MCD_OPC_CheckField, 21, 5, 3, 214, 2, 0, // Skip to: 1289
6946
/* 563 */     MCD_OPC_Decode, 241, 11, 252, 2, // Opcode: DMFGC0
6947
/* 568 */     MCD_OPC_FilterValue, 96, 204, 2, 0, // Skip to: 1289
6948
/* 573 */     MCD_OPC_CheckPredicate, 94, 199, 2, 0, // Skip to: 1289
6949
/* 578 */     MCD_OPC_CheckField, 21, 5, 3, 192, 2, 0, // Skip to: 1289
6950
/* 585 */     MCD_OPC_Decode, 249, 11, 253, 2, // Opcode: DMTGC0
6951
/* 590 */     MCD_OPC_FilterValue, 18, 47, 0, 0, // Skip to: 642
6952
/* 595 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
6953
/* 598 */     MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 620
6954
/* 603 */     MCD_OPC_CheckPredicate, 93, 169, 2, 0, // Skip to: 1289
6955
/* 608 */     MCD_OPC_CheckField, 3, 8, 0, 162, 2, 0, // Skip to: 1289
6956
/* 615 */     MCD_OPC_Decode, 239, 11, 254, 2, // Opcode: DMFC2
6957
/* 620 */     MCD_OPC_FilterValue, 5, 152, 2, 0, // Skip to: 1289
6958
/* 625 */     MCD_OPC_CheckPredicate, 93, 147, 2, 0, // Skip to: 1289
6959
/* 630 */     MCD_OPC_CheckField, 3, 8, 0, 140, 2, 0, // Skip to: 1289
6960
/* 637 */     MCD_OPC_Decode, 247, 11, 255, 2, // Opcode: DMTC2
6961
/* 642 */     MCD_OPC_FilterValue, 21, 3, 1, 0, // Skip to: 906
6962
/* 647 */     MCD_OPC_ExtractField, 0, 13,  // Inst{12-0} ...
6963
/* 650 */     MCD_OPC_FilterValue, 188, 8, 10, 0, 0, // Skip to: 666
6964
/* 656 */     MCD_OPC_CheckPredicate, 15, 116, 2, 0, // Skip to: 1289
6965
/* 661 */     MCD_OPC_Decode, 229, 10, 128, 3, // Opcode: C_F_D64_MM
6966
/* 666 */     MCD_OPC_FilterValue, 252, 8, 10, 0, 0, // Skip to: 682
6967
/* 672 */     MCD_OPC_CheckPredicate, 15, 100, 2, 0, // Skip to: 1289
6968
/* 677 */     MCD_OPC_Decode, 185, 11, 128, 3, // Opcode: C_UN_D64_MM
6969
/* 682 */     MCD_OPC_FilterValue, 188, 9, 10, 0, 0, // Skip to: 698
6970
/* 688 */     MCD_OPC_CheckPredicate, 15, 84, 2, 0, // Skip to: 1289
6971
/* 693 */     MCD_OPC_Decode, 223, 10, 128, 3, // Opcode: C_EQ_D64_MM
6972
/* 698 */     MCD_OPC_FilterValue, 252, 9, 10, 0, 0, // Skip to: 714
6973
/* 704 */     MCD_OPC_CheckPredicate, 15, 68, 2, 0, // Skip to: 1289
6974
/* 709 */     MCD_OPC_Decode, 167, 11, 128, 3, // Opcode: C_UEQ_D64_MM
6975
/* 714 */     MCD_OPC_FilterValue, 188, 10, 10, 0, 0, // Skip to: 730
6976
/* 720 */     MCD_OPC_CheckPredicate, 15, 52, 2, 0, // Skip to: 1289
6977
/* 725 */     MCD_OPC_Decode, 149, 11, 128, 3, // Opcode: C_OLT_D64_MM
6978
/* 730 */     MCD_OPC_FilterValue, 252, 10, 10, 0, 0, // Skip to: 746
6979
/* 736 */     MCD_OPC_CheckPredicate, 15, 36, 2, 0, // Skip to: 1289
6980
/* 741 */     MCD_OPC_Decode, 179, 11, 128, 3, // Opcode: C_ULT_D64_MM
6981
/* 746 */     MCD_OPC_FilterValue, 188, 11, 10, 0, 0, // Skip to: 762
6982
/* 752 */     MCD_OPC_CheckPredicate, 15, 20, 2, 0, // Skip to: 1289
6983
/* 757 */     MCD_OPC_Decode, 143, 11, 128, 3, // Opcode: C_OLE_D64_MM
6984
/* 762 */     MCD_OPC_FilterValue, 252, 11, 10, 0, 0, // Skip to: 778
6985
/* 768 */     MCD_OPC_CheckPredicate, 15, 4, 2, 0, // Skip to: 1289
6986
/* 773 */     MCD_OPC_Decode, 173, 11, 128, 3, // Opcode: C_ULE_D64_MM
6987
/* 778 */     MCD_OPC_FilterValue, 188, 12, 10, 0, 0, // Skip to: 794
6988
/* 784 */     MCD_OPC_CheckPredicate, 15, 244, 1, 0, // Skip to: 1289
6989
/* 789 */     MCD_OPC_Decode, 161, 11, 128, 3, // Opcode: C_SF_D64_MM
6990
/* 794 */     MCD_OPC_FilterValue, 252, 12, 10, 0, 0, // Skip to: 810
6991
/* 800 */     MCD_OPC_CheckPredicate, 15, 228, 1, 0, // Skip to: 1289
6992
/* 805 */     MCD_OPC_Decode, 253, 10, 128, 3, // Opcode: C_NGLE_D64_MM
6993
/* 810 */     MCD_OPC_FilterValue, 188, 13, 10, 0, 0, // Skip to: 826
6994
/* 816 */     MCD_OPC_CheckPredicate, 15, 212, 1, 0, // Skip to: 1289
6995
/* 821 */     MCD_OPC_Decode, 155, 11, 128, 3, // Opcode: C_SEQ_D64_MM
6996
/* 826 */     MCD_OPC_FilterValue, 252, 13, 10, 0, 0, // Skip to: 842
6997
/* 832 */     MCD_OPC_CheckPredicate, 15, 196, 1, 0, // Skip to: 1289
6998
/* 837 */     MCD_OPC_Decode, 131, 11, 128, 3, // Opcode: C_NGL_D64_MM
6999
/* 842 */     MCD_OPC_FilterValue, 188, 14, 10, 0, 0, // Skip to: 858
7000
/* 848 */     MCD_OPC_CheckPredicate, 15, 180, 1, 0, // Skip to: 1289
7001
/* 853 */     MCD_OPC_Decode, 241, 10, 128, 3, // Opcode: C_LT_D64_MM
7002
/* 858 */     MCD_OPC_FilterValue, 252, 14, 10, 0, 0, // Skip to: 874
7003
/* 864 */     MCD_OPC_CheckPredicate, 15, 164, 1, 0, // Skip to: 1289
7004
/* 869 */     MCD_OPC_Decode, 247, 10, 128, 3, // Opcode: C_NGE_D64_MM
7005
/* 874 */     MCD_OPC_FilterValue, 188, 15, 10, 0, 0, // Skip to: 890
7006
/* 880 */     MCD_OPC_CheckPredicate, 15, 148, 1, 0, // Skip to: 1289
7007
/* 885 */     MCD_OPC_Decode, 235, 10, 128, 3, // Opcode: C_LE_D64_MM
7008
/* 890 */     MCD_OPC_FilterValue, 252, 15, 137, 1, 0, // Skip to: 1289
7009
/* 896 */     MCD_OPC_CheckPredicate, 15, 132, 1, 0, // Skip to: 1289
7010
/* 901 */     MCD_OPC_Decode, 137, 11, 128, 3, // Opcode: C_NGT_D64_MM
7011
/* 906 */     MCD_OPC_FilterValue, 24, 10, 0, 0, // Skip to: 921
7012
/* 911 */     MCD_OPC_CheckPredicate, 95, 117, 1, 0, // Skip to: 1289
7013
/* 916 */     MCD_OPC_Decode, 192, 11, 129, 3, // Opcode: DADDi
7014
/* 921 */     MCD_OPC_FilterValue, 25, 10, 0, 0, // Skip to: 936
7015
/* 926 */     MCD_OPC_CheckPredicate, 91, 102, 1, 0, // Skip to: 1289
7016
/* 931 */     MCD_OPC_Decode, 193, 11, 129, 3, // Opcode: DADDiu
7017
/* 936 */     MCD_OPC_FilterValue, 26, 10, 0, 0, // Skip to: 951
7018
/* 941 */     MCD_OPC_CheckPredicate, 95, 87, 1, 0, // Skip to: 1289
7019
/* 946 */     MCD_OPC_Decode, 193, 15, 141, 1, // Opcode: LDL
7020
/* 951 */     MCD_OPC_FilterValue, 27, 10, 0, 0, // Skip to: 966
7021
/* 956 */     MCD_OPC_CheckPredicate, 95, 72, 1, 0, // Skip to: 1289
7022
/* 961 */     MCD_OPC_Decode, 195, 15, 141, 1, // Opcode: LDR
7023
/* 966 */     MCD_OPC_FilterValue, 28, 33, 0, 0, // Skip to: 1004
7024
/* 971 */     MCD_OPC_ExtractField, 0, 11,  // Inst{10-0} ...
7025
/* 974 */     MCD_OPC_FilterValue, 36, 10, 0, 0, // Skip to: 989
7026
/* 979 */     MCD_OPC_CheckPredicate, 96, 49, 1, 0, // Skip to: 1289
7027
/* 984 */     MCD_OPC_Decode, 202, 11, 130, 3, // Opcode: DCLZ
7028
/* 989 */     MCD_OPC_FilterValue, 37, 39, 1, 0, // Skip to: 1289
7029
/* 994 */     MCD_OPC_CheckPredicate, 96, 34, 1, 0, // Skip to: 1289
7030
/* 999 */     MCD_OPC_Decode, 200, 11, 130, 3, // Opcode: DCLO
7031
/* 1004 */    MCD_OPC_FilterValue, 31, 145, 0, 0, // Skip to: 1154
7032
/* 1009 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
7033
/* 1012 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 1027
7034
/* 1017 */    MCD_OPC_CheckPredicate, 90, 11, 1, 0, // Skip to: 1289
7035
/* 1022 */    MCD_OPC_Decode, 212, 11, 131, 3, // Opcode: DEXTM
7036
/* 1027 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1042
7037
/* 1032 */    MCD_OPC_CheckPredicate, 90, 252, 0, 0, // Skip to: 1289
7038
/* 1037 */    MCD_OPC_Decode, 213, 11, 131, 3, // Opcode: DEXTU
7039
/* 1042 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1057
7040
/* 1047 */    MCD_OPC_CheckPredicate, 90, 237, 0, 0, // Skip to: 1289
7041
/* 1052 */    MCD_OPC_Decode, 210, 11, 131, 3, // Opcode: DEXT
7042
/* 1057 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 1072
7043
/* 1062 */    MCD_OPC_CheckPredicate, 90, 222, 0, 0, // Skip to: 1289
7044
/* 1067 */    MCD_OPC_Decode, 216, 11, 132, 3, // Opcode: DINSM
7045
/* 1072 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 1087
7046
/* 1077 */    MCD_OPC_CheckPredicate, 90, 207, 0, 0, // Skip to: 1289
7047
/* 1082 */    MCD_OPC_Decode, 217, 11, 132, 3, // Opcode: DINSU
7048
/* 1087 */    MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 1102
7049
/* 1092 */    MCD_OPC_CheckPredicate, 90, 192, 0, 0, // Skip to: 1289
7050
/* 1097 */    MCD_OPC_Decode, 215, 11, 132, 3, // Opcode: DINS
7051
/* 1102 */    MCD_OPC_FilterValue, 36, 182, 0, 0, // Skip to: 1289
7052
/* 1107 */    MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
7053
/* 1110 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 1132
7054
/* 1115 */    MCD_OPC_CheckPredicate, 90, 169, 0, 0, // Skip to: 1289
7055
/* 1120 */    MCD_OPC_CheckField, 21, 5, 0, 162, 0, 0, // Skip to: 1289
7056
/* 1127 */    MCD_OPC_Decode, 184, 12, 241, 2, // Opcode: DSBH
7057
/* 1132 */    MCD_OPC_FilterValue, 5, 152, 0, 0, // Skip to: 1289
7058
/* 1137 */    MCD_OPC_CheckPredicate, 90, 147, 0, 0, // Skip to: 1289
7059
/* 1142 */    MCD_OPC_CheckField, 21, 5, 0, 140, 0, 0, // Skip to: 1289
7060
/* 1149 */    MCD_OPC_Decode, 186, 12, 241, 2, // Opcode: DSHD
7061
/* 1154 */    MCD_OPC_FilterValue, 39, 10, 0, 0, // Skip to: 1169
7062
/* 1159 */    MCD_OPC_CheckPredicate, 91, 125, 0, 0, // Skip to: 1289
7063
/* 1164 */    MCD_OPC_Decode, 183, 16, 141, 1, // Opcode: LWu
7064
/* 1169 */    MCD_OPC_FilterValue, 44, 10, 0, 0, // Skip to: 1184
7065
/* 1174 */    MCD_OPC_CheckPredicate, 95, 110, 0, 0, // Skip to: 1289
7066
/* 1179 */    MCD_OPC_Decode, 238, 20, 141, 1, // Opcode: SDL
7067
/* 1184 */    MCD_OPC_FilterValue, 45, 10, 0, 0, // Skip to: 1199
7068
/* 1189 */    MCD_OPC_CheckPredicate, 95, 95, 0, 0, // Skip to: 1289
7069
/* 1194 */    MCD_OPC_Decode, 239, 20, 141, 1, // Opcode: SDR
7070
/* 1199 */    MCD_OPC_FilterValue, 46, 10, 0, 0, // Skip to: 1214
7071
/* 1204 */    MCD_OPC_CheckPredicate, 20, 80, 0, 0, // Skip to: 1289
7072
/* 1209 */    MCD_OPC_Decode, 231, 20, 139, 1, // Opcode: SDC1_MM_D64
7073
/* 1214 */    MCD_OPC_FilterValue, 47, 10, 0, 0, // Skip to: 1229
7074
/* 1219 */    MCD_OPC_CheckPredicate, 20, 65, 0, 0, // Skip to: 1289
7075
/* 1224 */    MCD_OPC_Decode, 184, 15, 139, 1, // Opcode: LDC1_MM_D64
7076
/* 1229 */    MCD_OPC_FilterValue, 52, 10, 0, 0, // Skip to: 1244
7077
/* 1234 */    MCD_OPC_CheckPredicate, 92, 50, 0, 0, // Skip to: 1289
7078
/* 1239 */    MCD_OPC_Decode, 238, 15, 141, 1, // Opcode: LLD
7079
/* 1244 */    MCD_OPC_FilterValue, 55, 10, 0, 0, // Skip to: 1259
7080
/* 1249 */    MCD_OPC_CheckPredicate, 91, 35, 0, 0, // Skip to: 1289
7081
/* 1254 */    MCD_OPC_Decode, 179, 15, 141, 1, // Opcode: LD
7082
/* 1259 */    MCD_OPC_FilterValue, 60, 10, 0, 0, // Skip to: 1274
7083
/* 1264 */    MCD_OPC_CheckPredicate, 95, 20, 0, 0, // Skip to: 1289
7084
/* 1269 */    MCD_OPC_Decode, 209, 20, 141, 1, // Opcode: SCD
7085
/* 1274 */    MCD_OPC_FilterValue, 63, 10, 0, 0, // Skip to: 1289
7086
/* 1279 */    MCD_OPC_CheckPredicate, 91, 5, 0, 0, // Skip to: 1289
7087
/* 1284 */    MCD_OPC_Decode, 218, 20, 141, 1, // Opcode: SD
7088
/* 1289 */    MCD_OPC_Fail,
7089
  0
7090
};
7091
7092
static const uint8_t DecoderTableMipsDSP32[] = {
7093
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
7094
/* 3 */       MCD_OPC_FilterValue, 35, 10, 0, 0, // Skip to: 18
7095
/* 8 */       MCD_OPC_CheckPredicate, 97, 20, 0, 0, // Skip to: 33
7096
/* 13 */      MCD_OPC_Decode, 142, 16, 141, 1, // Opcode: LWDSP
7097
/* 18 */      MCD_OPC_FilterValue, 43, 10, 0, 0, // Skip to: 33
7098
/* 23 */      MCD_OPC_CheckPredicate, 97, 5, 0, 0, // Skip to: 33
7099
/* 28 */      MCD_OPC_Decode, 140, 23, 141, 1, // Opcode: SWDSP
7100
/* 33 */      MCD_OPC_Fail,
7101
  0
7102
};
7103
7104
static const uint8_t DecoderTableMipsFP6432[] = {
7105
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
7106
/* 3 */       MCD_OPC_FilterValue, 17, 249, 5, 0, // Skip to: 1537
7107
/* 8 */       MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
7108
/* 11 */      MCD_OPC_FilterValue, 0, 121, 0, 0, // Skip to: 137
7109
/* 16 */      MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
7110
/* 19 */      MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 41
7111
/* 24 */      MCD_OPC_CheckPredicate, 98, 158, 6, 0, // Skip to: 1723
7112
/* 29 */      MCD_OPC_CheckField, 6, 5, 0, 151, 6, 0, // Skip to: 1723
7113
/* 36 */      MCD_OPC_Decode, 133, 17, 133, 3, // Opcode: MFC1_D64
7114
/* 41 */      MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 63
7115
/* 46 */      MCD_OPC_CheckPredicate, 99, 136, 6, 0, // Skip to: 1723
7116
/* 51 */      MCD_OPC_CheckField, 6, 5, 0, 129, 6, 0, // Skip to: 1723
7117
/* 58 */      MCD_OPC_Decode, 145, 17, 133, 3, // Opcode: MFHC1_D64
7118
/* 63 */      MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 85
7119
/* 68 */      MCD_OPC_CheckPredicate, 98, 114, 6, 0, // Skip to: 1723
7120
/* 73 */      MCD_OPC_CheckField, 6, 5, 0, 107, 6, 0, // Skip to: 1723
7121
/* 80 */      MCD_OPC_Decode, 161, 18, 134, 3, // Opcode: MTC1_D64
7122
/* 85 */      MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 107
7123
/* 90 */      MCD_OPC_CheckPredicate, 99, 92, 6, 0, // Skip to: 1723
7124
/* 95 */      MCD_OPC_CheckField, 6, 5, 0, 85, 6, 0, // Skip to: 1723
7125
/* 102 */     MCD_OPC_Decode, 174, 18, 135, 3, // Opcode: MTHC1_D64
7126
/* 107 */     MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 122
7127
/* 112 */     MCD_OPC_CheckPredicate, 98, 70, 6, 0, // Skip to: 1723
7128
/* 117 */     MCD_OPC_Decode, 139, 13, 230, 2, // Opcode: FADD_D64
7129
/* 122 */     MCD_OPC_FilterValue, 22, 60, 6, 0, // Skip to: 1723
7130
/* 127 */     MCD_OPC_CheckPredicate, 100, 55, 6, 0, // Skip to: 1723
7131
/* 132 */     MCD_OPC_Decode, 141, 13, 230, 2, // Opcode: FADD_PS64
7132
/* 137 */     MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 175
7133
/* 142 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
7134
/* 145 */     MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 160
7135
/* 150 */     MCD_OPC_CheckPredicate, 98, 32, 6, 0, // Skip to: 1723
7136
/* 155 */     MCD_OPC_Decode, 157, 14, 230, 2, // Opcode: FSUB_D64
7137
/* 160 */     MCD_OPC_FilterValue, 22, 22, 6, 0, // Skip to: 1723
7138
/* 165 */     MCD_OPC_CheckPredicate, 100, 17, 6, 0, // Skip to: 1723
7139
/* 170 */     MCD_OPC_Decode, 159, 14, 230, 2, // Opcode: FSUB_PS64
7140
/* 175 */     MCD_OPC_FilterValue, 2, 33, 0, 0, // Skip to: 213
7141
/* 180 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
7142
/* 183 */     MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 198
7143
/* 188 */     MCD_OPC_CheckPredicate, 98, 250, 5, 0, // Skip to: 1723
7144
/* 193 */     MCD_OPC_Decode, 240, 13, 230, 2, // Opcode: FMUL_D64
7145
/* 198 */     MCD_OPC_FilterValue, 22, 240, 5, 0, // Skip to: 1723
7146
/* 203 */     MCD_OPC_CheckPredicate, 100, 235, 5, 0, // Skip to: 1723
7147
/* 208 */     MCD_OPC_Decode, 242, 13, 230, 2, // Opcode: FMUL_PS64
7148
/* 213 */     MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 235
7149
/* 218 */     MCD_OPC_CheckPredicate, 98, 220, 5, 0, // Skip to: 1723
7150
/* 223 */     MCD_OPC_CheckField, 21, 5, 17, 213, 5, 0, // Skip to: 1723
7151
/* 230 */     MCD_OPC_Decode, 178, 13, 230, 2, // Opcode: FDIV_D64
7152
/* 235 */     MCD_OPC_FilterValue, 4, 18, 0, 0, // Skip to: 258
7153
/* 240 */     MCD_OPC_CheckPredicate, 101, 198, 5, 0, // Skip to: 1723
7154
/* 245 */     MCD_OPC_CheckField, 16, 10, 160, 4, 190, 5, 0, // Skip to: 1723
7155
/* 253 */     MCD_OPC_Decode, 149, 14, 230, 1, // Opcode: FSQRT_D64
7156
/* 258 */     MCD_OPC_FilterValue, 5, 18, 0, 0, // Skip to: 281
7157
/* 263 */     MCD_OPC_CheckPredicate, 98, 175, 5, 0, // Skip to: 1723
7158
/* 268 */     MCD_OPC_CheckField, 16, 10, 160, 4, 167, 5, 0, // Skip to: 1723
7159
/* 276 */     MCD_OPC_Decode, 132, 13, 230, 1, // Opcode: FABS_D64
7160
/* 281 */     MCD_OPC_FilterValue, 6, 18, 0, 0, // Skip to: 304
7161
/* 286 */     MCD_OPC_CheckPredicate, 98, 152, 5, 0, // Skip to: 1723
7162
/* 291 */     MCD_OPC_CheckField, 16, 10, 160, 4, 144, 5, 0, // Skip to: 1723
7163
/* 299 */     MCD_OPC_Decode, 229, 13, 230, 1, // Opcode: FMOV_D64
7164
/* 304 */     MCD_OPC_FilterValue, 7, 18, 0, 0, // Skip to: 327
7165
/* 309 */     MCD_OPC_CheckPredicate, 98, 129, 5, 0, // Skip to: 1723
7166
/* 314 */     MCD_OPC_CheckField, 16, 10, 160, 4, 121, 5, 0, // Skip to: 1723
7167
/* 322 */     MCD_OPC_Decode, 249, 13, 230, 1, // Opcode: FNEG_D64
7168
/* 327 */     MCD_OPC_FilterValue, 8, 35, 0, 0, // Skip to: 367
7169
/* 332 */     MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
7170
/* 335 */     MCD_OPC_FilterValue, 128, 4, 10, 0, 0, // Skip to: 351
7171
/* 341 */     MCD_OPC_CheckPredicate, 101, 97, 5, 0, // Skip to: 1723
7172
/* 346 */     MCD_OPC_Decode, 164, 20, 223, 1, // Opcode: ROUND_L_S
7173
/* 351 */     MCD_OPC_FilterValue, 160, 4, 86, 5, 0, // Skip to: 1723
7174
/* 357 */     MCD_OPC_CheckPredicate, 102, 81, 5, 0, // Skip to: 1723
7175
/* 362 */     MCD_OPC_Decode, 162, 20, 230, 1, // Opcode: ROUND_L_D64
7176
/* 367 */     MCD_OPC_FilterValue, 9, 35, 0, 0, // Skip to: 407
7177
/* 372 */     MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
7178
/* 375 */     MCD_OPC_FilterValue, 128, 4, 10, 0, 0, // Skip to: 391
7179
/* 381 */     MCD_OPC_CheckPredicate, 101, 57, 5, 0, // Skip to: 1723
7180
/* 386 */     MCD_OPC_Decode, 136, 24, 223, 1, // Opcode: TRUNC_L_S
7181
/* 391 */     MCD_OPC_FilterValue, 160, 4, 46, 5, 0, // Skip to: 1723
7182
/* 397 */     MCD_OPC_CheckPredicate, 102, 41, 5, 0, // Skip to: 1723
7183
/* 402 */     MCD_OPC_Decode, 134, 24, 230, 1, // Opcode: TRUNC_L_D64
7184
/* 407 */     MCD_OPC_FilterValue, 10, 35, 0, 0, // Skip to: 447
7185
/* 412 */     MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
7186
/* 415 */     MCD_OPC_FilterValue, 128, 4, 10, 0, 0, // Skip to: 431
7187
/* 421 */     MCD_OPC_CheckPredicate, 101, 17, 5, 0, // Skip to: 1723
7188
/* 426 */     MCD_OPC_Decode, 255, 8, 223, 1, // Opcode: CEIL_L_S
7189
/* 431 */     MCD_OPC_FilterValue, 160, 4, 6, 5, 0, // Skip to: 1723
7190
/* 437 */     MCD_OPC_CheckPredicate, 102, 1, 5, 0, // Skip to: 1723
7191
/* 442 */     MCD_OPC_Decode, 253, 8, 230, 1, // Opcode: CEIL_L_D64
7192
/* 447 */     MCD_OPC_FilterValue, 11, 35, 0, 0, // Skip to: 487
7193
/* 452 */     MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
7194
/* 455 */     MCD_OPC_FilterValue, 128, 4, 10, 0, 0, // Skip to: 471
7195
/* 461 */     MCD_OPC_CheckPredicate, 101, 233, 4, 0, // Skip to: 1723
7196
/* 466 */     MCD_OPC_Decode, 208, 13, 223, 1, // Opcode: FLOOR_L_S
7197
/* 471 */     MCD_OPC_FilterValue, 160, 4, 222, 4, 0, // Skip to: 1723
7198
/* 477 */     MCD_OPC_CheckPredicate, 102, 217, 4, 0, // Skip to: 1723
7199
/* 482 */     MCD_OPC_Decode, 206, 13, 230, 1, // Opcode: FLOOR_L_D64
7200
/* 487 */     MCD_OPC_FilterValue, 12, 18, 0, 0, // Skip to: 510
7201
/* 492 */     MCD_OPC_CheckPredicate, 101, 202, 4, 0, // Skip to: 1723
7202
/* 497 */     MCD_OPC_CheckField, 16, 10, 160, 4, 194, 4, 0, // Skip to: 1723
7203
/* 505 */     MCD_OPC_Decode, 167, 20, 136, 3, // Opcode: ROUND_W_D64
7204
/* 510 */     MCD_OPC_FilterValue, 13, 18, 0, 0, // Skip to: 533
7205
/* 515 */     MCD_OPC_CheckPredicate, 101, 179, 4, 0, // Skip to: 1723
7206
/* 520 */     MCD_OPC_CheckField, 16, 10, 160, 4, 171, 4, 0, // Skip to: 1723
7207
/* 528 */     MCD_OPC_Decode, 139, 24, 136, 3, // Opcode: TRUNC_W_D64
7208
/* 533 */     MCD_OPC_FilterValue, 14, 18, 0, 0, // Skip to: 556
7209
/* 538 */     MCD_OPC_CheckPredicate, 101, 156, 4, 0, // Skip to: 1723
7210
/* 543 */     MCD_OPC_CheckField, 16, 10, 160, 4, 148, 4, 0, // Skip to: 1723
7211
/* 551 */     MCD_OPC_Decode, 130, 9, 136, 3, // Opcode: CEIL_W_D64
7212
/* 556 */     MCD_OPC_FilterValue, 15, 18, 0, 0, // Skip to: 579
7213
/* 561 */     MCD_OPC_CheckPredicate, 101, 133, 4, 0, // Skip to: 1723
7214
/* 566 */     MCD_OPC_CheckField, 16, 10, 160, 4, 125, 4, 0, // Skip to: 1723
7215
/* 574 */     MCD_OPC_Decode, 211, 13, 136, 3, // Opcode: FLOOR_W_D64
7216
/* 579 */     MCD_OPC_FilterValue, 17, 47, 0, 0, // Skip to: 631
7217
/* 584 */     MCD_OPC_ExtractField, 16, 2,  // Inst{17-16} ...
7218
/* 587 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 609
7219
/* 592 */     MCD_OPC_CheckPredicate, 103, 102, 4, 0, // Skip to: 1723
7220
/* 597 */     MCD_OPC_CheckField, 21, 5, 17, 95, 4, 0, // Skip to: 1723
7221
/* 604 */     MCD_OPC_Decode, 219, 17, 137, 3, // Opcode: MOVF_D64
7222
/* 609 */     MCD_OPC_FilterValue, 1, 85, 4, 0, // Skip to: 1723
7223
/* 614 */     MCD_OPC_CheckPredicate, 103, 80, 4, 0, // Skip to: 1723
7224
/* 619 */     MCD_OPC_CheckField, 21, 5, 17, 73, 4, 0, // Skip to: 1723
7225
/* 626 */     MCD_OPC_Decode, 240, 17, 137, 3, // Opcode: MOVT_D64
7226
/* 631 */     MCD_OPC_FilterValue, 18, 17, 0, 0, // Skip to: 653
7227
/* 636 */     MCD_OPC_CheckPredicate, 103, 58, 4, 0, // Skip to: 1723
7228
/* 641 */     MCD_OPC_CheckField, 21, 5, 17, 51, 4, 0, // Skip to: 1723
7229
/* 648 */     MCD_OPC_Decode, 252, 17, 138, 3, // Opcode: MOVZ_I_D64
7230
/* 653 */     MCD_OPC_FilterValue, 19, 17, 0, 0, // Skip to: 675
7231
/* 658 */     MCD_OPC_CheckPredicate, 103, 36, 4, 0, // Skip to: 1723
7232
/* 663 */     MCD_OPC_CheckField, 21, 5, 17, 29, 4, 0, // Skip to: 1723
7233
/* 670 */     MCD_OPC_Decode, 231, 17, 138, 3, // Opcode: MOVN_I_D64
7234
/* 675 */     MCD_OPC_FilterValue, 21, 18, 0, 0, // Skip to: 698
7235
/* 680 */     MCD_OPC_CheckPredicate, 104, 14, 4, 0, // Skip to: 1723
7236
/* 685 */     MCD_OPC_CheckField, 16, 10, 160, 4, 6, 4, 0, // Skip to: 1723
7237
/* 693 */     MCD_OPC_Decode, 136, 20, 230, 1, // Opcode: RECIP_D64
7238
/* 698 */     MCD_OPC_FilterValue, 22, 18, 0, 0, // Skip to: 721
7239
/* 703 */     MCD_OPC_CheckPredicate, 104, 247, 3, 0, // Skip to: 1723
7240
/* 708 */     MCD_OPC_CheckField, 16, 10, 160, 4, 239, 3, 0, // Skip to: 1723
7241
/* 716 */     MCD_OPC_Decode, 175, 20, 230, 1, // Opcode: RSQRT_D64
7242
/* 721 */     MCD_OPC_FilterValue, 24, 17, 0, 0, // Skip to: 743
7243
/* 726 */     MCD_OPC_CheckPredicate, 105, 224, 3, 0, // Skip to: 1723
7244
/* 731 */     MCD_OPC_CheckField, 21, 5, 22, 217, 3, 0, // Skip to: 1723
7245
/* 738 */     MCD_OPC_Decode, 155, 6, 230, 2, // Opcode: ADDR_PS64
7246
/* 743 */     MCD_OPC_FilterValue, 26, 17, 0, 0, // Skip to: 765
7247
/* 748 */     MCD_OPC_CheckPredicate, 105, 202, 3, 0, // Skip to: 1723
7248
/* 753 */     MCD_OPC_CheckField, 21, 5, 22, 195, 3, 0, // Skip to: 1723
7249
/* 760 */     MCD_OPC_Decode, 223, 18, 230, 2, // Opcode: MULR_PS64
7250
/* 765 */     MCD_OPC_FilterValue, 32, 51, 0, 0, // Skip to: 821
7251
/* 770 */     MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
7252
/* 773 */     MCD_OPC_FilterValue, 160, 4, 10, 0, 0, // Skip to: 789
7253
/* 779 */     MCD_OPC_CheckPredicate, 98, 171, 3, 0, // Skip to: 1723
7254
/* 784 */     MCD_OPC_Decode, 204, 10, 136, 3, // Opcode: CVT_S_D64
7255
/* 789 */     MCD_OPC_FilterValue, 160, 5, 10, 0, 0, // Skip to: 805
7256
/* 795 */     MCD_OPC_CheckPredicate, 106, 155, 3, 0, // Skip to: 1723
7257
/* 800 */     MCD_OPC_Decode, 206, 10, 136, 3, // Opcode: CVT_S_L
7258
/* 805 */     MCD_OPC_FilterValue, 192, 5, 144, 3, 0, // Skip to: 1723
7259
/* 811 */     MCD_OPC_CheckPredicate, 100, 139, 3, 0, // Skip to: 1723
7260
/* 816 */     MCD_OPC_Decode, 209, 10, 136, 3, // Opcode: CVT_S_PU64
7261
/* 821 */     MCD_OPC_FilterValue, 33, 51, 0, 0, // Skip to: 877
7262
/* 826 */     MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
7263
/* 829 */     MCD_OPC_FilterValue, 128, 4, 10, 0, 0, // Skip to: 845
7264
/* 835 */     MCD_OPC_CheckPredicate, 98, 115, 3, 0, // Skip to: 1723
7265
/* 840 */     MCD_OPC_Decode, 188, 10, 223, 1, // Opcode: CVT_D64_S
7266
/* 845 */     MCD_OPC_FilterValue, 128, 5, 10, 0, 0, // Skip to: 861
7267
/* 851 */     MCD_OPC_CheckPredicate, 98, 99, 3, 0, // Skip to: 1723
7268
/* 856 */     MCD_OPC_Decode, 190, 10, 223, 1, // Opcode: CVT_D64_W
7269
/* 861 */     MCD_OPC_FilterValue, 160, 5, 88, 3, 0, // Skip to: 1723
7270
/* 867 */     MCD_OPC_CheckPredicate, 106, 83, 3, 0, // Skip to: 1723
7271
/* 872 */     MCD_OPC_Decode, 187, 10, 230, 1, // Opcode: CVT_D64_L
7272
/* 877 */     MCD_OPC_FilterValue, 36, 35, 0, 0, // Skip to: 917
7273
/* 882 */     MCD_OPC_ExtractField, 16, 10,  // Inst{25-16} ...
7274
/* 885 */     MCD_OPC_FilterValue, 160, 4, 10, 0, 0, // Skip to: 901
7275
/* 891 */     MCD_OPC_CheckPredicate, 98, 59, 3, 0, // Skip to: 1723
7276
/* 896 */     MCD_OPC_Decode, 215, 10, 136, 3, // Opcode: CVT_W_D64
7277
/* 901 */     MCD_OPC_FilterValue, 192, 5, 48, 3, 0, // Skip to: 1723
7278
/* 907 */     MCD_OPC_CheckPredicate, 105, 43, 3, 0, // Skip to: 1723
7279
/* 912 */     MCD_OPC_Decode, 201, 10, 230, 1, // Opcode: CVT_PW_PS64
7280
/* 917 */     MCD_OPC_FilterValue, 38, 40, 0, 0, // Skip to: 962
7281
/* 922 */     MCD_OPC_ExtractField, 21, 5,  // Inst{25-21} ...
7282
/* 925 */     MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 940
7283
/* 930 */     MCD_OPC_CheckPredicate, 100, 20, 3, 0, // Skip to: 1723
7284
/* 935 */     MCD_OPC_Decode, 200, 10, 139, 3, // Opcode: CVT_PS_S64
7285
/* 940 */     MCD_OPC_FilterValue, 20, 10, 3, 0, // Skip to: 1723
7286
/* 945 */     MCD_OPC_CheckPredicate, 105, 5, 3, 0, // Skip to: 1723
7287
/* 950 */     MCD_OPC_CheckField, 16, 5, 0, 254, 2, 0, // Skip to: 1723
7288
/* 957 */     MCD_OPC_Decode, 199, 10, 230, 1, // Opcode: CVT_PS_PW64
7289
/* 962 */     MCD_OPC_FilterValue, 40, 18, 0, 0, // Skip to: 985
7290
/* 967 */     MCD_OPC_CheckPredicate, 100, 239, 2, 0, // Skip to: 1723
7291
/* 972 */     MCD_OPC_CheckField, 16, 10, 192, 5, 231, 2, 0, // Skip to: 1723
7292
/* 980 */     MCD_OPC_Decode, 208, 10, 136, 3, // Opcode: CVT_S_PL64
7293
/* 985 */     MCD_OPC_FilterValue, 44, 17, 0, 0, // Skip to: 1007
7294
/* 990 */     MCD_OPC_CheckPredicate, 100, 216, 2, 0, // Skip to: 1723
7295
/* 995 */     MCD_OPC_CheckField, 21, 5, 22, 209, 2, 0, // Skip to: 1723
7296
/* 1002 */    MCD_OPC_Decode, 201, 19, 230, 2, // Opcode: PLL_PS64
7297
/* 1007 */    MCD_OPC_FilterValue, 45, 17, 0, 0, // Skip to: 1029
7298
/* 1012 */    MCD_OPC_CheckPredicate, 100, 194, 2, 0, // Skip to: 1723
7299
/* 1017 */    MCD_OPC_CheckField, 21, 5, 22, 187, 2, 0, // Skip to: 1723
7300
/* 1024 */    MCD_OPC_Decode, 202, 19, 230, 2, // Opcode: PLU_PS64
7301
/* 1029 */    MCD_OPC_FilterValue, 46, 17, 0, 0, // Skip to: 1051
7302
/* 1034 */    MCD_OPC_CheckPredicate, 100, 172, 2, 0, // Skip to: 1723
7303
/* 1039 */    MCD_OPC_CheckField, 21, 5, 22, 165, 2, 0, // Skip to: 1723
7304
/* 1046 */    MCD_OPC_Decode, 249, 19, 230, 2, // Opcode: PUL_PS64
7305
/* 1051 */    MCD_OPC_FilterValue, 47, 17, 0, 0, // Skip to: 1073
7306
/* 1056 */    MCD_OPC_CheckPredicate, 100, 150, 2, 0, // Skip to: 1723
7307
/* 1061 */    MCD_OPC_CheckField, 21, 5, 22, 143, 2, 0, // Skip to: 1723
7308
/* 1068 */    MCD_OPC_Decode, 250, 19, 230, 2, // Opcode: PUU_PS64
7309
/* 1073 */    MCD_OPC_FilterValue, 48, 24, 0, 0, // Skip to: 1102
7310
/* 1078 */    MCD_OPC_CheckPredicate, 107, 128, 2, 0, // Skip to: 1723
7311
/* 1083 */    MCD_OPC_CheckField, 21, 5, 17, 121, 2, 0, // Skip to: 1723
7312
/* 1090 */    MCD_OPC_CheckField, 6, 2, 0, 114, 2, 0, // Skip to: 1723
7313
/* 1097 */    MCD_OPC_Decode, 228, 10, 140, 3, // Opcode: C_F_D64
7314
/* 1102 */    MCD_OPC_FilterValue, 49, 24, 0, 0, // Skip to: 1131
7315
/* 1107 */    MCD_OPC_CheckPredicate, 107, 99, 2, 0, // Skip to: 1723
7316
/* 1112 */    MCD_OPC_CheckField, 21, 5, 17, 92, 2, 0, // Skip to: 1723
7317
/* 1119 */    MCD_OPC_CheckField, 6, 2, 0, 85, 2, 0, // Skip to: 1723
7318
/* 1126 */    MCD_OPC_Decode, 184, 11, 140, 3, // Opcode: C_UN_D64
7319
/* 1131 */    MCD_OPC_FilterValue, 50, 24, 0, 0, // Skip to: 1160
7320
/* 1136 */    MCD_OPC_CheckPredicate, 107, 70, 2, 0, // Skip to: 1723
7321
/* 1141 */    MCD_OPC_CheckField, 21, 5, 17, 63, 2, 0, // Skip to: 1723
7322
/* 1148 */    MCD_OPC_CheckField, 6, 2, 0, 56, 2, 0, // Skip to: 1723
7323
/* 1155 */    MCD_OPC_Decode, 222, 10, 140, 3, // Opcode: C_EQ_D64
7324
/* 1160 */    MCD_OPC_FilterValue, 51, 24, 0, 0, // Skip to: 1189
7325
/* 1165 */    MCD_OPC_CheckPredicate, 107, 41, 2, 0, // Skip to: 1723
7326
/* 1170 */    MCD_OPC_CheckField, 21, 5, 17, 34, 2, 0, // Skip to: 1723
7327
/* 1177 */    MCD_OPC_CheckField, 6, 2, 0, 27, 2, 0, // Skip to: 1723
7328
/* 1184 */    MCD_OPC_Decode, 166, 11, 140, 3, // Opcode: C_UEQ_D64
7329
/* 1189 */    MCD_OPC_FilterValue, 52, 24, 0, 0, // Skip to: 1218
7330
/* 1194 */    MCD_OPC_CheckPredicate, 107, 12, 2, 0, // Skip to: 1723
7331
/* 1199 */    MCD_OPC_CheckField, 21, 5, 17, 5, 2, 0, // Skip to: 1723
7332
/* 1206 */    MCD_OPC_CheckField, 6, 2, 0, 254, 1, 0, // Skip to: 1723
7333
/* 1213 */    MCD_OPC_Decode, 148, 11, 140, 3, // Opcode: C_OLT_D64
7334
/* 1218 */    MCD_OPC_FilterValue, 53, 24, 0, 0, // Skip to: 1247
7335
/* 1223 */    MCD_OPC_CheckPredicate, 107, 239, 1, 0, // Skip to: 1723
7336
/* 1228 */    MCD_OPC_CheckField, 21, 5, 17, 232, 1, 0, // Skip to: 1723
7337
/* 1235 */    MCD_OPC_CheckField, 6, 2, 0, 225, 1, 0, // Skip to: 1723
7338
/* 1242 */    MCD_OPC_Decode, 178, 11, 140, 3, // Opcode: C_ULT_D64
7339
/* 1247 */    MCD_OPC_FilterValue, 54, 24, 0, 0, // Skip to: 1276
7340
/* 1252 */    MCD_OPC_CheckPredicate, 107, 210, 1, 0, // Skip to: 1723
7341
/* 1257 */    MCD_OPC_CheckField, 21, 5, 17, 203, 1, 0, // Skip to: 1723
7342
/* 1264 */    MCD_OPC_CheckField, 6, 2, 0, 196, 1, 0, // Skip to: 1723
7343
/* 1271 */    MCD_OPC_Decode, 142, 11, 140, 3, // Opcode: C_OLE_D64
7344
/* 1276 */    MCD_OPC_FilterValue, 55, 24, 0, 0, // Skip to: 1305
7345
/* 1281 */    MCD_OPC_CheckPredicate, 107, 181, 1, 0, // Skip to: 1723
7346
/* 1286 */    MCD_OPC_CheckField, 21, 5, 17, 174, 1, 0, // Skip to: 1723
7347
/* 1293 */    MCD_OPC_CheckField, 6, 2, 0, 167, 1, 0, // Skip to: 1723
7348
/* 1300 */    MCD_OPC_Decode, 172, 11, 140, 3, // Opcode: C_ULE_D64
7349
/* 1305 */    MCD_OPC_FilterValue, 56, 24, 0, 0, // Skip to: 1334
7350
/* 1310 */    MCD_OPC_CheckPredicate, 107, 152, 1, 0, // Skip to: 1723
7351
/* 1315 */    MCD_OPC_CheckField, 21, 5, 17, 145, 1, 0, // Skip to: 1723
7352
/* 1322 */    MCD_OPC_CheckField, 6, 2, 0, 138, 1, 0, // Skip to: 1723
7353
/* 1329 */    MCD_OPC_Decode, 160, 11, 140, 3, // Opcode: C_SF_D64
7354
/* 1334 */    MCD_OPC_FilterValue, 57, 24, 0, 0, // Skip to: 1363
7355
/* 1339 */    MCD_OPC_CheckPredicate, 107, 123, 1, 0, // Skip to: 1723
7356
/* 1344 */    MCD_OPC_CheckField, 21, 5, 17, 116, 1, 0, // Skip to: 1723
7357
/* 1351 */    MCD_OPC_CheckField, 6, 2, 0, 109, 1, 0, // Skip to: 1723
7358
/* 1358 */    MCD_OPC_Decode, 252, 10, 140, 3, // Opcode: C_NGLE_D64
7359
/* 1363 */    MCD_OPC_FilterValue, 58, 24, 0, 0, // Skip to: 1392
7360
/* 1368 */    MCD_OPC_CheckPredicate, 107, 94, 1, 0, // Skip to: 1723
7361
/* 1373 */    MCD_OPC_CheckField, 21, 5, 17, 87, 1, 0, // Skip to: 1723
7362
/* 1380 */    MCD_OPC_CheckField, 6, 2, 0, 80, 1, 0, // Skip to: 1723
7363
/* 1387 */    MCD_OPC_Decode, 154, 11, 140, 3, // Opcode: C_SEQ_D64
7364
/* 1392 */    MCD_OPC_FilterValue, 59, 24, 0, 0, // Skip to: 1421
7365
/* 1397 */    MCD_OPC_CheckPredicate, 107, 65, 1, 0, // Skip to: 1723
7366
/* 1402 */    MCD_OPC_CheckField, 21, 5, 17, 58, 1, 0, // Skip to: 1723
7367
/* 1409 */    MCD_OPC_CheckField, 6, 2, 0, 51, 1, 0, // Skip to: 1723
7368
/* 1416 */    MCD_OPC_Decode, 130, 11, 140, 3, // Opcode: C_NGL_D64
7369
/* 1421 */    MCD_OPC_FilterValue, 60, 24, 0, 0, // Skip to: 1450
7370
/* 1426 */    MCD_OPC_CheckPredicate, 107, 36, 1, 0, // Skip to: 1723
7371
/* 1431 */    MCD_OPC_CheckField, 21, 5, 17, 29, 1, 0, // Skip to: 1723
7372
/* 1438 */    MCD_OPC_CheckField, 6, 2, 0, 22, 1, 0, // Skip to: 1723
7373
/* 1445 */    MCD_OPC_Decode, 240, 10, 140, 3, // Opcode: C_LT_D64
7374
/* 1450 */    MCD_OPC_FilterValue, 61, 24, 0, 0, // Skip to: 1479
7375
/* 1455 */    MCD_OPC_CheckPredicate, 107, 7, 1, 0, // Skip to: 1723
7376
/* 1460 */    MCD_OPC_CheckField, 21, 5, 17, 0, 1, 0, // Skip to: 1723
7377
/* 1467 */    MCD_OPC_CheckField, 6, 2, 0, 249, 0, 0, // Skip to: 1723
7378
/* 1474 */    MCD_OPC_Decode, 246, 10, 140, 3, // Opcode: C_NGE_D64
7379
/* 1479 */    MCD_OPC_FilterValue, 62, 24, 0, 0, // Skip to: 1508
7380
/* 1484 */    MCD_OPC_CheckPredicate, 107, 234, 0, 0, // Skip to: 1723
7381
/* 1489 */    MCD_OPC_CheckField, 21, 5, 17, 227, 0, 0, // Skip to: 1723
7382
/* 1496 */    MCD_OPC_CheckField, 6, 2, 0, 220, 0, 0, // Skip to: 1723
7383
/* 1503 */    MCD_OPC_Decode, 234, 10, 140, 3, // Opcode: C_LE_D64
7384
/* 1508 */    MCD_OPC_FilterValue, 63, 210, 0, 0, // Skip to: 1723
7385
/* 1513 */    MCD_OPC_CheckPredicate, 107, 205, 0, 0, // Skip to: 1723
7386
/* 1518 */    MCD_OPC_CheckField, 21, 5, 17, 198, 0, 0, // Skip to: 1723
7387
/* 1525 */    MCD_OPC_CheckField, 6, 2, 0, 191, 0, 0, // Skip to: 1723
7388
/* 1532 */    MCD_OPC_Decode, 136, 11, 140, 3, // Opcode: C_NGT_D64
7389
/* 1537 */    MCD_OPC_FilterValue, 19, 151, 0, 0, // Skip to: 1693
7390
/* 1542 */    MCD_OPC_ExtractField, 0, 6,  // Inst{5-0} ...
7391
/* 1545 */    MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 1567
7392
/* 1550 */    MCD_OPC_CheckPredicate, 108, 168, 0, 0, // Skip to: 1723
7393
/* 1555 */    MCD_OPC_CheckField, 11, 5, 0, 161, 0, 0, // Skip to: 1723
7394
/* 1562 */    MCD_OPC_Decode, 197, 15, 141, 3, // Opcode: LDXC164
7395
/* 1567 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 1589
7396
/* 1572 */    MCD_OPC_CheckPredicate, 109, 146, 0, 0, // Skip to: 1723
7397
/* 1577 */    MCD_OPC_CheckField, 11, 5, 0, 139, 0, 0, // Skip to: 1723
7398
/* 1584 */    MCD_OPC_Decode, 254, 15, 141, 3, // Opcode: LUXC164
7399
/* 1589 */    MCD_OPC_FilterValue, 9, 17, 0, 0, // Skip to: 1611
7400
/* 1594 */    MCD_OPC_CheckPredicate, 108, 124, 0, 0, // Skip to: 1723
7401
/* 1599 */    MCD_OPC_CheckField, 6, 5, 0, 117, 0, 0, // Skip to: 1723
7402
/* 1606 */    MCD_OPC_Decode, 241, 20, 142, 3, // Opcode: SDXC164
7403
/* 1611 */    MCD_OPC_FilterValue, 13, 17, 0, 0, // Skip to: 1633
7404
/* 1616 */    MCD_OPC_CheckPredicate, 109, 102, 0, 0, // Skip to: 1723
7405
/* 1621 */    MCD_OPC_CheckField, 6, 5, 0, 95, 0, 0, // Skip to: 1723
7406
/* 1628 */    MCD_OPC_Decode, 254, 22, 142, 3, // Opcode: SUXC164
7407
/* 1633 */    MCD_OPC_FilterValue, 33, 10, 0, 0, // Skip to: 1648
7408
/* 1638 */    MCD_OPC_CheckPredicate, 110, 80, 0, 0, // Skip to: 1723
7409
/* 1643 */    MCD_OPC_Decode, 212, 16, 143, 3, // Opcode: MADD_D64
7410
/* 1648 */    MCD_OPC_FilterValue, 41, 10, 0, 0, // Skip to: 1663
7411
/* 1653 */    MCD_OPC_CheckPredicate, 110, 65, 0, 0, // Skip to: 1723
7412
/* 1658 */    MCD_OPC_Decode, 148, 18, 143, 3, // Opcode: MSUB_D64
7413
/* 1663 */    MCD_OPC_FilterValue, 49, 10, 0, 0, // Skip to: 1678
7414
/* 1668 */    MCD_OPC_CheckPredicate, 111, 50, 0, 0, // Skip to: 1723
7415
/* 1673 */    MCD_OPC_Decode, 141, 19, 143, 3, // Opcode: NMADD_D64
7416
/* 1678 */    MCD_OPC_FilterValue, 57, 40, 0, 0, // Skip to: 1723
7417
/* 1683 */    MCD_OPC_CheckPredicate, 111, 35, 0, 0, // Skip to: 1723
7418
/* 1688 */    MCD_OPC_Decode, 146, 19, 143, 3, // Opcode: NMSUB_D64
7419
/* 1693 */    MCD_OPC_FilterValue, 53, 10, 0, 0, // Skip to: 1708
7420
/* 1698 */    MCD_OPC_CheckPredicate, 101, 20, 0, 0, // Skip to: 1723
7421
/* 1703 */    MCD_OPC_Decode, 181, 15, 219, 2, // Opcode: LDC164
7422
/* 1708 */    MCD_OPC_FilterValue, 61, 10, 0, 0, // Skip to: 1723
7423
/* 1713 */    MCD_OPC_CheckPredicate, 101, 5, 0, 0, // Skip to: 1723
7424
/* 1718 */    MCD_OPC_Decode, 228, 20, 219, 2, // Opcode: SDC164
7425
/* 1723 */    MCD_OPC_Fail,
7426
  0
7427
};
7428
7429
static const uint8_t DecoderTableNanoMips16[] = {
7430
/* 0 */       MCD_OPC_ExtractField, 10, 6,  // Inst{15-10} ...
7431
/* 3 */       MCD_OPC_FilterValue, 4, 60, 0, 0, // Skip to: 68
7432
/* 8 */       MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 25
7433
/* 13 */      MCD_OPC_CheckField, 2, 8, 2, 5, 0, 0, // Skip to: 25
7434
/* 20 */      MCD_OPC_Decode, 183, 23, 144, 3, // Opcode: SYSCALL16_NM
7435
/* 25 */      MCD_OPC_ExtractField, 3, 7,  // Inst{9-3} ...
7436
/* 28 */      MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 43
7437
/* 33 */      MCD_OPC_CheckPredicate, 112, 20, 0, 0, // Skip to: 58
7438
/* 38 */      MCD_OPC_Decode, 214, 8, 145, 3, // Opcode: BREAK16_NM
7439
/* 43 */      MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 58
7440
/* 48 */      MCD_OPC_CheckPredicate, 112, 5, 0, 0, // Skip to: 58
7441
/* 53 */      MCD_OPC_Decode, 222, 20, 145, 3, // Opcode: SDBBP16_NM
7442
/* 58 */      MCD_OPC_CheckPredicate, 112, 243, 2, 0, // Skip to: 818
7443
/* 63 */      MCD_OPC_Decode, 215, 17, 146, 3, // Opcode: MOVE_NM
7444
/* 68 */      MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 83
7445
/* 73 */      MCD_OPC_CheckPredicate, 112, 228, 2, 0, // Skip to: 818
7446
/* 78 */      MCD_OPC_Decode, 133, 16, 147, 3, // Opcode: LW16_NM
7447
/* 83 */      MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 98
7448
/* 88 */      MCD_OPC_CheckPredicate, 112, 213, 2, 0, // Skip to: 818
7449
/* 93 */      MCD_OPC_Decode, 163, 7, 148, 3, // Opcode: BC16_NM
7450
/* 98 */      MCD_OPC_FilterValue, 7, 33, 0, 0, // Skip to: 136
7451
/* 103 */     MCD_OPC_ExtractField, 8, 1,  // Inst{8} ...
7452
/* 106 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 121
7453
/* 111 */     MCD_OPC_CheckPredicate, 112, 190, 2, 0, // Skip to: 818
7454
/* 116 */     MCD_OPC_Decode, 191, 20, 149, 3, // Opcode: SAVE16_NM
7455
/* 121 */     MCD_OPC_FilterValue, 1, 180, 2, 0, // Skip to: 818
7456
/* 126 */     MCD_OPC_CheckPredicate, 112, 175, 2, 0, // Skip to: 818
7457
/* 131 */     MCD_OPC_Decode, 148, 20, 149, 3, // Opcode: RESTOREJRC16_NM
7458
/* 136 */     MCD_OPC_FilterValue, 12, 33, 0, 0, // Skip to: 174
7459
/* 141 */     MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
7460
/* 144 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 159
7461
/* 149 */     MCD_OPC_CheckPredicate, 112, 152, 2, 0, // Skip to: 818
7462
/* 154 */     MCD_OPC_Decode, 222, 21, 150, 3, // Opcode: SLL16_NM
7463
/* 159 */     MCD_OPC_FilterValue, 1, 142, 2, 0, // Skip to: 818
7464
/* 164 */     MCD_OPC_CheckPredicate, 112, 137, 2, 0, // Skip to: 818
7465
/* 169 */     MCD_OPC_Decode, 163, 22, 150, 3, // Opcode: SRL16_NM
7466
/* 174 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 189
7467
/* 179 */     MCD_OPC_CheckPredicate, 112, 122, 2, 0, // Skip to: 818
7468
/* 184 */     MCD_OPC_Decode, 167, 16, 151, 3, // Opcode: LWSP16_NM
7469
/* 189 */     MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 204
7470
/* 194 */     MCD_OPC_CheckPredicate, 112, 107, 2, 0, // Skip to: 818
7471
/* 199 */     MCD_OPC_Decode, 149, 7, 148, 3, // Opcode: BALC16_NM
7472
/* 204 */     MCD_OPC_FilterValue, 15, 47, 0, 0, // Skip to: 256
7473
/* 209 */     MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
7474
/* 212 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 234
7475
/* 217 */     MCD_OPC_CheckPredicate, 112, 84, 2, 0, // Skip to: 818
7476
/* 222 */     MCD_OPC_CheckField, 8, 1, 0, 77, 2, 0, // Skip to: 818
7477
/* 229 */     MCD_OPC_Decode, 208, 6, 152, 3, // Opcode: ADDu4x4_NM
7478
/* 234 */     MCD_OPC_FilterValue, 1, 67, 2, 0, // Skip to: 818
7479
/* 239 */     MCD_OPC_CheckPredicate, 112, 62, 2, 0, // Skip to: 818
7480
/* 244 */     MCD_OPC_CheckField, 8, 1, 0, 55, 2, 0, // Skip to: 818
7481
/* 251 */     MCD_OPC_Decode, 206, 18, 152, 3, // Opcode: MUL4x4_NM
7482
/* 256 */     MCD_OPC_FilterValue, 20, 86, 0, 0, // Skip to: 347
7483
/* 261 */     MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
7484
/* 264 */     MCD_OPC_FilterValue, 0, 63, 0, 0, // Skip to: 332
7485
/* 269 */     MCD_OPC_ExtractField, 1, 3,  // Inst{3-1} ...
7486
/* 272 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 287
7487
/* 277 */     MCD_OPC_CheckPredicate, 112, 24, 2, 0, // Skip to: 818
7488
/* 282 */     MCD_OPC_Decode, 160, 19, 153, 3, // Opcode: NOT16_NM
7489
/* 287 */     MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 302
7490
/* 292 */     MCD_OPC_CheckPredicate, 112, 9, 2, 0, // Skip to: 818
7491
/* 297 */     MCD_OPC_Decode, 175, 24, 154, 3, // Opcode: XOR16_NM
7492
/* 302 */     MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 317
7493
/* 307 */     MCD_OPC_CheckPredicate, 112, 250, 1, 0, // Skip to: 818
7494
/* 312 */     MCD_OPC_Decode, 219, 6, 154, 3, // Opcode: AND16_NM
7495
/* 317 */     MCD_OPC_FilterValue, 6, 240, 1, 0, // Skip to: 818
7496
/* 322 */     MCD_OPC_CheckPredicate, 112, 235, 1, 0, // Skip to: 818
7497
/* 327 */     MCD_OPC_Decode, 166, 19, 154, 3, // Opcode: OR16_NM
7498
/* 332 */     MCD_OPC_FilterValue, 1, 225, 1, 0, // Skip to: 818
7499
/* 337 */     MCD_OPC_CheckPredicate, 112, 220, 1, 0, // Skip to: 818
7500
/* 342 */     MCD_OPC_Decode, 174, 16, 155, 3, // Opcode: LWXS16_NM
7501
/* 347 */     MCD_OPC_FilterValue, 21, 10, 0, 0, // Skip to: 362
7502
/* 352 */     MCD_OPC_CheckPredicate, 112, 205, 1, 0, // Skip to: 818
7503
/* 357 */     MCD_OPC_Decode, 146, 16, 156, 3, // Opcode: LWGP16_NM
7504
/* 362 */     MCD_OPC_FilterValue, 23, 48, 0, 0, // Skip to: 415
7505
/* 367 */     MCD_OPC_ExtractField, 2, 2,  // Inst{3-2} ...
7506
/* 370 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 385
7507
/* 375 */     MCD_OPC_CheckPredicate, 112, 182, 1, 0, // Skip to: 818
7508
/* 380 */     MCD_OPC_Decode, 155, 15, 157, 3, // Opcode: LB16_NM
7509
/* 385 */     MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 400
7510
/* 390 */     MCD_OPC_CheckPredicate, 112, 167, 1, 0, // Skip to: 818
7511
/* 395 */     MCD_OPC_Decode, 196, 20, 158, 3, // Opcode: SB16_NM
7512
/* 400 */     MCD_OPC_FilterValue, 2, 157, 1, 0, // Skip to: 818
7513
/* 405 */     MCD_OPC_CheckPredicate, 112, 152, 1, 0, // Skip to: 818
7514
/* 410 */     MCD_OPC_Decode, 161, 15, 157, 3, // Opcode: LBU16_NM
7515
/* 415 */     MCD_OPC_FilterValue, 28, 17, 0, 0, // Skip to: 437
7516
/* 420 */     MCD_OPC_CheckPredicate, 112, 137, 1, 0, // Skip to: 818
7517
/* 425 */     MCD_OPC_CheckField, 6, 1, 1, 130, 1, 0, // Skip to: 818
7518
/* 432 */     MCD_OPC_Decode, 133, 6, 159, 3, // Opcode: ADDIUR1SP_NM
7519
/* 437 */     MCD_OPC_FilterValue, 29, 10, 0, 0, // Skip to: 452
7520
/* 442 */     MCD_OPC_CheckPredicate, 112, 115, 1, 0, // Skip to: 818
7521
/* 447 */     MCD_OPC_Decode, 134, 16, 160, 3, // Opcode: LW4x4_NM
7522
/* 452 */     MCD_OPC_FilterValue, 31, 63, 0, 0, // Skip to: 520
7523
/* 457 */     MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
7524
/* 460 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 498
7525
/* 465 */     MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
7526
/* 468 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 483
7527
/* 473 */     MCD_OPC_CheckPredicate, 112, 84, 1, 0, // Skip to: 818
7528
/* 478 */     MCD_OPC_Decode, 207, 15, 161, 3, // Opcode: LH16_NM
7529
/* 483 */     MCD_OPC_FilterValue, 1, 74, 1, 0, // Skip to: 818
7530
/* 488 */     MCD_OPC_CheckPredicate, 112, 69, 1, 0, // Skip to: 818
7531
/* 493 */     MCD_OPC_Decode, 213, 15, 161, 3, // Opcode: LHU16_NM
7532
/* 498 */     MCD_OPC_FilterValue, 1, 59, 1, 0, // Skip to: 818
7533
/* 503 */     MCD_OPC_CheckPredicate, 112, 54, 1, 0, // Skip to: 818
7534
/* 508 */     MCD_OPC_CheckField, 3, 1, 0, 47, 1, 0, // Skip to: 818
7535
/* 515 */     MCD_OPC_Decode, 146, 21, 162, 3, // Opcode: SH16_NM
7536
/* 520 */     MCD_OPC_FilterValue, 36, 56, 0, 0, // Skip to: 581
7537
/* 525 */     MCD_OPC_ExtractField, 3, 1,  // Inst{3} ...
7538
/* 528 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 543
7539
/* 533 */     MCD_OPC_CheckPredicate, 112, 24, 1, 0, // Skip to: 818
7540
/* 538 */     MCD_OPC_Decode, 135, 6, 163, 3, // Opcode: ADDIUR2_NM
7541
/* 543 */     MCD_OPC_FilterValue, 1, 14, 1, 0, // Skip to: 818
7542
/* 548 */     MCD_OPC_CheckPredicate, 112, 18, 0, 0, // Skip to: 571
7543
/* 553 */     MCD_OPC_CheckField, 4, 6, 0, 11, 0, 0, // Skip to: 571
7544
/* 560 */     MCD_OPC_CheckField, 0, 3, 0, 4, 0, 0, // Skip to: 571
7545
/* 567 */     MCD_OPC_Decode, 150, 19, 10, // Opcode: NOP_NM
7546
/* 571 */     MCD_OPC_CheckPredicate, 112, 242, 0, 0, // Skip to: 818
7547
/* 576 */     MCD_OPC_Decode, 136, 6, 164, 3, // Opcode: ADDIURS5_NM
7548
/* 581 */     MCD_OPC_FilterValue, 37, 10, 0, 0, // Skip to: 596
7549
/* 586 */     MCD_OPC_CheckPredicate, 112, 227, 0, 0, // Skip to: 818
7550
/* 591 */     MCD_OPC_Decode, 131, 23, 165, 3, // Opcode: SW16_NM
7551
/* 596 */     MCD_OPC_FilterValue, 38, 10, 0, 0, // Skip to: 611
7552
/* 601 */     MCD_OPC_CheckPredicate, 112, 212, 0, 0, // Skip to: 818
7553
/* 606 */     MCD_OPC_Decode, 203, 7, 166, 3, // Opcode: BEQZC16_NM
7554
/* 611 */     MCD_OPC_FilterValue, 44, 33, 0, 0, // Skip to: 649
7555
/* 616 */     MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
7556
/* 619 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 634
7557
/* 624 */     MCD_OPC_CheckPredicate, 112, 189, 0, 0, // Skip to: 818
7558
/* 629 */     MCD_OPC_Decode, 207, 6, 167, 3, // Opcode: ADDu16_NM
7559
/* 634 */     MCD_OPC_FilterValue, 1, 179, 0, 0, // Skip to: 818
7560
/* 639 */     MCD_OPC_CheckPredicate, 112, 174, 0, 0, // Skip to: 818
7561
/* 644 */     MCD_OPC_Decode, 250, 22, 167, 3, // Opcode: SUBu16_NM
7562
/* 649 */     MCD_OPC_FilterValue, 45, 10, 0, 0, // Skip to: 664
7563
/* 654 */     MCD_OPC_CheckPredicate, 112, 159, 0, 0, // Skip to: 818
7564
/* 659 */     MCD_OPC_Decode, 162, 23, 151, 3, // Opcode: SWSP16_NM
7565
/* 664 */     MCD_OPC_FilterValue, 46, 10, 0, 0, // Skip to: 679
7566
/* 669 */     MCD_OPC_CheckPredicate, 112, 144, 0, 0, // Skip to: 818
7567
/* 674 */     MCD_OPC_Decode, 193, 8, 166, 3, // Opcode: BNEZC16_NM
7568
/* 679 */     MCD_OPC_FilterValue, 47, 10, 0, 0, // Skip to: 694
7569
/* 684 */     MCD_OPC_CheckPredicate, 112, 129, 0, 0, // Skip to: 818
7570
/* 689 */     MCD_OPC_Decode, 214, 17, 168, 3, // Opcode: MOVEP_NM
7571
/* 694 */     MCD_OPC_FilterValue, 52, 10, 0, 0, // Skip to: 709
7572
/* 699 */     MCD_OPC_CheckPredicate, 112, 114, 0, 0, // Skip to: 818
7573
/* 704 */     MCD_OPC_Decode, 233, 15, 169, 3, // Opcode: LI16_NM
7574
/* 709 */     MCD_OPC_FilterValue, 53, 10, 0, 0, // Skip to: 724
7575
/* 714 */     MCD_OPC_CheckPredicate, 112, 99, 0, 0, // Skip to: 818
7576
/* 719 */     MCD_OPC_Decode, 144, 23, 170, 3, // Opcode: SWGP16_NM
7577
/* 724 */     MCD_OPC_FilterValue, 54, 44, 0, 0, // Skip to: 773
7578
/* 729 */     MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 746
7579
/* 734 */     MCD_OPC_CheckField, 0, 5, 0, 5, 0, 0, // Skip to: 746
7580
/* 741 */     MCD_OPC_Decode, 139, 15, 171, 3, // Opcode: JRC_NM
7581
/* 746 */     MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 763
7582
/* 751 */     MCD_OPC_CheckField, 0, 4, 0, 5, 0, 0, // Skip to: 763
7583
/* 758 */     MCD_OPC_Decode, 240, 14, 172, 3, // Opcode: JALRC16_NM
7584
/* 763 */     MCD_OPC_CheckPredicate, 112, 50, 0, 0, // Skip to: 818
7585
/* 768 */     MCD_OPC_Decode, 191, 7, 173, 3, // Opcode: BEQC16_NM
7586
/* 773 */     MCD_OPC_FilterValue, 60, 10, 0, 0, // Skip to: 788
7587
/* 778 */     MCD_OPC_CheckPredicate, 112, 35, 0, 0, // Skip to: 818
7588
/* 783 */     MCD_OPC_Decode, 223, 6, 174, 3, // Opcode: ANDI16_NM
7589
/* 788 */     MCD_OPC_FilterValue, 61, 10, 0, 0, // Skip to: 803
7590
/* 793 */     MCD_OPC_CheckPredicate, 112, 20, 0, 0, // Skip to: 818
7591
/* 798 */     MCD_OPC_Decode, 132, 23, 175, 3, // Opcode: SW4x4_NM
7592
/* 803 */     MCD_OPC_FilterValue, 63, 10, 0, 0, // Skip to: 818
7593
/* 808 */     MCD_OPC_CheckPredicate, 112, 5, 0, 0, // Skip to: 818
7594
/* 813 */     MCD_OPC_Decode, 211, 17, 176, 3, // Opcode: MOVEPREV_NM
7595
/* 818 */     MCD_OPC_Fail,
7596
  0
7597
};
7598
7599
static const uint8_t DecoderTableNanoMips32[] = {
7600
/* 0 */       MCD_OPC_ExtractField, 26, 6,  // Inst{31-26} ...
7601
/* 3 */       MCD_OPC_FilterValue, 0, 75, 0, 0, // Skip to: 83
7602
/* 8 */       MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 25
7603
/* 13 */      MCD_OPC_CheckField, 18, 8, 2, 5, 0, 0, // Skip to: 25
7604
/* 20 */      MCD_OPC_Decode, 185, 23, 177, 3, // Opcode: SYSCALL_NM
7605
/* 25 */      MCD_OPC_ExtractField, 19, 7,  // Inst{25-19} ...
7606
/* 28 */      MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 43
7607
/* 33 */      MCD_OPC_CheckPredicate, 112, 35, 0, 0, // Skip to: 73
7608
/* 38 */      MCD_OPC_Decode, 210, 21, 178, 3, // Opcode: SIGRIE_NM
7609
/* 43 */      MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 58
7610
/* 48 */      MCD_OPC_CheckPredicate, 112, 20, 0, 0, // Skip to: 73
7611
/* 53 */      MCD_OPC_Decode, 217, 8, 178, 3, // Opcode: BREAK_NM
7612
/* 58 */      MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 73
7613
/* 63 */      MCD_OPC_CheckPredicate, 112, 5, 0, 0, // Skip to: 73
7614
/* 68 */      MCD_OPC_Decode, 225, 20, 178, 3, // Opcode: SDBBP_NM
7615
/* 73 */      MCD_OPC_CheckPredicate, 112, 165, 12, 0, // Skip to: 3315
7616
/* 78 */      MCD_OPC_Decode, 140, 6, 179, 3, // Opcode: ADDIU_NM
7617
/* 83 */      MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 98
7618
/* 88 */      MCD_OPC_CheckPredicate, 112, 150, 12, 0, // Skip to: 3315
7619
/* 93 */      MCD_OPC_Decode, 152, 15, 180, 3, // Opcode: LAPC32_NM
7620
/* 98 */      MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 113
7621
/* 103 */     MCD_OPC_CheckPredicate, 112, 135, 12, 0, // Skip to: 3315
7622
/* 108 */     MCD_OPC_Decode, 210, 17, 181, 3, // Opcode: MOVEBALC_NM
7623
/* 113 */     MCD_OPC_FilterValue, 8, 55, 6, 0, // Skip to: 1709
7624
/* 118 */     MCD_OPC_ExtractField, 4, 2,  // Inst{5-4} ...
7625
/* 121 */     MCD_OPC_FilterValue, 0, 64, 1, 0, // Skip to: 446
7626
/* 126 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7627
/* 129 */     MCD_OPC_FilterValue, 0, 56, 0, 0, // Skip to: 190
7628
/* 134 */     MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
7629
/* 137 */     MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 175
7630
/* 142 */     MCD_OPC_ExtractField, 10, 1,  // Inst{10} ...
7631
/* 145 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 160
7632
/* 150 */     MCD_OPC_CheckPredicate, 112, 88, 12, 0, // Skip to: 3315
7633
/* 155 */     MCD_OPC_Decode, 211, 23, 182, 3, // Opcode: TEQ_NM
7634
/* 160 */     MCD_OPC_FilterValue, 1, 78, 12, 0, // Skip to: 3315
7635
/* 165 */     MCD_OPC_CheckPredicate, 112, 73, 12, 0, // Skip to: 3315
7636
/* 170 */     MCD_OPC_Decode, 133, 24, 182, 3, // Opcode: TNE_NM
7637
/* 175 */     MCD_OPC_FilterValue, 7, 63, 12, 0, // Skip to: 3315
7638
/* 180 */     MCD_OPC_CheckPredicate, 112, 58, 12, 0, // Skip to: 3315
7639
/* 185 */     MCD_OPC_Decode, 131, 20, 183, 3, // Opcode: RDHWR_NM
7640
/* 190 */     MCD_OPC_FilterValue, 7, 198, 0, 0, // Skip to: 393
7641
/* 195 */     MCD_OPC_ExtractField, 6, 5,  // Inst{10-6} ...
7642
/* 198 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 213
7643
/* 203 */     MCD_OPC_CheckPredicate, 112, 35, 12, 0, // Skip to: 3315
7644
/* 208 */     MCD_OPC_Decode, 169, 15, 184, 3, // Opcode: LBX_NM
7645
/* 213 */     MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 228
7646
/* 218 */     MCD_OPC_CheckPredicate, 112, 20, 12, 0, // Skip to: 3315
7647
/* 223 */     MCD_OPC_Decode, 201, 20, 184, 3, // Opcode: SBX_NM
7648
/* 228 */     MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 243
7649
/* 233 */     MCD_OPC_CheckPredicate, 112, 5, 12, 0, // Skip to: 3315
7650
/* 238 */     MCD_OPC_Decode, 165, 15, 184, 3, // Opcode: LBUX_NM
7651
/* 243 */     MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 258
7652
/* 248 */     MCD_OPC_CheckPredicate, 112, 246, 11, 0, // Skip to: 3315
7653
/* 253 */     MCD_OPC_Decode, 222, 15, 184, 3, // Opcode: LHX_NM
7654
/* 258 */     MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 273
7655
/* 263 */     MCD_OPC_CheckPredicate, 112, 231, 11, 0, // Skip to: 3315
7656
/* 268 */     MCD_OPC_Decode, 220, 15, 184, 3, // Opcode: LHXS_NM
7657
/* 273 */     MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 288
7658
/* 278 */     MCD_OPC_CheckPredicate, 112, 216, 11, 0, // Skip to: 3315
7659
/* 283 */     MCD_OPC_Decode, 203, 21, 184, 3, // Opcode: SHX_NM
7660
/* 288 */     MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 303
7661
/* 293 */     MCD_OPC_CheckPredicate, 112, 201, 11, 0, // Skip to: 3315
7662
/* 298 */     MCD_OPC_Decode, 202, 21, 184, 3, // Opcode: SHXS_NM
7663
/* 303 */     MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 318
7664
/* 308 */     MCD_OPC_CheckPredicate, 112, 186, 11, 0, // Skip to: 3315
7665
/* 313 */     MCD_OPC_Decode, 216, 15, 184, 3, // Opcode: LHUX_NM
7666
/* 318 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 333
7667
/* 323 */     MCD_OPC_CheckPredicate, 112, 171, 11, 0, // Skip to: 3315
7668
/* 328 */     MCD_OPC_Decode, 215, 15, 184, 3, // Opcode: LHUXS_NM
7669
/* 333 */     MCD_OPC_FilterValue, 16, 10, 0, 0, // Skip to: 348
7670
/* 338 */     MCD_OPC_CheckPredicate, 112, 156, 11, 0, // Skip to: 3315
7671
/* 343 */     MCD_OPC_Decode, 178, 16, 184, 3, // Opcode: LWX_NM
7672
/* 348 */     MCD_OPC_FilterValue, 17, 10, 0, 0, // Skip to: 363
7673
/* 353 */     MCD_OPC_CheckPredicate, 112, 141, 11, 0, // Skip to: 3315
7674
/* 358 */     MCD_OPC_Decode, 176, 16, 184, 3, // Opcode: LWXS_NM
7675
/* 363 */     MCD_OPC_FilterValue, 18, 10, 0, 0, // Skip to: 378
7676
/* 368 */     MCD_OPC_CheckPredicate, 112, 126, 11, 0, // Skip to: 3315
7677
/* 373 */     MCD_OPC_Decode, 168, 23, 184, 3, // Opcode: SWX_NM
7678
/* 378 */     MCD_OPC_FilterValue, 19, 116, 11, 0, // Skip to: 3315
7679
/* 383 */     MCD_OPC_CheckPredicate, 112, 111, 11, 0, // Skip to: 3315
7680
/* 388 */     MCD_OPC_Decode, 167, 23, 184, 3, // Opcode: SWXS_NM
7681
/* 393 */     MCD_OPC_FilterValue, 8, 33, 0, 0, // Skip to: 431
7682
/* 398 */     MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
7683
/* 401 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 416
7684
/* 406 */     MCD_OPC_CheckPredicate, 112, 88, 11, 0, // Skip to: 3315
7685
/* 411 */     MCD_OPC_Decode, 245, 20, 185, 3, // Opcode: SEB_NM
7686
/* 416 */     MCD_OPC_FilterValue, 1, 78, 11, 0, // Skip to: 3315
7687
/* 421 */     MCD_OPC_CheckPredicate, 112, 73, 11, 0, // Skip to: 3315
7688
/* 426 */     MCD_OPC_Decode, 249, 20, 185, 3, // Opcode: SEH_NM
7689
/* 431 */     MCD_OPC_FilterValue, 15, 63, 11, 0, // Skip to: 3315
7690
/* 436 */     MCD_OPC_CheckPredicate, 112, 58, 11, 0, // Skip to: 3315
7691
/* 441 */     MCD_OPC_Decode, 249, 15, 186, 3, // Opcode: LSA_NM
7692
/* 446 */     MCD_OPC_FilterValue, 1, 161, 1, 0, // Skip to: 868
7693
/* 451 */     MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7694
/* 454 */     MCD_OPC_FilterValue, 0, 10, 1, 0, // Skip to: 725
7695
/* 459 */     MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
7696
/* 462 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 477
7697
/* 467 */     MCD_OPC_CheckPredicate, 112, 27, 11, 0, // Skip to: 3315
7698
/* 472 */     MCD_OPC_Decode, 231, 21, 187, 3, // Opcode: SLLV_NM
7699
/* 477 */     MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 492
7700
/* 482 */     MCD_OPC_CheckPredicate, 112, 12, 11, 0, // Skip to: 3315
7701
/* 487 */     MCD_OPC_Decode, 178, 22, 187, 3, // Opcode: SRLV_NM
7702
/* 492 */     MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 507
7703
/* 497 */     MCD_OPC_CheckPredicate, 112, 253, 10, 0, // Skip to: 3315
7704
/* 502 */     MCD_OPC_Decode, 153, 22, 187, 3, // Opcode: SRAV_NM
7705
/* 507 */     MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 522
7706
/* 512 */     MCD_OPC_CheckPredicate, 112, 238, 10, 0, // Skip to: 3315
7707
/* 517 */     MCD_OPC_Decode, 158, 20, 187, 3, // Opcode: ROTRV_NM
7708
/* 522 */     MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 537
7709
/* 527 */     MCD_OPC_CheckPredicate, 112, 223, 10, 0, // Skip to: 3315
7710
/* 532 */     MCD_OPC_Decode, 201, 6, 187, 3, // Opcode: ADD_NM
7711
/* 537 */     MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 552
7712
/* 542 */     MCD_OPC_CheckPredicate, 112, 208, 10, 0, // Skip to: 3315
7713
/* 547 */     MCD_OPC_Decode, 210, 6, 187, 3, // Opcode: ADDu_NM
7714
/* 552 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 567
7715
/* 557 */     MCD_OPC_CheckPredicate, 112, 193, 10, 0, // Skip to: 3315
7716
/* 562 */     MCD_OPC_Decode, 248, 22, 187, 3, // Opcode: SUB_NM
7717
/* 567 */     MCD_OPC_FilterValue, 7, 10, 0, 0, // Skip to: 582
7718
/* 572 */     MCD_OPC_CheckPredicate, 112, 178, 10, 0, // Skip to: 3315
7719
/* 577 */     MCD_OPC_Decode, 252, 22, 187, 3, // Opcode: SUBu_NM
7720
/* 582 */     MCD_OPC_FilterValue, 8, 33, 0, 0, // Skip to: 620
7721
/* 587 */     MCD_OPC_ExtractField, 10, 1,  // Inst{10} ...
7722
/* 590 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 605
7723
/* 595 */     MCD_OPC_CheckPredicate, 112, 155, 10, 0, // Skip to: 3315
7724
/* 600 */     MCD_OPC_Decode, 130, 18, 188, 3, // Opcode: MOVZ_NM
7725
/* 605 */     MCD_OPC_FilterValue, 1, 145, 10, 0, // Skip to: 3315
7726
/* 610 */     MCD_OPC_CheckPredicate, 112, 140, 10, 0, // Skip to: 3315
7727
/* 615 */     MCD_OPC_Decode, 237, 17, 188, 3, // Opcode: MOVN_NM
7728
/* 620 */     MCD_OPC_FilterValue, 9, 10, 0, 0, // Skip to: 635
7729
/* 625 */     MCD_OPC_CheckPredicate, 112, 125, 10, 0, // Skip to: 3315
7730
/* 630 */     MCD_OPC_Decode, 229, 6, 187, 3, // Opcode: AND_NM
7731
/* 635 */     MCD_OPC_FilterValue, 10, 10, 0, 0, // Skip to: 650
7732
/* 640 */     MCD_OPC_CheckPredicate, 112, 110, 10, 0, // Skip to: 3315
7733
/* 645 */     MCD_OPC_Decode, 173, 19, 187, 3, // Opcode: OR_NM
7734
/* 650 */     MCD_OPC_FilterValue, 11, 10, 0, 0, // Skip to: 665
7735
/* 655 */     MCD_OPC_CheckPredicate, 112, 95, 10, 0, // Skip to: 3315
7736
/* 660 */     MCD_OPC_Decode, 156, 19, 187, 3, // Opcode: NOR_NM
7737
/* 665 */     MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 680
7738
/* 670 */     MCD_OPC_CheckPredicate, 112, 80, 10, 0, // Skip to: 3315
7739
/* 675 */     MCD_OPC_Decode, 182, 24, 187, 3, // Opcode: XOR_NM
7740
/* 680 */     MCD_OPC_FilterValue, 13, 10, 0, 0, // Skip to: 695
7741
/* 685 */     MCD_OPC_CheckPredicate, 112, 65, 10, 0, // Skip to: 3315
7742
/* 690 */     MCD_OPC_Decode, 245, 21, 187, 3, // Opcode: SLT_NM
7743
/* 695 */     MCD_OPC_FilterValue, 14, 10, 0, 0, // Skip to: 710
7744
/* 700 */     MCD_OPC_CheckPredicate, 112, 50, 10, 0, // Skip to: 3315
7745
/* 705 */     MCD_OPC_Decode, 243, 21, 187, 3, // Opcode: SLTU_NM
7746
/* 710 */     MCD_OPC_FilterValue, 15, 40, 10, 0, // Skip to: 3315
7747
/* 715 */     MCD_OPC_CheckPredicate, 112, 35, 10, 0, // Skip to: 3315
7748
/* 720 */     MCD_OPC_Decode, 129, 22, 187, 3, // Opcode: SOV_NM
7749
/* 725 */     MCD_OPC_FilterValue, 8, 123, 0, 0, // Skip to: 853
7750
/* 730 */     MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
7751
/* 733 */     MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 748
7752
/* 738 */     MCD_OPC_CheckPredicate, 112, 12, 10, 0, // Skip to: 3315
7753
/* 743 */     MCD_OPC_Decode, 247, 18, 187, 3, // Opcode: MUL_NM
7754
/* 748 */     MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 763
7755
/* 753 */     MCD_OPC_CheckPredicate, 112, 253, 9, 0, // Skip to: 3315
7756
/* 758 */     MCD_OPC_Decode, 204, 18, 187, 3, // Opcode: MUH_NM
7757
/* 763 */     MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 778
7758
/* 768 */     MCD_OPC_CheckPredicate, 112, 238, 9, 0, // Skip to: 3315
7759
/* 773 */     MCD_OPC_Decode, 240, 18, 187, 3, // Opcode: MULU_NM
7760
/* 778 */     MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 793
7761
/* 783 */     MCD_OPC_CheckPredicate, 112, 223, 9, 0, // Skip to: 3315
7762
/* 788 */     MCD_OPC_Decode, 202, 18, 187, 3, // Opcode: MUHU_NM
7763
/* 793 */     MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 808
7764
/* 798 */     MCD_OPC_CheckPredicate, 112, 208, 9, 0, // Skip to: 3315
7765
/* 803 */     MCD_OPC_Decode, 223, 11, 187, 3, // Opcode: DIV_NM
7766
/* 808 */     MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 823
7767
/* 813 */     MCD_OPC_CheckPredicate, 112, 193, 9, 0, // Skip to: 3315
7768
/* 818 */     MCD_OPC_Decode, 199, 17, 187, 3, // Opcode: MOD_NM
7769
/* 823 */     MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 838
7770
/* 828 */     MCD_OPC_CheckPredicate, 112, 178, 9, 0, // Skip to: 3315
7771
/* 833 */     MCD_OPC_Decode, 221, 11, 187, 3, // Opcode: DIVU_NM
7772
/* 838 */     MCD_OPC_FilterValue, 7, 168, 9, 0, // Skip to: 3315
7773
/* 843 */     MCD_OPC_CheckPredicate, 112, 163, 9, 0, // Skip to: 3315
7774
/* 848 */     MCD_OPC_Decode, 197, 17, 187, 3, // Opcode: MODU_NM
7775
/* 853 */     MCD_OPC_FilterValue, 15, 153, 9, 0, // Skip to: 3315
7776
/* 858 */     MCD_OPC_CheckPredicate, 112, 148, 9, 0, // Skip to: 3315
7777
/* 863 */     MCD_OPC_Decode, 254, 12, 189, 3, // Opcode: EXTW_NM
7778
/* 868 */     MCD_OPC_FilterValue, 2, 194, 0, 0, // Skip to: 1067
7779
/* 873 */     MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
7780
/* 876 */     MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 898
7781
/* 881 */     MCD_OPC_CheckPredicate, 113, 125, 9, 0, // Skip to: 3315
7782
/* 886 */     MCD_OPC_CheckField, 0, 4, 8, 118, 9, 0, // Skip to: 3315
7783
/* 893 */     MCD_OPC_Decode, 255, 13, 190, 3, // Opcode: FORK_NM
7784
/* 898 */     MCD_OPC_FilterValue, 9, 24, 0, 0, // Skip to: 927
7785
/* 903 */     MCD_OPC_CheckPredicate, 113, 103, 9, 0, // Skip to: 3315
7786
/* 908 */     MCD_OPC_CheckField, 10, 6, 0, 96, 9, 0, // Skip to: 3315
7787
/* 915 */     MCD_OPC_CheckField, 0, 4, 8, 89, 9, 0, // Skip to: 3315
7788
/* 922 */     MCD_OPC_Decode, 189, 24, 185, 3, // Opcode: YIELD_NM
7789
/* 927 */     MCD_OPC_FilterValue, 15, 79, 9, 0, // Skip to: 3315
7790
/* 932 */     MCD_OPC_ExtractField, 10, 3,  // Inst{12-10} ...
7791
/* 935 */     MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 957
7792
/* 940 */     MCD_OPC_CheckPredicate, 114, 66, 9, 0, // Skip to: 3315
7793
/* 945 */     MCD_OPC_CheckField, 0, 4, 8, 59, 9, 0, // Skip to: 3315
7794
/* 952 */     MCD_OPC_Decode, 166, 10, 191, 3, // Opcode: CRC32B_NM
7795
/* 957 */     MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 979
7796
/* 962 */     MCD_OPC_CheckPredicate, 114, 44, 9, 0, // Skip to: 3315
7797
/* 967 */     MCD_OPC_CheckField, 0, 4, 8, 37, 9, 0, // Skip to: 3315
7798
/* 974 */     MCD_OPC_Decode, 176, 10, 191, 3, // Opcode: CRC32H_NM
7799
/* 979 */     MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 1001
7800
/* 984 */     MCD_OPC_CheckPredicate, 114, 22, 9, 0, // Skip to: 3315
7801
/* 989 */     MCD_OPC_CheckField, 0, 4, 8, 15, 9, 0, // Skip to: 3315
7802
/* 996 */     MCD_OPC_Decode, 178, 10, 191, 3, // Opcode: CRC32W_NM
7803
/* 1001 */    MCD_OPC_FilterValue, 4, 17, 0, 0, // Skip to: 1023
7804
/* 1006 */    MCD_OPC_CheckPredicate, 114, 0, 9, 0, // Skip to: 3315
7805
/* 1011 */    MCD_OPC_CheckField, 0, 4, 8, 249, 8, 0, // Skip to: 3315
7806
/* 1018 */    MCD_OPC_Decode, 168, 10, 191, 3, // Opcode: CRC32CB_NM
7807
/* 1023 */    MCD_OPC_FilterValue, 5, 17, 0, 0, // Skip to: 1045
7808
/* 1028 */    MCD_OPC_CheckPredicate, 114, 234, 8, 0, // Skip to: 3315
7809
/* 1033 */    MCD_OPC_CheckField, 0, 4, 8, 227, 8, 0, // Skip to: 3315
7810
/* 1040 */    MCD_OPC_Decode, 171, 10, 191, 3, // Opcode: CRC32CH_NM
7811
/* 1045 */    MCD_OPC_FilterValue, 6, 217, 8, 0, // Skip to: 3315
7812
/* 1050 */    MCD_OPC_CheckPredicate, 114, 212, 8, 0, // Skip to: 3315
7813
/* 1055 */    MCD_OPC_CheckField, 0, 4, 8, 205, 8, 0, // Skip to: 3315
7814
/* 1062 */    MCD_OPC_Decode, 173, 10, 191, 3, // Opcode: CRC32CW_NM
7815
/* 1067 */    MCD_OPC_FilterValue, 3, 195, 8, 0, // Skip to: 3315
7816
/* 1072 */    MCD_OPC_ExtractField, 6, 4,  // Inst{9-6} ...
7817
/* 1075 */    MCD_OPC_FilterValue, 0, 33, 0, 0, // Skip to: 1113
7818
/* 1080 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7819
/* 1083 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1098
7820
/* 1088 */    MCD_OPC_CheckPredicate, 112, 174, 8, 0, // Skip to: 3315
7821
/* 1093 */    MCD_OPC_Decode, 129, 17, 192, 3, // Opcode: MFC0Sel_NM
7822
/* 1098 */    MCD_OPC_FilterValue, 8, 164, 8, 0, // Skip to: 3315
7823
/* 1103 */    MCD_OPC_CheckPredicate, 112, 159, 8, 0, // Skip to: 3315
7824
/* 1108 */    MCD_OPC_Decode, 140, 17, 192, 3, // Opcode: MFHC0Sel_NM
7825
/* 1113 */    MCD_OPC_FilterValue, 1, 33, 0, 0, // Skip to: 1151
7826
/* 1118 */    MCD_OPC_ExtractField, 0, 4,  // Inst{3-0} ...
7827
/* 1121 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1136
7828
/* 1126 */    MCD_OPC_CheckPredicate, 112, 136, 8, 0, // Skip to: 3315
7829
/* 1131 */    MCD_OPC_Decode, 157, 18, 192, 3, // Opcode: MTC0Sel_NM
7830
/* 1136 */    MCD_OPC_FilterValue, 8, 126, 8, 0, // Skip to: 3315
7831
/* 1141 */    MCD_OPC_CheckPredicate, 112, 121, 8, 0, // Skip to: 3315
7832
/* 1146 */    MCD_OPC_Decode, 169, 18, 192, 3, // Opcode: MTHC0Sel_NM
7833
/* 1151 */    MCD_OPC_FilterValue, 5, 47, 0, 0, // Skip to: 1203
7834
/* 1156 */    MCD_OPC_ExtractField, 10, 6,  // Inst{15-10} ...
7835
/* 1159 */    MCD_OPC_FilterValue, 56, 17, 0, 0, // Skip to: 1181
7836
/* 1164 */    MCD_OPC_CheckPredicate, 112, 98, 8, 0, // Skip to: 3315
7837
/* 1169 */    MCD_OPC_CheckField, 0, 4, 15, 91, 8, 0, // Skip to: 3315
7838
/* 1176 */    MCD_OPC_Decode, 133, 20, 185, 3, // Opcode: RDPGPR_NM
7839
/* 1181 */    MCD_OPC_FilterValue, 60, 81, 8, 0, // Skip to: 3315
7840
/* 1186 */    MCD_OPC_CheckPredicate, 112, 76, 8, 0, // Skip to: 3315
7841
/* 1191 */    MCD_OPC_CheckField, 0, 4, 15, 69, 8, 0, // Skip to: 3315
7842
/* 1198 */    MCD_OPC_Decode, 168, 24, 185, 3, // Opcode: WRPGPR_NM
7843
/* 1203 */    MCD_OPC_FilterValue, 8, 17, 0, 0, // Skip to: 1225
7844
/* 1208 */    MCD_OPC_CheckPredicate, 113, 54, 8, 0, // Skip to: 3315
7845
/* 1213 */    MCD_OPC_CheckField, 0, 3, 0, 47, 8, 0, // Skip to: 3315
7846
/* 1220 */    MCD_OPC_Decode, 163, 17, 193, 3, // Opcode: MFTR_NM
7847
/* 1225 */    MCD_OPC_FilterValue, 9, 17, 0, 0, // Skip to: 1247
7848
/* 1230 */    MCD_OPC_CheckPredicate, 113, 32, 8, 0, // Skip to: 3315
7849
/* 1235 */    MCD_OPC_CheckField, 0, 3, 0, 25, 8, 0, // Skip to: 3315
7850
/* 1242 */    MCD_OPC_Decode, 198, 18, 194, 3, // Opcode: MTTR_NM
7851
/* 1247 */    MCD_OPC_FilterValue, 10, 91, 0, 0, // Skip to: 1343
7852
/* 1252 */    MCD_OPC_ExtractField, 10, 11,  // Inst{20-10} ...
7853
/* 1255 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 1277
7854
/* 1260 */    MCD_OPC_CheckPredicate, 113, 2, 8, 0, // Skip to: 3315
7855
/* 1265 */    MCD_OPC_CheckField, 0, 4, 0, 251, 7, 0, // Skip to: 3315
7856
/* 1272 */    MCD_OPC_Decode, 202, 12, 195, 3, // Opcode: DVPE_NM
7857
/* 1277 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 1299
7858
/* 1282 */    MCD_OPC_CheckPredicate, 113, 236, 7, 0, // Skip to: 3315
7859
/* 1287 */    MCD_OPC_CheckField, 0, 4, 0, 229, 7, 0, // Skip to: 3315
7860
/* 1294 */    MCD_OPC_Decode, 225, 12, 195, 3, // Opcode: EVPE_NM
7861
/* 1299 */    MCD_OPC_FilterValue, 66, 17, 0, 0, // Skip to: 1321
7862
/* 1304 */    MCD_OPC_CheckPredicate, 113, 214, 7, 0, // Skip to: 3315
7863
/* 1309 */    MCD_OPC_CheckField, 0, 4, 0, 207, 7, 0, // Skip to: 3315
7864
/* 1316 */    MCD_OPC_Decode, 250, 11, 195, 3, // Opcode: DMT_NM
7865
/* 1321 */    MCD_OPC_FilterValue, 67, 197, 7, 0, // Skip to: 3315
7866
/* 1326 */    MCD_OPC_CheckPredicate, 113, 192, 7, 0, // Skip to: 3315
7867
/* 1331 */    MCD_OPC_CheckField, 0, 4, 0, 185, 7, 0, // Skip to: 3315
7868
/* 1338 */    MCD_OPC_Decode, 215, 12, 195, 3, // Opcode: EMT_NM
7869
/* 1343 */    MCD_OPC_FilterValue, 12, 47, 0, 0, // Skip to: 1395
7870
/* 1348 */    MCD_OPC_ExtractField, 10, 6,  // Inst{15-10} ...
7871
/* 1351 */    MCD_OPC_FilterValue, 18, 17, 0, 0, // Skip to: 1373
7872
/* 1356 */    MCD_OPC_CheckPredicate, 112, 162, 7, 0, // Skip to: 3315
7873
/* 1361 */    MCD_OPC_CheckField, 0, 4, 15, 155, 7, 0, // Skip to: 3315
7874
/* 1368 */    MCD_OPC_Decode, 175, 9, 185, 3, // Opcode: CLO_NM
7875
/* 1373 */    MCD_OPC_FilterValue, 22, 145, 7, 0, // Skip to: 3315
7876
/* 1378 */    MCD_OPC_CheckPredicate, 112, 140, 7, 0, // Skip to: 3315
7877
/* 1383 */    MCD_OPC_CheckField, 0, 4, 15, 133, 7, 0, // Skip to: 3315
7878
/* 1390 */    MCD_OPC_Decode, 196, 9, 185, 3, // Opcode: CLZ_NM
7879
/* 1395 */    MCD_OPC_FilterValue, 13, 123, 7, 0, // Skip to: 3315
7880
/* 1400 */    MCD_OPC_ExtractField, 10, 6,  // Inst{15-10} ...
7881
/* 1403 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1424
7882
/* 1408 */    MCD_OPC_CheckPredicate, 115, 110, 7, 0, // Skip to: 3315
7883
/* 1413 */    MCD_OPC_CheckField, 0, 4, 15, 103, 7, 0, // Skip to: 3315
7884
/* 1420 */    MCD_OPC_Decode, 240, 23, 10, // Opcode: TLBP_NM
7885
/* 1424 */    MCD_OPC_FilterValue, 1, 16, 0, 0, // Skip to: 1445
7886
/* 1429 */    MCD_OPC_CheckPredicate, 115, 89, 7, 0, // Skip to: 3315
7887
/* 1434 */    MCD_OPC_CheckField, 0, 4, 15, 82, 7, 0, // Skip to: 3315
7888
/* 1441 */    MCD_OPC_Decode, 237, 23, 10, // Opcode: TLBINV_NM
7889
/* 1445 */    MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 1467
7890
/* 1450 */    MCD_OPC_CheckPredicate, 116, 68, 7, 0, // Skip to: 3315
7891
/* 1455 */    MCD_OPC_CheckField, 0, 4, 15, 61, 7, 0, // Skip to: 3315
7892
/* 1462 */    MCD_OPC_Decode, 189, 14, 196, 3, // Opcode: GINVT_NM
7893
/* 1467 */    MCD_OPC_FilterValue, 4, 16, 0, 0, // Skip to: 1488
7894
/* 1472 */    MCD_OPC_CheckPredicate, 115, 46, 7, 0, // Skip to: 3315
7895
/* 1477 */    MCD_OPC_CheckField, 0, 4, 15, 39, 7, 0, // Skip to: 3315
7896
/* 1484 */    MCD_OPC_Decode, 243, 23, 10, // Opcode: TLBR_NM
7897
/* 1488 */    MCD_OPC_FilterValue, 5, 16, 0, 0, // Skip to: 1509
7898
/* 1493 */    MCD_OPC_CheckPredicate, 115, 25, 7, 0, // Skip to: 3315
7899
/* 1498 */    MCD_OPC_CheckField, 0, 4, 15, 18, 7, 0, // Skip to: 3315
7900
/* 1505 */    MCD_OPC_Decode, 235, 23, 10, // Opcode: TLBINVF_NM
7901
/* 1509 */    MCD_OPC_FilterValue, 7, 17, 0, 0, // Skip to: 1531
7902
/* 1514 */    MCD_OPC_CheckPredicate, 116, 4, 7, 0, // Skip to: 3315
7903
/* 1519 */    MCD_OPC_CheckField, 0, 4, 15, 253, 6, 0, // Skip to: 3315
7904
/* 1526 */    MCD_OPC_Decode, 186, 14, 197, 3, // Opcode: GINVI_NM
7905
/* 1531 */    MCD_OPC_FilterValue, 8, 16, 0, 0, // Skip to: 1552
7906
/* 1536 */    MCD_OPC_CheckPredicate, 115, 238, 6, 0, // Skip to: 3315
7907
/* 1541 */    MCD_OPC_CheckField, 0, 4, 15, 231, 6, 0, // Skip to: 3315
7908
/* 1548 */    MCD_OPC_Decode, 246, 23, 10, // Opcode: TLBWI_NM
7909
/* 1552 */    MCD_OPC_FilterValue, 12, 16, 0, 0, // Skip to: 1573
7910
/* 1557 */    MCD_OPC_CheckPredicate, 115, 217, 6, 0, // Skip to: 3315
7911
/* 1562 */    MCD_OPC_CheckField, 0, 4, 15, 210, 6, 0, // Skip to: 3315
7912
/* 1569 */    MCD_OPC_Decode, 249, 23, 10, // Opcode: TLBWR_NM
7913
/* 1573 */    MCD_OPC_FilterValue, 17, 17, 0, 0, // Skip to: 1595
7914
/* 1578 */    MCD_OPC_CheckPredicate, 112, 196, 6, 0, // Skip to: 3315
7915
/* 1583 */    MCD_OPC_CheckField, 0, 4, 15, 189, 6, 0, // Skip to: 3315
7916
/* 1590 */    MCD_OPC_Decode, 234, 11, 195, 3, // Opcode: DI_NM
7917
/* 1595 */    MCD_OPC_FilterValue, 21, 17, 0, 0, // Skip to: 1617
7918
/* 1600 */    MCD_OPC_CheckPredicate, 112, 174, 6, 0, // Skip to: 3315
7919
/* 1605 */    MCD_OPC_CheckField, 0, 4, 15, 167, 6, 0, // Skip to: 3315
7920
/* 1612 */    MCD_OPC_Decode, 213, 12, 195, 3, // Opcode: EI_NM
7921
/* 1617 */    MCD_OPC_FilterValue, 48, 16, 0, 0, // Skip to: 1638
7922
/* 1622 */    MCD_OPC_CheckPredicate, 112, 152, 6, 0, // Skip to: 3315
7923
/* 1627 */    MCD_OPC_CheckField, 0, 4, 15, 145, 6, 0, // Skip to: 3315
7924
/* 1634 */    MCD_OPC_Decode, 164, 24, 88, // Opcode: WAIT_NM
7925
/* 1638 */    MCD_OPC_FilterValue, 56, 16, 0, 0, // Skip to: 1659
7926
/* 1643 */    MCD_OPC_CheckPredicate, 112, 131, 6, 0, // Skip to: 3315
7927
/* 1648 */    MCD_OPC_CheckField, 0, 4, 15, 124, 6, 0, // Skip to: 3315
7928
/* 1655 */    MCD_OPC_Decode, 209, 11, 10, // Opcode: DERET_NM
7929
/* 1659 */    MCD_OPC_FilterValue, 60, 115, 6, 0, // Skip to: 3315
7930
/* 1664 */    MCD_OPC_ExtractField, 16, 1,  // Inst{16} ...
7931
/* 1667 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 1688
7932
/* 1672 */    MCD_OPC_CheckPredicate, 112, 102, 6, 0, // Skip to: 3315
7933
/* 1677 */    MCD_OPC_CheckField, 0, 4, 15, 95, 6, 0, // Skip to: 3315
7934
/* 1684 */    MCD_OPC_Decode, 222, 12, 10, // Opcode: ERET_NM
7935
/* 1688 */    MCD_OPC_FilterValue, 1, 86, 6, 0, // Skip to: 3315
7936
/* 1693 */    MCD_OPC_CheckPredicate, 112, 81, 6, 0, // Skip to: 3315
7937
/* 1698 */    MCD_OPC_CheckField, 0, 4, 15, 74, 6, 0, // Skip to: 3315
7938
/* 1705 */    MCD_OPC_Decode, 219, 12, 10, // Opcode: ERETNC_NM
7939
/* 1709 */    MCD_OPC_FilterValue, 10, 33, 0, 0, // Skip to: 1747
7940
/* 1714 */    MCD_OPC_ExtractField, 25, 1,  // Inst{25} ...
7941
/* 1717 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1732
7942
/* 1722 */    MCD_OPC_CheckPredicate, 112, 52, 6, 0, // Skip to: 3315
7943
/* 1727 */    MCD_OPC_Decode, 187, 7, 198, 3, // Opcode: BC_NM
7944
/* 1732 */    MCD_OPC_FilterValue, 1, 42, 6, 0, // Skip to: 3315
7945
/* 1737 */    MCD_OPC_CheckPredicate, 112, 37, 6, 0, // Skip to: 3315
7946
/* 1742 */    MCD_OPC_Decode, 151, 7, 198, 3, // Opcode: BALC_NM
7947
/* 1747 */    MCD_OPC_FilterValue, 16, 48, 0, 0, // Skip to: 1800
7948
/* 1752 */    MCD_OPC_ExtractField, 0, 2,  // Inst{1-0} ...
7949
/* 1755 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1770
7950
/* 1760 */    MCD_OPC_CheckPredicate, 112, 14, 6, 0, // Skip to: 3315
7951
/* 1765 */    MCD_OPC_Decode, 255, 5, 199, 3, // Opcode: ADDIUGPW_NM
7952
/* 1770 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1785
7953
/* 1775 */    MCD_OPC_CheckPredicate, 112, 255, 5, 0, // Skip to: 3315
7954
/* 1780 */    MCD_OPC_Decode, 148, 16, 200, 3, // Opcode: LWGP_NM
7955
/* 1785 */    MCD_OPC_FilterValue, 3, 245, 5, 0, // Skip to: 3315
7956
/* 1790 */    MCD_OPC_CheckPredicate, 112, 240, 5, 0, // Skip to: 3315
7957
/* 1795 */    MCD_OPC_Decode, 145, 23, 200, 3, // Opcode: SWGP_NM
7958
/* 1800 */    MCD_OPC_FilterValue, 17, 123, 0, 0, // Skip to: 1928
7959
/* 1805 */    MCD_OPC_ExtractField, 18, 3,  // Inst{20-18} ...
7960
/* 1808 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1823
7961
/* 1813 */    MCD_OPC_CheckPredicate, 112, 217, 5, 0, // Skip to: 3315
7962
/* 1818 */    MCD_OPC_Decode, 159, 15, 201, 3, // Opcode: LBGP_NM
7963
/* 1823 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 1838
7964
/* 1828 */    MCD_OPC_CheckPredicate, 112, 202, 5, 0, // Skip to: 3315
7965
/* 1833 */    MCD_OPC_Decode, 200, 20, 201, 3, // Opcode: SBGP_NM
7966
/* 1838 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 1853
7967
/* 1843 */    MCD_OPC_CheckPredicate, 112, 187, 5, 0, // Skip to: 3315
7968
/* 1848 */    MCD_OPC_Decode, 162, 15, 201, 3, // Opcode: LBUGP_NM
7969
/* 1853 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 1868
7970
/* 1858 */    MCD_OPC_CheckPredicate, 112, 172, 5, 0, // Skip to: 3315
7971
/* 1863 */    MCD_OPC_Decode, 254, 5, 202, 3, // Opcode: ADDIUGPB_NM
7972
/* 1868 */    MCD_OPC_FilterValue, 4, 33, 0, 0, // Skip to: 1906
7973
/* 1873 */    MCD_OPC_ExtractField, 0, 1,  // Inst{0} ...
7974
/* 1876 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1891
7975
/* 1881 */    MCD_OPC_CheckPredicate, 112, 149, 5, 0, // Skip to: 3315
7976
/* 1886 */    MCD_OPC_Decode, 211, 15, 203, 3, // Opcode: LHGP_NM
7977
/* 1891 */    MCD_OPC_FilterValue, 1, 139, 5, 0, // Skip to: 3315
7978
/* 1896 */    MCD_OPC_CheckPredicate, 112, 134, 5, 0, // Skip to: 3315
7979
/* 1901 */    MCD_OPC_Decode, 214, 15, 203, 3, // Opcode: LHUGP_NM
7980
/* 1906 */    MCD_OPC_FilterValue, 5, 124, 5, 0, // Skip to: 3315
7981
/* 1911 */    MCD_OPC_CheckPredicate, 112, 119, 5, 0, // Skip to: 3315
7982
/* 1916 */    MCD_OPC_CheckField, 0, 1, 0, 112, 5, 0, // Skip to: 3315
7983
/* 1923 */    MCD_OPC_Decode, 153, 21, 203, 3, // Opcode: SHGP_NM
7984
/* 1928 */    MCD_OPC_FilterValue, 18, 65, 0, 0, // Skip to: 1998
7985
/* 1933 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
7986
/* 1936 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 1951
7987
/* 1941 */    MCD_OPC_CheckPredicate, 112, 89, 5, 0, // Skip to: 3315
7988
/* 1946 */    MCD_OPC_Decode, 244, 14, 185, 3, // Opcode: JALRC_NM
7989
/* 1951 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 1966
7990
/* 1956 */    MCD_OPC_CheckPredicate, 112, 74, 5, 0, // Skip to: 3315
7991
/* 1961 */    MCD_OPC_Decode, 241, 14, 185, 3, // Opcode: JALRCHB_NM
7992
/* 1966 */    MCD_OPC_FilterValue, 8, 64, 5, 0, // Skip to: 3315
7993
/* 1971 */    MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 1988
7994
/* 1976 */    MCD_OPC_CheckField, 21, 5, 0, 5, 0, 0, // Skip to: 1988
7995
/* 1983 */    MCD_OPC_Decode, 218, 8, 197, 3, // Opcode: BRSC_NM
7996
/* 1988 */    MCD_OPC_CheckPredicate, 112, 42, 5, 0, // Skip to: 3315
7997
/* 1993 */    MCD_OPC_Decode, 154, 7, 204, 3, // Opcode: BALRSC_NM
7998
/* 1998 */    MCD_OPC_FilterValue, 32, 217, 1, 0, // Skip to: 2476
7999
/* 2003 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8000
/* 2006 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2021
8001
/* 2011 */    MCD_OPC_CheckPredicate, 112, 19, 5, 0, // Skip to: 3315
8002
/* 2016 */    MCD_OPC_Decode, 170, 19, 205, 3, // Opcode: ORI_NM
8003
/* 2021 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2036
8004
/* 2026 */    MCD_OPC_CheckPredicate, 112, 4, 5, 0, // Skip to: 3315
8005
/* 2031 */    MCD_OPC_Decode, 179, 24, 205, 3, // Opcode: XORI_NM
8006
/* 2036 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2051
8007
/* 2041 */    MCD_OPC_CheckPredicate, 112, 245, 4, 0, // Skip to: 3315
8008
/* 2046 */    MCD_OPC_Decode, 226, 6, 205, 3, // Opcode: ANDI_NM
8009
/* 2051 */    MCD_OPC_FilterValue, 3, 69, 0, 0, // Skip to: 2125
8010
/* 2056 */    MCD_OPC_ExtractField, 0, 2,  // Inst{1-0} ...
8011
/* 2059 */    MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 2081
8012
/* 2064 */    MCD_OPC_CheckPredicate, 112, 222, 4, 0, // Skip to: 3315
8013
/* 2069 */    MCD_OPC_CheckField, 20, 1, 0, 215, 4, 0, // Skip to: 3315
8014
/* 2076 */    MCD_OPC_Decode, 192, 20, 206, 3, // Opcode: SAVE_NM
8015
/* 2081 */    MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 2103
8016
/* 2086 */    MCD_OPC_CheckPredicate, 112, 200, 4, 0, // Skip to: 3315
8017
/* 2091 */    MCD_OPC_CheckField, 20, 1, 0, 193, 4, 0, // Skip to: 3315
8018
/* 2098 */    MCD_OPC_Decode, 150, 20, 206, 3, // Opcode: RESTORE_NM
8019
/* 2103 */    MCD_OPC_FilterValue, 3, 183, 4, 0, // Skip to: 3315
8020
/* 2108 */    MCD_OPC_CheckPredicate, 112, 178, 4, 0, // Skip to: 3315
8021
/* 2113 */    MCD_OPC_CheckField, 20, 1, 0, 171, 4, 0, // Skip to: 3315
8022
/* 2120 */    MCD_OPC_Decode, 149, 20, 206, 3, // Opcode: RESTOREJRC_NM
8023
/* 2125 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 2140
8024
/* 2130 */    MCD_OPC_CheckPredicate, 112, 156, 4, 0, // Skip to: 3315
8025
/* 2135 */    MCD_OPC_Decode, 242, 21, 205, 3, // Opcode: SLTI_NM
8026
/* 2140 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 2155
8027
/* 2145 */    MCD_OPC_CheckPredicate, 112, 141, 4, 0, // Skip to: 3315
8028
/* 2150 */    MCD_OPC_Decode, 241, 21, 205, 3, // Opcode: SLTIU_NM
8029
/* 2155 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 2170
8030
/* 2160 */    MCD_OPC_CheckPredicate, 112, 126, 4, 0, // Skip to: 3315
8031
/* 2165 */    MCD_OPC_Decode, 141, 21, 205, 3, // Opcode: SEQI_NM
8032
/* 2170 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 2185
8033
/* 2175 */    MCD_OPC_CheckPredicate, 112, 111, 4, 0, // Skip to: 3315
8034
/* 2180 */    MCD_OPC_Decode, 128, 6, 207, 3, // Opcode: ADDIUNEG_NM
8035
/* 2185 */    MCD_OPC_FilterValue, 12, 150, 0, 0, // Skip to: 2340
8036
/* 2190 */    MCD_OPC_ExtractField, 5, 4,  // Inst{8-5} ...
8037
/* 2193 */    MCD_OPC_FilterValue, 0, 97, 0, 0, // Skip to: 2295
8038
/* 2198 */    MCD_OPC_ExtractField, 0, 5,  // Inst{4-0} ...
8039
/* 2201 */    MCD_OPC_FilterValue, 0, 16, 0, 0, // Skip to: 2222
8040
/* 2206 */    MCD_OPC_CheckPredicate, 112, 74, 0, 0, // Skip to: 2285
8041
/* 2211 */    MCD_OPC_CheckField, 16, 10, 0, 67, 0, 0, // Skip to: 2285
8042
/* 2218 */    MCD_OPC_Decode, 149, 19, 10, // Opcode: NOP32_NM
8043
/* 2222 */    MCD_OPC_FilterValue, 3, 16, 0, 0, // Skip to: 2243
8044
/* 2227 */    MCD_OPC_CheckPredicate, 112, 53, 0, 0, // Skip to: 2285
8045
/* 2232 */    MCD_OPC_CheckField, 16, 10, 0, 46, 0, 0, // Skip to: 2285
8046
/* 2239 */    MCD_OPC_Decode, 209, 12, 10, // Opcode: EHB_NM
8047
/* 2243 */    MCD_OPC_FilterValue, 5, 16, 0, 0, // Skip to: 2264
8048
/* 2248 */    MCD_OPC_CheckPredicate, 112, 32, 0, 0, // Skip to: 2285
8049
/* 2253 */    MCD_OPC_CheckField, 16, 10, 0, 25, 0, 0, // Skip to: 2285
8050
/* 2260 */    MCD_OPC_Decode, 184, 19, 10, // Opcode: PAUSE_NM
8051
/* 2264 */    MCD_OPC_FilterValue, 6, 16, 0, 0, // Skip to: 2285
8052
/* 2269 */    MCD_OPC_CheckPredicate, 112, 11, 0, 0, // Skip to: 2285
8053
/* 2274 */    MCD_OPC_CheckField, 21, 5, 0, 4, 0, 0, // Skip to: 2285
8054
/* 2281 */    MCD_OPC_Decode, 181, 23, 87, // Opcode: SYNC_NM
8055
/* 2285 */    MCD_OPC_CheckPredicate, 112, 1, 4, 0, // Skip to: 3315
8056
/* 2290 */    MCD_OPC_Decode, 237, 21, 208, 3, // Opcode: SLL_NM
8057
/* 2295 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2310
8058
/* 2300 */    MCD_OPC_CheckPredicate, 112, 242, 3, 0, // Skip to: 3315
8059
/* 2305 */    MCD_OPC_Decode, 183, 22, 208, 3, // Opcode: SRL_NM
8060
/* 2310 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 2325
8061
/* 2315 */    MCD_OPC_CheckPredicate, 112, 227, 3, 0, // Skip to: 3315
8062
/* 2320 */    MCD_OPC_Decode, 158, 22, 208, 3, // Opcode: SRA_NM
8063
/* 2325 */    MCD_OPC_FilterValue, 6, 217, 3, 0, // Skip to: 3315
8064
/* 2330 */    MCD_OPC_CheckPredicate, 112, 212, 3, 0, // Skip to: 3315
8065
/* 2335 */    MCD_OPC_Decode, 160, 20, 208, 3, // Opcode: ROTR_NM
8066
/* 2340 */    MCD_OPC_FilterValue, 13, 73, 0, 0, // Skip to: 2418
8067
/* 2345 */    MCD_OPC_ExtractField, 5, 1,  // Inst{5} ...
8068
/* 2348 */    MCD_OPC_FilterValue, 0, 194, 3, 0, // Skip to: 3315
8069
/* 2353 */    MCD_OPC_ExtractField, 11, 1,  // Inst{11} ...
8070
/* 2356 */    MCD_OPC_FilterValue, 0, 186, 3, 0, // Skip to: 3315
8071
/* 2361 */    MCD_OPC_ExtractField, 0, 5,  // Inst{4-0} ...
8072
/* 2364 */    MCD_OPC_FilterValue, 24, 17, 0, 0, // Skip to: 2386
8073
/* 2369 */    MCD_OPC_CheckPredicate, 112, 34, 0, 0, // Skip to: 2408
8074
/* 2374 */    MCD_OPC_CheckField, 6, 5, 8, 27, 0, 0, // Skip to: 2408
8075
/* 2381 */    MCD_OPC_Decode, 229, 8, 185, 3, // Opcode: BYTEREVW_NM
8076
/* 2386 */    MCD_OPC_FilterValue, 31, 17, 0, 0, // Skip to: 2408
8077
/* 2391 */    MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 2408
8078
/* 2396 */    MCD_OPC_CheckField, 6, 5, 0, 5, 0, 0, // Skip to: 2408
8079
/* 2403 */    MCD_OPC_Decode, 130, 8, 185, 3, // Opcode: BITREVW_NM
8080
/* 2408 */    MCD_OPC_CheckPredicate, 112, 134, 3, 0, // Skip to: 3315
8081
/* 2413 */    MCD_OPC_Decode, 161, 20, 209, 3, // Opcode: ROTX_NM
8082
/* 2418 */    MCD_OPC_FilterValue, 14, 24, 0, 0, // Skip to: 2447
8083
/* 2423 */    MCD_OPC_CheckPredicate, 112, 119, 3, 0, // Skip to: 3315
8084
/* 2428 */    MCD_OPC_CheckField, 11, 1, 0, 112, 3, 0, // Skip to: 3315
8085
/* 2435 */    MCD_OPC_CheckField, 5, 1, 0, 105, 3, 0, // Skip to: 3315
8086
/* 2442 */    MCD_OPC_Decode, 233, 14, 210, 3, // Opcode: INS_NM
8087
/* 2447 */    MCD_OPC_FilterValue, 15, 95, 3, 0, // Skip to: 3315
8088
/* 2452 */    MCD_OPC_CheckPredicate, 112, 90, 3, 0, // Skip to: 3315
8089
/* 2457 */    MCD_OPC_CheckField, 11, 1, 0, 83, 3, 0, // Skip to: 3315
8090
/* 2464 */    MCD_OPC_CheckField, 5, 1, 0, 76, 3, 0, // Skip to: 3315
8091
/* 2471 */    MCD_OPC_Decode, 129, 13, 211, 3, // Opcode: EXT_NM
8092
/* 2476 */    MCD_OPC_FilterValue, 33, 155, 0, 0, // Skip to: 2636
8093
/* 2481 */    MCD_OPC_ExtractField, 12, 4,  // Inst{15-12} ...
8094
/* 2484 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2499
8095
/* 2489 */    MCD_OPC_CheckPredicate, 112, 53, 3, 0, // Skip to: 3315
8096
/* 2494 */    MCD_OPC_Decode, 172, 15, 212, 3, // Opcode: LB_NM
8097
/* 2499 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2514
8098
/* 2504 */    MCD_OPC_CheckPredicate, 112, 38, 3, 0, // Skip to: 3315
8099
/* 2509 */    MCD_OPC_Decode, 204, 20, 212, 3, // Opcode: SB_NM
8100
/* 2514 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2529
8101
/* 2519 */    MCD_OPC_CheckPredicate, 112, 23, 3, 0, // Skip to: 3315
8102
/* 2524 */    MCD_OPC_Decode, 167, 15, 212, 3, // Opcode: LBU_NM
8103
/* 2529 */    MCD_OPC_FilterValue, 3, 27, 0, 0, // Skip to: 2561
8104
/* 2534 */    MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 2551
8105
/* 2539 */    MCD_OPC_CheckField, 21, 5, 31, 5, 0, 0, // Skip to: 2551
8106
/* 2546 */    MCD_OPC_Decode, 177, 23, 213, 3, // Opcode: SYNCI_NM
8107
/* 2551 */    MCD_OPC_CheckPredicate, 112, 247, 2, 0, // Skip to: 3315
8108
/* 2556 */    MCD_OPC_Decode, 244, 19, 214, 3, // Opcode: PREF_NM
8109
/* 2561 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 2576
8110
/* 2566 */    MCD_OPC_CheckPredicate, 112, 232, 2, 0, // Skip to: 3315
8111
/* 2571 */    MCD_OPC_Decode, 224, 15, 212, 3, // Opcode: LH_NM
8112
/* 2576 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 2591
8113
/* 2581 */    MCD_OPC_CheckPredicate, 112, 217, 2, 0, // Skip to: 3315
8114
/* 2586 */    MCD_OPC_Decode, 206, 21, 212, 3, // Opcode: SH_NM
8115
/* 2591 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 2606
8116
/* 2596 */    MCD_OPC_CheckPredicate, 112, 202, 2, 0, // Skip to: 3315
8117
/* 2601 */    MCD_OPC_Decode, 217, 15, 212, 3, // Opcode: LHU_NM
8118
/* 2606 */    MCD_OPC_FilterValue, 8, 10, 0, 0, // Skip to: 2621
8119
/* 2611 */    MCD_OPC_CheckPredicate, 112, 187, 2, 0, // Skip to: 3315
8120
/* 2616 */    MCD_OPC_Decode, 181, 16, 212, 3, // Opcode: LW_NM
8121
/* 2621 */    MCD_OPC_FilterValue, 9, 177, 2, 0, // Skip to: 3315
8122
/* 2626 */    MCD_OPC_CheckPredicate, 112, 172, 2, 0, // Skip to: 3315
8123
/* 2631 */    MCD_OPC_Decode, 171, 23, 212, 3, // Opcode: SW_NM
8124
/* 2636 */    MCD_OPC_FilterValue, 34, 48, 0, 0, // Skip to: 2689
8125
/* 2641 */    MCD_OPC_ExtractField, 14, 2,  // Inst{15-14} ...
8126
/* 2644 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2659
8127
/* 2649 */    MCD_OPC_CheckPredicate, 112, 149, 2, 0, // Skip to: 3315
8128
/* 2654 */    MCD_OPC_Decode, 194, 7, 215, 3, // Opcode: BEQC_NM
8129
/* 2659 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2674
8130
/* 2664 */    MCD_OPC_CheckPredicate, 112, 134, 2, 0, // Skip to: 3315
8131
/* 2669 */    MCD_OPC_Decode, 212, 7, 215, 3, // Opcode: BGEC_NM
8132
/* 2674 */    MCD_OPC_FilterValue, 3, 124, 2, 0, // Skip to: 3315
8133
/* 2679 */    MCD_OPC_CheckPredicate, 112, 119, 2, 0, // Skip to: 3315
8134
/* 2684 */    MCD_OPC_Decode, 218, 7, 215, 3, // Opcode: BGEUC_NM
8135
/* 2689 */    MCD_OPC_FilterValue, 41, 146, 1, 0, // Skip to: 3096
8136
/* 2694 */    MCD_OPC_ExtractField, 8, 4,  // Inst{11-8} ...
8137
/* 2697 */    MCD_OPC_FilterValue, 0, 78, 0, 0, // Skip to: 2780
8138
/* 2702 */    MCD_OPC_ExtractField, 12, 3,  // Inst{14-12} ...
8139
/* 2705 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2720
8140
/* 2710 */    MCD_OPC_CheckPredicate, 112, 88, 2, 0, // Skip to: 3315
8141
/* 2715 */    MCD_OPC_Decode, 173, 15, 216, 3, // Opcode: LBs9_NM
8142
/* 2720 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 2735
8143
/* 2725 */    MCD_OPC_CheckPredicate, 112, 73, 2, 0, // Skip to: 3315
8144
/* 2730 */    MCD_OPC_Decode, 168, 15, 216, 3, // Opcode: LBUs9_NM
8145
/* 2735 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2750
8146
/* 2740 */    MCD_OPC_CheckPredicate, 112, 58, 2, 0, // Skip to: 3315
8147
/* 2745 */    MCD_OPC_Decode, 225, 15, 216, 3, // Opcode: LHs9_NM
8148
/* 2750 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 2765
8149
/* 2755 */    MCD_OPC_CheckPredicate, 112, 43, 2, 0, // Skip to: 3315
8150
/* 2760 */    MCD_OPC_Decode, 218, 15, 216, 3, // Opcode: LHUs9_NM
8151
/* 2765 */    MCD_OPC_FilterValue, 4, 33, 2, 0, // Skip to: 3315
8152
/* 2770 */    MCD_OPC_CheckPredicate, 112, 28, 2, 0, // Skip to: 3315
8153
/* 2775 */    MCD_OPC_Decode, 182, 16, 216, 3, // Opcode: LWs9_NM
8154
/* 2780 */    MCD_OPC_FilterValue, 1, 56, 0, 0, // Skip to: 2841
8155
/* 2785 */    MCD_OPC_ExtractField, 12, 3,  // Inst{14-12} ...
8156
/* 2788 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2803
8157
/* 2793 */    MCD_OPC_CheckPredicate, 112, 5, 2, 0, // Skip to: 3315
8158
/* 2798 */    MCD_OPC_Decode, 146, 24, 141, 1, // Opcode: UALH_NM
8159
/* 2803 */    MCD_OPC_FilterValue, 5, 251, 1, 0, // Skip to: 3315
8160
/* 2808 */    MCD_OPC_ExtractField, 0, 2,  // Inst{1-0} ...
8161
/* 2811 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2826
8162
/* 2816 */    MCD_OPC_CheckPredicate, 112, 238, 1, 0, // Skip to: 3315
8163
/* 2821 */    MCD_OPC_Decode, 245, 15, 217, 3, // Opcode: LL_NM
8164
/* 2826 */    MCD_OPC_FilterValue, 1, 228, 1, 0, // Skip to: 3315
8165
/* 2831 */    MCD_OPC_CheckPredicate, 112, 223, 1, 0, // Skip to: 3315
8166
/* 2836 */    MCD_OPC_Decode, 242, 15, 218, 3, // Opcode: LLWP_NM
8167
/* 2841 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 2856
8168
/* 2846 */    MCD_OPC_CheckPredicate, 112, 208, 1, 0, // Skip to: 3315
8169
/* 2851 */    MCD_OPC_Decode, 157, 16, 219, 3, // Opcode: LWM_NM
8170
/* 2856 */    MCD_OPC_FilterValue, 5, 27, 0, 0, // Skip to: 2888
8171
/* 2861 */    MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 2878
8172
/* 2866 */    MCD_OPC_CheckField, 12, 3, 1, 5, 0, 0, // Skip to: 2878
8173
/* 2873 */    MCD_OPC_Decode, 148, 24, 141, 1, // Opcode: UALW_NM
8174
/* 2878 */    MCD_OPC_CheckPredicate, 112, 176, 1, 0, // Skip to: 3315
8175
/* 2883 */    MCD_OPC_Decode, 147, 24, 219, 3, // Opcode: UALWM_NM
8176
/* 2888 */    MCD_OPC_FilterValue, 8, 80, 0, 0, // Skip to: 2973
8177
/* 2893 */    MCD_OPC_ExtractField, 12, 3,  // Inst{14-12} ...
8178
/* 2896 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 2911
8179
/* 2901 */    MCD_OPC_CheckPredicate, 112, 153, 1, 0, // Skip to: 3315
8180
/* 2906 */    MCD_OPC_Decode, 205, 20, 216, 3, // Opcode: SBs9_NM
8181
/* 2911 */    MCD_OPC_FilterValue, 1, 27, 0, 0, // Skip to: 2943
8182
/* 2916 */    MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 2933
8183
/* 2921 */    MCD_OPC_CheckField, 21, 5, 31, 5, 0, 0, // Skip to: 2933
8184
/* 2928 */    MCD_OPC_Decode, 178, 23, 220, 3, // Opcode: SYNCIs9_NM
8185
/* 2933 */    MCD_OPC_CheckPredicate, 112, 121, 1, 0, // Skip to: 3315
8186
/* 2938 */    MCD_OPC_Decode, 246, 19, 221, 3, // Opcode: PREFs9_NM
8187
/* 2943 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2958
8188
/* 2948 */    MCD_OPC_CheckPredicate, 112, 106, 1, 0, // Skip to: 3315
8189
/* 2953 */    MCD_OPC_Decode, 207, 21, 216, 3, // Opcode: SHs9_NM
8190
/* 2958 */    MCD_OPC_FilterValue, 4, 96, 1, 0, // Skip to: 3315
8191
/* 2963 */    MCD_OPC_CheckPredicate, 112, 91, 1, 0, // Skip to: 3315
8192
/* 2968 */    MCD_OPC_Decode, 172, 23, 216, 3, // Opcode: SWs9_NM
8193
/* 2973 */    MCD_OPC_FilterValue, 9, 71, 0, 0, // Skip to: 3049
8194
/* 2978 */    MCD_OPC_ExtractField, 12, 3,  // Inst{14-12} ...
8195
/* 2981 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 2996
8196
/* 2986 */    MCD_OPC_CheckPredicate, 112, 68, 1, 0, // Skip to: 3315
8197
/* 2991 */    MCD_OPC_Decode, 149, 24, 141, 1, // Opcode: UASH_NM
8198
/* 2996 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 3011
8199
/* 3001 */    MCD_OPC_CheckPredicate, 112, 53, 1, 0, // Skip to: 3315
8200
/* 3006 */    MCD_OPC_Decode, 251, 8, 221, 3, // Opcode: CACHE_NM
8201
/* 3011 */    MCD_OPC_FilterValue, 5, 43, 1, 0, // Skip to: 3315
8202
/* 3016 */    MCD_OPC_ExtractField, 0, 2,  // Inst{1-0} ...
8203
/* 3019 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 3034
8204
/* 3024 */    MCD_OPC_CheckPredicate, 112, 30, 1, 0, // Skip to: 3315
8205
/* 3029 */    MCD_OPC_Decode, 216, 20, 222, 3, // Opcode: SC_NM
8206
/* 3034 */    MCD_OPC_FilterValue, 1, 20, 1, 0, // Skip to: 3315
8207
/* 3039 */    MCD_OPC_CheckPredicate, 112, 15, 1, 0, // Skip to: 3315
8208
/* 3044 */    MCD_OPC_Decode, 213, 20, 223, 3, // Opcode: SCWP_NM
8209
/* 3049 */    MCD_OPC_FilterValue, 12, 10, 0, 0, // Skip to: 3064
8210
/* 3054 */    MCD_OPC_CheckPredicate, 112, 0, 1, 0, // Skip to: 3315
8211
/* 3059 */    MCD_OPC_Decode, 154, 23, 219, 3, // Opcode: SWM_NM
8212
/* 3064 */    MCD_OPC_FilterValue, 13, 246, 0, 0, // Skip to: 3315
8213
/* 3069 */    MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 3086
8214
/* 3074 */    MCD_OPC_CheckField, 12, 3, 1, 5, 0, 0, // Skip to: 3086
8215
/* 3081 */    MCD_OPC_Decode, 151, 24, 141, 1, // Opcode: UASW_NM
8216
/* 3086 */    MCD_OPC_CheckPredicate, 112, 224, 0, 0, // Skip to: 3315
8217
/* 3091 */    MCD_OPC_Decode, 150, 24, 219, 3, // Opcode: UASWM_NM
8218
/* 3096 */    MCD_OPC_FilterValue, 42, 48, 0, 0, // Skip to: 3149
8219
/* 3101 */    MCD_OPC_ExtractField, 14, 2,  // Inst{15-14} ...
8220
/* 3104 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 3119
8221
/* 3109 */    MCD_OPC_CheckPredicate, 112, 201, 0, 0, // Skip to: 3315
8222
/* 3114 */    MCD_OPC_Decode, 176, 8, 215, 3, // Opcode: BNEC_NM
8223
/* 3119 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 3134
8224
/* 3124 */    MCD_OPC_CheckPredicate, 112, 186, 0, 0, // Skip to: 3315
8225
/* 3129 */    MCD_OPC_Decode, 146, 8, 215, 3, // Opcode: BLTC_NM
8226
/* 3134 */    MCD_OPC_FilterValue, 3, 176, 0, 0, // Skip to: 3315
8227
/* 3139 */    MCD_OPC_CheckPredicate, 112, 171, 0, 0, // Skip to: 3315
8228
/* 3144 */    MCD_OPC_Decode, 152, 8, 215, 3, // Opcode: BLTUC_NM
8229
/* 3149 */    MCD_OPC_FilterValue, 50, 123, 0, 0, // Skip to: 3277
8230
/* 3154 */    MCD_OPC_ExtractField, 18, 3,  // Inst{20-18} ...
8231
/* 3157 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 3172
8232
/* 3162 */    MCD_OPC_CheckPredicate, 112, 148, 0, 0, // Skip to: 3315
8233
/* 3167 */    MCD_OPC_Decode, 196, 7, 224, 3, // Opcode: BEQIC_NM
8234
/* 3172 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 3187
8235
/* 3177 */    MCD_OPC_CheckPredicate, 112, 133, 0, 0, // Skip to: 3315
8236
/* 3182 */    MCD_OPC_Decode, 155, 7, 225, 3, // Opcode: BBEQZC_NM
8237
/* 3187 */    MCD_OPC_FilterValue, 2, 10, 0, 0, // Skip to: 3202
8238
/* 3192 */    MCD_OPC_CheckPredicate, 112, 118, 0, 0, // Skip to: 3315
8239
/* 3197 */    MCD_OPC_Decode, 213, 7, 224, 3, // Opcode: BGEIC_NM
8240
/* 3202 */    MCD_OPC_FilterValue, 3, 10, 0, 0, // Skip to: 3217
8241
/* 3207 */    MCD_OPC_CheckPredicate, 112, 103, 0, 0, // Skip to: 3315
8242
/* 3212 */    MCD_OPC_Decode, 214, 7, 224, 3, // Opcode: BGEIUC_NM
8243
/* 3217 */    MCD_OPC_FilterValue, 4, 10, 0, 0, // Skip to: 3232
8244
/* 3222 */    MCD_OPC_CheckPredicate, 112, 88, 0, 0, // Skip to: 3315
8245
/* 3227 */    MCD_OPC_Decode, 186, 8, 224, 3, // Opcode: BNEIC_NM
8246
/* 3232 */    MCD_OPC_FilterValue, 5, 10, 0, 0, // Skip to: 3247
8247
/* 3237 */    MCD_OPC_CheckPredicate, 112, 73, 0, 0, // Skip to: 3315
8248
/* 3242 */    MCD_OPC_Decode, 160, 7, 225, 3, // Opcode: BBNEZC_NM
8249
/* 3247 */    MCD_OPC_FilterValue, 6, 10, 0, 0, // Skip to: 3262
8250
/* 3252 */    MCD_OPC_CheckPredicate, 112, 58, 0, 0, // Skip to: 3315
8251
/* 3257 */    MCD_OPC_Decode, 147, 8, 224, 3, // Opcode: BLTIC_NM
8252
/* 3262 */    MCD_OPC_FilterValue, 7, 48, 0, 0, // Skip to: 3315
8253
/* 3267 */    MCD_OPC_CheckPredicate, 112, 43, 0, 0, // Skip to: 3315
8254
/* 3272 */    MCD_OPC_Decode, 148, 8, 224, 3, // Opcode: BLTIUC_NM
8255
/* 3277 */    MCD_OPC_FilterValue, 56, 33, 0, 0, // Skip to: 3315
8256
/* 3282 */    MCD_OPC_ExtractField, 1, 1,  // Inst{1} ...
8257
/* 3285 */    MCD_OPC_FilterValue, 0, 10, 0, 0, // Skip to: 3300
8258
/* 3290 */    MCD_OPC_CheckPredicate, 112, 20, 0, 0, // Skip to: 3315
8259
/* 3295 */    MCD_OPC_Decode, 252, 15, 226, 3, // Opcode: LUI_NM
8260
/* 3300 */    MCD_OPC_FilterValue, 1, 10, 0, 0, // Skip to: 3315
8261
/* 3305 */    MCD_OPC_CheckPredicate, 112, 5, 0, 0, // Skip to: 3315
8262
/* 3310 */    MCD_OPC_Decode, 215, 6, 226, 3, // Opcode: ALUIPC_NM
8263
/* 3315 */    MCD_OPC_Fail,
8264
  0
8265
};
8266
8267
static const uint8_t DecoderTableNanoMips48[] = {
8268
/* 0 */       MCD_OPC_ExtractField, 32, 5,  // Inst{36-32} ...
8269
/* 3 */       MCD_OPC_FilterValue, 0, 17, 0, 0, // Skip to: 25
8270
/* 8 */       MCD_OPC_CheckPredicate, 112, 122, 0, 0, // Skip to: 135
8271
/* 13 */      MCD_OPC_CheckField, 42, 6, 24, 115, 0, 0, // Skip to: 135
8272
/* 20 */      MCD_OPC_Decode, 234, 15, 227, 3, // Opcode: LI48_NM
8273
/* 25 */      MCD_OPC_FilterValue, 1, 17, 0, 0, // Skip to: 47
8274
/* 30 */      MCD_OPC_CheckPredicate, 112, 100, 0, 0, // Skip to: 135
8275
/* 35 */      MCD_OPC_CheckField, 42, 6, 24, 93, 0, 0, // Skip to: 135
8276
/* 42 */      MCD_OPC_Decode, 252, 5, 228, 3, // Opcode: ADDIU48_NM
8277
/* 47 */      MCD_OPC_FilterValue, 2, 17, 0, 0, // Skip to: 69
8278
/* 52 */      MCD_OPC_CheckPredicate, 112, 78, 0, 0, // Skip to: 135
8279
/* 57 */      MCD_OPC_CheckField, 42, 6, 24, 71, 0, 0, // Skip to: 135
8280
/* 64 */      MCD_OPC_Decode, 253, 5, 229, 3, // Opcode: ADDIUGP48_NM
8281
/* 69 */      MCD_OPC_FilterValue, 3, 17, 0, 0, // Skip to: 91
8282
/* 74 */      MCD_OPC_CheckPredicate, 112, 56, 0, 0, // Skip to: 135
8283
/* 79 */      MCD_OPC_CheckField, 42, 6, 24, 49, 0, 0, // Skip to: 135
8284
/* 86 */      MCD_OPC_Decode, 153, 15, 230, 3, // Opcode: LAPC48_NM
8285
/* 91 */      MCD_OPC_FilterValue, 11, 17, 0, 0, // Skip to: 113
8286
/* 96 */      MCD_OPC_CheckPredicate, 112, 34, 0, 0, // Skip to: 135
8287
/* 101 */     MCD_OPC_CheckField, 42, 6, 24, 27, 0, 0, // Skip to: 135
8288
/* 108 */     MCD_OPC_Decode, 160, 16, 230, 3, // Opcode: LWPC_NM
8289
/* 113 */     MCD_OPC_FilterValue, 15, 17, 0, 0, // Skip to: 135
8290
/* 118 */     MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 135
8291
/* 123 */     MCD_OPC_CheckField, 42, 6, 24, 5, 0, 0, // Skip to: 135
8292
/* 130 */     MCD_OPC_Decode, 155, 23, 230, 3, // Opcode: SWPC_NM
8293
/* 135 */     MCD_OPC_Fail,
8294
  0
8295
};
8296
8297
static const uint8_t DecoderTableNanoMips_Conflict_Space16[] = {
8298
/* 0 */       MCD_OPC_CheckPredicate, 112, 12, 0, 0, // Skip to: 17
8299
/* 5 */       MCD_OPC_CheckField, 10, 6, 54, 5, 0, 0, // Skip to: 17
8300
/* 12 */      MCD_OPC_Decode, 173, 8, 173, 3, // Opcode: BNEC16_NM
8301
/* 17 */      MCD_OPC_Fail,
8302
  0
8303
};
8304
8305
83.9k
static bool checkDecoderPredicate(MCInst *Inst, unsigned Idx) {
8306
83.9k
  switch (Idx) {
8307
0
  default: CS_ASSERT_RET_VAL(0 && "Invalid index!", false);
8308
0
  case 0:
8309
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16));
8310
0
  case 1:
8311
0
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCnMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8312
0
  case 2:
8313
0
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCnMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8314
0
  case 3:
8315
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCnMips));
8316
0
  case 4:
8317
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCnMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8318
0
  case 5:
8319
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCnMipsP));
8320
8.49k
  case 6:
8321
8.49k
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6));
8322
10.5k
  case 7:
8323
10.5k
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8324
1.20k
  case 8:
8325
1.20k
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSP));
8326
379
  case 9:
8327
379
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSPR2));
8328
59
  case 10:
8329
59
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r5) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureVirt));
8330
17
  case 11:
8331
17
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSPR3));
8332
39
  case 12:
8333
39
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSP));
8334
181
  case 13:
8335
181
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8336
46
  case 14:
8337
46
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4));
8338
55
  case 15:
8339
55
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8340
57
  case 16:
8341
57
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4));
8342
331
  case 17:
8343
331
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8344
1.39k
  case 18:
8345
1.39k
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8346
984
  case 19:
8347
984
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8348
497
  case 20:
8349
497
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8350
329
  case 21:
8351
329
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureEVA));
8352
85
  case 22:
8353
85
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureEVA));
8354
701
  case 23:
8355
701
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8356
24.0k
  case 24:
8357
24.0k
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6));
8358
165
  case 25:
8359
165
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGINV));
8360
261
  case 26:
8361
261
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8362
6.11k
  case 27:
8363
6.11k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8364
315
  case 28:
8365
315
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8366
131
  case 29:
8367
131
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8368
4.02k
  case 30:
8369
4.02k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMSA));
8370
2.62k
  case 31:
8371
2.62k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8372
2
  case 32:
8373
2
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6));
8374
99
  case 33:
8375
99
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureUseIndirectJumpsHazard) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8376
197
  case 34:
8377
197
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32));
8378
13
  case 35:
8379
13
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8380
512
  case 36:
8381
512
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8382
858
  case 37:
8383
858
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSP));
8384
155
  case 38:
8385
155
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMSA) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64));
8386
1.06k
  case 39:
8387
1.06k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8388
33
  case 40:
8389
33
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSP) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8390
66
  case 41:
8391
66
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r5) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureVirt) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8392
147
  case 42:
8393
147
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMT) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8394
221
  case 43:
8395
221
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3_32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8396
110
  case 44:
8397
110
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureEVA) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8398
167
  case 45:
8399
167
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r5) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8400
15
  case 46:
8401
15
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8402
450
  case 47:
8403
450
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8404
168
  case 48:
8405
168
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8406
4
  case 49:
8407
4
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8408
264
  case 50:
8409
264
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8410
90
  case 51:
8411
90
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8412
13
  case 52:
8413
13
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8414
3
  case 53:
8415
3
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8416
19
  case 54:
8417
19
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8418
30
  case 55:
8419
30
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8420
14
  case 56:
8421
14
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8422
272
  case 57:
8423
272
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8424
39
  case 58:
8425
39
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8426
0
  case 59:
8427
0
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8428
22
  case 60:
8429
22
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8430
88
  case 61:
8431
88
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8432
1
  case 62:
8433
1
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8434
3
  case 63:
8435
3
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips5_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8436
208
  case 64:
8437
208
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4));
8438
1
  case 65:
8439
1
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4));
8440
23
  case 66:
8441
23
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8442
1
  case 67:
8443
1
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8444
356
  case 68:
8445
356
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8446
111
  case 69:
8447
111
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSPR2));
8448
2
  case 70:
8449
2
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureEVA) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8450
174
  case 71:
8451
174
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3_32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8452
1.95k
  case 72:
8453
1.95k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeaturePTR64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8454
0
  case 73:
8455
0
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeaturePTR64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8456
0
  case 74:
8457
0
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeaturePTR64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8458
861
  case 75:
8459
861
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6));
8460
3.87k
  case 76:
8461
3.87k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8462
87
  case 77:
8463
87
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8464
23
  case 78:
8465
23
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8466
203
  case 79:
8467
203
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8468
8
  case 80:
8469
8
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCRC) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8470
1
  case 81:
8471
1
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCRC) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8472
67
  case 82:
8473
67
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeaturePTR64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8474
16
  case 83:
8475
16
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGINV) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8476
1
  case 84:
8477
1
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6));
8478
415
  case 85:
8479
415
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6));
8480
0
  case 86:
8481
0
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6));
8482
0
  case 87:
8483
0
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeaturePTR64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8484
21
  case 88:
8485
21
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8486
75
  case 89:
8487
75
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeaturePTR64Bit));
8488
197
  case 90:
8489
197
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8490
1.94k
  case 91:
8491
1.94k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8492
364
  case 92:
8493
364
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8494
97
  case 93:
8495
97
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3));
8496
1
  case 94:
8497
1
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r5) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureVirt));
8498
2.15k
  case 95:
8499
2.15k
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6));
8500
14
  case 96:
8501
14
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8502
383
  case 97:
8503
383
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureDSP));
8504
510
  case 98:
8505
510
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8506
17
  case 99:
8507
17
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8508
63
  case 100:
8509
63
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8510
449
  case 101:
8511
449
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8512
5
  case 102:
8513
5
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3_32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8514
221
  case 103:
8515
221
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8516
28
  case 104:
8517
28
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8518
172
  case 105:
8519
172
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3D));
8520
35
  case 106:
8521
35
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips3_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8522
418
  case 107:
8523
418
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8524
35
  case 108:
8525
35
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat));
8526
66
  case 109:
8527
66
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips5_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8528
22
  case 110:
8529
22
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4));
8530
27
  case 111:
8531
27
    return (!Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips16) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureFP64Bit) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips4_32r2) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips32r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMips64r6) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureSoftFloat) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNoMadd4) && !Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMicroMips));
8532
0
  case 112:
8533
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips));
8534
0
  case 113:
8535
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureMT));
8536
0
  case 114:
8537
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureCRC));
8538
0
  case 115:
8539
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureTLB));
8540
0
  case 116:
8541
0
    return (Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureNanoMips) && Mips_getFeatureBits(Inst->csh->mode, Mips_FeatureGINV));
8542
83.9k
  }
8543
83.9k
}
8544
8545
#define DecodeToMCInst(fname, fieldname, InsnType) \
8546
static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \
8547
78.1k
    uint64_t Address, const void *Decoder, bool *DecodeComplete) \
8548
78.1k
{ \
8549
78.1k
  *DecodeComplete = true; \
8550
78.1k
  InsnType tmp; \
8551
78.1k
  switch (Idx) { \
8552
0
  default: CS_ASSERT_RET_VAL(0 && "Invalid index!", MCDisassembler_Fail); \
8553
0
  case 0: \
8554
0
    tmp = fieldname(insn, 0, 11); \
8555
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8556
0
    return S; \
8557
0
  case 1: \
8558
0
    tmp = fieldname(insn, 8, 3); \
8559
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8560
0
    tmp = fieldname(insn, 0, 8); \
8561
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8562
0
    return S; \
8563
0
  case 2: \
8564
0
    tmp = fieldname(insn, 8, 3); \
8565
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8566
0
    tmp = fieldname(insn, 8, 3); \
8567
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8568
0
    tmp = fieldname(insn, 0, 8); \
8569
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8570
0
    return S; \
8571
0
  case 3: \
8572
0
    tmp = fieldname(insn, 8, 3); \
8573
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8574
0
    tmp = fieldname(insn, 0, 8); \
8575
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8576
0
    return S; \
8577
0
  case 4: \
8578
0
    tmp = fieldname(insn, 0, 8); \
8579
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8580
0
    return S; \
8581
0
  case 5: \
8582
0
    tmp = 0x0; \
8583
0
    tmp |= fieldname(insn, 3, 2) << 3; \
8584
0
    tmp |= fieldname(insn, 5, 3) << 0; \
8585
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8586
0
    tmp = fieldname(insn, 0, 3); \
8587
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8588
0
    return S; \
8589
0
  case 6: \
8590
0
    tmp = fieldname(insn, 4, 4); \
8591
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8592
0
    tmp = fieldname(insn, 0, 4); \
8593
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8594
0
    return S; \
8595
0
  case 7: \
8596
0
    tmp = fieldname(insn, 8, 3); \
8597
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8598
0
    tmp = fieldname(insn, 0, 8); \
8599
0
    MCOperand_CreateImm0(MI, tmp); \
8600
0
    return S; \
8601
0
  case 8: \
8602
0
    tmp = fieldname(insn, 2, 3); \
8603
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8604
0
    tmp = fieldname(insn, 8, 3); \
8605
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8606
0
    tmp = fieldname(insn, 5, 3); \
8607
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8608
0
    return S; \
8609
0
  case 9: \
8610
0
    tmp = fieldname(insn, 8, 3); \
8611
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8612
0
    return S; \
8613
396
  case 10: \
8614
396
    return S; \
8615
0
  case 11: \
8616
0
    tmp = fieldname(insn, 8, 3); \
8617
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8618
0
    tmp = fieldname(insn, 5, 3); \
8619
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8620
0
    return S; \
8621
0
  case 12: \
8622
0
    tmp = fieldname(insn, 8, 3); \
8623
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8624
0
    tmp = fieldname(insn, 8, 3); \
8625
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8626
0
    tmp = fieldname(insn, 5, 3); \
8627
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8628
0
    return S; \
8629
0
  case 13: \
8630
0
    tmp = fieldname(insn, 8, 3); \
8631
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8632
0
    tmp = fieldname(insn, 8, 3); \
8633
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8634
0
    return S; \
8635
0
  case 14: \
8636
0
    tmp = fieldname(insn, 8, 3); \
8637
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8638
0
    tmp = 0x0; \
8639
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8640
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8641
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8642
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8643
0
    return S; \
8644
0
  case 15: \
8645
0
    tmp = 0x0; \
8646
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8647
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8648
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8649
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8650
0
    return S; \
8651
0
  case 16: \
8652
0
    tmp = fieldname(insn, 8, 3); \
8653
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8654
0
    tmp = 0x0; \
8655
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8656
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8657
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8658
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8659
0
    return S; \
8660
0
  case 17: \
8661
0
    tmp = fieldname(insn, 8, 3); \
8662
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8663
0
    tmp = fieldname(insn, 5, 3); \
8664
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8665
0
    tmp = 0x0; \
8666
0
    tmp |= fieldname(insn, 21, 1) << 5; \
8667
0
    tmp |= fieldname(insn, 22, 5) << 0; \
8668
0
    MCOperand_CreateImm0(MI, tmp); \
8669
0
    return S; \
8670
0
  case 18: \
8671
0
    tmp = 0x0; \
8672
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8673
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8674
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8675
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8676
0
    return S; \
8677
0
  case 19: \
8678
0
    if (!Check(&S, DecodeFIXMEInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8679
0
    return S; \
8680
0
  case 20: \
8681
0
    tmp = fieldname(insn, 8, 3); \
8682
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8683
0
    tmp = 0x0; \
8684
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8685
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8686
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8687
0
    MCOperand_CreateImm0(MI, tmp); \
8688
0
    return S; \
8689
0
  case 21: \
8690
0
    if (!Check(&S, DecodeFMem3(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8691
0
    return S; \
8692
0
  case 22: \
8693
0
    tmp = fieldname(insn, 16, 5); \
8694
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8695
0
    tmp = fieldname(insn, 0, 16); \
8696
0
    MCOperand_CreateImm0(MI, tmp); \
8697
0
    return S; \
8698
79
  case 23: \
8699
79
    tmp = fieldname(insn, 11, 5); \
8700
79
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8701
79
    tmp = fieldname(insn, 21, 5); \
8702
79
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8703
79
    tmp = fieldname(insn, 16, 5); \
8704
79
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8705
79
    return S; \
8706
79
  case 24: \
8707
7
    tmp = fieldname(insn, 21, 5); \
8708
7
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8709
7
    return S; \
8710
309
  case 25: \
8711
309
    tmp = fieldname(insn, 11, 5); \
8712
309
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8713
309
    tmp = fieldname(insn, 21, 5); \
8714
309
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8715
309
    return S; \
8716
309
  case 26: \
8717
0
    tmp = fieldname(insn, 11, 5); \
8718
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8719
0
    tmp = fieldname(insn, 21, 5); \
8720
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8721
0
    return S; \
8722
0
  case 27: \
8723
0
    tmp = fieldname(insn, 16, 5); \
8724
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8725
0
    tmp = fieldname(insn, 21, 5); \
8726
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8727
0
    tmp = fieldname(insn, 6, 10); \
8728
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_10_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8729
0
    return S; \
8730
0
  case 28: \
8731
0
    tmp = fieldname(insn, 16, 5); \
8732
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8733
0
    tmp = fieldname(insn, 21, 5); \
8734
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8735
0
    tmp = fieldname(insn, 6, 5); \
8736
0
    MCOperand_CreateImm0(MI, tmp); \
8737
0
    tmp = fieldname(insn, 11, 5); \
8738
0
    MCOperand_CreateImm0(MI, tmp); \
8739
0
    return S; \
8740
0
  case 29: \
8741
0
    tmp = fieldname(insn, 21, 5); \
8742
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8743
0
    tmp = fieldname(insn, 16, 5); \
8744
0
    MCOperand_CreateImm0(MI, tmp); \
8745
0
    tmp = fieldname(insn, 0, 16); \
8746
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8747
0
    return S; \
8748
0
  case 30: \
8749
0
    tmp = fieldname(insn, 16, 5); \
8750
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8751
0
    tmp = fieldname(insn, 21, 5); \
8752
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8753
0
    return S; \
8754
208
  case 31: \
8755
208
    tmp = fieldname(insn, 7, 3); \
8756
208
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8757
208
    tmp = fieldname(insn, 1, 3); \
8758
208
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8759
208
    tmp = fieldname(insn, 4, 3); \
8760
208
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8761
208
    return S; \
8762
7.45k
  case 32: \
8763
7.45k
    if (!Check(&S, DecodeMemMMImm4(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8764
7.45k
    return S; \
8765
7.45k
  case 33: \
8766
1.67k
    tmp = fieldname(insn, 5, 5); \
8767
1.67k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8768
1.67k
    tmp = fieldname(insn, 0, 5); \
8769
1.67k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8770
1.67k
    return S; \
8771
1.67k
  case 34: \
8772
801
    tmp = fieldname(insn, 7, 3); \
8773
801
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8774
801
    tmp = fieldname(insn, 4, 3); \
8775
801
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8776
801
    tmp = fieldname(insn, 1, 3); \
8777
801
    if (!Check(&S, DecodePOOL16BEncodedField(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8778
801
    return S; \
8779
801
  case 35: \
8780
321
    tmp = fieldname(insn, 7, 3); \
8781
321
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8782
321
    tmp = fieldname(insn, 4, 3); \
8783
321
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8784
321
    tmp = fieldname(insn, 0, 4); \
8785
321
    if (!Check(&S, DecodeANDI16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8786
321
    return S; \
8787
321
  case 36: \
8788
82
    tmp = fieldname(insn, 3, 3); \
8789
82
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8790
82
    tmp = fieldname(insn, 0, 3); \
8791
82
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8792
82
    return S; \
8793
395
  case 37: \
8794
395
    tmp = fieldname(insn, 3, 3); \
8795
395
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8796
395
    tmp = fieldname(insn, 0, 3); \
8797
395
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8798
395
    tmp = fieldname(insn, 3, 3); \
8799
395
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8800
395
    return S; \
8801
397
  case 38: \
8802
397
    if (!Check(&S, DecodeMemMMReglistImm4Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8803
397
    return S; \
8804
397
  case 39: \
8805
75
    tmp = fieldname(insn, 0, 5); \
8806
75
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8807
75
    return S; \
8808
75
  case 40: \
8809
24
    tmp = fieldname(insn, 0, 4); \
8810
24
    MCOperand_CreateImm0(MI, tmp); \
8811
24
    return S; \
8812
191
  case 41: \
8813
191
    tmp = fieldname(insn, 0, 5); \
8814
191
    if (!Check(&S, DecodeUImmWithOffsetAndScale_5_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8815
191
    return S; \
8816
1.18k
  case 42: \
8817
1.18k
    if (!Check(&S, DecodeMemMMSPImm5Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8818
1.18k
    return S; \
8819
1.18k
  case 43: \
8820
431
    tmp = fieldname(insn, 5, 5); \
8821
431
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8822
431
    tmp = fieldname(insn, 5, 5); \
8823
431
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8824
431
    tmp = fieldname(insn, 1, 4); \
8825
431
    if (!Check(&S, DecodeSImmWithOffsetAndScale_4_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8826
431
    return S; \
8827
557
  case 44: \
8828
557
    tmp = fieldname(insn, 1, 9); \
8829
557
    if (!Check(&S, DecodeSimm9SP(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8830
557
    return S; \
8831
1.01k
  case 45: \
8832
1.01k
    if (!Check(&S, DecodeMemMMGPImm7Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8833
1.01k
    return S; \
8834
1.73k
  case 46: \
8835
1.73k
    tmp = fieldname(insn, 7, 3); \
8836
1.73k
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8837
1.73k
    tmp = fieldname(insn, 4, 3); \
8838
1.73k
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8839
1.73k
    tmp = fieldname(insn, 1, 3); \
8840
1.73k
    if (!Check(&S, DecodeAddiur2Simm7(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8841
1.73k
    return S; \
8842
1.73k
  case 47: \
8843
1.39k
    tmp = fieldname(insn, 7, 3); \
8844
1.39k
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8845
1.39k
    tmp = fieldname(insn, 1, 6); \
8846
1.39k
    if (!Check(&S, DecodeUImmWithOffsetAndScale_6_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8847
1.39k
    return S; \
8848
3.85k
  case 48: \
8849
3.85k
    if (!Check(&S, DecodeMovePOperands(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8850
3.85k
    return S; \
8851
3.85k
  case 49: \
8852
800
    tmp = fieldname(insn, 7, 3); \
8853
800
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8854
800
    tmp = fieldname(insn, 0, 7); \
8855
800
    if (!Check(&S, DecodeBranchTarget7MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8856
800
    return S; \
8857
800
  case 50: \
8858
244
    tmp = fieldname(insn, 0, 10); \
8859
244
    if (!Check(&S, DecodeBranchTarget10MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8860
244
    return S; \
8861
622
  case 51: \
8862
622
    tmp = fieldname(insn, 7, 3); \
8863
622
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8864
622
    tmp = fieldname(insn, 0, 7); \
8865
622
    if (!Check(&S, DecodeLi16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8866
622
    return S; \
8867
1.08k
  case 52: \
8868
1.08k
    tmp = fieldname(insn, 21, 5); \
8869
1.08k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8870
1.08k
    tmp = fieldname(insn, 16, 5); \
8871
1.08k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8872
1.08k
    tmp = fieldname(insn, 11, 5); \
8873
1.08k
    MCOperand_CreateImm0(MI, tmp); \
8874
1.08k
    return S; \
8875
1.08k
  case 53: \
8876
28
    tmp = fieldname(insn, 16, 5); \
8877
28
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8878
28
    tmp = fieldname(insn, 21, 5); \
8879
28
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8880
28
    return S; \
8881
62
  case 54: \
8882
62
    tmp = fieldname(insn, 11, 5); \
8883
62
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8884
62
    tmp = fieldname(insn, 16, 5); \
8885
62
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8886
62
    tmp = fieldname(insn, 21, 5); \
8887
62
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8888
62
    return S; \
8889
186
  case 55: \
8890
186
    tmp = fieldname(insn, 11, 5); \
8891
186
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8892
186
    tmp = fieldname(insn, 16, 5); \
8893
186
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8894
186
    tmp = fieldname(insn, 21, 5); \
8895
186
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8896
186
    return S; \
8897
320
  case 56: \
8898
320
    tmp = fieldname(insn, 16, 10); \
8899
320
    MCOperand_CreateImm0(MI, tmp); \
8900
320
    tmp = fieldname(insn, 6, 10); \
8901
320
    MCOperand_CreateImm0(MI, tmp); \
8902
320
    return S; \
8903
186
  case 57: \
8904
70
    tmp = fieldname(insn, 21, 5); \
8905
70
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8906
70
    tmp = fieldname(insn, 16, 5); \
8907
70
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8908
70
    tmp = fieldname(insn, 6, 5); \
8909
70
    MCOperand_CreateImm0(MI, tmp); \
8910
70
    tmp = fieldname(insn, 11, 5); \
8911
70
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8912
70
    tmp = fieldname(insn, 21, 5); \
8913
70
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8914
70
    return S; \
8915
100
  case 58: \
8916
100
    tmp = fieldname(insn, 11, 5); \
8917
100
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8918
100
    tmp = fieldname(insn, 16, 5); \
8919
100
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8920
100
    tmp = fieldname(insn, 21, 5); \
8921
100
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8922
100
    return S; \
8923
100
  case 59: \
8924
41
    tmp = fieldname(insn, 11, 5); \
8925
41
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8926
41
    tmp = fieldname(insn, 21, 5); \
8927
41
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8928
41
    tmp = fieldname(insn, 16, 5); \
8929
41
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8930
41
    return S; \
8931
154
  case 60: \
8932
154
    tmp = fieldname(insn, 21, 5); \
8933
154
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8934
154
    tmp = fieldname(insn, 16, 5); \
8935
154
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8936
154
    tmp = fieldname(insn, 11, 5); \
8937
154
    MCOperand_CreateImm0(MI, tmp); \
8938
154
    tmp = fieldname(insn, 21, 5); \
8939
154
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8940
154
    return S; \
8941
321
  case 61: \
8942
321
    tmp = fieldname(insn, 11, 5); \
8943
321
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8944
321
    tmp = fieldname(insn, 21, 5); \
8945
321
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8946
321
    tmp = fieldname(insn, 16, 5); \
8947
321
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8948
321
    return S; \
8949
321
  case 62: \
8950
26
    tmp = fieldname(insn, 21, 5); \
8951
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8952
26
    tmp = fieldname(insn, 16, 5); \
8953
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8954
26
    tmp = fieldname(insn, 11, 5); \
8955
26
    MCOperand_CreateImm0(MI, tmp); \
8956
26
    tmp = fieldname(insn, 21, 5); \
8957
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8958
26
    return S; \
8959
188
  case 63: \
8960
188
    tmp = fieldname(insn, 11, 5); \
8961
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8962
188
    tmp = fieldname(insn, 16, 5); \
8963
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8964
188
    tmp = fieldname(insn, 21, 5); \
8965
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8966
188
    tmp = fieldname(insn, 11, 5); \
8967
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8968
188
    return S; \
8969
188
  case 64: \
8970
9
    tmp = fieldname(insn, 11, 5); \
8971
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8972
9
    tmp = fieldname(insn, 16, 5); \
8973
9
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8974
9
    tmp = fieldname(insn, 21, 5); \
8975
9
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8976
9
    return S; \
8977
86
  case 65: \
8978
86
    tmp = fieldname(insn, 14, 2); \
8979
86
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8980
86
    tmp = fieldname(insn, 16, 6); \
8981
86
    if (!Check(&S, DecodeSImmWithOffsetAndScale_6_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8982
86
    tmp = fieldname(insn, 14, 2); \
8983
86
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8984
86
    return S; \
8985
106
  case 66: \
8986
106
    tmp = fieldname(insn, 21, 5); \
8987
106
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8988
106
    tmp = fieldname(insn, 16, 5); \
8989
106
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8990
106
    tmp = fieldname(insn, 6, 5); \
8991
106
    MCOperand_CreateImm0(MI, tmp); \
8992
106
    tmp = fieldname(insn, 11, 5); \
8993
106
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8994
106
    return S; \
8995
172
  case 67: \
8996
172
    tmp = fieldname(insn, 11, 5); \
8997
172
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8998
172
    tmp = fieldname(insn, 16, 5); \
8999
172
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9000
172
    tmp = fieldname(insn, 21, 5); \
9001
172
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9002
172
    return S; \
9003
172
  case 68: \
9004
77
    tmp = fieldname(insn, 21, 5); \
9005
77
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9006
77
    tmp = fieldname(insn, 16, 5); \
9007
77
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9008
77
    tmp = fieldname(insn, 11, 3); \
9009
77
    MCOperand_CreateImm0(MI, tmp); \
9010
77
    return S; \
9011
77
  case 69: \
9012
43
    tmp = fieldname(insn, 16, 5); \
9013
43
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9014
43
    tmp = fieldname(insn, 21, 5); \
9015
43
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9016
43
    tmp = fieldname(insn, 11, 3); \
9017
43
    MCOperand_CreateImm0(MI, tmp); \
9018
43
    return S; \
9019
77
  case 70: \
9020
77
    tmp = fieldname(insn, 21, 5); \
9021
77
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9022
77
    tmp = fieldname(insn, 16, 5); \
9023
77
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9024
77
    tmp = fieldname(insn, 12, 4); \
9025
77
    MCOperand_CreateImm0(MI, tmp); \
9026
77
    return S; \
9027
77
  case 71: \
9028
68
    tmp = fieldname(insn, 16, 5); \
9029
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9030
68
    tmp = fieldname(insn, 21, 5); \
9031
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9032
68
    tmp = fieldname(insn, 12, 4); \
9033
68
    MCOperand_CreateImm0(MI, tmp); \
9034
68
    return S; \
9035
68
  case 72: \
9036
28
    tmp = fieldname(insn, 16, 5); \
9037
28
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9038
28
    tmp = fieldname(insn, 14, 2); \
9039
28
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9040
28
    return S; \
9041
28
  case 73: \
9042
16
    tmp = fieldname(insn, 14, 2); \
9043
16
    if (!Check(&S, DecodeHI32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9044
16
    tmp = fieldname(insn, 16, 5); \
9045
16
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9046
16
    return S; \
9047
18
  case 74: \
9048
18
    tmp = fieldname(insn, 21, 5); \
9049
18
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9050
18
    tmp = fieldname(insn, 16, 5); \
9051
18
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9052
18
    tmp = fieldname(insn, 13, 3); \
9053
18
    MCOperand_CreateImm0(MI, tmp); \
9054
18
    return S; \
9055
18
  case 75: \
9056
8
    tmp = fieldname(insn, 14, 2); \
9057
8
    if (!Check(&S, DecodeLO32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9058
8
    tmp = fieldname(insn, 16, 5); \
9059
8
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9060
8
    return S; \
9061
25
  case 76: \
9062
25
    tmp = fieldname(insn, 14, 2); \
9063
25
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9064
25
    tmp = fieldname(insn, 16, 5); \
9065
25
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9066
25
    tmp = fieldname(insn, 21, 5); \
9067
25
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9068
25
    tmp = fieldname(insn, 14, 2); \
9069
25
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9070
25
    return S; \
9071
25
  case 77: \
9072
13
    tmp = fieldname(insn, 21, 5); \
9073
13
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9074
13
    tmp = fieldname(insn, 16, 5); \
9075
13
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9076
13
    tmp = fieldname(insn, 14, 2); \
9077
13
    MCOperand_CreateImm0(MI, tmp); \
9078
13
    tmp = fieldname(insn, 21, 5); \
9079
13
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9080
13
    return S; \
9081
62
  case 78: \
9082
62
    tmp = fieldname(insn, 21, 5); \
9083
62
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9084
62
    tmp = fieldname(insn, 14, 2); \
9085
62
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9086
62
    tmp = fieldname(insn, 16, 5); \
9087
62
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9088
62
    return S; \
9089
193
  case 79: \
9090
193
    tmp = fieldname(insn, 21, 5); \
9091
193
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9092
193
    tmp = fieldname(insn, 16, 5); \
9093
193
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9094
193
    return S; \
9095
218
  case 80: \
9096
218
    tmp = fieldname(insn, 21, 5); \
9097
218
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9098
218
    tmp = fieldname(insn, 16, 5); \
9099
218
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9100
218
    return S; \
9101
218
  case 81: \
9102
23
    tmp = fieldname(insn, 21, 5); \
9103
23
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9104
23
    tmp = fieldname(insn, 21, 5); \
9105
23
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9106
23
    tmp = fieldname(insn, 16, 5); \
9107
23
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9108
23
    return S; \
9109
23
  case 82: \
9110
6
    tmp = fieldname(insn, 21, 5); \
9111
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9112
6
    tmp = fieldname(insn, 16, 5); \
9113
6
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9114
6
    return S; \
9115
52
  case 83: \
9116
52
    tmp = fieldname(insn, 14, 2); \
9117
52
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9118
52
    tmp = fieldname(insn, 16, 5); \
9119
52
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9120
52
    tmp = fieldname(insn, 14, 2); \
9121
52
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9122
52
    return S; \
9123
52
  case 84: \
9124
6
    tmp = fieldname(insn, 21, 5); \
9125
6
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9126
6
    tmp = fieldname(insn, 16, 5); \
9127
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9128
6
    return S; \
9129
6
  case 85: \
9130
4
    tmp = fieldname(insn, 21, 5); \
9131
4
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9132
4
    tmp = fieldname(insn, 16, 5); \
9133
4
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9134
4
    return S; \
9135
97
  case 86: \
9136
97
    tmp = fieldname(insn, 16, 5); \
9137
97
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9138
97
    tmp = fieldname(insn, 21, 5); \
9139
97
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9140
97
    return S; \
9141
97
  case 87: \
9142
7
    tmp = fieldname(insn, 16, 5); \
9143
7
    MCOperand_CreateImm0(MI, tmp); \
9144
7
    return S; \
9145
147
  case 88: \
9146
147
    tmp = fieldname(insn, 16, 10); \
9147
147
    MCOperand_CreateImm0(MI, tmp); \
9148
147
    return S; \
9149
97
  case 89: \
9150
34
    tmp = fieldname(insn, 14, 2); \
9151
34
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9152
34
    tmp = fieldname(insn, 16, 5); \
9153
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9154
34
    tmp = fieldname(insn, 21, 5); \
9155
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9156
34
    return S; \
9157
34
  case 90: \
9158
20
    tmp = fieldname(insn, 21, 5); \
9159
20
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9160
20
    tmp = fieldname(insn, 16, 5); \
9161
20
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9162
20
    return S; \
9163
54
  case 91: \
9164
54
    tmp = fieldname(insn, 16, 5); \
9165
54
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9166
54
    tmp = fieldname(insn, 21, 5); \
9167
54
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9168
54
    return S; \
9169
93
  case 92: \
9170
93
    tmp = fieldname(insn, 16, 5); \
9171
93
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9172
93
    return S; \
9173
93
  case 93: \
9174
14
    tmp = fieldname(insn, 21, 5); \
9175
14
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9176
14
    tmp = fieldname(insn, 13, 8); \
9177
14
    MCOperand_CreateImm0(MI, tmp); \
9178
14
    return S; \
9179
287
  case 94: \
9180
287
    tmp = fieldname(insn, 21, 5); \
9181
287
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9182
287
    tmp = fieldname(insn, 14, 7); \
9183
287
    MCOperand_CreateImm0(MI, tmp); \
9184
287
    return S; \
9185
287
  case 95: \
9186
26
    tmp = fieldname(insn, 21, 5); \
9187
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9188
26
    tmp = fieldname(insn, 14, 2); \
9189
26
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9190
26
    tmp = fieldname(insn, 16, 5); \
9191
26
    MCOperand_CreateImm0(MI, tmp); \
9192
26
    return S; \
9193
28
  case 96: \
9194
28
    tmp = fieldname(insn, 11, 5); \
9195
28
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9196
28
    tmp = fieldname(insn, 16, 10); \
9197
28
    if (!Check(&S, DecodeSImmWithOffsetAndScale_10_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9198
28
    return S; \
9199
590
  case 97: \
9200
590
    tmp = fieldname(insn, 21, 5); \
9201
590
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9202
590
    tmp = fieldname(insn, 16, 5); \
9203
590
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9204
590
    tmp = fieldname(insn, 0, 16); \
9205
590
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9206
590
    return S; \
9207
2.41k
  case 98: \
9208
2.41k
    if (!Check(&S, DecodeMemMMImm16(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9209
2.41k
    return S; \
9210
2.41k
  case 99: \
9211
792
    if (!Check(&S, DecodeMemMMImm12(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9212
792
    return S; \
9213
792
  case 100: \
9214
22
    if (!Check(&S, DecodeCacheOpMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9215
22
    return S; \
9216
239
  case 101: \
9217
239
    tmp = fieldname(insn, 16, 5); \
9218
239
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9219
239
    tmp = fieldname(insn, 0, 16); \
9220
239
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9221
239
    return S; \
9222
239
  case 102: \
9223
203
    tmp = fieldname(insn, 16, 5); \
9224
203
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9225
203
    tmp = fieldname(insn, 0, 16); \
9226
203
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9227
203
    return S; \
9228
233
  case 103: \
9229
233
    tmp = fieldname(insn, 16, 5); \
9230
233
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9231
233
    tmp = fieldname(insn, 0, 16); \
9232
233
    MCOperand_CreateImm0(MI, tmp); \
9233
233
    return S; \
9234
233
  case 104: \
9235
44
    if (!Check(&S, DecodeSyncI_MM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9236
44
    return S; \
9237
44
  case 105: \
9238
17
    tmp = fieldname(insn, 0, 16); \
9239
17
    if (!Check(&S, DecodeBranchTarget1SImm16(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9240
17
    return S; \
9241
38
  case 106: \
9242
38
    tmp = fieldname(insn, 0, 16); \
9243
38
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9244
38
    return S; \
9245
61
  case 107: \
9246
61
    tmp = fieldname(insn, 18, 3); \
9247
61
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9248
61
    tmp = fieldname(insn, 0, 16); \
9249
61
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9250
61
    return S; \
9251
1.18k
  case 108: \
9252
1.18k
    tmp = fieldname(insn, 21, 5); \
9253
1.18k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9254
1.18k
    tmp = fieldname(insn, 16, 5); \
9255
1.18k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9256
1.18k
    tmp = fieldname(insn, 0, 16); \
9257
1.18k
    MCOperand_CreateImm0(MI, tmp); \
9258
1.18k
    return S; \
9259
1.18k
  case 109: \
9260
45
    tmp = fieldname(insn, 11, 5); \
9261
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9262
45
    tmp = fieldname(insn, 6, 5); \
9263
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9264
45
    tmp = fieldname(insn, 16, 5); \
9265
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9266
45
    tmp = fieldname(insn, 21, 5); \
9267
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9268
45
    return S; \
9269
45
  case 110: \
9270
7
    tmp = fieldname(insn, 11, 5); \
9271
7
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9272
7
    tmp = fieldname(insn, 16, 5); \
9273
7
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9274
7
    tmp = fieldname(insn, 21, 5); \
9275
7
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9276
7
    return S; \
9277
7
  case 111: \
9278
0
    tmp = fieldname(insn, 11, 5); \
9279
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9280
0
    tmp = fieldname(insn, 16, 5); \
9281
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9282
0
    tmp = fieldname(insn, 21, 5); \
9283
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9284
0
    return S; \
9285
55
  case 112: \
9286
55
    tmp = fieldname(insn, 11, 5); \
9287
55
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9288
55
    tmp = fieldname(insn, 6, 5); \
9289
54
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9290
54
    tmp = fieldname(insn, 16, 5); \
9291
54
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9292
54
    tmp = fieldname(insn, 21, 5); \
9293
52
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9294
52
    return S; \
9295
52
  case 113: \
9296
39
    tmp = fieldname(insn, 21, 5); \
9297
39
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9298
39
    tmp = fieldname(insn, 16, 5); \
9299
39
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9300
39
    tmp = fieldname(insn, 13, 3); \
9301
39
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9302
39
    tmp = fieldname(insn, 21, 5); \
9303
39
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9304
39
    return S; \
9305
39
  case 114: \
9306
10
    tmp = fieldname(insn, 16, 5); \
9307
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9308
10
    tmp = fieldname(insn, 21, 5); \
9309
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9310
10
    tmp = fieldname(insn, 11, 5); \
9311
10
    MCOperand_CreateImm0(MI, tmp); \
9312
10
    return S; \
9313
10
  case 115: \
9314
9
    tmp = fieldname(insn, 21, 5); \
9315
9
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9316
9
    tmp = fieldname(insn, 16, 5); \
9317
8
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9318
8
    tmp = fieldname(insn, 13, 3); \
9319
7
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9320
7
    tmp = fieldname(insn, 21, 5); \
9321
7
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9322
7
    return S; \
9323
13
  case 116: \
9324
13
    tmp = fieldname(insn, 11, 5); \
9325
13
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9326
13
    tmp = fieldname(insn, 16, 5); \
9327
12
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9328
12
    tmp = fieldname(insn, 21, 5); \
9329
11
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9330
11
    return S; \
9331
12
  case 117: \
9332
12
    tmp = fieldname(insn, 11, 5); \
9333
12
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9334
12
    tmp = fieldname(insn, 16, 5); \
9335
12
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9336
12
    tmp = fieldname(insn, 21, 5); \
9337
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9338
12
    tmp = fieldname(insn, 11, 5); \
9339
12
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9340
12
    return S; \
9341
23
  case 118: \
9342
23
    tmp = fieldname(insn, 11, 5); \
9343
23
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9344
23
    tmp = fieldname(insn, 16, 5); \
9345
22
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9346
22
    tmp = fieldname(insn, 21, 5); \
9347
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9348
21
    tmp = fieldname(insn, 11, 5); \
9349
21
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9350
21
    return S; \
9351
22
  case 119: \
9352
22
    tmp = fieldname(insn, 21, 5); \
9353
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9354
22
    tmp = fieldname(insn, 16, 5); \
9355
22
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9356
22
    return S; \
9357
22
  case 120: \
9358
14
    tmp = fieldname(insn, 21, 5); \
9359
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9360
14
    tmp = fieldname(insn, 16, 5); \
9361
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9362
14
    return S; \
9363
14
  case 121: \
9364
6
    tmp = fieldname(insn, 21, 5); \
9365
6
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9366
6
    tmp = fieldname(insn, 16, 5); \
9367
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9368
6
    return S; \
9369
18
  case 122: \
9370
18
    tmp = fieldname(insn, 21, 5); \
9371
18
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9372
18
    tmp = fieldname(insn, 16, 5); \
9373
18
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9374
18
    return S; \
9375
18
  case 123: \
9376
9
    tmp = fieldname(insn, 21, 5); \
9377
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9378
9
    tmp = fieldname(insn, 16, 5); \
9379
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9380
9
    tmp = fieldname(insn, 13, 3); \
9381
9
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9382
9
    tmp = fieldname(insn, 21, 5); \
9383
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9384
9
    return S; \
9385
26
  case 124: \
9386
26
    tmp = fieldname(insn, 21, 5); \
9387
26
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9388
26
    tmp = fieldname(insn, 16, 5); \
9389
26
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9390
26
    return S; \
9391
65
  case 125: \
9392
65
    tmp = fieldname(insn, 16, 5); \
9393
65
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9394
65
    tmp = fieldname(insn, 21, 5); \
9395
65
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9396
65
    return S; \
9397
222
  case 126: \
9398
222
    tmp = fieldname(insn, 21, 5); \
9399
222
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9400
222
    tmp = fieldname(insn, 16, 5); \
9401
222
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9402
222
    return S; \
9403
222
  case 127: \
9404
11
    tmp = fieldname(insn, 21, 5); \
9405
11
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9406
11
    tmp = fieldname(insn, 16, 5); \
9407
11
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9408
11
    return S; \
9409
33
  case 128: \
9410
33
    tmp = fieldname(insn, 21, 5); \
9411
33
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9412
33
    tmp = fieldname(insn, 16, 5); \
9413
33
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9414
33
    return S; \
9415
33
  case 129: \
9416
15
    tmp = fieldname(insn, 21, 5); \
9417
15
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9418
15
    tmp = fieldname(insn, 16, 5); \
9419
15
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9420
15
    return S; \
9421
60
  case 130: \
9422
60
    tmp = fieldname(insn, 16, 5); \
9423
60
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9424
60
    tmp = fieldname(insn, 21, 5); \
9425
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9426
60
    return S; \
9427
60
  case 131: \
9428
25
    tmp = fieldname(insn, 16, 5); \
9429
25
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9430
25
    tmp = fieldname(insn, 16, 5); \
9431
24
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9432
24
    tmp = fieldname(insn, 21, 5); \
9433
24
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9434
24
    return S; \
9435
52
  case 132: \
9436
52
    tmp = fieldname(insn, 13, 3); \
9437
52
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9438
52
    tmp = fieldname(insn, 16, 5); \
9439
52
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9440
52
    tmp = fieldname(insn, 21, 5); \
9441
52
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9442
52
    return S; \
9443
298
  case 133: \
9444
298
    tmp = fieldname(insn, 13, 3); \
9445
298
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9446
298
    tmp = fieldname(insn, 16, 5); \
9447
298
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9448
298
    tmp = fieldname(insn, 21, 5); \
9449
297
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9450
297
    return S; \
9451
388
  case 134: \
9452
388
    if (!Check(&S, DecodeMemMMImm9(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9453
388
    return S; \
9454
388
  case 135: \
9455
30
    if (!Check(&S, DecodePrefeOpMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9456
30
    return S; \
9457
202
  case 136: \
9458
202
    if (!Check(&S, DecodeJumpTargetMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9459
202
    return S; \
9460
289
  case 137: \
9461
289
    tmp = fieldname(insn, 23, 3); \
9462
289
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9463
289
    tmp = fieldname(insn, 0, 23); \
9464
289
    if (!Check(&S, DecodeSimm23Lsl2(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9465
289
    return S; \
9466
593
  case 138: \
9467
593
    tmp = fieldname(insn, 16, 5); \
9468
593
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9469
593
    tmp = fieldname(insn, 21, 5); \
9470
593
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9471
593
    tmp = fieldname(insn, 0, 16); \
9472
593
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9473
593
    return S; \
9474
1.83k
  case 139: \
9475
1.83k
    if (!Check(&S, DecodeFMemMMR2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9476
1.83k
    return S; \
9477
1.83k
  case 140: \
9478
255
    if (!Check(&S, DecodeJumpTargetXMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9479
255
    return S; \
9480
6.24k
  case 141: \
9481
6.24k
    if (!Check(&S, DecodeMem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9482
6.24k
    return S; \
9483
6.24k
  case 142: \
9484
0
    tmp = fieldname(insn, 16, 5); \
9485
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9486
0
    tmp = fieldname(insn, 21, 5); \
9487
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9488
0
    return S; \
9489
18
  case 143: \
9490
18
    tmp = fieldname(insn, 21, 5); \
9491
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9492
18
    tmp = fieldname(insn, 16, 5); \
9493
18
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9494
18
    return S; \
9495
18
  case 144: \
9496
10
    tmp = fieldname(insn, 16, 5); \
9497
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9498
10
    tmp = fieldname(insn, 16, 5); \
9499
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9500
10
    tmp = fieldname(insn, 21, 5); \
9501
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9502
10
    return S; \
9503
15
  case 145: \
9504
15
    tmp = fieldname(insn, 11, 5); \
9505
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9506
15
    tmp = fieldname(insn, 16, 5); \
9507
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9508
15
    tmp = fieldname(insn, 21, 5); \
9509
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9510
15
    return S; \
9511
15
  case 146: \
9512
15
    tmp = fieldname(insn, 21, 5); \
9513
15
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9514
15
    tmp = fieldname(insn, 16, 5); \
9515
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9516
15
    return S; \
9517
409
  case 147: \
9518
409
    tmp = fieldname(insn, 1, 3); \
9519
409
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9520
409
    tmp = fieldname(insn, 7, 3); \
9521
409
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9522
409
    tmp = fieldname(insn, 4, 3); \
9523
409
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9524
409
    return S; \
9525
409
  case 148: \
9526
187
    tmp = fieldname(insn, 7, 3); \
9527
187
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9528
187
    tmp = fieldname(insn, 4, 3); \
9529
187
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9530
187
    return S; \
9531
269
  case 149: \
9532
269
    tmp = fieldname(insn, 7, 3); \
9533
269
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9534
269
    tmp = fieldname(insn, 4, 3); \
9535
269
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9536
269
    tmp = fieldname(insn, 7, 3); \
9537
269
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9538
269
    return S; \
9539
326
  case 150: \
9540
326
    tmp = fieldname(insn, 5, 5); \
9541
326
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9542
326
    return S; \
9543
326
  case 151: \
9544
87
    tmp = fieldname(insn, 5, 5); \
9545
87
    if (!Check(&S, DecodeUImmWithOffsetAndScale_5_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9546
87
    return S; \
9547
166
  case 152: \
9548
166
    tmp = fieldname(insn, 6, 4); \
9549
166
    MCOperand_CreateImm0(MI, tmp); \
9550
166
    return S; \
9551
87
  case 153: \
9552
65
    tmp = fieldname(insn, 21, 5); \
9553
65
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9554
65
    tmp = fieldname(insn, 16, 5); \
9555
65
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9556
65
    tmp = fieldname(insn, 11, 3); \
9557
60
    MCOperand_CreateImm0(MI, tmp); \
9558
60
    return S; \
9559
65
  case 154: \
9560
34
    tmp = fieldname(insn, 11, 5); \
9561
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9562
34
    tmp = fieldname(insn, 16, 5); \
9563
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9564
34
    tmp = fieldname(insn, 21, 5); \
9565
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9566
34
    tmp = fieldname(insn, 9, 2); \
9567
34
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9568
34
    return S; \
9569
34
  case 155: \
9570
21
    tmp = fieldname(insn, 11, 5); \
9571
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9572
21
    tmp = fieldname(insn, 21, 5); \
9573
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9574
21
    tmp = fieldname(insn, 16, 5); \
9575
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9576
21
    tmp = fieldname(insn, 9, 2); \
9577
21
    MCOperand_CreateImm0(MI, tmp); \
9578
21
    return S; \
9579
89
  case 156: \
9580
89
    tmp = fieldname(insn, 16, 5); \
9581
89
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9582
89
    tmp = fieldname(insn, 9, 2); \
9583
89
    MCOperand_CreateImm0(MI, tmp); \
9584
89
    return S; \
9585
218
  case 157: \
9586
218
    tmp = fieldname(insn, 6, 16); \
9587
218
    MCOperand_CreateImm0(MI, tmp); \
9588
218
    return S; \
9589
192
  case 158: \
9590
192
    tmp = fieldname(insn, 21, 5); \
9591
192
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9592
192
    tmp = fieldname(insn, 0, 16); \
9593
192
    MCOperand_CreateImm0(MI, tmp); \
9594
192
    return S; \
9595
814
  case 159: \
9596
814
    if (!Check(&S, DecodeLoadByte15(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9597
814
    return S; \
9598
814
  case 160: \
9599
290
    if (!Check(&S, DecodeFMemCop2MMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9600
290
    return S; \
9601
290
  case 161: \
9602
53
    tmp = fieldname(insn, 16, 5); \
9603
53
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9604
53
    tmp = fieldname(insn, 0, 16); \
9605
53
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9606
53
    return S; \
9607
312
  case 162: \
9608
312
    tmp = fieldname(insn, 16, 5); \
9609
312
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9610
312
    tmp = fieldname(insn, 0, 16); \
9611
312
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9612
312
    return S; \
9613
312
  case 163: \
9614
13
    if (!Check(&S, DecodeSynciR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9615
13
    return S; \
9616
21
  case 164: \
9617
21
    tmp = fieldname(insn, 11, 5); \
9618
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9619
21
    tmp = fieldname(insn, 16, 5); \
9620
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9621
21
    tmp = fieldname(insn, 21, 5); \
9622
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9623
21
    return S; \
9624
23
  case 165: \
9625
23
    tmp = fieldname(insn, 11, 5); \
9626
23
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9627
23
    tmp = fieldname(insn, 16, 5); \
9628
23
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9629
23
    tmp = fieldname(insn, 21, 5); \
9630
23
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9631
23
    return S; \
9632
74
  case 166: \
9633
74
    tmp = fieldname(insn, 11, 5); \
9634
74
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9635
74
    tmp = fieldname(insn, 16, 5); \
9636
74
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9637
74
    tmp = fieldname(insn, 21, 5); \
9638
74
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9639
74
    return S; \
9640
74
  case 167: \
9641
28
    tmp = fieldname(insn, 16, 5); \
9642
28
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9643
28
    tmp = fieldname(insn, 21, 5); \
9644
28
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9645
28
    return S; \
9646
28
  case 168: \
9647
6
    tmp = fieldname(insn, 11, 5); \
9648
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9649
6
    tmp = fieldname(insn, 21, 5); \
9650
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9651
6
    tmp = fieldname(insn, 16, 5); \
9652
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9653
6
    return S; \
9654
35
  case 169: \
9655
35
    tmp = fieldname(insn, 11, 5); \
9656
35
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9657
35
    tmp = fieldname(insn, 11, 5); \
9658
35
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9659
35
    tmp = fieldname(insn, 16, 5); \
9660
35
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9661
35
    tmp = fieldname(insn, 21, 5); \
9662
35
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9663
35
    return S; \
9664
35
  case 170: \
9665
21
    tmp = fieldname(insn, 11, 5); \
9666
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9667
21
    tmp = fieldname(insn, 11, 5); \
9668
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9669
21
    tmp = fieldname(insn, 16, 5); \
9670
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9671
21
    tmp = fieldname(insn, 21, 5); \
9672
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9673
21
    return S; \
9674
21
  case 171: \
9675
0
    tmp = fieldname(insn, 16, 5); \
9676
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9677
0
    tmp = fieldname(insn, 21, 5); \
9678
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9679
0
    return S; \
9680
51
  case 172: \
9681
51
    tmp = fieldname(insn, 11, 5); \
9682
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9683
51
    tmp = fieldname(insn, 11, 5); \
9684
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9685
51
    tmp = fieldname(insn, 16, 5); \
9686
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9687
51
    tmp = fieldname(insn, 21, 5); \
9688
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9689
51
    return S; \
9690
1.00k
  case 173: \
9691
1.00k
    if (!Check(&S, DecodePOP35GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9692
1.00k
    return S; \
9693
1.00k
  case 174: \
9694
233
    tmp = fieldname(insn, 21, 5); \
9695
233
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9696
233
    tmp = fieldname(insn, 0, 19); \
9697
233
    if (!Check(&S, DecodeSimm19Lsl2(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9698
233
    return S; \
9699
233
  case 175: \
9700
180
    tmp = fieldname(insn, 21, 5); \
9701
180
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9702
180
    tmp = fieldname(insn, 0, 16); \
9703
180
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9704
180
    return S; \
9705
940
  case 176: \
9706
940
    if (!Check(&S, DecodePOP37GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9707
940
    return S; \
9708
940
  case 177: \
9709
169
    tmp = fieldname(insn, 21, 5); \
9710
169
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9711
169
    tmp = fieldname(insn, 0, 21); \
9712
169
    if (!Check(&S, DecodeBranchTarget21MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9713
169
    return S; \
9714
334
  case 178: \
9715
334
    tmp = fieldname(insn, 0, 26); \
9716
334
    if (!Check(&S, DecodeBranchTarget26MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9717
334
    return S; \
9718
848
  case 179: \
9719
848
    if (!Check(&S, DecodeBlezGroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9720
848
    return S; \
9721
848
  case 180: \
9722
588
    if (!Check(&S, DecodePOP65GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9723
588
    return S; \
9724
620
  case 181: \
9725
620
    if (!Check(&S, DecodeBgtzGroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9726
620
    return S; \
9727
620
  case 182: \
9728
319
    if (!Check(&S, DecodePOP75GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9729
319
    return S; \
9730
819
  case 183: \
9731
819
    tmp = fieldname(insn, 11, 5); \
9732
819
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9733
819
    tmp = fieldname(insn, 16, 5); \
9734
819
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9735
819
    tmp = fieldname(insn, 6, 5); \
9736
819
    MCOperand_CreateImm0(MI, tmp); \
9737
819
    return S; \
9738
819
  case 184: \
9739
61
    tmp = fieldname(insn, 11, 5); \
9740
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9741
61
    tmp = fieldname(insn, 21, 5); \
9742
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9743
61
    tmp = fieldname(insn, 18, 3); \
9744
61
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9745
61
    tmp = fieldname(insn, 11, 5); \
9746
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9747
61
    return S; \
9748
61
  case 185: \
9749
45
    tmp = fieldname(insn, 11, 5); \
9750
45
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9751
45
    tmp = fieldname(insn, 21, 5); \
9752
45
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9753
45
    tmp = fieldname(insn, 16, 5); \
9754
45
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9755
45
    tmp = fieldname(insn, 6, 2); \
9756
45
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9757
45
    return S; \
9758
57
  case 186: \
9759
57
    tmp = fieldname(insn, 21, 5); \
9760
57
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9761
57
    return S; \
9762
57
  case 187: \
9763
10
    tmp = fieldname(insn, 11, 5); \
9764
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9765
10
    tmp = fieldname(insn, 21, 5); \
9766
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9767
10
    tmp = fieldname(insn, 16, 5); \
9768
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9769
10
    tmp = fieldname(insn, 11, 5); \
9770
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9771
10
    return S; \
9772
26
  case 188: \
9773
26
    tmp = fieldname(insn, 6, 20); \
9774
26
    MCOperand_CreateImm0(MI, tmp); \
9775
26
    return S; \
9776
116
  case 189: \
9777
116
    tmp = fieldname(insn, 6, 5); \
9778
116
    MCOperand_CreateImm0(MI, tmp); \
9779
116
    return S; \
9780
34
  case 190: \
9781
34
    tmp = fieldname(insn, 11, 5); \
9782
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9783
34
    return S; \
9784
34
  case 191: \
9785
22
    tmp = fieldname(insn, 11, 5); \
9786
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9787
22
    tmp = fieldname(insn, 21, 2); \
9788
22
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9789
22
    return S; \
9790
60
  case 192: \
9791
60
    tmp = fieldname(insn, 11, 2); \
9792
60
    if (!Check(&S, DecodeHI32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9793
60
    tmp = fieldname(insn, 21, 5); \
9794
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9795
60
    return S; \
9796
60
  case 193: \
9797
59
    tmp = fieldname(insn, 11, 2); \
9798
59
    if (!Check(&S, DecodeLO32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9799
59
    tmp = fieldname(insn, 21, 5); \
9800
59
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9801
59
    return S; \
9802
59
  case 194: \
9803
54
    tmp = fieldname(insn, 11, 5); \
9804
54
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9805
54
    tmp = fieldname(insn, 21, 5); \
9806
54
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9807
54
    tmp = fieldname(insn, 16, 5); \
9808
54
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9809
54
    tmp = fieldname(insn, 6, 2); \
9810
54
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9811
54
    return S; \
9812
54
  case 195: \
9813
22
    tmp = fieldname(insn, 11, 2); \
9814
22
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9815
22
    tmp = fieldname(insn, 21, 5); \
9816
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9817
22
    tmp = fieldname(insn, 16, 5); \
9818
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9819
22
    return S; \
9820
396
  case 196: \
9821
396
    tmp = fieldname(insn, 21, 5); \
9822
396
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9823
396
    tmp = fieldname(insn, 16, 5); \
9824
396
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9825
396
    tmp = fieldname(insn, 6, 10); \
9826
396
    MCOperand_CreateImm0(MI, tmp); \
9827
396
    return S; \
9828
411
  case 197: \
9829
411
    tmp = fieldname(insn, 21, 5); \
9830
411
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9831
411
    tmp = fieldname(insn, 0, 16); \
9832
411
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9833
411
    return S; \
9834
411
  case 198: \
9835
22
    tmp = fieldname(insn, 0, 16); \
9836
22
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9837
22
    return S; \
9838
48
  case 199: \
9839
48
    if (!Check(&S, DecodeSyncI(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9840
48
    return S; \
9841
1.13k
  case 200: \
9842
1.13k
    if (!Check(&S, DecodeJumpTarget(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9843
1.13k
    return S; \
9844
1.35k
  case 201: \
9845
1.35k
    tmp = fieldname(insn, 21, 5); \
9846
1.35k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9847
1.35k
    tmp = fieldname(insn, 16, 5); \
9848
1.35k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9849
1.35k
    tmp = fieldname(insn, 0, 16); \
9850
1.35k
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9851
1.35k
    return S; \
9852
1.50k
  case 202: \
9853
1.50k
    tmp = fieldname(insn, 16, 5); \
9854
1.50k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9855
1.50k
    tmp = fieldname(insn, 21, 5); \
9856
1.50k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9857
1.50k
    tmp = fieldname(insn, 0, 16); \
9858
1.50k
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9859
1.50k
    return S; \
9860
1.50k
  case 203: \
9861
908
    tmp = fieldname(insn, 16, 5); \
9862
908
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9863
908
    tmp = fieldname(insn, 21, 5); \
9864
908
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9865
908
    tmp = fieldname(insn, 0, 16); \
9866
908
    MCOperand_CreateImm0(MI, tmp); \
9867
908
    return S; \
9868
908
  case 204: \
9869
8
    tmp = fieldname(insn, 16, 5); \
9870
8
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9871
8
    tmp = fieldname(insn, 11, 5); \
9872
8
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9873
8
    tmp = fieldname(insn, 0, 3); \
9874
8
    MCOperand_CreateImm0(MI, tmp); \
9875
8
    return S; \
9876
8
  case 205: \
9877
8
    tmp = fieldname(insn, 11, 5); \
9878
8
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9879
8
    tmp = fieldname(insn, 16, 5); \
9880
8
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9881
8
    tmp = fieldname(insn, 0, 3); \
9882
8
    MCOperand_CreateImm0(MI, tmp); \
9883
8
    return S; \
9884
61
  case 206: \
9885
61
    tmp = fieldname(insn, 11, 5); \
9886
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9887
61
    tmp = fieldname(insn, 16, 5); \
9888
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9889
61
    tmp = fieldname(insn, 5, 1); \
9890
61
    MCOperand_CreateImm0(MI, tmp); \
9891
61
    tmp = fieldname(insn, 0, 3); \
9892
61
    MCOperand_CreateImm0(MI, tmp); \
9893
61
    tmp = fieldname(insn, 4, 1); \
9894
61
    MCOperand_CreateImm0(MI, tmp); \
9895
61
    return S; \
9896
61
  case 207: \
9897
59
    tmp = fieldname(insn, 11, 10); \
9898
59
    MCOperand_CreateImm0(MI, tmp); \
9899
59
    return S; \
9900
61
  case 208: \
9901
11
    tmp = fieldname(insn, 16, 5); \
9902
11
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9903
11
    tmp = fieldname(insn, 11, 5); \
9904
11
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9905
11
    return S; \
9906
87
  case 209: \
9907
87
    tmp = fieldname(insn, 16, 5); \
9908
87
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9909
87
    tmp = fieldname(insn, 11, 5); \
9910
87
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9911
87
    return S; \
9912
87
  case 210: \
9913
40
    tmp = fieldname(insn, 16, 5); \
9914
40
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9915
40
    tmp = fieldname(insn, 11, 5); \
9916
40
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9917
40
    return S; \
9918
40
  case 211: \
9919
0
    tmp = fieldname(insn, 16, 5); \
9920
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9921
0
    tmp = fieldname(insn, 11, 5); \
9922
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9923
0
    return S; \
9924
29
  case 212: \
9925
29
    tmp = fieldname(insn, 11, 5); \
9926
29
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9927
29
    tmp = fieldname(insn, 16, 5); \
9928
29
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9929
29
    return S; \
9930
78
  case 213: \
9931
78
    tmp = fieldname(insn, 11, 5); \
9932
78
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9933
78
    tmp = fieldname(insn, 16, 5); \
9934
78
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9935
78
    return S; \
9936
78
  case 214: \
9937
15
    tmp = fieldname(insn, 11, 5); \
9938
15
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9939
15
    tmp = fieldname(insn, 16, 5); \
9940
15
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9941
15
    return S; \
9942
15
  case 215: \
9943
0
    tmp = fieldname(insn, 11, 5); \
9944
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9945
0
    tmp = fieldname(insn, 11, 5); \
9946
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9947
0
    tmp = fieldname(insn, 16, 5); \
9948
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9949
0
    return S; \
9950
304
  case 216: \
9951
304
    tmp = fieldname(insn, 18, 3); \
9952
304
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9953
304
    tmp = fieldname(insn, 0, 16); \
9954
304
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9955
304
    return S; \
9956
304
  case 217: \
9957
98
    tmp = fieldname(insn, 16, 5); \
9958
98
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9959
98
    tmp = fieldname(insn, 0, 16); \
9960
98
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9961
98
    return S; \
9962
98
  case 218: \
9963
8
    tmp = fieldname(insn, 6, 5); \
9964
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9965
8
    tmp = fieldname(insn, 11, 5); \
9966
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9967
8
    tmp = fieldname(insn, 16, 5); \
9968
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9969
8
    return S; \
9970
32
  case 219: \
9971
32
    tmp = fieldname(insn, 6, 5); \
9972
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9973
32
    tmp = fieldname(insn, 11, 5); \
9974
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9975
32
    return S; \
9976
32
  case 220: \
9977
16
    tmp = fieldname(insn, 6, 5); \
9978
16
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9979
16
    tmp = fieldname(insn, 11, 5); \
9980
16
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9981
16
    tmp = fieldname(insn, 18, 3); \
9982
16
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9983
16
    tmp = fieldname(insn, 6, 5); \
9984
16
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9985
16
    return S; \
9986
49
  case 221: \
9987
49
    tmp = fieldname(insn, 6, 5); \
9988
49
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9989
49
    tmp = fieldname(insn, 11, 5); \
9990
49
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9991
49
    tmp = fieldname(insn, 16, 5); \
9992
49
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9993
49
    tmp = fieldname(insn, 6, 5); \
9994
49
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9995
49
    return S; \
9996
49
  case 222: \
9997
6
    tmp = fieldname(insn, 6, 5); \
9998
6
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9999
6
    tmp = fieldname(insn, 11, 5); \
10000
5
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10001
5
    return S; \
10002
8
  case 223: \
10003
8
    tmp = fieldname(insn, 6, 5); \
10004
8
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10005
8
    tmp = fieldname(insn, 11, 5); \
10006
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10007
8
    return S; \
10008
48
  case 224: \
10009
48
    tmp = fieldname(insn, 8, 3); \
10010
48
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10011
48
    tmp = fieldname(insn, 11, 5); \
10012
48
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10013
48
    tmp = fieldname(insn, 16, 5); \
10014
48
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10015
48
    return S; \
10016
48
  case 225: \
10017
16
    tmp = fieldname(insn, 6, 5); \
10018
16
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10019
16
    tmp = fieldname(insn, 11, 5); \
10020
15
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10021
15
    tmp = fieldname(insn, 16, 5); \
10022
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10023
14
    return S; \
10024
209
  case 226: \
10025
209
    tmp = fieldname(insn, 6, 5); \
10026
209
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10027
209
    tmp = fieldname(insn, 11, 5); \
10028
209
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10029
209
    return S; \
10030
209
  case 227: \
10031
6
    tmp = fieldname(insn, 6, 5); \
10032
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10033
6
    tmp = fieldname(insn, 11, 5); \
10034
6
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10035
6
    return S; \
10036
22
  case 228: \
10037
22
    tmp = fieldname(insn, 6, 5); \
10038
22
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10039
22
    tmp = fieldname(insn, 11, 5); \
10040
21
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10041
21
    tmp = fieldname(insn, 18, 3); \
10042
20
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10043
20
    tmp = fieldname(insn, 6, 5); \
10044
20
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10045
20
    return S; \
10046
20
  case 229: \
10047
16
    tmp = fieldname(insn, 6, 5); \
10048
16
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10049
16
    tmp = fieldname(insn, 11, 5); \
10050
15
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10051
15
    tmp = fieldname(insn, 16, 5); \
10052
14
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10053
14
    tmp = fieldname(insn, 6, 5); \
10054
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10055
14
    return S; \
10056
20
  case 230: \
10057
20
    tmp = fieldname(insn, 6, 5); \
10058
20
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10059
20
    tmp = fieldname(insn, 11, 5); \
10060
20
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10061
20
    return S; \
10062
21
  case 231: \
10063
21
    tmp = fieldname(insn, 8, 3); \
10064
21
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10065
21
    tmp = fieldname(insn, 11, 5); \
10066
21
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10067
21
    tmp = fieldname(insn, 16, 5); \
10068
20
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10069
20
    return S; \
10070
210
  case 232: \
10071
210
    tmp = fieldname(insn, 16, 5); \
10072
210
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10073
210
    tmp = fieldname(insn, 0, 16); \
10074
210
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10075
210
    return S; \
10076
695
  case 233: \
10077
695
    tmp = fieldname(insn, 16, 5); \
10078
695
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10079
695
    tmp = fieldname(insn, 0, 16); \
10080
695
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10081
695
    return S; \
10082
695
  case 234: \
10083
29
    tmp = fieldname(insn, 16, 5); \
10084
29
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10085
29
    tmp = fieldname(insn, 0, 16); \
10086
29
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10087
29
    return S; \
10088
29
  case 235: \
10089
18
    tmp = fieldname(insn, 16, 5); \
10090
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10091
18
    tmp = fieldname(insn, 11, 5); \
10092
18
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10093
18
    tmp = fieldname(insn, 0, 3); \
10094
18
    MCOperand_CreateImm0(MI, tmp); \
10095
18
    return S; \
10096
18
  case 236: \
10097
3
    tmp = fieldname(insn, 11, 5); \
10098
3
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10099
3
    tmp = fieldname(insn, 16, 5); \
10100
3
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10101
3
    tmp = fieldname(insn, 0, 3); \
10102
3
    MCOperand_CreateImm0(MI, tmp); \
10103
3
    return S; \
10104
75
  case 237: \
10105
75
    tmp = fieldname(insn, 6, 5); \
10106
75
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10107
75
    tmp = fieldname(insn, 21, 5); \
10108
75
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10109
75
    tmp = fieldname(insn, 16, 5); \
10110
75
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10111
75
    return S; \
10112
75
  case 238: \
10113
0
    tmp = fieldname(insn, 6, 5); \
10114
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10115
0
    tmp = fieldname(insn, 21, 5); \
10116
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10117
0
    tmp = fieldname(insn, 16, 5); \
10118
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10119
0
    return S; \
10120
10
  case 239: \
10121
10
    tmp = fieldname(insn, 11, 5); \
10122
10
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10123
10
    tmp = fieldname(insn, 21, 5); \
10124
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10125
10
    tmp = fieldname(insn, 16, 5); \
10126
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10127
10
    return S; \
10128
10
  case 240: \
10129
0
    tmp = fieldname(insn, 11, 5); \
10130
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10131
0
    tmp = fieldname(insn, 21, 5); \
10132
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10133
0
    tmp = fieldname(insn, 16, 5); \
10134
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10135
0
    return S; \
10136
227
  case 241: \
10137
227
    tmp = fieldname(insn, 6, 5); \
10138
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10139
227
    tmp = fieldname(insn, 21, 5); \
10140
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10141
227
    tmp = fieldname(insn, 11, 5); \
10142
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10143
227
    tmp = fieldname(insn, 16, 5); \
10144
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10145
227
    return S; \
10146
227
  case 242: \
10147
0
    tmp = fieldname(insn, 6, 5); \
10148
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10149
0
    tmp = fieldname(insn, 21, 5); \
10150
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10151
0
    tmp = fieldname(insn, 11, 5); \
10152
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10153
0
    tmp = fieldname(insn, 16, 5); \
10154
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10155
0
    return S; \
10156
41
  case 243: \
10157
41
    tmp = fieldname(insn, 11, 2); \
10158
41
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10159
41
    tmp = fieldname(insn, 21, 5); \
10160
41
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10161
41
    tmp = fieldname(insn, 16, 5); \
10162
41
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10163
41
    tmp = fieldname(insn, 11, 2); \
10164
41
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10165
41
    return S; \
10166
41
  case 244: \
10167
34
    tmp = 0x0; \
10168
34
    tmp |= fieldname(insn, 11, 5) << 0; \
10169
34
    tmp |= fieldname(insn, 16, 5) << 0; \
10170
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10171
34
    tmp = fieldname(insn, 21, 5); \
10172
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10173
34
    return S; \
10174
52
  case 245: \
10175
52
    tmp = fieldname(insn, 6, 5); \
10176
52
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10177
52
    tmp = fieldname(insn, 11, 5); \
10178
52
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10179
52
    tmp = fieldname(insn, 16, 8); \
10180
52
    MCOperand_CreateImm0(MI, tmp); \
10181
52
    return S; \
10182
52
  case 246: \
10183
22
    tmp = fieldname(insn, 6, 5); \
10184
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10185
22
    tmp = fieldname(insn, 6, 5); \
10186
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10187
22
    tmp = fieldname(insn, 11, 5); \
10188
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10189
22
    tmp = fieldname(insn, 16, 8); \
10190
22
    MCOperand_CreateImm0(MI, tmp); \
10191
22
    return S; \
10192
27
  case 247: \
10193
27
    tmp = fieldname(insn, 6, 5); \
10194
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10195
27
    tmp = fieldname(insn, 11, 5); \
10196
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10197
27
    tmp = fieldname(insn, 16, 8); \
10198
27
    MCOperand_CreateImm0(MI, tmp); \
10199
27
    return S; \
10200
27
  case 248: \
10201
26
    tmp = fieldname(insn, 6, 5); \
10202
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10203
26
    tmp = fieldname(insn, 11, 5); \
10204
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10205
26
    tmp = fieldname(insn, 16, 8); \
10206
26
    MCOperand_CreateImm0(MI, tmp); \
10207
26
    return S; \
10208
26
  case 249: \
10209
22
    tmp = fieldname(insn, 6, 5); \
10210
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10211
22
    tmp = fieldname(insn, 11, 5); \
10212
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10213
22
    tmp = fieldname(insn, 16, 5); \
10214
22
    MCOperand_CreateImm0(MI, tmp); \
10215
22
    return S; \
10216
89
  case 250: \
10217
89
    tmp = fieldname(insn, 6, 5); \
10218
89
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10219
89
    tmp = fieldname(insn, 11, 5); \
10220
89
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10221
89
    tmp = fieldname(insn, 16, 5); \
10222
89
    MCOperand_CreateImm0(MI, tmp); \
10223
89
    return S; \
10224
89
  case 251: \
10225
10
    tmp = fieldname(insn, 6, 5); \
10226
10
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10227
10
    tmp = fieldname(insn, 11, 5); \
10228
10
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10229
10
    tmp = fieldname(insn, 16, 5); \
10230
10
    MCOperand_CreateImm0(MI, tmp); \
10231
10
    return S; \
10232
34
  case 252: \
10233
34
    tmp = fieldname(insn, 6, 5); \
10234
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10235
34
    tmp = fieldname(insn, 11, 5); \
10236
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10237
34
    tmp = fieldname(insn, 16, 5); \
10238
34
    MCOperand_CreateImm0(MI, tmp); \
10239
34
    return S; \
10240
34
  case 253: \
10241
19
    tmp = fieldname(insn, 6, 5); \
10242
19
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10243
19
    tmp = fieldname(insn, 11, 10); \
10244
19
    MCOperand_CreateImm0(MI, tmp); \
10245
19
    return S; \
10246
54
  case 254: \
10247
54
    tmp = fieldname(insn, 6, 5); \
10248
54
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10249
54
    tmp = fieldname(insn, 11, 10); \
10250
54
    MCOperand_CreateImm0(MI, tmp); \
10251
54
    return S; \
10252
62
  case 255: \
10253
62
    tmp = fieldname(insn, 6, 5); \
10254
62
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10255
62
    tmp = fieldname(insn, 11, 10); \
10256
62
    MCOperand_CreateImm0(MI, tmp); \
10257
62
    return S; \
10258
62
  case 256: \
10259
6
    tmp = fieldname(insn, 6, 5); \
10260
6
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10261
6
    tmp = fieldname(insn, 11, 10); \
10262
6
    MCOperand_CreateImm0(MI, tmp); \
10263
6
    return S; \
10264
19
  case 257: \
10265
19
    tmp = fieldname(insn, 6, 5); \
10266
19
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10267
19
    tmp = fieldname(insn, 11, 5); \
10268
19
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10269
19
    tmp = fieldname(insn, 16, 6); \
10270
19
    MCOperand_CreateImm0(MI, tmp); \
10271
19
    return S; \
10272
27
  case 258: \
10273
27
    tmp = fieldname(insn, 6, 5); \
10274
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10275
27
    tmp = fieldname(insn, 11, 5); \
10276
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10277
27
    tmp = fieldname(insn, 16, 4); \
10278
27
    MCOperand_CreateImm0(MI, tmp); \
10279
27
    return S; \
10280
27
  case 259: \
10281
11
    tmp = fieldname(insn, 6, 5); \
10282
11
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10283
11
    tmp = fieldname(insn, 11, 5); \
10284
11
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10285
11
    tmp = fieldname(insn, 16, 3); \
10286
11
    MCOperand_CreateImm0(MI, tmp); \
10287
11
    return S; \
10288
23
  case 260: \
10289
23
    tmp = fieldname(insn, 6, 5); \
10290
23
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10291
23
    tmp = fieldname(insn, 6, 5); \
10292
23
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10293
23
    tmp = fieldname(insn, 11, 5); \
10294
23
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10295
23
    tmp = fieldname(insn, 16, 6); \
10296
23
    MCOperand_CreateImm0(MI, tmp); \
10297
23
    return S; \
10298
26
  case 261: \
10299
26
    tmp = fieldname(insn, 6, 5); \
10300
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10301
26
    tmp = fieldname(insn, 6, 5); \
10302
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10303
26
    tmp = fieldname(insn, 11, 5); \
10304
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10305
26
    tmp = fieldname(insn, 16, 5); \
10306
26
    MCOperand_CreateImm0(MI, tmp); \
10307
26
    return S; \
10308
26
  case 262: \
10309
10
    tmp = fieldname(insn, 6, 5); \
10310
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10311
10
    tmp = fieldname(insn, 6, 5); \
10312
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10313
10
    tmp = fieldname(insn, 11, 5); \
10314
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10315
10
    tmp = fieldname(insn, 16, 4); \
10316
10
    MCOperand_CreateImm0(MI, tmp); \
10317
10
    return S; \
10318
12
  case 263: \
10319
12
    tmp = fieldname(insn, 6, 5); \
10320
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10321
12
    tmp = fieldname(insn, 6, 5); \
10322
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10323
12
    tmp = fieldname(insn, 11, 5); \
10324
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10325
12
    tmp = fieldname(insn, 16, 3); \
10326
12
    MCOperand_CreateImm0(MI, tmp); \
10327
12
    return S; \
10328
58
  case 264: \
10329
58
    tmp = fieldname(insn, 6, 5); \
10330
58
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10331
58
    tmp = fieldname(insn, 11, 5); \
10332
58
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10333
58
    tmp = fieldname(insn, 16, 5); \
10334
58
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10335
58
    return S; \
10336
71
  case 265: \
10337
71
    tmp = fieldname(insn, 6, 5); \
10338
71
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10339
71
    tmp = fieldname(insn, 11, 5); \
10340
71
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10341
71
    tmp = fieldname(insn, 16, 5); \
10342
71
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10343
71
    return S; \
10344
71
  case 266: \
10345
38
    tmp = fieldname(insn, 6, 5); \
10346
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10347
38
    tmp = fieldname(insn, 11, 5); \
10348
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10349
38
    tmp = fieldname(insn, 16, 5); \
10350
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10351
38
    return S; \
10352
80
  case 267: \
10353
80
    tmp = fieldname(insn, 6, 5); \
10354
80
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10355
80
    tmp = fieldname(insn, 11, 5); \
10356
80
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10357
80
    tmp = fieldname(insn, 16, 5); \
10358
80
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10359
80
    return S; \
10360
151
  case 268: \
10361
151
    tmp = fieldname(insn, 6, 5); \
10362
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10363
151
    tmp = fieldname(insn, 6, 5); \
10364
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10365
151
    tmp = fieldname(insn, 11, 5); \
10366
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10367
151
    tmp = fieldname(insn, 16, 5); \
10368
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10369
151
    return S; \
10370
151
  case 269: \
10371
36
    tmp = fieldname(insn, 6, 5); \
10372
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10373
36
    tmp = fieldname(insn, 6, 5); \
10374
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10375
36
    tmp = fieldname(insn, 11, 5); \
10376
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10377
36
    tmp = fieldname(insn, 16, 5); \
10378
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10379
36
    return S; \
10380
36
  case 270: \
10381
19
    tmp = fieldname(insn, 6, 5); \
10382
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10383
19
    tmp = fieldname(insn, 6, 5); \
10384
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10385
19
    tmp = fieldname(insn, 11, 5); \
10386
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10387
19
    tmp = fieldname(insn, 16, 5); \
10388
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10389
19
    return S; \
10390
19
  case 271: \
10391
15
    tmp = fieldname(insn, 6, 5); \
10392
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10393
15
    tmp = fieldname(insn, 6, 5); \
10394
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10395
15
    tmp = fieldname(insn, 11, 5); \
10396
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10397
15
    tmp = fieldname(insn, 16, 5); \
10398
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10399
15
    return S; \
10400
21
  case 272: \
10401
21
    tmp = fieldname(insn, 6, 5); \
10402
21
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10403
21
    tmp = fieldname(insn, 11, 5); \
10404
21
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10405
21
    tmp = fieldname(insn, 16, 5); \
10406
21
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10407
21
    return S; \
10408
23
  case 273: \
10409
23
    tmp = fieldname(insn, 6, 5); \
10410
23
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10411
23
    tmp = fieldname(insn, 11, 5); \
10412
23
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10413
23
    tmp = fieldname(insn, 16, 5); \
10414
23
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10415
23
    return S; \
10416
37
  case 274: \
10417
37
    tmp = fieldname(insn, 6, 5); \
10418
37
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10419
37
    tmp = fieldname(insn, 11, 5); \
10420
37
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10421
37
    tmp = fieldname(insn, 16, 5); \
10422
37
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10423
37
    return S; \
10424
39
  case 275: \
10425
39
    tmp = fieldname(insn, 6, 5); \
10426
39
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10427
39
    tmp = fieldname(insn, 6, 5); \
10428
39
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10429
39
    tmp = fieldname(insn, 11, 5); \
10430
39
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10431
39
    tmp = fieldname(insn, 16, 5); \
10432
39
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10433
39
    return S; \
10434
39
  case 276: \
10435
4
    tmp = fieldname(insn, 6, 5); \
10436
4
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10437
4
    tmp = fieldname(insn, 6, 5); \
10438
4
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10439
4
    tmp = fieldname(insn, 11, 5); \
10440
4
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10441
4
    tmp = fieldname(insn, 16, 5); \
10442
4
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10443
4
    return S; \
10444
38
  case 277: \
10445
38
    tmp = fieldname(insn, 6, 5); \
10446
38
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10447
38
    tmp = fieldname(insn, 6, 5); \
10448
38
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10449
38
    tmp = fieldname(insn, 11, 5); \
10450
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10451
38
    tmp = fieldname(insn, 16, 5); \
10452
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10453
38
    return S; \
10454
38
  case 278: \
10455
18
    tmp = fieldname(insn, 6, 5); \
10456
18
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10457
18
    tmp = fieldname(insn, 6, 5); \
10458
18
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10459
18
    tmp = fieldname(insn, 11, 5); \
10460
18
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10461
18
    tmp = fieldname(insn, 16, 5); \
10462
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10463
18
    return S; \
10464
26
  case 279: \
10465
26
    tmp = fieldname(insn, 6, 5); \
10466
26
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10467
26
    tmp = fieldname(insn, 6, 5); \
10468
26
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10469
26
    tmp = fieldname(insn, 11, 5); \
10470
26
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10471
26
    tmp = fieldname(insn, 16, 5); \
10472
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10473
26
    return S; \
10474
63
  case 280: \
10475
63
    tmp = fieldname(insn, 6, 5); \
10476
63
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10477
63
    tmp = fieldname(insn, 6, 5); \
10478
63
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10479
63
    tmp = fieldname(insn, 11, 5); \
10480
63
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10481
63
    tmp = fieldname(insn, 16, 5); \
10482
63
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10483
63
    return S; \
10484
63
  case 281: \
10485
10
    tmp = fieldname(insn, 6, 5); \
10486
10
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10487
10
    tmp = fieldname(insn, 6, 5); \
10488
10
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10489
10
    tmp = fieldname(insn, 11, 5); \
10490
10
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10491
10
    tmp = fieldname(insn, 16, 5); \
10492
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10493
10
    return S; \
10494
10
  case 282: \
10495
7
    tmp = fieldname(insn, 6, 5); \
10496
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10497
7
    tmp = fieldname(insn, 11, 5); \
10498
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10499
7
    tmp = fieldname(insn, 16, 5); \
10500
7
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10501
7
    return S; \
10502
63
  case 283: \
10503
63
    tmp = fieldname(insn, 6, 5); \
10504
63
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10505
63
    tmp = fieldname(insn, 11, 5); \
10506
63
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10507
63
    tmp = fieldname(insn, 16, 5); \
10508
63
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10509
63
    return S; \
10510
63
  case 284: \
10511
18
    tmp = fieldname(insn, 6, 5); \
10512
18
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10513
18
    tmp = fieldname(insn, 11, 5); \
10514
18
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10515
18
    tmp = fieldname(insn, 16, 5); \
10516
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10517
18
    return S; \
10518
60
  case 285: \
10519
60
    tmp = fieldname(insn, 6, 5); \
10520
60
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10521
60
    tmp = fieldname(insn, 11, 5); \
10522
60
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10523
60
    tmp = fieldname(insn, 16, 5); \
10524
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10525
60
    return S; \
10526
60
  case 286: \
10527
23
    tmp = fieldname(insn, 6, 5); \
10528
23
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10529
23
    tmp = fieldname(insn, 6, 5); \
10530
23
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10531
23
    tmp = fieldname(insn, 11, 5); \
10532
23
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10533
23
    tmp = fieldname(insn, 16, 4); \
10534
23
    MCOperand_CreateImm0(MI, tmp); \
10535
23
    return S; \
10536
56
  case 287: \
10537
56
    tmp = fieldname(insn, 6, 5); \
10538
56
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10539
56
    tmp = fieldname(insn, 6, 5); \
10540
56
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10541
56
    tmp = fieldname(insn, 11, 5); \
10542
56
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10543
56
    tmp = fieldname(insn, 16, 3); \
10544
56
    MCOperand_CreateImm0(MI, tmp); \
10545
56
    return S; \
10546
56
  case 288: \
10547
46
    tmp = fieldname(insn, 6, 5); \
10548
46
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10549
46
    tmp = fieldname(insn, 6, 5); \
10550
46
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10551
46
    tmp = fieldname(insn, 11, 5); \
10552
46
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10553
46
    tmp = fieldname(insn, 16, 2); \
10554
46
    MCOperand_CreateImm0(MI, tmp); \
10555
46
    return S; \
10556
46
  case 289: \
10557
3
    tmp = fieldname(insn, 6, 5); \
10558
3
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10559
3
    tmp = fieldname(insn, 6, 5); \
10560
3
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10561
3
    tmp = fieldname(insn, 11, 5); \
10562
3
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10563
3
    tmp = fieldname(insn, 16, 1); \
10564
3
    MCOperand_CreateImm0(MI, tmp); \
10565
3
    return S; \
10566
61
  case 290: \
10567
61
    tmp = fieldname(insn, 6, 5); \
10568
61
    if (!Check(&S, DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10569
61
    tmp = fieldname(insn, 11, 5); \
10570
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10571
60
    return S; \
10572
60
  case 291: \
10573
27
    tmp = fieldname(insn, 6, 5); \
10574
27
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10575
27
    tmp = fieldname(insn, 11, 5); \
10576
27
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10577
27
    tmp = fieldname(insn, 16, 4); \
10578
27
    MCOperand_CreateImm0(MI, tmp); \
10579
27
    return S; \
10580
27
  case 292: \
10581
7
    tmp = fieldname(insn, 6, 5); \
10582
7
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10583
7
    tmp = fieldname(insn, 11, 5); \
10584
7
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10585
7
    tmp = fieldname(insn, 16, 3); \
10586
7
    MCOperand_CreateImm0(MI, tmp); \
10587
7
    return S; \
10588
43
  case 293: \
10589
43
    tmp = fieldname(insn, 6, 5); \
10590
43
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10591
43
    tmp = fieldname(insn, 11, 5); \
10592
43
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10593
43
    tmp = fieldname(insn, 16, 2); \
10594
43
    MCOperand_CreateImm0(MI, tmp); \
10595
43
    return S; \
10596
43
  case 294: \
10597
16
    tmp = fieldname(insn, 6, 5); \
10598
16
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10599
16
    tmp = fieldname(insn, 11, 5); \
10600
16
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10601
16
    tmp = fieldname(insn, 16, 1); \
10602
16
    MCOperand_CreateImm0(MI, tmp); \
10603
16
    return S; \
10604
130
  case 295: \
10605
130
    tmp = fieldname(insn, 6, 5); \
10606
130
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10607
130
    tmp = fieldname(insn, 11, 5); \
10608
130
    if (!Check(&S, DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10609
130
    return S; \
10610
130
  case 296: \
10611
34
    tmp = fieldname(insn, 6, 5); \
10612
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10613
34
    tmp = fieldname(insn, 11, 5); \
10614
34
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10615
34
    tmp = fieldname(insn, 16, 4); \
10616
34
    MCOperand_CreateImm0(MI, tmp); \
10617
34
    return S; \
10618
61
  case 297: \
10619
61
    tmp = fieldname(insn, 6, 5); \
10620
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10621
61
    tmp = fieldname(insn, 11, 5); \
10622
61
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10623
61
    tmp = fieldname(insn, 16, 3); \
10624
61
    MCOperand_CreateImm0(MI, tmp); \
10625
61
    return S; \
10626
61
  case 298: \
10627
3
    tmp = fieldname(insn, 6, 5); \
10628
3
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10629
3
    tmp = fieldname(insn, 11, 5); \
10630
3
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10631
3
    tmp = fieldname(insn, 16, 2); \
10632
3
    MCOperand_CreateImm0(MI, tmp); \
10633
3
    return S; \
10634
20
  case 299: \
10635
20
    tmp = fieldname(insn, 6, 5); \
10636
20
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10637
20
    tmp = fieldname(insn, 11, 5); \
10638
20
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10639
20
    tmp = fieldname(insn, 16, 1); \
10640
20
    MCOperand_CreateImm0(MI, tmp); \
10641
20
    return S; \
10642
20
  case 300: \
10643
12
    tmp = fieldname(insn, 6, 5); \
10644
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10645
12
    tmp = fieldname(insn, 11, 5); \
10646
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10647
12
    return S; \
10648
12
  case 301: \
10649
7
    tmp = fieldname(insn, 6, 5); \
10650
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10651
7
    tmp = fieldname(insn, 6, 5); \
10652
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10653
7
    tmp = fieldname(insn, 11, 5); \
10654
7
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10655
7
    tmp = fieldname(insn, 16, 4); \
10656
7
    MCOperand_CreateImm0(MI, tmp); \
10657
7
    return S; \
10658
18
  case 302: \
10659
18
    tmp = fieldname(insn, 6, 5); \
10660
18
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10661
18
    tmp = fieldname(insn, 6, 5); \
10662
18
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10663
18
    tmp = fieldname(insn, 11, 5); \
10664
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10665
18
    tmp = fieldname(insn, 16, 3); \
10666
18
    MCOperand_CreateImm0(MI, tmp); \
10667
18
    return S; \
10668
47
  case 303: \
10669
47
    tmp = fieldname(insn, 6, 5); \
10670
47
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10671
47
    tmp = fieldname(insn, 6, 5); \
10672
47
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10673
47
    tmp = fieldname(insn, 11, 5); \
10674
47
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10675
47
    tmp = fieldname(insn, 16, 2); \
10676
47
    MCOperand_CreateImm0(MI, tmp); \
10677
47
    return S; \
10678
47
  case 304: \
10679
34
    tmp = fieldname(insn, 6, 5); \
10680
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10681
34
    tmp = fieldname(insn, 6, 5); \
10682
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10683
34
    tmp = fieldname(insn, 11, 5); \
10684
34
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10685
34
    tmp = fieldname(insn, 16, 1); \
10686
34
    MCOperand_CreateImm0(MI, tmp); \
10687
34
    return S; \
10688
120
  case 305: \
10689
120
    if (!Check(&S, DecodeINSVE_DF(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10690
120
    return S; \
10691
120
  case 306: \
10692
7
    tmp = fieldname(insn, 6, 5); \
10693
7
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10694
7
    tmp = fieldname(insn, 11, 5); \
10695
7
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10696
7
    tmp = fieldname(insn, 16, 5); \
10697
7
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10698
7
    return S; \
10699
7
  case 307: \
10700
5
    tmp = fieldname(insn, 6, 5); \
10701
5
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10702
5
    tmp = fieldname(insn, 11, 5); \
10703
5
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10704
5
    tmp = fieldname(insn, 16, 5); \
10705
5
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10706
5
    return S; \
10707
67
  case 308: \
10708
67
    tmp = fieldname(insn, 6, 5); \
10709
67
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10710
67
    tmp = fieldname(insn, 11, 5); \
10711
67
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10712
67
    return S; \
10713
67
  case 309: \
10714
47
    tmp = fieldname(insn, 6, 5); \
10715
47
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10716
47
    tmp = fieldname(insn, 11, 5); \
10717
47
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10718
47
    return S; \
10719
47
  case 310: \
10720
30
    tmp = fieldname(insn, 6, 5); \
10721
30
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10722
30
    tmp = fieldname(insn, 11, 5); \
10723
30
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10724
30
    return S; \
10725
41
  case 311: \
10726
41
    tmp = fieldname(insn, 6, 5); \
10727
41
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10728
41
    tmp = fieldname(insn, 11, 5); \
10729
41
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10730
41
    return S; \
10731
41
  case 312: \
10732
10
    tmp = fieldname(insn, 6, 5); \
10733
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10734
10
    tmp = fieldname(insn, 11, 5); \
10735
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10736
10
    return S; \
10737
14
  case 313: \
10738
14
    tmp = fieldname(insn, 6, 5); \
10739
14
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10740
14
    tmp = fieldname(insn, 11, 5); \
10741
14
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10742
14
    return S; \
10743
14
  case 314: \
10744
7
    tmp = fieldname(insn, 6, 5); \
10745
7
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10746
7
    tmp = fieldname(insn, 11, 5); \
10747
7
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10748
7
    return S; \
10749
7
  case 315: \
10750
6
    tmp = fieldname(insn, 6, 5); \
10751
6
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10752
6
    tmp = fieldname(insn, 11, 5); \
10753
6
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10754
6
    return S; \
10755
8
  case 316: \
10756
8
    tmp = fieldname(insn, 6, 5); \
10757
8
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10758
8
    tmp = fieldname(insn, 11, 5); \
10759
8
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10760
8
    return S; \
10761
623
  case 317: \
10762
623
    if (!Check(&S, DecodeMSA128Mem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10763
623
    return S; \
10764
623
  case 318: \
10765
215
    tmp = fieldname(insn, 16, 5); \
10766
215
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10767
215
    tmp = fieldname(insn, 21, 5); \
10768
215
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10769
215
    tmp = fieldname(insn, 6, 5); \
10770
215
    MCOperand_CreateImm0(MI, tmp); \
10771
215
    tmp = fieldname(insn, 11, 5); \
10772
215
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10773
215
    return S; \
10774
215
  case 319: \
10775
38
    tmp = fieldname(insn, 16, 5); \
10776
38
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10777
38
    tmp = fieldname(insn, 21, 5); \
10778
38
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10779
38
    tmp = fieldname(insn, 6, 5); \
10780
38
    MCOperand_CreateImm0(MI, tmp); \
10781
38
    tmp = fieldname(insn, 11, 5); \
10782
38
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10783
38
    tmp = fieldname(insn, 16, 5); \
10784
38
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10785
38
    return S; \
10786
68
  case 320: \
10787
68
    tmp = fieldname(insn, 21, 5); \
10788
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10789
68
    tmp = fieldname(insn, 11, 5); \
10790
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10791
68
    tmp = fieldname(insn, 16, 5); \
10792
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10793
68
    return S; \
10794
68
  case 321: \
10795
34
    tmp = fieldname(insn, 11, 5); \
10796
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10797
34
    tmp = fieldname(insn, 21, 5); \
10798
34
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10799
34
    tmp = fieldname(insn, 16, 5); \
10800
34
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10801
34
    return S; \
10802
34
  case 322: \
10803
12
    tmp = fieldname(insn, 16, 5); \
10804
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10805
12
    tmp = fieldname(insn, 16, 5); \
10806
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10807
12
    tmp = fieldname(insn, 21, 5); \
10808
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10809
12
    return S; \
10810
16
  case 323: \
10811
16
    tmp = fieldname(insn, 11, 5); \
10812
16
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10813
16
    tmp = fieldname(insn, 21, 5); \
10814
16
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10815
16
    tmp = fieldname(insn, 16, 5); \
10816
16
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10817
16
    return S; \
10818
27
  case 324: \
10819
27
    tmp = fieldname(insn, 11, 5); \
10820
27
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10821
27
    tmp = fieldname(insn, 21, 5); \
10822
27
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10823
27
    return S; \
10824
27
  case 325: \
10825
11
    tmp = fieldname(insn, 11, 5); \
10826
11
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10827
11
    tmp = fieldname(insn, 21, 5); \
10828
11
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10829
11
    tmp = fieldname(insn, 16, 5); \
10830
11
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10831
11
    return S; \
10832
19
  case 326: \
10833
19
    tmp = fieldname(insn, 11, 5); \
10834
19
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10835
19
    tmp = fieldname(insn, 21, 5); \
10836
19
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10837
19
    tmp = fieldname(insn, 16, 5); \
10838
19
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10839
19
    return S; \
10840
66
  case 327: \
10841
66
    tmp = fieldname(insn, 16, 5); \
10842
66
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10843
66
    tmp = fieldname(insn, 21, 5); \
10844
66
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10845
66
    tmp = fieldname(insn, 11, 5); \
10846
66
    MCOperand_CreateImm0(MI, tmp); \
10847
66
    tmp = fieldname(insn, 16, 5); \
10848
66
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10849
66
    return S; \
10850
66
  case 328: \
10851
64
    tmp = fieldname(insn, 11, 5); \
10852
64
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10853
64
    tmp = fieldname(insn, 16, 5); \
10854
64
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10855
64
    return S; \
10856
64
  case 329: \
10857
11
    tmp = fieldname(insn, 11, 5); \
10858
11
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10859
11
    tmp = fieldname(insn, 16, 10); \
10860
11
    MCOperand_CreateImm0(MI, tmp); \
10861
11
    return S; \
10862
11
  case 330: \
10863
9
    tmp = fieldname(insn, 11, 5); \
10864
9
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10865
9
    tmp = fieldname(insn, 16, 5); \
10866
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10867
9
    return S; \
10868
51
  case 331: \
10869
51
    tmp = fieldname(insn, 11, 5); \
10870
51
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10871
51
    tmp = fieldname(insn, 16, 5); \
10872
51
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10873
51
    return S; \
10874
51
  case 332: \
10875
33
    tmp = fieldname(insn, 11, 5); \
10876
33
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10877
33
    tmp = fieldname(insn, 16, 5); \
10878
33
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10879
33
    return S; \
10880
35
  case 333: \
10881
35
    tmp = fieldname(insn, 11, 5); \
10882
35
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10883
35
    tmp = fieldname(insn, 16, 5); \
10884
35
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10885
35
    tmp = fieldname(insn, 21, 5); \
10886
35
    MCOperand_CreateImm0(MI, tmp); \
10887
35
    return S; \
10888
61
  case 334: \
10889
61
    tmp = fieldname(insn, 11, 5); \
10890
61
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10891
61
    tmp = fieldname(insn, 16, 5); \
10892
61
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10893
61
    tmp = fieldname(insn, 21, 5); \
10894
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10895
61
    return S; \
10896
177
  case 335: \
10897
177
    tmp = fieldname(insn, 11, 5); \
10898
177
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10899
177
    tmp = fieldname(insn, 16, 5); \
10900
177
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10901
177
    tmp = fieldname(insn, 21, 5); \
10902
177
    MCOperand_CreateImm0(MI, tmp); \
10903
177
    return S; \
10904
177
  case 336: \
10905
72
    if (!Check(&S, DecodeMemEVA(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10906
72
    return S; \
10907
72
  case 337: \
10908
44
    if (!Check(&S, DecodeCacheeOp_CacheOpR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10909
44
    return S; \
10910
44
  case 338: \
10911
12
    tmp = fieldname(insn, 16, 5); \
10912
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10913
12
    tmp = fieldname(insn, 21, 5); \
10914
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10915
12
    tmp = fieldname(insn, 11, 5); \
10916
12
    MCOperand_CreateImm0(MI, tmp); \
10917
12
    tmp = fieldname(insn, 16, 5); \
10918
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10919
12
    return S; \
10920
68
  case 339: \
10921
68
    tmp = fieldname(insn, 16, 5); \
10922
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10923
68
    tmp = fieldname(insn, 11, 2); \
10924
68
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10925
68
    tmp = fieldname(insn, 21, 5); \
10926
68
    MCOperand_CreateImm0(MI, tmp); \
10927
68
    return S; \
10928
68
  case 340: \
10929
18
    tmp = fieldname(insn, 16, 5); \
10930
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10931
18
    tmp = fieldname(insn, 11, 2); \
10932
18
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10933
18
    tmp = fieldname(insn, 21, 5); \
10934
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10935
18
    return S; \
10936
18
  case 341: \
10937
18
    tmp = fieldname(insn, 11, 5); \
10938
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10939
18
    tmp = fieldname(insn, 16, 10); \
10940
18
    MCOperand_CreateImm0(MI, tmp); \
10941
18
    return S; \
10942
18
  case 342: \
10943
9
    tmp = fieldname(insn, 21, 5); \
10944
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10945
9
    tmp = fieldname(insn, 11, 10); \
10946
9
    MCOperand_CreateImm0(MI, tmp); \
10947
9
    return S; \
10948
9
  case 343: \
10949
7
    tmp = fieldname(insn, 11, 2); \
10950
7
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10951
7
    tmp = fieldname(insn, 20, 6); \
10952
7
    if (!Check(&S, DecodeSImmWithOffsetAndScale_6_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10953
7
    tmp = fieldname(insn, 11, 2); \
10954
7
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10955
7
    return S; \
10956
12
  case 344: \
10957
12
    tmp = fieldname(insn, 11, 2); \
10958
12
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10959
12
    tmp = fieldname(insn, 21, 5); \
10960
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10961
12
    tmp = fieldname(insn, 11, 2); \
10962
12
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10963
12
    return S; \
10964
12
  case 345: \
10965
10
    tmp = fieldname(insn, 16, 5); \
10966
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10967
10
    tmp = fieldname(insn, 11, 5); \
10968
10
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10969
10
    tmp = fieldname(insn, 6, 3); \
10970
7
    MCOperand_CreateImm0(MI, tmp); \
10971
7
    return S; \
10972
172
  case 346: \
10973
172
    if (!Check(&S, DecodeCacheOp(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10974
172
    return S; \
10975
816
  case 347: \
10976
816
    if (!Check(&S, DecodeFMem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10977
816
    return S; \
10978
1.11k
  case 348: \
10979
1.11k
    if (!Check(&S, DecodeFMem2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10980
1.11k
    return S; \
10981
1.11k
  case 349: \
10982
0
    if (!Check(&S, DecodeDAHIDATI(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10983
0
    return S; \
10984
11
  case 350: \
10985
11
    tmp = fieldname(insn, 0, 16); \
10986
11
    MCOperand_CreateImm0(MI, tmp); \
10987
11
    return S; \
10988
543
  case 351: \
10989
543
    if (!Check(&S, DecodeBlezGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10990
543
    return S; \
10991
543
  case 352: \
10992
398
    if (!Check(&S, DecodeBgtzGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10993
398
    return S; \
10994
1.57k
  case 353: \
10995
1.57k
    if (!Check(&S, DecodeAddiGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10996
1.57k
    return S; \
10997
1.57k
  case 354: \
10998
33
    tmp = fieldname(insn, 16, 5); \
10999
33
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11000
33
    tmp = fieldname(insn, 0, 16); \
11001
33
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11002
33
    return S; \
11003
63
  case 355: \
11004
63
    tmp = fieldname(insn, 6, 5); \
11005
63
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11006
63
    tmp = fieldname(insn, 6, 5); \
11007
63
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11008
63
    tmp = fieldname(insn, 11, 5); \
11009
63
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11010
63
    tmp = fieldname(insn, 16, 5); \
11011
63
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11012
63
    return S; \
11013
63
  case 356: \
11014
32
    tmp = fieldname(insn, 6, 5); \
11015
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11016
32
    tmp = fieldname(insn, 6, 5); \
11017
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11018
32
    tmp = fieldname(insn, 11, 5); \
11019
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11020
32
    tmp = fieldname(insn, 16, 5); \
11021
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11022
32
    return S; \
11023
36
  case 357: \
11024
36
    tmp = fieldname(insn, 6, 5); \
11025
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11026
36
    tmp = fieldname(insn, 6, 5); \
11027
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11028
36
    tmp = fieldname(insn, 11, 5); \
11029
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11030
36
    tmp = fieldname(insn, 16, 5); \
11031
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11032
36
    return S; \
11033
36
  case 358: \
11034
3
    tmp = fieldname(insn, 6, 5); \
11035
3
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11036
3
    tmp = fieldname(insn, 11, 5); \
11037
3
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11038
3
    tmp = fieldname(insn, 16, 5); \
11039
3
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11040
3
    return S; \
11041
13
  case 359: \
11042
13
    tmp = fieldname(insn, 6, 5); \
11043
13
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11044
13
    tmp = fieldname(insn, 11, 5); \
11045
13
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11046
13
    tmp = fieldname(insn, 16, 5); \
11047
13
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11048
13
    return S; \
11049
26
  case 360: \
11050
26
    tmp = fieldname(insn, 6, 5); \
11051
26
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11052
26
    tmp = fieldname(insn, 11, 5); \
11053
26
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11054
26
    tmp = fieldname(insn, 16, 5); \
11055
26
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11056
26
    return S; \
11057
26
  case 361: \
11058
25
    tmp = fieldname(insn, 16, 5); \
11059
25
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11060
25
    tmp = fieldname(insn, 0, 16); \
11061
25
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11062
25
    return S; \
11063
97
  case 362: \
11064
97
    if (!Check(&S, DecodeFMemCop2R6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11065
97
    return S; \
11066
117
  case 363: \
11067
117
    if (!Check(&S, DecodeBlezlGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11068
117
    return S; \
11069
308
  case 364: \
11070
308
    if (!Check(&S, DecodeBgtzlGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11071
308
    return S; \
11072
317
  case 365: \
11073
317
    if (!Check(&S, DecodeDaddiGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11074
317
    return S; \
11075
317
  case 366: \
11076
0
    tmp = fieldname(insn, 16, 5); \
11077
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11078
0
    tmp = fieldname(insn, 21, 5); \
11079
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11080
0
    tmp = fieldname(insn, 0, 16); \
11081
0
    MCOperand_CreateImm0(MI, tmp); \
11082
0
    return S; \
11083
8
  case 367: \
11084
8
    if (!Check(&S, DecodeCRC(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11085
8
    return S; \
11086
8
  case 368: \
11087
6
    tmp = fieldname(insn, 11, 5); \
11088
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11089
6
    tmp = fieldname(insn, 21, 5); \
11090
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11091
6
    tmp = fieldname(insn, 16, 5); \
11092
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11093
6
    tmp = fieldname(insn, 6, 2); \
11094
6
    MCOperand_CreateImm0(MI, tmp); \
11095
6
    return S; \
11096
6
  case 369: \
11097
0
    tmp = fieldname(insn, 11, 5); \
11098
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11099
0
    tmp = fieldname(insn, 16, 5); \
11100
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11101
0
    return S; \
11102
0
  case 370: \
11103
0
    tmp = fieldname(insn, 11, 5); \
11104
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11105
0
    tmp = fieldname(insn, 21, 5); \
11106
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11107
0
    tmp = fieldname(insn, 16, 5); \
11108
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11109
0
    tmp = fieldname(insn, 6, 3); \
11110
0
    MCOperand_CreateImm0(MI, tmp); \
11111
0
    return S; \
11112
88
  case 371: \
11113
88
    if (!Check(&S, DecodeSpecial3LlSc(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11114
88
    return S; \
11115
88
  case 372: \
11116
14
    tmp = fieldname(insn, 21, 5); \
11117
14
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11118
14
    tmp = fieldname(insn, 8, 2); \
11119
14
    MCOperand_CreateImm0(MI, tmp); \
11120
14
    return S; \
11121
254
  case 373: \
11122
254
    tmp = fieldname(insn, 0, 26); \
11123
254
    if (!Check(&S, DecodeBranchTarget26(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11124
254
    return S; \
11125
270
  case 374: \
11126
270
    tmp = fieldname(insn, 21, 5); \
11127
270
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11128
270
    tmp = fieldname(insn, 0, 21); \
11129
270
    if (!Check(&S, DecodeBranchTarget21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11130
270
    return S; \
11131
270
  case 375: \
11132
0
    tmp = fieldname(insn, 21, 5); \
11133
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11134
0
    tmp = fieldname(insn, 0, 18); \
11135
0
    if (!Check(&S, DecodeSimm18Lsl3(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11136
0
    return S; \
11137
0
  case 376: \
11138
0
    tmp = fieldname(insn, 21, 5); \
11139
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11140
0
    tmp = fieldname(insn, 0, 21); \
11141
0
    if (!Check(&S, DecodeBranchTarget21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11142
0
    return S; \
11143
14
  case 377: \
11144
14
    tmp = fieldname(insn, 11, 5); \
11145
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11146
14
    tmp = fieldname(insn, 16, 5); \
11147
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11148
14
    tmp = fieldname(insn, 21, 5); \
11149
14
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11150
14
    return S; \
11151
65
  case 378: \
11152
65
    tmp = fieldname(insn, 21, 5); \
11153
65
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11154
65
    tmp = fieldname(insn, 16, 5); \
11155
65
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11156
65
    return S; \
11157
203
  case 379: \
11158
203
    tmp = fieldname(insn, 11, 5); \
11159
203
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11160
203
    tmp = fieldname(insn, 16, 5); \
11161
203
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11162
203
    tmp = fieldname(insn, 6, 5); \
11163
203
    MCOperand_CreateImm0(MI, tmp); \
11164
203
    return S; \
11165
203
  case 380: \
11166
55
    tmp = fieldname(insn, 16, 5); \
11167
55
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11168
55
    tmp = fieldname(insn, 11, 5); \
11169
55
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11170
55
    tmp = fieldname(insn, 0, 3); \
11171
55
    MCOperand_CreateImm0(MI, tmp); \
11172
55
    return S; \
11173
55
  case 381: \
11174
3
    tmp = fieldname(insn, 11, 5); \
11175
3
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11176
3
    tmp = fieldname(insn, 16, 5); \
11177
3
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11178
3
    tmp = fieldname(insn, 0, 3); \
11179
3
    MCOperand_CreateImm0(MI, tmp); \
11180
3
    return S; \
11181
7
  case 382: \
11182
7
    tmp = fieldname(insn, 16, 5); \
11183
7
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11184
7
    tmp = fieldname(insn, 11, 5); \
11185
7
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11186
7
    tmp = fieldname(insn, 0, 3); \
11187
7
    MCOperand_CreateImm0(MI, tmp); \
11188
7
    return S; \
11189
31
  case 383: \
11190
31
    tmp = fieldname(insn, 11, 5); \
11191
31
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11192
31
    tmp = fieldname(insn, 16, 5); \
11193
31
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11194
31
    tmp = fieldname(insn, 0, 3); \
11195
31
    MCOperand_CreateImm0(MI, tmp); \
11196
31
    return S; \
11197
31
  case 384: \
11198
0
    tmp = fieldname(insn, 13, 3); \
11199
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11200
0
    tmp = fieldname(insn, 16, 5); \
11201
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11202
0
    tmp = fieldname(insn, 21, 5); \
11203
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11204
0
    return S; \
11205
1.96k
  case 385: \
11206
1.96k
    tmp = fieldname(insn, 16, 5); \
11207
1.96k
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11208
1.96k
    tmp = fieldname(insn, 21, 5); \
11209
1.96k
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11210
1.96k
    tmp = fieldname(insn, 0, 16); \
11211
1.96k
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11212
1.96k
    return S; \
11213
1.96k
  case 386: \
11214
14
    tmp = 0x0; \
11215
14
    tmp |= fieldname(insn, 11, 5) << 0; \
11216
14
    tmp |= fieldname(insn, 16, 5) << 0; \
11217
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11218
14
    tmp = fieldname(insn, 21, 5); \
11219
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11220
14
    return S; \
11221
14
  case 387: \
11222
0
    if (!Check(&S, DecodeDEXT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11223
0
    return S; \
11224
0
  case 388: \
11225
0
    if (!Check(&S, DecodeDINS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11226
0
    return S; \
11227
52
  case 389: \
11228
52
    tmp = fieldname(insn, 16, 5); \
11229
52
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11230
52
    tmp = fieldname(insn, 11, 5); \
11231
52
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11232
52
    return S; \
11233
52
  case 390: \
11234
6
    tmp = fieldname(insn, 11, 5); \
11235
6
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11236
6
    tmp = fieldname(insn, 16, 5); \
11237
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11238
6
    return S; \
11239
16
  case 391: \
11240
16
    tmp = fieldname(insn, 11, 5); \
11241
16
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11242
16
    tmp = fieldname(insn, 11, 5); \
11243
16
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11244
16
    tmp = fieldname(insn, 16, 5); \
11245
16
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11246
16
    return S; \
11247
38
  case 392: \
11248
38
    tmp = fieldname(insn, 6, 5); \
11249
38
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11250
38
    tmp = fieldname(insn, 11, 5); \
11251
38
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11252
38
    return S; \
11253
63
  case 393: \
11254
63
    tmp = fieldname(insn, 6, 5); \
11255
63
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11256
63
    tmp = fieldname(insn, 11, 5); \
11257
63
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11258
63
    tmp = fieldname(insn, 18, 3); \
11259
63
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11260
63
    tmp = fieldname(insn, 6, 5); \
11261
63
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11262
63
    return S; \
11263
63
  case 394: \
11264
10
    tmp = fieldname(insn, 6, 5); \
11265
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11266
10
    tmp = fieldname(insn, 11, 5); \
11267
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11268
10
    tmp = fieldname(insn, 16, 5); \
11269
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11270
10
    tmp = fieldname(insn, 6, 5); \
11271
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11272
10
    return S; \
11273
10
  case 395: \
11274
0
    tmp = fieldname(insn, 6, 5); \
11275
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11276
0
    tmp = fieldname(insn, 11, 5); \
11277
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11278
0
    tmp = fieldname(insn, 16, 5); \
11279
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11280
0
    return S; \
11281
263
  case 396: \
11282
263
    tmp = fieldname(insn, 8, 3); \
11283
263
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11284
263
    tmp = fieldname(insn, 11, 5); \
11285
263
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11286
263
    tmp = fieldname(insn, 16, 5); \
11287
263
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11288
263
    return S; \
11289
263
  case 397: \
11290
28
    tmp = fieldname(insn, 6, 5); \
11291
28
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11292
28
    tmp = fieldname(insn, 21, 5); \
11293
28
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11294
28
    tmp = fieldname(insn, 16, 5); \
11295
28
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11296
28
    return S; \
11297
70
  case 398: \
11298
70
    tmp = fieldname(insn, 11, 5); \
11299
70
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11300
70
    tmp = fieldname(insn, 21, 5); \
11301
70
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11302
70
    tmp = fieldname(insn, 16, 5); \
11303
70
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11304
70
    return S; \
11305
70
  case 399: \
11306
47
    tmp = fieldname(insn, 6, 5); \
11307
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11308
47
    tmp = fieldname(insn, 21, 5); \
11309
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11310
47
    tmp = fieldname(insn, 11, 5); \
11311
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11312
47
    tmp = fieldname(insn, 16, 5); \
11313
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11314
47
    return S; \
11315
47
  case 400: \
11316
0
    tmp = fieldname(insn, 0, 2); \
11317
0
    MCOperand_CreateImm0(MI, tmp); \
11318
0
    return S; \
11319
47
  case 401: \
11320
0
    tmp = fieldname(insn, 0, 3); \
11321
0
    MCOperand_CreateImm0(MI, tmp); \
11322
0
    return S; \
11323
47
  case 402: \
11324
0
    tmp = fieldname(insn, 5, 5); \
11325
0
    if (!Check(&S, DecodeGPRNM32NZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11326
0
    tmp = fieldname(insn, 0, 5); \
11327
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11328
0
    return S; \
11329
0
  case 403: \
11330
0
    tmp = fieldname(insn, 7, 3); \
11331
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11332
0
    tmp = fieldname(insn, 0, 7) << 2; \
11333
0
    if (!Check(&S, DecodeMemNM_6_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11334
0
    return S; \
11335
0
  case 404: \
11336
0
    tmp = 0x0; \
11337
0
    tmp |= fieldname(insn, 0, 1) << 10; \
11338
0
    tmp |= fieldname(insn, 1, 9) << 1; \
11339
0
    if (!Check(&S, DecodeBranchTargetNM_10(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11340
0
    return S; \
11341
0
  case 405: \
11342
0
    tmp = fieldname(insn, 4, 4) << 4; \
11343
0
    MCOperand_CreateImm0(MI, tmp); \
11344
0
    tmp = 0x0; \
11345
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11346
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11347
0
    if (!Check(&S, DecodeNMRegList16Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11348
0
    return S; \
11349
0
  case 406: \
11350
0
    tmp = fieldname(insn, 7, 3); \
11351
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11352
0
    tmp = fieldname(insn, 4, 3); \
11353
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11354
0
    tmp = fieldname(insn, 0, 3); \
11355
0
    if (!Check(&S, DecodeUImm3Shift(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11356
0
    return S; \
11357
0
  case 407: \
11358
0
    tmp = fieldname(insn, 5, 5); \
11359
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11360
0
    tmp = fieldname(insn, 0, 5) << 2; \
11361
0
    if (!Check(&S, DecodeMemNM_7_0_Mips_GPRNMSPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11362
0
    return S; \
11363
0
  case 408: \
11364
0
    tmp = 0x0; \
11365
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11366
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11367
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11368
0
    tmp = 0x0; \
11369
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11370
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11371
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11372
0
    return S; \
11373
0
  case 409: \
11374
0
    tmp = fieldname(insn, 7, 3); \
11375
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11376
0
    tmp = fieldname(insn, 4, 3); \
11377
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11378
0
    return S; \
11379
0
  case 410: \
11380
0
    tmp = fieldname(insn, 4, 3); \
11381
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11382
0
    tmp = fieldname(insn, 7, 3); \
11383
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11384
0
    return S; \
11385
0
  case 411: \
11386
0
    tmp = fieldname(insn, 1, 3); \
11387
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11388
0
    tmp = 0x0; \
11389
0
    tmp |= fieldname(insn, 4, 3) << 0; \
11390
0
    tmp |= fieldname(insn, 7, 3) << 5; \
11391
0
    if (!Check(&S, DecodeMemNMRX_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11392
0
    return S; \
11393
0
  case 412: \
11394
0
    tmp = fieldname(insn, 7, 3); \
11395
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11396
0
    tmp = fieldname(insn, 0, 7) << 2; \
11397
0
    if (!Check(&S, DecodeMemNM_9_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11398
0
    return S; \
11399
0
  case 413: \
11400
0
    tmp = fieldname(insn, 7, 3); \
11401
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11402
0
    tmp = 0x0; \
11403
0
    tmp |= fieldname(insn, 0, 2) << 0; \
11404
0
    tmp |= fieldname(insn, 4, 3) << 2; \
11405
0
    if (!Check(&S, DecodeMemNM_2_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11406
0
    return S; \
11407
0
  case 414: \
11408
0
    tmp = fieldname(insn, 7, 3); \
11409
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11410
0
    tmp = 0x0; \
11411
0
    tmp |= fieldname(insn, 0, 2) << 0; \
11412
0
    tmp |= fieldname(insn, 4, 3) << 2; \
11413
0
    if (!Check(&S, DecodeMemNM_2_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11414
0
    return S; \
11415
0
  case 415: \
11416
0
    tmp = fieldname(insn, 7, 3); \
11417
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11418
0
    tmp = fieldname(insn, 0, 6) << 2; \
11419
0
    if (!Check(&S, DecodeUImmWithReg_8_0_1_Mips_SP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11420
0
    return S; \
11421
0
  case 416: \
11422
0
    tmp = 0x0; \
11423
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11424
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11425
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11426
0
    tmp = 0x0; \
11427
0
    tmp |= fieldname(insn, 0, 3) << 4; \
11428
0
    tmp |= fieldname(insn, 3, 1) << 3; \
11429
0
    tmp |= fieldname(insn, 4, 1) << 8; \
11430
0
    tmp |= fieldname(insn, 8, 1) << 2; \
11431
0
    if (!Check(&S, DecodeMemNM4x4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11432
0
    return S; \
11433
0
  case 417: \
11434
0
    tmp = fieldname(insn, 7, 3); \
11435
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11436
0
    tmp = 0x0; \
11437
0
    tmp |= fieldname(insn, 1, 2) << 1; \
11438
0
    tmp |= fieldname(insn, 4, 3) << 3; \
11439
0
    if (!Check(&S, DecodeMemNM_3_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11440
0
    return S; \
11441
0
  case 418: \
11442
0
    tmp = fieldname(insn, 7, 3); \
11443
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11444
0
    tmp = 0x0; \
11445
0
    tmp |= fieldname(insn, 1, 2) << 1; \
11446
0
    tmp |= fieldname(insn, 4, 3) << 3; \
11447
0
    if (!Check(&S, DecodeMemNM_3_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11448
0
    return S; \
11449
0
  case 419: \
11450
0
    tmp = fieldname(insn, 7, 3); \
11451
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11452
0
    tmp = fieldname(insn, 4, 3); \
11453
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11454
0
    tmp = fieldname(insn, 0, 3) << 2; \
11455
0
    MCOperand_CreateImm0(MI, tmp); \
11456
0
    return S; \
11457
0
  case 420: \
11458
0
    tmp = fieldname(insn, 5, 5); \
11459
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11460
0
    tmp = fieldname(insn, 5, 5); \
11461
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11462
0
    tmp = 0x0; \
11463
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11464
0
    tmp |= fieldname(insn, 4, 1) << 3; \
11465
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_4_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11466
0
    return S; \
11467
0
  case 421: \
11468
0
    tmp = fieldname(insn, 7, 3); \
11469
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11470
0
    tmp = fieldname(insn, 0, 7) << 2; \
11471
0
    if (!Check(&S, DecodeMemNM_6_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11472
0
    return S; \
11473
0
  case 422: \
11474
0
    tmp = fieldname(insn, 7, 3); \
11475
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11476
0
    tmp = 0x0; \
11477
0
    tmp |= fieldname(insn, 0, 1) << 7; \
11478
0
    tmp |= fieldname(insn, 1, 6) << 1; \
11479
0
    if (!Check(&S, DecodeBranchTargetNM_7(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11480
0
    return S; \
11481
0
  case 423: \
11482
0
    tmp = fieldname(insn, 1, 3); \
11483
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11484
0
    tmp = fieldname(insn, 4, 3); \
11485
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11486
0
    tmp = fieldname(insn, 7, 3); \
11487
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11488
0
    return S; \
11489
0
  case 424: \
11490
0
    tmp = 0x0; \
11491
0
    tmp |= fieldname(insn, 3, 1) << 1; \
11492
0
    tmp |= fieldname(insn, 8, 1) << 0; \
11493
0
    if (!Check(&S, DecodeGPRNM2R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11494
0
    tmp = 0x0; \
11495
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11496
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11497
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11498
0
    tmp = 0x0; \
11499
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11500
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11501
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11502
0
    return S; \
11503
0
  case 425: \
11504
0
    tmp = fieldname(insn, 7, 3); \
11505
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11506
0
    tmp = fieldname(insn, 0, 7); \
11507
0
    if (!Check(&S, DecodeImmM1To126(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11508
0
    return S; \
11509
0
  case 426: \
11510
0
    tmp = fieldname(insn, 7, 3); \
11511
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11512
0
    tmp = fieldname(insn, 0, 7) << 2; \
11513
0
    if (!Check(&S, DecodeMemNM_9_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11514
0
    return S; \
11515
0
  case 427: \
11516
0
    tmp = fieldname(insn, 5, 5); \
11517
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11518
0
    return S; \
11519
0
  case 428: \
11520
0
    tmp = fieldname(insn, 4, 1); \
11521
0
    if (!Check(&S, DecodeGPRNMRARegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11522
0
    tmp = fieldname(insn, 5, 5); \
11523
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11524
0
    return S; \
11525
0
  case 429: \
11526
0
    if (!Check(&S, DecodeBranchConflictNM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11527
0
    return S; \
11528
0
  case 430: \
11529
0
    tmp = fieldname(insn, 7, 3); \
11530
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11531
0
    tmp = fieldname(insn, 4, 3); \
11532
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11533
0
    tmp = fieldname(insn, 0, 4); \
11534
0
    if (!Check(&S, DecodeUImm4Mask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11535
0
    return S; \
11536
0
  case 431: \
11537
0
    tmp = 0x0; \
11538
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11539
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11540
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11541
0
    tmp = 0x0; \
11542
0
    tmp |= fieldname(insn, 0, 3) << 4; \
11543
0
    tmp |= fieldname(insn, 3, 1) << 3; \
11544
0
    tmp |= fieldname(insn, 4, 1) << 8; \
11545
0
    tmp |= fieldname(insn, 8, 1) << 2; \
11546
0
    if (!Check(&S, DecodeMemNM4x4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11547
0
    return S; \
11548
0
  case 432: \
11549
0
    tmp = 0x0; \
11550
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11551
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11552
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11553
0
    tmp = 0x0; \
11554
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11555
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11556
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11557
0
    tmp = 0x0; \
11558
0
    tmp |= fieldname(insn, 3, 1) << 1; \
11559
0
    tmp |= fieldname(insn, 8, 1) << 0; \
11560
0
    if (!Check(&S, DecodeGPRNM2R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11561
0
    return S; \
11562
0
  case 433: \
11563
0
    tmp = fieldname(insn, 0, 18); \
11564
0
    MCOperand_CreateImm0(MI, tmp); \
11565
0
    return S; \
11566
0
  case 434: \
11567
0
    tmp = fieldname(insn, 0, 19); \
11568
0
    MCOperand_CreateImm0(MI, tmp); \
11569
0
    return S; \
11570
0
  case 435: \
11571
0
    tmp = fieldname(insn, 21, 5); \
11572
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11573
0
    tmp = fieldname(insn, 16, 5); \
11574
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11575
0
    tmp = fieldname(insn, 0, 16); \
11576
0
    MCOperand_CreateImm0(MI, tmp); \
11577
0
    return S; \
11578
0
  case 436: \
11579
0
    tmp = fieldname(insn, 21, 5); \
11580
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11581
0
    tmp = 0x0; \
11582
0
    tmp |= fieldname(insn, 0, 1) << 21; \
11583
0
    tmp |= fieldname(insn, 1, 20) << 1; \
11584
0
    if (!Check(&S, DecodeAddressPCRelNM_22(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11585
0
    return S; \
11586
0
  case 437: \
11587
0
    tmp = fieldname(insn, 24, 1); \
11588
0
    if (!Check(&S, DecodeGPRNM1R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11589
0
    tmp = 0x0; \
11590
0
    tmp |= fieldname(insn, 21, 3) << 0; \
11591
0
    tmp |= fieldname(insn, 25, 1) << 4; \
11592
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11593
0
    tmp = 0x0; \
11594
0
    tmp |= fieldname(insn, 0, 1) << 21; \
11595
0
    tmp |= fieldname(insn, 1, 20) << 1; \
11596
0
    if (!Check(&S, DecodeBranchTargetNM_21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11597
0
    return S; \
11598
0
  case 438: \
11599
0
    tmp = fieldname(insn, 16, 5); \
11600
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11601
0
    tmp = fieldname(insn, 21, 5); \
11602
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11603
0
    tmp = fieldname(insn, 11, 5); \
11604
0
    MCOperand_CreateImm0(MI, tmp); \
11605
0
    return S; \
11606
0
  case 439: \
11607
0
    tmp = fieldname(insn, 21, 5); \
11608
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11609
0
    tmp = fieldname(insn, 16, 5); \
11610
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11611
0
    tmp = fieldname(insn, 11, 5); \
11612
0
    MCOperand_CreateImm0(MI, tmp); \
11613
0
    return S; \
11614
0
  case 440: \
11615
0
    tmp = fieldname(insn, 11, 5); \
11616
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11617
0
    tmp = fieldname(insn, 16, 10); \
11618
0
    if (!Check(&S, DecodeMemNMRX_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11619
0
    return S; \
11620
0
  case 441: \
11621
0
    tmp = fieldname(insn, 21, 5); \
11622
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11623
0
    tmp = fieldname(insn, 16, 5); \
11624
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11625
0
    return S; \
11626
0
  case 442: \
11627
0
    tmp = fieldname(insn, 11, 5); \
11628
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11629
0
    tmp = fieldname(insn, 16, 5); \
11630
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11631
0
    tmp = fieldname(insn, 21, 5); \
11632
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11633
0
    tmp = fieldname(insn, 9, 2); \
11634
0
    MCOperand_CreateImm0(MI, tmp); \
11635
0
    return S; \
11636
0
  case 443: \
11637
0
    tmp = fieldname(insn, 11, 5); \
11638
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11639
0
    tmp = fieldname(insn, 16, 5); \
11640
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11641
0
    tmp = fieldname(insn, 21, 5); \
11642
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11643
0
    return S; \
11644
0
  case 444: \
11645
0
    tmp = fieldname(insn, 11, 5); \
11646
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11647
0
    tmp = fieldname(insn, 16, 5); \
11648
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11649
0
    tmp = fieldname(insn, 21, 5); \
11650
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11651
0
    tmp = fieldname(insn, 11, 5); \
11652
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11653
0
    return S; \
11654
0
  case 445: \
11655
0
    tmp = fieldname(insn, 11, 5); \
11656
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11657
0
    tmp = fieldname(insn, 16, 5); \
11658
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11659
0
    tmp = fieldname(insn, 21, 5); \
11660
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11661
0
    tmp = fieldname(insn, 6, 5); \
11662
0
    MCOperand_CreateImm0(MI, tmp); \
11663
0
    return S; \
11664
0
  case 446: \
11665
0
    tmp = fieldname(insn, 16, 5); \
11666
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11667
0
    tmp = fieldname(insn, 11, 5); \
11668
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11669
0
    tmp = fieldname(insn, 21, 5); \
11670
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11671
0
    return S; \
11672
0
  case 447: \
11673
0
    tmp = fieldname(insn, 21, 5); \
11674
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11675
0
    tmp = fieldname(insn, 21, 5); \
11676
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11677
0
    tmp = fieldname(insn, 16, 5); \
11678
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11679
0
    return S; \
11680
0
  case 448: \
11681
0
    tmp = fieldname(insn, 21, 5); \
11682
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11683
0
    tmp = fieldname(insn, 11, 10); \
11684
0
    if (!Check(&S, DecodeCOP0SelRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11685
0
    return S; \
11686
0
  case 449: \
11687
0
    tmp = fieldname(insn, 21, 5); \
11688
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11689
0
    tmp = fieldname(insn, 16, 5); \
11690
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11691
0
    tmp = fieldname(insn, 10, 1); \
11692
0
    MCOperand_CreateImm0(MI, tmp); \
11693
0
    tmp = fieldname(insn, 11, 5); \
11694
0
    MCOperand_CreateImm0(MI, tmp); \
11695
0
    tmp = fieldname(insn, 3, 1); \
11696
0
    MCOperand_CreateImm0(MI, tmp); \
11697
0
    return S; \
11698
0
  case 450: \
11699
0
    tmp = fieldname(insn, 16, 5); \
11700
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11701
0
    tmp = fieldname(insn, 21, 5); \
11702
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11703
0
    tmp = fieldname(insn, 10, 1); \
11704
0
    MCOperand_CreateImm0(MI, tmp); \
11705
0
    tmp = fieldname(insn, 11, 5); \
11706
0
    MCOperand_CreateImm0(MI, tmp); \
11707
0
    tmp = fieldname(insn, 3, 1); \
11708
0
    MCOperand_CreateImm0(MI, tmp); \
11709
0
    return S; \
11710
0
  case 451: \
11711
0
    tmp = fieldname(insn, 21, 5); \
11712
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11713
0
    return S; \
11714
0
  case 452: \
11715
0
    tmp = fieldname(insn, 16, 5); \
11716
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11717
0
    tmp = fieldname(insn, 21, 2); \
11718
0
    MCOperand_CreateImm0(MI, tmp); \
11719
0
    return S; \
11720
0
  case 453: \
11721
0
    tmp = fieldname(insn, 16, 5); \
11722
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11723
0
    return S; \
11724
0
  case 454: \
11725
0
    tmp = 0x0; \
11726
0
    tmp |= fieldname(insn, 0, 1) << 25; \
11727
0
    tmp |= fieldname(insn, 1, 24) << 1; \
11728
0
    if (!Check(&S, DecodeBranchTargetNM_25(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11729
0
    return S; \
11730
0
  case 455: \
11731
0
    tmp = fieldname(insn, 21, 5); \
11732
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11733
0
    tmp = fieldname(insn, 2, 19) << 2; \
11734
0
    if (!Check(&S, DecodeUImmWithReg_21_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11735
0
    return S; \
11736
0
  case 456: \
11737
0
    tmp = fieldname(insn, 21, 5); \
11738
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11739
0
    tmp = fieldname(insn, 2, 19) << 2; \
11740
0
    if (!Check(&S, DecodeMemNM_21_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11741
0
    return S; \
11742
0
  case 457: \
11743
0
    tmp = fieldname(insn, 21, 5); \
11744
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11745
0
    tmp = fieldname(insn, 0, 18); \
11746
0
    if (!Check(&S, DecodeMemNM_18_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11747
0
    return S; \
11748
0
  case 458: \
11749
0
    tmp = fieldname(insn, 21, 5); \
11750
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11751
0
    tmp = fieldname(insn, 0, 18); \
11752
0
    if (!Check(&S, DecodeUImmWithReg_18_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11753
0
    return S; \
11754
0
  case 459: \
11755
0
    tmp = fieldname(insn, 21, 5); \
11756
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11757
0
    tmp = fieldname(insn, 1, 17) << 1; \
11758
0
    if (!Check(&S, DecodeMemNM_18_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11759
0
    return S; \
11760
0
  case 460: \
11761
0
    tmp = fieldname(insn, 21, 5); \
11762
0
    if (!Check(&S, DecodeGPRNM32NZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11763
0
    tmp = fieldname(insn, 16, 5); \
11764
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11765
0
    return S; \
11766
0
  case 461: \
11767
0
    tmp = fieldname(insn, 21, 5); \
11768
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11769
0
    tmp = fieldname(insn, 16, 5); \
11770
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11771
0
    tmp = fieldname(insn, 0, 12); \
11772
0
    MCOperand_CreateImm0(MI, tmp); \
11773
0
    return S; \
11774
0
  case 462: \
11775
0
    tmp = fieldname(insn, 3, 9) << 3; \
11776
0
    MCOperand_CreateImm0(MI, tmp); \
11777
0
    tmp = 0x0; \
11778
0
    tmp |= fieldname(insn, 2, 1) << 0; \
11779
0
    tmp |= fieldname(insn, 16, 4) << 1; \
11780
0
    tmp |= fieldname(insn, 21, 5) << 5; \
11781
0
    if (!Check(&S, DecodeNMRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11782
0
    return S; \
11783
0
  case 463: \
11784
0
    tmp = fieldname(insn, 21, 5); \
11785
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11786
0
    tmp = fieldname(insn, 16, 5); \
11787
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11788
0
    tmp = fieldname(insn, 0, 12); \
11789
0
    if (!Check(&S, DecodeNegImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11790
0
    return S; \
11791
0
  case 464: \
11792
0
    tmp = fieldname(insn, 21, 5); \
11793
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11794
0
    tmp = fieldname(insn, 16, 5); \
11795
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11796
0
    tmp = fieldname(insn, 0, 5); \
11797
0
    MCOperand_CreateImm0(MI, tmp); \
11798
0
    return S; \
11799
0
  case 465: \
11800
0
    tmp = fieldname(insn, 21, 5); \
11801
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11802
0
    tmp = fieldname(insn, 16, 5); \
11803
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11804
0
    tmp = fieldname(insn, 0, 5); \
11805
0
    MCOperand_CreateImm0(MI, tmp); \
11806
0
    tmp = fieldname(insn, 7, 4) << 1; \
11807
0
    MCOperand_CreateImm0(MI, tmp); \
11808
0
    tmp = fieldname(insn, 6, 1); \
11809
0
    MCOperand_CreateImm0(MI, tmp); \
11810
0
    return S; \
11811
0
  case 466: \
11812
0
    tmp = fieldname(insn, 21, 5); \
11813
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11814
0
    tmp = fieldname(insn, 16, 5); \
11815
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11816
0
    tmp = fieldname(insn, 0, 5); \
11817
0
    MCOperand_CreateImm0(MI, tmp); \
11818
0
    tmp = fieldname(insn, 6, 5); \
11819
0
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11820
0
    tmp = fieldname(insn, 21, 5); \
11821
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11822
0
    return S; \
11823
0
  case 467: \
11824
0
    tmp = fieldname(insn, 21, 5); \
11825
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11826
0
    tmp = fieldname(insn, 16, 5); \
11827
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11828
0
    tmp = fieldname(insn, 0, 5); \
11829
0
    MCOperand_CreateImm0(MI, tmp); \
11830
0
    tmp = fieldname(insn, 6, 5); \
11831
0
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11832
0
    return S; \
11833
0
  case 468: \
11834
0
    tmp = fieldname(insn, 21, 5); \
11835
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11836
0
    tmp = 0x0; \
11837
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11838
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11839
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11840
0
    return S; \
11841
0
  case 469: \
11842
0
    tmp = 0x0; \
11843
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11844
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11845
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11846
0
    return S; \
11847
0
  case 470: \
11848
0
    tmp = fieldname(insn, 21, 5); \
11849
0
    MCOperand_CreateImm0(MI, tmp); \
11850
0
    tmp = 0x0; \
11851
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11852
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11853
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11854
0
    return S; \
11855
0
  case 471: \
11856
0
    tmp = fieldname(insn, 16, 5); \
11857
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11858
0
    tmp = fieldname(insn, 21, 5); \
11859
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11860
0
    tmp = 0x0; \
11861
0
    tmp |= fieldname(insn, 0, 1) << 14; \
11862
0
    tmp |= fieldname(insn, 1, 13) << 1; \
11863
0
    if (!Check(&S, DecodeBranchTargetNM_14(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11864
0
    return S; \
11865
0
  case 472: \
11866
0
    tmp = fieldname(insn, 21, 5); \
11867
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11868
0
    tmp = 0x0; \
11869
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11870
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11871
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11872
0
    return S; \
11873
0
  case 473: \
11874
0
    tmp = fieldname(insn, 21, 5); \
11875
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11876
0
    tmp = 0x0; \
11877
0
    tmp |= fieldname(insn, 2, 6) << 2; \
11878
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11879
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11880
0
    return S; \
11881
0
  case 474: \
11882
0
    tmp = fieldname(insn, 21, 5); \
11883
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11884
0
    tmp = fieldname(insn, 3, 5); \
11885
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11886
0
    tmp = fieldname(insn, 16, 5); \
11887
0
    if (!Check(&S, DecodeMemZeroNM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11888
0
    return S; \
11889
0
  case 475: \
11890
0
    tmp = fieldname(insn, 21, 5); \
11891
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11892
0
    tmp = 0x0; \
11893
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11894
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11895
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11896
0
    tmp = fieldname(insn, 12, 3); \
11897
0
    if (!Check(&S, DecodeUImm3Shift(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11898
0
    return S; \
11899
0
  case 476: \
11900
0
    tmp = 0x0; \
11901
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11902
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11903
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11904
0
    return S; \
11905
0
  case 477: \
11906
0
    tmp = fieldname(insn, 21, 5); \
11907
0
    MCOperand_CreateImm0(MI, tmp); \
11908
0
    tmp = 0x0; \
11909
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11910
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11911
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11912
0
    return S; \
11913
0
  case 478: \
11914
0
    tmp = fieldname(insn, 21, 5); \
11915
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11916
0
    tmp = fieldname(insn, 21, 5); \
11917
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11918
0
    tmp = 0x0; \
11919
0
    tmp |= fieldname(insn, 2, 6) << 2; \
11920
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11921
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11922
0
    return S; \
11923
0
  case 479: \
11924
0
    tmp = fieldname(insn, 21, 5); \
11925
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11926
0
    tmp = fieldname(insn, 21, 5); \
11927
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11928
0
    tmp = fieldname(insn, 3, 5); \
11929
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11930
0
    tmp = fieldname(insn, 16, 5); \
11931
0
    if (!Check(&S, DecodeMemZeroNM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11932
0
    return S; \
11933
0
  case 480: \
11934
0
    tmp = fieldname(insn, 21, 5); \
11935
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11936
0
    tmp = fieldname(insn, 11, 7); \
11937
0
    MCOperand_CreateImm0(MI, tmp); \
11938
0
    tmp = 0x0; \
11939
0
    tmp |= fieldname(insn, 0, 1) << 11; \
11940
0
    tmp |= fieldname(insn, 1, 10) << 1; \
11941
0
    if (!Check(&S, DecodeBranchTargetNM_11(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11942
0
    return S; \
11943
0
  case 481: \
11944
0
    tmp = fieldname(insn, 21, 5); \
11945
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11946
0
    tmp = fieldname(insn, 11, 6); \
11947
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_32_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11948
0
    tmp = 0x0; \
11949
0
    tmp |= fieldname(insn, 0, 1) << 11; \
11950
0
    tmp |= fieldname(insn, 1, 10) << 1; \
11951
0
    if (!Check(&S, DecodeBranchTargetNM_11(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11952
0
    return S; \
11953
0
  case 482: \
11954
0
    tmp = fieldname(insn, 21, 5); \
11955
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11956
0
    tmp = 0x0; \
11957
0
    tmp |= fieldname(insn, 0, 1) << 19; \
11958
0
    tmp |= fieldname(insn, 2, 10) << 9; \
11959
0
    tmp |= fieldname(insn, 12, 9) << 0; \
11960
0
    if (!Check(&S, DecodeSImm32s12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11961
0
    return S; \
11962
0
  case 483: \
11963
0
    tmp = fieldname(insn, 37, 5); \
11964
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11965
0
    tmp = 0x0; \
11966
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11967
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11968
0
    MCOperand_CreateImm0(MI, tmp); \
11969
0
    return S; \
11970
0
  case 484: \
11971
0
    tmp = fieldname(insn, 37, 5); \
11972
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11973
0
    tmp = fieldname(insn, 37, 5); \
11974
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11975
0
    tmp = 0x0; \
11976
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11977
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11978
0
    MCOperand_CreateImm0(MI, tmp); \
11979
0
    return S; \
11980
0
  case 485: \
11981
0
    tmp = fieldname(insn, 37, 5); \
11982
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11983
0
    tmp = 0x0; \
11984
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11985
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11986
0
    if (!Check(&S, DecodeSImmWithReg_32_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11987
0
    return S; \
11988
0
  case 486: \
11989
0
    tmp = fieldname(insn, 37, 5); \
11990
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11991
0
    tmp = 0x0; \
11992
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11993
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11994
0
    if (!Check(&S, DecodeAddressPCRelNM_32(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11995
0
    return S; \
11996
78.1k
  } \
11997
78.1k
}
Unexecuted instantiation: MipsDisassembler.c:decodeToMCInst_8
MipsDisassembler.c:decodeToMCInst_4
Line
Count
Source
8547
53.2k
    uint64_t Address, const void *Decoder, bool *DecodeComplete) \
8548
53.2k
{ \
8549
53.2k
  *DecodeComplete = true; \
8550
53.2k
  InsnType tmp; \
8551
53.2k
  switch (Idx) { \
8552
0
  default: CS_ASSERT_RET_VAL(0 && "Invalid index!", MCDisassembler_Fail); \
8553
0
  case 0: \
8554
0
    tmp = fieldname(insn, 0, 11); \
8555
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8556
0
    return S; \
8557
0
  case 1: \
8558
0
    tmp = fieldname(insn, 8, 3); \
8559
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8560
0
    tmp = fieldname(insn, 0, 8); \
8561
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8562
0
    return S; \
8563
0
  case 2: \
8564
0
    tmp = fieldname(insn, 8, 3); \
8565
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8566
0
    tmp = fieldname(insn, 8, 3); \
8567
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8568
0
    tmp = fieldname(insn, 0, 8); \
8569
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8570
0
    return S; \
8571
0
  case 3: \
8572
0
    tmp = fieldname(insn, 8, 3); \
8573
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8574
0
    tmp = fieldname(insn, 0, 8); \
8575
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8576
0
    return S; \
8577
0
  case 4: \
8578
0
    tmp = fieldname(insn, 0, 8); \
8579
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8580
0
    return S; \
8581
0
  case 5: \
8582
0
    tmp = 0x0; \
8583
0
    tmp |= fieldname(insn, 3, 2) << 3; \
8584
0
    tmp |= fieldname(insn, 5, 3) << 0; \
8585
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8586
0
    tmp = fieldname(insn, 0, 3); \
8587
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8588
0
    return S; \
8589
0
  case 6: \
8590
0
    tmp = fieldname(insn, 4, 4); \
8591
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8592
0
    tmp = fieldname(insn, 0, 4); \
8593
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8594
0
    return S; \
8595
0
  case 7: \
8596
0
    tmp = fieldname(insn, 8, 3); \
8597
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8598
0
    tmp = fieldname(insn, 0, 8); \
8599
0
    MCOperand_CreateImm0(MI, tmp); \
8600
0
    return S; \
8601
0
  case 8: \
8602
0
    tmp = fieldname(insn, 2, 3); \
8603
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8604
0
    tmp = fieldname(insn, 8, 3); \
8605
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8606
0
    tmp = fieldname(insn, 5, 3); \
8607
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8608
0
    return S; \
8609
0
  case 9: \
8610
0
    tmp = fieldname(insn, 8, 3); \
8611
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8612
0
    return S; \
8613
396
  case 10: \
8614
396
    return S; \
8615
0
  case 11: \
8616
0
    tmp = fieldname(insn, 8, 3); \
8617
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8618
0
    tmp = fieldname(insn, 5, 3); \
8619
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8620
0
    return S; \
8621
0
  case 12: \
8622
0
    tmp = fieldname(insn, 8, 3); \
8623
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8624
0
    tmp = fieldname(insn, 8, 3); \
8625
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8626
0
    tmp = fieldname(insn, 5, 3); \
8627
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8628
0
    return S; \
8629
0
  case 13: \
8630
0
    tmp = fieldname(insn, 8, 3); \
8631
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8632
0
    tmp = fieldname(insn, 8, 3); \
8633
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8634
0
    return S; \
8635
0
  case 14: \
8636
0
    tmp = fieldname(insn, 8, 3); \
8637
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8638
0
    tmp = 0x0; \
8639
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8640
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8641
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8642
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8643
0
    return S; \
8644
0
  case 15: \
8645
0
    tmp = 0x0; \
8646
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8647
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8648
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8649
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8650
0
    return S; \
8651
0
  case 16: \
8652
0
    tmp = fieldname(insn, 8, 3); \
8653
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8654
0
    tmp = 0x0; \
8655
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8656
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8657
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8658
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8659
0
    return S; \
8660
0
  case 17: \
8661
0
    tmp = fieldname(insn, 8, 3); \
8662
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8663
0
    tmp = fieldname(insn, 5, 3); \
8664
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8665
0
    tmp = 0x0; \
8666
0
    tmp |= fieldname(insn, 21, 1) << 5; \
8667
0
    tmp |= fieldname(insn, 22, 5) << 0; \
8668
0
    MCOperand_CreateImm0(MI, tmp); \
8669
0
    return S; \
8670
0
  case 18: \
8671
0
    tmp = 0x0; \
8672
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8673
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8674
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8675
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8676
0
    return S; \
8677
0
  case 19: \
8678
0
    if (!Check(&S, DecodeFIXMEInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8679
0
    return S; \
8680
0
  case 20: \
8681
0
    tmp = fieldname(insn, 8, 3); \
8682
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8683
0
    tmp = 0x0; \
8684
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8685
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8686
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8687
0
    MCOperand_CreateImm0(MI, tmp); \
8688
0
    return S; \
8689
0
  case 21: \
8690
0
    if (!Check(&S, DecodeFMem3(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8691
0
    return S; \
8692
0
  case 22: \
8693
0
    tmp = fieldname(insn, 16, 5); \
8694
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8695
0
    tmp = fieldname(insn, 0, 16); \
8696
0
    MCOperand_CreateImm0(MI, tmp); \
8697
0
    return S; \
8698
79
  case 23: \
8699
79
    tmp = fieldname(insn, 11, 5); \
8700
79
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8701
79
    tmp = fieldname(insn, 21, 5); \
8702
79
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8703
79
    tmp = fieldname(insn, 16, 5); \
8704
79
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8705
79
    return S; \
8706
79
  case 24: \
8707
7
    tmp = fieldname(insn, 21, 5); \
8708
7
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8709
7
    return S; \
8710
309
  case 25: \
8711
309
    tmp = fieldname(insn, 11, 5); \
8712
309
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8713
309
    tmp = fieldname(insn, 21, 5); \
8714
309
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8715
309
    return S; \
8716
309
  case 26: \
8717
0
    tmp = fieldname(insn, 11, 5); \
8718
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8719
0
    tmp = fieldname(insn, 21, 5); \
8720
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8721
0
    return S; \
8722
0
  case 27: \
8723
0
    tmp = fieldname(insn, 16, 5); \
8724
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8725
0
    tmp = fieldname(insn, 21, 5); \
8726
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8727
0
    tmp = fieldname(insn, 6, 10); \
8728
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_10_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8729
0
    return S; \
8730
0
  case 28: \
8731
0
    tmp = fieldname(insn, 16, 5); \
8732
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8733
0
    tmp = fieldname(insn, 21, 5); \
8734
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8735
0
    tmp = fieldname(insn, 6, 5); \
8736
0
    MCOperand_CreateImm0(MI, tmp); \
8737
0
    tmp = fieldname(insn, 11, 5); \
8738
0
    MCOperand_CreateImm0(MI, tmp); \
8739
0
    return S; \
8740
0
  case 29: \
8741
0
    tmp = fieldname(insn, 21, 5); \
8742
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8743
0
    tmp = fieldname(insn, 16, 5); \
8744
0
    MCOperand_CreateImm0(MI, tmp); \
8745
0
    tmp = fieldname(insn, 0, 16); \
8746
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8747
0
    return S; \
8748
0
  case 30: \
8749
0
    tmp = fieldname(insn, 16, 5); \
8750
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8751
0
    tmp = fieldname(insn, 21, 5); \
8752
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8753
0
    return S; \
8754
0
  case 31: \
8755
0
    tmp = fieldname(insn, 7, 3); \
8756
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8757
0
    tmp = fieldname(insn, 1, 3); \
8758
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8759
0
    tmp = fieldname(insn, 4, 3); \
8760
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8761
0
    return S; \
8762
0
  case 32: \
8763
0
    if (!Check(&S, DecodeMemMMImm4(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8764
0
    return S; \
8765
0
  case 33: \
8766
0
    tmp = fieldname(insn, 5, 5); \
8767
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8768
0
    tmp = fieldname(insn, 0, 5); \
8769
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8770
0
    return S; \
8771
0
  case 34: \
8772
0
    tmp = fieldname(insn, 7, 3); \
8773
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8774
0
    tmp = fieldname(insn, 4, 3); \
8775
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8776
0
    tmp = fieldname(insn, 1, 3); \
8777
0
    if (!Check(&S, DecodePOOL16BEncodedField(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8778
0
    return S; \
8779
0
  case 35: \
8780
0
    tmp = fieldname(insn, 7, 3); \
8781
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8782
0
    tmp = fieldname(insn, 4, 3); \
8783
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8784
0
    tmp = fieldname(insn, 0, 4); \
8785
0
    if (!Check(&S, DecodeANDI16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8786
0
    return S; \
8787
0
  case 36: \
8788
0
    tmp = fieldname(insn, 3, 3); \
8789
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8790
0
    tmp = fieldname(insn, 0, 3); \
8791
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8792
0
    return S; \
8793
0
  case 37: \
8794
0
    tmp = fieldname(insn, 3, 3); \
8795
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8796
0
    tmp = fieldname(insn, 0, 3); \
8797
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8798
0
    tmp = fieldname(insn, 3, 3); \
8799
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8800
0
    return S; \
8801
0
  case 38: \
8802
0
    if (!Check(&S, DecodeMemMMReglistImm4Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8803
0
    return S; \
8804
0
  case 39: \
8805
0
    tmp = fieldname(insn, 0, 5); \
8806
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8807
0
    return S; \
8808
0
  case 40: \
8809
0
    tmp = fieldname(insn, 0, 4); \
8810
0
    MCOperand_CreateImm0(MI, tmp); \
8811
0
    return S; \
8812
0
  case 41: \
8813
0
    tmp = fieldname(insn, 0, 5); \
8814
0
    if (!Check(&S, DecodeUImmWithOffsetAndScale_5_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8815
0
    return S; \
8816
0
  case 42: \
8817
0
    if (!Check(&S, DecodeMemMMSPImm5Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8818
0
    return S; \
8819
0
  case 43: \
8820
0
    tmp = fieldname(insn, 5, 5); \
8821
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8822
0
    tmp = fieldname(insn, 5, 5); \
8823
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8824
0
    tmp = fieldname(insn, 1, 4); \
8825
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_4_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8826
0
    return S; \
8827
0
  case 44: \
8828
0
    tmp = fieldname(insn, 1, 9); \
8829
0
    if (!Check(&S, DecodeSimm9SP(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8830
0
    return S; \
8831
0
  case 45: \
8832
0
    if (!Check(&S, DecodeMemMMGPImm7Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8833
0
    return S; \
8834
0
  case 46: \
8835
0
    tmp = fieldname(insn, 7, 3); \
8836
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8837
0
    tmp = fieldname(insn, 4, 3); \
8838
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8839
0
    tmp = fieldname(insn, 1, 3); \
8840
0
    if (!Check(&S, DecodeAddiur2Simm7(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8841
0
    return S; \
8842
0
  case 47: \
8843
0
    tmp = fieldname(insn, 7, 3); \
8844
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8845
0
    tmp = fieldname(insn, 1, 6); \
8846
0
    if (!Check(&S, DecodeUImmWithOffsetAndScale_6_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8847
0
    return S; \
8848
0
  case 48: \
8849
0
    if (!Check(&S, DecodeMovePOperands(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8850
0
    return S; \
8851
0
  case 49: \
8852
0
    tmp = fieldname(insn, 7, 3); \
8853
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8854
0
    tmp = fieldname(insn, 0, 7); \
8855
0
    if (!Check(&S, DecodeBranchTarget7MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8856
0
    return S; \
8857
0
  case 50: \
8858
0
    tmp = fieldname(insn, 0, 10); \
8859
0
    if (!Check(&S, DecodeBranchTarget10MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8860
0
    return S; \
8861
0
  case 51: \
8862
0
    tmp = fieldname(insn, 7, 3); \
8863
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8864
0
    tmp = fieldname(insn, 0, 7); \
8865
0
    if (!Check(&S, DecodeLi16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8866
0
    return S; \
8867
1.08k
  case 52: \
8868
1.08k
    tmp = fieldname(insn, 21, 5); \
8869
1.08k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8870
1.08k
    tmp = fieldname(insn, 16, 5); \
8871
1.08k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8872
1.08k
    tmp = fieldname(insn, 11, 5); \
8873
1.08k
    MCOperand_CreateImm0(MI, tmp); \
8874
1.08k
    return S; \
8875
1.08k
  case 53: \
8876
28
    tmp = fieldname(insn, 16, 5); \
8877
28
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8878
28
    tmp = fieldname(insn, 21, 5); \
8879
28
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8880
28
    return S; \
8881
62
  case 54: \
8882
62
    tmp = fieldname(insn, 11, 5); \
8883
62
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8884
62
    tmp = fieldname(insn, 16, 5); \
8885
62
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8886
62
    tmp = fieldname(insn, 21, 5); \
8887
62
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8888
62
    return S; \
8889
186
  case 55: \
8890
186
    tmp = fieldname(insn, 11, 5); \
8891
186
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8892
186
    tmp = fieldname(insn, 16, 5); \
8893
186
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8894
186
    tmp = fieldname(insn, 21, 5); \
8895
186
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8896
186
    return S; \
8897
320
  case 56: \
8898
320
    tmp = fieldname(insn, 16, 10); \
8899
320
    MCOperand_CreateImm0(MI, tmp); \
8900
320
    tmp = fieldname(insn, 6, 10); \
8901
320
    MCOperand_CreateImm0(MI, tmp); \
8902
320
    return S; \
8903
186
  case 57: \
8904
70
    tmp = fieldname(insn, 21, 5); \
8905
70
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8906
70
    tmp = fieldname(insn, 16, 5); \
8907
70
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8908
70
    tmp = fieldname(insn, 6, 5); \
8909
70
    MCOperand_CreateImm0(MI, tmp); \
8910
70
    tmp = fieldname(insn, 11, 5); \
8911
70
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8912
70
    tmp = fieldname(insn, 21, 5); \
8913
70
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8914
70
    return S; \
8915
100
  case 58: \
8916
100
    tmp = fieldname(insn, 11, 5); \
8917
100
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8918
100
    tmp = fieldname(insn, 16, 5); \
8919
100
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8920
100
    tmp = fieldname(insn, 21, 5); \
8921
100
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8922
100
    return S; \
8923
100
  case 59: \
8924
41
    tmp = fieldname(insn, 11, 5); \
8925
41
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8926
41
    tmp = fieldname(insn, 21, 5); \
8927
41
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8928
41
    tmp = fieldname(insn, 16, 5); \
8929
41
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8930
41
    return S; \
8931
154
  case 60: \
8932
154
    tmp = fieldname(insn, 21, 5); \
8933
154
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8934
154
    tmp = fieldname(insn, 16, 5); \
8935
154
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8936
154
    tmp = fieldname(insn, 11, 5); \
8937
154
    MCOperand_CreateImm0(MI, tmp); \
8938
154
    tmp = fieldname(insn, 21, 5); \
8939
154
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8940
154
    return S; \
8941
321
  case 61: \
8942
321
    tmp = fieldname(insn, 11, 5); \
8943
321
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8944
321
    tmp = fieldname(insn, 21, 5); \
8945
321
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8946
321
    tmp = fieldname(insn, 16, 5); \
8947
321
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8948
321
    return S; \
8949
321
  case 62: \
8950
26
    tmp = fieldname(insn, 21, 5); \
8951
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8952
26
    tmp = fieldname(insn, 16, 5); \
8953
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8954
26
    tmp = fieldname(insn, 11, 5); \
8955
26
    MCOperand_CreateImm0(MI, tmp); \
8956
26
    tmp = fieldname(insn, 21, 5); \
8957
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8958
26
    return S; \
8959
188
  case 63: \
8960
188
    tmp = fieldname(insn, 11, 5); \
8961
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8962
188
    tmp = fieldname(insn, 16, 5); \
8963
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8964
188
    tmp = fieldname(insn, 21, 5); \
8965
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8966
188
    tmp = fieldname(insn, 11, 5); \
8967
188
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8968
188
    return S; \
8969
188
  case 64: \
8970
9
    tmp = fieldname(insn, 11, 5); \
8971
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8972
9
    tmp = fieldname(insn, 16, 5); \
8973
9
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8974
9
    tmp = fieldname(insn, 21, 5); \
8975
9
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8976
9
    return S; \
8977
86
  case 65: \
8978
86
    tmp = fieldname(insn, 14, 2); \
8979
86
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8980
86
    tmp = fieldname(insn, 16, 6); \
8981
86
    if (!Check(&S, DecodeSImmWithOffsetAndScale_6_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8982
86
    tmp = fieldname(insn, 14, 2); \
8983
86
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8984
86
    return S; \
8985
106
  case 66: \
8986
106
    tmp = fieldname(insn, 21, 5); \
8987
106
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8988
106
    tmp = fieldname(insn, 16, 5); \
8989
106
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8990
106
    tmp = fieldname(insn, 6, 5); \
8991
106
    MCOperand_CreateImm0(MI, tmp); \
8992
106
    tmp = fieldname(insn, 11, 5); \
8993
106
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8994
106
    return S; \
8995
172
  case 67: \
8996
172
    tmp = fieldname(insn, 11, 5); \
8997
172
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8998
172
    tmp = fieldname(insn, 16, 5); \
8999
172
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9000
172
    tmp = fieldname(insn, 21, 5); \
9001
172
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9002
172
    return S; \
9003
172
  case 68: \
9004
77
    tmp = fieldname(insn, 21, 5); \
9005
77
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9006
77
    tmp = fieldname(insn, 16, 5); \
9007
77
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9008
77
    tmp = fieldname(insn, 11, 3); \
9009
77
    MCOperand_CreateImm0(MI, tmp); \
9010
77
    return S; \
9011
77
  case 69: \
9012
43
    tmp = fieldname(insn, 16, 5); \
9013
43
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9014
43
    tmp = fieldname(insn, 21, 5); \
9015
43
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9016
43
    tmp = fieldname(insn, 11, 3); \
9017
43
    MCOperand_CreateImm0(MI, tmp); \
9018
43
    return S; \
9019
77
  case 70: \
9020
77
    tmp = fieldname(insn, 21, 5); \
9021
77
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9022
77
    tmp = fieldname(insn, 16, 5); \
9023
77
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9024
77
    tmp = fieldname(insn, 12, 4); \
9025
77
    MCOperand_CreateImm0(MI, tmp); \
9026
77
    return S; \
9027
77
  case 71: \
9028
68
    tmp = fieldname(insn, 16, 5); \
9029
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9030
68
    tmp = fieldname(insn, 21, 5); \
9031
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9032
68
    tmp = fieldname(insn, 12, 4); \
9033
68
    MCOperand_CreateImm0(MI, tmp); \
9034
68
    return S; \
9035
68
  case 72: \
9036
28
    tmp = fieldname(insn, 16, 5); \
9037
28
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9038
28
    tmp = fieldname(insn, 14, 2); \
9039
28
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9040
28
    return S; \
9041
28
  case 73: \
9042
16
    tmp = fieldname(insn, 14, 2); \
9043
16
    if (!Check(&S, DecodeHI32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9044
16
    tmp = fieldname(insn, 16, 5); \
9045
16
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9046
16
    return S; \
9047
18
  case 74: \
9048
18
    tmp = fieldname(insn, 21, 5); \
9049
18
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9050
18
    tmp = fieldname(insn, 16, 5); \
9051
18
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9052
18
    tmp = fieldname(insn, 13, 3); \
9053
18
    MCOperand_CreateImm0(MI, tmp); \
9054
18
    return S; \
9055
18
  case 75: \
9056
8
    tmp = fieldname(insn, 14, 2); \
9057
8
    if (!Check(&S, DecodeLO32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9058
8
    tmp = fieldname(insn, 16, 5); \
9059
8
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9060
8
    return S; \
9061
25
  case 76: \
9062
25
    tmp = fieldname(insn, 14, 2); \
9063
25
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9064
25
    tmp = fieldname(insn, 16, 5); \
9065
25
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9066
25
    tmp = fieldname(insn, 21, 5); \
9067
25
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9068
25
    tmp = fieldname(insn, 14, 2); \
9069
25
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9070
25
    return S; \
9071
25
  case 77: \
9072
13
    tmp = fieldname(insn, 21, 5); \
9073
13
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9074
13
    tmp = fieldname(insn, 16, 5); \
9075
13
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9076
13
    tmp = fieldname(insn, 14, 2); \
9077
13
    MCOperand_CreateImm0(MI, tmp); \
9078
13
    tmp = fieldname(insn, 21, 5); \
9079
13
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9080
13
    return S; \
9081
62
  case 78: \
9082
62
    tmp = fieldname(insn, 21, 5); \
9083
62
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9084
62
    tmp = fieldname(insn, 14, 2); \
9085
62
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9086
62
    tmp = fieldname(insn, 16, 5); \
9087
62
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9088
62
    return S; \
9089
193
  case 79: \
9090
193
    tmp = fieldname(insn, 21, 5); \
9091
193
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9092
193
    tmp = fieldname(insn, 16, 5); \
9093
193
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9094
193
    return S; \
9095
218
  case 80: \
9096
218
    tmp = fieldname(insn, 21, 5); \
9097
218
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9098
218
    tmp = fieldname(insn, 16, 5); \
9099
218
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9100
218
    return S; \
9101
218
  case 81: \
9102
23
    tmp = fieldname(insn, 21, 5); \
9103
23
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9104
23
    tmp = fieldname(insn, 21, 5); \
9105
23
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9106
23
    tmp = fieldname(insn, 16, 5); \
9107
23
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9108
23
    return S; \
9109
23
  case 82: \
9110
6
    tmp = fieldname(insn, 21, 5); \
9111
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9112
6
    tmp = fieldname(insn, 16, 5); \
9113
6
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9114
6
    return S; \
9115
52
  case 83: \
9116
52
    tmp = fieldname(insn, 14, 2); \
9117
52
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9118
52
    tmp = fieldname(insn, 16, 5); \
9119
52
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9120
52
    tmp = fieldname(insn, 14, 2); \
9121
52
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9122
52
    return S; \
9123
52
  case 84: \
9124
6
    tmp = fieldname(insn, 21, 5); \
9125
6
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9126
6
    tmp = fieldname(insn, 16, 5); \
9127
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9128
6
    return S; \
9129
6
  case 85: \
9130
4
    tmp = fieldname(insn, 21, 5); \
9131
4
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9132
4
    tmp = fieldname(insn, 16, 5); \
9133
4
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9134
4
    return S; \
9135
97
  case 86: \
9136
97
    tmp = fieldname(insn, 16, 5); \
9137
97
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9138
97
    tmp = fieldname(insn, 21, 5); \
9139
97
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9140
97
    return S; \
9141
97
  case 87: \
9142
7
    tmp = fieldname(insn, 16, 5); \
9143
7
    MCOperand_CreateImm0(MI, tmp); \
9144
7
    return S; \
9145
147
  case 88: \
9146
147
    tmp = fieldname(insn, 16, 10); \
9147
147
    MCOperand_CreateImm0(MI, tmp); \
9148
147
    return S; \
9149
97
  case 89: \
9150
34
    tmp = fieldname(insn, 14, 2); \
9151
34
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9152
34
    tmp = fieldname(insn, 16, 5); \
9153
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9154
34
    tmp = fieldname(insn, 21, 5); \
9155
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9156
34
    return S; \
9157
34
  case 90: \
9158
20
    tmp = fieldname(insn, 21, 5); \
9159
20
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9160
20
    tmp = fieldname(insn, 16, 5); \
9161
20
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9162
20
    return S; \
9163
54
  case 91: \
9164
54
    tmp = fieldname(insn, 16, 5); \
9165
54
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9166
54
    tmp = fieldname(insn, 21, 5); \
9167
54
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9168
54
    return S; \
9169
93
  case 92: \
9170
93
    tmp = fieldname(insn, 16, 5); \
9171
93
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9172
93
    return S; \
9173
93
  case 93: \
9174
14
    tmp = fieldname(insn, 21, 5); \
9175
14
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9176
14
    tmp = fieldname(insn, 13, 8); \
9177
14
    MCOperand_CreateImm0(MI, tmp); \
9178
14
    return S; \
9179
287
  case 94: \
9180
287
    tmp = fieldname(insn, 21, 5); \
9181
287
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9182
287
    tmp = fieldname(insn, 14, 7); \
9183
287
    MCOperand_CreateImm0(MI, tmp); \
9184
287
    return S; \
9185
287
  case 95: \
9186
26
    tmp = fieldname(insn, 21, 5); \
9187
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9188
26
    tmp = fieldname(insn, 14, 2); \
9189
26
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9190
26
    tmp = fieldname(insn, 16, 5); \
9191
26
    MCOperand_CreateImm0(MI, tmp); \
9192
26
    return S; \
9193
28
  case 96: \
9194
28
    tmp = fieldname(insn, 11, 5); \
9195
28
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9196
28
    tmp = fieldname(insn, 16, 10); \
9197
28
    if (!Check(&S, DecodeSImmWithOffsetAndScale_10_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9198
28
    return S; \
9199
590
  case 97: \
9200
590
    tmp = fieldname(insn, 21, 5); \
9201
590
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9202
590
    tmp = fieldname(insn, 16, 5); \
9203
590
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9204
590
    tmp = fieldname(insn, 0, 16); \
9205
590
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9206
590
    return S; \
9207
2.41k
  case 98: \
9208
2.41k
    if (!Check(&S, DecodeMemMMImm16(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9209
2.41k
    return S; \
9210
2.41k
  case 99: \
9211
792
    if (!Check(&S, DecodeMemMMImm12(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9212
792
    return S; \
9213
792
  case 100: \
9214
22
    if (!Check(&S, DecodeCacheOpMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9215
22
    return S; \
9216
239
  case 101: \
9217
239
    tmp = fieldname(insn, 16, 5); \
9218
239
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9219
239
    tmp = fieldname(insn, 0, 16); \
9220
239
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9221
239
    return S; \
9222
239
  case 102: \
9223
203
    tmp = fieldname(insn, 16, 5); \
9224
203
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9225
203
    tmp = fieldname(insn, 0, 16); \
9226
203
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9227
203
    return S; \
9228
233
  case 103: \
9229
233
    tmp = fieldname(insn, 16, 5); \
9230
233
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9231
233
    tmp = fieldname(insn, 0, 16); \
9232
233
    MCOperand_CreateImm0(MI, tmp); \
9233
233
    return S; \
9234
233
  case 104: \
9235
44
    if (!Check(&S, DecodeSyncI_MM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9236
44
    return S; \
9237
44
  case 105: \
9238
17
    tmp = fieldname(insn, 0, 16); \
9239
17
    if (!Check(&S, DecodeBranchTarget1SImm16(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9240
17
    return S; \
9241
38
  case 106: \
9242
38
    tmp = fieldname(insn, 0, 16); \
9243
38
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9244
38
    return S; \
9245
61
  case 107: \
9246
61
    tmp = fieldname(insn, 18, 3); \
9247
61
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9248
61
    tmp = fieldname(insn, 0, 16); \
9249
61
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9250
61
    return S; \
9251
1.18k
  case 108: \
9252
1.18k
    tmp = fieldname(insn, 21, 5); \
9253
1.18k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9254
1.18k
    tmp = fieldname(insn, 16, 5); \
9255
1.18k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9256
1.18k
    tmp = fieldname(insn, 0, 16); \
9257
1.18k
    MCOperand_CreateImm0(MI, tmp); \
9258
1.18k
    return S; \
9259
1.18k
  case 109: \
9260
45
    tmp = fieldname(insn, 11, 5); \
9261
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9262
45
    tmp = fieldname(insn, 6, 5); \
9263
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9264
45
    tmp = fieldname(insn, 16, 5); \
9265
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9266
45
    tmp = fieldname(insn, 21, 5); \
9267
45
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9268
45
    return S; \
9269
45
  case 110: \
9270
7
    tmp = fieldname(insn, 11, 5); \
9271
7
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9272
7
    tmp = fieldname(insn, 16, 5); \
9273
7
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9274
7
    tmp = fieldname(insn, 21, 5); \
9275
7
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9276
7
    return S; \
9277
7
  case 111: \
9278
0
    tmp = fieldname(insn, 11, 5); \
9279
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9280
0
    tmp = fieldname(insn, 16, 5); \
9281
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9282
0
    tmp = fieldname(insn, 21, 5); \
9283
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9284
0
    return S; \
9285
55
  case 112: \
9286
55
    tmp = fieldname(insn, 11, 5); \
9287
55
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9288
55
    tmp = fieldname(insn, 6, 5); \
9289
54
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9290
54
    tmp = fieldname(insn, 16, 5); \
9291
54
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9292
54
    tmp = fieldname(insn, 21, 5); \
9293
52
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9294
52
    return S; \
9295
52
  case 113: \
9296
39
    tmp = fieldname(insn, 21, 5); \
9297
39
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9298
39
    tmp = fieldname(insn, 16, 5); \
9299
39
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9300
39
    tmp = fieldname(insn, 13, 3); \
9301
39
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9302
39
    tmp = fieldname(insn, 21, 5); \
9303
39
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9304
39
    return S; \
9305
39
  case 114: \
9306
10
    tmp = fieldname(insn, 16, 5); \
9307
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9308
10
    tmp = fieldname(insn, 21, 5); \
9309
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9310
10
    tmp = fieldname(insn, 11, 5); \
9311
10
    MCOperand_CreateImm0(MI, tmp); \
9312
10
    return S; \
9313
10
  case 115: \
9314
9
    tmp = fieldname(insn, 21, 5); \
9315
9
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9316
9
    tmp = fieldname(insn, 16, 5); \
9317
8
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9318
8
    tmp = fieldname(insn, 13, 3); \
9319
7
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9320
7
    tmp = fieldname(insn, 21, 5); \
9321
7
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9322
7
    return S; \
9323
13
  case 116: \
9324
13
    tmp = fieldname(insn, 11, 5); \
9325
13
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9326
13
    tmp = fieldname(insn, 16, 5); \
9327
12
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9328
12
    tmp = fieldname(insn, 21, 5); \
9329
11
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9330
11
    return S; \
9331
12
  case 117: \
9332
12
    tmp = fieldname(insn, 11, 5); \
9333
12
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9334
12
    tmp = fieldname(insn, 16, 5); \
9335
12
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9336
12
    tmp = fieldname(insn, 21, 5); \
9337
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9338
12
    tmp = fieldname(insn, 11, 5); \
9339
12
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9340
12
    return S; \
9341
23
  case 118: \
9342
23
    tmp = fieldname(insn, 11, 5); \
9343
23
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9344
23
    tmp = fieldname(insn, 16, 5); \
9345
22
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9346
22
    tmp = fieldname(insn, 21, 5); \
9347
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9348
21
    tmp = fieldname(insn, 11, 5); \
9349
21
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9350
21
    return S; \
9351
22
  case 119: \
9352
22
    tmp = fieldname(insn, 21, 5); \
9353
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9354
22
    tmp = fieldname(insn, 16, 5); \
9355
22
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9356
22
    return S; \
9357
22
  case 120: \
9358
14
    tmp = fieldname(insn, 21, 5); \
9359
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9360
14
    tmp = fieldname(insn, 16, 5); \
9361
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9362
14
    return S; \
9363
14
  case 121: \
9364
6
    tmp = fieldname(insn, 21, 5); \
9365
6
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9366
6
    tmp = fieldname(insn, 16, 5); \
9367
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9368
6
    return S; \
9369
18
  case 122: \
9370
18
    tmp = fieldname(insn, 21, 5); \
9371
18
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9372
18
    tmp = fieldname(insn, 16, 5); \
9373
18
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9374
18
    return S; \
9375
18
  case 123: \
9376
9
    tmp = fieldname(insn, 21, 5); \
9377
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9378
9
    tmp = fieldname(insn, 16, 5); \
9379
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9380
9
    tmp = fieldname(insn, 13, 3); \
9381
9
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9382
9
    tmp = fieldname(insn, 21, 5); \
9383
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9384
9
    return S; \
9385
26
  case 124: \
9386
26
    tmp = fieldname(insn, 21, 5); \
9387
26
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9388
26
    tmp = fieldname(insn, 16, 5); \
9389
26
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9390
26
    return S; \
9391
65
  case 125: \
9392
65
    tmp = fieldname(insn, 16, 5); \
9393
65
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9394
65
    tmp = fieldname(insn, 21, 5); \
9395
65
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9396
65
    return S; \
9397
222
  case 126: \
9398
222
    tmp = fieldname(insn, 21, 5); \
9399
222
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9400
222
    tmp = fieldname(insn, 16, 5); \
9401
222
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9402
222
    return S; \
9403
222
  case 127: \
9404
11
    tmp = fieldname(insn, 21, 5); \
9405
11
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9406
11
    tmp = fieldname(insn, 16, 5); \
9407
11
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9408
11
    return S; \
9409
33
  case 128: \
9410
33
    tmp = fieldname(insn, 21, 5); \
9411
33
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9412
33
    tmp = fieldname(insn, 16, 5); \
9413
33
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9414
33
    return S; \
9415
33
  case 129: \
9416
15
    tmp = fieldname(insn, 21, 5); \
9417
15
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9418
15
    tmp = fieldname(insn, 16, 5); \
9419
15
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9420
15
    return S; \
9421
60
  case 130: \
9422
60
    tmp = fieldname(insn, 16, 5); \
9423
60
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9424
60
    tmp = fieldname(insn, 21, 5); \
9425
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9426
60
    return S; \
9427
60
  case 131: \
9428
25
    tmp = fieldname(insn, 16, 5); \
9429
25
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9430
25
    tmp = fieldname(insn, 16, 5); \
9431
24
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9432
24
    tmp = fieldname(insn, 21, 5); \
9433
24
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9434
24
    return S; \
9435
52
  case 132: \
9436
52
    tmp = fieldname(insn, 13, 3); \
9437
52
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9438
52
    tmp = fieldname(insn, 16, 5); \
9439
52
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9440
52
    tmp = fieldname(insn, 21, 5); \
9441
52
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9442
52
    return S; \
9443
298
  case 133: \
9444
298
    tmp = fieldname(insn, 13, 3); \
9445
298
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9446
298
    tmp = fieldname(insn, 16, 5); \
9447
298
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9448
298
    tmp = fieldname(insn, 21, 5); \
9449
297
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9450
297
    return S; \
9451
388
  case 134: \
9452
388
    if (!Check(&S, DecodeMemMMImm9(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9453
388
    return S; \
9454
388
  case 135: \
9455
30
    if (!Check(&S, DecodePrefeOpMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9456
30
    return S; \
9457
202
  case 136: \
9458
202
    if (!Check(&S, DecodeJumpTargetMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9459
202
    return S; \
9460
289
  case 137: \
9461
289
    tmp = fieldname(insn, 23, 3); \
9462
289
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9463
289
    tmp = fieldname(insn, 0, 23); \
9464
289
    if (!Check(&S, DecodeSimm23Lsl2(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9465
289
    return S; \
9466
593
  case 138: \
9467
593
    tmp = fieldname(insn, 16, 5); \
9468
593
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9469
593
    tmp = fieldname(insn, 21, 5); \
9470
593
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9471
593
    tmp = fieldname(insn, 0, 16); \
9472
593
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9473
593
    return S; \
9474
1.83k
  case 139: \
9475
1.83k
    if (!Check(&S, DecodeFMemMMR2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9476
1.83k
    return S; \
9477
1.83k
  case 140: \
9478
255
    if (!Check(&S, DecodeJumpTargetXMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9479
255
    return S; \
9480
6.24k
  case 141: \
9481
6.24k
    if (!Check(&S, DecodeMem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9482
6.24k
    return S; \
9483
6.24k
  case 142: \
9484
0
    tmp = fieldname(insn, 16, 5); \
9485
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9486
0
    tmp = fieldname(insn, 21, 5); \
9487
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9488
0
    return S; \
9489
18
  case 143: \
9490
18
    tmp = fieldname(insn, 21, 5); \
9491
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9492
18
    tmp = fieldname(insn, 16, 5); \
9493
18
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9494
18
    return S; \
9495
18
  case 144: \
9496
10
    tmp = fieldname(insn, 16, 5); \
9497
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9498
10
    tmp = fieldname(insn, 16, 5); \
9499
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9500
10
    tmp = fieldname(insn, 21, 5); \
9501
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9502
10
    return S; \
9503
15
  case 145: \
9504
15
    tmp = fieldname(insn, 11, 5); \
9505
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9506
15
    tmp = fieldname(insn, 16, 5); \
9507
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9508
15
    tmp = fieldname(insn, 21, 5); \
9509
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9510
15
    return S; \
9511
15
  case 146: \
9512
15
    tmp = fieldname(insn, 21, 5); \
9513
15
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9514
15
    tmp = fieldname(insn, 16, 5); \
9515
15
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9516
15
    return S; \
9517
15
  case 147: \
9518
0
    tmp = fieldname(insn, 1, 3); \
9519
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9520
0
    tmp = fieldname(insn, 7, 3); \
9521
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9522
0
    tmp = fieldname(insn, 4, 3); \
9523
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9524
0
    return S; \
9525
0
  case 148: \
9526
0
    tmp = fieldname(insn, 7, 3); \
9527
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9528
0
    tmp = fieldname(insn, 4, 3); \
9529
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9530
0
    return S; \
9531
0
  case 149: \
9532
0
    tmp = fieldname(insn, 7, 3); \
9533
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9534
0
    tmp = fieldname(insn, 4, 3); \
9535
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9536
0
    tmp = fieldname(insn, 7, 3); \
9537
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9538
0
    return S; \
9539
0
  case 150: \
9540
0
    tmp = fieldname(insn, 5, 5); \
9541
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9542
0
    return S; \
9543
0
  case 151: \
9544
0
    tmp = fieldname(insn, 5, 5); \
9545
0
    if (!Check(&S, DecodeUImmWithOffsetAndScale_5_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9546
0
    return S; \
9547
0
  case 152: \
9548
0
    tmp = fieldname(insn, 6, 4); \
9549
0
    MCOperand_CreateImm0(MI, tmp); \
9550
0
    return S; \
9551
65
  case 153: \
9552
65
    tmp = fieldname(insn, 21, 5); \
9553
65
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9554
65
    tmp = fieldname(insn, 16, 5); \
9555
65
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9556
65
    tmp = fieldname(insn, 11, 3); \
9557
60
    MCOperand_CreateImm0(MI, tmp); \
9558
60
    return S; \
9559
65
  case 154: \
9560
34
    tmp = fieldname(insn, 11, 5); \
9561
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9562
34
    tmp = fieldname(insn, 16, 5); \
9563
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9564
34
    tmp = fieldname(insn, 21, 5); \
9565
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9566
34
    tmp = fieldname(insn, 9, 2); \
9567
34
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9568
34
    return S; \
9569
34
  case 155: \
9570
21
    tmp = fieldname(insn, 11, 5); \
9571
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9572
21
    tmp = fieldname(insn, 21, 5); \
9573
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9574
21
    tmp = fieldname(insn, 16, 5); \
9575
21
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9576
21
    tmp = fieldname(insn, 9, 2); \
9577
21
    MCOperand_CreateImm0(MI, tmp); \
9578
21
    return S; \
9579
89
  case 156: \
9580
89
    tmp = fieldname(insn, 16, 5); \
9581
89
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9582
89
    tmp = fieldname(insn, 9, 2); \
9583
89
    MCOperand_CreateImm0(MI, tmp); \
9584
89
    return S; \
9585
218
  case 157: \
9586
218
    tmp = fieldname(insn, 6, 16); \
9587
218
    MCOperand_CreateImm0(MI, tmp); \
9588
218
    return S; \
9589
192
  case 158: \
9590
192
    tmp = fieldname(insn, 21, 5); \
9591
192
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9592
192
    tmp = fieldname(insn, 0, 16); \
9593
192
    MCOperand_CreateImm0(MI, tmp); \
9594
192
    return S; \
9595
814
  case 159: \
9596
814
    if (!Check(&S, DecodeLoadByte15(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9597
814
    return S; \
9598
814
  case 160: \
9599
290
    if (!Check(&S, DecodeFMemCop2MMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9600
290
    return S; \
9601
290
  case 161: \
9602
53
    tmp = fieldname(insn, 16, 5); \
9603
53
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9604
53
    tmp = fieldname(insn, 0, 16); \
9605
53
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9606
53
    return S; \
9607
312
  case 162: \
9608
312
    tmp = fieldname(insn, 16, 5); \
9609
312
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9610
312
    tmp = fieldname(insn, 0, 16); \
9611
312
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9612
312
    return S; \
9613
312
  case 163: \
9614
13
    if (!Check(&S, DecodeSynciR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9615
13
    return S; \
9616
21
  case 164: \
9617
21
    tmp = fieldname(insn, 11, 5); \
9618
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9619
21
    tmp = fieldname(insn, 16, 5); \
9620
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9621
21
    tmp = fieldname(insn, 21, 5); \
9622
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9623
21
    return S; \
9624
23
  case 165: \
9625
23
    tmp = fieldname(insn, 11, 5); \
9626
23
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9627
23
    tmp = fieldname(insn, 16, 5); \
9628
23
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9629
23
    tmp = fieldname(insn, 21, 5); \
9630
23
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9631
23
    return S; \
9632
74
  case 166: \
9633
74
    tmp = fieldname(insn, 11, 5); \
9634
74
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9635
74
    tmp = fieldname(insn, 16, 5); \
9636
74
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9637
74
    tmp = fieldname(insn, 21, 5); \
9638
74
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9639
74
    return S; \
9640
74
  case 167: \
9641
28
    tmp = fieldname(insn, 16, 5); \
9642
28
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9643
28
    tmp = fieldname(insn, 21, 5); \
9644
28
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9645
28
    return S; \
9646
28
  case 168: \
9647
6
    tmp = fieldname(insn, 11, 5); \
9648
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9649
6
    tmp = fieldname(insn, 21, 5); \
9650
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9651
6
    tmp = fieldname(insn, 16, 5); \
9652
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9653
6
    return S; \
9654
35
  case 169: \
9655
35
    tmp = fieldname(insn, 11, 5); \
9656
35
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9657
35
    tmp = fieldname(insn, 11, 5); \
9658
35
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9659
35
    tmp = fieldname(insn, 16, 5); \
9660
35
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9661
35
    tmp = fieldname(insn, 21, 5); \
9662
35
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9663
35
    return S; \
9664
35
  case 170: \
9665
21
    tmp = fieldname(insn, 11, 5); \
9666
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9667
21
    tmp = fieldname(insn, 11, 5); \
9668
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9669
21
    tmp = fieldname(insn, 16, 5); \
9670
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9671
21
    tmp = fieldname(insn, 21, 5); \
9672
21
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9673
21
    return S; \
9674
21
  case 171: \
9675
0
    tmp = fieldname(insn, 16, 5); \
9676
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9677
0
    tmp = fieldname(insn, 21, 5); \
9678
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9679
0
    return S; \
9680
51
  case 172: \
9681
51
    tmp = fieldname(insn, 11, 5); \
9682
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9683
51
    tmp = fieldname(insn, 11, 5); \
9684
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9685
51
    tmp = fieldname(insn, 16, 5); \
9686
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9687
51
    tmp = fieldname(insn, 21, 5); \
9688
51
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9689
51
    return S; \
9690
1.00k
  case 173: \
9691
1.00k
    if (!Check(&S, DecodePOP35GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9692
1.00k
    return S; \
9693
1.00k
  case 174: \
9694
233
    tmp = fieldname(insn, 21, 5); \
9695
233
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9696
233
    tmp = fieldname(insn, 0, 19); \
9697
233
    if (!Check(&S, DecodeSimm19Lsl2(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9698
233
    return S; \
9699
233
  case 175: \
9700
180
    tmp = fieldname(insn, 21, 5); \
9701
180
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9702
180
    tmp = fieldname(insn, 0, 16); \
9703
180
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9704
180
    return S; \
9705
940
  case 176: \
9706
940
    if (!Check(&S, DecodePOP37GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9707
940
    return S; \
9708
940
  case 177: \
9709
169
    tmp = fieldname(insn, 21, 5); \
9710
169
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9711
169
    tmp = fieldname(insn, 0, 21); \
9712
169
    if (!Check(&S, DecodeBranchTarget21MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9713
169
    return S; \
9714
334
  case 178: \
9715
334
    tmp = fieldname(insn, 0, 26); \
9716
334
    if (!Check(&S, DecodeBranchTarget26MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9717
334
    return S; \
9718
848
  case 179: \
9719
848
    if (!Check(&S, DecodeBlezGroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9720
848
    return S; \
9721
848
  case 180: \
9722
588
    if (!Check(&S, DecodePOP65GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9723
588
    return S; \
9724
620
  case 181: \
9725
620
    if (!Check(&S, DecodeBgtzGroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9726
620
    return S; \
9727
620
  case 182: \
9728
319
    if (!Check(&S, DecodePOP75GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9729
319
    return S; \
9730
819
  case 183: \
9731
819
    tmp = fieldname(insn, 11, 5); \
9732
819
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9733
819
    tmp = fieldname(insn, 16, 5); \
9734
819
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9735
819
    tmp = fieldname(insn, 6, 5); \
9736
819
    MCOperand_CreateImm0(MI, tmp); \
9737
819
    return S; \
9738
819
  case 184: \
9739
61
    tmp = fieldname(insn, 11, 5); \
9740
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9741
61
    tmp = fieldname(insn, 21, 5); \
9742
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9743
61
    tmp = fieldname(insn, 18, 3); \
9744
61
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9745
61
    tmp = fieldname(insn, 11, 5); \
9746
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9747
61
    return S; \
9748
61
  case 185: \
9749
45
    tmp = fieldname(insn, 11, 5); \
9750
45
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9751
45
    tmp = fieldname(insn, 21, 5); \
9752
45
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9753
45
    tmp = fieldname(insn, 16, 5); \
9754
45
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9755
45
    tmp = fieldname(insn, 6, 2); \
9756
45
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9757
45
    return S; \
9758
57
  case 186: \
9759
57
    tmp = fieldname(insn, 21, 5); \
9760
57
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9761
57
    return S; \
9762
57
  case 187: \
9763
10
    tmp = fieldname(insn, 11, 5); \
9764
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9765
10
    tmp = fieldname(insn, 21, 5); \
9766
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9767
10
    tmp = fieldname(insn, 16, 5); \
9768
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9769
10
    tmp = fieldname(insn, 11, 5); \
9770
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9771
10
    return S; \
9772
26
  case 188: \
9773
26
    tmp = fieldname(insn, 6, 20); \
9774
26
    MCOperand_CreateImm0(MI, tmp); \
9775
26
    return S; \
9776
116
  case 189: \
9777
116
    tmp = fieldname(insn, 6, 5); \
9778
116
    MCOperand_CreateImm0(MI, tmp); \
9779
116
    return S; \
9780
34
  case 190: \
9781
34
    tmp = fieldname(insn, 11, 5); \
9782
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9783
34
    return S; \
9784
34
  case 191: \
9785
22
    tmp = fieldname(insn, 11, 5); \
9786
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9787
22
    tmp = fieldname(insn, 21, 2); \
9788
22
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9789
22
    return S; \
9790
60
  case 192: \
9791
60
    tmp = fieldname(insn, 11, 2); \
9792
60
    if (!Check(&S, DecodeHI32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9793
60
    tmp = fieldname(insn, 21, 5); \
9794
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9795
60
    return S; \
9796
60
  case 193: \
9797
59
    tmp = fieldname(insn, 11, 2); \
9798
59
    if (!Check(&S, DecodeLO32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9799
59
    tmp = fieldname(insn, 21, 5); \
9800
59
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9801
59
    return S; \
9802
59
  case 194: \
9803
54
    tmp = fieldname(insn, 11, 5); \
9804
54
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9805
54
    tmp = fieldname(insn, 21, 5); \
9806
54
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9807
54
    tmp = fieldname(insn, 16, 5); \
9808
54
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9809
54
    tmp = fieldname(insn, 6, 2); \
9810
54
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9811
54
    return S; \
9812
54
  case 195: \
9813
22
    tmp = fieldname(insn, 11, 2); \
9814
22
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9815
22
    tmp = fieldname(insn, 21, 5); \
9816
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9817
22
    tmp = fieldname(insn, 16, 5); \
9818
22
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9819
22
    return S; \
9820
396
  case 196: \
9821
396
    tmp = fieldname(insn, 21, 5); \
9822
396
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9823
396
    tmp = fieldname(insn, 16, 5); \
9824
396
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9825
396
    tmp = fieldname(insn, 6, 10); \
9826
396
    MCOperand_CreateImm0(MI, tmp); \
9827
396
    return S; \
9828
411
  case 197: \
9829
411
    tmp = fieldname(insn, 21, 5); \
9830
411
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9831
411
    tmp = fieldname(insn, 0, 16); \
9832
411
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9833
411
    return S; \
9834
411
  case 198: \
9835
22
    tmp = fieldname(insn, 0, 16); \
9836
22
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9837
22
    return S; \
9838
48
  case 199: \
9839
48
    if (!Check(&S, DecodeSyncI(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9840
48
    return S; \
9841
1.13k
  case 200: \
9842
1.13k
    if (!Check(&S, DecodeJumpTarget(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9843
1.13k
    return S; \
9844
1.35k
  case 201: \
9845
1.35k
    tmp = fieldname(insn, 21, 5); \
9846
1.35k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9847
1.35k
    tmp = fieldname(insn, 16, 5); \
9848
1.35k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9849
1.35k
    tmp = fieldname(insn, 0, 16); \
9850
1.35k
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9851
1.35k
    return S; \
9852
1.50k
  case 202: \
9853
1.50k
    tmp = fieldname(insn, 16, 5); \
9854
1.50k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9855
1.50k
    tmp = fieldname(insn, 21, 5); \
9856
1.50k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9857
1.50k
    tmp = fieldname(insn, 0, 16); \
9858
1.50k
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9859
1.50k
    return S; \
9860
1.50k
  case 203: \
9861
908
    tmp = fieldname(insn, 16, 5); \
9862
908
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9863
908
    tmp = fieldname(insn, 21, 5); \
9864
908
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9865
908
    tmp = fieldname(insn, 0, 16); \
9866
908
    MCOperand_CreateImm0(MI, tmp); \
9867
908
    return S; \
9868
908
  case 204: \
9869
8
    tmp = fieldname(insn, 16, 5); \
9870
8
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9871
8
    tmp = fieldname(insn, 11, 5); \
9872
8
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9873
8
    tmp = fieldname(insn, 0, 3); \
9874
8
    MCOperand_CreateImm0(MI, tmp); \
9875
8
    return S; \
9876
8
  case 205: \
9877
8
    tmp = fieldname(insn, 11, 5); \
9878
8
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9879
8
    tmp = fieldname(insn, 16, 5); \
9880
8
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9881
8
    tmp = fieldname(insn, 0, 3); \
9882
8
    MCOperand_CreateImm0(MI, tmp); \
9883
8
    return S; \
9884
61
  case 206: \
9885
61
    tmp = fieldname(insn, 11, 5); \
9886
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9887
61
    tmp = fieldname(insn, 16, 5); \
9888
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9889
61
    tmp = fieldname(insn, 5, 1); \
9890
61
    MCOperand_CreateImm0(MI, tmp); \
9891
61
    tmp = fieldname(insn, 0, 3); \
9892
61
    MCOperand_CreateImm0(MI, tmp); \
9893
61
    tmp = fieldname(insn, 4, 1); \
9894
61
    MCOperand_CreateImm0(MI, tmp); \
9895
61
    return S; \
9896
61
  case 207: \
9897
59
    tmp = fieldname(insn, 11, 10); \
9898
59
    MCOperand_CreateImm0(MI, tmp); \
9899
59
    return S; \
9900
61
  case 208: \
9901
11
    tmp = fieldname(insn, 16, 5); \
9902
11
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9903
11
    tmp = fieldname(insn, 11, 5); \
9904
11
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9905
11
    return S; \
9906
87
  case 209: \
9907
87
    tmp = fieldname(insn, 16, 5); \
9908
87
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9909
87
    tmp = fieldname(insn, 11, 5); \
9910
87
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9911
87
    return S; \
9912
87
  case 210: \
9913
40
    tmp = fieldname(insn, 16, 5); \
9914
40
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9915
40
    tmp = fieldname(insn, 11, 5); \
9916
40
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9917
40
    return S; \
9918
40
  case 211: \
9919
0
    tmp = fieldname(insn, 16, 5); \
9920
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9921
0
    tmp = fieldname(insn, 11, 5); \
9922
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9923
0
    return S; \
9924
29
  case 212: \
9925
29
    tmp = fieldname(insn, 11, 5); \
9926
29
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9927
29
    tmp = fieldname(insn, 16, 5); \
9928
29
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9929
29
    return S; \
9930
78
  case 213: \
9931
78
    tmp = fieldname(insn, 11, 5); \
9932
78
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9933
78
    tmp = fieldname(insn, 16, 5); \
9934
78
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9935
78
    return S; \
9936
78
  case 214: \
9937
15
    tmp = fieldname(insn, 11, 5); \
9938
15
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9939
15
    tmp = fieldname(insn, 16, 5); \
9940
15
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9941
15
    return S; \
9942
15
  case 215: \
9943
0
    tmp = fieldname(insn, 11, 5); \
9944
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9945
0
    tmp = fieldname(insn, 11, 5); \
9946
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9947
0
    tmp = fieldname(insn, 16, 5); \
9948
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9949
0
    return S; \
9950
304
  case 216: \
9951
304
    tmp = fieldname(insn, 18, 3); \
9952
304
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9953
304
    tmp = fieldname(insn, 0, 16); \
9954
304
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9955
304
    return S; \
9956
304
  case 217: \
9957
98
    tmp = fieldname(insn, 16, 5); \
9958
98
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9959
98
    tmp = fieldname(insn, 0, 16); \
9960
98
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9961
98
    return S; \
9962
98
  case 218: \
9963
8
    tmp = fieldname(insn, 6, 5); \
9964
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9965
8
    tmp = fieldname(insn, 11, 5); \
9966
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9967
8
    tmp = fieldname(insn, 16, 5); \
9968
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9969
8
    return S; \
9970
32
  case 219: \
9971
32
    tmp = fieldname(insn, 6, 5); \
9972
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9973
32
    tmp = fieldname(insn, 11, 5); \
9974
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9975
32
    return S; \
9976
32
  case 220: \
9977
16
    tmp = fieldname(insn, 6, 5); \
9978
16
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9979
16
    tmp = fieldname(insn, 11, 5); \
9980
16
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9981
16
    tmp = fieldname(insn, 18, 3); \
9982
16
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9983
16
    tmp = fieldname(insn, 6, 5); \
9984
16
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9985
16
    return S; \
9986
49
  case 221: \
9987
49
    tmp = fieldname(insn, 6, 5); \
9988
49
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9989
49
    tmp = fieldname(insn, 11, 5); \
9990
49
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9991
49
    tmp = fieldname(insn, 16, 5); \
9992
49
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9993
49
    tmp = fieldname(insn, 6, 5); \
9994
49
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9995
49
    return S; \
9996
49
  case 222: \
9997
6
    tmp = fieldname(insn, 6, 5); \
9998
6
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9999
6
    tmp = fieldname(insn, 11, 5); \
10000
5
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10001
5
    return S; \
10002
8
  case 223: \
10003
8
    tmp = fieldname(insn, 6, 5); \
10004
8
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10005
8
    tmp = fieldname(insn, 11, 5); \
10006
8
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10007
8
    return S; \
10008
48
  case 224: \
10009
48
    tmp = fieldname(insn, 8, 3); \
10010
48
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10011
48
    tmp = fieldname(insn, 11, 5); \
10012
48
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10013
48
    tmp = fieldname(insn, 16, 5); \
10014
48
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10015
48
    return S; \
10016
48
  case 225: \
10017
16
    tmp = fieldname(insn, 6, 5); \
10018
16
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10019
16
    tmp = fieldname(insn, 11, 5); \
10020
15
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10021
15
    tmp = fieldname(insn, 16, 5); \
10022
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10023
14
    return S; \
10024
209
  case 226: \
10025
209
    tmp = fieldname(insn, 6, 5); \
10026
209
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10027
209
    tmp = fieldname(insn, 11, 5); \
10028
209
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10029
209
    return S; \
10030
209
  case 227: \
10031
6
    tmp = fieldname(insn, 6, 5); \
10032
6
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10033
6
    tmp = fieldname(insn, 11, 5); \
10034
6
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10035
6
    return S; \
10036
22
  case 228: \
10037
22
    tmp = fieldname(insn, 6, 5); \
10038
22
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10039
22
    tmp = fieldname(insn, 11, 5); \
10040
21
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10041
21
    tmp = fieldname(insn, 18, 3); \
10042
20
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10043
20
    tmp = fieldname(insn, 6, 5); \
10044
20
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10045
20
    return S; \
10046
20
  case 229: \
10047
16
    tmp = fieldname(insn, 6, 5); \
10048
16
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10049
16
    tmp = fieldname(insn, 11, 5); \
10050
15
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10051
15
    tmp = fieldname(insn, 16, 5); \
10052
14
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10053
14
    tmp = fieldname(insn, 6, 5); \
10054
14
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10055
14
    return S; \
10056
20
  case 230: \
10057
20
    tmp = fieldname(insn, 6, 5); \
10058
20
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10059
20
    tmp = fieldname(insn, 11, 5); \
10060
20
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10061
20
    return S; \
10062
21
  case 231: \
10063
21
    tmp = fieldname(insn, 8, 3); \
10064
21
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10065
21
    tmp = fieldname(insn, 11, 5); \
10066
21
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10067
21
    tmp = fieldname(insn, 16, 5); \
10068
20
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10069
20
    return S; \
10070
210
  case 232: \
10071
210
    tmp = fieldname(insn, 16, 5); \
10072
210
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10073
210
    tmp = fieldname(insn, 0, 16); \
10074
210
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10075
210
    return S; \
10076
695
  case 233: \
10077
695
    tmp = fieldname(insn, 16, 5); \
10078
695
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10079
695
    tmp = fieldname(insn, 0, 16); \
10080
695
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10081
695
    return S; \
10082
695
  case 234: \
10083
29
    tmp = fieldname(insn, 16, 5); \
10084
29
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10085
29
    tmp = fieldname(insn, 0, 16); \
10086
29
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10087
29
    return S; \
10088
29
  case 235: \
10089
18
    tmp = fieldname(insn, 16, 5); \
10090
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10091
18
    tmp = fieldname(insn, 11, 5); \
10092
18
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10093
18
    tmp = fieldname(insn, 0, 3); \
10094
18
    MCOperand_CreateImm0(MI, tmp); \
10095
18
    return S; \
10096
18
  case 236: \
10097
3
    tmp = fieldname(insn, 11, 5); \
10098
3
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10099
3
    tmp = fieldname(insn, 16, 5); \
10100
3
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10101
3
    tmp = fieldname(insn, 0, 3); \
10102
3
    MCOperand_CreateImm0(MI, tmp); \
10103
3
    return S; \
10104
75
  case 237: \
10105
75
    tmp = fieldname(insn, 6, 5); \
10106
75
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10107
75
    tmp = fieldname(insn, 21, 5); \
10108
75
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10109
75
    tmp = fieldname(insn, 16, 5); \
10110
75
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10111
75
    return S; \
10112
75
  case 238: \
10113
0
    tmp = fieldname(insn, 6, 5); \
10114
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10115
0
    tmp = fieldname(insn, 21, 5); \
10116
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10117
0
    tmp = fieldname(insn, 16, 5); \
10118
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10119
0
    return S; \
10120
10
  case 239: \
10121
10
    tmp = fieldname(insn, 11, 5); \
10122
10
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10123
10
    tmp = fieldname(insn, 21, 5); \
10124
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10125
10
    tmp = fieldname(insn, 16, 5); \
10126
10
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10127
10
    return S; \
10128
10
  case 240: \
10129
0
    tmp = fieldname(insn, 11, 5); \
10130
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10131
0
    tmp = fieldname(insn, 21, 5); \
10132
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10133
0
    tmp = fieldname(insn, 16, 5); \
10134
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10135
0
    return S; \
10136
227
  case 241: \
10137
227
    tmp = fieldname(insn, 6, 5); \
10138
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10139
227
    tmp = fieldname(insn, 21, 5); \
10140
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10141
227
    tmp = fieldname(insn, 11, 5); \
10142
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10143
227
    tmp = fieldname(insn, 16, 5); \
10144
227
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10145
227
    return S; \
10146
227
  case 242: \
10147
0
    tmp = fieldname(insn, 6, 5); \
10148
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10149
0
    tmp = fieldname(insn, 21, 5); \
10150
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10151
0
    tmp = fieldname(insn, 11, 5); \
10152
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10153
0
    tmp = fieldname(insn, 16, 5); \
10154
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10155
0
    return S; \
10156
41
  case 243: \
10157
41
    tmp = fieldname(insn, 11, 2); \
10158
41
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10159
41
    tmp = fieldname(insn, 21, 5); \
10160
41
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10161
41
    tmp = fieldname(insn, 16, 5); \
10162
41
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10163
41
    tmp = fieldname(insn, 11, 2); \
10164
41
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10165
41
    return S; \
10166
41
  case 244: \
10167
34
    tmp = 0x0; \
10168
34
    tmp |= fieldname(insn, 11, 5) << 0; \
10169
34
    tmp |= fieldname(insn, 16, 5) << 0; \
10170
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10171
34
    tmp = fieldname(insn, 21, 5); \
10172
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10173
34
    return S; \
10174
52
  case 245: \
10175
52
    tmp = fieldname(insn, 6, 5); \
10176
52
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10177
52
    tmp = fieldname(insn, 11, 5); \
10178
52
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10179
52
    tmp = fieldname(insn, 16, 8); \
10180
52
    MCOperand_CreateImm0(MI, tmp); \
10181
52
    return S; \
10182
52
  case 246: \
10183
22
    tmp = fieldname(insn, 6, 5); \
10184
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10185
22
    tmp = fieldname(insn, 6, 5); \
10186
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10187
22
    tmp = fieldname(insn, 11, 5); \
10188
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10189
22
    tmp = fieldname(insn, 16, 8); \
10190
22
    MCOperand_CreateImm0(MI, tmp); \
10191
22
    return S; \
10192
27
  case 247: \
10193
27
    tmp = fieldname(insn, 6, 5); \
10194
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10195
27
    tmp = fieldname(insn, 11, 5); \
10196
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10197
27
    tmp = fieldname(insn, 16, 8); \
10198
27
    MCOperand_CreateImm0(MI, tmp); \
10199
27
    return S; \
10200
27
  case 248: \
10201
26
    tmp = fieldname(insn, 6, 5); \
10202
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10203
26
    tmp = fieldname(insn, 11, 5); \
10204
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10205
26
    tmp = fieldname(insn, 16, 8); \
10206
26
    MCOperand_CreateImm0(MI, tmp); \
10207
26
    return S; \
10208
26
  case 249: \
10209
22
    tmp = fieldname(insn, 6, 5); \
10210
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10211
22
    tmp = fieldname(insn, 11, 5); \
10212
22
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10213
22
    tmp = fieldname(insn, 16, 5); \
10214
22
    MCOperand_CreateImm0(MI, tmp); \
10215
22
    return S; \
10216
89
  case 250: \
10217
89
    tmp = fieldname(insn, 6, 5); \
10218
89
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10219
89
    tmp = fieldname(insn, 11, 5); \
10220
89
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10221
89
    tmp = fieldname(insn, 16, 5); \
10222
89
    MCOperand_CreateImm0(MI, tmp); \
10223
89
    return S; \
10224
89
  case 251: \
10225
10
    tmp = fieldname(insn, 6, 5); \
10226
10
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10227
10
    tmp = fieldname(insn, 11, 5); \
10228
10
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10229
10
    tmp = fieldname(insn, 16, 5); \
10230
10
    MCOperand_CreateImm0(MI, tmp); \
10231
10
    return S; \
10232
34
  case 252: \
10233
34
    tmp = fieldname(insn, 6, 5); \
10234
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10235
34
    tmp = fieldname(insn, 11, 5); \
10236
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10237
34
    tmp = fieldname(insn, 16, 5); \
10238
34
    MCOperand_CreateImm0(MI, tmp); \
10239
34
    return S; \
10240
34
  case 253: \
10241
19
    tmp = fieldname(insn, 6, 5); \
10242
19
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10243
19
    tmp = fieldname(insn, 11, 10); \
10244
19
    MCOperand_CreateImm0(MI, tmp); \
10245
19
    return S; \
10246
54
  case 254: \
10247
54
    tmp = fieldname(insn, 6, 5); \
10248
54
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10249
54
    tmp = fieldname(insn, 11, 10); \
10250
54
    MCOperand_CreateImm0(MI, tmp); \
10251
54
    return S; \
10252
62
  case 255: \
10253
62
    tmp = fieldname(insn, 6, 5); \
10254
62
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10255
62
    tmp = fieldname(insn, 11, 10); \
10256
62
    MCOperand_CreateImm0(MI, tmp); \
10257
62
    return S; \
10258
62
  case 256: \
10259
6
    tmp = fieldname(insn, 6, 5); \
10260
6
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10261
6
    tmp = fieldname(insn, 11, 10); \
10262
6
    MCOperand_CreateImm0(MI, tmp); \
10263
6
    return S; \
10264
19
  case 257: \
10265
19
    tmp = fieldname(insn, 6, 5); \
10266
19
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10267
19
    tmp = fieldname(insn, 11, 5); \
10268
19
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10269
19
    tmp = fieldname(insn, 16, 6); \
10270
19
    MCOperand_CreateImm0(MI, tmp); \
10271
19
    return S; \
10272
27
  case 258: \
10273
27
    tmp = fieldname(insn, 6, 5); \
10274
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10275
27
    tmp = fieldname(insn, 11, 5); \
10276
27
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10277
27
    tmp = fieldname(insn, 16, 4); \
10278
27
    MCOperand_CreateImm0(MI, tmp); \
10279
27
    return S; \
10280
27
  case 259: \
10281
11
    tmp = fieldname(insn, 6, 5); \
10282
11
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10283
11
    tmp = fieldname(insn, 11, 5); \
10284
11
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10285
11
    tmp = fieldname(insn, 16, 3); \
10286
11
    MCOperand_CreateImm0(MI, tmp); \
10287
11
    return S; \
10288
23
  case 260: \
10289
23
    tmp = fieldname(insn, 6, 5); \
10290
23
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10291
23
    tmp = fieldname(insn, 6, 5); \
10292
23
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10293
23
    tmp = fieldname(insn, 11, 5); \
10294
23
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10295
23
    tmp = fieldname(insn, 16, 6); \
10296
23
    MCOperand_CreateImm0(MI, tmp); \
10297
23
    return S; \
10298
26
  case 261: \
10299
26
    tmp = fieldname(insn, 6, 5); \
10300
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10301
26
    tmp = fieldname(insn, 6, 5); \
10302
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10303
26
    tmp = fieldname(insn, 11, 5); \
10304
26
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10305
26
    tmp = fieldname(insn, 16, 5); \
10306
26
    MCOperand_CreateImm0(MI, tmp); \
10307
26
    return S; \
10308
26
  case 262: \
10309
10
    tmp = fieldname(insn, 6, 5); \
10310
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10311
10
    tmp = fieldname(insn, 6, 5); \
10312
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10313
10
    tmp = fieldname(insn, 11, 5); \
10314
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10315
10
    tmp = fieldname(insn, 16, 4); \
10316
10
    MCOperand_CreateImm0(MI, tmp); \
10317
10
    return S; \
10318
12
  case 263: \
10319
12
    tmp = fieldname(insn, 6, 5); \
10320
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10321
12
    tmp = fieldname(insn, 6, 5); \
10322
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10323
12
    tmp = fieldname(insn, 11, 5); \
10324
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10325
12
    tmp = fieldname(insn, 16, 3); \
10326
12
    MCOperand_CreateImm0(MI, tmp); \
10327
12
    return S; \
10328
58
  case 264: \
10329
58
    tmp = fieldname(insn, 6, 5); \
10330
58
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10331
58
    tmp = fieldname(insn, 11, 5); \
10332
58
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10333
58
    tmp = fieldname(insn, 16, 5); \
10334
58
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10335
58
    return S; \
10336
71
  case 265: \
10337
71
    tmp = fieldname(insn, 6, 5); \
10338
71
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10339
71
    tmp = fieldname(insn, 11, 5); \
10340
71
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10341
71
    tmp = fieldname(insn, 16, 5); \
10342
71
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10343
71
    return S; \
10344
71
  case 266: \
10345
38
    tmp = fieldname(insn, 6, 5); \
10346
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10347
38
    tmp = fieldname(insn, 11, 5); \
10348
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10349
38
    tmp = fieldname(insn, 16, 5); \
10350
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10351
38
    return S; \
10352
80
  case 267: \
10353
80
    tmp = fieldname(insn, 6, 5); \
10354
80
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10355
80
    tmp = fieldname(insn, 11, 5); \
10356
80
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10357
80
    tmp = fieldname(insn, 16, 5); \
10358
80
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10359
80
    return S; \
10360
151
  case 268: \
10361
151
    tmp = fieldname(insn, 6, 5); \
10362
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10363
151
    tmp = fieldname(insn, 6, 5); \
10364
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10365
151
    tmp = fieldname(insn, 11, 5); \
10366
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10367
151
    tmp = fieldname(insn, 16, 5); \
10368
151
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10369
151
    return S; \
10370
151
  case 269: \
10371
36
    tmp = fieldname(insn, 6, 5); \
10372
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10373
36
    tmp = fieldname(insn, 6, 5); \
10374
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10375
36
    tmp = fieldname(insn, 11, 5); \
10376
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10377
36
    tmp = fieldname(insn, 16, 5); \
10378
36
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10379
36
    return S; \
10380
36
  case 270: \
10381
19
    tmp = fieldname(insn, 6, 5); \
10382
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10383
19
    tmp = fieldname(insn, 6, 5); \
10384
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10385
19
    tmp = fieldname(insn, 11, 5); \
10386
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10387
19
    tmp = fieldname(insn, 16, 5); \
10388
19
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10389
19
    return S; \
10390
19
  case 271: \
10391
15
    tmp = fieldname(insn, 6, 5); \
10392
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10393
15
    tmp = fieldname(insn, 6, 5); \
10394
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10395
15
    tmp = fieldname(insn, 11, 5); \
10396
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10397
15
    tmp = fieldname(insn, 16, 5); \
10398
15
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10399
15
    return S; \
10400
21
  case 272: \
10401
21
    tmp = fieldname(insn, 6, 5); \
10402
21
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10403
21
    tmp = fieldname(insn, 11, 5); \
10404
21
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10405
21
    tmp = fieldname(insn, 16, 5); \
10406
21
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10407
21
    return S; \
10408
23
  case 273: \
10409
23
    tmp = fieldname(insn, 6, 5); \
10410
23
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10411
23
    tmp = fieldname(insn, 11, 5); \
10412
23
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10413
23
    tmp = fieldname(insn, 16, 5); \
10414
23
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10415
23
    return S; \
10416
37
  case 274: \
10417
37
    tmp = fieldname(insn, 6, 5); \
10418
37
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10419
37
    tmp = fieldname(insn, 11, 5); \
10420
37
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10421
37
    tmp = fieldname(insn, 16, 5); \
10422
37
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10423
37
    return S; \
10424
39
  case 275: \
10425
39
    tmp = fieldname(insn, 6, 5); \
10426
39
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10427
39
    tmp = fieldname(insn, 6, 5); \
10428
39
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10429
39
    tmp = fieldname(insn, 11, 5); \
10430
39
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10431
39
    tmp = fieldname(insn, 16, 5); \
10432
39
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10433
39
    return S; \
10434
39
  case 276: \
10435
4
    tmp = fieldname(insn, 6, 5); \
10436
4
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10437
4
    tmp = fieldname(insn, 6, 5); \
10438
4
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10439
4
    tmp = fieldname(insn, 11, 5); \
10440
4
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10441
4
    tmp = fieldname(insn, 16, 5); \
10442
4
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10443
4
    return S; \
10444
38
  case 277: \
10445
38
    tmp = fieldname(insn, 6, 5); \
10446
38
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10447
38
    tmp = fieldname(insn, 6, 5); \
10448
38
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10449
38
    tmp = fieldname(insn, 11, 5); \
10450
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10451
38
    tmp = fieldname(insn, 16, 5); \
10452
38
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10453
38
    return S; \
10454
38
  case 278: \
10455
18
    tmp = fieldname(insn, 6, 5); \
10456
18
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10457
18
    tmp = fieldname(insn, 6, 5); \
10458
18
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10459
18
    tmp = fieldname(insn, 11, 5); \
10460
18
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10461
18
    tmp = fieldname(insn, 16, 5); \
10462
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10463
18
    return S; \
10464
26
  case 279: \
10465
26
    tmp = fieldname(insn, 6, 5); \
10466
26
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10467
26
    tmp = fieldname(insn, 6, 5); \
10468
26
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10469
26
    tmp = fieldname(insn, 11, 5); \
10470
26
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10471
26
    tmp = fieldname(insn, 16, 5); \
10472
26
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10473
26
    return S; \
10474
63
  case 280: \
10475
63
    tmp = fieldname(insn, 6, 5); \
10476
63
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10477
63
    tmp = fieldname(insn, 6, 5); \
10478
63
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10479
63
    tmp = fieldname(insn, 11, 5); \
10480
63
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10481
63
    tmp = fieldname(insn, 16, 5); \
10482
63
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10483
63
    return S; \
10484
63
  case 281: \
10485
10
    tmp = fieldname(insn, 6, 5); \
10486
10
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10487
10
    tmp = fieldname(insn, 6, 5); \
10488
10
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10489
10
    tmp = fieldname(insn, 11, 5); \
10490
10
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10491
10
    tmp = fieldname(insn, 16, 5); \
10492
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10493
10
    return S; \
10494
10
  case 282: \
10495
7
    tmp = fieldname(insn, 6, 5); \
10496
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10497
7
    tmp = fieldname(insn, 11, 5); \
10498
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10499
7
    tmp = fieldname(insn, 16, 5); \
10500
7
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10501
7
    return S; \
10502
63
  case 283: \
10503
63
    tmp = fieldname(insn, 6, 5); \
10504
63
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10505
63
    tmp = fieldname(insn, 11, 5); \
10506
63
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10507
63
    tmp = fieldname(insn, 16, 5); \
10508
63
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10509
63
    return S; \
10510
63
  case 284: \
10511
18
    tmp = fieldname(insn, 6, 5); \
10512
18
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10513
18
    tmp = fieldname(insn, 11, 5); \
10514
18
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10515
18
    tmp = fieldname(insn, 16, 5); \
10516
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10517
18
    return S; \
10518
60
  case 285: \
10519
60
    tmp = fieldname(insn, 6, 5); \
10520
60
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10521
60
    tmp = fieldname(insn, 11, 5); \
10522
60
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10523
60
    tmp = fieldname(insn, 16, 5); \
10524
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10525
60
    return S; \
10526
60
  case 286: \
10527
23
    tmp = fieldname(insn, 6, 5); \
10528
23
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10529
23
    tmp = fieldname(insn, 6, 5); \
10530
23
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10531
23
    tmp = fieldname(insn, 11, 5); \
10532
23
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10533
23
    tmp = fieldname(insn, 16, 4); \
10534
23
    MCOperand_CreateImm0(MI, tmp); \
10535
23
    return S; \
10536
56
  case 287: \
10537
56
    tmp = fieldname(insn, 6, 5); \
10538
56
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10539
56
    tmp = fieldname(insn, 6, 5); \
10540
56
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10541
56
    tmp = fieldname(insn, 11, 5); \
10542
56
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10543
56
    tmp = fieldname(insn, 16, 3); \
10544
56
    MCOperand_CreateImm0(MI, tmp); \
10545
56
    return S; \
10546
56
  case 288: \
10547
46
    tmp = fieldname(insn, 6, 5); \
10548
46
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10549
46
    tmp = fieldname(insn, 6, 5); \
10550
46
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10551
46
    tmp = fieldname(insn, 11, 5); \
10552
46
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10553
46
    tmp = fieldname(insn, 16, 2); \
10554
46
    MCOperand_CreateImm0(MI, tmp); \
10555
46
    return S; \
10556
46
  case 289: \
10557
3
    tmp = fieldname(insn, 6, 5); \
10558
3
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10559
3
    tmp = fieldname(insn, 6, 5); \
10560
3
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10561
3
    tmp = fieldname(insn, 11, 5); \
10562
3
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10563
3
    tmp = fieldname(insn, 16, 1); \
10564
3
    MCOperand_CreateImm0(MI, tmp); \
10565
3
    return S; \
10566
61
  case 290: \
10567
61
    tmp = fieldname(insn, 6, 5); \
10568
61
    if (!Check(&S, DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10569
61
    tmp = fieldname(insn, 11, 5); \
10570
60
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10571
60
    return S; \
10572
60
  case 291: \
10573
27
    tmp = fieldname(insn, 6, 5); \
10574
27
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10575
27
    tmp = fieldname(insn, 11, 5); \
10576
27
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10577
27
    tmp = fieldname(insn, 16, 4); \
10578
27
    MCOperand_CreateImm0(MI, tmp); \
10579
27
    return S; \
10580
27
  case 292: \
10581
7
    tmp = fieldname(insn, 6, 5); \
10582
7
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10583
7
    tmp = fieldname(insn, 11, 5); \
10584
7
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10585
7
    tmp = fieldname(insn, 16, 3); \
10586
7
    MCOperand_CreateImm0(MI, tmp); \
10587
7
    return S; \
10588
43
  case 293: \
10589
43
    tmp = fieldname(insn, 6, 5); \
10590
43
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10591
43
    tmp = fieldname(insn, 11, 5); \
10592
43
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10593
43
    tmp = fieldname(insn, 16, 2); \
10594
43
    MCOperand_CreateImm0(MI, tmp); \
10595
43
    return S; \
10596
43
  case 294: \
10597
16
    tmp = fieldname(insn, 6, 5); \
10598
16
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10599
16
    tmp = fieldname(insn, 11, 5); \
10600
16
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10601
16
    tmp = fieldname(insn, 16, 1); \
10602
16
    MCOperand_CreateImm0(MI, tmp); \
10603
16
    return S; \
10604
130
  case 295: \
10605
130
    tmp = fieldname(insn, 6, 5); \
10606
130
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10607
130
    tmp = fieldname(insn, 11, 5); \
10608
130
    if (!Check(&S, DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10609
130
    return S; \
10610
130
  case 296: \
10611
34
    tmp = fieldname(insn, 6, 5); \
10612
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10613
34
    tmp = fieldname(insn, 11, 5); \
10614
34
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10615
34
    tmp = fieldname(insn, 16, 4); \
10616
34
    MCOperand_CreateImm0(MI, tmp); \
10617
34
    return S; \
10618
61
  case 297: \
10619
61
    tmp = fieldname(insn, 6, 5); \
10620
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10621
61
    tmp = fieldname(insn, 11, 5); \
10622
61
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10623
61
    tmp = fieldname(insn, 16, 3); \
10624
61
    MCOperand_CreateImm0(MI, tmp); \
10625
61
    return S; \
10626
61
  case 298: \
10627
3
    tmp = fieldname(insn, 6, 5); \
10628
3
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10629
3
    tmp = fieldname(insn, 11, 5); \
10630
3
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10631
3
    tmp = fieldname(insn, 16, 2); \
10632
3
    MCOperand_CreateImm0(MI, tmp); \
10633
3
    return S; \
10634
20
  case 299: \
10635
20
    tmp = fieldname(insn, 6, 5); \
10636
20
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10637
20
    tmp = fieldname(insn, 11, 5); \
10638
20
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10639
20
    tmp = fieldname(insn, 16, 1); \
10640
20
    MCOperand_CreateImm0(MI, tmp); \
10641
20
    return S; \
10642
20
  case 300: \
10643
12
    tmp = fieldname(insn, 6, 5); \
10644
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10645
12
    tmp = fieldname(insn, 11, 5); \
10646
12
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10647
12
    return S; \
10648
12
  case 301: \
10649
7
    tmp = fieldname(insn, 6, 5); \
10650
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10651
7
    tmp = fieldname(insn, 6, 5); \
10652
7
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10653
7
    tmp = fieldname(insn, 11, 5); \
10654
7
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10655
7
    tmp = fieldname(insn, 16, 4); \
10656
7
    MCOperand_CreateImm0(MI, tmp); \
10657
7
    return S; \
10658
18
  case 302: \
10659
18
    tmp = fieldname(insn, 6, 5); \
10660
18
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10661
18
    tmp = fieldname(insn, 6, 5); \
10662
18
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10663
18
    tmp = fieldname(insn, 11, 5); \
10664
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10665
18
    tmp = fieldname(insn, 16, 3); \
10666
18
    MCOperand_CreateImm0(MI, tmp); \
10667
18
    return S; \
10668
47
  case 303: \
10669
47
    tmp = fieldname(insn, 6, 5); \
10670
47
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10671
47
    tmp = fieldname(insn, 6, 5); \
10672
47
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10673
47
    tmp = fieldname(insn, 11, 5); \
10674
47
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10675
47
    tmp = fieldname(insn, 16, 2); \
10676
47
    MCOperand_CreateImm0(MI, tmp); \
10677
47
    return S; \
10678
47
  case 304: \
10679
34
    tmp = fieldname(insn, 6, 5); \
10680
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10681
34
    tmp = fieldname(insn, 6, 5); \
10682
34
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10683
34
    tmp = fieldname(insn, 11, 5); \
10684
34
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10685
34
    tmp = fieldname(insn, 16, 1); \
10686
34
    MCOperand_CreateImm0(MI, tmp); \
10687
34
    return S; \
10688
120
  case 305: \
10689
120
    if (!Check(&S, DecodeINSVE_DF(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10690
120
    return S; \
10691
120
  case 306: \
10692
7
    tmp = fieldname(insn, 6, 5); \
10693
7
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10694
7
    tmp = fieldname(insn, 11, 5); \
10695
7
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10696
7
    tmp = fieldname(insn, 16, 5); \
10697
7
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10698
7
    return S; \
10699
7
  case 307: \
10700
5
    tmp = fieldname(insn, 6, 5); \
10701
5
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10702
5
    tmp = fieldname(insn, 11, 5); \
10703
5
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10704
5
    tmp = fieldname(insn, 16, 5); \
10705
5
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10706
5
    return S; \
10707
67
  case 308: \
10708
67
    tmp = fieldname(insn, 6, 5); \
10709
67
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10710
67
    tmp = fieldname(insn, 11, 5); \
10711
67
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10712
67
    return S; \
10713
67
  case 309: \
10714
47
    tmp = fieldname(insn, 6, 5); \
10715
47
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10716
47
    tmp = fieldname(insn, 11, 5); \
10717
47
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10718
47
    return S; \
10719
47
  case 310: \
10720
30
    tmp = fieldname(insn, 6, 5); \
10721
30
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10722
30
    tmp = fieldname(insn, 11, 5); \
10723
30
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10724
30
    return S; \
10725
41
  case 311: \
10726
41
    tmp = fieldname(insn, 6, 5); \
10727
41
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10728
41
    tmp = fieldname(insn, 11, 5); \
10729
41
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10730
41
    return S; \
10731
41
  case 312: \
10732
10
    tmp = fieldname(insn, 6, 5); \
10733
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10734
10
    tmp = fieldname(insn, 11, 5); \
10735
10
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10736
10
    return S; \
10737
14
  case 313: \
10738
14
    tmp = fieldname(insn, 6, 5); \
10739
14
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10740
14
    tmp = fieldname(insn, 11, 5); \
10741
14
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10742
14
    return S; \
10743
14
  case 314: \
10744
7
    tmp = fieldname(insn, 6, 5); \
10745
7
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10746
7
    tmp = fieldname(insn, 11, 5); \
10747
7
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10748
7
    return S; \
10749
7
  case 315: \
10750
6
    tmp = fieldname(insn, 6, 5); \
10751
6
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10752
6
    tmp = fieldname(insn, 11, 5); \
10753
6
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10754
6
    return S; \
10755
8
  case 316: \
10756
8
    tmp = fieldname(insn, 6, 5); \
10757
8
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10758
8
    tmp = fieldname(insn, 11, 5); \
10759
8
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10760
8
    return S; \
10761
623
  case 317: \
10762
623
    if (!Check(&S, DecodeMSA128Mem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10763
623
    return S; \
10764
623
  case 318: \
10765
215
    tmp = fieldname(insn, 16, 5); \
10766
215
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10767
215
    tmp = fieldname(insn, 21, 5); \
10768
215
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10769
215
    tmp = fieldname(insn, 6, 5); \
10770
215
    MCOperand_CreateImm0(MI, tmp); \
10771
215
    tmp = fieldname(insn, 11, 5); \
10772
215
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10773
215
    return S; \
10774
215
  case 319: \
10775
38
    tmp = fieldname(insn, 16, 5); \
10776
38
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10777
38
    tmp = fieldname(insn, 21, 5); \
10778
38
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10779
38
    tmp = fieldname(insn, 6, 5); \
10780
38
    MCOperand_CreateImm0(MI, tmp); \
10781
38
    tmp = fieldname(insn, 11, 5); \
10782
38
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10783
38
    tmp = fieldname(insn, 16, 5); \
10784
38
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10785
38
    return S; \
10786
68
  case 320: \
10787
68
    tmp = fieldname(insn, 21, 5); \
10788
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10789
68
    tmp = fieldname(insn, 11, 5); \
10790
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10791
68
    tmp = fieldname(insn, 16, 5); \
10792
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10793
68
    return S; \
10794
68
  case 321: \
10795
34
    tmp = fieldname(insn, 11, 5); \
10796
34
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10797
34
    tmp = fieldname(insn, 21, 5); \
10798
34
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10799
34
    tmp = fieldname(insn, 16, 5); \
10800
34
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10801
34
    return S; \
10802
34
  case 322: \
10803
12
    tmp = fieldname(insn, 16, 5); \
10804
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10805
12
    tmp = fieldname(insn, 16, 5); \
10806
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10807
12
    tmp = fieldname(insn, 21, 5); \
10808
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10809
12
    return S; \
10810
16
  case 323: \
10811
16
    tmp = fieldname(insn, 11, 5); \
10812
16
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10813
16
    tmp = fieldname(insn, 21, 5); \
10814
16
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10815
16
    tmp = fieldname(insn, 16, 5); \
10816
16
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10817
16
    return S; \
10818
27
  case 324: \
10819
27
    tmp = fieldname(insn, 11, 5); \
10820
27
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10821
27
    tmp = fieldname(insn, 21, 5); \
10822
27
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10823
27
    return S; \
10824
27
  case 325: \
10825
11
    tmp = fieldname(insn, 11, 5); \
10826
11
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10827
11
    tmp = fieldname(insn, 21, 5); \
10828
11
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10829
11
    tmp = fieldname(insn, 16, 5); \
10830
11
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10831
11
    return S; \
10832
19
  case 326: \
10833
19
    tmp = fieldname(insn, 11, 5); \
10834
19
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10835
19
    tmp = fieldname(insn, 21, 5); \
10836
19
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10837
19
    tmp = fieldname(insn, 16, 5); \
10838
19
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10839
19
    return S; \
10840
66
  case 327: \
10841
66
    tmp = fieldname(insn, 16, 5); \
10842
66
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10843
66
    tmp = fieldname(insn, 21, 5); \
10844
66
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10845
66
    tmp = fieldname(insn, 11, 5); \
10846
66
    MCOperand_CreateImm0(MI, tmp); \
10847
66
    tmp = fieldname(insn, 16, 5); \
10848
66
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10849
66
    return S; \
10850
66
  case 328: \
10851
64
    tmp = fieldname(insn, 11, 5); \
10852
64
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10853
64
    tmp = fieldname(insn, 16, 5); \
10854
64
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10855
64
    return S; \
10856
64
  case 329: \
10857
11
    tmp = fieldname(insn, 11, 5); \
10858
11
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10859
11
    tmp = fieldname(insn, 16, 10); \
10860
11
    MCOperand_CreateImm0(MI, tmp); \
10861
11
    return S; \
10862
11
  case 330: \
10863
9
    tmp = fieldname(insn, 11, 5); \
10864
9
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10865
9
    tmp = fieldname(insn, 16, 5); \
10866
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10867
9
    return S; \
10868
51
  case 331: \
10869
51
    tmp = fieldname(insn, 11, 5); \
10870
51
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10871
51
    tmp = fieldname(insn, 16, 5); \
10872
51
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10873
51
    return S; \
10874
51
  case 332: \
10875
33
    tmp = fieldname(insn, 11, 5); \
10876
33
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10877
33
    tmp = fieldname(insn, 16, 5); \
10878
33
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10879
33
    return S; \
10880
35
  case 333: \
10881
35
    tmp = fieldname(insn, 11, 5); \
10882
35
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10883
35
    tmp = fieldname(insn, 16, 5); \
10884
35
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10885
35
    tmp = fieldname(insn, 21, 5); \
10886
35
    MCOperand_CreateImm0(MI, tmp); \
10887
35
    return S; \
10888
61
  case 334: \
10889
61
    tmp = fieldname(insn, 11, 5); \
10890
61
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10891
61
    tmp = fieldname(insn, 16, 5); \
10892
61
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10893
61
    tmp = fieldname(insn, 21, 5); \
10894
61
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10895
61
    return S; \
10896
177
  case 335: \
10897
177
    tmp = fieldname(insn, 11, 5); \
10898
177
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10899
177
    tmp = fieldname(insn, 16, 5); \
10900
177
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10901
177
    tmp = fieldname(insn, 21, 5); \
10902
177
    MCOperand_CreateImm0(MI, tmp); \
10903
177
    return S; \
10904
177
  case 336: \
10905
72
    if (!Check(&S, DecodeMemEVA(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10906
72
    return S; \
10907
72
  case 337: \
10908
44
    if (!Check(&S, DecodeCacheeOp_CacheOpR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10909
44
    return S; \
10910
44
  case 338: \
10911
12
    tmp = fieldname(insn, 16, 5); \
10912
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10913
12
    tmp = fieldname(insn, 21, 5); \
10914
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10915
12
    tmp = fieldname(insn, 11, 5); \
10916
12
    MCOperand_CreateImm0(MI, tmp); \
10917
12
    tmp = fieldname(insn, 16, 5); \
10918
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10919
12
    return S; \
10920
68
  case 339: \
10921
68
    tmp = fieldname(insn, 16, 5); \
10922
68
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10923
68
    tmp = fieldname(insn, 11, 2); \
10924
68
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10925
68
    tmp = fieldname(insn, 21, 5); \
10926
68
    MCOperand_CreateImm0(MI, tmp); \
10927
68
    return S; \
10928
68
  case 340: \
10929
18
    tmp = fieldname(insn, 16, 5); \
10930
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10931
18
    tmp = fieldname(insn, 11, 2); \
10932
18
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10933
18
    tmp = fieldname(insn, 21, 5); \
10934
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10935
18
    return S; \
10936
18
  case 341: \
10937
18
    tmp = fieldname(insn, 11, 5); \
10938
18
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10939
18
    tmp = fieldname(insn, 16, 10); \
10940
18
    MCOperand_CreateImm0(MI, tmp); \
10941
18
    return S; \
10942
18
  case 342: \
10943
9
    tmp = fieldname(insn, 21, 5); \
10944
9
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10945
9
    tmp = fieldname(insn, 11, 10); \
10946
9
    MCOperand_CreateImm0(MI, tmp); \
10947
9
    return S; \
10948
9
  case 343: \
10949
7
    tmp = fieldname(insn, 11, 2); \
10950
7
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10951
7
    tmp = fieldname(insn, 20, 6); \
10952
7
    if (!Check(&S, DecodeSImmWithOffsetAndScale_6_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10953
7
    tmp = fieldname(insn, 11, 2); \
10954
7
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10955
7
    return S; \
10956
12
  case 344: \
10957
12
    tmp = fieldname(insn, 11, 2); \
10958
12
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10959
12
    tmp = fieldname(insn, 21, 5); \
10960
12
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10961
12
    tmp = fieldname(insn, 11, 2); \
10962
12
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10963
12
    return S; \
10964
12
  case 345: \
10965
10
    tmp = fieldname(insn, 16, 5); \
10966
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10967
10
    tmp = fieldname(insn, 11, 5); \
10968
10
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10969
10
    tmp = fieldname(insn, 6, 3); \
10970
7
    MCOperand_CreateImm0(MI, tmp); \
10971
7
    return S; \
10972
172
  case 346: \
10973
172
    if (!Check(&S, DecodeCacheOp(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10974
172
    return S; \
10975
816
  case 347: \
10976
816
    if (!Check(&S, DecodeFMem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10977
816
    return S; \
10978
1.11k
  case 348: \
10979
1.11k
    if (!Check(&S, DecodeFMem2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10980
1.11k
    return S; \
10981
1.11k
  case 349: \
10982
0
    if (!Check(&S, DecodeDAHIDATI(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10983
0
    return S; \
10984
11
  case 350: \
10985
11
    tmp = fieldname(insn, 0, 16); \
10986
11
    MCOperand_CreateImm0(MI, tmp); \
10987
11
    return S; \
10988
543
  case 351: \
10989
543
    if (!Check(&S, DecodeBlezGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10990
543
    return S; \
10991
543
  case 352: \
10992
398
    if (!Check(&S, DecodeBgtzGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10993
398
    return S; \
10994
1.57k
  case 353: \
10995
1.57k
    if (!Check(&S, DecodeAddiGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10996
1.57k
    return S; \
10997
1.57k
  case 354: \
10998
33
    tmp = fieldname(insn, 16, 5); \
10999
33
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11000
33
    tmp = fieldname(insn, 0, 16); \
11001
33
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11002
33
    return S; \
11003
63
  case 355: \
11004
63
    tmp = fieldname(insn, 6, 5); \
11005
63
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11006
63
    tmp = fieldname(insn, 6, 5); \
11007
63
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11008
63
    tmp = fieldname(insn, 11, 5); \
11009
63
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11010
63
    tmp = fieldname(insn, 16, 5); \
11011
63
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11012
63
    return S; \
11013
63
  case 356: \
11014
32
    tmp = fieldname(insn, 6, 5); \
11015
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11016
32
    tmp = fieldname(insn, 6, 5); \
11017
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11018
32
    tmp = fieldname(insn, 11, 5); \
11019
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11020
32
    tmp = fieldname(insn, 16, 5); \
11021
32
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11022
32
    return S; \
11023
36
  case 357: \
11024
36
    tmp = fieldname(insn, 6, 5); \
11025
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11026
36
    tmp = fieldname(insn, 6, 5); \
11027
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11028
36
    tmp = fieldname(insn, 11, 5); \
11029
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11030
36
    tmp = fieldname(insn, 16, 5); \
11031
36
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11032
36
    return S; \
11033
36
  case 358: \
11034
3
    tmp = fieldname(insn, 6, 5); \
11035
3
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11036
3
    tmp = fieldname(insn, 11, 5); \
11037
3
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11038
3
    tmp = fieldname(insn, 16, 5); \
11039
3
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11040
3
    return S; \
11041
13
  case 359: \
11042
13
    tmp = fieldname(insn, 6, 5); \
11043
13
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11044
13
    tmp = fieldname(insn, 11, 5); \
11045
13
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11046
13
    tmp = fieldname(insn, 16, 5); \
11047
13
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11048
13
    return S; \
11049
26
  case 360: \
11050
26
    tmp = fieldname(insn, 6, 5); \
11051
26
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11052
26
    tmp = fieldname(insn, 11, 5); \
11053
26
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11054
26
    tmp = fieldname(insn, 16, 5); \
11055
26
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11056
26
    return S; \
11057
26
  case 361: \
11058
25
    tmp = fieldname(insn, 16, 5); \
11059
25
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11060
25
    tmp = fieldname(insn, 0, 16); \
11061
25
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11062
25
    return S; \
11063
97
  case 362: \
11064
97
    if (!Check(&S, DecodeFMemCop2R6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11065
97
    return S; \
11066
117
  case 363: \
11067
117
    if (!Check(&S, DecodeBlezlGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11068
117
    return S; \
11069
308
  case 364: \
11070
308
    if (!Check(&S, DecodeBgtzlGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11071
308
    return S; \
11072
317
  case 365: \
11073
317
    if (!Check(&S, DecodeDaddiGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11074
317
    return S; \
11075
317
  case 366: \
11076
0
    tmp = fieldname(insn, 16, 5); \
11077
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11078
0
    tmp = fieldname(insn, 21, 5); \
11079
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11080
0
    tmp = fieldname(insn, 0, 16); \
11081
0
    MCOperand_CreateImm0(MI, tmp); \
11082
0
    return S; \
11083
8
  case 367: \
11084
8
    if (!Check(&S, DecodeCRC(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11085
8
    return S; \
11086
8
  case 368: \
11087
6
    tmp = fieldname(insn, 11, 5); \
11088
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11089
6
    tmp = fieldname(insn, 21, 5); \
11090
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11091
6
    tmp = fieldname(insn, 16, 5); \
11092
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11093
6
    tmp = fieldname(insn, 6, 2); \
11094
6
    MCOperand_CreateImm0(MI, tmp); \
11095
6
    return S; \
11096
6
  case 369: \
11097
0
    tmp = fieldname(insn, 11, 5); \
11098
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11099
0
    tmp = fieldname(insn, 16, 5); \
11100
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11101
0
    return S; \
11102
0
  case 370: \
11103
0
    tmp = fieldname(insn, 11, 5); \
11104
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11105
0
    tmp = fieldname(insn, 21, 5); \
11106
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11107
0
    tmp = fieldname(insn, 16, 5); \
11108
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11109
0
    tmp = fieldname(insn, 6, 3); \
11110
0
    MCOperand_CreateImm0(MI, tmp); \
11111
0
    return S; \
11112
88
  case 371: \
11113
88
    if (!Check(&S, DecodeSpecial3LlSc(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11114
88
    return S; \
11115
88
  case 372: \
11116
14
    tmp = fieldname(insn, 21, 5); \
11117
14
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11118
14
    tmp = fieldname(insn, 8, 2); \
11119
14
    MCOperand_CreateImm0(MI, tmp); \
11120
14
    return S; \
11121
254
  case 373: \
11122
254
    tmp = fieldname(insn, 0, 26); \
11123
254
    if (!Check(&S, DecodeBranchTarget26(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11124
254
    return S; \
11125
270
  case 374: \
11126
270
    tmp = fieldname(insn, 21, 5); \
11127
270
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11128
270
    tmp = fieldname(insn, 0, 21); \
11129
270
    if (!Check(&S, DecodeBranchTarget21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11130
270
    return S; \
11131
270
  case 375: \
11132
0
    tmp = fieldname(insn, 21, 5); \
11133
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11134
0
    tmp = fieldname(insn, 0, 18); \
11135
0
    if (!Check(&S, DecodeSimm18Lsl3(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11136
0
    return S; \
11137
0
  case 376: \
11138
0
    tmp = fieldname(insn, 21, 5); \
11139
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11140
0
    tmp = fieldname(insn, 0, 21); \
11141
0
    if (!Check(&S, DecodeBranchTarget21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11142
0
    return S; \
11143
14
  case 377: \
11144
14
    tmp = fieldname(insn, 11, 5); \
11145
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11146
14
    tmp = fieldname(insn, 16, 5); \
11147
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11148
14
    tmp = fieldname(insn, 21, 5); \
11149
14
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11150
14
    return S; \
11151
65
  case 378: \
11152
65
    tmp = fieldname(insn, 21, 5); \
11153
65
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11154
65
    tmp = fieldname(insn, 16, 5); \
11155
65
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11156
65
    return S; \
11157
203
  case 379: \
11158
203
    tmp = fieldname(insn, 11, 5); \
11159
203
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11160
203
    tmp = fieldname(insn, 16, 5); \
11161
203
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11162
203
    tmp = fieldname(insn, 6, 5); \
11163
203
    MCOperand_CreateImm0(MI, tmp); \
11164
203
    return S; \
11165
203
  case 380: \
11166
55
    tmp = fieldname(insn, 16, 5); \
11167
55
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11168
55
    tmp = fieldname(insn, 11, 5); \
11169
55
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11170
55
    tmp = fieldname(insn, 0, 3); \
11171
55
    MCOperand_CreateImm0(MI, tmp); \
11172
55
    return S; \
11173
55
  case 381: \
11174
3
    tmp = fieldname(insn, 11, 5); \
11175
3
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11176
3
    tmp = fieldname(insn, 16, 5); \
11177
3
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11178
3
    tmp = fieldname(insn, 0, 3); \
11179
3
    MCOperand_CreateImm0(MI, tmp); \
11180
3
    return S; \
11181
7
  case 382: \
11182
7
    tmp = fieldname(insn, 16, 5); \
11183
7
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11184
7
    tmp = fieldname(insn, 11, 5); \
11185
7
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11186
7
    tmp = fieldname(insn, 0, 3); \
11187
7
    MCOperand_CreateImm0(MI, tmp); \
11188
7
    return S; \
11189
31
  case 383: \
11190
31
    tmp = fieldname(insn, 11, 5); \
11191
31
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11192
31
    tmp = fieldname(insn, 16, 5); \
11193
31
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11194
31
    tmp = fieldname(insn, 0, 3); \
11195
31
    MCOperand_CreateImm0(MI, tmp); \
11196
31
    return S; \
11197
31
  case 384: \
11198
0
    tmp = fieldname(insn, 13, 3); \
11199
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11200
0
    tmp = fieldname(insn, 16, 5); \
11201
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11202
0
    tmp = fieldname(insn, 21, 5); \
11203
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11204
0
    return S; \
11205
1.96k
  case 385: \
11206
1.96k
    tmp = fieldname(insn, 16, 5); \
11207
1.96k
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11208
1.96k
    tmp = fieldname(insn, 21, 5); \
11209
1.96k
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11210
1.96k
    tmp = fieldname(insn, 0, 16); \
11211
1.96k
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11212
1.96k
    return S; \
11213
1.96k
  case 386: \
11214
14
    tmp = 0x0; \
11215
14
    tmp |= fieldname(insn, 11, 5) << 0; \
11216
14
    tmp |= fieldname(insn, 16, 5) << 0; \
11217
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11218
14
    tmp = fieldname(insn, 21, 5); \
11219
14
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11220
14
    return S; \
11221
14
  case 387: \
11222
0
    if (!Check(&S, DecodeDEXT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11223
0
    return S; \
11224
0
  case 388: \
11225
0
    if (!Check(&S, DecodeDINS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11226
0
    return S; \
11227
52
  case 389: \
11228
52
    tmp = fieldname(insn, 16, 5); \
11229
52
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11230
52
    tmp = fieldname(insn, 11, 5); \
11231
52
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11232
52
    return S; \
11233
52
  case 390: \
11234
6
    tmp = fieldname(insn, 11, 5); \
11235
6
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11236
6
    tmp = fieldname(insn, 16, 5); \
11237
6
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11238
6
    return S; \
11239
16
  case 391: \
11240
16
    tmp = fieldname(insn, 11, 5); \
11241
16
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11242
16
    tmp = fieldname(insn, 11, 5); \
11243
16
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11244
16
    tmp = fieldname(insn, 16, 5); \
11245
16
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11246
16
    return S; \
11247
38
  case 392: \
11248
38
    tmp = fieldname(insn, 6, 5); \
11249
38
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11250
38
    tmp = fieldname(insn, 11, 5); \
11251
38
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11252
38
    return S; \
11253
63
  case 393: \
11254
63
    tmp = fieldname(insn, 6, 5); \
11255
63
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11256
63
    tmp = fieldname(insn, 11, 5); \
11257
63
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11258
63
    tmp = fieldname(insn, 18, 3); \
11259
63
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11260
63
    tmp = fieldname(insn, 6, 5); \
11261
63
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11262
63
    return S; \
11263
63
  case 394: \
11264
10
    tmp = fieldname(insn, 6, 5); \
11265
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11266
10
    tmp = fieldname(insn, 11, 5); \
11267
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11268
10
    tmp = fieldname(insn, 16, 5); \
11269
10
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11270
10
    tmp = fieldname(insn, 6, 5); \
11271
10
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11272
10
    return S; \
11273
10
  case 395: \
11274
0
    tmp = fieldname(insn, 6, 5); \
11275
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11276
0
    tmp = fieldname(insn, 11, 5); \
11277
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11278
0
    tmp = fieldname(insn, 16, 5); \
11279
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11280
0
    return S; \
11281
263
  case 396: \
11282
263
    tmp = fieldname(insn, 8, 3); \
11283
263
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11284
263
    tmp = fieldname(insn, 11, 5); \
11285
263
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11286
263
    tmp = fieldname(insn, 16, 5); \
11287
263
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11288
263
    return S; \
11289
263
  case 397: \
11290
28
    tmp = fieldname(insn, 6, 5); \
11291
28
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11292
28
    tmp = fieldname(insn, 21, 5); \
11293
28
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11294
28
    tmp = fieldname(insn, 16, 5); \
11295
28
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11296
28
    return S; \
11297
70
  case 398: \
11298
70
    tmp = fieldname(insn, 11, 5); \
11299
70
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11300
70
    tmp = fieldname(insn, 21, 5); \
11301
70
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11302
70
    tmp = fieldname(insn, 16, 5); \
11303
70
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11304
70
    return S; \
11305
70
  case 399: \
11306
47
    tmp = fieldname(insn, 6, 5); \
11307
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11308
47
    tmp = fieldname(insn, 21, 5); \
11309
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11310
47
    tmp = fieldname(insn, 11, 5); \
11311
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11312
47
    tmp = fieldname(insn, 16, 5); \
11313
47
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11314
47
    return S; \
11315
47
  case 400: \
11316
0
    tmp = fieldname(insn, 0, 2); \
11317
0
    MCOperand_CreateImm0(MI, tmp); \
11318
0
    return S; \
11319
47
  case 401: \
11320
0
    tmp = fieldname(insn, 0, 3); \
11321
0
    MCOperand_CreateImm0(MI, tmp); \
11322
0
    return S; \
11323
47
  case 402: \
11324
0
    tmp = fieldname(insn, 5, 5); \
11325
0
    if (!Check(&S, DecodeGPRNM32NZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11326
0
    tmp = fieldname(insn, 0, 5); \
11327
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11328
0
    return S; \
11329
0
  case 403: \
11330
0
    tmp = fieldname(insn, 7, 3); \
11331
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11332
0
    tmp = fieldname(insn, 0, 7) << 2; \
11333
0
    if (!Check(&S, DecodeMemNM_6_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11334
0
    return S; \
11335
0
  case 404: \
11336
0
    tmp = 0x0; \
11337
0
    tmp |= fieldname(insn, 0, 1) << 10; \
11338
0
    tmp |= fieldname(insn, 1, 9) << 1; \
11339
0
    if (!Check(&S, DecodeBranchTargetNM_10(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11340
0
    return S; \
11341
0
  case 405: \
11342
0
    tmp = fieldname(insn, 4, 4) << 4; \
11343
0
    MCOperand_CreateImm0(MI, tmp); \
11344
0
    tmp = 0x0; \
11345
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11346
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11347
0
    if (!Check(&S, DecodeNMRegList16Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11348
0
    return S; \
11349
0
  case 406: \
11350
0
    tmp = fieldname(insn, 7, 3); \
11351
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11352
0
    tmp = fieldname(insn, 4, 3); \
11353
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11354
0
    tmp = fieldname(insn, 0, 3); \
11355
0
    if (!Check(&S, DecodeUImm3Shift(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11356
0
    return S; \
11357
0
  case 407: \
11358
0
    tmp = fieldname(insn, 5, 5); \
11359
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11360
0
    tmp = fieldname(insn, 0, 5) << 2; \
11361
0
    if (!Check(&S, DecodeMemNM_7_0_Mips_GPRNMSPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11362
0
    return S; \
11363
0
  case 408: \
11364
0
    tmp = 0x0; \
11365
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11366
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11367
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11368
0
    tmp = 0x0; \
11369
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11370
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11371
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11372
0
    return S; \
11373
0
  case 409: \
11374
0
    tmp = fieldname(insn, 7, 3); \
11375
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11376
0
    tmp = fieldname(insn, 4, 3); \
11377
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11378
0
    return S; \
11379
0
  case 410: \
11380
0
    tmp = fieldname(insn, 4, 3); \
11381
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11382
0
    tmp = fieldname(insn, 7, 3); \
11383
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11384
0
    return S; \
11385
0
  case 411: \
11386
0
    tmp = fieldname(insn, 1, 3); \
11387
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11388
0
    tmp = 0x0; \
11389
0
    tmp |= fieldname(insn, 4, 3) << 0; \
11390
0
    tmp |= fieldname(insn, 7, 3) << 5; \
11391
0
    if (!Check(&S, DecodeMemNMRX_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11392
0
    return S; \
11393
0
  case 412: \
11394
0
    tmp = fieldname(insn, 7, 3); \
11395
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11396
0
    tmp = fieldname(insn, 0, 7) << 2; \
11397
0
    if (!Check(&S, DecodeMemNM_9_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11398
0
    return S; \
11399
0
  case 413: \
11400
0
    tmp = fieldname(insn, 7, 3); \
11401
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11402
0
    tmp = 0x0; \
11403
0
    tmp |= fieldname(insn, 0, 2) << 0; \
11404
0
    tmp |= fieldname(insn, 4, 3) << 2; \
11405
0
    if (!Check(&S, DecodeMemNM_2_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11406
0
    return S; \
11407
0
  case 414: \
11408
0
    tmp = fieldname(insn, 7, 3); \
11409
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11410
0
    tmp = 0x0; \
11411
0
    tmp |= fieldname(insn, 0, 2) << 0; \
11412
0
    tmp |= fieldname(insn, 4, 3) << 2; \
11413
0
    if (!Check(&S, DecodeMemNM_2_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11414
0
    return S; \
11415
0
  case 415: \
11416
0
    tmp = fieldname(insn, 7, 3); \
11417
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11418
0
    tmp = fieldname(insn, 0, 6) << 2; \
11419
0
    if (!Check(&S, DecodeUImmWithReg_8_0_1_Mips_SP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11420
0
    return S; \
11421
0
  case 416: \
11422
0
    tmp = 0x0; \
11423
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11424
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11425
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11426
0
    tmp = 0x0; \
11427
0
    tmp |= fieldname(insn, 0, 3) << 4; \
11428
0
    tmp |= fieldname(insn, 3, 1) << 3; \
11429
0
    tmp |= fieldname(insn, 4, 1) << 8; \
11430
0
    tmp |= fieldname(insn, 8, 1) << 2; \
11431
0
    if (!Check(&S, DecodeMemNM4x4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11432
0
    return S; \
11433
0
  case 417: \
11434
0
    tmp = fieldname(insn, 7, 3); \
11435
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11436
0
    tmp = 0x0; \
11437
0
    tmp |= fieldname(insn, 1, 2) << 1; \
11438
0
    tmp |= fieldname(insn, 4, 3) << 3; \
11439
0
    if (!Check(&S, DecodeMemNM_3_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11440
0
    return S; \
11441
0
  case 418: \
11442
0
    tmp = fieldname(insn, 7, 3); \
11443
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11444
0
    tmp = 0x0; \
11445
0
    tmp |= fieldname(insn, 1, 2) << 1; \
11446
0
    tmp |= fieldname(insn, 4, 3) << 3; \
11447
0
    if (!Check(&S, DecodeMemNM_3_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11448
0
    return S; \
11449
0
  case 419: \
11450
0
    tmp = fieldname(insn, 7, 3); \
11451
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11452
0
    tmp = fieldname(insn, 4, 3); \
11453
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11454
0
    tmp = fieldname(insn, 0, 3) << 2; \
11455
0
    MCOperand_CreateImm0(MI, tmp); \
11456
0
    return S; \
11457
0
  case 420: \
11458
0
    tmp = fieldname(insn, 5, 5); \
11459
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11460
0
    tmp = fieldname(insn, 5, 5); \
11461
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11462
0
    tmp = 0x0; \
11463
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11464
0
    tmp |= fieldname(insn, 4, 1) << 3; \
11465
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_4_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11466
0
    return S; \
11467
0
  case 421: \
11468
0
    tmp = fieldname(insn, 7, 3); \
11469
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11470
0
    tmp = fieldname(insn, 0, 7) << 2; \
11471
0
    if (!Check(&S, DecodeMemNM_6_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11472
0
    return S; \
11473
0
  case 422: \
11474
0
    tmp = fieldname(insn, 7, 3); \
11475
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11476
0
    tmp = 0x0; \
11477
0
    tmp |= fieldname(insn, 0, 1) << 7; \
11478
0
    tmp |= fieldname(insn, 1, 6) << 1; \
11479
0
    if (!Check(&S, DecodeBranchTargetNM_7(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11480
0
    return S; \
11481
0
  case 423: \
11482
0
    tmp = fieldname(insn, 1, 3); \
11483
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11484
0
    tmp = fieldname(insn, 4, 3); \
11485
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11486
0
    tmp = fieldname(insn, 7, 3); \
11487
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11488
0
    return S; \
11489
0
  case 424: \
11490
0
    tmp = 0x0; \
11491
0
    tmp |= fieldname(insn, 3, 1) << 1; \
11492
0
    tmp |= fieldname(insn, 8, 1) << 0; \
11493
0
    if (!Check(&S, DecodeGPRNM2R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11494
0
    tmp = 0x0; \
11495
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11496
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11497
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11498
0
    tmp = 0x0; \
11499
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11500
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11501
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11502
0
    return S; \
11503
0
  case 425: \
11504
0
    tmp = fieldname(insn, 7, 3); \
11505
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11506
0
    tmp = fieldname(insn, 0, 7); \
11507
0
    if (!Check(&S, DecodeImmM1To126(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11508
0
    return S; \
11509
0
  case 426: \
11510
0
    tmp = fieldname(insn, 7, 3); \
11511
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11512
0
    tmp = fieldname(insn, 0, 7) << 2; \
11513
0
    if (!Check(&S, DecodeMemNM_9_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11514
0
    return S; \
11515
0
  case 427: \
11516
0
    tmp = fieldname(insn, 5, 5); \
11517
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11518
0
    return S; \
11519
0
  case 428: \
11520
0
    tmp = fieldname(insn, 4, 1); \
11521
0
    if (!Check(&S, DecodeGPRNMRARegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11522
0
    tmp = fieldname(insn, 5, 5); \
11523
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11524
0
    return S; \
11525
0
  case 429: \
11526
0
    if (!Check(&S, DecodeBranchConflictNM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11527
0
    return S; \
11528
0
  case 430: \
11529
0
    tmp = fieldname(insn, 7, 3); \
11530
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11531
0
    tmp = fieldname(insn, 4, 3); \
11532
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11533
0
    tmp = fieldname(insn, 0, 4); \
11534
0
    if (!Check(&S, DecodeUImm4Mask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11535
0
    return S; \
11536
0
  case 431: \
11537
0
    tmp = 0x0; \
11538
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11539
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11540
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11541
0
    tmp = 0x0; \
11542
0
    tmp |= fieldname(insn, 0, 3) << 4; \
11543
0
    tmp |= fieldname(insn, 3, 1) << 3; \
11544
0
    tmp |= fieldname(insn, 4, 1) << 8; \
11545
0
    tmp |= fieldname(insn, 8, 1) << 2; \
11546
0
    if (!Check(&S, DecodeMemNM4x4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11547
0
    return S; \
11548
0
  case 432: \
11549
0
    tmp = 0x0; \
11550
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11551
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11552
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11553
0
    tmp = 0x0; \
11554
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11555
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11556
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11557
0
    tmp = 0x0; \
11558
0
    tmp |= fieldname(insn, 3, 1) << 1; \
11559
0
    tmp |= fieldname(insn, 8, 1) << 0; \
11560
0
    if (!Check(&S, DecodeGPRNM2R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11561
0
    return S; \
11562
0
  case 433: \
11563
0
    tmp = fieldname(insn, 0, 18); \
11564
0
    MCOperand_CreateImm0(MI, tmp); \
11565
0
    return S; \
11566
0
  case 434: \
11567
0
    tmp = fieldname(insn, 0, 19); \
11568
0
    MCOperand_CreateImm0(MI, tmp); \
11569
0
    return S; \
11570
0
  case 435: \
11571
0
    tmp = fieldname(insn, 21, 5); \
11572
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11573
0
    tmp = fieldname(insn, 16, 5); \
11574
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11575
0
    tmp = fieldname(insn, 0, 16); \
11576
0
    MCOperand_CreateImm0(MI, tmp); \
11577
0
    return S; \
11578
0
  case 436: \
11579
0
    tmp = fieldname(insn, 21, 5); \
11580
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11581
0
    tmp = 0x0; \
11582
0
    tmp |= fieldname(insn, 0, 1) << 21; \
11583
0
    tmp |= fieldname(insn, 1, 20) << 1; \
11584
0
    if (!Check(&S, DecodeAddressPCRelNM_22(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11585
0
    return S; \
11586
0
  case 437: \
11587
0
    tmp = fieldname(insn, 24, 1); \
11588
0
    if (!Check(&S, DecodeGPRNM1R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11589
0
    tmp = 0x0; \
11590
0
    tmp |= fieldname(insn, 21, 3) << 0; \
11591
0
    tmp |= fieldname(insn, 25, 1) << 4; \
11592
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11593
0
    tmp = 0x0; \
11594
0
    tmp |= fieldname(insn, 0, 1) << 21; \
11595
0
    tmp |= fieldname(insn, 1, 20) << 1; \
11596
0
    if (!Check(&S, DecodeBranchTargetNM_21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11597
0
    return S; \
11598
0
  case 438: \
11599
0
    tmp = fieldname(insn, 16, 5); \
11600
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11601
0
    tmp = fieldname(insn, 21, 5); \
11602
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11603
0
    tmp = fieldname(insn, 11, 5); \
11604
0
    MCOperand_CreateImm0(MI, tmp); \
11605
0
    return S; \
11606
0
  case 439: \
11607
0
    tmp = fieldname(insn, 21, 5); \
11608
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11609
0
    tmp = fieldname(insn, 16, 5); \
11610
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11611
0
    tmp = fieldname(insn, 11, 5); \
11612
0
    MCOperand_CreateImm0(MI, tmp); \
11613
0
    return S; \
11614
0
  case 440: \
11615
0
    tmp = fieldname(insn, 11, 5); \
11616
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11617
0
    tmp = fieldname(insn, 16, 10); \
11618
0
    if (!Check(&S, DecodeMemNMRX_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11619
0
    return S; \
11620
0
  case 441: \
11621
0
    tmp = fieldname(insn, 21, 5); \
11622
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11623
0
    tmp = fieldname(insn, 16, 5); \
11624
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11625
0
    return S; \
11626
0
  case 442: \
11627
0
    tmp = fieldname(insn, 11, 5); \
11628
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11629
0
    tmp = fieldname(insn, 16, 5); \
11630
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11631
0
    tmp = fieldname(insn, 21, 5); \
11632
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11633
0
    tmp = fieldname(insn, 9, 2); \
11634
0
    MCOperand_CreateImm0(MI, tmp); \
11635
0
    return S; \
11636
0
  case 443: \
11637
0
    tmp = fieldname(insn, 11, 5); \
11638
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11639
0
    tmp = fieldname(insn, 16, 5); \
11640
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11641
0
    tmp = fieldname(insn, 21, 5); \
11642
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11643
0
    return S; \
11644
0
  case 444: \
11645
0
    tmp = fieldname(insn, 11, 5); \
11646
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11647
0
    tmp = fieldname(insn, 16, 5); \
11648
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11649
0
    tmp = fieldname(insn, 21, 5); \
11650
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11651
0
    tmp = fieldname(insn, 11, 5); \
11652
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11653
0
    return S; \
11654
0
  case 445: \
11655
0
    tmp = fieldname(insn, 11, 5); \
11656
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11657
0
    tmp = fieldname(insn, 16, 5); \
11658
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11659
0
    tmp = fieldname(insn, 21, 5); \
11660
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11661
0
    tmp = fieldname(insn, 6, 5); \
11662
0
    MCOperand_CreateImm0(MI, tmp); \
11663
0
    return S; \
11664
0
  case 446: \
11665
0
    tmp = fieldname(insn, 16, 5); \
11666
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11667
0
    tmp = fieldname(insn, 11, 5); \
11668
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11669
0
    tmp = fieldname(insn, 21, 5); \
11670
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11671
0
    return S; \
11672
0
  case 447: \
11673
0
    tmp = fieldname(insn, 21, 5); \
11674
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11675
0
    tmp = fieldname(insn, 21, 5); \
11676
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11677
0
    tmp = fieldname(insn, 16, 5); \
11678
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11679
0
    return S; \
11680
0
  case 448: \
11681
0
    tmp = fieldname(insn, 21, 5); \
11682
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11683
0
    tmp = fieldname(insn, 11, 10); \
11684
0
    if (!Check(&S, DecodeCOP0SelRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11685
0
    return S; \
11686
0
  case 449: \
11687
0
    tmp = fieldname(insn, 21, 5); \
11688
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11689
0
    tmp = fieldname(insn, 16, 5); \
11690
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11691
0
    tmp = fieldname(insn, 10, 1); \
11692
0
    MCOperand_CreateImm0(MI, tmp); \
11693
0
    tmp = fieldname(insn, 11, 5); \
11694
0
    MCOperand_CreateImm0(MI, tmp); \
11695
0
    tmp = fieldname(insn, 3, 1); \
11696
0
    MCOperand_CreateImm0(MI, tmp); \
11697
0
    return S; \
11698
0
  case 450: \
11699
0
    tmp = fieldname(insn, 16, 5); \
11700
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11701
0
    tmp = fieldname(insn, 21, 5); \
11702
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11703
0
    tmp = fieldname(insn, 10, 1); \
11704
0
    MCOperand_CreateImm0(MI, tmp); \
11705
0
    tmp = fieldname(insn, 11, 5); \
11706
0
    MCOperand_CreateImm0(MI, tmp); \
11707
0
    tmp = fieldname(insn, 3, 1); \
11708
0
    MCOperand_CreateImm0(MI, tmp); \
11709
0
    return S; \
11710
0
  case 451: \
11711
0
    tmp = fieldname(insn, 21, 5); \
11712
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11713
0
    return S; \
11714
0
  case 452: \
11715
0
    tmp = fieldname(insn, 16, 5); \
11716
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11717
0
    tmp = fieldname(insn, 21, 2); \
11718
0
    MCOperand_CreateImm0(MI, tmp); \
11719
0
    return S; \
11720
0
  case 453: \
11721
0
    tmp = fieldname(insn, 16, 5); \
11722
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11723
0
    return S; \
11724
0
  case 454: \
11725
0
    tmp = 0x0; \
11726
0
    tmp |= fieldname(insn, 0, 1) << 25; \
11727
0
    tmp |= fieldname(insn, 1, 24) << 1; \
11728
0
    if (!Check(&S, DecodeBranchTargetNM_25(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11729
0
    return S; \
11730
0
  case 455: \
11731
0
    tmp = fieldname(insn, 21, 5); \
11732
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11733
0
    tmp = fieldname(insn, 2, 19) << 2; \
11734
0
    if (!Check(&S, DecodeUImmWithReg_21_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11735
0
    return S; \
11736
0
  case 456: \
11737
0
    tmp = fieldname(insn, 21, 5); \
11738
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11739
0
    tmp = fieldname(insn, 2, 19) << 2; \
11740
0
    if (!Check(&S, DecodeMemNM_21_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11741
0
    return S; \
11742
0
  case 457: \
11743
0
    tmp = fieldname(insn, 21, 5); \
11744
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11745
0
    tmp = fieldname(insn, 0, 18); \
11746
0
    if (!Check(&S, DecodeMemNM_18_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11747
0
    return S; \
11748
0
  case 458: \
11749
0
    tmp = fieldname(insn, 21, 5); \
11750
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11751
0
    tmp = fieldname(insn, 0, 18); \
11752
0
    if (!Check(&S, DecodeUImmWithReg_18_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11753
0
    return S; \
11754
0
  case 459: \
11755
0
    tmp = fieldname(insn, 21, 5); \
11756
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11757
0
    tmp = fieldname(insn, 1, 17) << 1; \
11758
0
    if (!Check(&S, DecodeMemNM_18_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11759
0
    return S; \
11760
0
  case 460: \
11761
0
    tmp = fieldname(insn, 21, 5); \
11762
0
    if (!Check(&S, DecodeGPRNM32NZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11763
0
    tmp = fieldname(insn, 16, 5); \
11764
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11765
0
    return S; \
11766
0
  case 461: \
11767
0
    tmp = fieldname(insn, 21, 5); \
11768
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11769
0
    tmp = fieldname(insn, 16, 5); \
11770
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11771
0
    tmp = fieldname(insn, 0, 12); \
11772
0
    MCOperand_CreateImm0(MI, tmp); \
11773
0
    return S; \
11774
0
  case 462: \
11775
0
    tmp = fieldname(insn, 3, 9) << 3; \
11776
0
    MCOperand_CreateImm0(MI, tmp); \
11777
0
    tmp = 0x0; \
11778
0
    tmp |= fieldname(insn, 2, 1) << 0; \
11779
0
    tmp |= fieldname(insn, 16, 4) << 1; \
11780
0
    tmp |= fieldname(insn, 21, 5) << 5; \
11781
0
    if (!Check(&S, DecodeNMRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11782
0
    return S; \
11783
0
  case 463: \
11784
0
    tmp = fieldname(insn, 21, 5); \
11785
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11786
0
    tmp = fieldname(insn, 16, 5); \
11787
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11788
0
    tmp = fieldname(insn, 0, 12); \
11789
0
    if (!Check(&S, DecodeNegImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11790
0
    return S; \
11791
0
  case 464: \
11792
0
    tmp = fieldname(insn, 21, 5); \
11793
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11794
0
    tmp = fieldname(insn, 16, 5); \
11795
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11796
0
    tmp = fieldname(insn, 0, 5); \
11797
0
    MCOperand_CreateImm0(MI, tmp); \
11798
0
    return S; \
11799
0
  case 465: \
11800
0
    tmp = fieldname(insn, 21, 5); \
11801
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11802
0
    tmp = fieldname(insn, 16, 5); \
11803
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11804
0
    tmp = fieldname(insn, 0, 5); \
11805
0
    MCOperand_CreateImm0(MI, tmp); \
11806
0
    tmp = fieldname(insn, 7, 4) << 1; \
11807
0
    MCOperand_CreateImm0(MI, tmp); \
11808
0
    tmp = fieldname(insn, 6, 1); \
11809
0
    MCOperand_CreateImm0(MI, tmp); \
11810
0
    return S; \
11811
0
  case 466: \
11812
0
    tmp = fieldname(insn, 21, 5); \
11813
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11814
0
    tmp = fieldname(insn, 16, 5); \
11815
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11816
0
    tmp = fieldname(insn, 0, 5); \
11817
0
    MCOperand_CreateImm0(MI, tmp); \
11818
0
    tmp = fieldname(insn, 6, 5); \
11819
0
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11820
0
    tmp = fieldname(insn, 21, 5); \
11821
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11822
0
    return S; \
11823
0
  case 467: \
11824
0
    tmp = fieldname(insn, 21, 5); \
11825
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11826
0
    tmp = fieldname(insn, 16, 5); \
11827
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11828
0
    tmp = fieldname(insn, 0, 5); \
11829
0
    MCOperand_CreateImm0(MI, tmp); \
11830
0
    tmp = fieldname(insn, 6, 5); \
11831
0
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11832
0
    return S; \
11833
0
  case 468: \
11834
0
    tmp = fieldname(insn, 21, 5); \
11835
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11836
0
    tmp = 0x0; \
11837
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11838
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11839
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11840
0
    return S; \
11841
0
  case 469: \
11842
0
    tmp = 0x0; \
11843
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11844
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11845
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11846
0
    return S; \
11847
0
  case 470: \
11848
0
    tmp = fieldname(insn, 21, 5); \
11849
0
    MCOperand_CreateImm0(MI, tmp); \
11850
0
    tmp = 0x0; \
11851
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11852
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11853
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11854
0
    return S; \
11855
0
  case 471: \
11856
0
    tmp = fieldname(insn, 16, 5); \
11857
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11858
0
    tmp = fieldname(insn, 21, 5); \
11859
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11860
0
    tmp = 0x0; \
11861
0
    tmp |= fieldname(insn, 0, 1) << 14; \
11862
0
    tmp |= fieldname(insn, 1, 13) << 1; \
11863
0
    if (!Check(&S, DecodeBranchTargetNM_14(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11864
0
    return S; \
11865
0
  case 472: \
11866
0
    tmp = fieldname(insn, 21, 5); \
11867
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11868
0
    tmp = 0x0; \
11869
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11870
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11871
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11872
0
    return S; \
11873
0
  case 473: \
11874
0
    tmp = fieldname(insn, 21, 5); \
11875
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11876
0
    tmp = 0x0; \
11877
0
    tmp |= fieldname(insn, 2, 6) << 2; \
11878
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11879
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11880
0
    return S; \
11881
0
  case 474: \
11882
0
    tmp = fieldname(insn, 21, 5); \
11883
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11884
0
    tmp = fieldname(insn, 3, 5); \
11885
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11886
0
    tmp = fieldname(insn, 16, 5); \
11887
0
    if (!Check(&S, DecodeMemZeroNM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11888
0
    return S; \
11889
0
  case 475: \
11890
0
    tmp = fieldname(insn, 21, 5); \
11891
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11892
0
    tmp = 0x0; \
11893
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11894
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11895
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11896
0
    tmp = fieldname(insn, 12, 3); \
11897
0
    if (!Check(&S, DecodeUImm3Shift(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11898
0
    return S; \
11899
0
  case 476: \
11900
0
    tmp = 0x0; \
11901
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11902
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11903
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11904
0
    return S; \
11905
0
  case 477: \
11906
0
    tmp = fieldname(insn, 21, 5); \
11907
0
    MCOperand_CreateImm0(MI, tmp); \
11908
0
    tmp = 0x0; \
11909
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11910
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11911
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11912
0
    return S; \
11913
0
  case 478: \
11914
0
    tmp = fieldname(insn, 21, 5); \
11915
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11916
0
    tmp = fieldname(insn, 21, 5); \
11917
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11918
0
    tmp = 0x0; \
11919
0
    tmp |= fieldname(insn, 2, 6) << 2; \
11920
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11921
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11922
0
    return S; \
11923
0
  case 479: \
11924
0
    tmp = fieldname(insn, 21, 5); \
11925
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11926
0
    tmp = fieldname(insn, 21, 5); \
11927
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11928
0
    tmp = fieldname(insn, 3, 5); \
11929
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11930
0
    tmp = fieldname(insn, 16, 5); \
11931
0
    if (!Check(&S, DecodeMemZeroNM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11932
0
    return S; \
11933
0
  case 480: \
11934
0
    tmp = fieldname(insn, 21, 5); \
11935
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11936
0
    tmp = fieldname(insn, 11, 7); \
11937
0
    MCOperand_CreateImm0(MI, tmp); \
11938
0
    tmp = 0x0; \
11939
0
    tmp |= fieldname(insn, 0, 1) << 11; \
11940
0
    tmp |= fieldname(insn, 1, 10) << 1; \
11941
0
    if (!Check(&S, DecodeBranchTargetNM_11(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11942
0
    return S; \
11943
0
  case 481: \
11944
0
    tmp = fieldname(insn, 21, 5); \
11945
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11946
0
    tmp = fieldname(insn, 11, 6); \
11947
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_32_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11948
0
    tmp = 0x0; \
11949
0
    tmp |= fieldname(insn, 0, 1) << 11; \
11950
0
    tmp |= fieldname(insn, 1, 10) << 1; \
11951
0
    if (!Check(&S, DecodeBranchTargetNM_11(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11952
0
    return S; \
11953
0
  case 482: \
11954
0
    tmp = fieldname(insn, 21, 5); \
11955
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11956
0
    tmp = 0x0; \
11957
0
    tmp |= fieldname(insn, 0, 1) << 19; \
11958
0
    tmp |= fieldname(insn, 2, 10) << 9; \
11959
0
    tmp |= fieldname(insn, 12, 9) << 0; \
11960
0
    if (!Check(&S, DecodeSImm32s12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11961
0
    return S; \
11962
0
  case 483: \
11963
0
    tmp = fieldname(insn, 37, 5); \
11964
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11965
0
    tmp = 0x0; \
11966
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11967
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11968
0
    MCOperand_CreateImm0(MI, tmp); \
11969
0
    return S; \
11970
0
  case 484: \
11971
0
    tmp = fieldname(insn, 37, 5); \
11972
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11973
0
    tmp = fieldname(insn, 37, 5); \
11974
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11975
0
    tmp = 0x0; \
11976
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11977
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11978
0
    MCOperand_CreateImm0(MI, tmp); \
11979
0
    return S; \
11980
0
  case 485: \
11981
0
    tmp = fieldname(insn, 37, 5); \
11982
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11983
0
    tmp = 0x0; \
11984
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11985
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11986
0
    if (!Check(&S, DecodeSImmWithReg_32_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11987
0
    return S; \
11988
0
  case 486: \
11989
0
    tmp = fieldname(insn, 37, 5); \
11990
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11991
0
    tmp = 0x0; \
11992
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11993
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11994
0
    if (!Check(&S, DecodeAddressPCRelNM_32(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11995
0
    return S; \
11996
53.2k
  } \
11997
53.2k
}
MipsDisassembler.c:decodeToMCInst_2
Line
Count
Source
8547
24.9k
    uint64_t Address, const void *Decoder, bool *DecodeComplete) \
8548
24.9k
{ \
8549
24.9k
  *DecodeComplete = true; \
8550
24.9k
  InsnType tmp; \
8551
24.9k
  switch (Idx) { \
8552
0
  default: CS_ASSERT_RET_VAL(0 && "Invalid index!", MCDisassembler_Fail); \
8553
0
  case 0: \
8554
0
    tmp = fieldname(insn, 0, 11); \
8555
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8556
0
    return S; \
8557
0
  case 1: \
8558
0
    tmp = fieldname(insn, 8, 3); \
8559
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8560
0
    tmp = fieldname(insn, 0, 8); \
8561
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8562
0
    return S; \
8563
0
  case 2: \
8564
0
    tmp = fieldname(insn, 8, 3); \
8565
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8566
0
    tmp = fieldname(insn, 8, 3); \
8567
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8568
0
    tmp = fieldname(insn, 0, 8); \
8569
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8570
0
    return S; \
8571
0
  case 3: \
8572
0
    tmp = fieldname(insn, 8, 3); \
8573
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8574
0
    tmp = fieldname(insn, 0, 8); \
8575
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8576
0
    return S; \
8577
0
  case 4: \
8578
0
    tmp = fieldname(insn, 0, 8); \
8579
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8580
0
    return S; \
8581
0
  case 5: \
8582
0
    tmp = 0x0; \
8583
0
    tmp |= fieldname(insn, 3, 2) << 3; \
8584
0
    tmp |= fieldname(insn, 5, 3) << 0; \
8585
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8586
0
    tmp = fieldname(insn, 0, 3); \
8587
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8588
0
    return S; \
8589
0
  case 6: \
8590
0
    tmp = fieldname(insn, 4, 4); \
8591
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8592
0
    tmp = fieldname(insn, 0, 4); \
8593
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8594
0
    return S; \
8595
0
  case 7: \
8596
0
    tmp = fieldname(insn, 8, 3); \
8597
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8598
0
    tmp = fieldname(insn, 0, 8); \
8599
0
    MCOperand_CreateImm0(MI, tmp); \
8600
0
    return S; \
8601
0
  case 8: \
8602
0
    tmp = fieldname(insn, 2, 3); \
8603
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8604
0
    tmp = fieldname(insn, 8, 3); \
8605
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8606
0
    tmp = fieldname(insn, 5, 3); \
8607
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8608
0
    return S; \
8609
0
  case 9: \
8610
0
    tmp = fieldname(insn, 8, 3); \
8611
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8612
0
    return S; \
8613
0
  case 10: \
8614
0
    return S; \
8615
0
  case 11: \
8616
0
    tmp = fieldname(insn, 8, 3); \
8617
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8618
0
    tmp = fieldname(insn, 5, 3); \
8619
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8620
0
    return S; \
8621
0
  case 12: \
8622
0
    tmp = fieldname(insn, 8, 3); \
8623
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8624
0
    tmp = fieldname(insn, 8, 3); \
8625
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8626
0
    tmp = fieldname(insn, 5, 3); \
8627
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8628
0
    return S; \
8629
0
  case 13: \
8630
0
    tmp = fieldname(insn, 8, 3); \
8631
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8632
0
    tmp = fieldname(insn, 8, 3); \
8633
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8634
0
    return S; \
8635
0
  case 14: \
8636
0
    tmp = fieldname(insn, 8, 3); \
8637
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8638
0
    tmp = 0x0; \
8639
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8640
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8641
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8642
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8643
0
    return S; \
8644
0
  case 15: \
8645
0
    tmp = 0x0; \
8646
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8647
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8648
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8649
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8650
0
    return S; \
8651
0
  case 16: \
8652
0
    tmp = fieldname(insn, 8, 3); \
8653
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8654
0
    tmp = 0x0; \
8655
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8656
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8657
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8658
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8659
0
    return S; \
8660
0
  case 17: \
8661
0
    tmp = fieldname(insn, 8, 3); \
8662
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8663
0
    tmp = fieldname(insn, 5, 3); \
8664
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8665
0
    tmp = 0x0; \
8666
0
    tmp |= fieldname(insn, 21, 1) << 5; \
8667
0
    tmp |= fieldname(insn, 22, 5) << 0; \
8668
0
    MCOperand_CreateImm0(MI, tmp); \
8669
0
    return S; \
8670
0
  case 18: \
8671
0
    tmp = 0x0; \
8672
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8673
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8674
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8675
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8676
0
    return S; \
8677
0
  case 19: \
8678
0
    if (!Check(&S, DecodeFIXMEInstruction(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8679
0
    return S; \
8680
0
  case 20: \
8681
0
    tmp = fieldname(insn, 8, 3); \
8682
0
    if (!Check(&S, DecodeCPU16RegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8683
0
    tmp = 0x0; \
8684
0
    tmp |= fieldname(insn, 0, 5) << 0; \
8685
0
    tmp |= fieldname(insn, 16, 5) << 11; \
8686
0
    tmp |= fieldname(insn, 21, 6) << 5; \
8687
0
    MCOperand_CreateImm0(MI, tmp); \
8688
0
    return S; \
8689
0
  case 21: \
8690
0
    if (!Check(&S, DecodeFMem3(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8691
0
    return S; \
8692
0
  case 22: \
8693
0
    tmp = fieldname(insn, 16, 5); \
8694
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8695
0
    tmp = fieldname(insn, 0, 16); \
8696
0
    MCOperand_CreateImm0(MI, tmp); \
8697
0
    return S; \
8698
0
  case 23: \
8699
0
    tmp = fieldname(insn, 11, 5); \
8700
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8701
0
    tmp = fieldname(insn, 21, 5); \
8702
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8703
0
    tmp = fieldname(insn, 16, 5); \
8704
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8705
0
    return S; \
8706
0
  case 24: \
8707
0
    tmp = fieldname(insn, 21, 5); \
8708
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8709
0
    return S; \
8710
0
  case 25: \
8711
0
    tmp = fieldname(insn, 11, 5); \
8712
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8713
0
    tmp = fieldname(insn, 21, 5); \
8714
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8715
0
    return S; \
8716
0
  case 26: \
8717
0
    tmp = fieldname(insn, 11, 5); \
8718
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8719
0
    tmp = fieldname(insn, 21, 5); \
8720
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8721
0
    return S; \
8722
0
  case 27: \
8723
0
    tmp = fieldname(insn, 16, 5); \
8724
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8725
0
    tmp = fieldname(insn, 21, 5); \
8726
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8727
0
    tmp = fieldname(insn, 6, 10); \
8728
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_10_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8729
0
    return S; \
8730
0
  case 28: \
8731
0
    tmp = fieldname(insn, 16, 5); \
8732
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8733
0
    tmp = fieldname(insn, 21, 5); \
8734
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8735
0
    tmp = fieldname(insn, 6, 5); \
8736
0
    MCOperand_CreateImm0(MI, tmp); \
8737
0
    tmp = fieldname(insn, 11, 5); \
8738
0
    MCOperand_CreateImm0(MI, tmp); \
8739
0
    return S; \
8740
0
  case 29: \
8741
0
    tmp = fieldname(insn, 21, 5); \
8742
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8743
0
    tmp = fieldname(insn, 16, 5); \
8744
0
    MCOperand_CreateImm0(MI, tmp); \
8745
0
    tmp = fieldname(insn, 0, 16); \
8746
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8747
0
    return S; \
8748
0
  case 30: \
8749
0
    tmp = fieldname(insn, 16, 5); \
8750
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8751
0
    tmp = fieldname(insn, 21, 5); \
8752
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8753
0
    return S; \
8754
208
  case 31: \
8755
208
    tmp = fieldname(insn, 7, 3); \
8756
208
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8757
208
    tmp = fieldname(insn, 1, 3); \
8758
208
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8759
208
    tmp = fieldname(insn, 4, 3); \
8760
208
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8761
208
    return S; \
8762
7.45k
  case 32: \
8763
7.45k
    if (!Check(&S, DecodeMemMMImm4(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8764
7.45k
    return S; \
8765
7.45k
  case 33: \
8766
1.67k
    tmp = fieldname(insn, 5, 5); \
8767
1.67k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8768
1.67k
    tmp = fieldname(insn, 0, 5); \
8769
1.67k
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8770
1.67k
    return S; \
8771
1.67k
  case 34: \
8772
801
    tmp = fieldname(insn, 7, 3); \
8773
801
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8774
801
    tmp = fieldname(insn, 4, 3); \
8775
801
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8776
801
    tmp = fieldname(insn, 1, 3); \
8777
801
    if (!Check(&S, DecodePOOL16BEncodedField(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8778
801
    return S; \
8779
801
  case 35: \
8780
321
    tmp = fieldname(insn, 7, 3); \
8781
321
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8782
321
    tmp = fieldname(insn, 4, 3); \
8783
321
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8784
321
    tmp = fieldname(insn, 0, 4); \
8785
321
    if (!Check(&S, DecodeANDI16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8786
321
    return S; \
8787
321
  case 36: \
8788
82
    tmp = fieldname(insn, 3, 3); \
8789
82
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8790
82
    tmp = fieldname(insn, 0, 3); \
8791
82
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8792
82
    return S; \
8793
395
  case 37: \
8794
395
    tmp = fieldname(insn, 3, 3); \
8795
395
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8796
395
    tmp = fieldname(insn, 0, 3); \
8797
395
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8798
395
    tmp = fieldname(insn, 3, 3); \
8799
395
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8800
395
    return S; \
8801
397
  case 38: \
8802
397
    if (!Check(&S, DecodeMemMMReglistImm4Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8803
397
    return S; \
8804
397
  case 39: \
8805
75
    tmp = fieldname(insn, 0, 5); \
8806
75
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8807
75
    return S; \
8808
75
  case 40: \
8809
24
    tmp = fieldname(insn, 0, 4); \
8810
24
    MCOperand_CreateImm0(MI, tmp); \
8811
24
    return S; \
8812
191
  case 41: \
8813
191
    tmp = fieldname(insn, 0, 5); \
8814
191
    if (!Check(&S, DecodeUImmWithOffsetAndScale_5_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8815
191
    return S; \
8816
1.18k
  case 42: \
8817
1.18k
    if (!Check(&S, DecodeMemMMSPImm5Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8818
1.18k
    return S; \
8819
1.18k
  case 43: \
8820
431
    tmp = fieldname(insn, 5, 5); \
8821
431
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8822
431
    tmp = fieldname(insn, 5, 5); \
8823
431
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8824
431
    tmp = fieldname(insn, 1, 4); \
8825
431
    if (!Check(&S, DecodeSImmWithOffsetAndScale_4_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8826
431
    return S; \
8827
557
  case 44: \
8828
557
    tmp = fieldname(insn, 1, 9); \
8829
557
    if (!Check(&S, DecodeSimm9SP(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8830
557
    return S; \
8831
1.01k
  case 45: \
8832
1.01k
    if (!Check(&S, DecodeMemMMGPImm7Lsl2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8833
1.01k
    return S; \
8834
1.73k
  case 46: \
8835
1.73k
    tmp = fieldname(insn, 7, 3); \
8836
1.73k
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8837
1.73k
    tmp = fieldname(insn, 4, 3); \
8838
1.73k
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8839
1.73k
    tmp = fieldname(insn, 1, 3); \
8840
1.73k
    if (!Check(&S, DecodeAddiur2Simm7(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8841
1.73k
    return S; \
8842
1.73k
  case 47: \
8843
1.39k
    tmp = fieldname(insn, 7, 3); \
8844
1.39k
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8845
1.39k
    tmp = fieldname(insn, 1, 6); \
8846
1.39k
    if (!Check(&S, DecodeUImmWithOffsetAndScale_6_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8847
1.39k
    return S; \
8848
3.85k
  case 48: \
8849
3.85k
    if (!Check(&S, DecodeMovePOperands(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
8850
3.85k
    return S; \
8851
3.85k
  case 49: \
8852
800
    tmp = fieldname(insn, 7, 3); \
8853
800
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8854
800
    tmp = fieldname(insn, 0, 7); \
8855
800
    if (!Check(&S, DecodeBranchTarget7MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8856
800
    return S; \
8857
800
  case 50: \
8858
244
    tmp = fieldname(insn, 0, 10); \
8859
244
    if (!Check(&S, DecodeBranchTarget10MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8860
244
    return S; \
8861
622
  case 51: \
8862
622
    tmp = fieldname(insn, 7, 3); \
8863
622
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8864
622
    tmp = fieldname(insn, 0, 7); \
8865
622
    if (!Check(&S, DecodeLi16Imm(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8866
622
    return S; \
8867
622
  case 52: \
8868
0
    tmp = fieldname(insn, 21, 5); \
8869
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8870
0
    tmp = fieldname(insn, 16, 5); \
8871
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8872
0
    tmp = fieldname(insn, 11, 5); \
8873
0
    MCOperand_CreateImm0(MI, tmp); \
8874
0
    return S; \
8875
0
  case 53: \
8876
0
    tmp = fieldname(insn, 16, 5); \
8877
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8878
0
    tmp = fieldname(insn, 21, 5); \
8879
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8880
0
    return S; \
8881
0
  case 54: \
8882
0
    tmp = fieldname(insn, 11, 5); \
8883
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8884
0
    tmp = fieldname(insn, 16, 5); \
8885
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8886
0
    tmp = fieldname(insn, 21, 5); \
8887
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8888
0
    return S; \
8889
0
  case 55: \
8890
0
    tmp = fieldname(insn, 11, 5); \
8891
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8892
0
    tmp = fieldname(insn, 16, 5); \
8893
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8894
0
    tmp = fieldname(insn, 21, 5); \
8895
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8896
0
    return S; \
8897
0
  case 56: \
8898
0
    tmp = fieldname(insn, 16, 10); \
8899
0
    MCOperand_CreateImm0(MI, tmp); \
8900
0
    tmp = fieldname(insn, 6, 10); \
8901
0
    MCOperand_CreateImm0(MI, tmp); \
8902
0
    return S; \
8903
0
  case 57: \
8904
0
    tmp = fieldname(insn, 21, 5); \
8905
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8906
0
    tmp = fieldname(insn, 16, 5); \
8907
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8908
0
    tmp = fieldname(insn, 6, 5); \
8909
0
    MCOperand_CreateImm0(MI, tmp); \
8910
0
    tmp = fieldname(insn, 11, 5); \
8911
0
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8912
0
    tmp = fieldname(insn, 21, 5); \
8913
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8914
0
    return S; \
8915
0
  case 58: \
8916
0
    tmp = fieldname(insn, 11, 5); \
8917
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8918
0
    tmp = fieldname(insn, 16, 5); \
8919
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8920
0
    tmp = fieldname(insn, 21, 5); \
8921
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8922
0
    return S; \
8923
0
  case 59: \
8924
0
    tmp = fieldname(insn, 11, 5); \
8925
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8926
0
    tmp = fieldname(insn, 21, 5); \
8927
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8928
0
    tmp = fieldname(insn, 16, 5); \
8929
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8930
0
    return S; \
8931
0
  case 60: \
8932
0
    tmp = fieldname(insn, 21, 5); \
8933
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8934
0
    tmp = fieldname(insn, 16, 5); \
8935
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8936
0
    tmp = fieldname(insn, 11, 5); \
8937
0
    MCOperand_CreateImm0(MI, tmp); \
8938
0
    tmp = fieldname(insn, 21, 5); \
8939
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8940
0
    return S; \
8941
0
  case 61: \
8942
0
    tmp = fieldname(insn, 11, 5); \
8943
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8944
0
    tmp = fieldname(insn, 21, 5); \
8945
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8946
0
    tmp = fieldname(insn, 16, 5); \
8947
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8948
0
    return S; \
8949
0
  case 62: \
8950
0
    tmp = fieldname(insn, 21, 5); \
8951
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8952
0
    tmp = fieldname(insn, 16, 5); \
8953
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8954
0
    tmp = fieldname(insn, 11, 5); \
8955
0
    MCOperand_CreateImm0(MI, tmp); \
8956
0
    tmp = fieldname(insn, 21, 5); \
8957
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8958
0
    return S; \
8959
0
  case 63: \
8960
0
    tmp = fieldname(insn, 11, 5); \
8961
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8962
0
    tmp = fieldname(insn, 16, 5); \
8963
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8964
0
    tmp = fieldname(insn, 21, 5); \
8965
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8966
0
    tmp = fieldname(insn, 11, 5); \
8967
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8968
0
    return S; \
8969
0
  case 64: \
8970
0
    tmp = fieldname(insn, 11, 5); \
8971
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8972
0
    tmp = fieldname(insn, 16, 5); \
8973
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8974
0
    tmp = fieldname(insn, 21, 5); \
8975
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8976
0
    return S; \
8977
0
  case 65: \
8978
0
    tmp = fieldname(insn, 14, 2); \
8979
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8980
0
    tmp = fieldname(insn, 16, 6); \
8981
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_6_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8982
0
    tmp = fieldname(insn, 14, 2); \
8983
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8984
0
    return S; \
8985
0
  case 66: \
8986
0
    tmp = fieldname(insn, 21, 5); \
8987
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8988
0
    tmp = fieldname(insn, 16, 5); \
8989
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8990
0
    tmp = fieldname(insn, 6, 5); \
8991
0
    MCOperand_CreateImm0(MI, tmp); \
8992
0
    tmp = fieldname(insn, 11, 5); \
8993
0
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8994
0
    return S; \
8995
0
  case 67: \
8996
0
    tmp = fieldname(insn, 11, 5); \
8997
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
8998
0
    tmp = fieldname(insn, 16, 5); \
8999
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9000
0
    tmp = fieldname(insn, 21, 5); \
9001
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9002
0
    return S; \
9003
0
  case 68: \
9004
0
    tmp = fieldname(insn, 21, 5); \
9005
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9006
0
    tmp = fieldname(insn, 16, 5); \
9007
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9008
0
    tmp = fieldname(insn, 11, 3); \
9009
0
    MCOperand_CreateImm0(MI, tmp); \
9010
0
    return S; \
9011
0
  case 69: \
9012
0
    tmp = fieldname(insn, 16, 5); \
9013
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9014
0
    tmp = fieldname(insn, 21, 5); \
9015
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9016
0
    tmp = fieldname(insn, 11, 3); \
9017
0
    MCOperand_CreateImm0(MI, tmp); \
9018
0
    return S; \
9019
0
  case 70: \
9020
0
    tmp = fieldname(insn, 21, 5); \
9021
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9022
0
    tmp = fieldname(insn, 16, 5); \
9023
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9024
0
    tmp = fieldname(insn, 12, 4); \
9025
0
    MCOperand_CreateImm0(MI, tmp); \
9026
0
    return S; \
9027
0
  case 71: \
9028
0
    tmp = fieldname(insn, 16, 5); \
9029
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9030
0
    tmp = fieldname(insn, 21, 5); \
9031
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9032
0
    tmp = fieldname(insn, 12, 4); \
9033
0
    MCOperand_CreateImm0(MI, tmp); \
9034
0
    return S; \
9035
0
  case 72: \
9036
0
    tmp = fieldname(insn, 16, 5); \
9037
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9038
0
    tmp = fieldname(insn, 14, 2); \
9039
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9040
0
    return S; \
9041
0
  case 73: \
9042
0
    tmp = fieldname(insn, 14, 2); \
9043
0
    if (!Check(&S, DecodeHI32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9044
0
    tmp = fieldname(insn, 16, 5); \
9045
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9046
0
    return S; \
9047
0
  case 74: \
9048
0
    tmp = fieldname(insn, 21, 5); \
9049
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9050
0
    tmp = fieldname(insn, 16, 5); \
9051
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9052
0
    tmp = fieldname(insn, 13, 3); \
9053
0
    MCOperand_CreateImm0(MI, tmp); \
9054
0
    return S; \
9055
0
  case 75: \
9056
0
    tmp = fieldname(insn, 14, 2); \
9057
0
    if (!Check(&S, DecodeLO32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9058
0
    tmp = fieldname(insn, 16, 5); \
9059
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9060
0
    return S; \
9061
0
  case 76: \
9062
0
    tmp = fieldname(insn, 14, 2); \
9063
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9064
0
    tmp = fieldname(insn, 16, 5); \
9065
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9066
0
    tmp = fieldname(insn, 21, 5); \
9067
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9068
0
    tmp = fieldname(insn, 14, 2); \
9069
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9070
0
    return S; \
9071
0
  case 77: \
9072
0
    tmp = fieldname(insn, 21, 5); \
9073
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9074
0
    tmp = fieldname(insn, 16, 5); \
9075
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9076
0
    tmp = fieldname(insn, 14, 2); \
9077
0
    MCOperand_CreateImm0(MI, tmp); \
9078
0
    tmp = fieldname(insn, 21, 5); \
9079
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9080
0
    return S; \
9081
0
  case 78: \
9082
0
    tmp = fieldname(insn, 21, 5); \
9083
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9084
0
    tmp = fieldname(insn, 14, 2); \
9085
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9086
0
    tmp = fieldname(insn, 16, 5); \
9087
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9088
0
    return S; \
9089
0
  case 79: \
9090
0
    tmp = fieldname(insn, 21, 5); \
9091
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9092
0
    tmp = fieldname(insn, 16, 5); \
9093
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9094
0
    return S; \
9095
0
  case 80: \
9096
0
    tmp = fieldname(insn, 21, 5); \
9097
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9098
0
    tmp = fieldname(insn, 16, 5); \
9099
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9100
0
    return S; \
9101
0
  case 81: \
9102
0
    tmp = fieldname(insn, 21, 5); \
9103
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9104
0
    tmp = fieldname(insn, 21, 5); \
9105
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9106
0
    tmp = fieldname(insn, 16, 5); \
9107
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9108
0
    return S; \
9109
0
  case 82: \
9110
0
    tmp = fieldname(insn, 21, 5); \
9111
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9112
0
    tmp = fieldname(insn, 16, 5); \
9113
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9114
0
    return S; \
9115
0
  case 83: \
9116
0
    tmp = fieldname(insn, 14, 2); \
9117
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9118
0
    tmp = fieldname(insn, 16, 5); \
9119
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9120
0
    tmp = fieldname(insn, 14, 2); \
9121
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9122
0
    return S; \
9123
0
  case 84: \
9124
0
    tmp = fieldname(insn, 21, 5); \
9125
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9126
0
    tmp = fieldname(insn, 16, 5); \
9127
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9128
0
    return S; \
9129
0
  case 85: \
9130
0
    tmp = fieldname(insn, 21, 5); \
9131
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9132
0
    tmp = fieldname(insn, 16, 5); \
9133
0
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9134
0
    return S; \
9135
0
  case 86: \
9136
0
    tmp = fieldname(insn, 16, 5); \
9137
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9138
0
    tmp = fieldname(insn, 21, 5); \
9139
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9140
0
    return S; \
9141
0
  case 87: \
9142
0
    tmp = fieldname(insn, 16, 5); \
9143
0
    MCOperand_CreateImm0(MI, tmp); \
9144
0
    return S; \
9145
0
  case 88: \
9146
0
    tmp = fieldname(insn, 16, 10); \
9147
0
    MCOperand_CreateImm0(MI, tmp); \
9148
0
    return S; \
9149
0
  case 89: \
9150
0
    tmp = fieldname(insn, 14, 2); \
9151
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9152
0
    tmp = fieldname(insn, 16, 5); \
9153
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9154
0
    tmp = fieldname(insn, 21, 5); \
9155
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9156
0
    return S; \
9157
0
  case 90: \
9158
0
    tmp = fieldname(insn, 21, 5); \
9159
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9160
0
    tmp = fieldname(insn, 16, 5); \
9161
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9162
0
    return S; \
9163
0
  case 91: \
9164
0
    tmp = fieldname(insn, 16, 5); \
9165
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9166
0
    tmp = fieldname(insn, 21, 5); \
9167
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9168
0
    return S; \
9169
0
  case 92: \
9170
0
    tmp = fieldname(insn, 16, 5); \
9171
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9172
0
    return S; \
9173
0
  case 93: \
9174
0
    tmp = fieldname(insn, 21, 5); \
9175
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9176
0
    tmp = fieldname(insn, 13, 8); \
9177
0
    MCOperand_CreateImm0(MI, tmp); \
9178
0
    return S; \
9179
0
  case 94: \
9180
0
    tmp = fieldname(insn, 21, 5); \
9181
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9182
0
    tmp = fieldname(insn, 14, 7); \
9183
0
    MCOperand_CreateImm0(MI, tmp); \
9184
0
    return S; \
9185
0
  case 95: \
9186
0
    tmp = fieldname(insn, 21, 5); \
9187
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9188
0
    tmp = fieldname(insn, 14, 2); \
9189
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9190
0
    tmp = fieldname(insn, 16, 5); \
9191
0
    MCOperand_CreateImm0(MI, tmp); \
9192
0
    return S; \
9193
0
  case 96: \
9194
0
    tmp = fieldname(insn, 11, 5); \
9195
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9196
0
    tmp = fieldname(insn, 16, 10); \
9197
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_10_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9198
0
    return S; \
9199
0
  case 97: \
9200
0
    tmp = fieldname(insn, 21, 5); \
9201
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9202
0
    tmp = fieldname(insn, 16, 5); \
9203
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9204
0
    tmp = fieldname(insn, 0, 16); \
9205
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9206
0
    return S; \
9207
0
  case 98: \
9208
0
    if (!Check(&S, DecodeMemMMImm16(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9209
0
    return S; \
9210
0
  case 99: \
9211
0
    if (!Check(&S, DecodeMemMMImm12(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9212
0
    return S; \
9213
0
  case 100: \
9214
0
    if (!Check(&S, DecodeCacheOpMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9215
0
    return S; \
9216
0
  case 101: \
9217
0
    tmp = fieldname(insn, 16, 5); \
9218
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9219
0
    tmp = fieldname(insn, 0, 16); \
9220
0
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9221
0
    return S; \
9222
0
  case 102: \
9223
0
    tmp = fieldname(insn, 16, 5); \
9224
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9225
0
    tmp = fieldname(insn, 0, 16); \
9226
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9227
0
    return S; \
9228
0
  case 103: \
9229
0
    tmp = fieldname(insn, 16, 5); \
9230
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9231
0
    tmp = fieldname(insn, 0, 16); \
9232
0
    MCOperand_CreateImm0(MI, tmp); \
9233
0
    return S; \
9234
0
  case 104: \
9235
0
    if (!Check(&S, DecodeSyncI_MM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9236
0
    return S; \
9237
0
  case 105: \
9238
0
    tmp = fieldname(insn, 0, 16); \
9239
0
    if (!Check(&S, DecodeBranchTarget1SImm16(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9240
0
    return S; \
9241
0
  case 106: \
9242
0
    tmp = fieldname(insn, 0, 16); \
9243
0
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9244
0
    return S; \
9245
0
  case 107: \
9246
0
    tmp = fieldname(insn, 18, 3); \
9247
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9248
0
    tmp = fieldname(insn, 0, 16); \
9249
0
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9250
0
    return S; \
9251
0
  case 108: \
9252
0
    tmp = fieldname(insn, 21, 5); \
9253
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9254
0
    tmp = fieldname(insn, 16, 5); \
9255
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9256
0
    tmp = fieldname(insn, 0, 16); \
9257
0
    MCOperand_CreateImm0(MI, tmp); \
9258
0
    return S; \
9259
0
  case 109: \
9260
0
    tmp = fieldname(insn, 11, 5); \
9261
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9262
0
    tmp = fieldname(insn, 6, 5); \
9263
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9264
0
    tmp = fieldname(insn, 16, 5); \
9265
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9266
0
    tmp = fieldname(insn, 21, 5); \
9267
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9268
0
    return S; \
9269
0
  case 110: \
9270
0
    tmp = fieldname(insn, 11, 5); \
9271
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9272
0
    tmp = fieldname(insn, 16, 5); \
9273
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9274
0
    tmp = fieldname(insn, 21, 5); \
9275
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9276
0
    return S; \
9277
0
  case 111: \
9278
0
    tmp = fieldname(insn, 11, 5); \
9279
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9280
0
    tmp = fieldname(insn, 16, 5); \
9281
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9282
0
    tmp = fieldname(insn, 21, 5); \
9283
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9284
0
    return S; \
9285
0
  case 112: \
9286
0
    tmp = fieldname(insn, 11, 5); \
9287
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9288
0
    tmp = fieldname(insn, 6, 5); \
9289
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9290
0
    tmp = fieldname(insn, 16, 5); \
9291
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9292
0
    tmp = fieldname(insn, 21, 5); \
9293
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9294
0
    return S; \
9295
0
  case 113: \
9296
0
    tmp = fieldname(insn, 21, 5); \
9297
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9298
0
    tmp = fieldname(insn, 16, 5); \
9299
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9300
0
    tmp = fieldname(insn, 13, 3); \
9301
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9302
0
    tmp = fieldname(insn, 21, 5); \
9303
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9304
0
    return S; \
9305
0
  case 114: \
9306
0
    tmp = fieldname(insn, 16, 5); \
9307
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9308
0
    tmp = fieldname(insn, 21, 5); \
9309
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9310
0
    tmp = fieldname(insn, 11, 5); \
9311
0
    MCOperand_CreateImm0(MI, tmp); \
9312
0
    return S; \
9313
0
  case 115: \
9314
0
    tmp = fieldname(insn, 21, 5); \
9315
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9316
0
    tmp = fieldname(insn, 16, 5); \
9317
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9318
0
    tmp = fieldname(insn, 13, 3); \
9319
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9320
0
    tmp = fieldname(insn, 21, 5); \
9321
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9322
0
    return S; \
9323
0
  case 116: \
9324
0
    tmp = fieldname(insn, 11, 5); \
9325
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9326
0
    tmp = fieldname(insn, 16, 5); \
9327
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9328
0
    tmp = fieldname(insn, 21, 5); \
9329
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9330
0
    return S; \
9331
0
  case 117: \
9332
0
    tmp = fieldname(insn, 11, 5); \
9333
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9334
0
    tmp = fieldname(insn, 16, 5); \
9335
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9336
0
    tmp = fieldname(insn, 21, 5); \
9337
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9338
0
    tmp = fieldname(insn, 11, 5); \
9339
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9340
0
    return S; \
9341
0
  case 118: \
9342
0
    tmp = fieldname(insn, 11, 5); \
9343
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9344
0
    tmp = fieldname(insn, 16, 5); \
9345
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9346
0
    tmp = fieldname(insn, 21, 5); \
9347
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9348
0
    tmp = fieldname(insn, 11, 5); \
9349
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9350
0
    return S; \
9351
0
  case 119: \
9352
0
    tmp = fieldname(insn, 21, 5); \
9353
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9354
0
    tmp = fieldname(insn, 16, 5); \
9355
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9356
0
    return S; \
9357
0
  case 120: \
9358
0
    tmp = fieldname(insn, 21, 5); \
9359
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9360
0
    tmp = fieldname(insn, 16, 5); \
9361
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9362
0
    return S; \
9363
0
  case 121: \
9364
0
    tmp = fieldname(insn, 21, 5); \
9365
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9366
0
    tmp = fieldname(insn, 16, 5); \
9367
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9368
0
    return S; \
9369
0
  case 122: \
9370
0
    tmp = fieldname(insn, 21, 5); \
9371
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9372
0
    tmp = fieldname(insn, 16, 5); \
9373
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9374
0
    return S; \
9375
0
  case 123: \
9376
0
    tmp = fieldname(insn, 21, 5); \
9377
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9378
0
    tmp = fieldname(insn, 16, 5); \
9379
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9380
0
    tmp = fieldname(insn, 13, 3); \
9381
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9382
0
    tmp = fieldname(insn, 21, 5); \
9383
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9384
0
    return S; \
9385
0
  case 124: \
9386
0
    tmp = fieldname(insn, 21, 5); \
9387
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9388
0
    tmp = fieldname(insn, 16, 5); \
9389
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9390
0
    return S; \
9391
0
  case 125: \
9392
0
    tmp = fieldname(insn, 16, 5); \
9393
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9394
0
    tmp = fieldname(insn, 21, 5); \
9395
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9396
0
    return S; \
9397
0
  case 126: \
9398
0
    tmp = fieldname(insn, 21, 5); \
9399
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9400
0
    tmp = fieldname(insn, 16, 5); \
9401
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9402
0
    return S; \
9403
0
  case 127: \
9404
0
    tmp = fieldname(insn, 21, 5); \
9405
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9406
0
    tmp = fieldname(insn, 16, 5); \
9407
0
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9408
0
    return S; \
9409
0
  case 128: \
9410
0
    tmp = fieldname(insn, 21, 5); \
9411
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9412
0
    tmp = fieldname(insn, 16, 5); \
9413
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9414
0
    return S; \
9415
0
  case 129: \
9416
0
    tmp = fieldname(insn, 21, 5); \
9417
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9418
0
    tmp = fieldname(insn, 16, 5); \
9419
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9420
0
    return S; \
9421
0
  case 130: \
9422
0
    tmp = fieldname(insn, 16, 5); \
9423
0
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9424
0
    tmp = fieldname(insn, 21, 5); \
9425
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9426
0
    return S; \
9427
0
  case 131: \
9428
0
    tmp = fieldname(insn, 16, 5); \
9429
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9430
0
    tmp = fieldname(insn, 16, 5); \
9431
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9432
0
    tmp = fieldname(insn, 21, 5); \
9433
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9434
0
    return S; \
9435
0
  case 132: \
9436
0
    tmp = fieldname(insn, 13, 3); \
9437
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9438
0
    tmp = fieldname(insn, 16, 5); \
9439
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9440
0
    tmp = fieldname(insn, 21, 5); \
9441
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9442
0
    return S; \
9443
0
  case 133: \
9444
0
    tmp = fieldname(insn, 13, 3); \
9445
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9446
0
    tmp = fieldname(insn, 16, 5); \
9447
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9448
0
    tmp = fieldname(insn, 21, 5); \
9449
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9450
0
    return S; \
9451
0
  case 134: \
9452
0
    if (!Check(&S, DecodeMemMMImm9(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9453
0
    return S; \
9454
0
  case 135: \
9455
0
    if (!Check(&S, DecodePrefeOpMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9456
0
    return S; \
9457
0
  case 136: \
9458
0
    if (!Check(&S, DecodeJumpTargetMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9459
0
    return S; \
9460
0
  case 137: \
9461
0
    tmp = fieldname(insn, 23, 3); \
9462
0
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9463
0
    tmp = fieldname(insn, 0, 23); \
9464
0
    if (!Check(&S, DecodeSimm23Lsl2(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9465
0
    return S; \
9466
0
  case 138: \
9467
0
    tmp = fieldname(insn, 16, 5); \
9468
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9469
0
    tmp = fieldname(insn, 21, 5); \
9470
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9471
0
    tmp = fieldname(insn, 0, 16); \
9472
0
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9473
0
    return S; \
9474
0
  case 139: \
9475
0
    if (!Check(&S, DecodeFMemMMR2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9476
0
    return S; \
9477
0
  case 140: \
9478
0
    if (!Check(&S, DecodeJumpTargetXMM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9479
0
    return S; \
9480
0
  case 141: \
9481
0
    if (!Check(&S, DecodeMem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9482
0
    return S; \
9483
0
  case 142: \
9484
0
    tmp = fieldname(insn, 16, 5); \
9485
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9486
0
    tmp = fieldname(insn, 21, 5); \
9487
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9488
0
    return S; \
9489
0
  case 143: \
9490
0
    tmp = fieldname(insn, 21, 5); \
9491
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9492
0
    tmp = fieldname(insn, 16, 5); \
9493
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9494
0
    return S; \
9495
0
  case 144: \
9496
0
    tmp = fieldname(insn, 16, 5); \
9497
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9498
0
    tmp = fieldname(insn, 16, 5); \
9499
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9500
0
    tmp = fieldname(insn, 21, 5); \
9501
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9502
0
    return S; \
9503
0
  case 145: \
9504
0
    tmp = fieldname(insn, 11, 5); \
9505
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9506
0
    tmp = fieldname(insn, 16, 5); \
9507
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9508
0
    tmp = fieldname(insn, 21, 5); \
9509
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9510
0
    return S; \
9511
0
  case 146: \
9512
0
    tmp = fieldname(insn, 21, 5); \
9513
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9514
0
    tmp = fieldname(insn, 16, 5); \
9515
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9516
0
    return S; \
9517
409
  case 147: \
9518
409
    tmp = fieldname(insn, 1, 3); \
9519
409
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9520
409
    tmp = fieldname(insn, 7, 3); \
9521
409
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9522
409
    tmp = fieldname(insn, 4, 3); \
9523
409
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9524
409
    return S; \
9525
409
  case 148: \
9526
187
    tmp = fieldname(insn, 7, 3); \
9527
187
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9528
187
    tmp = fieldname(insn, 4, 3); \
9529
187
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9530
187
    return S; \
9531
269
  case 149: \
9532
269
    tmp = fieldname(insn, 7, 3); \
9533
269
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9534
269
    tmp = fieldname(insn, 4, 3); \
9535
269
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9536
269
    tmp = fieldname(insn, 7, 3); \
9537
269
    if (!Check(&S, DecodeGPRMM16RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9538
269
    return S; \
9539
326
  case 150: \
9540
326
    tmp = fieldname(insn, 5, 5); \
9541
326
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9542
326
    return S; \
9543
326
  case 151: \
9544
87
    tmp = fieldname(insn, 5, 5); \
9545
87
    if (!Check(&S, DecodeUImmWithOffsetAndScale_5_0_4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9546
87
    return S; \
9547
166
  case 152: \
9548
166
    tmp = fieldname(insn, 6, 4); \
9549
166
    MCOperand_CreateImm0(MI, tmp); \
9550
166
    return S; \
9551
87
  case 153: \
9552
0
    tmp = fieldname(insn, 21, 5); \
9553
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9554
0
    tmp = fieldname(insn, 16, 5); \
9555
0
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9556
0
    tmp = fieldname(insn, 11, 3); \
9557
0
    MCOperand_CreateImm0(MI, tmp); \
9558
0
    return S; \
9559
0
  case 154: \
9560
0
    tmp = fieldname(insn, 11, 5); \
9561
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9562
0
    tmp = fieldname(insn, 16, 5); \
9563
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9564
0
    tmp = fieldname(insn, 21, 5); \
9565
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9566
0
    tmp = fieldname(insn, 9, 2); \
9567
0
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9568
0
    return S; \
9569
0
  case 155: \
9570
0
    tmp = fieldname(insn, 11, 5); \
9571
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9572
0
    tmp = fieldname(insn, 21, 5); \
9573
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9574
0
    tmp = fieldname(insn, 16, 5); \
9575
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9576
0
    tmp = fieldname(insn, 9, 2); \
9577
0
    MCOperand_CreateImm0(MI, tmp); \
9578
0
    return S; \
9579
0
  case 156: \
9580
0
    tmp = fieldname(insn, 16, 5); \
9581
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9582
0
    tmp = fieldname(insn, 9, 2); \
9583
0
    MCOperand_CreateImm0(MI, tmp); \
9584
0
    return S; \
9585
0
  case 157: \
9586
0
    tmp = fieldname(insn, 6, 16); \
9587
0
    MCOperand_CreateImm0(MI, tmp); \
9588
0
    return S; \
9589
0
  case 158: \
9590
0
    tmp = fieldname(insn, 21, 5); \
9591
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9592
0
    tmp = fieldname(insn, 0, 16); \
9593
0
    MCOperand_CreateImm0(MI, tmp); \
9594
0
    return S; \
9595
0
  case 159: \
9596
0
    if (!Check(&S, DecodeLoadByte15(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9597
0
    return S; \
9598
0
  case 160: \
9599
0
    if (!Check(&S, DecodeFMemCop2MMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9600
0
    return S; \
9601
0
  case 161: \
9602
0
    tmp = fieldname(insn, 16, 5); \
9603
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9604
0
    tmp = fieldname(insn, 0, 16); \
9605
0
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9606
0
    return S; \
9607
0
  case 162: \
9608
0
    tmp = fieldname(insn, 16, 5); \
9609
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9610
0
    tmp = fieldname(insn, 0, 16); \
9611
0
    if (!Check(&S, DecodeBranchTargetMM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9612
0
    return S; \
9613
0
  case 163: \
9614
0
    if (!Check(&S, DecodeSynciR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9615
0
    return S; \
9616
0
  case 164: \
9617
0
    tmp = fieldname(insn, 11, 5); \
9618
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9619
0
    tmp = fieldname(insn, 16, 5); \
9620
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9621
0
    tmp = fieldname(insn, 21, 5); \
9622
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9623
0
    return S; \
9624
0
  case 165: \
9625
0
    tmp = fieldname(insn, 11, 5); \
9626
0
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9627
0
    tmp = fieldname(insn, 16, 5); \
9628
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9629
0
    tmp = fieldname(insn, 21, 5); \
9630
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9631
0
    return S; \
9632
0
  case 166: \
9633
0
    tmp = fieldname(insn, 11, 5); \
9634
0
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9635
0
    tmp = fieldname(insn, 16, 5); \
9636
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9637
0
    tmp = fieldname(insn, 21, 5); \
9638
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9639
0
    return S; \
9640
0
  case 167: \
9641
0
    tmp = fieldname(insn, 16, 5); \
9642
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9643
0
    tmp = fieldname(insn, 21, 5); \
9644
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9645
0
    return S; \
9646
0
  case 168: \
9647
0
    tmp = fieldname(insn, 11, 5); \
9648
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9649
0
    tmp = fieldname(insn, 21, 5); \
9650
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9651
0
    tmp = fieldname(insn, 16, 5); \
9652
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9653
0
    return S; \
9654
0
  case 169: \
9655
0
    tmp = fieldname(insn, 11, 5); \
9656
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9657
0
    tmp = fieldname(insn, 11, 5); \
9658
0
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9659
0
    tmp = fieldname(insn, 16, 5); \
9660
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9661
0
    tmp = fieldname(insn, 21, 5); \
9662
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9663
0
    return S; \
9664
0
  case 170: \
9665
0
    tmp = fieldname(insn, 11, 5); \
9666
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9667
0
    tmp = fieldname(insn, 11, 5); \
9668
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9669
0
    tmp = fieldname(insn, 16, 5); \
9670
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9671
0
    tmp = fieldname(insn, 21, 5); \
9672
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9673
0
    return S; \
9674
0
  case 171: \
9675
0
    tmp = fieldname(insn, 16, 5); \
9676
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9677
0
    tmp = fieldname(insn, 21, 5); \
9678
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9679
0
    return S; \
9680
0
  case 172: \
9681
0
    tmp = fieldname(insn, 11, 5); \
9682
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9683
0
    tmp = fieldname(insn, 11, 5); \
9684
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9685
0
    tmp = fieldname(insn, 16, 5); \
9686
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9687
0
    tmp = fieldname(insn, 21, 5); \
9688
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9689
0
    return S; \
9690
0
  case 173: \
9691
0
    if (!Check(&S, DecodePOP35GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9692
0
    return S; \
9693
0
  case 174: \
9694
0
    tmp = fieldname(insn, 21, 5); \
9695
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9696
0
    tmp = fieldname(insn, 0, 19); \
9697
0
    if (!Check(&S, DecodeSimm19Lsl2(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9698
0
    return S; \
9699
0
  case 175: \
9700
0
    tmp = fieldname(insn, 21, 5); \
9701
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9702
0
    tmp = fieldname(insn, 0, 16); \
9703
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9704
0
    return S; \
9705
0
  case 176: \
9706
0
    if (!Check(&S, DecodePOP37GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9707
0
    return S; \
9708
0
  case 177: \
9709
0
    tmp = fieldname(insn, 21, 5); \
9710
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9711
0
    tmp = fieldname(insn, 0, 21); \
9712
0
    if (!Check(&S, DecodeBranchTarget21MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9713
0
    return S; \
9714
0
  case 178: \
9715
0
    tmp = fieldname(insn, 0, 26); \
9716
0
    if (!Check(&S, DecodeBranchTarget26MM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9717
0
    return S; \
9718
0
  case 179: \
9719
0
    if (!Check(&S, DecodeBlezGroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9720
0
    return S; \
9721
0
  case 180: \
9722
0
    if (!Check(&S, DecodePOP65GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9723
0
    return S; \
9724
0
  case 181: \
9725
0
    if (!Check(&S, DecodeBgtzGroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9726
0
    return S; \
9727
0
  case 182: \
9728
0
    if (!Check(&S, DecodePOP75GroupBranchMMR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9729
0
    return S; \
9730
0
  case 183: \
9731
0
    tmp = fieldname(insn, 11, 5); \
9732
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9733
0
    tmp = fieldname(insn, 16, 5); \
9734
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9735
0
    tmp = fieldname(insn, 6, 5); \
9736
0
    MCOperand_CreateImm0(MI, tmp); \
9737
0
    return S; \
9738
0
  case 184: \
9739
0
    tmp = fieldname(insn, 11, 5); \
9740
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9741
0
    tmp = fieldname(insn, 21, 5); \
9742
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9743
0
    tmp = fieldname(insn, 18, 3); \
9744
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9745
0
    tmp = fieldname(insn, 11, 5); \
9746
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9747
0
    return S; \
9748
0
  case 185: \
9749
0
    tmp = fieldname(insn, 11, 5); \
9750
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9751
0
    tmp = fieldname(insn, 21, 5); \
9752
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9753
0
    tmp = fieldname(insn, 16, 5); \
9754
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9755
0
    tmp = fieldname(insn, 6, 2); \
9756
0
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9757
0
    return S; \
9758
0
  case 186: \
9759
0
    tmp = fieldname(insn, 21, 5); \
9760
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9761
0
    return S; \
9762
0
  case 187: \
9763
0
    tmp = fieldname(insn, 11, 5); \
9764
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9765
0
    tmp = fieldname(insn, 21, 5); \
9766
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9767
0
    tmp = fieldname(insn, 16, 5); \
9768
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9769
0
    tmp = fieldname(insn, 11, 5); \
9770
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9771
0
    return S; \
9772
0
  case 188: \
9773
0
    tmp = fieldname(insn, 6, 20); \
9774
0
    MCOperand_CreateImm0(MI, tmp); \
9775
0
    return S; \
9776
0
  case 189: \
9777
0
    tmp = fieldname(insn, 6, 5); \
9778
0
    MCOperand_CreateImm0(MI, tmp); \
9779
0
    return S; \
9780
0
  case 190: \
9781
0
    tmp = fieldname(insn, 11, 5); \
9782
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9783
0
    return S; \
9784
0
  case 191: \
9785
0
    tmp = fieldname(insn, 11, 5); \
9786
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9787
0
    tmp = fieldname(insn, 21, 2); \
9788
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9789
0
    return S; \
9790
0
  case 192: \
9791
0
    tmp = fieldname(insn, 11, 2); \
9792
0
    if (!Check(&S, DecodeHI32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9793
0
    tmp = fieldname(insn, 21, 5); \
9794
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9795
0
    return S; \
9796
0
  case 193: \
9797
0
    tmp = fieldname(insn, 11, 2); \
9798
0
    if (!Check(&S, DecodeLO32DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9799
0
    tmp = fieldname(insn, 21, 5); \
9800
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9801
0
    return S; \
9802
0
  case 194: \
9803
0
    tmp = fieldname(insn, 11, 5); \
9804
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9805
0
    tmp = fieldname(insn, 21, 5); \
9806
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9807
0
    tmp = fieldname(insn, 16, 5); \
9808
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9809
0
    tmp = fieldname(insn, 6, 2); \
9810
0
    if (!Check(&S, DecodeUImmWithOffset_2_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9811
0
    return S; \
9812
0
  case 195: \
9813
0
    tmp = fieldname(insn, 11, 2); \
9814
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9815
0
    tmp = fieldname(insn, 21, 5); \
9816
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9817
0
    tmp = fieldname(insn, 16, 5); \
9818
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9819
0
    return S; \
9820
0
  case 196: \
9821
0
    tmp = fieldname(insn, 21, 5); \
9822
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9823
0
    tmp = fieldname(insn, 16, 5); \
9824
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9825
0
    tmp = fieldname(insn, 6, 10); \
9826
0
    MCOperand_CreateImm0(MI, tmp); \
9827
0
    return S; \
9828
0
  case 197: \
9829
0
    tmp = fieldname(insn, 21, 5); \
9830
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9831
0
    tmp = fieldname(insn, 0, 16); \
9832
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9833
0
    return S; \
9834
0
  case 198: \
9835
0
    tmp = fieldname(insn, 0, 16); \
9836
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9837
0
    return S; \
9838
0
  case 199: \
9839
0
    if (!Check(&S, DecodeSyncI(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9840
0
    return S; \
9841
0
  case 200: \
9842
0
    if (!Check(&S, DecodeJumpTarget(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
9843
0
    return S; \
9844
0
  case 201: \
9845
0
    tmp = fieldname(insn, 21, 5); \
9846
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9847
0
    tmp = fieldname(insn, 16, 5); \
9848
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9849
0
    tmp = fieldname(insn, 0, 16); \
9850
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9851
0
    return S; \
9852
0
  case 202: \
9853
0
    tmp = fieldname(insn, 16, 5); \
9854
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9855
0
    tmp = fieldname(insn, 21, 5); \
9856
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9857
0
    tmp = fieldname(insn, 0, 16); \
9858
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9859
0
    return S; \
9860
0
  case 203: \
9861
0
    tmp = fieldname(insn, 16, 5); \
9862
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9863
0
    tmp = fieldname(insn, 21, 5); \
9864
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9865
0
    tmp = fieldname(insn, 0, 16); \
9866
0
    MCOperand_CreateImm0(MI, tmp); \
9867
0
    return S; \
9868
0
  case 204: \
9869
0
    tmp = fieldname(insn, 16, 5); \
9870
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9871
0
    tmp = fieldname(insn, 11, 5); \
9872
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9873
0
    tmp = fieldname(insn, 0, 3); \
9874
0
    MCOperand_CreateImm0(MI, tmp); \
9875
0
    return S; \
9876
0
  case 205: \
9877
0
    tmp = fieldname(insn, 11, 5); \
9878
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9879
0
    tmp = fieldname(insn, 16, 5); \
9880
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9881
0
    tmp = fieldname(insn, 0, 3); \
9882
0
    MCOperand_CreateImm0(MI, tmp); \
9883
0
    return S; \
9884
0
  case 206: \
9885
0
    tmp = fieldname(insn, 11, 5); \
9886
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9887
0
    tmp = fieldname(insn, 16, 5); \
9888
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9889
0
    tmp = fieldname(insn, 5, 1); \
9890
0
    MCOperand_CreateImm0(MI, tmp); \
9891
0
    tmp = fieldname(insn, 0, 3); \
9892
0
    MCOperand_CreateImm0(MI, tmp); \
9893
0
    tmp = fieldname(insn, 4, 1); \
9894
0
    MCOperand_CreateImm0(MI, tmp); \
9895
0
    return S; \
9896
0
  case 207: \
9897
0
    tmp = fieldname(insn, 11, 10); \
9898
0
    MCOperand_CreateImm0(MI, tmp); \
9899
0
    return S; \
9900
0
  case 208: \
9901
0
    tmp = fieldname(insn, 16, 5); \
9902
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9903
0
    tmp = fieldname(insn, 11, 5); \
9904
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9905
0
    return S; \
9906
0
  case 209: \
9907
0
    tmp = fieldname(insn, 16, 5); \
9908
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9909
0
    tmp = fieldname(insn, 11, 5); \
9910
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9911
0
    return S; \
9912
0
  case 210: \
9913
0
    tmp = fieldname(insn, 16, 5); \
9914
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9915
0
    tmp = fieldname(insn, 11, 5); \
9916
0
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9917
0
    return S; \
9918
0
  case 211: \
9919
0
    tmp = fieldname(insn, 16, 5); \
9920
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9921
0
    tmp = fieldname(insn, 11, 5); \
9922
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9923
0
    return S; \
9924
0
  case 212: \
9925
0
    tmp = fieldname(insn, 11, 5); \
9926
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9927
0
    tmp = fieldname(insn, 16, 5); \
9928
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9929
0
    return S; \
9930
0
  case 213: \
9931
0
    tmp = fieldname(insn, 11, 5); \
9932
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9933
0
    tmp = fieldname(insn, 16, 5); \
9934
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9935
0
    return S; \
9936
0
  case 214: \
9937
0
    tmp = fieldname(insn, 11, 5); \
9938
0
    if (!Check(&S, DecodeCCRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9939
0
    tmp = fieldname(insn, 16, 5); \
9940
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9941
0
    return S; \
9942
0
  case 215: \
9943
0
    tmp = fieldname(insn, 11, 5); \
9944
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9945
0
    tmp = fieldname(insn, 11, 5); \
9946
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9947
0
    tmp = fieldname(insn, 16, 5); \
9948
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9949
0
    return S; \
9950
0
  case 216: \
9951
0
    tmp = fieldname(insn, 18, 3); \
9952
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9953
0
    tmp = fieldname(insn, 0, 16); \
9954
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9955
0
    return S; \
9956
0
  case 217: \
9957
0
    tmp = fieldname(insn, 16, 5); \
9958
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9959
0
    tmp = fieldname(insn, 0, 16); \
9960
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9961
0
    return S; \
9962
0
  case 218: \
9963
0
    tmp = fieldname(insn, 6, 5); \
9964
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9965
0
    tmp = fieldname(insn, 11, 5); \
9966
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9967
0
    tmp = fieldname(insn, 16, 5); \
9968
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9969
0
    return S; \
9970
0
  case 219: \
9971
0
    tmp = fieldname(insn, 6, 5); \
9972
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9973
0
    tmp = fieldname(insn, 11, 5); \
9974
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9975
0
    return S; \
9976
0
  case 220: \
9977
0
    tmp = fieldname(insn, 6, 5); \
9978
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9979
0
    tmp = fieldname(insn, 11, 5); \
9980
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9981
0
    tmp = fieldname(insn, 18, 3); \
9982
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9983
0
    tmp = fieldname(insn, 6, 5); \
9984
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9985
0
    return S; \
9986
0
  case 221: \
9987
0
    tmp = fieldname(insn, 6, 5); \
9988
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9989
0
    tmp = fieldname(insn, 11, 5); \
9990
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9991
0
    tmp = fieldname(insn, 16, 5); \
9992
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9993
0
    tmp = fieldname(insn, 6, 5); \
9994
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9995
0
    return S; \
9996
0
  case 222: \
9997
0
    tmp = fieldname(insn, 6, 5); \
9998
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
9999
0
    tmp = fieldname(insn, 11, 5); \
10000
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10001
0
    return S; \
10002
0
  case 223: \
10003
0
    tmp = fieldname(insn, 6, 5); \
10004
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10005
0
    tmp = fieldname(insn, 11, 5); \
10006
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10007
0
    return S; \
10008
0
  case 224: \
10009
0
    tmp = fieldname(insn, 8, 3); \
10010
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10011
0
    tmp = fieldname(insn, 11, 5); \
10012
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10013
0
    tmp = fieldname(insn, 16, 5); \
10014
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10015
0
    return S; \
10016
0
  case 225: \
10017
0
    tmp = fieldname(insn, 6, 5); \
10018
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10019
0
    tmp = fieldname(insn, 11, 5); \
10020
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10021
0
    tmp = fieldname(insn, 16, 5); \
10022
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10023
0
    return S; \
10024
0
  case 226: \
10025
0
    tmp = fieldname(insn, 6, 5); \
10026
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10027
0
    tmp = fieldname(insn, 11, 5); \
10028
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10029
0
    return S; \
10030
0
  case 227: \
10031
0
    tmp = fieldname(insn, 6, 5); \
10032
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10033
0
    tmp = fieldname(insn, 11, 5); \
10034
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10035
0
    return S; \
10036
0
  case 228: \
10037
0
    tmp = fieldname(insn, 6, 5); \
10038
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10039
0
    tmp = fieldname(insn, 11, 5); \
10040
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10041
0
    tmp = fieldname(insn, 18, 3); \
10042
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10043
0
    tmp = fieldname(insn, 6, 5); \
10044
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10045
0
    return S; \
10046
0
  case 229: \
10047
0
    tmp = fieldname(insn, 6, 5); \
10048
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10049
0
    tmp = fieldname(insn, 11, 5); \
10050
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10051
0
    tmp = fieldname(insn, 16, 5); \
10052
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10053
0
    tmp = fieldname(insn, 6, 5); \
10054
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10055
0
    return S; \
10056
0
  case 230: \
10057
0
    tmp = fieldname(insn, 6, 5); \
10058
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10059
0
    tmp = fieldname(insn, 11, 5); \
10060
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10061
0
    return S; \
10062
0
  case 231: \
10063
0
    tmp = fieldname(insn, 8, 3); \
10064
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10065
0
    tmp = fieldname(insn, 11, 5); \
10066
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10067
0
    tmp = fieldname(insn, 16, 5); \
10068
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10069
0
    return S; \
10070
0
  case 232: \
10071
0
    tmp = fieldname(insn, 16, 5); \
10072
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10073
0
    tmp = fieldname(insn, 0, 16); \
10074
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10075
0
    return S; \
10076
0
  case 233: \
10077
0
    tmp = fieldname(insn, 16, 5); \
10078
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10079
0
    tmp = fieldname(insn, 0, 16); \
10080
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10081
0
    return S; \
10082
0
  case 234: \
10083
0
    tmp = fieldname(insn, 16, 5); \
10084
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10085
0
    tmp = fieldname(insn, 0, 16); \
10086
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10087
0
    return S; \
10088
0
  case 235: \
10089
0
    tmp = fieldname(insn, 16, 5); \
10090
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10091
0
    tmp = fieldname(insn, 11, 5); \
10092
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10093
0
    tmp = fieldname(insn, 0, 3); \
10094
0
    MCOperand_CreateImm0(MI, tmp); \
10095
0
    return S; \
10096
0
  case 236: \
10097
0
    tmp = fieldname(insn, 11, 5); \
10098
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10099
0
    tmp = fieldname(insn, 16, 5); \
10100
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10101
0
    tmp = fieldname(insn, 0, 3); \
10102
0
    MCOperand_CreateImm0(MI, tmp); \
10103
0
    return S; \
10104
0
  case 237: \
10105
0
    tmp = fieldname(insn, 6, 5); \
10106
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10107
0
    tmp = fieldname(insn, 21, 5); \
10108
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10109
0
    tmp = fieldname(insn, 16, 5); \
10110
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10111
0
    return S; \
10112
0
  case 238: \
10113
0
    tmp = fieldname(insn, 6, 5); \
10114
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10115
0
    tmp = fieldname(insn, 21, 5); \
10116
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10117
0
    tmp = fieldname(insn, 16, 5); \
10118
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10119
0
    return S; \
10120
0
  case 239: \
10121
0
    tmp = fieldname(insn, 11, 5); \
10122
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10123
0
    tmp = fieldname(insn, 21, 5); \
10124
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10125
0
    tmp = fieldname(insn, 16, 5); \
10126
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10127
0
    return S; \
10128
0
  case 240: \
10129
0
    tmp = fieldname(insn, 11, 5); \
10130
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10131
0
    tmp = fieldname(insn, 21, 5); \
10132
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10133
0
    tmp = fieldname(insn, 16, 5); \
10134
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10135
0
    return S; \
10136
0
  case 241: \
10137
0
    tmp = fieldname(insn, 6, 5); \
10138
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10139
0
    tmp = fieldname(insn, 21, 5); \
10140
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10141
0
    tmp = fieldname(insn, 11, 5); \
10142
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10143
0
    tmp = fieldname(insn, 16, 5); \
10144
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10145
0
    return S; \
10146
0
  case 242: \
10147
0
    tmp = fieldname(insn, 6, 5); \
10148
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10149
0
    tmp = fieldname(insn, 21, 5); \
10150
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10151
0
    tmp = fieldname(insn, 11, 5); \
10152
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10153
0
    tmp = fieldname(insn, 16, 5); \
10154
0
    if (!Check(&S, DecodeAFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10155
0
    return S; \
10156
0
  case 243: \
10157
0
    tmp = fieldname(insn, 11, 2); \
10158
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10159
0
    tmp = fieldname(insn, 21, 5); \
10160
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10161
0
    tmp = fieldname(insn, 16, 5); \
10162
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10163
0
    tmp = fieldname(insn, 11, 2); \
10164
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10165
0
    return S; \
10166
0
  case 244: \
10167
0
    tmp = 0x0; \
10168
0
    tmp |= fieldname(insn, 11, 5) << 0; \
10169
0
    tmp |= fieldname(insn, 16, 5) << 0; \
10170
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10171
0
    tmp = fieldname(insn, 21, 5); \
10172
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10173
0
    return S; \
10174
0
  case 245: \
10175
0
    tmp = fieldname(insn, 6, 5); \
10176
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10177
0
    tmp = fieldname(insn, 11, 5); \
10178
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10179
0
    tmp = fieldname(insn, 16, 8); \
10180
0
    MCOperand_CreateImm0(MI, tmp); \
10181
0
    return S; \
10182
0
  case 246: \
10183
0
    tmp = fieldname(insn, 6, 5); \
10184
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10185
0
    tmp = fieldname(insn, 6, 5); \
10186
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10187
0
    tmp = fieldname(insn, 11, 5); \
10188
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10189
0
    tmp = fieldname(insn, 16, 8); \
10190
0
    MCOperand_CreateImm0(MI, tmp); \
10191
0
    return S; \
10192
0
  case 247: \
10193
0
    tmp = fieldname(insn, 6, 5); \
10194
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10195
0
    tmp = fieldname(insn, 11, 5); \
10196
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10197
0
    tmp = fieldname(insn, 16, 8); \
10198
0
    MCOperand_CreateImm0(MI, tmp); \
10199
0
    return S; \
10200
0
  case 248: \
10201
0
    tmp = fieldname(insn, 6, 5); \
10202
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10203
0
    tmp = fieldname(insn, 11, 5); \
10204
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10205
0
    tmp = fieldname(insn, 16, 8); \
10206
0
    MCOperand_CreateImm0(MI, tmp); \
10207
0
    return S; \
10208
0
  case 249: \
10209
0
    tmp = fieldname(insn, 6, 5); \
10210
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10211
0
    tmp = fieldname(insn, 11, 5); \
10212
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10213
0
    tmp = fieldname(insn, 16, 5); \
10214
0
    MCOperand_CreateImm0(MI, tmp); \
10215
0
    return S; \
10216
0
  case 250: \
10217
0
    tmp = fieldname(insn, 6, 5); \
10218
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10219
0
    tmp = fieldname(insn, 11, 5); \
10220
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10221
0
    tmp = fieldname(insn, 16, 5); \
10222
0
    MCOperand_CreateImm0(MI, tmp); \
10223
0
    return S; \
10224
0
  case 251: \
10225
0
    tmp = fieldname(insn, 6, 5); \
10226
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10227
0
    tmp = fieldname(insn, 11, 5); \
10228
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10229
0
    tmp = fieldname(insn, 16, 5); \
10230
0
    MCOperand_CreateImm0(MI, tmp); \
10231
0
    return S; \
10232
0
  case 252: \
10233
0
    tmp = fieldname(insn, 6, 5); \
10234
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10235
0
    tmp = fieldname(insn, 11, 5); \
10236
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10237
0
    tmp = fieldname(insn, 16, 5); \
10238
0
    MCOperand_CreateImm0(MI, tmp); \
10239
0
    return S; \
10240
0
  case 253: \
10241
0
    tmp = fieldname(insn, 6, 5); \
10242
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10243
0
    tmp = fieldname(insn, 11, 10); \
10244
0
    MCOperand_CreateImm0(MI, tmp); \
10245
0
    return S; \
10246
0
  case 254: \
10247
0
    tmp = fieldname(insn, 6, 5); \
10248
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10249
0
    tmp = fieldname(insn, 11, 10); \
10250
0
    MCOperand_CreateImm0(MI, tmp); \
10251
0
    return S; \
10252
0
  case 255: \
10253
0
    tmp = fieldname(insn, 6, 5); \
10254
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10255
0
    tmp = fieldname(insn, 11, 10); \
10256
0
    MCOperand_CreateImm0(MI, tmp); \
10257
0
    return S; \
10258
0
  case 256: \
10259
0
    tmp = fieldname(insn, 6, 5); \
10260
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10261
0
    tmp = fieldname(insn, 11, 10); \
10262
0
    MCOperand_CreateImm0(MI, tmp); \
10263
0
    return S; \
10264
0
  case 257: \
10265
0
    tmp = fieldname(insn, 6, 5); \
10266
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10267
0
    tmp = fieldname(insn, 11, 5); \
10268
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10269
0
    tmp = fieldname(insn, 16, 6); \
10270
0
    MCOperand_CreateImm0(MI, tmp); \
10271
0
    return S; \
10272
0
  case 258: \
10273
0
    tmp = fieldname(insn, 6, 5); \
10274
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10275
0
    tmp = fieldname(insn, 11, 5); \
10276
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10277
0
    tmp = fieldname(insn, 16, 4); \
10278
0
    MCOperand_CreateImm0(MI, tmp); \
10279
0
    return S; \
10280
0
  case 259: \
10281
0
    tmp = fieldname(insn, 6, 5); \
10282
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10283
0
    tmp = fieldname(insn, 11, 5); \
10284
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10285
0
    tmp = fieldname(insn, 16, 3); \
10286
0
    MCOperand_CreateImm0(MI, tmp); \
10287
0
    return S; \
10288
0
  case 260: \
10289
0
    tmp = fieldname(insn, 6, 5); \
10290
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10291
0
    tmp = fieldname(insn, 6, 5); \
10292
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10293
0
    tmp = fieldname(insn, 11, 5); \
10294
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10295
0
    tmp = fieldname(insn, 16, 6); \
10296
0
    MCOperand_CreateImm0(MI, tmp); \
10297
0
    return S; \
10298
0
  case 261: \
10299
0
    tmp = fieldname(insn, 6, 5); \
10300
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10301
0
    tmp = fieldname(insn, 6, 5); \
10302
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10303
0
    tmp = fieldname(insn, 11, 5); \
10304
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10305
0
    tmp = fieldname(insn, 16, 5); \
10306
0
    MCOperand_CreateImm0(MI, tmp); \
10307
0
    return S; \
10308
0
  case 262: \
10309
0
    tmp = fieldname(insn, 6, 5); \
10310
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10311
0
    tmp = fieldname(insn, 6, 5); \
10312
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10313
0
    tmp = fieldname(insn, 11, 5); \
10314
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10315
0
    tmp = fieldname(insn, 16, 4); \
10316
0
    MCOperand_CreateImm0(MI, tmp); \
10317
0
    return S; \
10318
0
  case 263: \
10319
0
    tmp = fieldname(insn, 6, 5); \
10320
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10321
0
    tmp = fieldname(insn, 6, 5); \
10322
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10323
0
    tmp = fieldname(insn, 11, 5); \
10324
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10325
0
    tmp = fieldname(insn, 16, 3); \
10326
0
    MCOperand_CreateImm0(MI, tmp); \
10327
0
    return S; \
10328
0
  case 264: \
10329
0
    tmp = fieldname(insn, 6, 5); \
10330
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10331
0
    tmp = fieldname(insn, 11, 5); \
10332
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10333
0
    tmp = fieldname(insn, 16, 5); \
10334
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10335
0
    return S; \
10336
0
  case 265: \
10337
0
    tmp = fieldname(insn, 6, 5); \
10338
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10339
0
    tmp = fieldname(insn, 11, 5); \
10340
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10341
0
    tmp = fieldname(insn, 16, 5); \
10342
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10343
0
    return S; \
10344
0
  case 266: \
10345
0
    tmp = fieldname(insn, 6, 5); \
10346
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10347
0
    tmp = fieldname(insn, 11, 5); \
10348
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10349
0
    tmp = fieldname(insn, 16, 5); \
10350
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10351
0
    return S; \
10352
0
  case 267: \
10353
0
    tmp = fieldname(insn, 6, 5); \
10354
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10355
0
    tmp = fieldname(insn, 11, 5); \
10356
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10357
0
    tmp = fieldname(insn, 16, 5); \
10358
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10359
0
    return S; \
10360
0
  case 268: \
10361
0
    tmp = fieldname(insn, 6, 5); \
10362
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10363
0
    tmp = fieldname(insn, 6, 5); \
10364
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10365
0
    tmp = fieldname(insn, 11, 5); \
10366
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10367
0
    tmp = fieldname(insn, 16, 5); \
10368
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10369
0
    return S; \
10370
0
  case 269: \
10371
0
    tmp = fieldname(insn, 6, 5); \
10372
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10373
0
    tmp = fieldname(insn, 6, 5); \
10374
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10375
0
    tmp = fieldname(insn, 11, 5); \
10376
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10377
0
    tmp = fieldname(insn, 16, 5); \
10378
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10379
0
    return S; \
10380
0
  case 270: \
10381
0
    tmp = fieldname(insn, 6, 5); \
10382
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10383
0
    tmp = fieldname(insn, 6, 5); \
10384
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10385
0
    tmp = fieldname(insn, 11, 5); \
10386
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10387
0
    tmp = fieldname(insn, 16, 5); \
10388
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10389
0
    return S; \
10390
0
  case 271: \
10391
0
    tmp = fieldname(insn, 6, 5); \
10392
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10393
0
    tmp = fieldname(insn, 6, 5); \
10394
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10395
0
    tmp = fieldname(insn, 11, 5); \
10396
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10397
0
    tmp = fieldname(insn, 16, 5); \
10398
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10399
0
    return S; \
10400
0
  case 272: \
10401
0
    tmp = fieldname(insn, 6, 5); \
10402
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10403
0
    tmp = fieldname(insn, 11, 5); \
10404
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10405
0
    tmp = fieldname(insn, 16, 5); \
10406
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10407
0
    return S; \
10408
0
  case 273: \
10409
0
    tmp = fieldname(insn, 6, 5); \
10410
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10411
0
    tmp = fieldname(insn, 11, 5); \
10412
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10413
0
    tmp = fieldname(insn, 16, 5); \
10414
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10415
0
    return S; \
10416
0
  case 274: \
10417
0
    tmp = fieldname(insn, 6, 5); \
10418
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10419
0
    tmp = fieldname(insn, 11, 5); \
10420
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10421
0
    tmp = fieldname(insn, 16, 5); \
10422
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10423
0
    return S; \
10424
0
  case 275: \
10425
0
    tmp = fieldname(insn, 6, 5); \
10426
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10427
0
    tmp = fieldname(insn, 6, 5); \
10428
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10429
0
    tmp = fieldname(insn, 11, 5); \
10430
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10431
0
    tmp = fieldname(insn, 16, 5); \
10432
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10433
0
    return S; \
10434
0
  case 276: \
10435
0
    tmp = fieldname(insn, 6, 5); \
10436
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10437
0
    tmp = fieldname(insn, 6, 5); \
10438
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10439
0
    tmp = fieldname(insn, 11, 5); \
10440
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10441
0
    tmp = fieldname(insn, 16, 5); \
10442
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10443
0
    return S; \
10444
0
  case 277: \
10445
0
    tmp = fieldname(insn, 6, 5); \
10446
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10447
0
    tmp = fieldname(insn, 6, 5); \
10448
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10449
0
    tmp = fieldname(insn, 11, 5); \
10450
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10451
0
    tmp = fieldname(insn, 16, 5); \
10452
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10453
0
    return S; \
10454
0
  case 278: \
10455
0
    tmp = fieldname(insn, 6, 5); \
10456
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10457
0
    tmp = fieldname(insn, 6, 5); \
10458
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10459
0
    tmp = fieldname(insn, 11, 5); \
10460
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10461
0
    tmp = fieldname(insn, 16, 5); \
10462
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10463
0
    return S; \
10464
0
  case 279: \
10465
0
    tmp = fieldname(insn, 6, 5); \
10466
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10467
0
    tmp = fieldname(insn, 6, 5); \
10468
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10469
0
    tmp = fieldname(insn, 11, 5); \
10470
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10471
0
    tmp = fieldname(insn, 16, 5); \
10472
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10473
0
    return S; \
10474
0
  case 280: \
10475
0
    tmp = fieldname(insn, 6, 5); \
10476
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10477
0
    tmp = fieldname(insn, 6, 5); \
10478
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10479
0
    tmp = fieldname(insn, 11, 5); \
10480
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10481
0
    tmp = fieldname(insn, 16, 5); \
10482
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10483
0
    return S; \
10484
0
  case 281: \
10485
0
    tmp = fieldname(insn, 6, 5); \
10486
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10487
0
    tmp = fieldname(insn, 6, 5); \
10488
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10489
0
    tmp = fieldname(insn, 11, 5); \
10490
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10491
0
    tmp = fieldname(insn, 16, 5); \
10492
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10493
0
    return S; \
10494
0
  case 282: \
10495
0
    tmp = fieldname(insn, 6, 5); \
10496
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10497
0
    tmp = fieldname(insn, 11, 5); \
10498
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10499
0
    tmp = fieldname(insn, 16, 5); \
10500
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10501
0
    return S; \
10502
0
  case 283: \
10503
0
    tmp = fieldname(insn, 6, 5); \
10504
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10505
0
    tmp = fieldname(insn, 11, 5); \
10506
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10507
0
    tmp = fieldname(insn, 16, 5); \
10508
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10509
0
    return S; \
10510
0
  case 284: \
10511
0
    tmp = fieldname(insn, 6, 5); \
10512
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10513
0
    tmp = fieldname(insn, 11, 5); \
10514
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10515
0
    tmp = fieldname(insn, 16, 5); \
10516
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10517
0
    return S; \
10518
0
  case 285: \
10519
0
    tmp = fieldname(insn, 6, 5); \
10520
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10521
0
    tmp = fieldname(insn, 11, 5); \
10522
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10523
0
    tmp = fieldname(insn, 16, 5); \
10524
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10525
0
    return S; \
10526
0
  case 286: \
10527
0
    tmp = fieldname(insn, 6, 5); \
10528
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10529
0
    tmp = fieldname(insn, 6, 5); \
10530
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10531
0
    tmp = fieldname(insn, 11, 5); \
10532
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10533
0
    tmp = fieldname(insn, 16, 4); \
10534
0
    MCOperand_CreateImm0(MI, tmp); \
10535
0
    return S; \
10536
0
  case 287: \
10537
0
    tmp = fieldname(insn, 6, 5); \
10538
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10539
0
    tmp = fieldname(insn, 6, 5); \
10540
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10541
0
    tmp = fieldname(insn, 11, 5); \
10542
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10543
0
    tmp = fieldname(insn, 16, 3); \
10544
0
    MCOperand_CreateImm0(MI, tmp); \
10545
0
    return S; \
10546
0
  case 288: \
10547
0
    tmp = fieldname(insn, 6, 5); \
10548
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10549
0
    tmp = fieldname(insn, 6, 5); \
10550
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10551
0
    tmp = fieldname(insn, 11, 5); \
10552
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10553
0
    tmp = fieldname(insn, 16, 2); \
10554
0
    MCOperand_CreateImm0(MI, tmp); \
10555
0
    return S; \
10556
0
  case 289: \
10557
0
    tmp = fieldname(insn, 6, 5); \
10558
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10559
0
    tmp = fieldname(insn, 6, 5); \
10560
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10561
0
    tmp = fieldname(insn, 11, 5); \
10562
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10563
0
    tmp = fieldname(insn, 16, 1); \
10564
0
    MCOperand_CreateImm0(MI, tmp); \
10565
0
    return S; \
10566
0
  case 290: \
10567
0
    tmp = fieldname(insn, 6, 5); \
10568
0
    if (!Check(&S, DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10569
0
    tmp = fieldname(insn, 11, 5); \
10570
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10571
0
    return S; \
10572
0
  case 291: \
10573
0
    tmp = fieldname(insn, 6, 5); \
10574
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10575
0
    tmp = fieldname(insn, 11, 5); \
10576
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10577
0
    tmp = fieldname(insn, 16, 4); \
10578
0
    MCOperand_CreateImm0(MI, tmp); \
10579
0
    return S; \
10580
0
  case 292: \
10581
0
    tmp = fieldname(insn, 6, 5); \
10582
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10583
0
    tmp = fieldname(insn, 11, 5); \
10584
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10585
0
    tmp = fieldname(insn, 16, 3); \
10586
0
    MCOperand_CreateImm0(MI, tmp); \
10587
0
    return S; \
10588
0
  case 293: \
10589
0
    tmp = fieldname(insn, 6, 5); \
10590
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10591
0
    tmp = fieldname(insn, 11, 5); \
10592
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10593
0
    tmp = fieldname(insn, 16, 2); \
10594
0
    MCOperand_CreateImm0(MI, tmp); \
10595
0
    return S; \
10596
0
  case 294: \
10597
0
    tmp = fieldname(insn, 6, 5); \
10598
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10599
0
    tmp = fieldname(insn, 11, 5); \
10600
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10601
0
    tmp = fieldname(insn, 16, 1); \
10602
0
    MCOperand_CreateImm0(MI, tmp); \
10603
0
    return S; \
10604
0
  case 295: \
10605
0
    tmp = fieldname(insn, 6, 5); \
10606
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10607
0
    tmp = fieldname(insn, 11, 5); \
10608
0
    if (!Check(&S, DecodeMSACtrlRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10609
0
    return S; \
10610
0
  case 296: \
10611
0
    tmp = fieldname(insn, 6, 5); \
10612
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10613
0
    tmp = fieldname(insn, 11, 5); \
10614
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10615
0
    tmp = fieldname(insn, 16, 4); \
10616
0
    MCOperand_CreateImm0(MI, tmp); \
10617
0
    return S; \
10618
0
  case 297: \
10619
0
    tmp = fieldname(insn, 6, 5); \
10620
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10621
0
    tmp = fieldname(insn, 11, 5); \
10622
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10623
0
    tmp = fieldname(insn, 16, 3); \
10624
0
    MCOperand_CreateImm0(MI, tmp); \
10625
0
    return S; \
10626
0
  case 298: \
10627
0
    tmp = fieldname(insn, 6, 5); \
10628
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10629
0
    tmp = fieldname(insn, 11, 5); \
10630
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10631
0
    tmp = fieldname(insn, 16, 2); \
10632
0
    MCOperand_CreateImm0(MI, tmp); \
10633
0
    return S; \
10634
0
  case 299: \
10635
0
    tmp = fieldname(insn, 6, 5); \
10636
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10637
0
    tmp = fieldname(insn, 11, 5); \
10638
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10639
0
    tmp = fieldname(insn, 16, 1); \
10640
0
    MCOperand_CreateImm0(MI, tmp); \
10641
0
    return S; \
10642
0
  case 300: \
10643
0
    tmp = fieldname(insn, 6, 5); \
10644
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10645
0
    tmp = fieldname(insn, 11, 5); \
10646
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10647
0
    return S; \
10648
0
  case 301: \
10649
0
    tmp = fieldname(insn, 6, 5); \
10650
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10651
0
    tmp = fieldname(insn, 6, 5); \
10652
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10653
0
    tmp = fieldname(insn, 11, 5); \
10654
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10655
0
    tmp = fieldname(insn, 16, 4); \
10656
0
    MCOperand_CreateImm0(MI, tmp); \
10657
0
    return S; \
10658
0
  case 302: \
10659
0
    tmp = fieldname(insn, 6, 5); \
10660
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10661
0
    tmp = fieldname(insn, 6, 5); \
10662
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10663
0
    tmp = fieldname(insn, 11, 5); \
10664
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10665
0
    tmp = fieldname(insn, 16, 3); \
10666
0
    MCOperand_CreateImm0(MI, tmp); \
10667
0
    return S; \
10668
0
  case 303: \
10669
0
    tmp = fieldname(insn, 6, 5); \
10670
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10671
0
    tmp = fieldname(insn, 6, 5); \
10672
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10673
0
    tmp = fieldname(insn, 11, 5); \
10674
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10675
0
    tmp = fieldname(insn, 16, 2); \
10676
0
    MCOperand_CreateImm0(MI, tmp); \
10677
0
    return S; \
10678
0
  case 304: \
10679
0
    tmp = fieldname(insn, 6, 5); \
10680
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10681
0
    tmp = fieldname(insn, 6, 5); \
10682
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10683
0
    tmp = fieldname(insn, 11, 5); \
10684
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10685
0
    tmp = fieldname(insn, 16, 1); \
10686
0
    MCOperand_CreateImm0(MI, tmp); \
10687
0
    return S; \
10688
0
  case 305: \
10689
0
    if (!Check(&S, DecodeINSVE_DF(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10690
0
    return S; \
10691
0
  case 306: \
10692
0
    tmp = fieldname(insn, 6, 5); \
10693
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10694
0
    tmp = fieldname(insn, 11, 5); \
10695
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10696
0
    tmp = fieldname(insn, 16, 5); \
10697
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10698
0
    return S; \
10699
0
  case 307: \
10700
0
    tmp = fieldname(insn, 6, 5); \
10701
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10702
0
    tmp = fieldname(insn, 11, 5); \
10703
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10704
0
    tmp = fieldname(insn, 16, 5); \
10705
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10706
0
    return S; \
10707
0
  case 308: \
10708
0
    tmp = fieldname(insn, 6, 5); \
10709
0
    if (!Check(&S, DecodeMSA128BRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10710
0
    tmp = fieldname(insn, 11, 5); \
10711
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10712
0
    return S; \
10713
0
  case 309: \
10714
0
    tmp = fieldname(insn, 6, 5); \
10715
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10716
0
    tmp = fieldname(insn, 11, 5); \
10717
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10718
0
    return S; \
10719
0
  case 310: \
10720
0
    tmp = fieldname(insn, 6, 5); \
10721
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10722
0
    tmp = fieldname(insn, 11, 5); \
10723
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10724
0
    return S; \
10725
0
  case 311: \
10726
0
    tmp = fieldname(insn, 6, 5); \
10727
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10728
0
    tmp = fieldname(insn, 11, 5); \
10729
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10730
0
    return S; \
10731
0
  case 312: \
10732
0
    tmp = fieldname(insn, 6, 5); \
10733
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10734
0
    tmp = fieldname(insn, 11, 5); \
10735
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10736
0
    return S; \
10737
0
  case 313: \
10738
0
    tmp = fieldname(insn, 6, 5); \
10739
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10740
0
    tmp = fieldname(insn, 11, 5); \
10741
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10742
0
    return S; \
10743
0
  case 314: \
10744
0
    tmp = fieldname(insn, 6, 5); \
10745
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10746
0
    tmp = fieldname(insn, 11, 5); \
10747
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10748
0
    return S; \
10749
0
  case 315: \
10750
0
    tmp = fieldname(insn, 6, 5); \
10751
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10752
0
    tmp = fieldname(insn, 11, 5); \
10753
0
    if (!Check(&S, DecodeMSA128HRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10754
0
    return S; \
10755
0
  case 316: \
10756
0
    tmp = fieldname(insn, 6, 5); \
10757
0
    if (!Check(&S, DecodeMSA128DRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10758
0
    tmp = fieldname(insn, 11, 5); \
10759
0
    if (!Check(&S, DecodeMSA128WRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10760
0
    return S; \
10761
0
  case 317: \
10762
0
    if (!Check(&S, DecodeMSA128Mem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10763
0
    return S; \
10764
0
  case 318: \
10765
0
    tmp = fieldname(insn, 16, 5); \
10766
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10767
0
    tmp = fieldname(insn, 21, 5); \
10768
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10769
0
    tmp = fieldname(insn, 6, 5); \
10770
0
    MCOperand_CreateImm0(MI, tmp); \
10771
0
    tmp = fieldname(insn, 11, 5); \
10772
0
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10773
0
    return S; \
10774
0
  case 319: \
10775
0
    tmp = fieldname(insn, 16, 5); \
10776
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10777
0
    tmp = fieldname(insn, 21, 5); \
10778
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10779
0
    tmp = fieldname(insn, 6, 5); \
10780
0
    MCOperand_CreateImm0(MI, tmp); \
10781
0
    tmp = fieldname(insn, 11, 5); \
10782
0
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10783
0
    tmp = fieldname(insn, 16, 5); \
10784
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10785
0
    return S; \
10786
0
  case 320: \
10787
0
    tmp = fieldname(insn, 21, 5); \
10788
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10789
0
    tmp = fieldname(insn, 11, 5); \
10790
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10791
0
    tmp = fieldname(insn, 16, 5); \
10792
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10793
0
    return S; \
10794
0
  case 321: \
10795
0
    tmp = fieldname(insn, 11, 5); \
10796
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10797
0
    tmp = fieldname(insn, 21, 5); \
10798
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10799
0
    tmp = fieldname(insn, 16, 5); \
10800
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10801
0
    return S; \
10802
0
  case 322: \
10803
0
    tmp = fieldname(insn, 16, 5); \
10804
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10805
0
    tmp = fieldname(insn, 16, 5); \
10806
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10807
0
    tmp = fieldname(insn, 21, 5); \
10808
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10809
0
    return S; \
10810
0
  case 323: \
10811
0
    tmp = fieldname(insn, 11, 5); \
10812
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10813
0
    tmp = fieldname(insn, 21, 5); \
10814
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10815
0
    tmp = fieldname(insn, 16, 5); \
10816
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10817
0
    return S; \
10818
0
  case 324: \
10819
0
    tmp = fieldname(insn, 11, 5); \
10820
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10821
0
    tmp = fieldname(insn, 21, 5); \
10822
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10823
0
    return S; \
10824
0
  case 325: \
10825
0
    tmp = fieldname(insn, 11, 5); \
10826
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10827
0
    tmp = fieldname(insn, 21, 5); \
10828
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10829
0
    tmp = fieldname(insn, 16, 5); \
10830
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10831
0
    return S; \
10832
0
  case 326: \
10833
0
    tmp = fieldname(insn, 11, 5); \
10834
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10835
0
    tmp = fieldname(insn, 21, 5); \
10836
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10837
0
    tmp = fieldname(insn, 16, 5); \
10838
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10839
0
    return S; \
10840
0
  case 327: \
10841
0
    tmp = fieldname(insn, 16, 5); \
10842
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10843
0
    tmp = fieldname(insn, 21, 5); \
10844
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10845
0
    tmp = fieldname(insn, 11, 5); \
10846
0
    MCOperand_CreateImm0(MI, tmp); \
10847
0
    tmp = fieldname(insn, 16, 5); \
10848
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10849
0
    return S; \
10850
0
  case 328: \
10851
0
    tmp = fieldname(insn, 11, 5); \
10852
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10853
0
    tmp = fieldname(insn, 16, 5); \
10854
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10855
0
    return S; \
10856
0
  case 329: \
10857
0
    tmp = fieldname(insn, 11, 5); \
10858
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10859
0
    tmp = fieldname(insn, 16, 10); \
10860
0
    MCOperand_CreateImm0(MI, tmp); \
10861
0
    return S; \
10862
0
  case 330: \
10863
0
    tmp = fieldname(insn, 11, 5); \
10864
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10865
0
    tmp = fieldname(insn, 16, 5); \
10866
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10867
0
    return S; \
10868
0
  case 331: \
10869
0
    tmp = fieldname(insn, 11, 5); \
10870
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10871
0
    tmp = fieldname(insn, 16, 5); \
10872
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10873
0
    return S; \
10874
0
  case 332: \
10875
0
    tmp = fieldname(insn, 11, 5); \
10876
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10877
0
    tmp = fieldname(insn, 16, 5); \
10878
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10879
0
    return S; \
10880
0
  case 333: \
10881
0
    tmp = fieldname(insn, 11, 5); \
10882
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10883
0
    tmp = fieldname(insn, 16, 5); \
10884
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10885
0
    tmp = fieldname(insn, 21, 5); \
10886
0
    MCOperand_CreateImm0(MI, tmp); \
10887
0
    return S; \
10888
0
  case 334: \
10889
0
    tmp = fieldname(insn, 11, 5); \
10890
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10891
0
    tmp = fieldname(insn, 16, 5); \
10892
0
    if (!Check(&S, DecodeDSPRRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10893
0
    tmp = fieldname(insn, 21, 5); \
10894
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10895
0
    return S; \
10896
0
  case 335: \
10897
0
    tmp = fieldname(insn, 11, 5); \
10898
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10899
0
    tmp = fieldname(insn, 16, 5); \
10900
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10901
0
    tmp = fieldname(insn, 21, 5); \
10902
0
    MCOperand_CreateImm0(MI, tmp); \
10903
0
    return S; \
10904
0
  case 336: \
10905
0
    if (!Check(&S, DecodeMemEVA(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10906
0
    return S; \
10907
0
  case 337: \
10908
0
    if (!Check(&S, DecodeCacheeOp_CacheOpR6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10909
0
    return S; \
10910
0
  case 338: \
10911
0
    tmp = fieldname(insn, 16, 5); \
10912
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10913
0
    tmp = fieldname(insn, 21, 5); \
10914
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10915
0
    tmp = fieldname(insn, 11, 5); \
10916
0
    MCOperand_CreateImm0(MI, tmp); \
10917
0
    tmp = fieldname(insn, 16, 5); \
10918
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10919
0
    return S; \
10920
0
  case 339: \
10921
0
    tmp = fieldname(insn, 16, 5); \
10922
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10923
0
    tmp = fieldname(insn, 11, 2); \
10924
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10925
0
    tmp = fieldname(insn, 21, 5); \
10926
0
    MCOperand_CreateImm0(MI, tmp); \
10927
0
    return S; \
10928
0
  case 340: \
10929
0
    tmp = fieldname(insn, 16, 5); \
10930
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10931
0
    tmp = fieldname(insn, 11, 2); \
10932
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10933
0
    tmp = fieldname(insn, 21, 5); \
10934
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10935
0
    return S; \
10936
0
  case 341: \
10937
0
    tmp = fieldname(insn, 11, 5); \
10938
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10939
0
    tmp = fieldname(insn, 16, 10); \
10940
0
    MCOperand_CreateImm0(MI, tmp); \
10941
0
    return S; \
10942
0
  case 342: \
10943
0
    tmp = fieldname(insn, 21, 5); \
10944
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10945
0
    tmp = fieldname(insn, 11, 10); \
10946
0
    MCOperand_CreateImm0(MI, tmp); \
10947
0
    return S; \
10948
0
  case 343: \
10949
0
    tmp = fieldname(insn, 11, 2); \
10950
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10951
0
    tmp = fieldname(insn, 20, 6); \
10952
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_6_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10953
0
    tmp = fieldname(insn, 11, 2); \
10954
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10955
0
    return S; \
10956
0
  case 344: \
10957
0
    tmp = fieldname(insn, 11, 2); \
10958
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10959
0
    tmp = fieldname(insn, 21, 5); \
10960
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10961
0
    tmp = fieldname(insn, 11, 2); \
10962
0
    if (!Check(&S, DecodeACC64DSPRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10963
0
    return S; \
10964
0
  case 345: \
10965
0
    tmp = fieldname(insn, 16, 5); \
10966
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10967
0
    tmp = fieldname(insn, 11, 5); \
10968
0
    if (!Check(&S, DecodeHWRegsRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
10969
0
    tmp = fieldname(insn, 6, 3); \
10970
0
    MCOperand_CreateImm0(MI, tmp); \
10971
0
    return S; \
10972
0
  case 346: \
10973
0
    if (!Check(&S, DecodeCacheOp(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10974
0
    return S; \
10975
0
  case 347: \
10976
0
    if (!Check(&S, DecodeFMem(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10977
0
    return S; \
10978
0
  case 348: \
10979
0
    if (!Check(&S, DecodeFMem2(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10980
0
    return S; \
10981
0
  case 349: \
10982
0
    if (!Check(&S, DecodeDAHIDATI(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10983
0
    return S; \
10984
0
  case 350: \
10985
0
    tmp = fieldname(insn, 0, 16); \
10986
0
    MCOperand_CreateImm0(MI, tmp); \
10987
0
    return S; \
10988
0
  case 351: \
10989
0
    if (!Check(&S, DecodeBlezGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10990
0
    return S; \
10991
0
  case 352: \
10992
0
    if (!Check(&S, DecodeBgtzGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10993
0
    return S; \
10994
0
  case 353: \
10995
0
    if (!Check(&S, DecodeAddiGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
10996
0
    return S; \
10997
0
  case 354: \
10998
0
    tmp = fieldname(insn, 16, 5); \
10999
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11000
0
    tmp = fieldname(insn, 0, 16); \
11001
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11002
0
    return S; \
11003
0
  case 355: \
11004
0
    tmp = fieldname(insn, 6, 5); \
11005
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11006
0
    tmp = fieldname(insn, 6, 5); \
11007
0
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11008
0
    tmp = fieldname(insn, 11, 5); \
11009
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11010
0
    tmp = fieldname(insn, 16, 5); \
11011
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11012
0
    return S; \
11013
0
  case 356: \
11014
0
    tmp = fieldname(insn, 6, 5); \
11015
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11016
0
    tmp = fieldname(insn, 6, 5); \
11017
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11018
0
    tmp = fieldname(insn, 11, 5); \
11019
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11020
0
    tmp = fieldname(insn, 16, 5); \
11021
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11022
0
    return S; \
11023
0
  case 357: \
11024
0
    tmp = fieldname(insn, 6, 5); \
11025
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11026
0
    tmp = fieldname(insn, 6, 5); \
11027
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11028
0
    tmp = fieldname(insn, 11, 5); \
11029
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11030
0
    tmp = fieldname(insn, 16, 5); \
11031
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11032
0
    return S; \
11033
0
  case 358: \
11034
0
    tmp = fieldname(insn, 6, 5); \
11035
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11036
0
    tmp = fieldname(insn, 11, 5); \
11037
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11038
0
    tmp = fieldname(insn, 16, 5); \
11039
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11040
0
    return S; \
11041
0
  case 359: \
11042
0
    tmp = fieldname(insn, 6, 5); \
11043
0
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11044
0
    tmp = fieldname(insn, 11, 5); \
11045
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11046
0
    tmp = fieldname(insn, 16, 5); \
11047
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11048
0
    return S; \
11049
0
  case 360: \
11050
0
    tmp = fieldname(insn, 6, 5); \
11051
0
    if (!Check(&S, DecodeFGRCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11052
0
    tmp = fieldname(insn, 11, 5); \
11053
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11054
0
    tmp = fieldname(insn, 16, 5); \
11055
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11056
0
    return S; \
11057
0
  case 361: \
11058
0
    tmp = fieldname(insn, 16, 5); \
11059
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11060
0
    tmp = fieldname(insn, 0, 16); \
11061
0
    if (!Check(&S, DecodeBranchTarget(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11062
0
    return S; \
11063
0
  case 362: \
11064
0
    if (!Check(&S, DecodeFMemCop2R6(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11065
0
    return S; \
11066
0
  case 363: \
11067
0
    if (!Check(&S, DecodeBlezlGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11068
0
    return S; \
11069
0
  case 364: \
11070
0
    if (!Check(&S, DecodeBgtzlGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11071
0
    return S; \
11072
0
  case 365: \
11073
0
    if (!Check(&S, DecodeDaddiGroupBranch(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11074
0
    return S; \
11075
0
  case 366: \
11076
0
    tmp = fieldname(insn, 16, 5); \
11077
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11078
0
    tmp = fieldname(insn, 21, 5); \
11079
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11080
0
    tmp = fieldname(insn, 0, 16); \
11081
0
    MCOperand_CreateImm0(MI, tmp); \
11082
0
    return S; \
11083
0
  case 367: \
11084
0
    if (!Check(&S, DecodeCRC(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11085
0
    return S; \
11086
0
  case 368: \
11087
0
    tmp = fieldname(insn, 11, 5); \
11088
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11089
0
    tmp = fieldname(insn, 21, 5); \
11090
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11091
0
    tmp = fieldname(insn, 16, 5); \
11092
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11093
0
    tmp = fieldname(insn, 6, 2); \
11094
0
    MCOperand_CreateImm0(MI, tmp); \
11095
0
    return S; \
11096
0
  case 369: \
11097
0
    tmp = fieldname(insn, 11, 5); \
11098
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11099
0
    tmp = fieldname(insn, 16, 5); \
11100
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11101
0
    return S; \
11102
0
  case 370: \
11103
0
    tmp = fieldname(insn, 11, 5); \
11104
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11105
0
    tmp = fieldname(insn, 21, 5); \
11106
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11107
0
    tmp = fieldname(insn, 16, 5); \
11108
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11109
0
    tmp = fieldname(insn, 6, 3); \
11110
0
    MCOperand_CreateImm0(MI, tmp); \
11111
0
    return S; \
11112
0
  case 371: \
11113
0
    if (!Check(&S, DecodeSpecial3LlSc(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11114
0
    return S; \
11115
0
  case 372: \
11116
0
    tmp = fieldname(insn, 21, 5); \
11117
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11118
0
    tmp = fieldname(insn, 8, 2); \
11119
0
    MCOperand_CreateImm0(MI, tmp); \
11120
0
    return S; \
11121
0
  case 373: \
11122
0
    tmp = fieldname(insn, 0, 26); \
11123
0
    if (!Check(&S, DecodeBranchTarget26(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11124
0
    return S; \
11125
0
  case 374: \
11126
0
    tmp = fieldname(insn, 21, 5); \
11127
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11128
0
    tmp = fieldname(insn, 0, 21); \
11129
0
    if (!Check(&S, DecodeBranchTarget21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11130
0
    return S; \
11131
0
  case 375: \
11132
0
    tmp = fieldname(insn, 21, 5); \
11133
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11134
0
    tmp = fieldname(insn, 0, 18); \
11135
0
    if (!Check(&S, DecodeSimm18Lsl3(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11136
0
    return S; \
11137
0
  case 376: \
11138
0
    tmp = fieldname(insn, 21, 5); \
11139
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11140
0
    tmp = fieldname(insn, 0, 21); \
11141
0
    if (!Check(&S, DecodeBranchTarget21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11142
0
    return S; \
11143
0
  case 377: \
11144
0
    tmp = fieldname(insn, 11, 5); \
11145
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11146
0
    tmp = fieldname(insn, 16, 5); \
11147
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11148
0
    tmp = fieldname(insn, 21, 5); \
11149
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11150
0
    return S; \
11151
0
  case 378: \
11152
0
    tmp = fieldname(insn, 21, 5); \
11153
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11154
0
    tmp = fieldname(insn, 16, 5); \
11155
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11156
0
    return S; \
11157
0
  case 379: \
11158
0
    tmp = fieldname(insn, 11, 5); \
11159
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11160
0
    tmp = fieldname(insn, 16, 5); \
11161
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11162
0
    tmp = fieldname(insn, 6, 5); \
11163
0
    MCOperand_CreateImm0(MI, tmp); \
11164
0
    return S; \
11165
0
  case 380: \
11166
0
    tmp = fieldname(insn, 16, 5); \
11167
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11168
0
    tmp = fieldname(insn, 11, 5); \
11169
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11170
0
    tmp = fieldname(insn, 0, 3); \
11171
0
    MCOperand_CreateImm0(MI, tmp); \
11172
0
    return S; \
11173
0
  case 381: \
11174
0
    tmp = fieldname(insn, 11, 5); \
11175
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11176
0
    tmp = fieldname(insn, 16, 5); \
11177
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11178
0
    tmp = fieldname(insn, 0, 3); \
11179
0
    MCOperand_CreateImm0(MI, tmp); \
11180
0
    return S; \
11181
0
  case 382: \
11182
0
    tmp = fieldname(insn, 16, 5); \
11183
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11184
0
    tmp = fieldname(insn, 11, 5); \
11185
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11186
0
    tmp = fieldname(insn, 0, 3); \
11187
0
    MCOperand_CreateImm0(MI, tmp); \
11188
0
    return S; \
11189
0
  case 383: \
11190
0
    tmp = fieldname(insn, 11, 5); \
11191
0
    if (!Check(&S, DecodeCOP2RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11192
0
    tmp = fieldname(insn, 16, 5); \
11193
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11194
0
    tmp = fieldname(insn, 0, 3); \
11195
0
    MCOperand_CreateImm0(MI, tmp); \
11196
0
    return S; \
11197
0
  case 384: \
11198
0
    tmp = fieldname(insn, 13, 3); \
11199
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11200
0
    tmp = fieldname(insn, 16, 5); \
11201
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11202
0
    tmp = fieldname(insn, 21, 5); \
11203
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11204
0
    return S; \
11205
0
  case 385: \
11206
0
    tmp = fieldname(insn, 16, 5); \
11207
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11208
0
    tmp = fieldname(insn, 21, 5); \
11209
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11210
0
    tmp = fieldname(insn, 0, 16); \
11211
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_16_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11212
0
    return S; \
11213
0
  case 386: \
11214
0
    tmp = 0x0; \
11215
0
    tmp |= fieldname(insn, 11, 5) << 0; \
11216
0
    tmp |= fieldname(insn, 16, 5) << 0; \
11217
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11218
0
    tmp = fieldname(insn, 21, 5); \
11219
0
    if (!Check(&S, DecodeGPR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11220
0
    return S; \
11221
0
  case 387: \
11222
0
    if (!Check(&S, DecodeDEXT(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11223
0
    return S; \
11224
0
  case 388: \
11225
0
    if (!Check(&S, DecodeDINS(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11226
0
    return S; \
11227
0
  case 389: \
11228
0
    tmp = fieldname(insn, 16, 5); \
11229
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11230
0
    tmp = fieldname(insn, 11, 5); \
11231
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11232
0
    return S; \
11233
0
  case 390: \
11234
0
    tmp = fieldname(insn, 11, 5); \
11235
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11236
0
    tmp = fieldname(insn, 16, 5); \
11237
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11238
0
    return S; \
11239
0
  case 391: \
11240
0
    tmp = fieldname(insn, 11, 5); \
11241
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11242
0
    tmp = fieldname(insn, 11, 5); \
11243
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11244
0
    tmp = fieldname(insn, 16, 5); \
11245
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11246
0
    return S; \
11247
0
  case 392: \
11248
0
    tmp = fieldname(insn, 6, 5); \
11249
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11250
0
    tmp = fieldname(insn, 11, 5); \
11251
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11252
0
    return S; \
11253
0
  case 393: \
11254
0
    tmp = fieldname(insn, 6, 5); \
11255
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11256
0
    tmp = fieldname(insn, 11, 5); \
11257
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11258
0
    tmp = fieldname(insn, 18, 3); \
11259
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11260
0
    tmp = fieldname(insn, 6, 5); \
11261
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11262
0
    return S; \
11263
0
  case 394: \
11264
0
    tmp = fieldname(insn, 6, 5); \
11265
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11266
0
    tmp = fieldname(insn, 11, 5); \
11267
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11268
0
    tmp = fieldname(insn, 16, 5); \
11269
0
    if (!Check(&S, DecodeGPR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11270
0
    tmp = fieldname(insn, 6, 5); \
11271
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11272
0
    return S; \
11273
0
  case 395: \
11274
0
    tmp = fieldname(insn, 6, 5); \
11275
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11276
0
    tmp = fieldname(insn, 11, 5); \
11277
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11278
0
    tmp = fieldname(insn, 16, 5); \
11279
0
    if (!Check(&S, DecodeFGR32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11280
0
    return S; \
11281
0
  case 396: \
11282
0
    tmp = fieldname(insn, 8, 3); \
11283
0
    if (!Check(&S, DecodeFCCRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11284
0
    tmp = fieldname(insn, 11, 5); \
11285
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11286
0
    tmp = fieldname(insn, 16, 5); \
11287
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11288
0
    return S; \
11289
0
  case 397: \
11290
0
    tmp = fieldname(insn, 6, 5); \
11291
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11292
0
    tmp = fieldname(insn, 21, 5); \
11293
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11294
0
    tmp = fieldname(insn, 16, 5); \
11295
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11296
0
    return S; \
11297
0
  case 398: \
11298
0
    tmp = fieldname(insn, 11, 5); \
11299
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11300
0
    tmp = fieldname(insn, 21, 5); \
11301
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11302
0
    tmp = fieldname(insn, 16, 5); \
11303
0
    if (!Check(&S, DecodePtrRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11304
0
    return S; \
11305
0
  case 399: \
11306
0
    tmp = fieldname(insn, 6, 5); \
11307
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11308
0
    tmp = fieldname(insn, 21, 5); \
11309
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11310
0
    tmp = fieldname(insn, 11, 5); \
11311
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11312
0
    tmp = fieldname(insn, 16, 5); \
11313
0
    if (!Check(&S, DecodeFGR64RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11314
0
    return S; \
11315
0
  case 400: \
11316
0
    tmp = fieldname(insn, 0, 2); \
11317
0
    MCOperand_CreateImm0(MI, tmp); \
11318
0
    return S; \
11319
0
  case 401: \
11320
0
    tmp = fieldname(insn, 0, 3); \
11321
0
    MCOperand_CreateImm0(MI, tmp); \
11322
0
    return S; \
11323
0
  case 402: \
11324
0
    tmp = fieldname(insn, 5, 5); \
11325
0
    if (!Check(&S, DecodeGPRNM32NZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11326
0
    tmp = fieldname(insn, 0, 5); \
11327
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11328
0
    return S; \
11329
0
  case 403: \
11330
0
    tmp = fieldname(insn, 7, 3); \
11331
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11332
0
    tmp = fieldname(insn, 0, 7) << 2; \
11333
0
    if (!Check(&S, DecodeMemNM_6_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11334
0
    return S; \
11335
0
  case 404: \
11336
0
    tmp = 0x0; \
11337
0
    tmp |= fieldname(insn, 0, 1) << 10; \
11338
0
    tmp |= fieldname(insn, 1, 9) << 1; \
11339
0
    if (!Check(&S, DecodeBranchTargetNM_10(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11340
0
    return S; \
11341
0
  case 405: \
11342
0
    tmp = fieldname(insn, 4, 4) << 4; \
11343
0
    MCOperand_CreateImm0(MI, tmp); \
11344
0
    tmp = 0x0; \
11345
0
    tmp |= fieldname(insn, 0, 4) << 0; \
11346
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11347
0
    if (!Check(&S, DecodeNMRegList16Operand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11348
0
    return S; \
11349
0
  case 406: \
11350
0
    tmp = fieldname(insn, 7, 3); \
11351
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11352
0
    tmp = fieldname(insn, 4, 3); \
11353
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11354
0
    tmp = fieldname(insn, 0, 3); \
11355
0
    if (!Check(&S, DecodeUImm3Shift(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11356
0
    return S; \
11357
0
  case 407: \
11358
0
    tmp = fieldname(insn, 5, 5); \
11359
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11360
0
    tmp = fieldname(insn, 0, 5) << 2; \
11361
0
    if (!Check(&S, DecodeMemNM_7_0_Mips_GPRNMSPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11362
0
    return S; \
11363
0
  case 408: \
11364
0
    tmp = 0x0; \
11365
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11366
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11367
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11368
0
    tmp = 0x0; \
11369
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11370
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11371
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11372
0
    return S; \
11373
0
  case 409: \
11374
0
    tmp = fieldname(insn, 7, 3); \
11375
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11376
0
    tmp = fieldname(insn, 4, 3); \
11377
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11378
0
    return S; \
11379
0
  case 410: \
11380
0
    tmp = fieldname(insn, 4, 3); \
11381
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11382
0
    tmp = fieldname(insn, 7, 3); \
11383
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11384
0
    return S; \
11385
0
  case 411: \
11386
0
    tmp = fieldname(insn, 1, 3); \
11387
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11388
0
    tmp = 0x0; \
11389
0
    tmp |= fieldname(insn, 4, 3) << 0; \
11390
0
    tmp |= fieldname(insn, 7, 3) << 5; \
11391
0
    if (!Check(&S, DecodeMemNMRX_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11392
0
    return S; \
11393
0
  case 412: \
11394
0
    tmp = fieldname(insn, 7, 3); \
11395
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11396
0
    tmp = fieldname(insn, 0, 7) << 2; \
11397
0
    if (!Check(&S, DecodeMemNM_9_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11398
0
    return S; \
11399
0
  case 413: \
11400
0
    tmp = fieldname(insn, 7, 3); \
11401
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11402
0
    tmp = 0x0; \
11403
0
    tmp |= fieldname(insn, 0, 2) << 0; \
11404
0
    tmp |= fieldname(insn, 4, 3) << 2; \
11405
0
    if (!Check(&S, DecodeMemNM_2_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11406
0
    return S; \
11407
0
  case 414: \
11408
0
    tmp = fieldname(insn, 7, 3); \
11409
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11410
0
    tmp = 0x0; \
11411
0
    tmp |= fieldname(insn, 0, 2) << 0; \
11412
0
    tmp |= fieldname(insn, 4, 3) << 2; \
11413
0
    if (!Check(&S, DecodeMemNM_2_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11414
0
    return S; \
11415
0
  case 415: \
11416
0
    tmp = fieldname(insn, 7, 3); \
11417
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11418
0
    tmp = fieldname(insn, 0, 6) << 2; \
11419
0
    if (!Check(&S, DecodeUImmWithReg_8_0_1_Mips_SP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11420
0
    return S; \
11421
0
  case 416: \
11422
0
    tmp = 0x0; \
11423
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11424
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11425
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11426
0
    tmp = 0x0; \
11427
0
    tmp |= fieldname(insn, 0, 3) << 4; \
11428
0
    tmp |= fieldname(insn, 3, 1) << 3; \
11429
0
    tmp |= fieldname(insn, 4, 1) << 8; \
11430
0
    tmp |= fieldname(insn, 8, 1) << 2; \
11431
0
    if (!Check(&S, DecodeMemNM4x4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11432
0
    return S; \
11433
0
  case 417: \
11434
0
    tmp = fieldname(insn, 7, 3); \
11435
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11436
0
    tmp = 0x0; \
11437
0
    tmp |= fieldname(insn, 1, 2) << 1; \
11438
0
    tmp |= fieldname(insn, 4, 3) << 3; \
11439
0
    if (!Check(&S, DecodeMemNM_3_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11440
0
    return S; \
11441
0
  case 418: \
11442
0
    tmp = fieldname(insn, 7, 3); \
11443
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11444
0
    tmp = 0x0; \
11445
0
    tmp |= fieldname(insn, 1, 2) << 1; \
11446
0
    tmp |= fieldname(insn, 4, 3) << 3; \
11447
0
    if (!Check(&S, DecodeMemNM_3_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11448
0
    return S; \
11449
0
  case 419: \
11450
0
    tmp = fieldname(insn, 7, 3); \
11451
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11452
0
    tmp = fieldname(insn, 4, 3); \
11453
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11454
0
    tmp = fieldname(insn, 0, 3) << 2; \
11455
0
    MCOperand_CreateImm0(MI, tmp); \
11456
0
    return S; \
11457
0
  case 420: \
11458
0
    tmp = fieldname(insn, 5, 5); \
11459
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11460
0
    tmp = fieldname(insn, 5, 5); \
11461
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11462
0
    tmp = 0x0; \
11463
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11464
0
    tmp |= fieldname(insn, 4, 1) << 3; \
11465
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_4_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11466
0
    return S; \
11467
0
  case 421: \
11468
0
    tmp = fieldname(insn, 7, 3); \
11469
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11470
0
    tmp = fieldname(insn, 0, 7) << 2; \
11471
0
    if (!Check(&S, DecodeMemNM_6_0_Mips_GPRNM3RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11472
0
    return S; \
11473
0
  case 422: \
11474
0
    tmp = fieldname(insn, 7, 3); \
11475
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11476
0
    tmp = 0x0; \
11477
0
    tmp |= fieldname(insn, 0, 1) << 7; \
11478
0
    tmp |= fieldname(insn, 1, 6) << 1; \
11479
0
    if (!Check(&S, DecodeBranchTargetNM_7(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11480
0
    return S; \
11481
0
  case 423: \
11482
0
    tmp = fieldname(insn, 1, 3); \
11483
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11484
0
    tmp = fieldname(insn, 4, 3); \
11485
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11486
0
    tmp = fieldname(insn, 7, 3); \
11487
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11488
0
    return S; \
11489
0
  case 424: \
11490
0
    tmp = 0x0; \
11491
0
    tmp |= fieldname(insn, 3, 1) << 1; \
11492
0
    tmp |= fieldname(insn, 8, 1) << 0; \
11493
0
    if (!Check(&S, DecodeGPRNM2R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11494
0
    tmp = 0x0; \
11495
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11496
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11497
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11498
0
    tmp = 0x0; \
11499
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11500
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11501
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11502
0
    return S; \
11503
0
  case 425: \
11504
0
    tmp = fieldname(insn, 7, 3); \
11505
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11506
0
    tmp = fieldname(insn, 0, 7); \
11507
0
    if (!Check(&S, DecodeImmM1To126(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11508
0
    return S; \
11509
0
  case 426: \
11510
0
    tmp = fieldname(insn, 7, 3); \
11511
0
    if (!Check(&S, DecodeGPRNM3ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11512
0
    tmp = fieldname(insn, 0, 7) << 2; \
11513
0
    if (!Check(&S, DecodeMemNM_9_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11514
0
    return S; \
11515
0
  case 427: \
11516
0
    tmp = fieldname(insn, 5, 5); \
11517
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11518
0
    return S; \
11519
0
  case 428: \
11520
0
    tmp = fieldname(insn, 4, 1); \
11521
0
    if (!Check(&S, DecodeGPRNMRARegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11522
0
    tmp = fieldname(insn, 5, 5); \
11523
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11524
0
    return S; \
11525
0
  case 429: \
11526
0
    if (!Check(&S, DecodeBranchConflictNM(MI, insn, Address, Decoder))) { return MCDisassembler_Fail; } \
11527
0
    return S; \
11528
0
  case 430: \
11529
0
    tmp = fieldname(insn, 7, 3); \
11530
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11531
0
    tmp = fieldname(insn, 4, 3); \
11532
0
    if (!Check(&S, DecodeGPRNM3RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11533
0
    tmp = fieldname(insn, 0, 4); \
11534
0
    if (!Check(&S, DecodeUImm4Mask(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11535
0
    return S; \
11536
0
  case 431: \
11537
0
    tmp = 0x0; \
11538
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11539
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11540
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11541
0
    tmp = 0x0; \
11542
0
    tmp |= fieldname(insn, 0, 3) << 4; \
11543
0
    tmp |= fieldname(insn, 3, 1) << 3; \
11544
0
    tmp |= fieldname(insn, 4, 1) << 8; \
11545
0
    tmp |= fieldname(insn, 8, 1) << 2; \
11546
0
    if (!Check(&S, DecodeMemNM4x4(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11547
0
    return S; \
11548
0
  case 432: \
11549
0
    tmp = 0x0; \
11550
0
    tmp |= fieldname(insn, 0, 3) << 0; \
11551
0
    tmp |= fieldname(insn, 4, 1) << 4; \
11552
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11553
0
    tmp = 0x0; \
11554
0
    tmp |= fieldname(insn, 5, 3) << 0; \
11555
0
    tmp |= fieldname(insn, 9, 1) << 4; \
11556
0
    if (!Check(&S, DecodeGPRNM4RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11557
0
    tmp = 0x0; \
11558
0
    tmp |= fieldname(insn, 3, 1) << 1; \
11559
0
    tmp |= fieldname(insn, 8, 1) << 0; \
11560
0
    if (!Check(&S, DecodeGPRNM2R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11561
0
    return S; \
11562
0
  case 433: \
11563
0
    tmp = fieldname(insn, 0, 18); \
11564
0
    MCOperand_CreateImm0(MI, tmp); \
11565
0
    return S; \
11566
0
  case 434: \
11567
0
    tmp = fieldname(insn, 0, 19); \
11568
0
    MCOperand_CreateImm0(MI, tmp); \
11569
0
    return S; \
11570
0
  case 435: \
11571
0
    tmp = fieldname(insn, 21, 5); \
11572
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11573
0
    tmp = fieldname(insn, 16, 5); \
11574
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11575
0
    tmp = fieldname(insn, 0, 16); \
11576
0
    MCOperand_CreateImm0(MI, tmp); \
11577
0
    return S; \
11578
0
  case 436: \
11579
0
    tmp = fieldname(insn, 21, 5); \
11580
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11581
0
    tmp = 0x0; \
11582
0
    tmp |= fieldname(insn, 0, 1) << 21; \
11583
0
    tmp |= fieldname(insn, 1, 20) << 1; \
11584
0
    if (!Check(&S, DecodeAddressPCRelNM_22(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11585
0
    return S; \
11586
0
  case 437: \
11587
0
    tmp = fieldname(insn, 24, 1); \
11588
0
    if (!Check(&S, DecodeGPRNM1R1RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11589
0
    tmp = 0x0; \
11590
0
    tmp |= fieldname(insn, 21, 3) << 0; \
11591
0
    tmp |= fieldname(insn, 25, 1) << 4; \
11592
0
    if (!Check(&S, DecodeGPRNM4ZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11593
0
    tmp = 0x0; \
11594
0
    tmp |= fieldname(insn, 0, 1) << 21; \
11595
0
    tmp |= fieldname(insn, 1, 20) << 1; \
11596
0
    if (!Check(&S, DecodeBranchTargetNM_21(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11597
0
    return S; \
11598
0
  case 438: \
11599
0
    tmp = fieldname(insn, 16, 5); \
11600
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11601
0
    tmp = fieldname(insn, 21, 5); \
11602
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11603
0
    tmp = fieldname(insn, 11, 5); \
11604
0
    MCOperand_CreateImm0(MI, tmp); \
11605
0
    return S; \
11606
0
  case 439: \
11607
0
    tmp = fieldname(insn, 21, 5); \
11608
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11609
0
    tmp = fieldname(insn, 16, 5); \
11610
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11611
0
    tmp = fieldname(insn, 11, 5); \
11612
0
    MCOperand_CreateImm0(MI, tmp); \
11613
0
    return S; \
11614
0
  case 440: \
11615
0
    tmp = fieldname(insn, 11, 5); \
11616
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11617
0
    tmp = fieldname(insn, 16, 10); \
11618
0
    if (!Check(&S, DecodeMemNMRX_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11619
0
    return S; \
11620
0
  case 441: \
11621
0
    tmp = fieldname(insn, 21, 5); \
11622
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11623
0
    tmp = fieldname(insn, 16, 5); \
11624
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11625
0
    return S; \
11626
0
  case 442: \
11627
0
    tmp = fieldname(insn, 11, 5); \
11628
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11629
0
    tmp = fieldname(insn, 16, 5); \
11630
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11631
0
    tmp = fieldname(insn, 21, 5); \
11632
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11633
0
    tmp = fieldname(insn, 9, 2); \
11634
0
    MCOperand_CreateImm0(MI, tmp); \
11635
0
    return S; \
11636
0
  case 443: \
11637
0
    tmp = fieldname(insn, 11, 5); \
11638
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11639
0
    tmp = fieldname(insn, 16, 5); \
11640
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11641
0
    tmp = fieldname(insn, 21, 5); \
11642
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11643
0
    return S; \
11644
0
  case 444: \
11645
0
    tmp = fieldname(insn, 11, 5); \
11646
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11647
0
    tmp = fieldname(insn, 16, 5); \
11648
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11649
0
    tmp = fieldname(insn, 21, 5); \
11650
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11651
0
    tmp = fieldname(insn, 11, 5); \
11652
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11653
0
    return S; \
11654
0
  case 445: \
11655
0
    tmp = fieldname(insn, 11, 5); \
11656
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11657
0
    tmp = fieldname(insn, 16, 5); \
11658
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11659
0
    tmp = fieldname(insn, 21, 5); \
11660
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11661
0
    tmp = fieldname(insn, 6, 5); \
11662
0
    MCOperand_CreateImm0(MI, tmp); \
11663
0
    return S; \
11664
0
  case 446: \
11665
0
    tmp = fieldname(insn, 16, 5); \
11666
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11667
0
    tmp = fieldname(insn, 11, 5); \
11668
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11669
0
    tmp = fieldname(insn, 21, 5); \
11670
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11671
0
    return S; \
11672
0
  case 447: \
11673
0
    tmp = fieldname(insn, 21, 5); \
11674
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11675
0
    tmp = fieldname(insn, 21, 5); \
11676
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11677
0
    tmp = fieldname(insn, 16, 5); \
11678
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11679
0
    return S; \
11680
0
  case 448: \
11681
0
    tmp = fieldname(insn, 21, 5); \
11682
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11683
0
    tmp = fieldname(insn, 11, 10); \
11684
0
    if (!Check(&S, DecodeCOP0SelRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11685
0
    return S; \
11686
0
  case 449: \
11687
0
    tmp = fieldname(insn, 21, 5); \
11688
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11689
0
    tmp = fieldname(insn, 16, 5); \
11690
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11691
0
    tmp = fieldname(insn, 10, 1); \
11692
0
    MCOperand_CreateImm0(MI, tmp); \
11693
0
    tmp = fieldname(insn, 11, 5); \
11694
0
    MCOperand_CreateImm0(MI, tmp); \
11695
0
    tmp = fieldname(insn, 3, 1); \
11696
0
    MCOperand_CreateImm0(MI, tmp); \
11697
0
    return S; \
11698
0
  case 450: \
11699
0
    tmp = fieldname(insn, 16, 5); \
11700
0
    if (!Check(&S, DecodeCOP0RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11701
0
    tmp = fieldname(insn, 21, 5); \
11702
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11703
0
    tmp = fieldname(insn, 10, 1); \
11704
0
    MCOperand_CreateImm0(MI, tmp); \
11705
0
    tmp = fieldname(insn, 11, 5); \
11706
0
    MCOperand_CreateImm0(MI, tmp); \
11707
0
    tmp = fieldname(insn, 3, 1); \
11708
0
    MCOperand_CreateImm0(MI, tmp); \
11709
0
    return S; \
11710
0
  case 451: \
11711
0
    tmp = fieldname(insn, 21, 5); \
11712
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11713
0
    return S; \
11714
0
  case 452: \
11715
0
    tmp = fieldname(insn, 16, 5); \
11716
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11717
0
    tmp = fieldname(insn, 21, 2); \
11718
0
    MCOperand_CreateImm0(MI, tmp); \
11719
0
    return S; \
11720
0
  case 453: \
11721
0
    tmp = fieldname(insn, 16, 5); \
11722
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11723
0
    return S; \
11724
0
  case 454: \
11725
0
    tmp = 0x0; \
11726
0
    tmp |= fieldname(insn, 0, 1) << 25; \
11727
0
    tmp |= fieldname(insn, 1, 24) << 1; \
11728
0
    if (!Check(&S, DecodeBranchTargetNM_25(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11729
0
    return S; \
11730
0
  case 455: \
11731
0
    tmp = fieldname(insn, 21, 5); \
11732
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11733
0
    tmp = fieldname(insn, 2, 19) << 2; \
11734
0
    if (!Check(&S, DecodeUImmWithReg_21_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11735
0
    return S; \
11736
0
  case 456: \
11737
0
    tmp = fieldname(insn, 21, 5); \
11738
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11739
0
    tmp = fieldname(insn, 2, 19) << 2; \
11740
0
    if (!Check(&S, DecodeMemNM_21_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11741
0
    return S; \
11742
0
  case 457: \
11743
0
    tmp = fieldname(insn, 21, 5); \
11744
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11745
0
    tmp = fieldname(insn, 0, 18); \
11746
0
    if (!Check(&S, DecodeMemNM_18_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11747
0
    return S; \
11748
0
  case 458: \
11749
0
    tmp = fieldname(insn, 21, 5); \
11750
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11751
0
    tmp = fieldname(insn, 0, 18); \
11752
0
    if (!Check(&S, DecodeUImmWithReg_18_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11753
0
    return S; \
11754
0
  case 459: \
11755
0
    tmp = fieldname(insn, 21, 5); \
11756
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11757
0
    tmp = fieldname(insn, 1, 17) << 1; \
11758
0
    if (!Check(&S, DecodeMemNM_18_0_Mips_GPRNMGPRegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11759
0
    return S; \
11760
0
  case 460: \
11761
0
    tmp = fieldname(insn, 21, 5); \
11762
0
    if (!Check(&S, DecodeGPRNM32NZRegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11763
0
    tmp = fieldname(insn, 16, 5); \
11764
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11765
0
    return S; \
11766
0
  case 461: \
11767
0
    tmp = fieldname(insn, 21, 5); \
11768
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11769
0
    tmp = fieldname(insn, 16, 5); \
11770
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11771
0
    tmp = fieldname(insn, 0, 12); \
11772
0
    MCOperand_CreateImm0(MI, tmp); \
11773
0
    return S; \
11774
0
  case 462: \
11775
0
    tmp = fieldname(insn, 3, 9) << 3; \
11776
0
    MCOperand_CreateImm0(MI, tmp); \
11777
0
    tmp = 0x0; \
11778
0
    tmp |= fieldname(insn, 2, 1) << 0; \
11779
0
    tmp |= fieldname(insn, 16, 4) << 1; \
11780
0
    tmp |= fieldname(insn, 21, 5) << 5; \
11781
0
    if (!Check(&S, DecodeNMRegListOperand(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11782
0
    return S; \
11783
0
  case 463: \
11784
0
    tmp = fieldname(insn, 21, 5); \
11785
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11786
0
    tmp = fieldname(insn, 16, 5); \
11787
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11788
0
    tmp = fieldname(insn, 0, 12); \
11789
0
    if (!Check(&S, DecodeNegImm12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11790
0
    return S; \
11791
0
  case 464: \
11792
0
    tmp = fieldname(insn, 21, 5); \
11793
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11794
0
    tmp = fieldname(insn, 16, 5); \
11795
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11796
0
    tmp = fieldname(insn, 0, 5); \
11797
0
    MCOperand_CreateImm0(MI, tmp); \
11798
0
    return S; \
11799
0
  case 465: \
11800
0
    tmp = fieldname(insn, 21, 5); \
11801
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11802
0
    tmp = fieldname(insn, 16, 5); \
11803
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11804
0
    tmp = fieldname(insn, 0, 5); \
11805
0
    MCOperand_CreateImm0(MI, tmp); \
11806
0
    tmp = fieldname(insn, 7, 4) << 1; \
11807
0
    MCOperand_CreateImm0(MI, tmp); \
11808
0
    tmp = fieldname(insn, 6, 1); \
11809
0
    MCOperand_CreateImm0(MI, tmp); \
11810
0
    return S; \
11811
0
  case 466: \
11812
0
    tmp = fieldname(insn, 21, 5); \
11813
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11814
0
    tmp = fieldname(insn, 16, 5); \
11815
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11816
0
    tmp = fieldname(insn, 0, 5); \
11817
0
    MCOperand_CreateImm0(MI, tmp); \
11818
0
    tmp = fieldname(insn, 6, 5); \
11819
0
    if (!Check(&S, DecodeInsSize(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11820
0
    tmp = fieldname(insn, 21, 5); \
11821
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11822
0
    return S; \
11823
0
  case 467: \
11824
0
    tmp = fieldname(insn, 21, 5); \
11825
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11826
0
    tmp = fieldname(insn, 16, 5); \
11827
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11828
0
    tmp = fieldname(insn, 0, 5); \
11829
0
    MCOperand_CreateImm0(MI, tmp); \
11830
0
    tmp = fieldname(insn, 6, 5); \
11831
0
    if (!Check(&S, DecodeUImmWithOffset_5_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11832
0
    return S; \
11833
0
  case 468: \
11834
0
    tmp = fieldname(insn, 21, 5); \
11835
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11836
0
    tmp = 0x0; \
11837
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11838
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11839
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11840
0
    return S; \
11841
0
  case 469: \
11842
0
    tmp = 0x0; \
11843
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11844
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11845
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11846
0
    return S; \
11847
0
  case 470: \
11848
0
    tmp = fieldname(insn, 21, 5); \
11849
0
    MCOperand_CreateImm0(MI, tmp); \
11850
0
    tmp = 0x0; \
11851
0
    tmp |= fieldname(insn, 0, 12) << 0; \
11852
0
    tmp |= fieldname(insn, 16, 5) << 12; \
11853
0
    if (!Check(&S, DecodeMemNM_12_0_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11854
0
    return S; \
11855
0
  case 471: \
11856
0
    tmp = fieldname(insn, 16, 5); \
11857
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11858
0
    tmp = fieldname(insn, 21, 5); \
11859
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11860
0
    tmp = 0x0; \
11861
0
    tmp |= fieldname(insn, 0, 1) << 14; \
11862
0
    tmp |= fieldname(insn, 1, 13) << 1; \
11863
0
    if (!Check(&S, DecodeBranchTargetNM_14(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11864
0
    return S; \
11865
0
  case 472: \
11866
0
    tmp = fieldname(insn, 21, 5); \
11867
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11868
0
    tmp = 0x0; \
11869
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11870
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11871
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11872
0
    return S; \
11873
0
  case 473: \
11874
0
    tmp = fieldname(insn, 21, 5); \
11875
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11876
0
    tmp = 0x0; \
11877
0
    tmp |= fieldname(insn, 2, 6) << 2; \
11878
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11879
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11880
0
    return S; \
11881
0
  case 474: \
11882
0
    tmp = fieldname(insn, 21, 5); \
11883
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11884
0
    tmp = fieldname(insn, 3, 5); \
11885
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11886
0
    tmp = fieldname(insn, 16, 5); \
11887
0
    if (!Check(&S, DecodeMemZeroNM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11888
0
    return S; \
11889
0
  case 475: \
11890
0
    tmp = fieldname(insn, 21, 5); \
11891
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11892
0
    tmp = 0x0; \
11893
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11894
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11895
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11896
0
    tmp = fieldname(insn, 12, 3); \
11897
0
    if (!Check(&S, DecodeUImm3Shift(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11898
0
    return S; \
11899
0
  case 476: \
11900
0
    tmp = 0x0; \
11901
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11902
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11903
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11904
0
    return S; \
11905
0
  case 477: \
11906
0
    tmp = fieldname(insn, 21, 5); \
11907
0
    MCOperand_CreateImm0(MI, tmp); \
11908
0
    tmp = 0x0; \
11909
0
    tmp |= fieldname(insn, 0, 8) << 0; \
11910
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11911
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11912
0
    return S; \
11913
0
  case 478: \
11914
0
    tmp = fieldname(insn, 21, 5); \
11915
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11916
0
    tmp = fieldname(insn, 21, 5); \
11917
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11918
0
    tmp = 0x0; \
11919
0
    tmp |= fieldname(insn, 2, 6) << 2; \
11920
0
    tmp |= fieldname(insn, 15, 6) << 8; \
11921
0
    if (!Check(&S, DecodeMemNM_9_1_Mips_GPRNM32RegClassID(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11922
0
    return S; \
11923
0
  case 479: \
11924
0
    tmp = fieldname(insn, 21, 5); \
11925
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11926
0
    tmp = fieldname(insn, 21, 5); \
11927
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11928
0
    tmp = fieldname(insn, 3, 5); \
11929
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11930
0
    tmp = fieldname(insn, 16, 5); \
11931
0
    if (!Check(&S, DecodeMemZeroNM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11932
0
    return S; \
11933
0
  case 480: \
11934
0
    tmp = fieldname(insn, 21, 5); \
11935
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11936
0
    tmp = fieldname(insn, 11, 7); \
11937
0
    MCOperand_CreateImm0(MI, tmp); \
11938
0
    tmp = 0x0; \
11939
0
    tmp |= fieldname(insn, 0, 1) << 11; \
11940
0
    tmp |= fieldname(insn, 1, 10) << 1; \
11941
0
    if (!Check(&S, DecodeBranchTargetNM_11(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11942
0
    return S; \
11943
0
  case 481: \
11944
0
    tmp = fieldname(insn, 21, 5); \
11945
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11946
0
    tmp = fieldname(insn, 11, 6); \
11947
0
    if (!Check(&S, DecodeSImmWithOffsetAndScale_32_0_1(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11948
0
    tmp = 0x0; \
11949
0
    tmp |= fieldname(insn, 0, 1) << 11; \
11950
0
    tmp |= fieldname(insn, 1, 10) << 1; \
11951
0
    if (!Check(&S, DecodeBranchTargetNM_11(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11952
0
    return S; \
11953
0
  case 482: \
11954
0
    tmp = fieldname(insn, 21, 5); \
11955
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11956
0
    tmp = 0x0; \
11957
0
    tmp |= fieldname(insn, 0, 1) << 19; \
11958
0
    tmp |= fieldname(insn, 2, 10) << 9; \
11959
0
    tmp |= fieldname(insn, 12, 9) << 0; \
11960
0
    if (!Check(&S, DecodeSImm32s12(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11961
0
    return S; \
11962
0
  case 483: \
11963
0
    tmp = fieldname(insn, 37, 5); \
11964
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11965
0
    tmp = 0x0; \
11966
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11967
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11968
0
    MCOperand_CreateImm0(MI, tmp); \
11969
0
    return S; \
11970
0
  case 484: \
11971
0
    tmp = fieldname(insn, 37, 5); \
11972
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11973
0
    tmp = fieldname(insn, 37, 5); \
11974
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11975
0
    tmp = 0x0; \
11976
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11977
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11978
0
    MCOperand_CreateImm0(MI, tmp); \
11979
0
    return S; \
11980
0
  case 485: \
11981
0
    tmp = fieldname(insn, 37, 5); \
11982
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11983
0
    tmp = 0x0; \
11984
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11985
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11986
0
    if (!Check(&S, DecodeSImmWithReg_32_0_1_Mips_GP_NM(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11987
0
    return S; \
11988
0
  case 486: \
11989
0
    tmp = fieldname(insn, 37, 5); \
11990
0
    if (!Check(&S, DecodeGPRNM32RegisterClass(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11991
0
    tmp = 0x0; \
11992
0
    tmp |= fieldname(insn, 0, 16) << 16; \
11993
0
    tmp |= fieldname(insn, 16, 16) << 0; \
11994
0
    if (!Check(&S, DecodeAddressPCRelNM_32(MI, tmp, Address, Decoder))) { return MCDisassembler_Fail; } \
11995
0
    return S; \
11996
24.9k
  } \
11997
24.9k
}
11998
11999
#define DecodeInstruction(fname, fieldname, decoder, InsnType) \
12000
static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \
12001
210k
                                      InsnType insn, uint64_t Address, const void *Decoder) { \
12002
210k
  const uint8_t *Ptr = DecodeTable; \
12003
210k
  uint64_t CurFieldValue = 0; \
12004
210k
  DecodeStatus S = MCDisassembler_Success; \
12005
3.32M
  while (true) { \
12006
3.32M
    switch (*Ptr) { \
12007
0
    default: \
12008
0
      return MCDisassembler_Fail; \
12009
275k
    case MCD_OPC_ExtractField: { \
12010
275k
      unsigned Start = *++Ptr; \
12011
275k
      unsigned Len = *++Ptr; \
12012
275k
      ++Ptr; \
12013
275k
      CurFieldValue = fieldname(insn, Start, Len); \
12014
275k
      break; \
12015
0
    } \
12016
2.74M
    case MCD_OPC_FilterValue: { \
12017
2.74M
      /* Decode the field value. */ \
12018
2.74M
      unsigned Len; \
12019
2.74M
      uint64_t Val = decodeULEB128(++Ptr, &Len); \
12020
2.74M
      Ptr += Len; \
12021
2.74M
      /* NumToSkip is a plain 24-bit integer. */ \
12022
2.74M
      unsigned NumToSkip = *Ptr++; \
12023
2.74M
      NumToSkip |= (*Ptr++) << 8; \
12024
2.74M
      NumToSkip |= (*Ptr++) << 16; \
12025
2.74M
      /* Perform the filter operation. */ \
12026
2.74M
      if (Val != CurFieldValue) \
12027
2.74M
        Ptr += NumToSkip; \
12028
2.74M
      break; \
12029
0
    } \
12030
10.3k
    case MCD_OPC_CheckField: { \
12031
10.3k
      unsigned Start = *++Ptr; \
12032
10.3k
      unsigned Len = *++Ptr; \
12033
10.3k
      uint64_t FieldValue = fieldname(insn, Start, Len); \
12034
10.3k
      /* Decode the field value. */ \
12035
10.3k
      unsigned PtrLen = 0; \
12036
10.3k
      uint64_t ExpectedValue = decodeULEB128(++Ptr, &PtrLen); \
12037
10.3k
      Ptr += PtrLen; \
12038
10.3k
      /* NumToSkip is a plain 24-bit integer. */ \
12039
10.3k
      unsigned NumToSkip = *Ptr++; \
12040
10.3k
      NumToSkip |= (*Ptr++) << 8; \
12041
10.3k
      NumToSkip |= (*Ptr++) << 16; \
12042
10.3k
      /* If the actual and expected values don't match, skip. */ \
12043
10.3k
      if (ExpectedValue != FieldValue) \
12044
10.3k
        Ptr += NumToSkip; \
12045
10.3k
      break; \
12046
0
    } \
12047
83.9k
    case MCD_OPC_CheckPredicate: { \
12048
83.9k
      unsigned Len; \
12049
83.9k
      /* Decode the Predicate Index value. */ \
12050
83.9k
      unsigned PIdx = decodeULEB128(++Ptr, &Len); \
12051
83.9k
      Ptr += Len; \
12052
83.9k
      /* NumToSkip is a plain 24-bit integer. */ \
12053
83.9k
      unsigned NumToSkip = *Ptr++; \
12054
83.9k
      NumToSkip |= (*Ptr++) << 8; \
12055
83.9k
      NumToSkip |= (*Ptr++) << 16; \
12056
83.9k
      /* Check the predicate. */ \
12057
83.9k
      bool Pred = checkDecoderPredicate(MI, PIdx); \
12058
83.9k
      if (!Pred) \
12059
83.9k
        Ptr += NumToSkip; \
12060
83.9k
      break; \
12061
0
    } \
12062
78.1k
    case MCD_OPC_Decode: { \
12063
78.1k
      unsigned Len; \
12064
78.1k
      /* Decode the Opcode value. */ \
12065
78.1k
      unsigned Opc = decodeULEB128(++Ptr, &Len); \
12066
78.1k
      Ptr += Len; \
12067
78.1k
      unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \
12068
78.1k
      Ptr += Len; \
12069
78.1k
      MCInst_clear(MI); \
12070
78.1k
      MCInst_setOpcode(MI, Opc); \
12071
78.1k
      bool DecodeComplete; \
12072
78.1k
      S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \
12073
78.1k
      return S; \
12074
0
    } \
12075
0
    case MCD_OPC_TryDecode: { \
12076
0
      unsigned Len; \
12077
0
      /* Decode the Opcode value. */ \
12078
0
      unsigned Opc = decodeULEB128(++Ptr, &Len); \
12079
0
      Ptr += Len; \
12080
0
      unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \
12081
0
      Ptr += Len; \
12082
0
      /* NumToSkip is a plain 24-bit integer. */ \
12083
0
      unsigned NumToSkip = *Ptr++; \
12084
0
      NumToSkip |= (*Ptr++) << 8; \
12085
0
      NumToSkip |= (*Ptr++) << 16; \
12086
0
      /* Perform the decode operation. */ \
12087
0
      MCInst_setOpcode(MI, Opc); \
12088
0
      bool DecodeComplete; \
12089
0
      S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \
12090
0
      if (DecodeComplete) { \
12091
0
        /* Decoding complete. */ \
12092
0
        return S; \
12093
0
      } else { \
12094
0
        /* LLVM uses a MCInst on the stack, but for our use case, */ \
12095
0
        /* it is enough for now to reset the op counter. */ \
12096
0
        MCInst_clear(MI); \
12097
0
        /* If the decoding was incomplete, skip. */ \
12098
0
        Ptr += NumToSkip; \
12099
0
        /* Reset decode status. This also drops a SoftFail status that could be */ \
12100
0
        /* set before the decode attempt. */ \
12101
0
        S = MCDisassembler_Success; \
12102
0
      } \
12103
0
      break; \
12104
0
    } \
12105
0
    case MCD_OPC_SoftFail: { \
12106
0
      /* Decode the mask values. */ \
12107
0
      unsigned Len; \
12108
0
      uint64_t PositiveMask = decodeULEB128(++Ptr, &Len); \
12109
0
      Ptr += Len; \
12110
0
      uint64_t NegativeMask = decodeULEB128(Ptr, &Len); \
12111
0
      Ptr += Len; \
12112
0
      bool Fail = (insn & PositiveMask) != 0 || (~insn & NegativeMask) != 0; \
12113
0
      if (Fail) \
12114
0
        S = MCDisassembler_SoftFail; \
12115
0
      break; \
12116
0
    } \
12117
132k
    case MCD_OPC_Fail: { \
12118
132k
      return MCDisassembler_Fail; \
12119
0
    } \
12120
3.32M
    } \
12121
3.32M
  } \
12122
210k
  /* Bogisity detected in disassembler state machine! */ \
12123
210k
}
Unexecuted instantiation: MipsDisassembler.c:decodeInstruction_8
MipsDisassembler.c:decodeInstruction_4
Line
Count
Source
12001
145k
                                      InsnType insn, uint64_t Address, const void *Decoder) { \
12002
145k
  const uint8_t *Ptr = DecodeTable; \
12003
145k
  uint64_t CurFieldValue = 0; \
12004
145k
  DecodeStatus S = MCDisassembler_Success; \
12005
2.22M
  while (true) { \
12006
2.22M
    switch (*Ptr) { \
12007
0
    default: \
12008
0
      return MCDisassembler_Fail; \
12009
196k
    case MCD_OPC_ExtractField: { \
12010
196k
      unsigned Start = *++Ptr; \
12011
196k
      unsigned Len = *++Ptr; \
12012
196k
      ++Ptr; \
12013
196k
      CurFieldValue = fieldname(insn, Start, Len); \
12014
196k
      break; \
12015
0
    } \
12016
1.81M
    case MCD_OPC_FilterValue: { \
12017
1.81M
      /* Decode the field value. */ \
12018
1.81M
      unsigned Len; \
12019
1.81M
      uint64_t Val = decodeULEB128(++Ptr, &Len); \
12020
1.81M
      Ptr += Len; \
12021
1.81M
      /* NumToSkip is a plain 24-bit integer. */ \
12022
1.81M
      unsigned NumToSkip = *Ptr++; \
12023
1.81M
      NumToSkip |= (*Ptr++) << 8; \
12024
1.81M
      NumToSkip |= (*Ptr++) << 16; \
12025
1.81M
      /* Perform the filter operation. */ \
12026
1.81M
      if (Val != CurFieldValue) \
12027
1.81M
        Ptr += NumToSkip; \
12028
1.81M
      break; \
12029
0
    } \
12030
9.71k
    case MCD_OPC_CheckField: { \
12031
9.71k
      unsigned Start = *++Ptr; \
12032
9.71k
      unsigned Len = *++Ptr; \
12033
9.71k
      uint64_t FieldValue = fieldname(insn, Start, Len); \
12034
9.71k
      /* Decode the field value. */ \
12035
9.71k
      unsigned PtrLen = 0; \
12036
9.71k
      uint64_t ExpectedValue = decodeULEB128(++Ptr, &PtrLen); \
12037
9.71k
      Ptr += PtrLen; \
12038
9.71k
      /* NumToSkip is a plain 24-bit integer. */ \
12039
9.71k
      unsigned NumToSkip = *Ptr++; \
12040
9.71k
      NumToSkip |= (*Ptr++) << 8; \
12041
9.71k
      NumToSkip |= (*Ptr++) << 16; \
12042
9.71k
      /* If the actual and expected values don't match, skip. */ \
12043
9.71k
      if (ExpectedValue != FieldValue) \
12044
9.71k
        Ptr += NumToSkip; \
12045
9.71k
      break; \
12046
0
    } \
12047
59.0k
    case MCD_OPC_CheckPredicate: { \
12048
59.0k
      unsigned Len; \
12049
59.0k
      /* Decode the Predicate Index value. */ \
12050
59.0k
      unsigned PIdx = decodeULEB128(++Ptr, &Len); \
12051
59.0k
      Ptr += Len; \
12052
59.0k
      /* NumToSkip is a plain 24-bit integer. */ \
12053
59.0k
      unsigned NumToSkip = *Ptr++; \
12054
59.0k
      NumToSkip |= (*Ptr++) << 8; \
12055
59.0k
      NumToSkip |= (*Ptr++) << 16; \
12056
59.0k
      /* Check the predicate. */ \
12057
59.0k
      bool Pred = checkDecoderPredicate(MI, PIdx); \
12058
59.0k
      if (!Pred) \
12059
59.0k
        Ptr += NumToSkip; \
12060
59.0k
      break; \
12061
0
    } \
12062
53.2k
    case MCD_OPC_Decode: { \
12063
53.2k
      unsigned Len; \
12064
53.2k
      /* Decode the Opcode value. */ \
12065
53.2k
      unsigned Opc = decodeULEB128(++Ptr, &Len); \
12066
53.2k
      Ptr += Len; \
12067
53.2k
      unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \
12068
53.2k
      Ptr += Len; \
12069
53.2k
      MCInst_clear(MI); \
12070
53.2k
      MCInst_setOpcode(MI, Opc); \
12071
53.2k
      bool DecodeComplete; \
12072
53.2k
      S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \
12073
53.2k
      return S; \
12074
0
    } \
12075
0
    case MCD_OPC_TryDecode: { \
12076
0
      unsigned Len; \
12077
0
      /* Decode the Opcode value. */ \
12078
0
      unsigned Opc = decodeULEB128(++Ptr, &Len); \
12079
0
      Ptr += Len; \
12080
0
      unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \
12081
0
      Ptr += Len; \
12082
0
      /* NumToSkip is a plain 24-bit integer. */ \
12083
0
      unsigned NumToSkip = *Ptr++; \
12084
0
      NumToSkip |= (*Ptr++) << 8; \
12085
0
      NumToSkip |= (*Ptr++) << 16; \
12086
0
      /* Perform the decode operation. */ \
12087
0
      MCInst_setOpcode(MI, Opc); \
12088
0
      bool DecodeComplete; \
12089
0
      S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \
12090
0
      if (DecodeComplete) { \
12091
0
        /* Decoding complete. */ \
12092
0
        return S; \
12093
0
      } else { \
12094
0
        /* LLVM uses a MCInst on the stack, but for our use case, */ \
12095
0
        /* it is enough for now to reset the op counter. */ \
12096
0
        MCInst_clear(MI); \
12097
0
        /* If the decoding was incomplete, skip. */ \
12098
0
        Ptr += NumToSkip; \
12099
0
        /* Reset decode status. This also drops a SoftFail status that could be */ \
12100
0
        /* set before the decode attempt. */ \
12101
0
        S = MCDisassembler_Success; \
12102
0
      } \
12103
0
      break; \
12104
0
    } \
12105
0
    case MCD_OPC_SoftFail: { \
12106
0
      /* Decode the mask values. */ \
12107
0
      unsigned Len; \
12108
0
      uint64_t PositiveMask = decodeULEB128(++Ptr, &Len); \
12109
0
      Ptr += Len; \
12110
0
      uint64_t NegativeMask = decodeULEB128(Ptr, &Len); \
12111
0
      Ptr += Len; \
12112
0
      bool Fail = (insn & PositiveMask) != 0 || (~insn & NegativeMask) != 0; \
12113
0
      if (Fail) \
12114
0
        S = MCDisassembler_SoftFail; \
12115
0
      break; \
12116
0
    } \
12117
92.3k
    case MCD_OPC_Fail: { \
12118
92.3k
      return MCDisassembler_Fail; \
12119
0
    } \
12120
2.22M
    } \
12121
2.22M
  } \
12122
145k
  /* Bogisity detected in disassembler state machine! */ \
12123
145k
}
MipsDisassembler.c:decodeInstruction_2
Line
Count
Source
12001
65.3k
                                      InsnType insn, uint64_t Address, const void *Decoder) { \
12002
65.3k
  const uint8_t *Ptr = DecodeTable; \
12003
65.3k
  uint64_t CurFieldValue = 0; \
12004
65.3k
  DecodeStatus S = MCDisassembler_Success; \
12005
1.09M
  while (true) { \
12006
1.09M
    switch (*Ptr) { \
12007
0
    default: \
12008
0
      return MCDisassembler_Fail; \
12009
79.2k
    case MCD_OPC_ExtractField: { \
12010
79.2k
      unsigned Start = *++Ptr; \
12011
79.2k
      unsigned Len = *++Ptr; \
12012
79.2k
      ++Ptr; \
12013
79.2k
      CurFieldValue = fieldname(insn, Start, Len); \
12014
79.2k
      break; \
12015
0
    } \
12016
928k
    case MCD_OPC_FilterValue: { \
12017
928k
      /* Decode the field value. */ \
12018
928k
      unsigned Len; \
12019
928k
      uint64_t Val = decodeULEB128(++Ptr, &Len); \
12020
928k
      Ptr += Len; \
12021
928k
      /* NumToSkip is a plain 24-bit integer. */ \
12022
928k
      unsigned NumToSkip = *Ptr++; \
12023
928k
      NumToSkip |= (*Ptr++) << 8; \
12024
928k
      NumToSkip |= (*Ptr++) << 16; \
12025
928k
      /* Perform the filter operation. */ \
12026
928k
      if (Val != CurFieldValue) \
12027
928k
        Ptr += NumToSkip; \
12028
928k
      break; \
12029
0
    } \
12030
602
    case MCD_OPC_CheckField: { \
12031
602
      unsigned Start = *++Ptr; \
12032
602
      unsigned Len = *++Ptr; \
12033
602
      uint64_t FieldValue = fieldname(insn, Start, Len); \
12034
602
      /* Decode the field value. */ \
12035
602
      unsigned PtrLen = 0; \
12036
602
      uint64_t ExpectedValue = decodeULEB128(++Ptr, &PtrLen); \
12037
602
      Ptr += PtrLen; \
12038
602
      /* NumToSkip is a plain 24-bit integer. */ \
12039
602
      unsigned NumToSkip = *Ptr++; \
12040
602
      NumToSkip |= (*Ptr++) << 8; \
12041
602
      NumToSkip |= (*Ptr++) << 16; \
12042
602
      /* If the actual and expected values don't match, skip. */ \
12043
602
      if (ExpectedValue != FieldValue) \
12044
602
        Ptr += NumToSkip; \
12045
602
      break; \
12046
0
    } \
12047
24.9k
    case MCD_OPC_CheckPredicate: { \
12048
24.9k
      unsigned Len; \
12049
24.9k
      /* Decode the Predicate Index value. */ \
12050
24.9k
      unsigned PIdx = decodeULEB128(++Ptr, &Len); \
12051
24.9k
      Ptr += Len; \
12052
24.9k
      /* NumToSkip is a plain 24-bit integer. */ \
12053
24.9k
      unsigned NumToSkip = *Ptr++; \
12054
24.9k
      NumToSkip |= (*Ptr++) << 8; \
12055
24.9k
      NumToSkip |= (*Ptr++) << 16; \
12056
24.9k
      /* Check the predicate. */ \
12057
24.9k
      bool Pred = checkDecoderPredicate(MI, PIdx); \
12058
24.9k
      if (!Pred) \
12059
24.9k
        Ptr += NumToSkip; \
12060
24.9k
      break; \
12061
0
    } \
12062
24.9k
    case MCD_OPC_Decode: { \
12063
24.9k
      unsigned Len; \
12064
24.9k
      /* Decode the Opcode value. */ \
12065
24.9k
      unsigned Opc = decodeULEB128(++Ptr, &Len); \
12066
24.9k
      Ptr += Len; \
12067
24.9k
      unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \
12068
24.9k
      Ptr += Len; \
12069
24.9k
      MCInst_clear(MI); \
12070
24.9k
      MCInst_setOpcode(MI, Opc); \
12071
24.9k
      bool DecodeComplete; \
12072
24.9k
      S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \
12073
24.9k
      return S; \
12074
0
    } \
12075
0
    case MCD_OPC_TryDecode: { \
12076
0
      unsigned Len; \
12077
0
      /* Decode the Opcode value. */ \
12078
0
      unsigned Opc = decodeULEB128(++Ptr, &Len); \
12079
0
      Ptr += Len; \
12080
0
      unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \
12081
0
      Ptr += Len; \
12082
0
      /* NumToSkip is a plain 24-bit integer. */ \
12083
0
      unsigned NumToSkip = *Ptr++; \
12084
0
      NumToSkip |= (*Ptr++) << 8; \
12085
0
      NumToSkip |= (*Ptr++) << 16; \
12086
0
      /* Perform the decode operation. */ \
12087
0
      MCInst_setOpcode(MI, Opc); \
12088
0
      bool DecodeComplete; \
12089
0
      S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \
12090
0
      if (DecodeComplete) { \
12091
0
        /* Decoding complete. */ \
12092
0
        return S; \
12093
0
      } else { \
12094
0
        /* LLVM uses a MCInst on the stack, but for our use case, */ \
12095
0
        /* it is enough for now to reset the op counter. */ \
12096
0
        MCInst_clear(MI); \
12097
0
        /* If the decoding was incomplete, skip. */ \
12098
0
        Ptr += NumToSkip; \
12099
0
        /* Reset decode status. This also drops a SoftFail status that could be */ \
12100
0
        /* set before the decode attempt. */ \
12101
0
        S = MCDisassembler_Success; \
12102
0
      } \
12103
0
      break; \
12104
0
    } \
12105
0
    case MCD_OPC_SoftFail: { \
12106
0
      /* Decode the mask values. */ \
12107
0
      unsigned Len; \
12108
0
      uint64_t PositiveMask = decodeULEB128(++Ptr, &Len); \
12109
0
      Ptr += Len; \
12110
0
      uint64_t NegativeMask = decodeULEB128(Ptr, &Len); \
12111
0
      Ptr += Len; \
12112
0
      bool Fail = (insn & PositiveMask) != 0 || (~insn & NegativeMask) != 0; \
12113
0
      if (Fail) \
12114
0
        S = MCDisassembler_SoftFail; \
12115
0
      break; \
12116
0
    } \
12117
40.4k
    case MCD_OPC_Fail: { \
12118
40.4k
      return MCDisassembler_Fail; \
12119
0
    } \
12120
1.09M
    } \
12121
1.09M
  } \
12122
65.3k
  /* Bogisity detected in disassembler state machine! */ \
12123
65.3k
}
12124
12125
FieldFromInstruction(fieldFromInstruction_4, uint32_t)
12126
FieldFromInstruction(fieldFromInstruction_2, uint32_t)
12127
FieldFromInstruction(fieldFromInstruction_8, uint64_t)
12128
DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t)
12129
DecodeToMCInst(decodeToMCInst_2, fieldFromInstruction_2, uint32_t)
12130
DecodeToMCInst(decodeToMCInst_8, fieldFromInstruction_8, uint64_t)
12131
DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t)
12132
DecodeInstruction(decodeInstruction_2, fieldFromInstruction_2, decodeToMCInst_2, uint32_t)
12133
DecodeInstruction(decodeInstruction_8, fieldFromInstruction_8, decodeToMCInst_8, uint64_t)