/src/capstonenext/arch/SystemZ/SystemZMCTargetDesc.h
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1 | | /* Capstone Disassembly Engine, http://www.capstone-engine.org */ |
2 | | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */ |
3 | | /* Rot127 <unisono@quyllur.org> 2022-2023 */ |
4 | | /* Automatically translated source file from LLVM. */ |
5 | | |
6 | | /* LLVM-commit: <commit> */ |
7 | | /* LLVM-tag: <tag> */ |
8 | | |
9 | | /* Only small edits allowed. */ |
10 | | /* For multiple similar edits, please create a Patch for the translator. */ |
11 | | |
12 | | /* Capstone's C++ file translator: */ |
13 | | /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */ |
14 | | |
15 | | //===-- SystemZMCTargetDesc.h - SystemZ target descriptions -----*- C++ -*-===// |
16 | | // |
17 | | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
18 | | // See https://llvm.org/LICENSE.txt for license information. |
19 | | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
20 | | // |
21 | | //===----------------------------------------------------------------------===// |
22 | | |
23 | | #ifndef LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCTARGETDESC_H |
24 | | #define LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZMCTARGETDESC_H |
25 | | |
26 | | #include <stdio.h> |
27 | | #include <string.h> |
28 | | #include <stdlib.h> |
29 | | #include <capstone/platform.h> |
30 | | |
31 | | #include "../../MCInstPrinter.h" |
32 | | #include "../../cs_priv.h" |
33 | | #define CONCAT(a, b) CONCAT_(a, b) |
34 | | #define CONCAT_(a, b) a##_##b |
35 | | |
36 | | // CS namespace begin: SystemZMC |
37 | | |
38 | | // Maps of asm register numbers to LLVM register numbers, with 0 indicating |
39 | | // an invalid register. In principle we could use 32-bit and 64-bit register |
40 | | // classes directly, provided that we relegated the GPR allocation order |
41 | | // in SystemZRegisterInfo.td to an AltOrder and left the default order |
42 | | // as %r0-%r15. It seems better to provide the same interface for |
43 | | // all classes though. |
44 | | extern const unsigned SystemZMC_GR32Regs[16]; |
45 | | |
46 | | extern const unsigned SystemZMC_GRH32Regs[16]; |
47 | | |
48 | | extern const unsigned SystemZMC_GR64Regs[16]; |
49 | | |
50 | | extern const unsigned SystemZMC_GR128Regs[16]; |
51 | | |
52 | | extern const unsigned SystemZMC_FP32Regs[16]; |
53 | | |
54 | | extern const unsigned SystemZMC_FP64Regs[16]; |
55 | | |
56 | | extern const unsigned SystemZMC_FP128Regs[16]; |
57 | | |
58 | | extern const unsigned SystemZMC_VR32Regs[32]; |
59 | | |
60 | | extern const unsigned SystemZMC_VR64Regs[32]; |
61 | | |
62 | | extern const unsigned SystemZMC_VR128Regs[32]; |
63 | | |
64 | | extern const unsigned SystemZMC_AR32Regs[16]; |
65 | | |
66 | | extern const unsigned SystemZMC_CR64Regs[16]; |
67 | | |
68 | | // Return the 0-based number of the first architectural register that |
69 | | // contains the given LLVM register. E.g. R1D -> 1. |
70 | | unsigned SystemZMC_getFirstReg(unsigned Reg); |
71 | | |
72 | | // Return the given register as a GR64. |
73 | | static inline unsigned SystemZMC_getRegAsGR64(unsigned Reg) |
74 | 0 | { |
75 | 0 | return SystemZMC_GR64Regs[SystemZMC_getFirstReg(Reg)]; |
76 | 0 | } Unexecuted instantiation: SystemZMapping.c:SystemZMC_getRegAsGR64 Unexecuted instantiation: SystemZDisassembler.c:SystemZMC_getRegAsGR64 Unexecuted instantiation: SystemZDisassemblerExtension.c:SystemZMC_getRegAsGR64 Unexecuted instantiation: SystemZMCTargetDesc.c:SystemZMC_getRegAsGR64 |
77 | | |
78 | | // Return the given register as a low GR32. |
79 | | static inline unsigned SystemZMC_getRegAsGR32(unsigned Reg) |
80 | 0 | { |
81 | 0 | return SystemZMC_GR32Regs[SystemZMC_getFirstReg(Reg)]; |
82 | 0 | } Unexecuted instantiation: SystemZMapping.c:SystemZMC_getRegAsGR32 Unexecuted instantiation: SystemZDisassembler.c:SystemZMC_getRegAsGR32 Unexecuted instantiation: SystemZDisassemblerExtension.c:SystemZMC_getRegAsGR32 Unexecuted instantiation: SystemZMCTargetDesc.c:SystemZMC_getRegAsGR32 |
83 | | |
84 | | // Return the given register as a high GR32. |
85 | | static inline unsigned SystemZMC_getRegAsGRH32(unsigned Reg) |
86 | 0 | { |
87 | 0 | return SystemZMC_GRH32Regs[SystemZMC_getFirstReg(Reg)]; |
88 | 0 | } Unexecuted instantiation: SystemZMapping.c:SystemZMC_getRegAsGRH32 Unexecuted instantiation: SystemZDisassembler.c:SystemZMC_getRegAsGRH32 Unexecuted instantiation: SystemZDisassemblerExtension.c:SystemZMC_getRegAsGRH32 Unexecuted instantiation: SystemZMCTargetDesc.c:SystemZMC_getRegAsGRH32 |
89 | | |
90 | | // Return the given register as a VR128. |
91 | | static inline unsigned SystemZMC_getRegAsVR128(unsigned Reg) |
92 | 0 | { |
93 | 0 | return SystemZMC_VR128Regs[SystemZMC_getFirstReg(Reg)]; |
94 | 0 | } Unexecuted instantiation: SystemZMapping.c:SystemZMC_getRegAsVR128 Unexecuted instantiation: SystemZDisassembler.c:SystemZMC_getRegAsVR128 Unexecuted instantiation: SystemZDisassemblerExtension.c:SystemZMC_getRegAsVR128 Unexecuted instantiation: SystemZMCTargetDesc.c:SystemZMC_getRegAsVR128 |
95 | | |
96 | | // CS namespace end: SystemZMC |
97 | | |
98 | | // end namespace SystemZMC |
99 | | |
100 | | // Defines symbolic names for SystemZ registers. |
101 | | // This defines a mapping from register name to register number. |
102 | | #define GET_REGINFO_ENUM |
103 | | #include "SystemZGenRegisterInfo.inc" |
104 | | |
105 | | // Defines symbolic names for the SystemZ instructions. |
106 | | #define GET_INSTRINFO_ENUM |
107 | | #define GET_INSTRINFO_MC_HELPER_DECLS |
108 | | #include "SystemZGenInstrInfo.inc" |
109 | | |
110 | | #define GET_SUBTARGETINFO_ENUM |
111 | | #include "SystemZGenSubtargetInfo.inc" |
112 | | |
113 | | #endif |