Coverage Report

Created: 2025-08-29 06:29

/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source (jump to first uncovered line)
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
20
#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
6.48k
{
50
6.48k
  uint8_t Imm =
51
6.48k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
6.48k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
2.74k
  case 0:
56
2.74k
    SStream_concat0(O, "eq");
57
2.74k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
2.74k
    break;
59
506
  case 1:
60
506
    SStream_concat0(O, "lt");
61
506
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
506
    break;
63
156
  case 2:
64
156
    SStream_concat0(O, "le");
65
156
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
156
    break;
67
153
  case 3:
68
153
    SStream_concat0(O, "unord");
69
153
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
153
    break;
71
5
  case 4:
72
5
    SStream_concat0(O, "neq");
73
5
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
5
    break;
75
17
  case 5:
76
17
    SStream_concat0(O, "nlt");
77
17
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
17
    break;
79
173
  case 6:
80
173
    SStream_concat0(O, "nle");
81
173
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
173
    break;
83
71
  case 7:
84
71
    SStream_concat0(O, "ord");
85
71
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
71
    break;
87
11
  case 8:
88
11
    SStream_concat0(O, "eq_uq");
89
11
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
11
    break;
91
95
  case 9:
92
95
    SStream_concat0(O, "nge");
93
95
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
95
    break;
95
80
  case 0xa:
96
80
    SStream_concat0(O, "ngt");
97
80
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
80
    break;
99
170
  case 0xb:
100
170
    SStream_concat0(O, "false");
101
170
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
170
    break;
103
26
  case 0xc:
104
26
    SStream_concat0(O, "neq_oq");
105
26
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
26
    break;
107
51
  case 0xd:
108
51
    SStream_concat0(O, "ge");
109
51
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
51
    break;
111
8
  case 0xe:
112
8
    SStream_concat0(O, "gt");
113
8
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
8
    break;
115
109
  case 0xf:
116
109
    SStream_concat0(O, "true");
117
109
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
109
    break;
119
94
  case 0x10:
120
94
    SStream_concat0(O, "eq_os");
121
94
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
94
    break;
123
99
  case 0x11:
124
99
    SStream_concat0(O, "lt_oq");
125
99
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
99
    break;
127
110
  case 0x12:
128
110
    SStream_concat0(O, "le_oq");
129
110
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
110
    break;
131
208
  case 0x13:
132
208
    SStream_concat0(O, "unord_s");
133
208
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
208
    break;
135
55
  case 0x14:
136
55
    SStream_concat0(O, "neq_us");
137
55
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
55
    break;
139
193
  case 0x15:
140
193
    SStream_concat0(O, "nlt_uq");
141
193
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
193
    break;
143
291
  case 0x16:
144
291
    SStream_concat0(O, "nle_uq");
145
291
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
291
    break;
147
5
  case 0x17:
148
5
    SStream_concat0(O, "ord_s");
149
5
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
5
    break;
151
45
  case 0x18:
152
45
    SStream_concat0(O, "eq_us");
153
45
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
45
    break;
155
27
  case 0x19:
156
27
    SStream_concat0(O, "nge_uq");
157
27
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
27
    break;
159
150
  case 0x1a:
160
150
    SStream_concat0(O, "ngt_uq");
161
150
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
150
    break;
163
86
  case 0x1b:
164
86
    SStream_concat0(O, "false_os");
165
86
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
86
    break;
167
610
  case 0x1c:
168
610
    SStream_concat0(O, "neq_os");
169
610
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
610
    break;
171
119
  case 0x1d:
172
119
    SStream_concat0(O, "ge_oq");
173
119
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
119
    break;
175
9
  case 0x1e:
176
9
    SStream_concat0(O, "gt_oq");
177
9
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
9
    break;
179
9
  case 0x1f:
180
9
    SStream_concat0(O, "true_us");
181
9
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
9
    break;
183
6.48k
  }
184
185
6.48k
  MI->popcode_adjust = Imm + 1;
186
6.48k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
702
{
190
702
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
702
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
322
  case 0:
195
322
    SStream_concat0(O, "lt");
196
322
    op_addXopCC(MI, X86_XOP_CC_LT);
197
322
    break;
198
97
  case 1:
199
97
    SStream_concat0(O, "le");
200
97
    op_addXopCC(MI, X86_XOP_CC_LE);
201
97
    break;
202
179
  case 2:
203
179
    SStream_concat0(O, "gt");
204
179
    op_addXopCC(MI, X86_XOP_CC_GT);
205
179
    break;
206
3
  case 3:
207
3
    SStream_concat0(O, "ge");
208
3
    op_addXopCC(MI, X86_XOP_CC_GE);
209
3
    break;
210
51
  case 4:
211
51
    SStream_concat0(O, "eq");
212
51
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
51
    break;
214
0
  case 5:
215
0
    SStream_concat0(O, "neq");
216
0
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
0
    break;
218
43
  case 6:
219
43
    SStream_concat0(O, "false");
220
43
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
43
    break;
222
7
  case 7:
223
7
    SStream_concat0(O, "true");
224
7
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
7
    break;
226
702
  }
227
702
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
844
{
231
844
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
844
  switch (Imm) {
233
365
  case 0:
234
365
    SStream_concat0(O, "{rn-sae}");
235
365
    op_addAvxSae(MI);
236
365
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
365
    break;
238
283
  case 1:
239
283
    SStream_concat0(O, "{rd-sae}");
240
283
    op_addAvxSae(MI);
241
283
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
283
    break;
243
61
  case 2:
244
61
    SStream_concat0(O, "{ru-sae}");
245
61
    op_addAvxSae(MI);
246
61
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
61
    break;
248
135
  case 3:
249
135
    SStream_concat0(O, "{rz-sae}");
250
135
    op_addAvxSae(MI);
251
135
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
135
    break;
253
0
  default:
254
0
    break; // never reach
255
844
  }
256
844
}
257
#endif