Coverage Report

Created: 2025-10-10 06:20

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
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Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
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// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
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//===----------------------------------------------------------------------===//
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//
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// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
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//
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//===----------------------------------------------------------------------===//
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15
/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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18
#ifdef _MSC_VER
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
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// disable MSVC's warning on strncpy()
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#pragma warning(disable : 28719)
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#endif
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25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
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#include <ctype.h>
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#endif
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#include <capstone/platform.h>
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30
#if defined(CAPSTONE_HAS_OSXKERNEL)
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#include <Availability.h>
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#include <libkern/libkern.h>
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#else
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#include <stdio.h>
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#include <stdlib.h>
36
#endif
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#include <string.h>
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40
#include "../../utils.h"
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#include "../../MCInst.h"
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#include "../../SStream.h"
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44
#include "X86InstPrinterCommon.h"
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#include "X86Mapping.h"
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47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
4.25k
{
50
4.25k
  uint8_t Imm =
51
4.25k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
4.25k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
2.11k
  case 0:
56
2.11k
    SStream_concat0(O, "eq");
57
2.11k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
2.11k
    break;
59
461
  case 1:
60
461
    SStream_concat0(O, "lt");
61
461
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
461
    break;
63
72
  case 2:
64
72
    SStream_concat0(O, "le");
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72
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
72
    break;
67
29
  case 3:
68
29
    SStream_concat0(O, "unord");
69
29
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
29
    break;
71
18
  case 4:
72
18
    SStream_concat0(O, "neq");
73
18
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
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18
    break;
75
2
  case 5:
76
2
    SStream_concat0(O, "nlt");
77
2
    op_addAvxCC(MI, X86_AVX_CC_NLT);
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2
    break;
79
73
  case 6:
80
73
    SStream_concat0(O, "nle");
81
73
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
73
    break;
83
4
  case 7:
84
4
    SStream_concat0(O, "ord");
85
4
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
4
    break;
87
19
  case 8:
88
19
    SStream_concat0(O, "eq_uq");
89
19
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
19
    break;
91
3
  case 9:
92
3
    SStream_concat0(O, "nge");
93
3
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
3
    break;
95
12
  case 0xa:
96
12
    SStream_concat0(O, "ngt");
97
12
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
12
    break;
99
73
  case 0xb:
100
73
    SStream_concat0(O, "false");
101
73
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
73
    break;
103
36
  case 0xc:
104
36
    SStream_concat0(O, "neq_oq");
105
36
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
36
    break;
107
12
  case 0xd:
108
12
    SStream_concat0(O, "ge");
109
12
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
12
    break;
111
43
  case 0xe:
112
43
    SStream_concat0(O, "gt");
113
43
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
43
    break;
115
18
  case 0xf:
116
18
    SStream_concat0(O, "true");
117
18
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
18
    break;
119
67
  case 0x10:
120
67
    SStream_concat0(O, "eq_os");
121
67
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
67
    break;
123
23
  case 0x11:
124
23
    SStream_concat0(O, "lt_oq");
125
23
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
23
    break;
127
104
  case 0x12:
128
104
    SStream_concat0(O, "le_oq");
129
104
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
104
    break;
131
70
  case 0x13:
132
70
    SStream_concat0(O, "unord_s");
133
70
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
70
    break;
135
8
  case 0x14:
136
8
    SStream_concat0(O, "neq_us");
137
8
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
8
    break;
139
149
  case 0x15:
140
149
    SStream_concat0(O, "nlt_uq");
141
149
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
149
    break;
143
164
  case 0x16:
144
164
    SStream_concat0(O, "nle_uq");
145
164
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
164
    break;
147
48
  case 0x17:
148
48
    SStream_concat0(O, "ord_s");
149
48
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
48
    break;
151
129
  case 0x18:
152
129
    SStream_concat0(O, "eq_us");
153
129
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
129
    break;
155
8
  case 0x19:
156
8
    SStream_concat0(O, "nge_uq");
157
8
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
8
    break;
159
69
  case 0x1a:
160
69
    SStream_concat0(O, "ngt_uq");
161
69
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
69
    break;
163
123
  case 0x1b:
164
123
    SStream_concat0(O, "false_os");
165
123
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
123
    break;
167
250
  case 0x1c:
168
250
    SStream_concat0(O, "neq_os");
169
250
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
250
    break;
171
36
  case 0x1d:
172
36
    SStream_concat0(O, "ge_oq");
173
36
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
36
    break;
175
4
  case 0x1e:
176
4
    SStream_concat0(O, "gt_oq");
177
4
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
4
    break;
179
15
  case 0x1f:
180
15
    SStream_concat0(O, "true_us");
181
15
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
15
    break;
183
4.25k
  }
184
185
4.25k
  MI->popcode_adjust = Imm + 1;
186
4.25k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
574
{
190
574
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
574
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
188
  case 0:
195
188
    SStream_concat0(O, "lt");
196
188
    op_addXopCC(MI, X86_XOP_CC_LT);
197
188
    break;
198
79
  case 1:
199
79
    SStream_concat0(O, "le");
200
79
    op_addXopCC(MI, X86_XOP_CC_LE);
201
79
    break;
202
117
  case 2:
203
117
    SStream_concat0(O, "gt");
204
117
    op_addXopCC(MI, X86_XOP_CC_GT);
205
117
    break;
206
2
  case 3:
207
2
    SStream_concat0(O, "ge");
208
2
    op_addXopCC(MI, X86_XOP_CC_GE);
209
2
    break;
210
25
  case 4:
211
25
    SStream_concat0(O, "eq");
212
25
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
25
    break;
214
89
  case 5:
215
89
    SStream_concat0(O, "neq");
216
89
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
89
    break;
218
61
  case 6:
219
61
    SStream_concat0(O, "false");
220
61
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
61
    break;
222
13
  case 7:
223
13
    SStream_concat0(O, "true");
224
13
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
13
    break;
226
574
  }
227
574
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
755
{
231
755
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
755
  switch (Imm) {
233
429
  case 0:
234
429
    SStream_concat0(O, "{rn-sae}");
235
429
    op_addAvxSae(MI);
236
429
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
429
    break;
238
158
  case 1:
239
158
    SStream_concat0(O, "{rd-sae}");
240
158
    op_addAvxSae(MI);
241
158
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
158
    break;
243
107
  case 2:
244
107
    SStream_concat0(O, "{ru-sae}");
245
107
    op_addAvxSae(MI);
246
107
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
107
    break;
248
61
  case 3:
249
61
    SStream_concat0(O, "{rz-sae}");
250
61
    op_addAvxSae(MI);
251
61
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
61
    break;
253
0
  default:
254
0
    break; // never reach
255
755
  }
256
755
}
257
#endif