Coverage Report

Created: 2025-10-12 06:32

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/capstonenext/arch/X86/X86InstPrinterCommon.c
Line
Count
Source
1
//===--- X86InstPrinterCommon.cpp - X86 assembly instruction printing -----===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
10
// This file includes common code for rendering MCInst instances as Intel-style
11
// and Intel-style assembly.
12
//
13
//===----------------------------------------------------------------------===//
14
15
/* Capstone Disassembly Engine */
16
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
17
18
#ifdef _MSC_VER
19
// disable MSVC's warning on strncpy()
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#pragma warning(disable : 4996)
21
// disable MSVC's warning on strncpy()
22
#pragma warning(disable : 28719)
23
#endif
24
25
#if !defined(CAPSTONE_HAS_OSXKERNEL)
26
#include <ctype.h>
27
#endif
28
#include <capstone/platform.h>
29
30
#if defined(CAPSTONE_HAS_OSXKERNEL)
31
#include <Availability.h>
32
#include <libkern/libkern.h>
33
#else
34
#include <stdio.h>
35
#include <stdlib.h>
36
#endif
37
38
#include <string.h>
39
40
#include "../../utils.h"
41
#include "../../MCInst.h"
42
#include "../../SStream.h"
43
44
#include "X86InstPrinterCommon.h"
45
#include "X86Mapping.h"
46
47
#ifndef CAPSTONE_X86_REDUCE
48
void printSSEAVXCC(MCInst *MI, unsigned Op, SStream *O)
49
10.8k
{
50
10.8k
  uint8_t Imm =
51
10.8k
    (uint8_t)(MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f);
52
10.8k
  switch (Imm) {
53
0
  default:
54
0
    break; //printf("Invalid avxcc argument!\n"); break;
55
5.56k
  case 0:
56
5.56k
    SStream_concat0(O, "eq");
57
5.56k
    op_addAvxCC(MI, X86_AVX_CC_EQ);
58
5.56k
    break;
59
863
  case 1:
60
863
    SStream_concat0(O, "lt");
61
863
    op_addAvxCC(MI, X86_AVX_CC_LT);
62
863
    break;
63
262
  case 2:
64
262
    SStream_concat0(O, "le");
65
262
    op_addAvxCC(MI, X86_AVX_CC_LE);
66
262
    break;
67
80
  case 3:
68
80
    SStream_concat0(O, "unord");
69
80
    op_addAvxCC(MI, X86_AVX_CC_UNORD);
70
80
    break;
71
60
  case 4:
72
60
    SStream_concat0(O, "neq");
73
60
    op_addAvxCC(MI, X86_AVX_CC_NEQ);
74
60
    break;
75
85
  case 5:
76
85
    SStream_concat0(O, "nlt");
77
85
    op_addAvxCC(MI, X86_AVX_CC_NLT);
78
85
    break;
79
122
  case 6:
80
122
    SStream_concat0(O, "nle");
81
122
    op_addAvxCC(MI, X86_AVX_CC_NLE);
82
122
    break;
83
46
  case 7:
84
46
    SStream_concat0(O, "ord");
85
46
    op_addAvxCC(MI, X86_AVX_CC_ORD);
86
46
    break;
87
90
  case 8:
88
90
    SStream_concat0(O, "eq_uq");
89
90
    op_addAvxCC(MI, X86_AVX_CC_EQ_UQ);
90
90
    break;
91
14
  case 9:
92
14
    SStream_concat0(O, "nge");
93
14
    op_addAvxCC(MI, X86_AVX_CC_NGE);
94
14
    break;
95
54
  case 0xa:
96
54
    SStream_concat0(O, "ngt");
97
54
    op_addAvxCC(MI, X86_AVX_CC_NGT);
98
54
    break;
99
250
  case 0xb:
100
250
    SStream_concat0(O, "false");
101
250
    op_addAvxCC(MI, X86_AVX_CC_FALSE);
102
250
    break;
103
123
  case 0xc:
104
123
    SStream_concat0(O, "neq_oq");
105
123
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OQ);
106
123
    break;
107
18
  case 0xd:
108
18
    SStream_concat0(O, "ge");
109
18
    op_addAvxCC(MI, X86_AVX_CC_GE);
110
18
    break;
111
155
  case 0xe:
112
155
    SStream_concat0(O, "gt");
113
155
    op_addAvxCC(MI, X86_AVX_CC_GT);
114
155
    break;
115
59
  case 0xf:
116
59
    SStream_concat0(O, "true");
117
59
    op_addAvxCC(MI, X86_AVX_CC_TRUE);
118
59
    break;
119
280
  case 0x10:
120
280
    SStream_concat0(O, "eq_os");
121
280
    op_addAvxCC(MI, X86_AVX_CC_EQ_OS);
122
280
    break;
123
32
  case 0x11:
124
32
    SStream_concat0(O, "lt_oq");
125
32
    op_addAvxCC(MI, X86_AVX_CC_LT_OQ);
126
32
    break;
127
276
  case 0x12:
128
276
    SStream_concat0(O, "le_oq");
129
276
    op_addAvxCC(MI, X86_AVX_CC_LE_OQ);
130
276
    break;
131
200
  case 0x13:
132
200
    SStream_concat0(O, "unord_s");
133
200
    op_addAvxCC(MI, X86_AVX_CC_UNORD_S);
134
200
    break;
135
78
  case 0x14:
136
78
    SStream_concat0(O, "neq_us");
137
78
    op_addAvxCC(MI, X86_AVX_CC_NEQ_US);
138
78
    break;
139
250
  case 0x15:
140
250
    SStream_concat0(O, "nlt_uq");
141
250
    op_addAvxCC(MI, X86_AVX_CC_NLT_UQ);
142
250
    break;
143
250
  case 0x16:
144
250
    SStream_concat0(O, "nle_uq");
145
250
    op_addAvxCC(MI, X86_AVX_CC_NLE_UQ);
146
250
    break;
147
246
  case 0x17:
148
246
    SStream_concat0(O, "ord_s");
149
246
    op_addAvxCC(MI, X86_AVX_CC_ORD_S);
150
246
    break;
151
446
  case 0x18:
152
446
    SStream_concat0(O, "eq_us");
153
446
    op_addAvxCC(MI, X86_AVX_CC_EQ_US);
154
446
    break;
155
16
  case 0x19:
156
16
    SStream_concat0(O, "nge_uq");
157
16
    op_addAvxCC(MI, X86_AVX_CC_NGE_UQ);
158
16
    break;
159
87
  case 0x1a:
160
87
    SStream_concat0(O, "ngt_uq");
161
87
    op_addAvxCC(MI, X86_AVX_CC_NGT_UQ);
162
87
    break;
163
219
  case 0x1b:
164
219
    SStream_concat0(O, "false_os");
165
219
    op_addAvxCC(MI, X86_AVX_CC_FALSE_OS);
166
219
    break;
167
437
  case 0x1c:
168
437
    SStream_concat0(O, "neq_os");
169
437
    op_addAvxCC(MI, X86_AVX_CC_NEQ_OS);
170
437
    break;
171
121
  case 0x1d:
172
121
    SStream_concat0(O, "ge_oq");
173
121
    op_addAvxCC(MI, X86_AVX_CC_GE_OQ);
174
121
    break;
175
10
  case 0x1e:
176
10
    SStream_concat0(O, "gt_oq");
177
10
    op_addAvxCC(MI, X86_AVX_CC_GT_OQ);
178
10
    break;
179
26
  case 0x1f:
180
26
    SStream_concat0(O, "true_us");
181
26
    op_addAvxCC(MI, X86_AVX_CC_TRUE_US);
182
26
    break;
183
10.8k
  }
184
185
10.8k
  MI->popcode_adjust = Imm + 1;
186
10.8k
}
187
188
void printXOPCC(MCInst *MI, unsigned Op, SStream *O)
189
1.59k
{
190
1.59k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op));
191
192
1.59k
  switch (Imm) {
193
0
  default: // llvm_unreachable("Invalid xopcc argument!");
194
603
  case 0:
195
603
    SStream_concat0(O, "lt");
196
603
    op_addXopCC(MI, X86_XOP_CC_LT);
197
603
    break;
198
168
  case 1:
199
168
    SStream_concat0(O, "le");
200
168
    op_addXopCC(MI, X86_XOP_CC_LE);
201
168
    break;
202
480
  case 2:
203
480
    SStream_concat0(O, "gt");
204
480
    op_addXopCC(MI, X86_XOP_CC_GT);
205
480
    break;
206
58
  case 3:
207
58
    SStream_concat0(O, "ge");
208
58
    op_addXopCC(MI, X86_XOP_CC_GE);
209
58
    break;
210
79
  case 4:
211
79
    SStream_concat0(O, "eq");
212
79
    op_addXopCC(MI, X86_XOP_CC_EQ);
213
79
    break;
214
96
  case 5:
215
96
    SStream_concat0(O, "neq");
216
96
    op_addXopCC(MI, X86_XOP_CC_NEQ);
217
96
    break;
218
79
  case 6:
219
79
    SStream_concat0(O, "false");
220
79
    op_addXopCC(MI, X86_XOP_CC_FALSE);
221
79
    break;
222
31
  case 7:
223
31
    SStream_concat0(O, "true");
224
31
    op_addXopCC(MI, X86_XOP_CC_TRUE);
225
31
    break;
226
1.59k
  }
227
1.59k
}
228
229
void printRoundingControl(MCInst *MI, unsigned Op, SStream *O)
230
2.40k
{
231
2.40k
  int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3;
232
2.40k
  switch (Imm) {
233
1.35k
  case 0:
234
1.35k
    SStream_concat0(O, "{rn-sae}");
235
1.35k
    op_addAvxSae(MI);
236
1.35k
    op_addAvxRoundingMode(MI, X86_AVX_RM_RN);
237
1.35k
    break;
238
816
  case 1:
239
816
    SStream_concat0(O, "{rd-sae}");
240
816
    op_addAvxSae(MI);
241
816
    op_addAvxRoundingMode(MI, X86_AVX_RM_RD);
242
816
    break;
243
128
  case 2:
244
128
    SStream_concat0(O, "{ru-sae}");
245
128
    op_addAvxSae(MI);
246
128
    op_addAvxRoundingMode(MI, X86_AVX_RM_RU);
247
128
    break;
248
108
  case 3:
249
108
    SStream_concat0(O, "{rz-sae}");
250
108
    op_addAvxSae(MI);
251
108
    op_addAvxRoundingMode(MI, X86_AVX_RM_RZ);
252
108
    break;
253
0
  default:
254
0
    break; // never reach
255
2.40k
  }
256
2.40k
}
257
#endif